diff --git a/.simvision/33338_ks6n19__autosave.tcl b/.simvision/33338_ks6n19__autosave.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..d4a9ae3675f52c3ed4cf787d3f84afcf45923e83
--- /dev/null
+++ b/.simvision/33338_ks6n19__autosave.tcl
@@ -0,0 +1,50 @@
+
+# NC-Sim Command File
+# TOOL:	ncsim(64)	15.20-s058
+#
+
+set tcl_prompt1 {puts -nonewline "ncsim> "}
+set tcl_prompt2 {puts -nonewline "> "}
+set vlog_format %h
+set vhdl_format %v
+set real_precision 6
+set display_unit auto
+set time_unit module
+set heap_garbage_size -200
+set heap_garbage_time 0
+set assert_report_level note
+set assert_stop_level error
+set autoscope yes
+set assert_1164_warnings yes
+set pack_assert_off {}
+set severity_pack_assert_off {note warning}
+set assert_output_stop_level failed
+set tcl_debug_level 0
+set relax_path_name 1
+set vhdl_vcdmap XX01ZX01X
+set intovf_severity_level ERROR
+set probe_screen_format 0
+set rangecnst_severity_level ERROR
+set textio_severity_level ERROR
+set vital_timing_checks_on 1
+set vlog_code_show_force 0
+set assert_count_attempts 1
+set tcl_all64 false
+set tcl_runerror_exit false
+set assert_report_incompletes 0
+set show_force 1
+set force_reset_by_reinvoke 0
+set tcl_relaxed_literal 0
+set probe_exclude_patterns {}
+set probe_packed_limit 4k
+set probe_unpacked_limit 16k
+set assert_internal_msg no
+set svseed 1
+set assert_reporting_mode 0
+alias . run
+alias iprof profile
+alias quit exit
+database -open -shm -into waves.shm waves -default
+probe -create -database waves de1_soc_wrapper_stim.CLOCK_50 de1_soc_wrapper_stim.KEY de1_soc_wrapper_stim.SW de1_soc_wrapper_stim.LEDR de1_soc_wrapper_stim.HEX0 de1_soc_wrapper_stim.HEX1 de1_soc_wrapper_stim.HEX2 de1_soc_wrapper_stim.HEX3 de1_soc_wrapper_stim.VGA_R de1_soc_wrapper_stim.VGA_G de1_soc_wrapper_stim.VGA_B de1_soc_wrapper_stim.VGA_HS de1_soc_wrapper_stim.VGA_VS de1_soc_wrapper_stim.VGA_CLK de1_soc_wrapper_stim.VGA_BLANK_N de1_soc_wrapper_stim.dut.soc_inst.HADDR de1_soc_wrapper_stim.dut.soc_inst.HWRITE de1_soc_wrapper_stim.dut.soc_inst.HSEL_RAM de1_soc_wrapper_stim.dut.soc_inst.HSEL_SW de1_soc_wrapper_stim.dut.soc_inst.HSEL_DOUT de1_soc_wrapper_stim.dut.raz_inst.pixel_x de1_soc_wrapper_stim.dut.raz_inst.pixel_y de1_soc_wrapper_stim.dut.raz_inst.pixel de1_soc_wrapper_stim.dut.soc_inst.pix1.pixel_address
+
+simvision -input /home/ks6n19/Documents/project/.simvision/33338_ks6n19__autosave.tcl.svcf
diff --git a/.simvision/33338_ks6n19__autosave.tcl.svcf b/.simvision/33338_ks6n19__autosave.tcl.svcf
new file mode 100644
index 0000000000000000000000000000000000000000..cf580ace36dcbc319e7c4958bb92fa7061ce6df1
--- /dev/null
+++ b/.simvision/33338_ks6n19__autosave.tcl.svcf
@@ -0,0 +1,189 @@
+
+#
+# Preferences
+#
+preferences set toolbar-CursorControl-MemViewer {
+  usual
+  position -row 0 -anchor e
+}
+preferences set toolbar-Standard-MemViewer {
+  usual
+  position -row 1
+}
+preferences set plugin-enable-svdatabrowser-new 1
+preferences set toolbar-sendToIndago-WaveWindow {
+  usual
+  position -pos 1
+}
+preferences set toolbar-Standard-Console {
+  usual
+  position -pos 1
+}
+preferences set toolbar-Search-Console {
+  usual
+  position -pos 2
+}
+preferences set plugin-enable-groupscope 0
+preferences set plugin-enable-interleaveandcompare 0
+preferences set plugin-enable-waveformfrequencyplot 0
+preferences set toolbar-Windows-MemViewer {
+  usual
+  position -row 1 -pos 1
+}
+preferences set toolbar-TimeSearch-MemViewer {
+  usual
+  position -row 2 -pos 0
+}
+preferences set whats-new-dont-show-at-startup 1
+preferences set toolbar-SimControl-MemViewer {
+  usual
+  position -row 3 -pos 0
+}
+
+#
+# Mnemonic Maps
+#
+mmap new -reuse -name {Boolean as Logic} -radix %b -contents {{%c=FALSE -edgepriority 1 -shape low}
+{%c=TRUE -edgepriority 1 -shape high}}
+mmap new -reuse -name {Example Map} -radix %x -contents {{%b=11???? -bgcolor orange -label REG:%x -linecolor yellow -shape bus}
+{%x=1F -bgcolor red -label ERROR -linecolor white -shape EVENT}
+{%x=2C -bgcolor red -label ERROR -linecolor white -shape EVENT}
+{%x=* -label %x -linecolor gray -shape bus}}
+
+#
+# Design Browser windows
+#
+if {[catch {window new WatchList -name "Design Browser 1" -geometry 730x500+261+33}] != ""} {
+    window geometry "Design Browser 1" 730x500+261+33
+}
+window target "Design Browser 1" on
+browser using {Design Browser 1}
+browser set \
+    -signalsort name
+browser timecontrol set -lock 0
+
+#
+# Waveform windows
+#
+if {[catch {window new WaveWindow -name "Waves for ARM SoC Example" -geometry 1297x670+0+25}] != ""} {
+    window geometry "Waves for ARM SoC Example" 1297x670+0+25
+}
+window target "Waves for ARM SoC Example" on
+waveform using {Waves for ARM SoC Example}
+waveform sidebar visibility partial
+waveform set \
+    -primarycursor TimeA \
+    -signalnames name \
+    -signalwidth 175 \
+    -units ps \
+    -valuewidth 75
+waveform baseline set -time 0
+
+set id [waveform add -signals  {
+	simulator::de1_soc_wrapper_stim.CLOCK_50
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.KEY[2:0]}
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.SW[9:0]}
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.LEDR[9:0]}
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.HEX0[6:0]}
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.HEX1[6:0]}
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.HEX2[6:0]}
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.HEX3[6:0]}
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.VGA_R[7:0]}
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.VGA_G[7:0]}
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.VGA_B[7:0]}
+	} ]
+set id [waveform add -signals  {
+	simulator::de1_soc_wrapper_stim.VGA_HS
+	} ]
+set id [waveform add -signals  {
+	simulator::de1_soc_wrapper_stim.VGA_VS
+	} ]
+set id [waveform add -signals  {
+	simulator::de1_soc_wrapper_stim.VGA_CLK
+	} ]
+set id [waveform add -signals  {
+	simulator::de1_soc_wrapper_stim.VGA_BLANK_N
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.dut.soc_inst.HADDR[31:0]}
+	} ]
+set id [waveform add -signals  {
+	simulator::de1_soc_wrapper_stim.dut.soc_inst.HWRITE
+	} ]
+set id [waveform add -signals  {
+	simulator::de1_soc_wrapper_stim.dut.soc_inst.HSEL_RAM
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.dut.raz_inst.pixel_x[9:0]}
+	} ]
+waveform format $id -radix %d
+set id [waveform add -signals  {
+	simulator::de1_soc_wrapper_stim.dut.soc_inst.HSEL_SW
+	} ]
+set id [waveform add -signals  {
+	simulator::de1_soc_wrapper_stim.dut.soc_inst.HSEL_DOUT
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.dut.raz_inst.pixel_y[8:0]}
+	} ]
+set id [waveform add -signals  {
+	simulator::de1_soc_wrapper_stim.dut.raz_inst.pixel
+	} ]
+set id [waveform add -signals  {
+	{simulator::de1_soc_wrapper_stim.dut.soc_inst.pix1.pixel_address[18:0]}
+	} ]
+
+waveform xview limits 17442608900ps 17443562700ps
+
+#
+# Waveform Window Links
+#
+
+#
+# Memory Viewer windows
+#
+if {[catch {window new MemViewer -name "Memory Viewer 2" -geometry 700x500+304+138}] != ""} {
+    window geometry "Memory Viewer 2" 700x500+304+138
+}
+window target "Memory Viewer 2" on
+memviewer using {Memory Viewer 2}
+memviewer set \
+-primarycursor TimeA \
+-units ps \
+-radix default \
+-addressradix default \
+-addressorder MSBtoLSB
+
+memviewer add  {simulator::de1_soc_wrapper_stim.dut.soc_inst.pix1.memory[0:307199]} 
+
+memviewer sidebar visibility partial
+
+#
+# Console windows
+#
+console set -windowname Console
+window geometry Console 730x250+261+442
+
+#
+# Layout selection
+#
diff --git a/.simvision/93894_ks6n19__autosave.tcl b/.simvision/93894_ks6n19__autosave.tcl
new file mode 100644
index 0000000000000000000000000000000000000000..4cebbb427ef39d373c083d874d726da3fcd679bd
--- /dev/null
+++ b/.simvision/93894_ks6n19__autosave.tcl
@@ -0,0 +1,59 @@
+
+# NC-Sim Command File
+# TOOL:	ncsim(64)	15.20-s058
+#
+
+set tcl_prompt1 {puts -nonewline "ncsim> "}
+set tcl_prompt2 {puts -nonewline "> "}
+set vlog_format %h
+set vhdl_format %v
+set real_precision 6
+set display_unit auto
+set time_unit module
+set heap_garbage_size -200
+set heap_garbage_time 0
+set assert_report_level note
+set assert_stop_level error
+set autoscope yes
+set assert_1164_warnings yes
+set pack_assert_off {}
+set severity_pack_assert_off {note warning}
+set assert_output_stop_level failed
+set tcl_debug_level 0
+set relax_path_name 1
+set vhdl_vcdmap XX01ZX01X
+set intovf_severity_level ERROR
+set probe_screen_format 0
+set rangecnst_severity_level ERROR
+set textio_severity_level ERROR
+set vital_timing_checks_on 1
+set vlog_code_show_force 0
+set assert_count_attempts 1
+set tcl_all64 false
+set tcl_runerror_exit false
+set assert_report_incompletes 0
+set show_force 1
+set force_reset_by_reinvoke 0
+set tcl_relaxed_literal 0
+set probe_exclude_patterns {}
+set probe_packed_limit 4k
+set probe_unpacked_limit 16k
+set assert_internal_msg no
+set svseed 1
+set assert_reporting_mode 0
+alias . run
+alias iprof profile
+alias quit exit
+database -open -shm -into waves.shm waves
+database -open -shm -into memory.shm memory -default
+probe -create -database waves de1_soc_wrapper_stim.CLOCK_50 de1_soc_wrapper_stim.KEY de1_soc_wrapper_stim.SW de1_soc_wrapper_stim.LEDR de1_soc_wrapper_stim.HEX0 de1_soc_wrapper_stim.HEX1 de1_soc_wrapper_stim.HEX2 de1_soc_wrapper_stim.HEX3 de1_soc_wrapper_stim.VGA_R de1_soc_wrapper_stim.VGA_G de1_soc_wrapper_stim.VGA_B de1_soc_wrapper_stim.VGA_HS de1_soc_wrapper_stim.VGA_VS de1_soc_wrapper_stim.VGA_CLK de1_soc_wrapper_stim.VGA_BLANK_N de1_soc_wrapper_stim.dut.soc_inst.HADDR de1_soc_wrapper_stim.dut.soc_inst.HWRITE de1_soc_wrapper_stim.dut.soc_inst.HSEL_RAM de1_soc_wrapper_stim.dut.soc_inst.HSEL_SW de1_soc_wrapper_stim.dut.soc_inst.HSEL_DOUT
+probe -create -database waves de1_soc_wrapper_stim.CLOCK_50 de1_soc_wrapper_stim.KEY de1_soc_wrapper_stim.SW de1_soc_wrapper_stim.LEDR de1_soc_wrapper_stim.HEX0 de1_soc_wrapper_stim.HEX1 de1_soc_wrapper_stim.HEX2 de1_soc_wrapper_stim.HEX3 de1_soc_wrapper_stim.VGA_R de1_soc_wrapper_stim.VGA_G de1_soc_wrapper_stim.VGA_B de1_soc_wrapper_stim.VGA_HS de1_soc_wrapper_stim.VGA_VS de1_soc_wrapper_stim.VGA_CLK de1_soc_wrapper_stim.VGA_BLANK_N de1_soc_wrapper_stim.dut.soc_inst.HADDR de1_soc_wrapper_stim.dut.soc_inst.HWRITE de1_soc_wrapper_stim.dut.soc_inst.HSEL_RAM de1_soc_wrapper_stim.dut.soc_inst.HSEL_SW de1_soc_wrapper_stim.dut.soc_inst.HSEL_DOUT
+probe -create -database waves de1_soc_wrapper_stim.CLOCK_50 de1_soc_wrapper_stim.KEY de1_soc_wrapper_stim.SW de1_soc_wrapper_stim.LEDR de1_soc_wrapper_stim.HEX0 de1_soc_wrapper_stim.HEX1 de1_soc_wrapper_stim.HEX2 de1_soc_wrapper_stim.HEX3 de1_soc_wrapper_stim.VGA_R de1_soc_wrapper_stim.VGA_G de1_soc_wrapper_stim.VGA_B de1_soc_wrapper_stim.VGA_HS de1_soc_wrapper_stim.VGA_VS de1_soc_wrapper_stim.VGA_CLK de1_soc_wrapper_stim.VGA_BLANK_N de1_soc_wrapper_stim.dut.soc_inst.HADDR de1_soc_wrapper_stim.dut.soc_inst.HWRITE de1_soc_wrapper_stim.dut.soc_inst.HSEL_RAM de1_soc_wrapper_stim.dut.soc_inst.HSEL_SW de1_soc_wrapper_stim.dut.soc_inst.HSEL_DOUT
+probe -create -database waves de1_soc_wrapper_stim.dut.raz_inst.pixel de1_soc_wrapper_stim.dut.raz_inst.pixel_x de1_soc_wrapper_stim.dut.raz_inst.pixel_y
+probe -create -database waves de1_soc_wrapper_stim.dut.soc_inst.pix1.pixel_address
+probe -create -database memory de1_soc_wrapper_stim.dut.raz_inst.V_count de1_soc_wrapper_stim.dut.raz_inst.H_count
+probe -create -database memory de1_soc_wrapper_stim.dut.soc_inst.pix1.pixel
+probe -create -database memory de1_soc_wrapper_stim.CLOCK_50 de1_soc_wrapper_stim.KEY de1_soc_wrapper_stim.SW de1_soc_wrapper_stim.LEDR de1_soc_wrapper_stim.HEX0 de1_soc_wrapper_stim.HEX1 de1_soc_wrapper_stim.HEX2 de1_soc_wrapper_stim.HEX3 de1_soc_wrapper_stim.VGA_R de1_soc_wrapper_stim.VGA_G de1_soc_wrapper_stim.VGA_B de1_soc_wrapper_stim.VGA_HS de1_soc_wrapper_stim.VGA_VS de1_soc_wrapper_stim.VGA_CLK de1_soc_wrapper_stim.VGA_BLANK_N de1_soc_wrapper_stim.dut.soc_inst.HADDR de1_soc_wrapper_stim.dut.soc_inst.HWRITE de1_soc_wrapper_stim.dut.soc_inst.HSEL_RAM de1_soc_wrapper_stim.dut.soc_inst.HSEL_SW de1_soc_wrapper_stim.dut.soc_inst.HSEL_DOUT de1_soc_wrapper_stim.dut.raz_inst.pixel de1_soc_wrapper_stim.dut.raz_inst.pixel_x de1_soc_wrapper_stim.dut.raz_inst.pixel_y de1_soc_wrapper_stim.dut.soc_inst.pix1.pixel de1_soc_wrapper_stim.dut.soc_inst.pix1.pixel_address de1_soc_wrapper_stim.dut.raz_inst.V_count de1_soc_wrapper_stim.dut.raz_inst.H_count
+probe -create -database memory de1_soc_wrapper_stim.dut.soc_inst.pix1.pixel_x de1_soc_wrapper_stim.dut.soc_inst.pix1.pixel_y
+
+simvision -input /home/ks6n19/Documents/project/.simvision/93894_ks6n19__autosave.tcl.svcf
diff --git a/.simvision/93894_ks6n19__autosave.tcl.svcf b/.simvision/93894_ks6n19__autosave.tcl.svcf
new file mode 100644
index 0000000000000000000000000000000000000000..d7313c6ff401af4f93681333b58646727435607d
--- /dev/null
+++ b/.simvision/93894_ks6n19__autosave.tcl.svcf
@@ -0,0 +1,61 @@
+
+#
+# Preferences
+#
+preferences set toolbar-CursorControl-MemViewer {
+  usual
+  position -row 0 -anchor e
+}
+preferences set toolbar-Standard-MemViewer {
+  usual
+  position -row 1
+}
+preferences set plugin-enable-svdatabrowser-new 1
+preferences set toolbar-sendToIndago-WaveWindow {
+  usual
+  position -pos 1
+}
+preferences set toolbar-Standard-Console {
+  usual
+  position -pos 1
+}
+preferences set toolbar-Search-Console {
+  usual
+  position -pos 2
+}
+preferences set plugin-enable-groupscope 0
+preferences set plugin-enable-interleaveandcompare 0
+preferences set plugin-enable-waveformfrequencyplot 0
+preferences set toolbar-Windows-MemViewer {
+  usual
+  position -row 1 -pos 1
+}
+preferences set toolbar-TimeSearch-MemViewer {
+  usual
+  position -row 2 -pos 0
+}
+preferences set whats-new-dont-show-at-startup 1
+preferences set toolbar-SimControl-MemViewer {
+  usual
+  position -row 3 -pos 0
+}
+
+#
+# Mnemonic Maps
+#
+mmap new -reuse -name {Boolean as Logic} -radix %b -contents {{%c=FALSE -edgepriority 1 -shape low}
+{%c=TRUE -edgepriority 1 -shape high}}
+mmap new -reuse -name {Example Map} -radix %x -contents {{%b=11???? -bgcolor orange -label REG:%x -linecolor yellow -shape bus}
+{%x=1F -bgcolor red -label ERROR -linecolor white -shape EVENT}
+{%x=2C -bgcolor red -label ERROR -linecolor white -shape EVENT}
+{%x=* -label %x -linecolor gray -shape bus}}
+
+#
+# Console windows
+#
+console set -windowname Console
+window geometry Console 730x250+0+431
+
+#
+# Layout selection
+#
diff --git a/INCA_libs/history b/INCA_libs/history
index eda1ae7f5c749d1bfed5246e9173e6664006b9f7..74c5f4219a4649e365b4b8fe604b17202abe8269 100644
--- a/INCA_libs/history
+++ b/INCA_libs/history
@@ -133,3 +133,41 @@ s128::(01Oct2020:11:08:00):( ncverilog -sv +gui +ncaccess+r -y behavioural +libe
 s129::(01Oct2020:11:24:23):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
 s130::(01Oct2020:11:42:27):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
 s131::(01Oct2020:13:28:33):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s132::(05Oct2020:10:59:39):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s133::(05Oct2020:11:04:30):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s134::(05Oct2020:11:28:52):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s135::(05Oct2020:12:09:05):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s136::(05Oct2020:12:12:25):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s137::(05Oct2020:12:41:52):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s138::(05Oct2020:12:45:42):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s139::(05Oct2020:12:55:28):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s140::(05Oct2020:12:59:13):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s141::(05Oct2020:15:11:19):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s142::(05Oct2020:16:08:38):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s143::(05Oct2020:16:20:43):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s144::(05Oct2020:16:22:32):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s145::(05Oct2020:16:39:46):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s146::(05Oct2020:16:40:26):( ncverilog -sv +gui +ncaccess+r +tcl+testbench/de0_wrapper.tcl -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv )
+s147::(05Oct2020:16:41:13):( ncverilog -sv +gui +ncaccess+r +tcl+testbench/de0_wrapper.tcl -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv )
+s148::(05Oct2020:16:47:56):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s  )
+s149::(05Oct2020:16:49:55):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s150::(05Oct2020:17:19:39):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s151::(05Oct2020:17:24:28):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s152::(05Oct2020:19:02:33):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s153::(05Oct2020:19:09:01):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s154::(06Oct2020:16:46:48):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s155::(06Oct2020:18:32:01):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s156::(06Oct2020:18:38:21):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s157::(06Oct2020:23:15:18):( ncverilog -sv +gui +ncaccess+r +tcl+testbench/de0_wrapper.tcl -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv )
+s158::(06Oct2020:23:16:00):( ncverilog -sv +gui +ncaccess+r +tcl+testbench/de0_wrapper.tcl -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv )
+s159::(06Oct2020:23:20:50):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s  )
+s160::(07Oct2020:10:28:23):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s161::(07Oct2020:11:47:49):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s162::(07Oct2020:11:51:24):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s163::(07Oct2020:11:56:42):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s164::(07Oct2020:14:43:17):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s165::(07Oct2020:14:44:59):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s166::(07Oct2020:16:45:59):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s167::(07Oct2020:16:51:56):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s168::(08Oct2020:15:46:51):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
+s169::(08Oct2020:16:21:39):( ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s )
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/.timestamp.ts b/INCA_libs/irun.lnx8664.15.20.nc/.timestamp.ts
index f406785d6c7464c0bca666d6cbcd25afcc5d8e47..009b8064a87c96f4252d8f3050f110ecab9d137b 100644
--- a/INCA_libs/irun.lnx8664.15.20.nc/.timestamp.ts
+++ b/INCA_libs/irun.lnx8664.15.20.nc/.timestamp.ts
@@ -3,10 +3,10 @@
 1581871483 /home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv
 1562613351 /home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv
 1601209925 /home/ks6n19/Documents/project/testbench/arm_soc_stim.sv
-1601549687 /home/ks6n19/Documents/project/behavioural/razzle.sv
+1601912985 /home/ks6n19/Documents/project/behavioural/razzle.sv
 1599064789 /home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv
 1599554396 /home/ks6n19/Documents/project/behavioural/ahb_ram.sv
 1599325330 /home/ks6n19/Documents/project/behavioural/ahb_out.sv
 1601464831 /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv
 1601464829 /home/ks6n19/Documents/project/behavioural/arm_soc.sv
-1601548928 /home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv
+1601912659 /home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/ncsim.args
index 87109c6716bc63f56282c94a738d899b3a707c31..713d24163252d6502ef1316dc41c53330e18d22a 100644
--- a/INCA_libs/irun.lnx8664.15.20.nc/ncsim.args
+++ b/INCA_libs/irun.lnx8664.15.20.nc/ncsim.args
@@ -12,7 +12,7 @@
 +EMGRLOG
 ncverilog.log
 -XLSTIME
-1601555313
+1602170499
 -XLKEEP
 -XLMODE
 ./INCA_libs/irun.lnx8664.15.20.nc
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/ncsim_restart.args b/INCA_libs/irun.lnx8664.15.20.nc/ncsim_restart.args
index 18a750a48a256a496a262dacadbb94525c4b18c7..03222e9cfcefc8025eb1c2f0a263dd6460067287 100644
--- a/INCA_libs/irun.lnx8664.15.20.nc/ncsim_restart.args
+++ b/INCA_libs/irun.lnx8664.15.20.nc/ncsim_restart.args
@@ -12,7 +12,7 @@
 +EMGRLOG
 ncverilog.log
 -XLSTIME
-1601555313
+1602170499
 -XLKEEP
 -XLMODE
 ./INCA_libs/irun.lnx8664.15.20.nc
@@ -26,4 +26,4 @@ ncverilog
 -XLVERSION
 "TOOL:	ncverilog	15.20-s058"
 -XLNAME
-./INCA_libs/irun.lnx8664.15.20.nc/srv02749_91868
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..dd9c77bb227f17bf9439b633f6849e9ffee1cdcf
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602085559
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_106723_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..24aaf7d6f83a020239f290c299c2f2a3b14b9b56
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601911243
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_10690_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..267a02f81715bed9963b15b62d6dedb67d540987
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602062903
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_114634_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..75d406b7c79c0fa8b40907a5f7a5be14ed4a2026
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602085916
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_119884_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..a66208090b5e83225057c28d4215ee23cd9482cd
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601912876
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_120070_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..c710753362d2c4cb635cab6733f14b53c44fe754
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601907078
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_122133_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..37e24a47c5de46e737231a6002e815e724f736f6
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601914779
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127184_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..5bca21e0445538febe6ba88c55d7d4d33820b02c
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601912995
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_127767_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..03222e9cfcefc8025eb1c2f0a263dd6460067287
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602170499
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_15047_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..bb566eed8ac584e3015a4cb913d9b85665eb9bbd
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601891979
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17498_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17656_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17656_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17656_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17656_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17656_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_17656_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..46e7b56f2b401174b501479f6dbb38ce2280f154
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601915068
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_19622_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..31a958d2f18a70f429e70b7c1052e8cb03ab84d4
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601999208
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_23793_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..7228178f735fde5d037195cd87ecf009531f7220
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602005521
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_25591_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..283d5fe58eb9c8355bc32b5cb03e5e2aa802dd79
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601898112
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_26029_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..98c56d5e7f502ebf75e360749a464075ed3ae4dd
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601896145
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29045_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..0bb84eb05389af91363684a4327a4f9cd6c62cb5
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601920953
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_29372_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_31302_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_31302_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_31302_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_31302_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_31302_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_31302_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..16856760dbf487bbfe3a87e6b9f58f5ee54a6696
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321/ncsim.args
@@ -0,0 +1,31 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++tcl+testbench/de0_wrapper.tcl
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-INPUT
+testbench/de0_wrapper.tcl
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602022560
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..972fc73a3ac5be9732d014b178f7579bb79cd477
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
++tcl+testbench/de0_wrapper.tcl
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_33321_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..39cc8cb908591b36a1ef525212159cfe41cc2881
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601892270
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_36462_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..3e70bd33af1ccc10d12c0cf0f243085e7f9522b1
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601898342
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_40800_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..4ad5225c5edcf489a26aa9433589e7ae13500c09
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601896345
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_41764_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..797eb5fd5c1336166b9df6203519f201edd60119
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602005901
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45658_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..9c9b2535ed9dad8019df2e72829274ea898c3fc9
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602022850
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_45898_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..e7bbd89dab68ffbbd4a44a7d36ff4a74d58f4b8f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601893732
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_5135_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..ab48da8885abaef914b29e5ac4b57c614555f72d
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601921341
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_54463_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..36db30617c1089a33e42ffb2b5bc776dfae346f5
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602168411
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_63821_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..ebba573978f90c07b01396f791cead4c78687aef
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602067669
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_71706_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..d80048a2d7fb416a95f557f97ca8b3f07111b7fa
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601898928
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_78022_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..523ea6aeabab089ca39e1645b62a13865312043a
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602067884
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_81109_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..59dfce5ff3569277a955c6a2791f41ddcbf31efb
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602078197
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_88052_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..05958954f79f5afa87e9eb86d4409c847bf46d85
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601910518
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91500_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..fc6b0fefae68b0415d3073973f026aea1f61e8e2
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602078299
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_91756_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..fe804697189de4ab0122d0da2601a3bb5c881e4a
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601899153
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93299_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..2cc8720dbe31c31d4800117604012f5e784f1fbc
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854/ncsim.args
@@ -0,0 +1,31 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++tcl+testbench/de0_wrapper.tcl
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-INPUT
+testbench/de0_wrapper.tcl
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1601912473
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..972fc73a3ac5be9732d014b178f7579bb79cd477
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
++tcl+testbench/de0_wrapper.tcl
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_93854_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710/ncsim.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710/ncsim.args
new file mode 100644
index 0000000000000000000000000000000000000000..85442c368d0f9d87d8b2043ef62e5610db92e027
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710/ncsim.args
@@ -0,0 +1,29 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
++gui
++ncaccess+r
++libext+.sv
++define+prog_file=software/code.hex
+-gui
+-TCL
+-MESSAGES
++EMGRLOG
+ncverilog.log
+-XLSTIME
+1602068202
+-XLKEEP
+-XLMODE
+./INCA_libs/irun.lnx8664.15.20.nc
+-RUNMODE
+-CDSLIB
+./INCA_libs/irun.lnx8664.15.20.nc/cds.lib
+-HDLVAR
+./INCA_libs/irun.lnx8664.15.20.nc/hdl.var
+-XLNAME
+ncverilog
+-XLVERSION
+"TOOL:	ncverilog	15.20-s058"
+-XLNAME
+./INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710/ncsim.env b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710/ncsim.env
new file mode 100644
index 0000000000000000000000000000000000000000..00709794bee3b220b9142189e0f86f88965b155b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710/ncsim.env
@@ -0,0 +1,9 @@
+#!/bin/csh
+#
+# File created by:  ncverilog
+# Do not modify this file
+#
+#<< :  <#3 ncverilog:./INCA_libs/irun.lnx8664.15.20.nc>#>
+setenv NCRUNMODE "ncverilog:./INCA_libs/irun.lnx8664.15.20.nc"
+#<< :  <#3 FALSE>#>
+setenv IRUNBATCH "FALSE"
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710/ncverilog.args b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710/ncverilog.args
new file mode 100644
index 0000000000000000000000000000000000000000..3b1f1f2c96b607e37f7e40ee8db28b42eae72277
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710/ncverilog.args
@@ -0,0 +1,13 @@
+//
+// File created by:  ncverilog
+// Do not modify this file
+//
+-sv
++gui
++ncaccess+r
+-y
+behavioural
++libext+.sv
++define+prog_file=software/code.hex
+testbench/de1_soc_wrapper_stim.sv
+-s
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710_cdsrun.lib b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710_cdsrun.lib
new file mode 100644
index 0000000000000000000000000000000000000000..ef1745b8d419df87767188f71f84640abfa61d2f
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710_cdsrun.lib
@@ -0,0 +1,2 @@
+SOFTINCLUDE /eda/cadence/incisiv/tools/inca/files/cds.lib
+define worklib ../worklib
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710_hdlrun.var b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710_hdlrun.var
new file mode 100644
index 0000000000000000000000000000000000000000..eb1315888c965da47ed3972aff584632e6e0541b
--- /dev/null
+++ b/INCA_libs/irun.lnx8664.15.20.nc/srv02749_94710_hdlrun.var
@@ -0,0 +1,89 @@
+DEFINE LANG_MAP (\
+	.v => verilog,\
+	.vp => verilog,\
+	.vs => verilog,\
+	.V => verilog,\
+	.VP => verilog,\
+	.VS => verilog,\
+	.v95 => verilog95,\
+	.v95p => verilog95,\
+	.V95 => verilog95,\
+	.V95P => verilog95,\
+	.vhd => vhdl,\
+	.vhdp => vhdl,\
+	.vhdl => vhdl,\
+	.vhdlp => vhdl,\
+	.VHDL => vhdl,\
+	.VHDLP => vhdl,\
+	.VHD => vhdl,\
+	.VHDP => vhdl,\
+	.e => e,\
+	.E => e,\
+	.elib => elib,\
+	.ELIB => elib,\
+	.viplib => elib,\
+	.VIPLIB => elib,\
+	.sv => systemverilog,\
+	.svp => systemverilog,\
+	.SV => systemverilog,\
+	.SVP => systemverilog,\
+	.svi => systemverilog,\
+	.svh => systemverilog,\
+	.vlib => systemverilog,\
+	.VLIB => systemverilog,\
+	.vams => verilog-ams,\
+	.VAMS => verilog-ams,\
+	.svams => sv-ams,\
+	.SVAMS => sv-ams,\
+	.svms => sv-ams,\
+	.SVMS => sv-ams,\
+	.vha => vhdl-ams,\
+	.VHA => vhdl-ams,\
+	.vhams => vhdl-ams,\
+	.VHAMS => vhdl-ams,\
+	.vhms => vhdl-ams,\
+	.VHMS => vhdl-ams,\
+	.scs => scs,\
+	.sp => scs,\
+	.s => assembly,\
+	.c => c,\
+	.o => o,\
+	.cpp => cpp,\
+	.cc => cpp,\
+	.a => a,\
+	.so => so,\
+	.sl => so,\
+	.pslvlog => psl_vlog,\
+	.pslvhdl => psl_vhdl,\
+	.pslsc => psl_sc,\
+	.vhcfg => vhcfg,\
+	.vhcfgp => vhcfg,\
+	.sv.gz => systemverilog,\
+	.sv.Z => systemverilog,\
+	DEF => verilog\
+)
+define VIEW_MAP ( $VIEW_MAP, * => verilog)
+define VIEW_MAP ( $VIEW_MAP \
+, .v => v \
+, .vp => vp \
+, .vs => vs \
+, .V => V \
+, .VP => VP \
+, .VS => VS \
+, .sv => sv \
+, .svp => svp \
+, .SV => SV \
+, .SVP => SVP \
+, .svi => svi \
+, .svh => svh \
+, .vlib => vlib \
+, .VLIB => VLIB \
+, .vams => vams \
+, .VAMS => VAMS \
+, .svams => svams \
+, .SVAMS => SVAMS \
+, .svms => svms \
+, .SVMS => SVMS \
+, .sv.gz => sv \
+, .sv.Z => sv \
+)
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/xllibs/behavioural/.inca.db.150.lnx8664 b/INCA_libs/irun.lnx8664.15.20.nc/xllibs/behavioural/.inca.db.150.lnx8664
index 29186e71cca97c4ffe94677f224a9567cae22afe..b0b223722f913bc0e152079643732565b2727a96 100644
Binary files a/INCA_libs/irun.lnx8664.15.20.nc/xllibs/behavioural/.inca.db.150.lnx8664 and b/INCA_libs/irun.lnx8664.15.20.nc/xllibs/behavioural/.inca.db.150.lnx8664 differ
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/xllibs/behavioural/inca.lnx8664.150.pak b/INCA_libs/irun.lnx8664.15.20.nc/xllibs/behavioural/inca.lnx8664.150.pak
index 9e402e2b9cfda0b046e4c221dc8328fe66a2969f..c1ea5d0622fb323754ee53ab840dd12ae47a43f9 100644
Binary files a/INCA_libs/irun.lnx8664.15.20.nc/xllibs/behavioural/inca.lnx8664.150.pak and b/INCA_libs/irun.lnx8664.15.20.nc/xllibs/behavioural/inca.lnx8664.150.pak differ
diff --git a/INCA_libs/irun.lnx8664.15.20.nc/ydir_files.ts b/INCA_libs/irun.lnx8664.15.20.nc/ydir_files.ts
index 24fcd51f292b924a1a5146083764b0537b21bd92..938b324f2417b02ca4474c1ab8924e30b0500618 100644
--- a/INCA_libs/irun.lnx8664.15.20.nc/ydir_files.ts
+++ b/INCA_libs/irun.lnx8664.15.20.nc/ydir_files.ts
@@ -1 +1 @@
-1601549687 behavioural
+1602168452 behavioural
diff --git a/INCA_libs/worklib/.inca.db.150.lnx8664 b/INCA_libs/worklib/.inca.db.150.lnx8664
index a8d3039f3ae1a671aa72338c8fb4973beaa4f97e..973b8742d7c90b8783a36499f125d43052537b45 100644
Binary files a/INCA_libs/worklib/.inca.db.150.lnx8664 and b/INCA_libs/worklib/.inca.db.150.lnx8664 differ
diff --git a/INCA_libs/worklib/inca.lnx8664.150.pak b/INCA_libs/worklib/inca.lnx8664.150.pak
index e43201e7317f9349bf501555ea1163e34e7a1f52..5b867d1cb259698566d3235361cb7c7cf6cdecc4 100644
Binary files a/INCA_libs/worklib/inca.lnx8664.150.pak and b/INCA_libs/worklib/inca.lnx8664.150.pak differ
diff --git a/behavioural/code.hex b/behavioural/code.hex
index f22bce13b5b0494caffae2472d5cc651a0a4ff5f..f087474b3a6ecb39dbfdea7b09c2e2a3bb585632 100644
--- a/behavioural/code.hex
+++ b/behavioural/code.hex
@@ -54,10 +54,10 @@
 @0034 601A2200
 @0035 4B049A01
 @0036 D3F6429A
-@0037 F886F000
+@0037 F8C8F000
 @0038 46C0E7FE
-@0039 0000022C
-@003A 0000022C
+@0039 00000390
+@003A 00000390
 @003B 46C0E7FE
 @003C 46C0E7FE
 @003D 46C0E7FE
@@ -96,45 +96,134 @@
 @005E 601A9A01
 @005F B00646C0
 @0060 46C04770
-@0061 00000228
-@0062 9001B082
-@0063 681A4B04
-@0064 009B9B01
-@0065 681B18D3
-@0066 B0020018
-@0067 46C04770
-@0068 00000224
-@0069 9001B084
-@006A 681B4B09
-@006B 681B3308
-@006C 9A039303
-@006D 411A9B01
-@006E 22010013
-@006F 93024013
-@0070 3B019B02
-@0071 4153425A
-@0072 0018B2DB
-@0073 4770B004
-@0074 00000224
-@0075 4B0446C0
-@0076 3308681B
-@0077 2B00681B
-@0078 46C0D0F9
-@0079 46C04770
-@007A 00000224
-@007B B083B500
-@007C 93012300
-@007D 2300E011
-@007E E0089300
-@007F 9B019900
-@0080 00182201
-@0081 FFA6F7FF
-@0082 33019B00
-@0083 9B009300
-@0084 DDF32B62
-@0085 33019B01
-@0086 9B019301
-@0087 DDEA2B62
-@0088 46C0E7E6
-@0089 40000000
-@008A 50000000
+@0061 0000038C
+@0062 9003B088
+@0063 92019102
+@0064 9A009300
+@0065 1AD39B09
+@0066 9A08990A
+@0067 435A1A8A
+@0068 9B019908
+@0069 980B1ACB
+@006A 1A419909
+@006B 18D3434B
+@006C 9A099307
+@006D 1AD39B02
+@006E 9A08990A
+@006F 435A1A8A
+@0070 9B089903
+@0071 980B1ACB
+@0072 1A419909
+@0073 18D3434B
+@0074 9A009306
+@0075 1AD39B09
+@0076 9A089903
+@0077 435A1A8A
+@0078 9B019908
+@0079 98021ACB
+@007A 1A419909
+@007B 18D3434B
+@007C 9A079305
+@007D 18D29B06
+@007E 429A9B05
+@007F 2301DD01
+@0080 2300E000
+@0081 B0080018
+@0082 46C04770
+@0083 9001B082
+@0084 681A4B04
+@0085 009B9B01
+@0086 681B18D3
+@0087 B0020018
+@0088 46C04770
+@0089 00000388
+@008A 9001B084
+@008B 681B4B09
+@008C 681B3308
+@008D 9A039303
+@008E 411A9B01
+@008F 22010013
+@0090 93024013
+@0091 3B019B02
+@0092 4153425A
+@0093 0018B2DB
+@0094 4770B004
+@0095 00000388
+@0096 4B0446C0
+@0097 3308681B
+@0098 2B00681B
+@0099 46C0D0F9
+@009A 46C04770
+@009B 00000388
+@009C B08FB500
+@009D 930B230A
+@009E 930A231E
+@009F 93092314
+@00A0 93082328
+@00A1 93072314
+@00A2 9306231E
+@00A3 930D2300
+@00A4 2300E072
+@00A5 E067930C
+@00A6 9B069A08
+@00A7 990D1AD3
+@00A8 1A8A9A07
+@00A9 9907435A
+@00AA 1ACB9B09
+@00AB 9906980C
+@00AC 434B1A41
+@00AD 930518D3
+@00AE 9B0A9A06
+@00AF 990D1AD3
+@00B0 1A8A9A07
+@00B1 990B435A
+@00B2 1ACB9B07
+@00B3 9906980C
+@00B4 434B1A41
+@00B5 930418D3
+@00B6 9B069A08
+@00B7 990B1AD3
+@00B8 1A8A9A07
+@00B9 9907435A
+@00BA 1ACB9B09
+@00BB 9906980A
+@00BC 434B1A41
+@00BD 930318D3
+@00BE 0FDB9B05
+@00BF 9B03B2DA
+@00C0 0FDB43DB
+@00C1 4053B2DB
+@00C2 9302B2DB
+@00C3 0FDB9B04
+@00C4 9B03B2DA
+@00C5 0FDB43DB
+@00C6 4053B2DB
+@00C7 9301B2DB
+@00C8 9B049A05
+@00C9 230118D2
+@00CA 9B031C19
+@00CB DC01429A
+@00CC 1C192300
+@00CD 9B03B2CA
+@00CE 0FDB43DB
+@00CF 4053B2DB
+@00D0 9300B2DB
+@00D1 2B009B02
+@00D2 9B01D00B
+@00D3 D0082B00
+@00D4 2B009B00
+@00D5 990CD005
+@00D6 22019B0D
+@00D7 F7FF0018
+@00D8 9B0CFEF9
+@00D9 930C3301
+@00DA 23E09A0C
+@00DB 429A33FF
+@00DC 9B0DDD92
+@00DD 930D3301
+@00DE 4A029B0D
+@00DF DD884293
+@00E0 46C0E778
+@00E1 0000027F
+@00E2 40000000
+@00E3 50000000
diff --git a/behavioural/new file b/behavioural/new file
new file mode 100644
index 0000000000000000000000000000000000000000..c15da53690895a994cbe3def855139c7af74a6b9
--- /dev/null
+++ b/behavioural/new file	
@@ -0,0 +1,7 @@
+module raster (	input logic CLOCK_50, 
+	input logic [3:0] KEY,
+	input logic  pixel,
+    	output logic [7:0] VGA_R,VGA_G,VGA_B, 
+	output logic [9:0] pixel_x,
+	output logic [8:0] pixel_y ,
+    	output logic VGA_HS,VGA_VS, VGA_CLK, VGA_BLANK_N);
diff --git a/behavioural/raster.sv b/behavioural/raster.sv
new file mode 100644
index 0000000000000000000000000000000000000000..dd99d0b7a71cceea428b2a077fb363e696164ab0
--- /dev/null
+++ b/behavioural/raster.sv
@@ -0,0 +1,6 @@
+module raster (	input logic CLOCK_50, 
+	input logic  pixel,
+    	output logic [7:0] VGA_R,VGA_G,VGA_B, 
+	output logic [9:0] pixel_x,
+	output logic [8:0] pixel_y ,
+    	output logic VGA_HS,VGA_VS, VGA_CLK, VGA_BLANK_N);
diff --git a/behavioural/razzle.sv b/behavioural/razzle.sv
index 05f2005e635c5435fc4648e86beb257d1180af40..a3391fca83e476dd6d8a26c0fbddcaa9e48f76c6 100644
--- a/behavioural/razzle.sv
+++ b/behavioural/razzle.sv
@@ -51,8 +51,8 @@ assign Blue =  Blue_Data && video_on;
 // video_on turns off pixel color data when not in the pixel view area 
 assign video_on = video_on_H && video_on_V; 
 
-assign pixel_x =(H_count <= 639)? H_count : '0 ;
-assign pixel_y = (V_count <= 479)? V_count : '0 ;
+assign pixel_x =video_on_H ? H_count : '0 ;
+assign pixel_y = video_on_V ? V_count : '0 ;
 
     
 // Generate Horizontal and Vertical Timing Signals for Video Signal 
diff --git a/db/.cmp.kpt b/db/.cmp.kpt
index 7c31a9ba575ff0ca7a365be950f459ee135e7061..b36b93f835b46f0385ad8d689d840811cee68d40 100644
Binary files a/db/.cmp.kpt and b/db/.cmp.kpt differ
diff --git a/db/de1_soc_wrapper.(0).cnf.hdb b/db/de1_soc_wrapper.(0).cnf.hdb
index 4e4eaeec20a6dbdb5b376ed2c755ca7a22ffed5b..b60436119126744d2147f90a6cd4a138db83719f 100644
Binary files a/db/de1_soc_wrapper.(0).cnf.hdb and b/db/de1_soc_wrapper.(0).cnf.hdb differ
diff --git a/db/de1_soc_wrapper.(1).cnf.hdb b/db/de1_soc_wrapper.(1).cnf.hdb
index a8949fb14f564f64b547be87b66d5c23b508fcb2..a6ebf26a4db347a6301e42eb8aa44aaeb451f733 100644
Binary files a/db/de1_soc_wrapper.(1).cnf.hdb and b/db/de1_soc_wrapper.(1).cnf.hdb differ
diff --git a/db/de1_soc_wrapper.(15).cnf.cdb b/db/de1_soc_wrapper.(15).cnf.cdb
index d36544ffa2599f67b9fa739d300ffe9cb2838ac1..3e2ea9a4b7ad139713334911b52b2c86210802fd 100644
Binary files a/db/de1_soc_wrapper.(15).cnf.cdb and b/db/de1_soc_wrapper.(15).cnf.cdb differ
diff --git a/db/de1_soc_wrapper.(15).cnf.hdb b/db/de1_soc_wrapper.(15).cnf.hdb
index 3ed0ef464b7572a35eae5eaf6a86482f4c81cbba..8ab472e78c78cf92c38deadf58cf304bb5dc2d79 100644
Binary files a/db/de1_soc_wrapper.(15).cnf.hdb and b/db/de1_soc_wrapper.(15).cnf.hdb differ
diff --git a/db/de1_soc_wrapper.(21).cnf.cdb b/db/de1_soc_wrapper.(21).cnf.cdb
index 8582d36536700370b8435aa6d23994fcd72610d4..795f2d3e5bd937b8218d0c9d370ab519e9ed2bda 100644
Binary files a/db/de1_soc_wrapper.(21).cnf.cdb and b/db/de1_soc_wrapper.(21).cnf.cdb differ
diff --git a/db/de1_soc_wrapper.(21).cnf.hdb b/db/de1_soc_wrapper.(21).cnf.hdb
index 815d8f116f06858af816195785b5de5d43d77d13..bda10447b4b19dbd2f697dbed8d5605649332cd0 100644
Binary files a/db/de1_soc_wrapper.(21).cnf.hdb and b/db/de1_soc_wrapper.(21).cnf.hdb differ
diff --git a/db/de1_soc_wrapper.(22).cnf.cdb b/db/de1_soc_wrapper.(22).cnf.cdb
new file mode 100644
index 0000000000000000000000000000000000000000..56d5c349bf4d79ed3544e586e49a568723a6a5f2
Binary files /dev/null and b/db/de1_soc_wrapper.(22).cnf.cdb differ
diff --git a/db/de1_soc_wrapper.(22).cnf.hdb b/db/de1_soc_wrapper.(22).cnf.hdb
new file mode 100644
index 0000000000000000000000000000000000000000..7f00720ec992d62807e57a28e78a688e0a7f41ed
Binary files /dev/null and b/db/de1_soc_wrapper.(22).cnf.hdb differ
diff --git a/db/de1_soc_wrapper.(5).cnf.cdb b/db/de1_soc_wrapper.(5).cnf.cdb
index b23d05071c6edee4391643bf1fc11728fa439253..edf98d6449f5e2ce0ee25afe6b1e30f99670834a 100644
Binary files a/db/de1_soc_wrapper.(5).cnf.cdb and b/db/de1_soc_wrapper.(5).cnf.cdb differ
diff --git a/db/de1_soc_wrapper.(5).cnf.hdb b/db/de1_soc_wrapper.(5).cnf.hdb
index cfc5fadf87f9cb62fe839a1c8c893bc083e41485..8d529cc0ed90aa37ccc3169bf8f1642abcb3a94b 100644
Binary files a/db/de1_soc_wrapper.(5).cnf.hdb and b/db/de1_soc_wrapper.(5).cnf.hdb differ
diff --git a/db/de1_soc_wrapper.asm.qmsg b/db/de1_soc_wrapper.asm.qmsg
index 01a0451daf4376cf6c6bdf46f97d2e84482ad73b..4ffa2d39566266496f85108df40d0efe05026075 100644
--- a/db/de1_soc_wrapper.asm.qmsg
+++ b/db/de1_soc_wrapper.asm.qmsg
@@ -1,6 +1,6 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1601555759488 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1601555759490 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  1 13:35:59 2020 " "Processing started: Thu Oct  1 13:35:59 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1601555759490 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1601555759490 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1601555759490 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1601555760621 ""}
-{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1601555767752 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1  Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1117 " "Peak virtual memory: 1117 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1601555768370 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  1 13:36:08 2020 " "Processing ended: Thu Oct  1 13:36:08 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1601555768370 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1601555768370 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:08 " "Total CPU time (on all processors): 00:00:08" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1601555768370 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1601555768370 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1602171976480 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1602171976482 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  8 16:46:16 2020 " "Processing started: Thu Oct  8 16:46:16 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1602171976482 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1602171976482 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1602171976482 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1602171977682 ""}
+{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1602171985015 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1  Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1114 " "Peak virtual memory: 1114 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1602171985660 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  8 16:46:25 2020 " "Processing ended: Thu Oct  8 16:46:25 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1602171985660 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1602171985660 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:09 " "Total CPU time (on all processors): 00:00:09" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1602171985660 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1602171985660 ""}
diff --git a/db/de1_soc_wrapper.asm.rdb b/db/de1_soc_wrapper.asm.rdb
index 1fcfe64cdadcd27e75d875b9e69d4da55cfb1905..5f3bfb4dfc4bd6b522f6aefd59c5b02db54c683b 100644
Binary files a/db/de1_soc_wrapper.asm.rdb and b/db/de1_soc_wrapper.asm.rdb differ
diff --git a/db/de1_soc_wrapper.cmp.bpm b/db/de1_soc_wrapper.cmp.bpm
index 90b9f62dedc97587d00ec11ead33b8b234401bde..77971809cf5f116964b5d0769416589fc8aec189 100644
Binary files a/db/de1_soc_wrapper.cmp.bpm and b/db/de1_soc_wrapper.cmp.bpm differ
diff --git a/db/de1_soc_wrapper.cmp.cdb b/db/de1_soc_wrapper.cmp.cdb
index d1a0415df1a6a487821a64cb5b04761da32a4cb1..37b02e7b9336b0f7abe77aa5f14dc90ca3a076df 100644
Binary files a/db/de1_soc_wrapper.cmp.cdb and b/db/de1_soc_wrapper.cmp.cdb differ
diff --git a/db/de1_soc_wrapper.cmp.hdb b/db/de1_soc_wrapper.cmp.hdb
index da61edf3c14b428f03a600cd14b3e34478c28ac0..6d9620311f849701a01df4aed341ae07a11574c9 100644
Binary files a/db/de1_soc_wrapper.cmp.hdb and b/db/de1_soc_wrapper.cmp.hdb differ
diff --git a/db/de1_soc_wrapper.cmp.idb b/db/de1_soc_wrapper.cmp.idb
index df676a41e5453d2d9c97d7e6227e6573456eddb3..598ef1688cb839fc2a439174f9853bb8f2dc0a63 100644
Binary files a/db/de1_soc_wrapper.cmp.idb and b/db/de1_soc_wrapper.cmp.idb differ
diff --git a/db/de1_soc_wrapper.cmp.rdb b/db/de1_soc_wrapper.cmp.rdb
index 7299eeb26a30770c1b2abe4f91abd99372c709f9..e317268601f18b64445458c408d8579334a691ab 100644
Binary files a/db/de1_soc_wrapper.cmp.rdb and b/db/de1_soc_wrapper.cmp.rdb differ
diff --git a/db/de1_soc_wrapper.eda.qmsg b/db/de1_soc_wrapper.eda.qmsg
index 63ec4330b915dbacb2dd19893de532106c4f36a8..55b4cdbe01ed337cfdd5cb618d38b344f204ef1b 100644
--- a/db/de1_soc_wrapper.eda.qmsg
+++ b/db/de1_soc_wrapper.eda.qmsg
@@ -1,7 +1,7 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1601555781715 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1601555781717 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  1 13:36:21 2020 " "Processing started: Thu Oct  1 13:36:21 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1601555781717 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1601555781717 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1601555781717 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "EDA Netlist Writer" 0 -1 1601555782834 ""}
-{ "Warning" "WQNETO_SWITCH_TO_FUNCTIONAL_SIMULATION" "" "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." {  } {  } 0 10905 "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." 0 0 "EDA Netlist Writer" 0 -1 1601555782934 ""}
-{ "Info" "IWSC_DONE_HDL_GENERATION" "de1_soc_wrapper.vo /home/ks6n19/Documents/project/simulation/modelsim/ simulation " "Generated file de1_soc_wrapper.vo in folder \"/home/ks6n19/Documents/project/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1601555784031 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 2 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1314 " "Peak virtual memory: 1314 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1601555784200 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  1 13:36:24 2020 " "Processing ended: Thu Oct  1 13:36:24 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1601555784200 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1601555784200 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1601555784200 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1601555784200 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1602171999402 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1602171999405 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  8 16:46:39 2020 " "Processing started: Thu Oct  8 16:46:39 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1602171999405 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1602171999405 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1602171999405 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "EDA Netlist Writer" 0 -1 1602172000474 ""}
+{ "Warning" "WQNETO_SWITCH_TO_FUNCTIONAL_SIMULATION" "" "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." {  } {  } 0 10905 "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." 0 0 "EDA Netlist Writer" 0 -1 1602172000576 ""}
+{ "Info" "IWSC_DONE_HDL_GENERATION" "de1_soc_wrapper.vo /home/ks6n19/Documents/project/simulation/modelsim/ simulation " "Generated file de1_soc_wrapper.vo in folder \"/home/ks6n19/Documents/project/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1602172001671 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 2 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1317 " "Peak virtual memory: 1317 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1602172001853 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  8 16:46:41 2020 " "Processing ended: Thu Oct  8 16:46:41 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1602172001853 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1602172001853 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1602172001853 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1602172001853 ""}
diff --git a/db/de1_soc_wrapper.fit.qmsg b/db/de1_soc_wrapper.fit.qmsg
index 3d55430d1ecf67b2f0de597fc07b351687a753ac..e6a5c29c4d8a06fb4e037e8a06c06c7951d1e869 100644
--- a/db/de1_soc_wrapper.fit.qmsg
+++ b/db/de1_soc_wrapper.fit.qmsg
@@ -1,46 +1,46 @@
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Fitter" 0 -1 1601555636934 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1601555636936 ""}
-{ "Info" "IMPP_MPP_USER_DEVICE" "de1_soc_wrapper 5CSEMA5F31C6 " "Selected device 5CSEMA5F31C6 for design \"de1_soc_wrapper\"" {  } {  } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1601555636982 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1601555637023 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1601555637023 ""}
-{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1601555637533 ""}
-{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" {  } {  } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1601555637730 ""}
-{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1601555637792 ""}
-{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" {  } {  } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1601555650804 ""}
-{ "Info" "ICCLK_CLOCKS_TOP" "1  (1 global) " "Promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "CLOCK_50~inputCLKENA0 1020 global CLKCTRL_G6 " "CLOCK_50~inputCLKENA0 with 1020 fanout uses global clock CLKCTRL_G6" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1601555651040 ""}  } {  } 0 11178 "Promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1601555651040 ""}
-{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "1  (1 global) " "Automatically promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "KEY\[2\]~inputCLKENA0 942 global CLKCTRL_G4 " "KEY\[2\]~inputCLKENA0 with 942 fanout uses global clock CLKCTRL_G4" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1601555651040 ""}  } {  } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1601555651040 ""}
-{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" {  } {  } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601555651041 ""}
-{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" {  } {  } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1601555651071 ""}
-{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" {  } {  } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1601555651076 ""}
-{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" {  } {  } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1601555651084 ""}
-{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" {  } {  } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1601555651092 ""}
-{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" {  } {  } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1601555651092 ""}
-{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" {  } {  } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1601555651096 ""}
-{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1601555652346 ""}
-{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" {  } {  } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1601555652347 ""}
-{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1601555652401 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1601555652402 ""}
-{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." {  } {  } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1601555652403 ""}
-{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" {  } {  } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1601555652688 ""}
-{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" {  } {  } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1601555652693 ""}  } {  } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1601555652693 ""}
-{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_CS_N " "Node \"ADC_CS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_CS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_DIN " "Node \"ADC_DIN\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_DIN" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_DOUT " "Node \"ADC_DOUT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_DOUT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_SCLK " "Node \"ADC_SCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_SCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_ADCDAT " "Node \"AUD_ADCDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_ADCDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_ADCLRCK " "Node \"AUD_ADCLRCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_ADCLRCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_BCLK " "Node \"AUD_BCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_BCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_DACDAT " "Node \"AUD_DACDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_DACDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_DACLRCK " "Node \"AUD_DACLRCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_DACLRCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_XCK " "Node \"AUD_XCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_XCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK2_50 " "Node \"CLOCK2_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK2_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK3_50 " "Node \"CLOCK3_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK3_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK4_50 " "Node \"CLOCK4_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK4_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[0\] " "Node \"DRAM_ADDR\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[10\] " "Node \"DRAM_ADDR\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[11\] " "Node \"DRAM_ADDR\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[12\] " "Node \"DRAM_ADDR\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[1\] " "Node \"DRAM_ADDR\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[2\] " "Node \"DRAM_ADDR\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[3\] " "Node \"DRAM_ADDR\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[4\] " "Node \"DRAM_ADDR\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[5\] " "Node \"DRAM_ADDR\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[6\] " "Node \"DRAM_ADDR\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[7\] " "Node \"DRAM_ADDR\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[8\] " "Node \"DRAM_ADDR\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[9\] " "Node \"DRAM_ADDR\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_BA\[0\] " "Node \"DRAM_BA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_BA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_BA\[1\] " "Node \"DRAM_BA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_BA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CAS_N " "Node \"DRAM_CAS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CAS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CKE " "Node \"DRAM_CKE\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CKE" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CLK " "Node \"DRAM_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CS_N " "Node \"DRAM_CS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[0\] " "Node \"DRAM_DQ\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[10\] " "Node \"DRAM_DQ\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[11\] " "Node \"DRAM_DQ\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[12\] " "Node \"DRAM_DQ\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[13\] " "Node \"DRAM_DQ\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[14\] " "Node \"DRAM_DQ\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[15\] " "Node \"DRAM_DQ\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[1\] " "Node \"DRAM_DQ\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[2\] " "Node \"DRAM_DQ\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[3\] " "Node \"DRAM_DQ\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[4\] " "Node \"DRAM_DQ\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[5\] " "Node \"DRAM_DQ\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[6\] " "Node \"DRAM_DQ\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[7\] " "Node \"DRAM_DQ\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[8\] " "Node \"DRAM_DQ\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[9\] " "Node \"DRAM_DQ\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_LDQM " "Node \"DRAM_LDQM\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_LDQM" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_RAS_N " "Node \"DRAM_RAS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_RAS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_UDQM " "Node \"DRAM_UDQM\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_UDQM" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_WE_N " "Node \"DRAM_WE_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_WE_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FAN_CTRL " "Node \"FAN_CTRL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FAN_CTRL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FPGA_I2C_SCLK " "Node \"FPGA_I2C_SCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FPGA_I2C_SCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FPGA_I2C_SDAT " "Node \"FPGA_I2C_SDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FPGA_I2C_SDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[0\] " "Node \"GPIO_0\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[10\] " "Node \"GPIO_0\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[11\] " "Node \"GPIO_0\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[12\] " "Node \"GPIO_0\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[13\] " "Node \"GPIO_0\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[14\] " "Node \"GPIO_0\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[15\] " "Node \"GPIO_0\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[16\] " "Node \"GPIO_0\[16\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[16\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[17\] " "Node \"GPIO_0\[17\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[17\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[18\] " "Node \"GPIO_0\[18\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[18\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[19\] " "Node \"GPIO_0\[19\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[19\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[1\] " "Node \"GPIO_0\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[20\] " "Node \"GPIO_0\[20\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[20\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[21\] " "Node \"GPIO_0\[21\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[21\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[22\] " "Node \"GPIO_0\[22\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[22\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[23\] " "Node \"GPIO_0\[23\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[23\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[24\] " "Node \"GPIO_0\[24\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[24\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[25\] " "Node \"GPIO_0\[25\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[25\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[26\] " "Node \"GPIO_0\[26\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[26\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[27\] " "Node \"GPIO_0\[27\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[27\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[28\] " "Node \"GPIO_0\[28\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[28\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[29\] " "Node \"GPIO_0\[29\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[29\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[2\] " "Node \"GPIO_0\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[30\] " "Node \"GPIO_0\[30\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[30\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[31\] " "Node \"GPIO_0\[31\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[31\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[32\] " "Node \"GPIO_0\[32\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[32\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[33\] " "Node \"GPIO_0\[33\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[33\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[34\] " "Node \"GPIO_0\[34\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[34\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[35\] " "Node \"GPIO_0\[35\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[35\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[3\] " "Node \"GPIO_0\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[4\] " "Node \"GPIO_0\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[5\] " "Node \"GPIO_0\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[6\] " "Node \"GPIO_0\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[7\] " "Node \"GPIO_0\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[8\] " "Node \"GPIO_0\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[9\] " "Node \"GPIO_0\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[0\] " "Node \"GPIO_1\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[10\] " "Node \"GPIO_1\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[11\] " "Node \"GPIO_1\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[12\] " "Node \"GPIO_1\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[13\] " "Node \"GPIO_1\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[14\] " "Node \"GPIO_1\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[15\] " "Node \"GPIO_1\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[16\] " "Node \"GPIO_1\[16\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[16\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[17\] " "Node \"GPIO_1\[17\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[17\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[18\] " "Node \"GPIO_1\[18\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[18\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[19\] " "Node \"GPIO_1\[19\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[19\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[1\] " "Node \"GPIO_1\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[20\] " "Node \"GPIO_1\[20\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[20\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[21\] " "Node \"GPIO_1\[21\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[21\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[22\] " "Node \"GPIO_1\[22\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[22\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[23\] " "Node \"GPIO_1\[23\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[23\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[24\] " "Node \"GPIO_1\[24\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[24\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[25\] " "Node \"GPIO_1\[25\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[25\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[26\] " "Node \"GPIO_1\[26\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[26\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[27\] " "Node \"GPIO_1\[27\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[27\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[28\] " "Node \"GPIO_1\[28\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[28\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[29\] " "Node \"GPIO_1\[29\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[29\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[2\] " "Node \"GPIO_1\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[30\] " "Node \"GPIO_1\[30\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[30\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[31\] " "Node \"GPIO_1\[31\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[31\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[32\] " "Node \"GPIO_1\[32\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[32\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[33\] " "Node \"GPIO_1\[33\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[33\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[34\] " "Node \"GPIO_1\[34\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[34\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[35\] " "Node \"GPIO_1\[35\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[35\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[3\] " "Node \"GPIO_1\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[4\] " "Node \"GPIO_1\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[5\] " "Node \"GPIO_1\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[6\] " "Node \"GPIO_1\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[7\] " "Node \"GPIO_1\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[8\] " "Node \"GPIO_1\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[9\] " "Node \"GPIO_1\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[0\] " "Node \"HEX4\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[1\] " "Node \"HEX4\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[2\] " "Node \"HEX4\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[3\] " "Node \"HEX4\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[4\] " "Node \"HEX4\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[5\] " "Node \"HEX4\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[6\] " "Node \"HEX4\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[0\] " "Node \"HEX5\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[1\] " "Node \"HEX5\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[2\] " "Node \"HEX5\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[3\] " "Node \"HEX5\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[4\] " "Node \"HEX5\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[5\] " "Node \"HEX5\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[6\] " "Node \"HEX5\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "IRDA_RXD " "Node \"IRDA_RXD\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "IRDA_RXD" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "IRDA_TXD " "Node \"IRDA_TXD\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "IRDA_TXD" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_CLK " "Node \"PS2_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_CLK2 " "Node \"PS2_CLK2\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_CLK2" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_DAT " "Node \"PS2_DAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_DAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_DAT2 " "Node \"PS2_DAT2\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_DAT2" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_CLK27 " "Node \"TD_CLK27\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_CLK27" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[0\] " "Node \"TD_DATA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[1\] " "Node \"TD_DATA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[2\] " "Node \"TD_DATA\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[3\] " "Node \"TD_DATA\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[4\] " "Node \"TD_DATA\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[5\] " "Node \"TD_DATA\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[6\] " "Node \"TD_DATA\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[7\] " "Node \"TD_DATA\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_HS " "Node \"TD_HS\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_HS" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_RESET_N " "Node \"TD_RESET_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_RESET_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_VS " "Node \"TD_VS\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_VS" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_CLK " "Node \"USB_B2_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[0\] " "Node \"USB_B2_DATA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[1\] " "Node \"USB_B2_DATA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[2\] " "Node \"USB_B2_DATA\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[3\] " "Node \"USB_B2_DATA\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[4\] " "Node \"USB_B2_DATA\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[5\] " "Node \"USB_B2_DATA\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[6\] " "Node \"USB_B2_DATA\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[7\] " "Node \"USB_B2_DATA\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_EMPTY " "Node \"USB_EMPTY\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_EMPTY" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_FULL " "Node \"USB_FULL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_FULL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_OE_N " "Node \"USB_OE_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_OE_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_RD_N " "Node \"USB_RD_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_RD_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_RESET_N " "Node \"USB_RESET_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_RESET_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_SCL " "Node \"USB_SCL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_SCL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_SDA " "Node \"USB_SDA\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_SDA" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_WR_N " "Node \"USB_WR_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_WR_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "VGA_SYNC_N " "Node \"VGA_SYNC_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "VGA_SYNC_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601555652870 ""}  } {  } 0 15705 "Ignored locations or region assignments to the following nodes" 0 0 "Fitter" 0 -1 1601555652870 ""}
-{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:15 " "Fitter preparation operations ending: elapsed time is 00:00:15" {  } {  } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601555652876 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" {  } {  } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1601555658232 ""}
-{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." {  } {  } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1601555659018 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:15 " "Fitter placement preparation operations ending: elapsed time is 00:00:15" {  } {  } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601555672970 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" {  } {  } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1601555690616 ""}
-{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" {  } {  } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1601555699736 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:09 " "Fitter placement operations ending: elapsed time is 00:00:09" {  } {  } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601555699736 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" {  } {  } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1601555701705 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Router estimated average interconnect usage is 2% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "27 X33_Y11 X44_Y22 " "Router estimated peak interconnect usage is 27% of the available device resources in the region that extends from location X33_Y11 to location X44_Y22" {  } { { "loc" "" { Generic "/home/ks6n19/Documents/project/" { { 1 { 0 "Router estimated peak interconnect usage is 27% of the available device resources in the region that extends from location X33_Y11 to location X44_Y22"} { { 12 { 0 ""} 33 11 12 12 }  }  }  }  } }  } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1601555709985 ""}  } {  } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1601555709985 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" {  } {  } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1601555737077 ""}  } {  } 0 170199 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1601555737077 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:32 " "Fitter routing operations ending: elapsed time is 00:00:32" {  } {  } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601555737080 ""}
-{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 5.85 " "Total time spent on timing analysis during the Fitter is 5.85 seconds." {  } {  } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1601555744841 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1601555744946 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1601555746140 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1601555746144 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1601555747282 ""}
-{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:10 " "Fitter post-fit operations ending: elapsed time is 00:00:10" {  } {  } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601555754946 ""}
-{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." {  } {  } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1601555755215 ""}
-{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1601555755550 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 182 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 182 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "2653 " "Peak virtual memory: 2653 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1601555757305 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  1 13:35:57 2020 " "Processing ended: Thu Oct  1 13:35:57 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1601555757305 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:02:02 " "Elapsed time: 00:02:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1601555757305 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:11:26 " "Total CPU time (on all processors): 00:11:26" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1601555757305 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1601555757305 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Fitter" 0 -1 1602171847705 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1602171847707 ""}
+{ "Info" "IMPP_MPP_USER_DEVICE" "de1_soc_wrapper 5CSEMA5F31C6 " "Selected device 5CSEMA5F31C6 for design \"de1_soc_wrapper\"" {  } {  } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1602171847754 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1602171847818 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1602171847818 ""}
+{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1602171848337 ""}
+{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" {  } {  } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1602171848549 ""}
+{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1602171848637 ""}
+{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" {  } {  } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1602171862147 ""}
+{ "Info" "ICCLK_CLOCKS_TOP" "1  (1 global) " "Promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "CLOCK_50~inputCLKENA0 1020 global CLKCTRL_G6 " "CLOCK_50~inputCLKENA0 with 1020 fanout uses global clock CLKCTRL_G6" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1602171862390 ""}  } {  } 0 11178 "Promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1602171862390 ""}
+{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "1  (1 global) " "Automatically promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "KEY\[2\]~inputCLKENA0 942 global CLKCTRL_G4 " "KEY\[2\]~inputCLKENA0 with 942 fanout uses global clock CLKCTRL_G4" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1602171862391 ""}  } {  } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1602171862391 ""}
+{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" {  } {  } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602171862391 ""}
+{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" {  } {  } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1602171862421 ""}
+{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" {  } {  } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1602171862426 ""}
+{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" {  } {  } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1602171862434 ""}
+{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" {  } {  } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1602171862444 ""}
+{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" {  } {  } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1602171862444 ""}
+{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" {  } {  } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1602171862448 ""}
+{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1602171863702 ""}
+{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" {  } {  } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1602171863702 ""}
+{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1602171863755 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1602171863756 ""}
+{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." {  } {  } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1602171863757 ""}
+{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" {  } {  } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1602171864034 ""}
+{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" {  } {  } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1602171864039 ""}  } {  } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1602171864039 ""}
+{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_CS_N " "Node \"ADC_CS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_CS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_DIN " "Node \"ADC_DIN\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_DIN" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_DOUT " "Node \"ADC_DOUT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_DOUT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_SCLK " "Node \"ADC_SCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_SCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_ADCDAT " "Node \"AUD_ADCDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_ADCDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_ADCLRCK " "Node \"AUD_ADCLRCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_ADCLRCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_BCLK " "Node \"AUD_BCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_BCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_DACDAT " "Node \"AUD_DACDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_DACDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_DACLRCK " "Node \"AUD_DACLRCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_DACLRCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_XCK " "Node \"AUD_XCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_XCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK2_50 " "Node \"CLOCK2_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK2_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK3_50 " "Node \"CLOCK3_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK3_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK4_50 " "Node \"CLOCK4_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK4_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[0\] " "Node \"DRAM_ADDR\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[10\] " "Node \"DRAM_ADDR\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[11\] " "Node \"DRAM_ADDR\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[12\] " "Node \"DRAM_ADDR\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[1\] " "Node \"DRAM_ADDR\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[2\] " "Node \"DRAM_ADDR\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[3\] " "Node \"DRAM_ADDR\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[4\] " "Node \"DRAM_ADDR\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[5\] " "Node \"DRAM_ADDR\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[6\] " "Node \"DRAM_ADDR\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[7\] " "Node \"DRAM_ADDR\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[8\] " "Node \"DRAM_ADDR\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[9\] " "Node \"DRAM_ADDR\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_BA\[0\] " "Node \"DRAM_BA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_BA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_BA\[1\] " "Node \"DRAM_BA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_BA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CAS_N " "Node \"DRAM_CAS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CAS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CKE " "Node \"DRAM_CKE\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CKE" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CLK " "Node \"DRAM_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CS_N " "Node \"DRAM_CS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[0\] " "Node \"DRAM_DQ\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[10\] " "Node \"DRAM_DQ\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[11\] " "Node \"DRAM_DQ\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[12\] " "Node \"DRAM_DQ\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[13\] " "Node \"DRAM_DQ\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[14\] " "Node \"DRAM_DQ\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[15\] " "Node \"DRAM_DQ\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[1\] " "Node \"DRAM_DQ\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[2\] " "Node \"DRAM_DQ\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[3\] " "Node \"DRAM_DQ\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[4\] " "Node \"DRAM_DQ\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[5\] " "Node \"DRAM_DQ\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[6\] " "Node \"DRAM_DQ\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[7\] " "Node \"DRAM_DQ\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[8\] " "Node \"DRAM_DQ\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[9\] " "Node \"DRAM_DQ\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_LDQM " "Node \"DRAM_LDQM\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_LDQM" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_RAS_N " "Node \"DRAM_RAS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_RAS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_UDQM " "Node \"DRAM_UDQM\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_UDQM" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_WE_N " "Node \"DRAM_WE_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_WE_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FAN_CTRL " "Node \"FAN_CTRL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FAN_CTRL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FPGA_I2C_SCLK " "Node \"FPGA_I2C_SCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FPGA_I2C_SCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FPGA_I2C_SDAT " "Node \"FPGA_I2C_SDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FPGA_I2C_SDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[0\] " "Node \"GPIO_0\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[10\] " "Node \"GPIO_0\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[11\] " "Node \"GPIO_0\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[12\] " "Node \"GPIO_0\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[13\] " "Node \"GPIO_0\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[14\] " "Node \"GPIO_0\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[15\] " "Node \"GPIO_0\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[16\] " "Node \"GPIO_0\[16\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[16\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[17\] " "Node \"GPIO_0\[17\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[17\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[18\] " "Node \"GPIO_0\[18\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[18\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[19\] " "Node \"GPIO_0\[19\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[19\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[1\] " "Node \"GPIO_0\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[20\] " "Node \"GPIO_0\[20\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[20\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[21\] " "Node \"GPIO_0\[21\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[21\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[22\] " "Node \"GPIO_0\[22\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[22\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[23\] " "Node \"GPIO_0\[23\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[23\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[24\] " "Node \"GPIO_0\[24\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[24\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[25\] " "Node \"GPIO_0\[25\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[25\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[26\] " "Node \"GPIO_0\[26\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[26\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[27\] " "Node \"GPIO_0\[27\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[27\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[28\] " "Node \"GPIO_0\[28\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[28\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[29\] " "Node \"GPIO_0\[29\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[29\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[2\] " "Node \"GPIO_0\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[30\] " "Node \"GPIO_0\[30\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[30\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[31\] " "Node \"GPIO_0\[31\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[31\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[32\] " "Node \"GPIO_0\[32\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[32\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[33\] " "Node \"GPIO_0\[33\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[33\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[34\] " "Node \"GPIO_0\[34\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[34\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[35\] " "Node \"GPIO_0\[35\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[35\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[3\] " "Node \"GPIO_0\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[4\] " "Node \"GPIO_0\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[5\] " "Node \"GPIO_0\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[6\] " "Node \"GPIO_0\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[7\] " "Node \"GPIO_0\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[8\] " "Node \"GPIO_0\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[9\] " "Node \"GPIO_0\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[0\] " "Node \"GPIO_1\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[10\] " "Node \"GPIO_1\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[11\] " "Node \"GPIO_1\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[12\] " "Node \"GPIO_1\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[13\] " "Node \"GPIO_1\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[14\] " "Node \"GPIO_1\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[15\] " "Node \"GPIO_1\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[16\] " "Node \"GPIO_1\[16\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[16\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[17\] " "Node \"GPIO_1\[17\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[17\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[18\] " "Node \"GPIO_1\[18\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[18\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[19\] " "Node \"GPIO_1\[19\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[19\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[1\] " "Node \"GPIO_1\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[20\] " "Node \"GPIO_1\[20\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[20\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[21\] " "Node \"GPIO_1\[21\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[21\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[22\] " "Node \"GPIO_1\[22\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[22\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[23\] " "Node \"GPIO_1\[23\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[23\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[24\] " "Node \"GPIO_1\[24\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[24\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[25\] " "Node \"GPIO_1\[25\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[25\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[26\] " "Node \"GPIO_1\[26\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[26\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[27\] " "Node \"GPIO_1\[27\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[27\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[28\] " "Node \"GPIO_1\[28\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[28\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[29\] " "Node \"GPIO_1\[29\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[29\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[2\] " "Node \"GPIO_1\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[30\] " "Node \"GPIO_1\[30\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[30\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[31\] " "Node \"GPIO_1\[31\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[31\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[32\] " "Node \"GPIO_1\[32\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[32\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[33\] " "Node \"GPIO_1\[33\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[33\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[34\] " "Node \"GPIO_1\[34\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[34\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[35\] " "Node \"GPIO_1\[35\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[35\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[3\] " "Node \"GPIO_1\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[4\] " "Node \"GPIO_1\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[5\] " "Node \"GPIO_1\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[6\] " "Node \"GPIO_1\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[7\] " "Node \"GPIO_1\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[8\] " "Node \"GPIO_1\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[9\] " "Node \"GPIO_1\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[0\] " "Node \"HEX4\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[1\] " "Node \"HEX4\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[2\] " "Node \"HEX4\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[3\] " "Node \"HEX4\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[4\] " "Node \"HEX4\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[5\] " "Node \"HEX4\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[6\] " "Node \"HEX4\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[0\] " "Node \"HEX5\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[1\] " "Node \"HEX5\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[2\] " "Node \"HEX5\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[3\] " "Node \"HEX5\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[4\] " "Node \"HEX5\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[5\] " "Node \"HEX5\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[6\] " "Node \"HEX5\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "IRDA_RXD " "Node \"IRDA_RXD\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "IRDA_RXD" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "IRDA_TXD " "Node \"IRDA_TXD\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "IRDA_TXD" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_CLK " "Node \"PS2_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_CLK2 " "Node \"PS2_CLK2\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_CLK2" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_DAT " "Node \"PS2_DAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_DAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_DAT2 " "Node \"PS2_DAT2\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_DAT2" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_CLK27 " "Node \"TD_CLK27\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_CLK27" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[0\] " "Node \"TD_DATA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[1\] " "Node \"TD_DATA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[2\] " "Node \"TD_DATA\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[3\] " "Node \"TD_DATA\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[4\] " "Node \"TD_DATA\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[5\] " "Node \"TD_DATA\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[6\] " "Node \"TD_DATA\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[7\] " "Node \"TD_DATA\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_HS " "Node \"TD_HS\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_HS" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_RESET_N " "Node \"TD_RESET_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_RESET_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_VS " "Node \"TD_VS\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_VS" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_CLK " "Node \"USB_B2_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[0\] " "Node \"USB_B2_DATA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[1\] " "Node \"USB_B2_DATA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[2\] " "Node \"USB_B2_DATA\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[3\] " "Node \"USB_B2_DATA\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[4\] " "Node \"USB_B2_DATA\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[5\] " "Node \"USB_B2_DATA\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[6\] " "Node \"USB_B2_DATA\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[7\] " "Node \"USB_B2_DATA\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_EMPTY " "Node \"USB_EMPTY\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_EMPTY" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_FULL " "Node \"USB_FULL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_FULL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_OE_N " "Node \"USB_OE_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_OE_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_RD_N " "Node \"USB_RD_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_RD_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_RESET_N " "Node \"USB_RESET_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_RESET_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_SCL " "Node \"USB_SCL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_SCL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_SDA " "Node \"USB_SDA\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_SDA" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_WR_N " "Node \"USB_WR_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_WR_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "VGA_SYNC_N " "Node \"VGA_SYNC_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "VGA_SYNC_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602171864209 ""}  } {  } 0 15705 "Ignored locations or region assignments to the following nodes" 0 0 "Fitter" 0 -1 1602171864209 ""}
+{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:16 " "Fitter preparation operations ending: elapsed time is 00:00:16" {  } {  } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602171864214 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" {  } {  } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1602171869490 ""}
+{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." {  } {  } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1602171870272 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:15 " "Fitter placement preparation operations ending: elapsed time is 00:00:15" {  } {  } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602171884734 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" {  } {  } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1602171902983 ""}
+{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" {  } {  } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1602171911929 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:09 " "Fitter placement operations ending: elapsed time is 00:00:09" {  } {  } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602171911929 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" {  } {  } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1602171913901 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Router estimated average interconnect usage is 2% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "42 X22_Y11 X32_Y22 " "Router estimated peak interconnect usage is 42% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22" {  } { { "loc" "" { Generic "/home/ks6n19/Documents/project/" { { 1 { 0 "Router estimated peak interconnect usage is 42% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22"} { { 12 { 0 ""} 22 11 11 12 }  }  }  }  } }  } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1602171922057 ""}  } {  } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1602171922057 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" {  } {  } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1602171954240 ""}  } {  } 0 170199 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1602171954240 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:37 " "Fitter routing operations ending: elapsed time is 00:00:37" {  } {  } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602171954244 ""}
+{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 5.61 " "Total time spent on timing analysis during the Fitter is 5.61 seconds." {  } {  } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1602171962099 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1602171962201 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1602171963461 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1602171963464 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1602171964661 ""}
+{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:10 " "Fitter post-fit operations ending: elapsed time is 00:00:10" {  } {  } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602171972181 ""}
+{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." {  } {  } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1602171972465 ""}
+{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1602171972824 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 182 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 182 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "2657 " "Peak virtual memory: 2657 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1602171974687 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  8 16:46:14 2020 " "Processing ended: Thu Oct  8 16:46:14 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1602171974687 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:02:08 " "Elapsed time: 00:02:08" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1602171974687 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:11:48 " "Total CPU time (on all processors): 00:11:48" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1602171974687 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1602171974687 ""}
diff --git a/db/de1_soc_wrapper.hier_info b/db/de1_soc_wrapper.hier_info
index a649d4997ef210a13ed8363d89fe3c2023f5fd2b..4dcf96c121c36329a03e679193a2de3f0f3fa588 100644
--- a/db/de1_soc_wrapper.hier_info
+++ b/db/de1_soc_wrapper.hier_info
@@ -14,72 +14,72 @@ KEY[0] => KEY[0].IN1
 KEY[1] => KEY[1].IN1
 KEY[2] => HRESETn.IN1
 KEY[3] => KEY[3].IN1
-LEDR[0] << <GND>
-LEDR[1] << <GND>
-LEDR[2] << <GND>
-LEDR[3] << <GND>
-LEDR[4] << <GND>
-LEDR[5] << <GND>
-LEDR[6] << <GND>
-LEDR[7] << <GND>
-LEDR[8] << <GND>
-LEDR[9] << <GND>
-HEX0[0] << <VCC>
-HEX0[1] << <VCC>
-HEX0[2] << heartbeat.DB_MAX_OUTPUT_PORT_TYPE
-HEX0[3] << heartbeat.DB_MAX_OUTPUT_PORT_TYPE
-HEX0[4] << heartbeat.DB_MAX_OUTPUT_PORT_TYPE
-HEX0[5] << <VCC>
-HEX0[6] << heartbeat.DB_MAX_OUTPUT_PORT_TYPE
-HEX1[0] << arm_soc:soc_inst.LOCKUP
-HEX1[1] << <VCC>
-HEX1[2] << <VCC>
-HEX1[3] << <VCC>
-HEX1[4] << <VCC>
-HEX1[5] << <VCC>
-HEX1[6] << <VCC>
-HEX2[0] << <VCC>
-HEX2[1] << <VCC>
-HEX2[2] << <VCC>
-HEX2[3] << <VCC>
-HEX2[4] << running.DB_MAX_OUTPUT_PORT_TYPE
-HEX2[5] << <VCC>
-HEX2[6] << running.DB_MAX_OUTPUT_PORT_TYPE
-HEX3[0] << <VCC>
-HEX3[1] << <VCC>
-HEX3[2] << <VCC>
-HEX3[3] << arm_soc:soc_inst.LOCKUP
-HEX3[4] << arm_soc:soc_inst.LOCKUP
-HEX3[5] << arm_soc:soc_inst.LOCKUP
-HEX3[6] << <VCC>
-VGA_R[0] << razzle:raz_inst.VGA_R
-VGA_R[1] << razzle:raz_inst.VGA_R
-VGA_R[2] << razzle:raz_inst.VGA_R
-VGA_R[3] << razzle:raz_inst.VGA_R
-VGA_R[4] << razzle:raz_inst.VGA_R
-VGA_R[5] << razzle:raz_inst.VGA_R
-VGA_R[6] << razzle:raz_inst.VGA_R
-VGA_R[7] << razzle:raz_inst.VGA_R
-VGA_G[0] << razzle:raz_inst.VGA_G
-VGA_G[1] << razzle:raz_inst.VGA_G
-VGA_G[2] << razzle:raz_inst.VGA_G
-VGA_G[3] << razzle:raz_inst.VGA_G
-VGA_G[4] << razzle:raz_inst.VGA_G
-VGA_G[5] << razzle:raz_inst.VGA_G
-VGA_G[6] << razzle:raz_inst.VGA_G
-VGA_G[7] << razzle:raz_inst.VGA_G
-VGA_B[0] << razzle:raz_inst.VGA_B
-VGA_B[1] << razzle:raz_inst.VGA_B
-VGA_B[2] << razzle:raz_inst.VGA_B
-VGA_B[3] << razzle:raz_inst.VGA_B
-VGA_B[4] << razzle:raz_inst.VGA_B
-VGA_B[5] << razzle:raz_inst.VGA_B
-VGA_B[6] << razzle:raz_inst.VGA_B
-VGA_B[7] << razzle:raz_inst.VGA_B
-VGA_HS << razzle:raz_inst.VGA_HS
-VGA_VS << razzle:raz_inst.VGA_VS
-VGA_CLK << razzle:raz_inst.VGA_CLK
-VGA_BLANK_N << razzle:raz_inst.VGA_BLANK_N
+LEDR[0] <= <GND>
+LEDR[1] <= <GND>
+LEDR[2] <= <GND>
+LEDR[3] <= <GND>
+LEDR[4] <= <GND>
+LEDR[5] <= <GND>
+LEDR[6] <= <GND>
+LEDR[7] <= <GND>
+LEDR[8] <= <GND>
+LEDR[9] <= <GND>
+HEX0[0] <= <VCC>
+HEX0[1] <= <VCC>
+HEX0[2] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX0[3] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX0[4] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX0[5] <= <VCC>
+HEX0[6] <= heartbeat.DB_MAX_OUTPUT_PORT_TYPE
+HEX1[0] <= arm_soc:soc_inst.LOCKUP
+HEX1[1] <= <VCC>
+HEX1[2] <= <VCC>
+HEX1[3] <= <VCC>
+HEX1[4] <= <VCC>
+HEX1[5] <= <VCC>
+HEX1[6] <= <VCC>
+HEX2[0] <= <VCC>
+HEX2[1] <= <VCC>
+HEX2[2] <= <VCC>
+HEX2[3] <= <VCC>
+HEX2[4] <= running.DB_MAX_OUTPUT_PORT_TYPE
+HEX2[5] <= <VCC>
+HEX2[6] <= running.DB_MAX_OUTPUT_PORT_TYPE
+HEX3[0] <= <VCC>
+HEX3[1] <= <VCC>
+HEX3[2] <= <VCC>
+HEX3[3] <= arm_soc:soc_inst.LOCKUP
+HEX3[4] <= arm_soc:soc_inst.LOCKUP
+HEX3[5] <= arm_soc:soc_inst.LOCKUP
+HEX3[6] <= <VCC>
+VGA_R[0] <= razzle:raz_inst.VGA_R
+VGA_R[1] <= razzle:raz_inst.VGA_R
+VGA_R[2] <= razzle:raz_inst.VGA_R
+VGA_R[3] <= razzle:raz_inst.VGA_R
+VGA_R[4] <= razzle:raz_inst.VGA_R
+VGA_R[5] <= razzle:raz_inst.VGA_R
+VGA_R[6] <= razzle:raz_inst.VGA_R
+VGA_R[7] <= razzle:raz_inst.VGA_R
+VGA_G[0] <= razzle:raz_inst.VGA_G
+VGA_G[1] <= razzle:raz_inst.VGA_G
+VGA_G[2] <= razzle:raz_inst.VGA_G
+VGA_G[3] <= razzle:raz_inst.VGA_G
+VGA_G[4] <= razzle:raz_inst.VGA_G
+VGA_G[5] <= razzle:raz_inst.VGA_G
+VGA_G[6] <= razzle:raz_inst.VGA_G
+VGA_G[7] <= razzle:raz_inst.VGA_G
+VGA_B[0] <= razzle:raz_inst.VGA_B
+VGA_B[1] <= razzle:raz_inst.VGA_B
+VGA_B[2] <= razzle:raz_inst.VGA_B
+VGA_B[3] <= razzle:raz_inst.VGA_B
+VGA_B[4] <= razzle:raz_inst.VGA_B
+VGA_B[5] <= razzle:raz_inst.VGA_B
+VGA_B[6] <= razzle:raz_inst.VGA_B
+VGA_B[7] <= razzle:raz_inst.VGA_B
+VGA_HS <= razzle:raz_inst.VGA_HS
+VGA_VS <= razzle:raz_inst.VGA_VS
+VGA_CLK <= razzle:raz_inst.VGA_CLK
+VGA_BLANK_N <= razzle:raz_inst.VGA_BLANK_N
 
 
 |de1_soc_wrapper|arm_soc:soc_inst
diff --git a/db/de1_soc_wrapper.hif b/db/de1_soc_wrapper.hif
index 2b1a7b0f88617144b20ee9cb39d8f8536f3d6417..57aef286e9d41768caf1b50e6ec51c0984b53026 100644
Binary files a/db/de1_soc_wrapper.hif and b/db/de1_soc_wrapper.hif differ
diff --git a/db/de1_soc_wrapper.map.bpm b/db/de1_soc_wrapper.map.bpm
index 66fa644e9b9865c6426417e1a79f8fd815e7f4f7..0b2f872e36c31e8fd83f2de9d35cf1cbd5ce8432 100644
Binary files a/db/de1_soc_wrapper.map.bpm and b/db/de1_soc_wrapper.map.bpm differ
diff --git a/db/de1_soc_wrapper.map.cdb b/db/de1_soc_wrapper.map.cdb
index 2a4998f86ed7782f11c9d0c34a408ad1e43e7d34..f5604e5bdc22078736f1b1932ca23732b1a90d38 100644
Binary files a/db/de1_soc_wrapper.map.cdb and b/db/de1_soc_wrapper.map.cdb differ
diff --git a/db/de1_soc_wrapper.map.hdb b/db/de1_soc_wrapper.map.hdb
index 54f157274d6639d672a19f90c18a838d98332a96..2946f5f2275c809b875b7e195cae2b3a45466592 100644
Binary files a/db/de1_soc_wrapper.map.hdb and b/db/de1_soc_wrapper.map.hdb differ
diff --git a/db/de1_soc_wrapper.map.kpt b/db/de1_soc_wrapper.map.kpt
index e7cfe17af20a88240378e6422cae9e1d77c85705..c6c618313e6111baac3f1ca3895c54bd5eb9b786 100644
Binary files a/db/de1_soc_wrapper.map.kpt and b/db/de1_soc_wrapper.map.kpt differ
diff --git a/db/de1_soc_wrapper.map.qmsg b/db/de1_soc_wrapper.map.qmsg
index c8be8e6a65f83798fd264769f92ad7a934476d53..904f7bb9ca2c6d23a5b992a957f8c2626a53a135 100644
--- a/db/de1_soc_wrapper.map.qmsg
+++ b/db/de1_soc_wrapper.map.qmsg
@@ -1,67 +1,69 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1601555607646 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1601555607648 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  1 13:33:27 2020 " "Processing started: Thu Oct  1 13:33:27 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1601555607648 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555607648 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555607649 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1601555608320 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1601555608320 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/razzle.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/razzle.sv" { { "Info" "ISGN_ENTITY_NAME" "1 razzle " "Found entity 1: razzle" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555617547 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555617547 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_interconnect.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_interconnect.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_interconnect " "Found entity 1: ahb_interconnect" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555617551 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555617551 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_pixel_memory.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_pixel_memory.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_pixel_memory " "Found entity 1: ahb_pixel_memory" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 23 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555617554 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555617554 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_ram.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_ram.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_ram " "Found entity 1: ahb_ram" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 24 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555617557 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555617557 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_switches.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_switches.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_switches " "Found entity 1: ahb_switches" {  } { { "behavioural/ahb_switches.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_switches.sv" 32 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555617561 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555617561 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/arm_soc.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/arm_soc.sv" { { "Info" "ISGN_ENTITY_NAME" "1 arm_soc " "Found entity 1: arm_soc" {  } { { "behavioural/arm_soc.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 4 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555617564 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555617564 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/CORTEXM0DS.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/CORTEXM0DS.sv" { { "Info" "ISGN_ENTITY_NAME" "1 CORTEXM0DS " "Found entity 1: CORTEXM0DS" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555617568 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555617568 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/cortexm0ds_logic.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/cortexm0ds_logic.sv" { { "Info" "ISGN_ENTITY_NAME" "1 cortexm0ds_logic " "Found entity 1: cortexm0ds_logic" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555617610 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555617610 ""}
-{ "Warning" "WVRFX_L3_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "de1_soc_wrapper.sv(64) " "Verilog HDL information at de1_soc_wrapper.sv(64): always construct contains both blocking and non-blocking assignments" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 64 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: always construct contains both blocking and non-blocking assignments" 1 0 "Analysis & Synthesis" 0 -1 1601555617613 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/de1_soc_wrapper.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/de1_soc_wrapper.sv" { { "Info" "ISGN_ENTITY_NAME" "1 de1_soc_wrapper " "Found entity 1: de1_soc_wrapper" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555617613 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555617613 ""}
-{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Green_Data razzle.sv(43) " "Verilog HDL Implicit Net warning at razzle.sv(43): created implicit net for \"Green_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 43 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555617614 ""}
-{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Blue_Data razzle.sv(44) " "Verilog HDL Implicit Net warning at razzle.sv(44): created implicit net for \"Blue_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 44 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555617614 ""}
-{ "Info" "ISGN_START_ELABORATION_TOP" "de1_soc_wrapper " "Elaborating entity \"de1_soc_wrapper\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1601555617866 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 26 de1_soc_wrapper.sv(75) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(75): truncated value with size 32 to match size of target (26)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 75 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555617870 "|de1_soc_wrapper"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 7 de1_soc_wrapper.sv(87) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(87): truncated value with size 8 to match size of target (7)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 87 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555617870 "|de1_soc_wrapper"}
-{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR de1_soc_wrapper.sv(15) " "Output port \"LEDR\" at de1_soc_wrapper.sv(15) has no driver" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1601555617870 "|de1_soc_wrapper"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "arm_soc arm_soc:soc_inst " "Elaborating entity \"arm_soc\" for hierarchy \"arm_soc:soc_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "soc_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 42 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555617872 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CORTEXM0DS arm_soc:soc_inst\|CORTEXM0DS:m0_1 " "Elaborating entity \"CORTEXM0DS\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\"" {  } { { "behavioural/arm_soc.sv" "m0_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 58 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555617875 ""}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_msp CORTEXM0DS.sv(76) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(76): object \"cm0_msp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 76 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601555617877 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_psp CORTEXM0DS.sv(77) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(77): object \"cm0_psp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 77 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601555617877 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_pc CORTEXM0DS.sv(79) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(79): object \"cm0_pc\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 79 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601555617877 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_xpsr CORTEXM0DS.sv(80) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(80): object \"cm0_xpsr\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 80 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601555617877 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_control CORTEXM0DS.sv(81) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(81): object \"cm0_control\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 81 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601555617878 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_primask CORTEXM0DS.sv(82) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(82): object \"cm0_primask\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 82 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601555617878 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cortexm0ds_logic arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic " "Elaborating entity \"cortexm0ds_logic\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic\"" {  } { { "behavioural/CORTEXM0DS.sv" "u_logic" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 144 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555617878 ""}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "N4i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"N4i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601555617906 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "L5i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"L5i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601555617906 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_interconnect arm_soc:soc_inst\|ahb_interconnect:interconnect_1 " "Elaborating entity \"ahb_interconnect\" for hierarchy \"arm_soc:soc_inst\|ahb_interconnect:interconnect_1\"" {  } { { "behavioural/arm_soc.sv" "interconnect_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 70 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555617908 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(39) " "Verilog HDL assignment warning at ahb_interconnect.sv(39): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 39 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555617910 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(41) " "Verilog HDL assignment warning at ahb_interconnect.sv(41): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 41 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555617910 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(43) " "Verilog HDL assignment warning at ahb_interconnect.sv(43): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 43 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555617910 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_ram arm_soc:soc_inst\|ahb_ram:ram_1 " "Elaborating entity \"ahb_ram\" for hierarchy \"arm_soc:soc_inst\|ahb_ram:ram_1\"" {  } { { "behavioural/arm_soc.sv" "ram_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 81 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555617911 ""}
-{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "139 0 4095 ahb_ram.sv(69) " "Verilog HDL warning at ahb_ram.sv(69): number of words (139) in memory file does not match the number of elements in the address range \[0:4095\]" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 69 0 0 } }  } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1601555617942 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_switches arm_soc:soc_inst\|ahb_switches:switches_1 " "Elaborating entity \"ahb_switches\" for hierarchy \"arm_soc:soc_inst\|ahb_switches:switches_1\"" {  } { { "behavioural/arm_soc.sv" "switches_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 91 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555618313 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_pixel_memory arm_soc:soc_inst\|ahb_pixel_memory:pix1 " "Elaborating entity \"ahb_pixel_memory\" for hierarchy \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\"" {  } { { "behavioural/arm_soc.sv" "pix1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 97 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555618315 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ahb_pixel_memory.sv(93) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(93): truncated value with size 32 to match size of target (1)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 93 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555618318 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 19 ahb_pixel_memory.sv(97) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(97): truncated value with size 32 to match size of target (19)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 97 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555618318 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "razzle razzle:raz_inst " "Elaborating entity \"razzle\" for hierarchy \"razzle:raz_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "raz_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 49 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555618319 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(33) " "Verilog HDL assignment warning at razzle.sv(33): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 33 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555618320 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(34) " "Verilog HDL assignment warning at razzle.sv(34): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 34 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555618320 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(35) " "Verilog HDL assignment warning at razzle.sv(35): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 35 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555618320 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 10 razzle.sv(54) " "Verilog HDL assignment warning at razzle.sv(54): truncated value with size 11 to match size of target (10)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 54 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555618320 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 9 razzle.sv(55) " "Verilog HDL assignment warning at razzle.sv(55): truncated value with size 11 to match size of target (9)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 55 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555618320 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(94) " "Verilog HDL assignment warning at razzle.sv(94): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 94 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555618321 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(112) " "Verilog HDL assignment warning at razzle.sv(112): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 112 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601555618321 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Inferred 2 megafunctions from design logic" { { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 1 " "Parameter WIDTH_A set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 19 " "Parameter WIDTHAD_A set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 307200 " "Parameter NUMWORDS_A set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 1 " "Parameter WIDTH_B set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 19 " "Parameter WIDTHAD_B set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 307200 " "Parameter NUMWORDS_B set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 32 " "Parameter WIDTH_A set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 12 " "Parameter WIDTHAD_A set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 4096 " "Parameter NUMWORDS_A set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 32 " "Parameter WIDTH_B set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 12 " "Parameter WIDTHAD_B set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 4096 " "Parameter NUMWORDS_B set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601555622569 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1601555622569 ""}  } {  } 0 19000 "Inferred %1!d! megafunctions from design logic" 0 0 "Analysis & Synthesis" 0 -1 1601555622569 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555622654 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 1 " "Parameter \"WIDTH_A\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 19 " "Parameter \"WIDTHAD_A\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 307200 " "Parameter \"NUMWORDS_A\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 1 " "Parameter \"WIDTH_B\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 19 " "Parameter \"WIDTHAD_B\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 307200 " "Parameter \"NUMWORDS_B\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622654 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1601555622654 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_6ot1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_6ot1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_6ot1 " "Found entity 1: altsyncram_6ot1" {  } { { "db/altsyncram_6ot1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_6ot1.tdf" 32 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555622707 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555622707 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_3na.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_3na.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_3na " "Found entity 1: decode_3na" {  } { { "db/decode_3na.tdf" "" { Text "/home/ks6n19/Documents/project/db/decode_3na.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555622764 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555622764 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_chb.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mux_chb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_chb " "Found entity 1: mux_chb" {  } { { "db/mux_chb.tdf" "" { Text "/home/ks6n19/Documents/project/db/mux_chb.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555622812 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555622812 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555622823 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 32 " "Parameter \"WIDTH_A\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 12 " "Parameter \"WIDTHAD_A\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 4096 " "Parameter \"NUMWORDS_A\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 32 " "Parameter \"WIDTH_B\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 12 " "Parameter \"WIDTHAD_B\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 4096 " "Parameter \"NUMWORDS_B\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601555622823 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1601555622823 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_nms1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_nms1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_nms1 " "Found entity 1: altsyncram_nms1" {  } { { "db/altsyncram_nms1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_nms1.tdf" 28 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601555622873 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555622873 ""}
-{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[0\] GND " "Pin \"LEDR\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|LEDR[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[1\] GND " "Pin \"LEDR\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|LEDR[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[2\] GND " "Pin \"LEDR\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|LEDR[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[3\] GND " "Pin \"LEDR\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|LEDR[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[4\] GND " "Pin \"LEDR\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|LEDR[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[5\] GND " "Pin \"LEDR\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|LEDR[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[6\] GND " "Pin \"LEDR\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|LEDR[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[7\] GND " "Pin \"LEDR\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|LEDR[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[8\] GND " "Pin \"LEDR\[8\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|LEDR[8]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[9\] GND " "Pin \"LEDR\[9\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|LEDR[9]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[0\] VCC " "Pin \"HEX0\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX0[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[1\] VCC " "Pin \"HEX0\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX0[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[5\] VCC " "Pin \"HEX0\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX0[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[1\] VCC " "Pin \"HEX1\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX1[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[2\] VCC " "Pin \"HEX1\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX1[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[3\] VCC " "Pin \"HEX1\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX1[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[4\] VCC " "Pin \"HEX1\[4\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX1[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[5\] VCC " "Pin \"HEX1\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX1[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[6\] VCC " "Pin \"HEX1\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX1[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[0\] VCC " "Pin \"HEX2\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[1\] VCC " "Pin \"HEX2\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX2[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[2\] VCC " "Pin \"HEX2\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX2[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[3\] VCC " "Pin \"HEX2\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX2[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[5\] VCC " "Pin \"HEX2\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX2[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[0\] VCC " "Pin \"HEX3\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX3[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[1\] VCC " "Pin \"HEX3\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX3[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[2\] VCC " "Pin \"HEX3\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX3[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[6\] VCC " "Pin \"HEX3\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|HEX3[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[0\] GND " "Pin \"VGA_G\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_G[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[1\] GND " "Pin \"VGA_G\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_G[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[2\] GND " "Pin \"VGA_G\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_G[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[3\] GND " "Pin \"VGA_G\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_G[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[4\] GND " "Pin \"VGA_G\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_G[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[5\] GND " "Pin \"VGA_G\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_G[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[6\] GND " "Pin \"VGA_G\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_G[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[7\] GND " "Pin \"VGA_G\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_G[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[0\] GND " "Pin \"VGA_B\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_B[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[1\] GND " "Pin \"VGA_B\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_B[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[2\] GND " "Pin \"VGA_B\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_B[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[3\] GND " "Pin \"VGA_B\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_B[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[4\] GND " "Pin \"VGA_B\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_B[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[5\] GND " "Pin \"VGA_B\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_B[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[6\] GND " "Pin \"VGA_B\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_B[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[7\] GND " "Pin \"VGA_B\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601555626477 "|de1_soc_wrapper|VGA_B[7]"}  } {  } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1601555626477 ""}
-{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" {  } {  } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1601555626696 ""}
-{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "17 " "17 registers lost all their fanouts during netlist optimizations." {  } {  } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1601555633616 ""}
-{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555633776 ""}
-{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" {  } {  } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1601555634207 ""}  } {  } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601555634207 ""}
-{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[3\] " "No output dependent on input pin \"KEY\[3\]\"" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 13 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1601555634582 "|de1_soc_wrapper|KEY[3]"}  } {  } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1601555634582 ""}
-{ "Info" "ICUT_CUT_TM_SUMMARY" "4014 " "Implemented 4014 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1601555634595 ""} { "Info" "ICUT_CUT_TM_OPINS" "66 " "Implemented 66 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1601555634595 ""} { "Info" "ICUT_CUT_TM_LCELLS" "3863 " "Implemented 3863 logic cells" {  } {  } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1601555634595 ""} { "Info" "ICUT_CUT_TM_RAMS" "70 " "Implemented 70 RAM segments" {  } {  } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1601555634595 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1601555634595 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 74 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 74 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1296 " "Peak virtual memory: 1296 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1601555634639 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  1 13:33:54 2020 " "Processing ended: Thu Oct  1 13:33:54 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1601555634639 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:27 " "Elapsed time: 00:00:27" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1601555634639 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:42 " "Total CPU time (on all processors): 00:00:42" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1601555634639 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1601555634639 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1602171818782 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1602171818785 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  8 16:43:38 2020 " "Processing started: Thu Oct  8 16:43:38 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1602171818785 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171818785 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171818785 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1602171819457 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1602171819457 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/razzle.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/razzle.sv" { { "Info" "ISGN_ENTITY_NAME" "1 razzle " "Found entity 1: razzle" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171828675 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171828675 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_interconnect.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_interconnect.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_interconnect " "Found entity 1: ahb_interconnect" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171828679 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171828679 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_pixel_memory.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_pixel_memory.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_pixel_memory " "Found entity 1: ahb_pixel_memory" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 23 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171828682 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171828682 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_ram.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_ram.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_ram " "Found entity 1: ahb_ram" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 24 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171828686 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171828686 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_switches.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_switches.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_switches " "Found entity 1: ahb_switches" {  } { { "behavioural/ahb_switches.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_switches.sv" 32 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171828690 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171828690 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/arm_soc.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/arm_soc.sv" { { "Info" "ISGN_ENTITY_NAME" "1 arm_soc " "Found entity 1: arm_soc" {  } { { "behavioural/arm_soc.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 4 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171828694 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171828694 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/CORTEXM0DS.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/CORTEXM0DS.sv" { { "Info" "ISGN_ENTITY_NAME" "1 CORTEXM0DS " "Found entity 1: CORTEXM0DS" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171828697 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171828697 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/cortexm0ds_logic.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/cortexm0ds_logic.sv" { { "Info" "ISGN_ENTITY_NAME" "1 cortexm0ds_logic " "Found entity 1: cortexm0ds_logic" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171828740 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171828740 ""}
+{ "Warning" "WVRFX_L3_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "de1_soc_wrapper.sv(64) " "Verilog HDL information at de1_soc_wrapper.sv(64): always construct contains both blocking and non-blocking assignments" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 64 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: always construct contains both blocking and non-blocking assignments" 1 0 "Analysis & Synthesis" 0 -1 1602171828744 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/de1_soc_wrapper.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/de1_soc_wrapper.sv" { { "Info" "ISGN_ENTITY_NAME" "1 de1_soc_wrapper " "Found entity 1: de1_soc_wrapper" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171828745 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171828745 ""}
+{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Green_Data razzle.sv(43) " "Verilog HDL Implicit Net warning at razzle.sv(43): created implicit net for \"Green_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 43 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171828745 ""}
+{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Blue_Data razzle.sv(44) " "Verilog HDL Implicit Net warning at razzle.sv(44): created implicit net for \"Blue_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 44 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171828745 ""}
+{ "Info" "ISGN_START_ELABORATION_TOP" "de1_soc_wrapper " "Elaborating entity \"de1_soc_wrapper\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1602171829016 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 26 de1_soc_wrapper.sv(75) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(75): truncated value with size 32 to match size of target (26)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 75 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829018 "|de1_soc_wrapper"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 7 de1_soc_wrapper.sv(87) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(87): truncated value with size 8 to match size of target (7)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 87 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829018 "|de1_soc_wrapper"}
+{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR de1_soc_wrapper.sv(15) " "Output port \"LEDR\" at de1_soc_wrapper.sv(15) has no driver" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1602171829019 "|de1_soc_wrapper"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "arm_soc arm_soc:soc_inst " "Elaborating entity \"arm_soc\" for hierarchy \"arm_soc:soc_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "soc_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 42 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171829044 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CORTEXM0DS arm_soc:soc_inst\|CORTEXM0DS:m0_1 " "Elaborating entity \"CORTEXM0DS\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\"" {  } { { "behavioural/arm_soc.sv" "m0_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 58 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171829067 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_msp CORTEXM0DS.sv(76) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(76): object \"cm0_msp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 76 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602171829069 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_psp CORTEXM0DS.sv(77) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(77): object \"cm0_psp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 77 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602171829069 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_pc CORTEXM0DS.sv(79) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(79): object \"cm0_pc\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 79 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602171829069 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_xpsr CORTEXM0DS.sv(80) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(80): object \"cm0_xpsr\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 80 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602171829069 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_control CORTEXM0DS.sv(81) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(81): object \"cm0_control\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 81 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602171829069 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_primask CORTEXM0DS.sv(82) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(82): object \"cm0_primask\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 82 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602171829069 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cortexm0ds_logic arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic " "Elaborating entity \"cortexm0ds_logic\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic\"" {  } { { "behavioural/CORTEXM0DS.sv" "u_logic" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 144 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171829070 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "N4i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"N4i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602171829098 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "L5i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"L5i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602171829098 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_interconnect arm_soc:soc_inst\|ahb_interconnect:interconnect_1 " "Elaborating entity \"ahb_interconnect\" for hierarchy \"arm_soc:soc_inst\|ahb_interconnect:interconnect_1\"" {  } { { "behavioural/arm_soc.sv" "interconnect_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 70 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171829100 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(39) " "Verilog HDL assignment warning at ahb_interconnect.sv(39): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 39 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829101 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(41) " "Verilog HDL assignment warning at ahb_interconnect.sv(41): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 41 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829101 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(43) " "Verilog HDL assignment warning at ahb_interconnect.sv(43): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 43 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829101 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_ram arm_soc:soc_inst\|ahb_ram:ram_1 " "Elaborating entity \"ahb_ram\" for hierarchy \"arm_soc:soc_inst\|ahb_ram:ram_1\"" {  } { { "behavioural/arm_soc.sv" "ram_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 81 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171829103 ""}
+{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "228 0 4095 ahb_ram.sv(69) " "Verilog HDL warning at ahb_ram.sv(69): number of words (228) in memory file does not match the number of elements in the address range \[0:4095\]" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 69 0 0 } }  } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1602171829136 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_switches arm_soc:soc_inst\|ahb_switches:switches_1 " "Elaborating entity \"ahb_switches\" for hierarchy \"arm_soc:soc_inst\|ahb_switches:switches_1\"" {  } { { "behavioural/arm_soc.sv" "switches_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 91 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171829534 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_pixel_memory arm_soc:soc_inst\|ahb_pixel_memory:pix1 " "Elaborating entity \"ahb_pixel_memory\" for hierarchy \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\"" {  } { { "behavioural/arm_soc.sv" "pix1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 97 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171829544 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ahb_pixel_memory.sv(93) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(93): truncated value with size 32 to match size of target (1)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 93 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829551 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 19 ahb_pixel_memory.sv(97) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(97): truncated value with size 32 to match size of target (19)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 97 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829551 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "razzle razzle:raz_inst " "Elaborating entity \"razzle\" for hierarchy \"razzle:raz_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "raz_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 49 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171829554 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(33) " "Verilog HDL assignment warning at razzle.sv(33): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 33 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829555 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(34) " "Verilog HDL assignment warning at razzle.sv(34): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 34 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829555 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(35) " "Verilog HDL assignment warning at razzle.sv(35): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 35 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829555 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 10 razzle.sv(54) " "Verilog HDL assignment warning at razzle.sv(54): truncated value with size 11 to match size of target (10)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 54 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829555 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 9 razzle.sv(55) " "Verilog HDL assignment warning at razzle.sv(55): truncated value with size 11 to match size of target (9)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 55 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829555 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(94) " "Verilog HDL assignment warning at razzle.sv(94): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 94 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829555 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(112) " "Verilog HDL assignment warning at razzle.sv(112): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 112 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602171829555 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Inferred 2 megafunctions from design logic" { { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 1 " "Parameter WIDTH_A set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 19 " "Parameter WIDTHAD_A set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 307200 " "Parameter NUMWORDS_A set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 1 " "Parameter WIDTH_B set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 19 " "Parameter WIDTHAD_B set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 307200 " "Parameter NUMWORDS_B set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 32 " "Parameter WIDTH_A set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 12 " "Parameter WIDTHAD_A set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 4096 " "Parameter NUMWORDS_A set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 32 " "Parameter WIDTH_B set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 12 " "Parameter WIDTHAD_B set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 4096 " "Parameter NUMWORDS_B set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602171833765 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1602171833765 ""}  } {  } 0 19000 "Inferred %1!d! megafunctions from design logic" 0 0 "Analysis & Synthesis" 0 -1 1602171833765 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171833848 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 1 " "Parameter \"WIDTH_A\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 19 " "Parameter \"WIDTHAD_A\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 307200 " "Parameter \"NUMWORDS_A\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 1 " "Parameter \"WIDTH_B\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 19 " "Parameter \"WIDTHAD_B\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 307200 " "Parameter \"NUMWORDS_B\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171833848 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1602171833848 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_6ot1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_6ot1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_6ot1 " "Found entity 1: altsyncram_6ot1" {  } { { "db/altsyncram_6ot1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_6ot1.tdf" 32 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171833901 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171833901 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_3na.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_3na.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_3na " "Found entity 1: decode_3na" {  } { { "db/decode_3na.tdf" "" { Text "/home/ks6n19/Documents/project/db/decode_3na.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171833955 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171833955 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_chb.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mux_chb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_chb " "Found entity 1: mux_chb" {  } { { "db/mux_chb.tdf" "" { Text "/home/ks6n19/Documents/project/db/mux_chb.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171833998 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171833998 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171834008 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 32 " "Parameter \"WIDTH_A\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 12 " "Parameter \"WIDTHAD_A\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 4096 " "Parameter \"NUMWORDS_A\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 32 " "Parameter \"WIDTH_B\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 12 " "Parameter \"WIDTHAD_B\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 4096 " "Parameter \"NUMWORDS_B\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602171834008 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1602171834008 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_nms1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_nms1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_nms1 " "Found entity 1: altsyncram_nms1" {  } { { "db/altsyncram_nms1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_nms1.tdf" 28 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602171834054 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171834054 ""}
+{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" {  } { { "altsyncram.tdf" "" { Text "/srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } }  } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1602171834091 ""}
+{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" {  } { { "altsyncram.tdf" "" { Text "/srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } }  } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1602171834096 ""}
+{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[0\] GND " "Pin \"LEDR\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|LEDR[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[1\] GND " "Pin \"LEDR\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|LEDR[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[2\] GND " "Pin \"LEDR\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|LEDR[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[3\] GND " "Pin \"LEDR\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|LEDR[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[4\] GND " "Pin \"LEDR\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|LEDR[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[5\] GND " "Pin \"LEDR\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|LEDR[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[6\] GND " "Pin \"LEDR\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|LEDR[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[7\] GND " "Pin \"LEDR\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|LEDR[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[8\] GND " "Pin \"LEDR\[8\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|LEDR[8]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[9\] GND " "Pin \"LEDR\[9\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|LEDR[9]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[0\] VCC " "Pin \"HEX0\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX0[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[1\] VCC " "Pin \"HEX0\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX0[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[5\] VCC " "Pin \"HEX0\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX0[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[1\] VCC " "Pin \"HEX1\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX1[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[2\] VCC " "Pin \"HEX1\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX1[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[3\] VCC " "Pin \"HEX1\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX1[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[4\] VCC " "Pin \"HEX1\[4\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX1[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[5\] VCC " "Pin \"HEX1\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX1[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[6\] VCC " "Pin \"HEX1\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX1[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[0\] VCC " "Pin \"HEX2\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[1\] VCC " "Pin \"HEX2\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX2[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[2\] VCC " "Pin \"HEX2\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX2[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[3\] VCC " "Pin \"HEX2\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX2[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[5\] VCC " "Pin \"HEX2\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX2[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[0\] VCC " "Pin \"HEX3\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX3[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[1\] VCC " "Pin \"HEX3\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX3[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[2\] VCC " "Pin \"HEX3\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX3[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[6\] VCC " "Pin \"HEX3\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|HEX3[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[0\] GND " "Pin \"VGA_G\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_G[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[1\] GND " "Pin \"VGA_G\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_G[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[2\] GND " "Pin \"VGA_G\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_G[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[3\] GND " "Pin \"VGA_G\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_G[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[4\] GND " "Pin \"VGA_G\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_G[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[5\] GND " "Pin \"VGA_G\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_G[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[6\] GND " "Pin \"VGA_G\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_G[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[7\] GND " "Pin \"VGA_G\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_G[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[0\] GND " "Pin \"VGA_B\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_B[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[1\] GND " "Pin \"VGA_B\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_B[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[2\] GND " "Pin \"VGA_B\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_B[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[3\] GND " "Pin \"VGA_B\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_B[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[4\] GND " "Pin \"VGA_B\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_B[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[5\] GND " "Pin \"VGA_B\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_B[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[6\] GND " "Pin \"VGA_B\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_B[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[7\] GND " "Pin \"VGA_B\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602171837855 "|de1_soc_wrapper|VGA_B[7]"}  } {  } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1602171837855 ""}
+{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" {  } {  } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1602171838075 ""}
+{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "17 " "17 registers lost all their fanouts during netlist optimizations." {  } {  } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1602171844885 ""}
+{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171845044 ""}
+{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" {  } {  } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1602171845465 ""}  } {  } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602171845465 ""}
+{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[3\] " "No output dependent on input pin \"KEY\[3\]\"" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 13 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1602171845830 "|de1_soc_wrapper|KEY[3]"}  } {  } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1602171845830 ""}
+{ "Info" "ICUT_CUT_TM_SUMMARY" "4008 " "Implemented 4008 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1602171845842 ""} { "Info" "ICUT_CUT_TM_OPINS" "66 " "Implemented 66 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1602171845842 ""} { "Info" "ICUT_CUT_TM_LCELLS" "3857 " "Implemented 3857 logic cells" {  } {  } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1602171845842 ""} { "Info" "ICUT_CUT_TM_RAMS" "70 " "Implemented 70 RAM segments" {  } {  } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1602171845842 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1602171845842 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 76 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 76 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1302 " "Peak virtual memory: 1302 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1602171845892 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  8 16:44:05 2020 " "Processing ended: Thu Oct  8 16:44:05 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1602171845892 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:27 " "Elapsed time: 00:00:27" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1602171845892 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:41 " "Total CPU time (on all processors): 00:00:41" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1602171845892 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1602171845892 ""}
diff --git a/db/de1_soc_wrapper.map.rdb b/db/de1_soc_wrapper.map.rdb
index 441066329151656d8f4429ba3e82691c607d69c2..a2bb6416796c5b55f46866b1fd6beff8fab1663e 100644
Binary files a/db/de1_soc_wrapper.map.rdb and b/db/de1_soc_wrapper.map.rdb differ
diff --git a/db/de1_soc_wrapper.map_bb.cdb b/db/de1_soc_wrapper.map_bb.cdb
index 772f5ef3b55e103f18590524e426d626b5b13575..88d42e6483b120408816e72c653837914fc700fc 100644
Binary files a/db/de1_soc_wrapper.map_bb.cdb and b/db/de1_soc_wrapper.map_bb.cdb differ
diff --git a/db/de1_soc_wrapper.map_bb.hdb b/db/de1_soc_wrapper.map_bb.hdb
index 62b4e0ec2077aac9967d484d2384290c38138da5..dd4483c38aae93d7bb74264962ff0e01bebfc584 100644
Binary files a/db/de1_soc_wrapper.map_bb.hdb and b/db/de1_soc_wrapper.map_bb.hdb differ
diff --git a/db/de1_soc_wrapper.pre_map.hdb b/db/de1_soc_wrapper.pre_map.hdb
index 8eeb77bfa5f339b3521a7d66660eb6633647fa28..65b9fe3be7b754e7974a50bda411290ff2f04030 100644
Binary files a/db/de1_soc_wrapper.pre_map.hdb and b/db/de1_soc_wrapper.pre_map.hdb differ
diff --git a/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif b/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif
index 6684997dde862ea4b8b0020ac06cdd7d67137eb3..5e3910538b49c313ad4c0c74db9ece273ea87adc 100644
--- a/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif
+++ b/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif
@@ -3876,137 +3876,137 @@ CONTENT BEGIN
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-	224 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	223 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	222 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	221 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	220 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	219 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	218 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	217 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	216 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	215 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	214 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	213 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	212 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	211 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	210 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	209 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	208 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	207 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	206 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	205 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	204 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	203 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	202 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	201 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	200 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	199 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	198 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	197 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	196 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	195 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	194 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	193 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	192 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	191 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	190 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	189 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	188 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	187 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	186 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	185 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	184 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	183 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	182 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	181 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	180 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	179 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	178 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	177 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	176 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	175 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	174 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	173 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	172 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	171 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	170 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	169 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	168 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	167 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	166 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	165 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	164 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	163 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	162 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	161 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	160 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	159 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	158 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	157 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	156 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	155 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	154 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	153 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	152 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	151 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	150 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	149 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	148 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	147 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	146 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	145 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	144 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	143 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	142 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	141 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	140 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	139 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	138 :	01010000000000000000000000000000;
-	137 :	01000000000000000000000000000000;
-	136 :	01000110110000001110011111100110;
-	135 :	11011101111010100010101101100010;
-	134 :	10011011000000011001001100000001;
-	133 :	00110011000000011001101100000001;
-	132 :	11011101111100110010101101100010;
-	131 :	10011011000000001001001100000000;
-	130 :	00110011000000011001101100000000;
-	129 :	11111111101001101111011111111111;
-	128 :	00000000000110000010001000000001;
-	127 :	10011011000000011001100100000000;
-	126 :	11100000000010001001001100000000;
-	125 :	00100011000000001110000000010001;
-	124 :	10010011000000010010001100000000;
-	123 :	10110000100000111011010100000000;
-	122 :	00000000000000000000001000100100;
-	121 :	01000110110000000100011101110000;
-	120 :	01000110110000001101000011111001;
-	119 :	00101011000000000110100000011011;
-	118 :	00110011000010000110100000011011;
-	117 :	01001011000001000100011011000000;
-	116 :	00000000000000000000001000100100;
-	115 :	01000111011100001011000000000100;
-	114 :	00000000000110001011001011011011;
-	113 :	01000001010100110100001001011010;
-	112 :	00111011000000011001101100000010;
-	111 :	10010011000000100100000000010011;
-	110 :	00100010000000010000000000010011;
-	109 :	01000001000110101001101100000001;
-	108 :	10011010000000111001001100000011;
-	107 :	01101000000110110011001100001000;
-	106 :	01101000000110110100101100001001;
-	105 :	10010000000000011011000010000100;
-	104 :	00000000000000000000001000100100;
-	103 :	01000110110000000100011101110000;
-	102 :	10110000000000100000000000011000;
-	101 :	01101000000110110001100011010011;
-	100 :	00000000100110111001101100000001;
-	99 :	01101000000110100100101100000100;
-	98 :	10010000000000011011000010000010;
-	97 :	00000000000000000000001000101000;
+	227 :	01010000000000000000000000000000;
+	226 :	01000000000000000000000000000000;
+	225 :	00000000000000000000001001111111;
+	224 :	01000110110000001110011101111000;
+	223 :	11011101100010000100001010010011;
+	222 :	01001010000000101001101100001101;
+	221 :	10010011000011010011001100000001;
+	220 :	10011011000011011101110110010010;
+	219 :	01000010100110100011001111111111;
+	218 :	00100011111000001001101000001100;
+	217 :	10010011000011000011001100000001;
+	216 :	10011011000011001111111011111001;
+	215 :	11110111111111110000000000011000;
+	214 :	00100010000000011001101100001101;
+	213 :	10011001000011001101000000000101;
+	212 :	00101011000000001001101100000000;
+	211 :	11010000000010000010101100000000;
+	210 :	10011011000000011101000000001011;
+	209 :	00101011000000001001101100000010;
+	208 :	10010011000000001011001011011011;
+	207 :	01000000010100111011001011011011;
+	206 :	00001111110110110100001111011011;
+	205 :	10011011000000111011001011001010;
+	204 :	00011100000110010010001100000000;
+	203 :	11011100000000010100001010011010;
+	202 :	10011011000000110001110000011001;
+	201 :	00100011000000010001100011010010;
+	200 :	10011011000001001001101000000101;
+	199 :	10010011000000011011001011011011;
+	198 :	01000000010100111011001011011011;
+	197 :	00001111110110110100001111011011;
+	196 :	10011011000000111011001011011010;
+	195 :	00001111110110111001101100000100;
+	194 :	10010011000000101011001011011011;
+	193 :	01000000010100111011001011011011;
+	192 :	00001111110110110100001111011011;
+	191 :	10011011000000111011001011011010;
+	190 :	00001111110110111001101100000101;
+	189 :	10010011000000110001100011010011;
+	188 :	01000011010010110001101001000001;
+	187 :	10011001000001101001100000001010;
+	186 :	00011010110010111001101100001001;
+	185 :	10011001000001110100001101011010;
+	184 :	00011010100010101001101000000111;
+	183 :	10011001000010110001101011010011;
+	182 :	10011011000001101001101000001000;
+	181 :	10010011000001000001100011010011;
+	180 :	01000011010010110001101001000001;
+	179 :	10011001000001101001100000001100;
+	178 :	00011010110010111001101100000111;
+	177 :	10011001000010110100001101011010;
+	176 :	00011010100010101001101000000111;
+	175 :	10011001000011010001101011010011;
+	174 :	10011011000010101001101000000110;
+	173 :	10010011000001010001100011010011;
+	172 :	01000011010010110001101001000001;
+	171 :	10011001000001101001100000001100;
+	170 :	00011010110010111001101100001001;
+	169 :	10011001000001110100001101011010;
+	168 :	00011010100010101001101000000111;
+	167 :	10011001000011010001101011010011;
+	166 :	10011011000001101001101000001000;
+	165 :	11100000011001111001001100001100;
+	164 :	00100011000000001110000001110010;
+	163 :	10010011000011010010001100000000;
+	162 :	10010011000001100010001100011110;
+	161 :	10010011000001110010001100010100;
+	160 :	10010011000010000010001100101000;
+	159 :	10010011000010010010001100010100;
+	158 :	10010011000010100010001100011110;
+	157 :	10010011000010110010001100001010;
+	156 :	10110000100011111011010100000000;
+	155 :	00000000000000000000001110001000;
+	154 :	01000110110000000100011101110000;
+	153 :	01000110110000001101000011111001;
+	152 :	00101011000000000110100000011011;
+	151 :	00110011000010000110100000011011;
+	150 :	01001011000001000100011011000000;
+	149 :	00000000000000000000001110001000;
+	148 :	01000111011100001011000000000100;
+	147 :	00000000000110001011001011011011;
+	146 :	01000001010100110100001001011010;
+	145 :	00111011000000011001101100000010;
+	144 :	10010011000000100100000000010011;
+	143 :	00100010000000010000000000010011;
+	142 :	01000001000110101001101100000001;
+	141 :	10011010000000111001001100000011;
+	140 :	01101000000110110011001100001000;
+	139 :	01101000000110110100101100001001;
+	138 :	10010000000000011011000010000100;
+	137 :	00000000000000000000001110001000;
+	136 :	01000110110000000100011101110000;
+	135 :	10110000000000100000000000011000;
+	134 :	01101000000110110001100011010011;
+	133 :	00000000100110111001101100000001;
+	132 :	01101000000110100100101100000100;
+	131 :	10010000000000011011000010000010;
+	130 :	01000110110000000100011101110000;
+	129 :	10110000000010000000000000011000;
+	128 :	00100011000000001110000000000000;
+	127 :	00100011000000011101110100000001;
+	126 :	01000010100110101001101100000101;
+	125 :	00011000110100101001101100000110;
+	124 :	10011010000001111001001100000101;
+	123 :	00011000110100110100001101001011;
+	122 :	00011010010000011001100100001001;
+	121 :	10011000000000100001101011001011;
+	120 :	10011011000000011001100100001000;
+	119 :	01000011010110100001101010001010;
+	118 :	10011010000010001001100100000011;
+	117 :	00011010110100111001101100001001;
+	116 :	10011010000000001001001100000110;
+	115 :	00011000110100110100001101001011;
+	114 :	00011010010000011001100100001001;
+	113 :	10011000000010110001101011001011;
+	112 :	10011011000010001001100100000011;
+	111 :	01000011010110100001101010001010;
+	110 :	10011010000010001001100100001010;
+	109 :	00011010110100111001101100000010;
+	108 :	10011010000010011001001100000111;
+	107 :	00011000110100110100001101001011;
+	106 :	00011010010000011001100100001001;
+	105 :	10011000000010110001101011001011;
+	104 :	10011011000000011001100100001000;
+	103 :	01000011010110100001101010001010;
+	102 :	10011010000010001001100100001010;
+	101 :	00011010110100111001101100001001;
+	100 :	10011010000000001001001100000000;
+	99 :	10010010000000011001000100000010;
+	98 :	10010000000000111011000010001000;
+	97 :	00000000000000000000001110001100;
 	96 :	01000110110000000100011101110000;
 	95 :	10110000000001100100011011000000;
 	94 :	01100000000110101001101000000001;
@@ -4045,10 +4045,10 @@ CONTENT BEGIN
 	61 :	01000110110000001110011111111110;
 	60 :	01000110110000001110011111111110;
 	59 :	01000110110000001110011111111110;
-	58 :	00000000000000000000001000101100;
-	57 :	00000000000000000000001000101100;
+	58 :	00000000000000000000001110010000;
+	57 :	00000000000000000000001110010000;
 	56 :	01000110110000001110011111111110;
-	55 :	11111000100001101111000000000000;
+	55 :	11111000110010001111000000000000;
 	54 :	11010011111101100100001010011010;
 	53 :	01001011000001001001101000000001;
 	52 :	01100000000110100010001000000000;
diff --git a/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl_old.mif b/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl_old.mif
index 6684997dde862ea4b8b0020ac06cdd7d67137eb3..5e3910538b49c313ad4c0c74db9ece273ea87adc 100644
--- a/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl_old.mif
+++ b/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl_old.mif
@@ -3876,137 +3876,137 @@ CONTENT BEGIN
 	230 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
 	229 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
 	228 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	227 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	226 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	225 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	224 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	223 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	222 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	221 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	220 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	219 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	218 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	217 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	216 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	215 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	214 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	213 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	212 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	211 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	210 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	209 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	208 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	207 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	206 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	205 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	204 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	203 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	202 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	201 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	200 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	199 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	198 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	197 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	196 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	195 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	194 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	193 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	192 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	191 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	190 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	189 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	188 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	187 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	186 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	185 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	184 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	183 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	182 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	181 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	180 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	179 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	178 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	177 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	176 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	175 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	174 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	173 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	172 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	171 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	170 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	169 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	168 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	167 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	166 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	165 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	164 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	163 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	162 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	161 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	160 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	159 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	158 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	157 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	156 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	155 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	154 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	153 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	152 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	151 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	150 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	149 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	148 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	147 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	146 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	145 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	144 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	143 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	142 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	141 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	140 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	139 :	XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX;
-	138 :	01010000000000000000000000000000;
-	137 :	01000000000000000000000000000000;
-	136 :	01000110110000001110011111100110;
-	135 :	11011101111010100010101101100010;
-	134 :	10011011000000011001001100000001;
-	133 :	00110011000000011001101100000001;
-	132 :	11011101111100110010101101100010;
-	131 :	10011011000000001001001100000000;
-	130 :	00110011000000011001101100000000;
-	129 :	11111111101001101111011111111111;
-	128 :	00000000000110000010001000000001;
-	127 :	10011011000000011001100100000000;
-	126 :	11100000000010001001001100000000;
-	125 :	00100011000000001110000000010001;
-	124 :	10010011000000010010001100000000;
-	123 :	10110000100000111011010100000000;
-	122 :	00000000000000000000001000100100;
-	121 :	01000110110000000100011101110000;
-	120 :	01000110110000001101000011111001;
-	119 :	00101011000000000110100000011011;
-	118 :	00110011000010000110100000011011;
-	117 :	01001011000001000100011011000000;
-	116 :	00000000000000000000001000100100;
-	115 :	01000111011100001011000000000100;
-	114 :	00000000000110001011001011011011;
-	113 :	01000001010100110100001001011010;
-	112 :	00111011000000011001101100000010;
-	111 :	10010011000000100100000000010011;
-	110 :	00100010000000010000000000010011;
-	109 :	01000001000110101001101100000001;
-	108 :	10011010000000111001001100000011;
-	107 :	01101000000110110011001100001000;
-	106 :	01101000000110110100101100001001;
-	105 :	10010000000000011011000010000100;
-	104 :	00000000000000000000001000100100;
-	103 :	01000110110000000100011101110000;
-	102 :	10110000000000100000000000011000;
-	101 :	01101000000110110001100011010011;
-	100 :	00000000100110111001101100000001;
-	99 :	01101000000110100100101100000100;
-	98 :	10010000000000011011000010000010;
-	97 :	00000000000000000000001000101000;
+	227 :	01010000000000000000000000000000;
+	226 :	01000000000000000000000000000000;
+	225 :	00000000000000000000001001111111;
+	224 :	01000110110000001110011101111000;
+	223 :	11011101100010000100001010010011;
+	222 :	01001010000000101001101100001101;
+	221 :	10010011000011010011001100000001;
+	220 :	10011011000011011101110110010010;
+	219 :	01000010100110100011001111111111;
+	218 :	00100011111000001001101000001100;
+	217 :	10010011000011000011001100000001;
+	216 :	10011011000011001111111011111001;
+	215 :	11110111111111110000000000011000;
+	214 :	00100010000000011001101100001101;
+	213 :	10011001000011001101000000000101;
+	212 :	00101011000000001001101100000000;
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+	210 :	10011011000000011101000000001011;
+	209 :	00101011000000001001101100000010;
+	208 :	10010011000000001011001011011011;
+	207 :	01000000010100111011001011011011;
+	206 :	00001111110110110100001111011011;
+	205 :	10011011000000111011001011001010;
+	204 :	00011100000110010010001100000000;
+	203 :	11011100000000010100001010011010;
+	202 :	10011011000000110001110000011001;
+	201 :	00100011000000010001100011010010;
+	200 :	10011011000001001001101000000101;
+	199 :	10010011000000011011001011011011;
+	198 :	01000000010100111011001011011011;
+	197 :	00001111110110110100001111011011;
+	196 :	10011011000000111011001011011010;
+	195 :	00001111110110111001101100000100;
+	194 :	10010011000000101011001011011011;
+	193 :	01000000010100111011001011011011;
+	192 :	00001111110110110100001111011011;
+	191 :	10011011000000111011001011011010;
+	190 :	00001111110110111001101100000101;
+	189 :	10010011000000110001100011010011;
+	188 :	01000011010010110001101001000001;
+	187 :	10011001000001101001100000001010;
+	186 :	00011010110010111001101100001001;
+	185 :	10011001000001110100001101011010;
+	184 :	00011010100010101001101000000111;
+	183 :	10011001000010110001101011010011;
+	182 :	10011011000001101001101000001000;
+	181 :	10010011000001000001100011010011;
+	180 :	01000011010010110001101001000001;
+	179 :	10011001000001101001100000001100;
+	178 :	00011010110010111001101100000111;
+	177 :	10011001000010110100001101011010;
+	176 :	00011010100010101001101000000111;
+	175 :	10011001000011010001101011010011;
+	174 :	10011011000010101001101000000110;
+	173 :	10010011000001010001100011010011;
+	172 :	01000011010010110001101001000001;
+	171 :	10011001000001101001100000001100;
+	170 :	00011010110010111001101100001001;
+	169 :	10011001000001110100001101011010;
+	168 :	00011010100010101001101000000111;
+	167 :	10011001000011010001101011010011;
+	166 :	10011011000001101001101000001000;
+	165 :	11100000011001111001001100001100;
+	164 :	00100011000000001110000001110010;
+	163 :	10010011000011010010001100000000;
+	162 :	10010011000001100010001100011110;
+	161 :	10010011000001110010001100010100;
+	160 :	10010011000010000010001100101000;
+	159 :	10010011000010010010001100010100;
+	158 :	10010011000010100010001100011110;
+	157 :	10010011000010110010001100001010;
+	156 :	10110000100011111011010100000000;
+	155 :	00000000000000000000001110001000;
+	154 :	01000110110000000100011101110000;
+	153 :	01000110110000001101000011111001;
+	152 :	00101011000000000110100000011011;
+	151 :	00110011000010000110100000011011;
+	150 :	01001011000001000100011011000000;
+	149 :	00000000000000000000001110001000;
+	148 :	01000111011100001011000000000100;
+	147 :	00000000000110001011001011011011;
+	146 :	01000001010100110100001001011010;
+	145 :	00111011000000011001101100000010;
+	144 :	10010011000000100100000000010011;
+	143 :	00100010000000010000000000010011;
+	142 :	01000001000110101001101100000001;
+	141 :	10011010000000111001001100000011;
+	140 :	01101000000110110011001100001000;
+	139 :	01101000000110110100101100001001;
+	138 :	10010000000000011011000010000100;
+	137 :	00000000000000000000001110001000;
+	136 :	01000110110000000100011101110000;
+	135 :	10110000000000100000000000011000;
+	134 :	01101000000110110001100011010011;
+	133 :	00000000100110111001101100000001;
+	132 :	01101000000110100100101100000100;
+	131 :	10010000000000011011000010000010;
+	130 :	01000110110000000100011101110000;
+	129 :	10110000000010000000000000011000;
+	128 :	00100011000000001110000000000000;
+	127 :	00100011000000011101110100000001;
+	126 :	01000010100110101001101100000101;
+	125 :	00011000110100101001101100000110;
+	124 :	10011010000001111001001100000101;
+	123 :	00011000110100110100001101001011;
+	122 :	00011010010000011001100100001001;
+	121 :	10011000000000100001101011001011;
+	120 :	10011011000000011001100100001000;
+	119 :	01000011010110100001101010001010;
+	118 :	10011010000010001001100100000011;
+	117 :	00011010110100111001101100001001;
+	116 :	10011010000000001001001100000110;
+	115 :	00011000110100110100001101001011;
+	114 :	00011010010000011001100100001001;
+	113 :	10011000000010110001101011001011;
+	112 :	10011011000010001001100100000011;
+	111 :	01000011010110100001101010001010;
+	110 :	10011010000010001001100100001010;
+	109 :	00011010110100111001101100000010;
+	108 :	10011010000010011001001100000111;
+	107 :	00011000110100110100001101001011;
+	106 :	00011010010000011001100100001001;
+	105 :	10011000000010110001101011001011;
+	104 :	10011011000000011001100100001000;
+	103 :	01000011010110100001101010001010;
+	102 :	10011010000010001001100100001010;
+	101 :	00011010110100111001101100001001;
+	100 :	10011010000000001001001100000000;
+	99 :	10010010000000011001000100000010;
+	98 :	10010000000000111011000010001000;
+	97 :	00000000000000000000001110001100;
 	96 :	01000110110000000100011101110000;
 	95 :	10110000000001100100011011000000;
 	94 :	01100000000110101001101000000001;
@@ -4045,10 +4045,10 @@ CONTENT BEGIN
 	61 :	01000110110000001110011111111110;
 	60 :	01000110110000001110011111111110;
 	59 :	01000110110000001110011111111110;
-	58 :	00000000000000000000001000101100;
-	57 :	00000000000000000000001000101100;
+	58 :	00000000000000000000001110010000;
+	57 :	00000000000000000000001110010000;
 	56 :	01000110110000001110011111111110;
-	55 :	11111000100001101111000000000000;
+	55 :	11111000110010001111000000000000;
 	54 :	11010011111101100100001010011010;
 	53 :	01001011000001001001101000000001;
 	52 :	01100000000110100010001000000000;
diff --git a/db/de1_soc_wrapper.root_partition.map.reg_db.cdb b/db/de1_soc_wrapper.root_partition.map.reg_db.cdb
index e6044baa3a5d9da04c86a9420b4e667a3dd998f3..923480db8a17aa76f8ff65f4e707225bb122c7f3 100644
Binary files a/db/de1_soc_wrapper.root_partition.map.reg_db.cdb and b/db/de1_soc_wrapper.root_partition.map.reg_db.cdb differ
diff --git a/db/de1_soc_wrapper.routing.rdb b/db/de1_soc_wrapper.routing.rdb
index fabd49439c81712ac538b69ab78e794052710ab0..cdb059bd82026b82683a0cb6ffba92a7e42c9b56 100644
Binary files a/db/de1_soc_wrapper.routing.rdb and b/db/de1_soc_wrapper.routing.rdb differ
diff --git a/db/de1_soc_wrapper.rtlv.hdb b/db/de1_soc_wrapper.rtlv.hdb
index ab50ab93fda0507da71ead38a91fc694d39042fb..65f7a5f0ecc76b6cd54b2d21c06a154901849b4b 100644
Binary files a/db/de1_soc_wrapper.rtlv.hdb and b/db/de1_soc_wrapper.rtlv.hdb differ
diff --git a/db/de1_soc_wrapper.rtlv_sg.cdb b/db/de1_soc_wrapper.rtlv_sg.cdb
index 1d7816246c189a53936d9f35492ba9df17fac00a..ff623fea60ec81a5c7e4b574054fe0a94e4a1e05 100644
Binary files a/db/de1_soc_wrapper.rtlv_sg.cdb and b/db/de1_soc_wrapper.rtlv_sg.cdb differ
diff --git a/db/de1_soc_wrapper.rtlv_sg_swap.cdb b/db/de1_soc_wrapper.rtlv_sg_swap.cdb
index 41b09465d4cf9ccde03d7401bcdb8f9512b8c751..2ae990bd50340f93a4554809a84f02221689f394 100644
Binary files a/db/de1_soc_wrapper.rtlv_sg_swap.cdb and b/db/de1_soc_wrapper.rtlv_sg_swap.cdb differ
diff --git a/db/de1_soc_wrapper.sta.qmsg b/db/de1_soc_wrapper.sta.qmsg
index 3809527928f6808a903f7992de167f3edda75c24..a8a1df265d2465c33603f98b199a18236e102ccb 100644
--- a/db/de1_soc_wrapper.sta.qmsg
+++ b/db/de1_soc_wrapper.sta.qmsg
@@ -1,52 +1,52 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1601555769415 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus Prime " "Running Quartus Prime TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1601555769417 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  1 13:36:09 2020 " "Processing started: Thu Oct  1 13:36:09 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1601555769417 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555769417 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta project24_09 -c de1_soc_wrapper " "Command: quartus_sta project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555769417 ""}
-{ "Info" "0" "" "qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "TimeQuest Timing Analyzer" 0 0 1601555769737 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555770608 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555770608 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555770650 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555770650 ""}
-{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555771624 ""}
-{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555771624 ""}
-{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLOCK_50 CLOCK_50 " "create_clock -period 1.000 -name CLOCK_50 CLOCK_50" {  } {  } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1601555771650 ""}  } {  } 0 332105 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555771650 ""}
-{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555771676 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555771677 ""}
-{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" {  } {  } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "TimeQuest Timing Analyzer" 0 0 1601555771678 ""}
-{ "Info" "0" "" "Analyzing Slow 1100mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1601555771704 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1601555772615 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555772615 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -11.537 " "Worst-case setup slack is -11.537" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555772624 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555772624 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -11.537          -23913.191 CLOCK_50  " "  -11.537          -23913.191 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555772624 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555772624 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.368 " "Worst-case hold slack is 0.368" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555772675 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555772675 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.368               0.000 CLOCK_50  " "    0.368               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555772675 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555772675 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555772683 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555772692 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555772701 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555772701 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9163.422 CLOCK_50  " "   -2.636           -9163.422 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555772701 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555772701 ""}
-{ "Info" "0" "" "Analyzing Slow 1100mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1601555772736 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555772790 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555774779 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555775102 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1601555775237 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555775237 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -11.231 " "Worst-case setup slack is -11.231" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555775245 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555775245 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -11.231          -23126.760 CLOCK_50  " "  -11.231          -23126.760 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555775245 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555775245 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.340 " "Worst-case hold slack is 0.340" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555775295 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555775295 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.340               0.000 CLOCK_50  " "    0.340               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555775295 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555775295 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555775303 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555775310 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555775320 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555775320 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9190.399 CLOCK_50  " "   -2.636           -9190.399 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555775320 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555775320 ""}
-{ "Info" "0" "" "Analyzing Fast 1100mV 85C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1601555775353 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555775560 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555777343 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555777669 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1601555777714 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555777714 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -6.860 " "Worst-case setup slack is -6.860" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555777722 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555777722 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -6.860          -13556.504 CLOCK_50  " "   -6.860          -13556.504 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555777722 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555777722 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.180 " "Worst-case hold slack is 0.180" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555777772 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555777772 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.180               0.000 CLOCK_50  " "    0.180               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555777772 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555777772 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555777779 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555777787 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555777795 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555777795 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8582.919 CLOCK_50  " "   -2.636           -8582.919 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555777795 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555777795 ""}
-{ "Info" "0" "" "Analyzing Fast 1100mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1601555777828 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555778179 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1601555778223 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555778223 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -5.976 " "Worst-case setup slack is -5.976" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555778232 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555778232 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -5.976          -11702.438 CLOCK_50  " "   -5.976          -11702.438 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555778232 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555778232 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.170 " "Worst-case hold slack is 0.170" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555778284 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555778284 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.170               0.000 CLOCK_50  " "    0.170               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555778284 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555778284 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555778292 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555778300 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555778309 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555778309 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8586.688 CLOCK_50  " "   -2.636           -8586.688 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601555778309 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555778309 ""}
-{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555780357 ""}
-{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555780361 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 6 s Quartus Prime " "Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1564 " "Peak virtual memory: 1564 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1601555780500 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  1 13:36:20 2020 " "Processing ended: Thu Oct  1 13:36:20 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1601555780500 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:11 " "Elapsed time: 00:00:11" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1601555780500 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:29 " "Total CPU time (on all processors): 00:00:29" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1601555780500 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601555780500 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1602171986754 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus Prime " "Running Quartus Prime TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1602171986756 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  8 16:46:26 2020 " "Processing started: Thu Oct  8 16:46:26 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1602171986756 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171986756 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta project24_09 -c de1_soc_wrapper " "Command: quartus_sta project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171986756 ""}
+{ "Info" "0" "" "qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "TimeQuest Timing Analyzer" 0 0 1602171987054 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171987908 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171987908 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171987949 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171987949 ""}
+{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171988974 ""}
+{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171988975 ""}
+{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLOCK_50 CLOCK_50 " "create_clock -period 1.000 -name CLOCK_50 CLOCK_50" {  } {  } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1602171989000 ""}  } {  } 0 332105 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171989000 ""}
+{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171989027 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171989028 ""}
+{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" {  } {  } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "TimeQuest Timing Analyzer" 0 0 1602171989030 ""}
+{ "Info" "0" "" "Analyzing Slow 1100mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1602171989060 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1602171989930 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171989930 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -11.388 " "Worst-case setup slack is -11.388" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171989940 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171989940 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -11.388          -23034.431 CLOCK_50  " "  -11.388          -23034.431 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171989940 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171989940 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.273 " "Worst-case hold slack is 0.273" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171989996 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171989996 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.273               0.000 CLOCK_50  " "    0.273               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171989996 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171989996 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171990005 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171990015 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171990026 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171990026 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9183.818 CLOCK_50  " "   -2.636           -9183.818 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171990026 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171990026 ""}
+{ "Info" "0" "" "Analyzing Slow 1100mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1602171990062 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171990114 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171992100 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171992428 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1602171992574 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171992574 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -11.164 " "Worst-case setup slack is -11.164" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171992584 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171992584 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -11.164          -22324.349 CLOCK_50  " "  -11.164          -22324.349 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171992584 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171992584 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.258 " "Worst-case hold slack is 0.258" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171992638 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171992638 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.258               0.000 CLOCK_50  " "    0.258               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171992638 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171992638 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171992648 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171992657 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171992668 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171992668 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9212.118 CLOCK_50  " "   -2.636           -9212.118 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171992668 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171992668 ""}
+{ "Info" "0" "" "Analyzing Fast 1100mV 85C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1602171992704 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171992912 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171994760 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995100 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1602171995150 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995150 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -6.884 " "Worst-case setup slack is -6.884" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995160 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995160 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -6.884          -13002.742 CLOCK_50  " "   -6.884          -13002.742 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995160 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995160 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.179 " "Worst-case hold slack is 0.179" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995218 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995218 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.179               0.000 CLOCK_50  " "    0.179               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995218 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995218 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995229 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995239 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995250 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995250 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8585.675 CLOCK_50  " "   -2.636           -8585.675 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995250 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995250 ""}
+{ "Info" "0" "" "Analyzing Fast 1100mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1602171995286 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995636 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1602171995685 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995685 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -5.977 " "Worst-case setup slack is -5.977" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995695 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995695 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -5.977          -11265.488 CLOCK_50  " "   -5.977          -11265.488 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995695 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995695 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.170 " "Worst-case hold slack is 0.170" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995751 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995751 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.170               0.000 CLOCK_50  " "    0.170               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995751 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995751 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995761 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995772 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995785 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995785 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8590.161 CLOCK_50  " "   -2.636           -8590.161 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602171995785 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171995785 ""}
+{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171997903 ""}
+{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171997907 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 6 s Quartus Prime " "Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1563 " "Peak virtual memory: 1563 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1602171998070 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  8 16:46:38 2020 " "Processing ended: Thu Oct  8 16:46:38 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1602171998070 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:12 " "Elapsed time: 00:00:12" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1602171998070 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:30 " "Total CPU time (on all processors): 00:00:30" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1602171998070 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602171998070 ""}
diff --git a/db/de1_soc_wrapper.sta.rdb b/db/de1_soc_wrapper.sta.rdb
index d5234de456f59daa00178132b5355e99b6e76423..7fac03a54fc6ee1b1d9b68bd7fc83fa960eab570 100644
Binary files a/db/de1_soc_wrapper.sta.rdb and b/db/de1_soc_wrapper.sta.rdb differ
diff --git a/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb b/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb
index cf3cd200c464a9c392beb1566ff424a0d66757cd..5403dcdd3c1b8a9fac276389491e8b0f81c31da3 100644
Binary files a/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb and b/db/de1_soc_wrapper.sta_cmp.6_slow_1100mv_85c.tdb differ
diff --git a/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb b/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb
index 20501c5d64877ff683abcd1f7ec575e2d0ee5303..4c762177c61989881de8209ff5d9ddf72f76fe68 100644
Binary files a/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb and b/db/de1_soc_wrapper.tiscmp.fast_1100mv_0c.ddb differ
diff --git a/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb b/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb
index 2ae2b46dd0c7839a14fe354805e1ded4b4cacb96..8a2753f5f582517c74623288bf24b9a848ef8b91 100644
Binary files a/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb and b/db/de1_soc_wrapper.tiscmp.fast_1100mv_85c.ddb differ
diff --git a/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb b/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb
index 357c9ea2ccda4ceefa70615d62c0b531ff18f063..5c852c260af5e3f0ce036b8db43dd041a3d3ad0d 100644
Binary files a/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb and b/db/de1_soc_wrapper.tiscmp.slow_1100mv_0c.ddb differ
diff --git a/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb b/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb
index a451b9cd202d8c0e0e1868597ebdd3a61204b6a2..c7f789abcf5868167ccf290989f4b254bf2f02d4 100644
Binary files a/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb and b/db/de1_soc_wrapper.tiscmp.slow_1100mv_85c.ddb differ
diff --git a/db/de1_soc_wrapper.tmw_info b/db/de1_soc_wrapper.tmw_info
index dd6088f280dfc891a71dbea479db3e7c0118c133..25754dad8d4c8a312f684007c5f0251fc09e3f8d 100644
--- a/db/de1_soc_wrapper.tmw_info
+++ b/db/de1_soc_wrapper.tmw_info
@@ -1,7 +1,7 @@
-start_full_compilation:s:00:02:58
+start_full_compilation:s:00:03:05
 start_analysis_synthesis:s:00:00:29-start_full_compilation
 start_analysis_elaboration:s-start_full_compilation
-start_fitter:s:00:02:03-start_full_compilation
+start_fitter:s:00:02:09-start_full_compilation
 start_assembler:s:00:00:10-start_full_compilation
-start_timing_analyzer:s:00:00:12-start_full_compilation
+start_timing_analyzer:s:00:00:13-start_full_compilation
 start_eda_netlist_writer:s:00:00:04-start_full_compilation
diff --git a/db/de1_soc_wrapper.vpr.ammdb b/db/de1_soc_wrapper.vpr.ammdb
index cd21ebf640ae9fec96c2fa310a78726912a9fe15..4fcdfc3b41d7b0398f380eb7a2f7d03ac33c6d9b 100644
Binary files a/db/de1_soc_wrapper.vpr.ammdb and b/db/de1_soc_wrapper.vpr.ammdb differ
diff --git a/db/prev_cmp_project24_09.qmsg b/db/prev_cmp_project24_09.qmsg
index 764c6843ac9488edacfcb6eb063e1254c001cd2e..743f9cf13901bceef99cc8f7cd15eedcaefaebed 100644
--- a/db/prev_cmp_project24_09.qmsg
+++ b/db/prev_cmp_project24_09.qmsg
@@ -1,186 +1,188 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1601549000987 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1601549000990 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  1 11:43:20 2020 " "Processing started: Thu Oct  1 11:43:20 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1601549000990 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549000990 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549000990 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1601549001600 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1601549001600 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/razzle.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/razzle.sv" { { "Info" "ISGN_ENTITY_NAME" "1 razzle " "Found entity 1: razzle" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549011011 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549011011 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_interconnect.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_interconnect.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_interconnect " "Found entity 1: ahb_interconnect" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549011024 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549011024 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_pixel_memory.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_pixel_memory.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_pixel_memory " "Found entity 1: ahb_pixel_memory" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 23 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549011036 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549011036 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_ram.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_ram.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_ram " "Found entity 1: ahb_ram" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 24 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549011043 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549011043 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_switches.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_switches.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_switches " "Found entity 1: ahb_switches" {  } { { "behavioural/ahb_switches.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_switches.sv" 32 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549011049 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549011049 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/arm_soc.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/arm_soc.sv" { { "Info" "ISGN_ENTITY_NAME" "1 arm_soc " "Found entity 1: arm_soc" {  } { { "behavioural/arm_soc.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 4 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549011057 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549011057 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/CORTEXM0DS.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/CORTEXM0DS.sv" { { "Info" "ISGN_ENTITY_NAME" "1 CORTEXM0DS " "Found entity 1: CORTEXM0DS" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549011069 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549011069 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/cortexm0ds_logic.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/cortexm0ds_logic.sv" { { "Info" "ISGN_ENTITY_NAME" "1 cortexm0ds_logic " "Found entity 1: cortexm0ds_logic" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549011128 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549011128 ""}
-{ "Warning" "WVRFX_L3_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "de1_soc_wrapper.sv(64) " "Verilog HDL information at de1_soc_wrapper.sv(64): always construct contains both blocking and non-blocking assignments" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 64 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: always construct contains both blocking and non-blocking assignments" 1 0 "Analysis & Synthesis" 0 -1 1601549011158 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/de1_soc_wrapper.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/de1_soc_wrapper.sv" { { "Info" "ISGN_ENTITY_NAME" "1 de1_soc_wrapper " "Found entity 1: de1_soc_wrapper" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549011162 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549011162 ""}
-{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Green_Data razzle.sv(43) " "Verilog HDL Implicit Net warning at razzle.sv(43): created implicit net for \"Green_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 43 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549011162 ""}
-{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Blue_Data razzle.sv(44) " "Verilog HDL Implicit Net warning at razzle.sv(44): created implicit net for \"Blue_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 44 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549011162 ""}
-{ "Info" "ISGN_START_ELABORATION_TOP" "de1_soc_wrapper " "Elaborating entity \"de1_soc_wrapper\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1601549011792 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 26 de1_soc_wrapper.sv(75) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(75): truncated value with size 32 to match size of target (26)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 75 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549011794 "|de1_soc_wrapper"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 7 de1_soc_wrapper.sv(87) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(87): truncated value with size 8 to match size of target (7)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 87 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549011795 "|de1_soc_wrapper"}
-{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR de1_soc_wrapper.sv(15) " "Output port \"LEDR\" at de1_soc_wrapper.sv(15) has no driver" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1601549011795 "|de1_soc_wrapper"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "arm_soc arm_soc:soc_inst " "Elaborating entity \"arm_soc\" for hierarchy \"arm_soc:soc_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "soc_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 42 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549011815 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CORTEXM0DS arm_soc:soc_inst\|CORTEXM0DS:m0_1 " "Elaborating entity \"CORTEXM0DS\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\"" {  } { { "behavioural/arm_soc.sv" "m0_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 58 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549011831 ""}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_msp CORTEXM0DS.sv(76) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(76): object \"cm0_msp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 76 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601549011833 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_psp CORTEXM0DS.sv(77) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(77): object \"cm0_psp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 77 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601549011833 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_pc CORTEXM0DS.sv(79) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(79): object \"cm0_pc\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 79 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601549011833 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_xpsr CORTEXM0DS.sv(80) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(80): object \"cm0_xpsr\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 80 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601549011834 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_control CORTEXM0DS.sv(81) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(81): object \"cm0_control\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 81 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601549011834 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_primask CORTEXM0DS.sv(82) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(82): object \"cm0_primask\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 82 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601549011834 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cortexm0ds_logic arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic " "Elaborating entity \"cortexm0ds_logic\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic\"" {  } { { "behavioural/CORTEXM0DS.sv" "u_logic" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 144 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549011834 ""}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "N4i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"N4i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601549011862 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
-{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "L5i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"L5i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1601549011862 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_interconnect arm_soc:soc_inst\|ahb_interconnect:interconnect_1 " "Elaborating entity \"ahb_interconnect\" for hierarchy \"arm_soc:soc_inst\|ahb_interconnect:interconnect_1\"" {  } { { "behavioural/arm_soc.sv" "interconnect_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 70 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549011864 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(39) " "Verilog HDL assignment warning at ahb_interconnect.sv(39): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 39 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549011865 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(41) " "Verilog HDL assignment warning at ahb_interconnect.sv(41): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 41 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549011865 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(43) " "Verilog HDL assignment warning at ahb_interconnect.sv(43): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 43 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549011865 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_ram arm_soc:soc_inst\|ahb_ram:ram_1 " "Elaborating entity \"ahb_ram\" for hierarchy \"arm_soc:soc_inst\|ahb_ram:ram_1\"" {  } { { "behavioural/arm_soc.sv" "ram_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 81 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549011866 ""}
-{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "139 0 4095 ahb_ram.sv(69) " "Verilog HDL warning at ahb_ram.sv(69): number of words (139) in memory file does not match the number of elements in the address range \[0:4095\]" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 69 0 0 } }  } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1601549011897 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_switches arm_soc:soc_inst\|ahb_switches:switches_1 " "Elaborating entity \"ahb_switches\" for hierarchy \"arm_soc:soc_inst\|ahb_switches:switches_1\"" {  } { { "behavioural/arm_soc.sv" "switches_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 91 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549012283 ""}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_pixel_memory arm_soc:soc_inst\|ahb_pixel_memory:pix1 " "Elaborating entity \"ahb_pixel_memory\" for hierarchy \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\"" {  } { { "behavioural/arm_soc.sv" "pix1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 97 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549012285 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ahb_pixel_memory.sv(93) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(93): truncated value with size 32 to match size of target (1)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 93 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549165753 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 19 ahb_pixel_memory.sv(97) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(97): truncated value with size 32 to match size of target (19)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 97 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549165754 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
-{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "razzle razzle:raz_inst " "Elaborating entity \"razzle\" for hierarchy \"razzle:raz_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "raz_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 49 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549165927 ""}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(33) " "Verilog HDL assignment warning at razzle.sv(33): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 33 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549165930 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(34) " "Verilog HDL assignment warning at razzle.sv(34): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 34 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549165930 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(35) " "Verilog HDL assignment warning at razzle.sv(35): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 35 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549165930 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 10 razzle.sv(54) " "Verilog HDL assignment warning at razzle.sv(54): truncated value with size 11 to match size of target (10)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 54 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549165930 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 9 razzle.sv(55) " "Verilog HDL assignment warning at razzle.sv(55): truncated value with size 11 to match size of target (9)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 55 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549165930 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(94) " "Verilog HDL assignment warning at razzle.sv(94): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 94 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549165930 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(112) " "Verilog HDL assignment warning at razzle.sv(112): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 112 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1601549165930 "|de1_soc_wrapper|razzle:raz_inst"}
-{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Inferred 2 megafunctions from design logic" { { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 1 " "Parameter WIDTH_A set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 19 " "Parameter WIDTHAD_A set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 307200 " "Parameter NUMWORDS_A set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 1 " "Parameter WIDTH_B set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 19 " "Parameter WIDTHAD_B set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 307200 " "Parameter NUMWORDS_B set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 32 " "Parameter WIDTH_A set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 12 " "Parameter WIDTHAD_A set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 4096 " "Parameter NUMWORDS_A set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 32 " "Parameter WIDTH_B set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 12 " "Parameter WIDTHAD_B set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 4096 " "Parameter NUMWORDS_B set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1601549170132 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1601549170132 ""}  } {  } 0 19000 "Inferred %1!d! megafunctions from design logic" 0 0 "Analysis & Synthesis" 0 -1 1601549170132 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549170222 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 1 " "Parameter \"WIDTH_A\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 19 " "Parameter \"WIDTHAD_A\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 307200 " "Parameter \"NUMWORDS_A\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 1 " "Parameter \"WIDTH_B\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 19 " "Parameter \"WIDTHAD_B\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 307200 " "Parameter \"NUMWORDS_B\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170222 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1601549170222 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_6ot1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_6ot1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_6ot1 " "Found entity 1: altsyncram_6ot1" {  } { { "db/altsyncram_6ot1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_6ot1.tdf" 32 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549170275 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549170275 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_3na.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_3na.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_3na " "Found entity 1: decode_3na" {  } { { "db/decode_3na.tdf" "" { Text "/home/ks6n19/Documents/project/db/decode_3na.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549170332 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549170332 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_chb.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mux_chb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_chb " "Found entity 1: mux_chb" {  } { { "db/mux_chb.tdf" "" { Text "/home/ks6n19/Documents/project/db/mux_chb.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549170377 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549170377 ""}
-{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549170389 ""}
-{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 32 " "Parameter \"WIDTH_A\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 12 " "Parameter \"WIDTHAD_A\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 4096 " "Parameter \"NUMWORDS_A\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 32 " "Parameter \"WIDTH_B\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 12 " "Parameter \"WIDTHAD_B\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 4096 " "Parameter \"NUMWORDS_B\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1601549170389 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1601549170389 ""}
-{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_nms1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_nms1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_nms1 " "Found entity 1: altsyncram_nms1" {  } { { "db/altsyncram_nms1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_nms1.tdf" 28 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1601549170436 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549170436 ""}
-{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[0\] GND " "Pin \"LEDR\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|LEDR[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[1\] GND " "Pin \"LEDR\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|LEDR[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[2\] GND " "Pin \"LEDR\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|LEDR[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[3\] GND " "Pin \"LEDR\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|LEDR[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[4\] GND " "Pin \"LEDR\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|LEDR[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[5\] GND " "Pin \"LEDR\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|LEDR[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[6\] GND " "Pin \"LEDR\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|LEDR[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[7\] GND " "Pin \"LEDR\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|LEDR[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[8\] GND " "Pin \"LEDR\[8\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|LEDR[8]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[9\] GND " "Pin \"LEDR\[9\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|LEDR[9]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[0\] VCC " "Pin \"HEX0\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX0[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[1\] VCC " "Pin \"HEX0\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX0[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[5\] VCC " "Pin \"HEX0\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX0[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[1\] VCC " "Pin \"HEX1\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX1[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[2\] VCC " "Pin \"HEX1\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX1[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[3\] VCC " "Pin \"HEX1\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX1[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[4\] VCC " "Pin \"HEX1\[4\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX1[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[5\] VCC " "Pin \"HEX1\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX1[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[6\] VCC " "Pin \"HEX1\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX1[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[0\] VCC " "Pin \"HEX2\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[1\] VCC " "Pin \"HEX2\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX2[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[2\] VCC " "Pin \"HEX2\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX2[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[3\] VCC " "Pin \"HEX2\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX2[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[5\] VCC " "Pin \"HEX2\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX2[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[0\] VCC " "Pin \"HEX3\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX3[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[1\] VCC " "Pin \"HEX3\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX3[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[2\] VCC " "Pin \"HEX3\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX3[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[6\] VCC " "Pin \"HEX3\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|HEX3[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[0\] GND " "Pin \"VGA_G\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_G[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[1\] GND " "Pin \"VGA_G\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_G[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[2\] GND " "Pin \"VGA_G\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_G[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[3\] GND " "Pin \"VGA_G\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_G[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[4\] GND " "Pin \"VGA_G\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_G[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[5\] GND " "Pin \"VGA_G\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_G[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[6\] GND " "Pin \"VGA_G\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_G[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[7\] GND " "Pin \"VGA_G\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_G[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[0\] GND " "Pin \"VGA_B\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_B[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[1\] GND " "Pin \"VGA_B\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_B[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[2\] GND " "Pin \"VGA_B\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_B[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[3\] GND " "Pin \"VGA_B\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_B[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[4\] GND " "Pin \"VGA_B\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_B[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[5\] GND " "Pin \"VGA_B\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_B[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[6\] GND " "Pin \"VGA_B\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_B[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[7\] GND " "Pin \"VGA_B\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1601549173943 "|de1_soc_wrapper|VGA_B[7]"}  } {  } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1601549173943 ""}
-{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" {  } {  } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1601549174152 ""}
-{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "17 " "17 registers lost all their fanouts during netlist optimizations." {  } {  } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1601549180960 ""}
-{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549181111 ""}
-{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" {  } {  } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1601549181500 ""}  } {  } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1601549181500 ""}
-{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[3\] " "No output dependent on input pin \"KEY\[3\]\"" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 13 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1601549181846 "|de1_soc_wrapper|KEY[3]"}  } {  } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1601549181846 ""}
-{ "Info" "ICUT_CUT_TM_SUMMARY" "3988 " "Implemented 3988 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1601549181858 ""} { "Info" "ICUT_CUT_TM_OPINS" "66 " "Implemented 66 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1601549181858 ""} { "Info" "ICUT_CUT_TM_LCELLS" "3837 " "Implemented 3837 logic cells" {  } {  } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1601549181858 ""} { "Info" "ICUT_CUT_TM_RAMS" "70 " "Implemented 70 RAM segments" {  } {  } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1601549181858 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1601549181858 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 74 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 74 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1299 " "Peak virtual memory: 1299 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1601549181901 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  1 11:46:21 2020 " "Processing ended: Thu Oct  1 11:46:21 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1601549181901 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:03:01 " "Elapsed time: 00:03:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1601549181901 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:03:15 " "Total CPU time (on all processors): 00:03:15" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1601549181901 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1601549181901 ""}
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Analysis & Synthesis" 0 -1 1601549183318 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus Prime " "Running Quartus Prime Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1601549183320 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  1 11:46:22 2020 " "Processing started: Thu Oct  1 11:46:22 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1601549183320 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Fitter" 0 -1 1601549183320 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_fit --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Fitter" 0 -1 1601549183320 ""}
-{ "Info" "0" "" "qfit2_default_script.tcl version: #1" {  } {  } 0 0 "qfit2_default_script.tcl version: #1" 0 0 "Fitter" 0 0 1601549183714 ""}
-{ "Info" "0" "" "Project  = project24_09" {  } {  } 0 0 "Project  = project24_09" 0 0 "Fitter" 0 0 1601549183715 ""}
-{ "Info" "0" "" "Revision = de1_soc_wrapper" {  } {  } 0 0 "Revision = de1_soc_wrapper" 0 0 "Fitter" 0 0 1601549183715 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Fitter" 0 -1 1601549183928 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1601549183930 ""}
-{ "Info" "IMPP_MPP_USER_DEVICE" "de1_soc_wrapper 5CSEMA5F31C6 " "Selected device 5CSEMA5F31C6 for design \"de1_soc_wrapper\"" {  } {  } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1601549183974 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1601549184018 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1601549184019 ""}
-{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1601549184667 ""}
-{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" {  } {  } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1601549184873 ""}
-{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1601549184941 ""}
-{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" {  } {  } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1601549197772 ""}
-{ "Info" "ICCLK_CLOCKS_TOP" "1  (1 global) " "Promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "CLOCK_50~inputCLKENA0 1020 global CLKCTRL_G6 " "CLOCK_50~inputCLKENA0 with 1020 fanout uses global clock CLKCTRL_G6" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1601549198005 ""}  } {  } 0 11178 "Promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1601549198005 ""}
-{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "1  (1 global) " "Automatically promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "KEY\[2\]~inputCLKENA0 942 global CLKCTRL_G4 " "KEY\[2\]~inputCLKENA0 with 942 fanout uses global clock CLKCTRL_G4" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1601549198005 ""}  } {  } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1601549198005 ""}
-{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" {  } {  } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601549198006 ""}
-{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" {  } {  } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1601549198035 ""}
-{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" {  } {  } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1601549198040 ""}
-{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" {  } {  } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1601549198048 ""}
-{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" {  } {  } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1601549198057 ""}
-{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" {  } {  } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1601549198057 ""}
-{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" {  } {  } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1601549198061 ""}
-{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1601549199300 ""}
-{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" {  } {  } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1601549199300 ""}
-{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1601549199355 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1601549199355 ""}
-{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." {  } {  } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1601549199356 ""}
-{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" {  } {  } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1601549199641 ""}
-{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" {  } {  } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1601549199647 ""}  } {  } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1601549199647 ""}
-{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_CS_N " "Node \"ADC_CS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_CS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_DIN " "Node \"ADC_DIN\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_DIN" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_DOUT " "Node \"ADC_DOUT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_DOUT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_SCLK " "Node \"ADC_SCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_SCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_ADCDAT " "Node \"AUD_ADCDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_ADCDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_ADCLRCK " "Node \"AUD_ADCLRCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_ADCLRCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_BCLK " "Node \"AUD_BCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_BCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_DACDAT " "Node \"AUD_DACDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_DACDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_DACLRCK " "Node \"AUD_DACLRCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_DACLRCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_XCK " "Node \"AUD_XCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_XCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK2_50 " "Node \"CLOCK2_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK2_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK3_50 " "Node \"CLOCK3_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK3_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK4_50 " "Node \"CLOCK4_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK4_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[0\] " "Node \"DRAM_ADDR\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[10\] " "Node \"DRAM_ADDR\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[11\] " "Node \"DRAM_ADDR\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[12\] " "Node \"DRAM_ADDR\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[1\] " "Node \"DRAM_ADDR\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[2\] " "Node \"DRAM_ADDR\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[3\] " "Node \"DRAM_ADDR\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[4\] " "Node \"DRAM_ADDR\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[5\] " "Node \"DRAM_ADDR\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[6\] " "Node \"DRAM_ADDR\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[7\] " "Node \"DRAM_ADDR\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[8\] " "Node \"DRAM_ADDR\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[9\] " "Node \"DRAM_ADDR\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_BA\[0\] " "Node \"DRAM_BA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_BA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_BA\[1\] " "Node \"DRAM_BA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_BA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CAS_N " "Node \"DRAM_CAS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CAS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CKE " "Node \"DRAM_CKE\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CKE" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CLK " "Node \"DRAM_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CS_N " "Node \"DRAM_CS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[0\] " "Node \"DRAM_DQ\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[10\] " "Node \"DRAM_DQ\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[11\] " "Node \"DRAM_DQ\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[12\] " "Node \"DRAM_DQ\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[13\] " "Node \"DRAM_DQ\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[14\] " "Node \"DRAM_DQ\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[15\] " "Node \"DRAM_DQ\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[1\] " "Node \"DRAM_DQ\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[2\] " "Node \"DRAM_DQ\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[3\] " "Node \"DRAM_DQ\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[4\] " "Node \"DRAM_DQ\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[5\] " "Node \"DRAM_DQ\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[6\] " "Node \"DRAM_DQ\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[7\] " "Node \"DRAM_DQ\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[8\] " "Node \"DRAM_DQ\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[9\] " "Node \"DRAM_DQ\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_LDQM " "Node \"DRAM_LDQM\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_LDQM" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_RAS_N " "Node \"DRAM_RAS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_RAS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_UDQM " "Node \"DRAM_UDQM\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_UDQM" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_WE_N " "Node \"DRAM_WE_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_WE_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FAN_CTRL " "Node \"FAN_CTRL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FAN_CTRL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FPGA_I2C_SCLK " "Node \"FPGA_I2C_SCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FPGA_I2C_SCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FPGA_I2C_SDAT " "Node \"FPGA_I2C_SDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FPGA_I2C_SDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[0\] " "Node \"GPIO_0\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[10\] " "Node \"GPIO_0\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[11\] " "Node \"GPIO_0\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[12\] " "Node \"GPIO_0\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[13\] " "Node \"GPIO_0\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[14\] " "Node \"GPIO_0\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[15\] " "Node \"GPIO_0\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[16\] " "Node \"GPIO_0\[16\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[16\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[17\] " "Node \"GPIO_0\[17\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[17\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[18\] " "Node \"GPIO_0\[18\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[18\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[19\] " "Node \"GPIO_0\[19\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[19\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[1\] " "Node \"GPIO_0\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[20\] " "Node \"GPIO_0\[20\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[20\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[21\] " "Node \"GPIO_0\[21\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[21\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[22\] " "Node \"GPIO_0\[22\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[22\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[23\] " "Node \"GPIO_0\[23\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[23\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[24\] " "Node \"GPIO_0\[24\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[24\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[25\] " "Node \"GPIO_0\[25\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[25\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[26\] " "Node \"GPIO_0\[26\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[26\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[27\] " "Node \"GPIO_0\[27\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[27\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[28\] " "Node \"GPIO_0\[28\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[28\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[29\] " "Node \"GPIO_0\[29\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[29\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[2\] " "Node \"GPIO_0\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[30\] " "Node \"GPIO_0\[30\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[30\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[31\] " "Node \"GPIO_0\[31\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[31\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[32\] " "Node \"GPIO_0\[32\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[32\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[33\] " "Node \"GPIO_0\[33\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[33\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[34\] " "Node \"GPIO_0\[34\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[34\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[35\] " "Node \"GPIO_0\[35\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[35\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[3\] " "Node \"GPIO_0\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[4\] " "Node \"GPIO_0\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[5\] " "Node \"GPIO_0\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[6\] " "Node \"GPIO_0\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[7\] " "Node \"GPIO_0\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[8\] " "Node \"GPIO_0\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[9\] " "Node \"GPIO_0\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[0\] " "Node \"GPIO_1\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[10\] " "Node \"GPIO_1\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[11\] " "Node \"GPIO_1\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[12\] " "Node \"GPIO_1\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[13\] " "Node \"GPIO_1\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[14\] " "Node \"GPIO_1\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[15\] " "Node \"GPIO_1\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[16\] " "Node \"GPIO_1\[16\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[16\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[17\] " "Node \"GPIO_1\[17\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[17\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[18\] " "Node \"GPIO_1\[18\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[18\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[19\] " "Node \"GPIO_1\[19\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[19\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[1\] " "Node \"GPIO_1\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[20\] " "Node \"GPIO_1\[20\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[20\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[21\] " "Node \"GPIO_1\[21\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[21\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[22\] " "Node \"GPIO_1\[22\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[22\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[23\] " "Node \"GPIO_1\[23\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[23\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[24\] " "Node \"GPIO_1\[24\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[24\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[25\] " "Node \"GPIO_1\[25\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[25\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[26\] " "Node \"GPIO_1\[26\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[26\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[27\] " "Node \"GPIO_1\[27\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[27\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[28\] " "Node \"GPIO_1\[28\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[28\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[29\] " "Node \"GPIO_1\[29\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[29\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[2\] " "Node \"GPIO_1\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[30\] " "Node \"GPIO_1\[30\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[30\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[31\] " "Node \"GPIO_1\[31\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[31\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[32\] " "Node \"GPIO_1\[32\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[32\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[33\] " "Node \"GPIO_1\[33\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[33\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[34\] " "Node \"GPIO_1\[34\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[34\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[35\] " "Node \"GPIO_1\[35\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[35\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[3\] " "Node \"GPIO_1\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[4\] " "Node \"GPIO_1\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[5\] " "Node \"GPIO_1\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[6\] " "Node \"GPIO_1\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[7\] " "Node \"GPIO_1\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[8\] " "Node \"GPIO_1\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[9\] " "Node \"GPIO_1\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[0\] " "Node \"HEX4\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[1\] " "Node \"HEX4\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[2\] " "Node \"HEX4\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[3\] " "Node \"HEX4\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[4\] " "Node \"HEX4\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[5\] " "Node \"HEX4\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[6\] " "Node \"HEX4\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[0\] " "Node \"HEX5\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[1\] " "Node \"HEX5\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[2\] " "Node \"HEX5\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[3\] " "Node \"HEX5\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[4\] " "Node \"HEX5\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[5\] " "Node \"HEX5\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[6\] " "Node \"HEX5\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "IRDA_RXD " "Node \"IRDA_RXD\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "IRDA_RXD" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "IRDA_TXD " "Node \"IRDA_TXD\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "IRDA_TXD" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_CLK " "Node \"PS2_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_CLK2 " "Node \"PS2_CLK2\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_CLK2" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_DAT " "Node \"PS2_DAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_DAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_DAT2 " "Node \"PS2_DAT2\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_DAT2" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_CLK27 " "Node \"TD_CLK27\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_CLK27" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[0\] " "Node \"TD_DATA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[1\] " "Node \"TD_DATA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[2\] " "Node \"TD_DATA\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[3\] " "Node \"TD_DATA\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[4\] " "Node \"TD_DATA\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[5\] " "Node \"TD_DATA\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[6\] " "Node \"TD_DATA\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[7\] " "Node \"TD_DATA\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_HS " "Node \"TD_HS\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_HS" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_RESET_N " "Node \"TD_RESET_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_RESET_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_VS " "Node \"TD_VS\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_VS" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_CLK " "Node \"USB_B2_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[0\] " "Node \"USB_B2_DATA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[1\] " "Node \"USB_B2_DATA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[2\] " "Node \"USB_B2_DATA\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[3\] " "Node \"USB_B2_DATA\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[4\] " "Node \"USB_B2_DATA\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[5\] " "Node \"USB_B2_DATA\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[6\] " "Node \"USB_B2_DATA\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[7\] " "Node \"USB_B2_DATA\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_EMPTY " "Node \"USB_EMPTY\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_EMPTY" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_FULL " "Node \"USB_FULL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_FULL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_OE_N " "Node \"USB_OE_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_OE_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_RD_N " "Node \"USB_RD_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_RD_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_RESET_N " "Node \"USB_RESET_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_RESET_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_SCL " "Node \"USB_SCL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_SCL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_SDA " "Node \"USB_SDA\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_SDA" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_WR_N " "Node \"USB_WR_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_WR_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "VGA_SYNC_N " "Node \"VGA_SYNC_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "VGA_SYNC_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1601549199820 ""}  } {  } 0 15705 "Ignored locations or region assignments to the following nodes" 0 0 "Fitter" 0 -1 1601549199820 ""}
-{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:15 " "Fitter preparation operations ending: elapsed time is 00:00:15" {  } {  } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601549199825 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" {  } {  } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1601549204922 ""}
-{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." {  } {  } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1601549205686 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:15 " "Fitter placement preparation operations ending: elapsed time is 00:00:15" {  } {  } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601549220256 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" {  } {  } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1601549236608 ""}
-{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" {  } {  } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1601549245099 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:09 " "Fitter placement operations ending: elapsed time is 00:00:09" {  } {  } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601549245100 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" {  } {  } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1601549247005 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Router estimated average interconnect usage is 2% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "35 X22_Y11 X32_Y22 " "Router estimated peak interconnect usage is 35% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22" {  } { { "loc" "" { Generic "/home/ks6n19/Documents/project/" { { 1 { 0 "Router estimated peak interconnect usage is 35% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22"} { { 12 { 0 ""} 22 11 11 12 }  }  }  }  } }  } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1601549254975 ""}  } {  } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1601549254975 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" {  } {  } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1601549280819 ""}  } {  } 0 170199 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1601549280819 ""}
-{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:30 " "Fitter routing operations ending: elapsed time is 00:00:30" {  } {  } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601549280823 ""}
-{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 5.77 " "Total time spent on timing analysis during the Fitter is 5.77 seconds." {  } {  } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1601549288758 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1601549288859 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1601549290037 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1601549290041 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1601549291172 ""}
-{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:10 " "Fitter post-fit operations ending: elapsed time is 00:00:10" {  } {  } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1601549298776 ""}
-{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." {  } {  } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1601549299056 ""}
-{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1601549299397 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 182 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 182 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "2652 " "Peak virtual memory: 2652 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1601549301188 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  1 11:48:21 2020 " "Processing ended: Thu Oct  1 11:48:21 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1601549301188 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:01:59 " "Elapsed time: 00:01:59" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1601549301188 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:11:09 " "Total CPU time (on all processors): 00:11:09" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1601549301188 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1601549301188 ""}
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Fitter" 0 -1 1601549303355 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1601549303358 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  1 11:48:23 2020 " "Processing started: Thu Oct  1 11:48:23 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1601549303358 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1601549303358 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1601549303358 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1601549304482 ""}
-{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1601549311616 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1  Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1111 " "Peak virtual memory: 1111 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1601549312232 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  1 11:48:32 2020 " "Processing ended: Thu Oct  1 11:48:32 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1601549312232 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1601549312232 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:08 " "Total CPU time (on all processors): 00:00:08" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1601549312232 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1601549312232 ""}
-{ "Info" "IFLOW_DISABLED_MODULE" "PowerPlay Power Analyzer FLOW_ENABLE_POWER_ANALYZER " "Skipped module PowerPlay Power Analyzer due to the assignment FLOW_ENABLE_POWER_ANALYZER" {  } {  } 0 293026 "Skipped module %1!s! due to the assignment %2!s!" 0 0 "Assembler" 0 -1 1601549312942 ""}
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Assembler" 0 -1 1601549313940 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus Prime " "Running Quartus Prime TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1601549313942 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  1 11:48:33 2020 " "Processing started: Thu Oct  1 11:48:33 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1601549313942 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549313942 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta project24_09 -c de1_soc_wrapper " "Command: quartus_sta project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549313942 ""}
-{ "Info" "0" "" "qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "TimeQuest Timing Analyzer" 0 0 1601549314248 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549315087 ""}
-{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549315088 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549315130 ""}
-{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549315130 ""}
-{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549316124 ""}
-{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549316124 ""}
-{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLOCK_50 CLOCK_50 " "create_clock -period 1.000 -name CLOCK_50 CLOCK_50" {  } {  } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1601549316152 ""}  } {  } 0 332105 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549316152 ""}
-{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549316179 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549316180 ""}
-{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" {  } {  } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "TimeQuest Timing Analyzer" 0 0 1601549316182 ""}
-{ "Info" "0" "" "Analyzing Slow 1100mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1601549316204 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1601549317228 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549317228 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -10.717 " "Worst-case setup slack is -10.717" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549317237 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549317237 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -10.717          -21621.074 CLOCK_50  " "  -10.717          -21621.074 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549317237 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549317237 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.372 " "Worst-case hold slack is 0.372" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549317289 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549317289 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.372               0.000 CLOCK_50  " "    0.372               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549317289 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549317289 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549317298 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549317305 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549317315 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549317315 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9168.793 CLOCK_50  " "   -2.636           -9168.793 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549317315 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549317315 ""}
-{ "Info" "0" "" "Analyzing Slow 1100mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1601549317350 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549317401 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549319369 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549319679 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1601549319820 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549319820 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -10.487 " "Worst-case setup slack is -10.487" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549319828 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549319828 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -10.487          -20926.712 CLOCK_50  " "  -10.487          -20926.712 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549319828 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549319828 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.369 " "Worst-case hold slack is 0.369" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549319880 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549319880 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.369               0.000 CLOCK_50  " "    0.369               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549319880 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549319880 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549319888 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549319896 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549319910 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549319910 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9200.409 CLOCK_50  " "   -2.636           -9200.409 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549319910 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549319910 ""}
-{ "Info" "0" "" "Analyzing Fast 1100mV 85C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1601549319944 ""}
-{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549320147 ""}
-{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549321930 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322249 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1601549322297 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322297 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -6.177 " "Worst-case setup slack is -6.177" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322307 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322307 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -6.177          -12052.251 CLOCK_50  " "   -6.177          -12052.251 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322307 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322307 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.180 " "Worst-case hold slack is 0.180" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322361 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322361 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.180               0.000 CLOCK_50  " "    0.180               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322361 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322361 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322369 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322378 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322387 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322387 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8584.106 CLOCK_50  " "   -2.636           -8584.106 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322387 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322387 ""}
-{ "Info" "0" "" "Analyzing Fast 1100mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1601549322421 ""}
-{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322762 ""}
-{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1601549322809 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322809 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "setup -5.437 " "Worst-case setup slack is -5.437" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322817 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322817 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -5.437          -10407.325 CLOCK_50  " "   -5.437          -10407.325 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322817 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322817 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.171 " "Worst-case hold slack is 0.171" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322871 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322871 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.171               0.000 CLOCK_50  " "    0.171               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322871 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322871 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322878 ""}
-{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322885 ""}
-{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8588.168 CLOCK_50  " "   -2.636           -8588.168 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1601549322895 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549322895 ""}
-{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549324950 ""}
-{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549324954 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 6 s Quartus Prime " "Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1568 " "Peak virtual memory: 1568 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1601549325098 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  1 11:48:45 2020 " "Processing ended: Thu Oct  1 11:48:45 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1601549325098 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:12 " "Elapsed time: 00:00:12" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1601549325098 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:29 " "Total CPU time (on all processors): 00:00:29" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1601549325098 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549325098 ""}
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "TimeQuest Timing Analyzer" 0 -1 1601549326316 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1601549326319 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  1 11:48:46 2020 " "Processing started: Thu Oct  1 11:48:46 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1601549326319 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1601549326319 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1601549326319 ""}
-{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "EDA Netlist Writer" 0 -1 1601549327353 ""}
-{ "Warning" "WQNETO_SWITCH_TO_FUNCTIONAL_SIMULATION" "" "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." {  } {  } 0 10905 "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." 0 0 "EDA Netlist Writer" 0 -1 1601549327451 ""}
-{ "Info" "IWSC_DONE_HDL_GENERATION" "de1_soc_wrapper.vo /home/ks6n19/Documents/project/simulation/modelsim/ simulation " "Generated file de1_soc_wrapper.vo in folder \"/home/ks6n19/Documents/project/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1601549328520 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 2 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1314 " "Peak virtual memory: 1314 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1601549328686 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  1 11:48:48 2020 " "Processing ended: Thu Oct  1 11:48:48 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1601549328686 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1601549328686 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1601549328686 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1601549328686 ""}
-{ "Info" "IFLOW_ERROR_COUNT" "Full Compilation 0 s 265 s " "Quartus Prime Full Compilation was successful. 0 errors, 265 warnings" {  } {  } 0 293000 "Quartus Prime %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1601549328914 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1602170521749 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1602170521752 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  8 16:22:01 2020 " "Processing started: Thu Oct  8 16:22:01 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1602170521752 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170521752 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170521752 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1602170522440 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1602170522440 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/razzle.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/razzle.sv" { { "Info" "ISGN_ENTITY_NAME" "1 razzle " "Found entity 1: razzle" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170531719 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170531719 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_interconnect.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_interconnect.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_interconnect " "Found entity 1: ahb_interconnect" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170531723 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170531723 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_pixel_memory.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_pixel_memory.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_pixel_memory " "Found entity 1: ahb_pixel_memory" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 23 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170531727 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170531727 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_ram.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_ram.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_ram " "Found entity 1: ahb_ram" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 24 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170531733 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170531733 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/ahb_switches.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/ahb_switches.sv" { { "Info" "ISGN_ENTITY_NAME" "1 ahb_switches " "Found entity 1: ahb_switches" {  } { { "behavioural/ahb_switches.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_switches.sv" 32 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170531736 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170531736 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/arm_soc.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/arm_soc.sv" { { "Info" "ISGN_ENTITY_NAME" "1 arm_soc " "Found entity 1: arm_soc" {  } { { "behavioural/arm_soc.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 4 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170531740 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170531740 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/CORTEXM0DS.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/CORTEXM0DS.sv" { { "Info" "ISGN_ENTITY_NAME" "1 CORTEXM0DS " "Found entity 1: CORTEXM0DS" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170531745 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170531745 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/cortexm0ds_logic.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/cortexm0ds_logic.sv" { { "Info" "ISGN_ENTITY_NAME" "1 cortexm0ds_logic " "Found entity 1: cortexm0ds_logic" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 27 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170531789 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170531789 ""}
+{ "Warning" "WVRFX_L3_VERI_MIXED_BLOCKING_NONBLOCKING_ASSIGNMENT" "de1_soc_wrapper.sv(64) " "Verilog HDL information at de1_soc_wrapper.sv(64): always construct contains both blocking and non-blocking assignments" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 64 0 0 } }  } 0 10268 "Verilog HDL information at %1!s!: always construct contains both blocking and non-blocking assignments" 1 0 "Analysis & Synthesis" 0 -1 1602170531793 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "behavioural/de1_soc_wrapper.sv 1 1 " "Found 1 design units, including 1 entities, in source file behavioural/de1_soc_wrapper.sv" { { "Info" "ISGN_ENTITY_NAME" "1 de1_soc_wrapper " "Found entity 1: de1_soc_wrapper" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 8 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170531795 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170531795 ""}
+{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Green_Data razzle.sv(43) " "Verilog HDL Implicit Net warning at razzle.sv(43): created implicit net for \"Green_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 43 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170531795 ""}
+{ "Warning" "WVRFX_L2_VERI_CREATED_IMPLICIT_NET" "Blue_Data razzle.sv(44) " "Verilog HDL Implicit Net warning at razzle.sv(44): created implicit net for \"Blue_Data\"" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 44 0 0 } }  } 0 10236 "Verilog HDL Implicit Net warning at %2!s!: created implicit net for \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170531795 ""}
+{ "Info" "ISGN_START_ELABORATION_TOP" "de1_soc_wrapper " "Elaborating entity \"de1_soc_wrapper\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1602170532112 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 26 de1_soc_wrapper.sv(75) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(75): truncated value with size 32 to match size of target (26)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 75 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532114 "|de1_soc_wrapper"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 7 de1_soc_wrapper.sv(87) " "Verilog HDL assignment warning at de1_soc_wrapper.sv(87): truncated value with size 8 to match size of target (7)" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 87 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532114 "|de1_soc_wrapper"}
+{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR de1_soc_wrapper.sv(15) " "Output port \"LEDR\" at de1_soc_wrapper.sv(15) has no driver" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1602170532115 "|de1_soc_wrapper"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "arm_soc arm_soc:soc_inst " "Elaborating entity \"arm_soc\" for hierarchy \"arm_soc:soc_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "soc_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 42 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170532139 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CORTEXM0DS arm_soc:soc_inst\|CORTEXM0DS:m0_1 " "Elaborating entity \"CORTEXM0DS\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\"" {  } { { "behavioural/arm_soc.sv" "m0_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 58 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170532160 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_msp CORTEXM0DS.sv(76) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(76): object \"cm0_msp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 76 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602170532162 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_psp CORTEXM0DS.sv(77) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(77): object \"cm0_psp\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 77 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602170532162 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_pc CORTEXM0DS.sv(79) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(79): object \"cm0_pc\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 79 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602170532162 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_xpsr CORTEXM0DS.sv(80) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(80): object \"cm0_xpsr\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 80 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602170532162 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_control CORTEXM0DS.sv(81) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(81): object \"cm0_control\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 81 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602170532162 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "cm0_primask CORTEXM0DS.sv(82) " "Verilog HDL or VHDL warning at CORTEXM0DS.sv(82): object \"cm0_primask\" assigned a value but never read" {  } { { "behavioural/CORTEXM0DS.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 82 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602170532162 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cortexm0ds_logic arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic " "Elaborating entity \"cortexm0ds_logic\" for hierarchy \"arm_soc:soc_inst\|CORTEXM0DS:m0_1\|cortexm0ds_logic:u_logic\"" {  } { { "behavioural/CORTEXM0DS.sv" "u_logic" { Text "/home/ks6n19/Documents/project/behavioural/CORTEXM0DS.sv" 144 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170532163 ""}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "N4i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"N4i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602170532191 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
+{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "L5i2z4 cortexm0ds_logic.sv(1133) " "Verilog HDL or VHDL warning at cortexm0ds_logic.sv(1133): object \"L5i2z4\" assigned a value but never read" {  } { { "behavioural/cortexm0ds_logic.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/cortexm0ds_logic.sv" 1133 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Analysis & Synthesis" 0 -1 1602170532191 "|de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_interconnect arm_soc:soc_inst\|ahb_interconnect:interconnect_1 " "Elaborating entity \"ahb_interconnect\" for hierarchy \"arm_soc:soc_inst\|ahb_interconnect:interconnect_1\"" {  } { { "behavioural/arm_soc.sv" "interconnect_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 70 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170532193 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(39) " "Verilog HDL assignment warning at ahb_interconnect.sv(39): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 39 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532196 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(41) " "Verilog HDL assignment warning at ahb_interconnect.sv(41): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 41 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532196 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 3 ahb_interconnect.sv(43) " "Verilog HDL assignment warning at ahb_interconnect.sv(43): truncated value with size 32 to match size of target (3)" {  } { { "behavioural/ahb_interconnect.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv" 43 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532196 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_ram arm_soc:soc_inst\|ahb_ram:ram_1 " "Elaborating entity \"ahb_ram\" for hierarchy \"arm_soc:soc_inst\|ahb_ram:ram_1\"" {  } { { "behavioural/arm_soc.sv" "ram_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 81 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170532197 ""}
+{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "207 0 4095 ahb_ram.sv(69) " "Verilog HDL warning at ahb_ram.sv(69): number of words (207) in memory file does not match the number of elements in the address range \[0:4095\]" {  } { { "behavioural/ahb_ram.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_ram.sv" 69 0 0 } }  } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1602170532230 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_switches arm_soc:soc_inst\|ahb_switches:switches_1 " "Elaborating entity \"ahb_switches\" for hierarchy \"arm_soc:soc_inst\|ahb_switches:switches_1\"" {  } { { "behavioural/arm_soc.sv" "switches_1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 91 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170532613 ""}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ahb_pixel_memory arm_soc:soc_inst\|ahb_pixel_memory:pix1 " "Elaborating entity \"ahb_pixel_memory\" for hierarchy \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\"" {  } { { "behavioural/arm_soc.sv" "pix1" { Text "/home/ks6n19/Documents/project/behavioural/arm_soc.sv" 97 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170532615 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ahb_pixel_memory.sv(93) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(93): truncated value with size 32 to match size of target (1)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 93 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532616 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 19 ahb_pixel_memory.sv(97) " "Verilog HDL assignment warning at ahb_pixel_memory.sv(97): truncated value with size 32 to match size of target (19)" {  } { { "behavioural/ahb_pixel_memory.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv" 97 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532617 "|de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1"}
+{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "razzle razzle:raz_inst " "Elaborating entity \"razzle\" for hierarchy \"razzle:raz_inst\"" {  } { { "behavioural/de1_soc_wrapper.sv" "raz_inst" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 49 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170532618 ""}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(33) " "Verilog HDL assignment warning at razzle.sv(33): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 33 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532619 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(34) " "Verilog HDL assignment warning at razzle.sv(34): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 34 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532619 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 razzle.sv(35) " "Verilog HDL assignment warning at razzle.sv(35): truncated value with size 32 to match size of target (8)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 35 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532619 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 10 razzle.sv(54) " "Verilog HDL assignment warning at razzle.sv(54): truncated value with size 11 to match size of target (10)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 54 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532619 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "11 9 razzle.sv(55) " "Verilog HDL assignment warning at razzle.sv(55): truncated value with size 11 to match size of target (9)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 55 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532619 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(94) " "Verilog HDL assignment warning at razzle.sv(94): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 94 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532619 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 11 razzle.sv(112) " "Verilog HDL assignment warning at razzle.sv(112): truncated value with size 32 to match size of target (11)" {  } { { "behavioural/razzle.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/razzle.sv" 112 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1602170532619 "|de1_soc_wrapper|razzle:raz_inst"}
+{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Inferred 2 megafunctions from design logic" { { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 1 " "Parameter WIDTH_A set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 19 " "Parameter WIDTHAD_A set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 307200 " "Parameter NUMWORDS_A set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 1 " "Parameter WIDTH_B set to 1" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 19 " "Parameter WIDTHAD_B set to 19" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 307200 " "Parameter NUMWORDS_B set to 307200" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "IINFER_ALTSYNCRAM_INFERRED" "arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"arm_soc:soc_inst\|ahb_ram:ram_1\|memory_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE DUAL_PORT " "Parameter OPERATION_MODE set to DUAL_PORT" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 32 " "Parameter WIDTH_A set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 12 " "Parameter WIDTHAD_A set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 4096 " "Parameter NUMWORDS_A set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_B 32 " "Parameter WIDTH_B set to 32" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_B 12 " "Parameter WIDTHAD_B set to 12" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_B 4096 " "Parameter NUMWORDS_B set to 4096" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_B UNREGISTERED " "Parameter OUTDATA_REG_B set to UNREGISTERED" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_B NONE " "Parameter ADDRESS_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_B NONE " "Parameter OUTDATA_ACLR_B set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_REG_B CLOCK0 " "Parameter ADDRESS_REG_B set to CLOCK0" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter INIT_FILE set to db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA" {  } {  } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1602170536821 ""}  } {  } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1602170536821 ""}  } {  } 0 19000 "Inferred %1!d! megafunctions from design logic" 0 0 "Analysis & Synthesis" 0 -1 1602170536821 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170536902 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_pixel_memory:pix1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 1 " "Parameter \"WIDTH_A\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 19 " "Parameter \"WIDTHAD_A\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 307200 " "Parameter \"NUMWORDS_A\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 1 " "Parameter \"WIDTH_B\" = \"1\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 19 " "Parameter \"WIDTHAD_B\" = \"19\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 307200 " "Parameter \"NUMWORDS_B\" = \"307200\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170536902 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1602170536902 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_6ot1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_6ot1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_6ot1 " "Found entity 1: altsyncram_6ot1" {  } { { "db/altsyncram_6ot1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_6ot1.tdf" 32 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170536955 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170536955 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_3na.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/decode_3na.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_3na " "Found entity 1: decode_3na" {  } { { "db/decode_3na.tdf" "" { Text "/home/ks6n19/Documents/project/db/decode_3na.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170537010 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170537010 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_chb.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/mux_chb.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_chb " "Found entity 1: mux_chb" {  } { { "db/mux_chb.tdf" "" { Text "/home/ks6n19/Documents/project/db/mux_chb.tdf" 23 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170537053 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170537053 ""}
+{ "Info" "ISGN_ELABORATION_HEADER" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Elaborated megafunction instantiation \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\"" {  } {  } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170537063 ""}
+{ "Info" "ISGN_MEGAFN_PARAM_TOP" "arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0 " "Instantiated megafunction \"arm_soc:soc_inst\|ahb_ram:ram_1\|altsyncram:memory_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE DUAL_PORT " "Parameter \"OPERATION_MODE\" = \"DUAL_PORT\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 32 " "Parameter \"WIDTH_A\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 12 " "Parameter \"WIDTHAD_A\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 4096 " "Parameter \"NUMWORDS_A\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_B 32 " "Parameter \"WIDTH_B\" = \"32\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_B 12 " "Parameter \"WIDTHAD_B\" = \"12\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_B 4096 " "Parameter \"NUMWORDS_B\" = \"4096\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_B UNREGISTERED " "Parameter \"OUTDATA_REG_B\" = \"UNREGISTERED\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_B NONE " "Parameter \"ADDRESS_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_B NONE " "Parameter \"OUTDATA_ACLR_B\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_REG_B CLOCK0 " "Parameter \"ADDRESS_REG_B\" = \"CLOCK0\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INIT_FILE db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Parameter \"INIT_FILE\" = \"db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "READ_DURING_WRITE_MODE_MIXED_PORTS OLD_DATA " "Parameter \"READ_DURING_WRITE_MODE_MIXED_PORTS\" = \"OLD_DATA\"" {  } {  } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1602170537064 ""}  } {  } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1602170537064 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_nms1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_nms1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_nms1 " "Found entity 1: altsyncram_nms1" {  } { { "db/altsyncram_nms1.tdf" "" { Text "/home/ks6n19/Documents/project/db/altsyncram_nms1.tdf" 28 1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1602170537110 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170537110 ""}
+{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" {  } { { "altsyncram.tdf" "" { Text "/srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } }  } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1602170537143 ""}
+{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" {  } { { "altsyncram.tdf" "" { Text "/srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } }  } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1602170537147 ""}
+{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[0\] GND " "Pin \"LEDR\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|LEDR[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[1\] GND " "Pin \"LEDR\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|LEDR[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[2\] GND " "Pin \"LEDR\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|LEDR[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[3\] GND " "Pin \"LEDR\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|LEDR[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[4\] GND " "Pin \"LEDR\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|LEDR[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[5\] GND " "Pin \"LEDR\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|LEDR[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[6\] GND " "Pin \"LEDR\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|LEDR[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[7\] GND " "Pin \"LEDR\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|LEDR[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[8\] GND " "Pin \"LEDR\[8\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|LEDR[8]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[9\] GND " "Pin \"LEDR\[9\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 15 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|LEDR[9]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[0\] VCC " "Pin \"HEX0\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX0[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[1\] VCC " "Pin \"HEX0\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX0[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[5\] VCC " "Pin \"HEX0\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 16 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX0[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[1\] VCC " "Pin \"HEX1\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX1[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[2\] VCC " "Pin \"HEX1\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX1[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[3\] VCC " "Pin \"HEX1\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX1[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[4\] VCC " "Pin \"HEX1\[4\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX1[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[5\] VCC " "Pin \"HEX1\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX1[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[6\] VCC " "Pin \"HEX1\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 17 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX1[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[0\] VCC " "Pin \"HEX2\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[1\] VCC " "Pin \"HEX2\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX2[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[2\] VCC " "Pin \"HEX2\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX2[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[3\] VCC " "Pin \"HEX2\[3\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX2[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[5\] VCC " "Pin \"HEX2\[5\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 18 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX2[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[0\] VCC " "Pin \"HEX3\[0\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX3[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[1\] VCC " "Pin \"HEX3\[1\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX3[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[2\] VCC " "Pin \"HEX3\[2\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX3[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[6\] VCC " "Pin \"HEX3\[6\]\" is stuck at VCC" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 19 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|HEX3[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[0\] GND " "Pin \"VGA_G\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_G[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[1\] GND " "Pin \"VGA_G\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_G[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[2\] GND " "Pin \"VGA_G\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_G[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[3\] GND " "Pin \"VGA_G\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_G[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[4\] GND " "Pin \"VGA_G\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_G[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[5\] GND " "Pin \"VGA_G\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_G[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[6\] GND " "Pin \"VGA_G\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_G[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_G\[7\] GND " "Pin \"VGA_G\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_G[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[0\] GND " "Pin \"VGA_B\[0\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_B[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[1\] GND " "Pin \"VGA_B\[1\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_B[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[2\] GND " "Pin \"VGA_B\[2\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_B[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[3\] GND " "Pin \"VGA_B\[3\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_B[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[4\] GND " "Pin \"VGA_B\[4\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_B[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[5\] GND " "Pin \"VGA_B\[5\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_B[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[6\] GND " "Pin \"VGA_B\[6\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_B[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_B\[7\] GND " "Pin \"VGA_B\[7\]\" is stuck at GND" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 20 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1602170540728 "|de1_soc_wrapper|VGA_B[7]"}  } {  } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1602170540728 ""}
+{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" {  } {  } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1602170540935 ""}
+{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "17 " "17 registers lost all their fanouts during netlist optimizations." {  } {  } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1602170547729 ""}
+{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.map.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170547884 ""}
+{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" {  } {  } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1602170548323 ""}  } {  } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1602170548323 ""}
+{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[3\] " "No output dependent on input pin \"KEY\[3\]\"" {  } { { "behavioural/de1_soc_wrapper.sv" "" { Text "/home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv" 13 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1602170548700 "|de1_soc_wrapper|KEY[3]"}  } {  } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1602170548700 ""}
+{ "Info" "ICUT_CUT_TM_SUMMARY" "4008 " "Implemented 4008 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1602170548713 ""} { "Info" "ICUT_CUT_TM_OPINS" "66 " "Implemented 66 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1602170548713 ""} { "Info" "ICUT_CUT_TM_LCELLS" "3857 " "Implemented 3857 logic cells" {  } {  } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1602170548713 ""} { "Info" "ICUT_CUT_TM_RAMS" "70 " "Implemented 70 RAM segments" {  } {  } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1602170548713 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1602170548713 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 76 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 76 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1294 " "Peak virtual memory: 1294 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1602170548763 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  8 16:22:28 2020 " "Processing ended: Thu Oct  8 16:22:28 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1602170548763 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:27 " "Elapsed time: 00:00:27" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1602170548763 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:42 " "Total CPU time (on all processors): 00:00:42" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1602170548763 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1602170548763 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Analysis & Synthesis" 0 -1 1602170551156 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus Prime " "Running Quartus Prime Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1602170551159 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  8 16:22:29 2020 " "Processing started: Thu Oct  8 16:22:29 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1602170551159 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Fitter" 0 -1 1602170551159 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_fit --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Fitter" 0 -1 1602170551159 ""}
+{ "Info" "0" "" "qfit2_default_script.tcl version: #1" {  } {  } 0 0 "qfit2_default_script.tcl version: #1" 0 0 "Fitter" 0 0 1602170551559 ""}
+{ "Info" "0" "" "Project  = project24_09" {  } {  } 0 0 "Project  = project24_09" 0 0 "Fitter" 0 0 1602170551560 ""}
+{ "Info" "0" "" "Revision = de1_soc_wrapper" {  } {  } 0 0 "Revision = de1_soc_wrapper" 0 0 "Fitter" 0 0 1602170551560 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Fitter" 0 -1 1602170551778 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1602170551780 ""}
+{ "Info" "IMPP_MPP_USER_DEVICE" "de1_soc_wrapper 5CSEMA5F31C6 " "Selected device 5CSEMA5F31C6 for design \"de1_soc_wrapper\"" {  } {  } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1602170551827 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1602170551885 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1602170551885 ""}
+{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1602170552391 ""}
+{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" {  } {  } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1602170552620 ""}
+{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1602170552684 ""}
+{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" {  } {  } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1602170565563 ""}
+{ "Info" "ICCLK_CLOCKS_TOP" "1  (1 global) " "Promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "CLOCK_50~inputCLKENA0 1020 global CLKCTRL_G6 " "CLOCK_50~inputCLKENA0 with 1020 fanout uses global clock CLKCTRL_G6" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1602170565795 ""}  } {  } 0 11178 "Promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1602170565795 ""}
+{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "1  (1 global) " "Automatically promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "KEY\[2\]~inputCLKENA0 942 global CLKCTRL_G4 " "KEY\[2\]~inputCLKENA0 with 942 fanout uses global clock CLKCTRL_G4" {  } {  } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1602170565795 ""}  } {  } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1602170565795 ""}
+{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" {  } {  } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602170565795 ""}
+{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" {  } {  } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1602170565824 ""}
+{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" {  } {  } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1602170565829 ""}
+{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" {  } {  } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1602170565837 ""}
+{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" {  } {  } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1602170565845 ""}
+{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" {  } {  } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1602170565845 ""}
+{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" {  } {  } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1602170565850 ""}
+{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1602170567096 ""}
+{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" {  } {  } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1602170567097 ""}
+{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1602170567151 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1602170567151 ""}
+{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." {  } {  } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1602170567152 ""}
+{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" {  } {  } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1602170567434 ""}
+{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" {  } {  } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1602170567439 ""}  } {  } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1602170567439 ""}
+{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_CS_N " "Node \"ADC_CS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_CS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_DIN " "Node \"ADC_DIN\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_DIN" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_DOUT " "Node \"ADC_DOUT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_DOUT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "ADC_SCLK " "Node \"ADC_SCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "ADC_SCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_ADCDAT " "Node \"AUD_ADCDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_ADCDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_ADCLRCK " "Node \"AUD_ADCLRCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_ADCLRCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_BCLK " "Node \"AUD_BCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_BCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_DACDAT " "Node \"AUD_DACDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_DACDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_DACLRCK " "Node \"AUD_DACLRCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_DACLRCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "AUD_XCK " "Node \"AUD_XCK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "AUD_XCK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK2_50 " "Node \"CLOCK2_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK2_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK3_50 " "Node \"CLOCK3_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK3_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "CLOCK4_50 " "Node \"CLOCK4_50\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "CLOCK4_50" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[0\] " "Node \"DRAM_ADDR\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[10\] " "Node \"DRAM_ADDR\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[11\] " "Node \"DRAM_ADDR\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[12\] " "Node \"DRAM_ADDR\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[1\] " "Node \"DRAM_ADDR\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[2\] " "Node \"DRAM_ADDR\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[3\] " "Node \"DRAM_ADDR\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[4\] " "Node \"DRAM_ADDR\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[5\] " "Node \"DRAM_ADDR\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[6\] " "Node \"DRAM_ADDR\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[7\] " "Node \"DRAM_ADDR\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[8\] " "Node \"DRAM_ADDR\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_ADDR\[9\] " "Node \"DRAM_ADDR\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_ADDR\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_BA\[0\] " "Node \"DRAM_BA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_BA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_BA\[1\] " "Node \"DRAM_BA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_BA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CAS_N " "Node \"DRAM_CAS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CAS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CKE " "Node \"DRAM_CKE\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CKE" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CLK " "Node \"DRAM_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_CS_N " "Node \"DRAM_CS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_CS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[0\] " "Node \"DRAM_DQ\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[10\] " "Node \"DRAM_DQ\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[11\] " "Node \"DRAM_DQ\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[12\] " "Node \"DRAM_DQ\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[13\] " "Node \"DRAM_DQ\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[14\] " "Node \"DRAM_DQ\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[15\] " "Node \"DRAM_DQ\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[1\] " "Node \"DRAM_DQ\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[2\] " "Node \"DRAM_DQ\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[3\] " "Node \"DRAM_DQ\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[4\] " "Node \"DRAM_DQ\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[5\] " "Node \"DRAM_DQ\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[6\] " "Node \"DRAM_DQ\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[7\] " "Node \"DRAM_DQ\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[8\] " "Node \"DRAM_DQ\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_DQ\[9\] " "Node \"DRAM_DQ\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_DQ\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_LDQM " "Node \"DRAM_LDQM\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_LDQM" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_RAS_N " "Node \"DRAM_RAS_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_RAS_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_UDQM " "Node \"DRAM_UDQM\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_UDQM" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DRAM_WE_N " "Node \"DRAM_WE_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "DRAM_WE_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FAN_CTRL " "Node \"FAN_CTRL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FAN_CTRL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FPGA_I2C_SCLK " "Node \"FPGA_I2C_SCLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FPGA_I2C_SCLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "FPGA_I2C_SDAT " "Node \"FPGA_I2C_SDAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "FPGA_I2C_SDAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[0\] " "Node \"GPIO_0\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[10\] " "Node \"GPIO_0\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[11\] " "Node \"GPIO_0\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[12\] " "Node \"GPIO_0\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[13\] " "Node \"GPIO_0\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[14\] " "Node \"GPIO_0\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[15\] " "Node \"GPIO_0\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[16\] " "Node \"GPIO_0\[16\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[16\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[17\] " "Node \"GPIO_0\[17\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[17\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[18\] " "Node \"GPIO_0\[18\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[18\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[19\] " "Node \"GPIO_0\[19\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[19\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[1\] " "Node \"GPIO_0\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[20\] " "Node \"GPIO_0\[20\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[20\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[21\] " "Node \"GPIO_0\[21\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[21\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[22\] " "Node \"GPIO_0\[22\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[22\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[23\] " "Node \"GPIO_0\[23\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[23\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[24\] " "Node \"GPIO_0\[24\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[24\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[25\] " "Node \"GPIO_0\[25\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[25\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[26\] " "Node \"GPIO_0\[26\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[26\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[27\] " "Node \"GPIO_0\[27\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[27\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[28\] " "Node \"GPIO_0\[28\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[28\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[29\] " "Node \"GPIO_0\[29\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[29\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[2\] " "Node \"GPIO_0\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[30\] " "Node \"GPIO_0\[30\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[30\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[31\] " "Node \"GPIO_0\[31\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[31\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[32\] " "Node \"GPIO_0\[32\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[32\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[33\] " "Node \"GPIO_0\[33\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[33\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[34\] " "Node \"GPIO_0\[34\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[34\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[35\] " "Node \"GPIO_0\[35\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[35\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[3\] " "Node \"GPIO_0\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[4\] " "Node \"GPIO_0\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[5\] " "Node \"GPIO_0\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[6\] " "Node \"GPIO_0\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[7\] " "Node \"GPIO_0\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[8\] " "Node \"GPIO_0\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_0\[9\] " "Node \"GPIO_0\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_0\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[0\] " "Node \"GPIO_1\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[10\] " "Node \"GPIO_1\[10\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[10\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[11\] " "Node \"GPIO_1\[11\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[11\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[12\] " "Node \"GPIO_1\[12\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[12\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[13\] " "Node \"GPIO_1\[13\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[13\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[14\] " "Node \"GPIO_1\[14\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[14\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[15\] " "Node \"GPIO_1\[15\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[15\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[16\] " "Node \"GPIO_1\[16\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[16\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[17\] " "Node \"GPIO_1\[17\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[17\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[18\] " "Node \"GPIO_1\[18\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[18\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[19\] " "Node \"GPIO_1\[19\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[19\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[1\] " "Node \"GPIO_1\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[20\] " "Node \"GPIO_1\[20\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[20\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[21\] " "Node \"GPIO_1\[21\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[21\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[22\] " "Node \"GPIO_1\[22\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[22\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[23\] " "Node \"GPIO_1\[23\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[23\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[24\] " "Node \"GPIO_1\[24\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[24\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[25\] " "Node \"GPIO_1\[25\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[25\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[26\] " "Node \"GPIO_1\[26\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[26\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[27\] " "Node \"GPIO_1\[27\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[27\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[28\] " "Node \"GPIO_1\[28\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[28\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[29\] " "Node \"GPIO_1\[29\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[29\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[2\] " "Node \"GPIO_1\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[30\] " "Node \"GPIO_1\[30\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[30\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[31\] " "Node \"GPIO_1\[31\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[31\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[32\] " "Node \"GPIO_1\[32\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[32\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[33\] " "Node \"GPIO_1\[33\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[33\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[34\] " "Node \"GPIO_1\[34\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[34\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[35\] " "Node \"GPIO_1\[35\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[35\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[3\] " "Node \"GPIO_1\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[4\] " "Node \"GPIO_1\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[5\] " "Node \"GPIO_1\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[6\] " "Node \"GPIO_1\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[7\] " "Node \"GPIO_1\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[8\] " "Node \"GPIO_1\[8\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[8\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "GPIO_1\[9\] " "Node \"GPIO_1\[9\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "GPIO_1\[9\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[0\] " "Node \"HEX4\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[1\] " "Node \"HEX4\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[2\] " "Node \"HEX4\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[3\] " "Node \"HEX4\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[4\] " "Node \"HEX4\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[5\] " "Node \"HEX4\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX4\[6\] " "Node \"HEX4\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX4\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[0\] " "Node \"HEX5\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[1\] " "Node \"HEX5\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[2\] " "Node \"HEX5\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[3\] " "Node \"HEX5\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[4\] " "Node \"HEX5\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[5\] " "Node \"HEX5\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "HEX5\[6\] " "Node \"HEX5\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "HEX5\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "IRDA_RXD " "Node \"IRDA_RXD\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "IRDA_RXD" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "IRDA_TXD " "Node \"IRDA_TXD\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "IRDA_TXD" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_CLK " "Node \"PS2_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_CLK2 " "Node \"PS2_CLK2\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_CLK2" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_DAT " "Node \"PS2_DAT\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_DAT" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "PS2_DAT2 " "Node \"PS2_DAT2\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "PS2_DAT2" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_CLK27 " "Node \"TD_CLK27\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_CLK27" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[0\] " "Node \"TD_DATA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[1\] " "Node \"TD_DATA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[2\] " "Node \"TD_DATA\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[3\] " "Node \"TD_DATA\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[4\] " "Node \"TD_DATA\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[5\] " "Node \"TD_DATA\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[6\] " "Node \"TD_DATA\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_DATA\[7\] " "Node \"TD_DATA\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_DATA\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_HS " "Node \"TD_HS\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_HS" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_RESET_N " "Node \"TD_RESET_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_RESET_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "TD_VS " "Node \"TD_VS\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "TD_VS" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_CLK " "Node \"USB_B2_CLK\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_CLK" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[0\] " "Node \"USB_B2_DATA\[0\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[0\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[1\] " "Node \"USB_B2_DATA\[1\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[1\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[2\] " "Node \"USB_B2_DATA\[2\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[2\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[3\] " "Node \"USB_B2_DATA\[3\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[3\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[4\] " "Node \"USB_B2_DATA\[4\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[4\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[5\] " "Node \"USB_B2_DATA\[5\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[5\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[6\] " "Node \"USB_B2_DATA\[6\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[6\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_B2_DATA\[7\] " "Node \"USB_B2_DATA\[7\]\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_B2_DATA\[7\]" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_EMPTY " "Node \"USB_EMPTY\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_EMPTY" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_FULL " "Node \"USB_FULL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_FULL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_OE_N " "Node \"USB_OE_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_OE_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_RD_N " "Node \"USB_RD_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_RD_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_RESET_N " "Node \"USB_RESET_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_RESET_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_SCL " "Node \"USB_SCL\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_SCL" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_SDA " "Node \"USB_SDA\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_SDA" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "USB_WR_N " "Node \"USB_WR_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "USB_WR_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "VGA_SYNC_N " "Node \"VGA_SYNC_N\" is assigned to location or region, but does not exist in design" {  } { { "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" "" { Assignment "/srv/intelFPGA/16.1/quartus/linux64/Assignment Editor.qase" 1 { { 0 "VGA_SYNC_N" } } } }  } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1602170567610 ""}  } {  } 0 15705 "Ignored locations or region assignments to the following nodes" 0 0 "Fitter" 0 -1 1602170567610 ""}
+{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:15 " "Fitter preparation operations ending: elapsed time is 00:00:15" {  } {  } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602170567615 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" {  } {  } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1602170573249 ""}
+{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." {  } {  } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1602170574034 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:15 " "Fitter placement preparation operations ending: elapsed time is 00:00:15" {  } {  } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602170588430 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" {  } {  } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1602170606439 ""}
+{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" {  } {  } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1602170615400 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:09 " "Fitter placement operations ending: elapsed time is 00:00:09" {  } {  } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602170615401 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" {  } {  } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1602170617366 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Router estimated average interconnect usage is 2% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "42 X22_Y11 X32_Y22 " "Router estimated peak interconnect usage is 42% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22" {  } { { "loc" "" { Generic "/home/ks6n19/Documents/project/" { { 1 { 0 "Router estimated peak interconnect usage is 42% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22"} { { 12 { 0 ""} 22 11 11 12 }  }  }  }  } }  } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1602170625476 ""}  } {  } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1602170625476 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" {  } {  } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1602170658464 ""}  } {  } 0 170199 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1602170658464 ""}
+{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:38 " "Fitter routing operations ending: elapsed time is 00:00:38" {  } {  } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602170658469 ""}
+{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 5.69 " "Total time spent on timing analysis during the Fitter is 5.69 seconds." {  } {  } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1602170666283 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1602170666386 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1602170667631 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1602170667634 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1602170668810 ""}
+{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:10 " "Fitter post-fit operations ending: elapsed time is 00:00:10" {  } {  } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1602170676432 ""}
+{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." {  } {  } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1602170676703 ""}
+{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg " "Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1602170677056 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 182 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 182 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "2656 " "Peak virtual memory: 2656 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1602170678953 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  8 16:24:38 2020 " "Processing ended: Thu Oct  8 16:24:38 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1602170678953 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:02:09 " "Elapsed time: 00:02:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1602170678953 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:11:43 " "Total CPU time (on all processors): 00:11:43" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1602170678953 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1602170678953 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Fitter" 0 -1 1602170680604 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1602170680606 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  8 16:24:40 2020 " "Processing started: Thu Oct  8 16:24:40 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1602170680606 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1602170680606 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1602170680607 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1602170681799 ""}
+{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1602170689120 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1  Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1109 " "Peak virtual memory: 1109 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1602170689765 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  8 16:24:49 2020 " "Processing ended: Thu Oct  8 16:24:49 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1602170689765 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Elapsed time: 00:00:09" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1602170689765 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:09 " "Total CPU time (on all processors): 00:00:09" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1602170689765 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1602170689765 ""}
+{ "Info" "IFLOW_DISABLED_MODULE" "PowerPlay Power Analyzer FLOW_ENABLE_POWER_ANALYZER " "Skipped module PowerPlay Power Analyzer due to the assignment FLOW_ENABLE_POWER_ANALYZER" {  } {  } 0 293026 "Skipped module %1!s! due to the assignment %2!s!" 0 0 "Assembler" 0 -1 1602170690524 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Assembler" 0 -1 1602170691397 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus Prime " "Running Quartus Prime TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1602170691399 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  8 16:24:51 2020 " "Processing started: Thu Oct  8 16:24:51 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1602170691399 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170691399 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta project24_09 -c de1_soc_wrapper " "Command: quartus_sta project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170691400 ""}
+{ "Info" "0" "" "qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "TimeQuest Timing Analyzer" 0 0 1602170691686 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170692526 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "16 24 " "Parallel compilation is enabled and will use 16 of the 24 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170692526 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170692568 ""}
+{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" {  } {  } 0 21077 "%1!s! is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170692568 ""}
+{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "de1_soc_wrapper.sdc " "Synopsys Design Constraints File file not found: 'de1_soc_wrapper.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170693586 ""}
+{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170693586 ""}
+{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name CLOCK_50 CLOCK_50 " "create_clock -period 1.000 -name CLOCK_50 CLOCK_50" {  } {  } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1602170693611 ""}  } {  } 0 332105 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170693611 ""}
+{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170693637 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170693637 ""}
+{ "Info" "0" "" "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" {  } {  } 0 0 "Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "TimeQuest Timing Analyzer" 0 0 1602170693639 ""}
+{ "Info" "0" "" "Analyzing Slow 1100mV 85C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1602170693669 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1602170694499 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170694499 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -11.388 " "Worst-case setup slack is -11.388" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170694509 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170694509 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -11.388          -23034.431 CLOCK_50  " "  -11.388          -23034.431 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170694509 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170694509 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.273 " "Worst-case hold slack is 0.273" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170694565 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170694565 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.273               0.000 CLOCK_50  " "    0.273               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170694565 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170694565 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170694575 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170694585 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170694596 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170694596 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9183.818 CLOCK_50  " "   -2.636           -9183.818 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170694596 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170694596 ""}
+{ "Info" "0" "" "Analyzing Slow 1100mV 0C Model" {  } {  } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1602170694633 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170694686 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170696684 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170697009 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1602170697156 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170697156 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -11.164 " "Worst-case setup slack is -11.164" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170697166 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170697166 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "  -11.164          -22324.349 CLOCK_50  " "  -11.164          -22324.349 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170697166 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170697166 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.258 " "Worst-case hold slack is 0.258" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170697221 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170697221 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.258               0.000 CLOCK_50  " "    0.258               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170697221 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170697221 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170697231 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170697241 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170697253 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170697253 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -9212.118 CLOCK_50  " "   -2.636           -9212.118 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170697253 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170697253 ""}
+{ "Info" "0" "" "Analyzing Fast 1100mV 85C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 85C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1602170697289 ""}
+{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" {  } {  } 0 334003 "Started post-fitting delay annotation" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170697618 ""}
+{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" {  } {  } 0 334004 "Delay annotation completed successfully" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170699500 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170699835 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1602170699885 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170699885 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -6.884 " "Worst-case setup slack is -6.884" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170699895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170699895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -6.884          -13002.742 CLOCK_50  " "   -6.884          -13002.742 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170699895 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170699895 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.179 " "Worst-case hold slack is 0.179" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170699956 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170699956 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.179               0.000 CLOCK_50  " "    0.179               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170699956 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170699956 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170699966 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170699976 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170699989 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170699989 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8585.675 CLOCK_50  " "   -2.636           -8585.675 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170699989 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170699989 ""}
+{ "Info" "0" "" "Analyzing Fast 1100mV 0C Model" {  } {  } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "TimeQuest Timing Analyzer" 0 0 1602170700027 ""}
+{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties." {  } {  } 0 332123 "%1!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170700386 ""}
+{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." {  } {  } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer." 0 0 "Design Software" 0 -1 1602170700433 ""}  } {  } 1 332148 "Timing requirements not met" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170700433 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "setup -5.977 " "Worst-case setup slack is -5.977" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170700444 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170700444 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -5.977          -11265.488 CLOCK_50  " "   -5.977          -11265.488 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170700444 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170700444 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.170 " "Worst-case hold slack is 0.170" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170700499 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170700499 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.170               0.000 CLOCK_50  " "    0.170               0.000 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170700499 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170700499 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170700509 ""}
+{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" {  } {  } 0 332140 "No %1!s! paths to report" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170700519 ""}
+{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -2.636 " "Worst-case minimum pulse width slack is -2.636" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack       End Point TNS Clock  " "    Slack       End Point TNS Clock " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170700531 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170700531 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   -2.636           -8590.161 CLOCK_50  " "   -2.636           -8590.161 CLOCK_50 " {  } {  } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1602170700531 ""}  } {  } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170700531 ""}
+{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170702616 ""}
+{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" {  } {  } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170702620 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 6 s Quartus Prime " "Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1566 " "Peak virtual memory: 1566 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1602170702785 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  8 16:25:02 2020 " "Processing ended: Thu Oct  8 16:25:02 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1602170702785 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:11 " "Elapsed time: 00:00:11" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1602170702785 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:30 " "Total CPU time (on all processors): 00:00:30" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1602170702785 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170702785 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "TimeQuest Timing Analyzer" 0 -1 1602170704052 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition " "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1602170704055 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct  8 16:25:03 2020 " "Processing started: Thu Oct  8 16:25:03 2020" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1602170704055 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1602170704055 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper " "Command: quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper" {  } {  } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1602170704055 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "EDA Netlist Writer" 0 -1 1602170705280 ""}
+{ "Warning" "WQNETO_SWITCH_TO_FUNCTIONAL_SIMULATION" "" "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." {  } {  } 0 10905 "Generated the EDA functional simulation netlist because it is the only supported netlist type for this device." 0 0 "EDA Netlist Writer" 0 -1 1602170705383 ""}
+{ "Info" "IWSC_DONE_HDL_GENERATION" "de1_soc_wrapper.vo /home/ks6n19/Documents/project/simulation/modelsim/ simulation " "Generated file de1_soc_wrapper.vo in folder \"/home/ks6n19/Documents/project/simulation/modelsim/\" for EDA simulation tool" {  } {  } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1602170706495 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 2 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1320 " "Peak virtual memory: 1320 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1602170706683 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct  8 16:25:06 2020 " "Processing ended: Thu Oct  8 16:25:06 2020" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1602170706683 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1602170706683 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Total CPU time (on all processors): 00:00:03" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1602170706683 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1602170706683 ""}
+{ "Info" "IFLOW_ERROR_COUNT" "Full Compilation 0 s 267 s " "Quartus Prime Full Compilation was successful. 0 errors, 267 warnings" {  } {  } 0 293000 "Quartus Prime %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1602170706957 ""}
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.ammdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.ammdb
index 59dbf88f2621f7fa6c10943c3923f9400752df09..b2cdc1e59231b1d0ec0ff4cc617274c764aff433 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.ammdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.ammdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.cdb
index e3dc66b8ec436c95db33b53be3fb9fe2c09d0f81..088133d52b74f16bed2ea88da8d32d1282996814 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.cdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.cdb
index fd4597b5260c361e09ff3b3b1fc7806ba06e6110..abcd91866deb16dfa73477a316f24fa718a28569 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.cdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.hdb
index 7c29eec9cf58638e3f22fc6d81c3588c2cbfbc43..daa6b3dd2d4118a3649699201a3b966276ee06c8 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.hdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hbdb.hdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hdb
index ff1bf1b77c457b5b5035f2546af3b2eedc4a9936..ab9fd1b9892ca417c8ab6bb9e699ea5ca2d054b5 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.hdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.rcfdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.rcfdb
index bb0795e38406024e1724b36a742f73525d5ac1e2..93573e1883e35c1e1aef9d92fbb4935a84e77834 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.rcfdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.cmp.rcfdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.cdb
index f11853581add25b9696fc1b6ba3f0b865fec9bc2..7e0f793ca4631af5c5f97dcf0e338abf7a6c7e49 100644
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diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.dpi b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.dpi
index 784bddec80b6c880f81510c973d84d8405e0c794..02e5b54e437308b80c27eec681a67dcf5a60d5be 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.dpi and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.dpi differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.cdb
index d6e42d5a0c6f1866d55ebf76131ecb7938add60f..deb87de183cf1271f31d48824ec219ed77fd084f 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.cdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.hdb
index 2caab0f2909b7161616c24208872ae85f0dba374..9acf97db5e4348dc4d95cbcb74fb748fdff9e625 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.hdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hbdb.hdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hdb
index 7cab3d8aa8f6e0dbbf79f89a6a1cb673d96fc56f..3bde41953ff49342cc231eb097823d7110fa5a45 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.hdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.kpt b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.kpt
index 9555b87fb2e389fffecef24f805ae869a8ec625d..f9e9e1d847da124f5f2541afbcc0c6161833ccb3 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.kpt and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.kpt differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.olm.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.olm.cdb
index 3973aebf3eeef8302cafc20f222a28bad7ff891a..e592798b6f3d76011ea78c3fcc983bf33c46d4c0 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.olm.cdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.olm.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.oln.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.oln.cdb
index 9222442bcf70ee4effa26fc0343864a6fd555520..1081772affba04dd835f8919c1107369b7810e13 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.oln.cdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.oln.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.orm.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.orm.cdb
index a9947b60586f0a273371e3644fc189b81e878d64..1d2b851959910a30f6b14591b250e30696c95aff 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.orm.cdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.orm.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.orn.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.orn.cdb
index 344ae1fea7a731d54f4a515baaab60c0f45c1da3..5153f18fa8ca2ed2feab8ee1a72aa5d2eca5f283 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.orn.cdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.map.orn.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.cdb
index f11853581add25b9696fc1b6ba3f0b865fec9bc2..7e0f793ca4631af5c5f97dcf0e338abf7a6c7e49 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.cdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hbdb.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hbdb.cdb
index d6e42d5a0c6f1866d55ebf76131ecb7938add60f..deb87de183cf1271f31d48824ec219ed77fd084f 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hbdb.cdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hbdb.cdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hbdb.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hbdb.hdb
index 2caab0f2909b7161616c24208872ae85f0dba374..9acf97db5e4348dc4d95cbcb74fb748fdff9e625 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hbdb.hdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hbdb.hdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hdb
index 7cab3d8aa8f6e0dbbf79f89a6a1cb673d96fc56f..3bde41953ff49342cc231eb097823d7110fa5a45 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.hdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.kpt b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.kpt
index 9555b87fb2e389fffecef24f805ae869a8ec625d..f9e9e1d847da124f5f2541afbcc0c6161833ccb3 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.kpt and b/incremental_db/compiled_partitions/de1_soc_wrapper.root_partition.rrp.kpt differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.rrp.hdb b/incremental_db/compiled_partitions/de1_soc_wrapper.rrp.hdb
index 6086ea82ce56ca6b3026a863a4aeb650184f52e7..f84abe05519c6de4aa27f8fd8684c9073b9ab93c 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.rrp.hdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.rrp.hdb differ
diff --git a/incremental_db/compiled_partitions/de1_soc_wrapper.rrs.cdb b/incremental_db/compiled_partitions/de1_soc_wrapper.rrs.cdb
index 1247faf2f583d98d5ef4ffa47312d1c5dc74eb01..1c0afc933170fed05a9382a5eb1e2863c419afc4 100644
Binary files a/incremental_db/compiled_partitions/de1_soc_wrapper.rrs.cdb and b/incremental_db/compiled_partitions/de1_soc_wrapper.rrs.cdb differ
diff --git a/memory.shm/.nfs0000000068cbe0640000594c b/memory.shm/.nfs0000000068cbe0640000594c
new file mode 100644
index 0000000000000000000000000000000000000000..08d403ced09638fcb35982e98fbfafec2b66a85d
Binary files /dev/null and b/memory.shm/.nfs0000000068cbe0640000594c differ
diff --git a/memory.shm/.nfs000000006a18eb5b0000594d b/memory.shm/.nfs000000006a18eb5b0000594d
new file mode 100644
index 0000000000000000000000000000000000000000..75f6e6aed0df66e311d924fd0bc33876ac2567e3
Binary files /dev/null and b/memory.shm/.nfs000000006a18eb5b0000594d differ
diff --git a/memory.shm/memory.dsn b/memory.shm/memory.dsn
index f20de41c73f7ffa25d4fd7a216cfcbfc23eab9db..6cc679d219a41acd4a941ae3c12d1b52f17a1393 100644
Binary files a/memory.shm/memory.dsn and b/memory.shm/memory.dsn differ
diff --git a/memory.shm/memory.trn b/memory.shm/memory.trn
index d7f74da0cbcf2b0fcbb141b8f16e993950cbebb2..faa04f1899328ceac20345261aa33305e77dcfce 100644
Binary files a/memory.shm/memory.trn and b/memory.shm/memory.trn differ
diff --git a/ncverilog.history b/ncverilog.history
index 2ffb93f328c70dd58aa7fdcb26a9db81b63ae294..e14c63c749b902b06294a940962b9f10ff0fb9a7 100644
--- a/ncverilog.history
+++ b/ncverilog.history
@@ -129,3 +129,41 @@ s128(01Oct2020:11:08:00):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext
 s129(01Oct2020:11:24:23):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
 s130(01Oct2020:11:42:27):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
 s131(01Oct2020:13:28:33):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s132(05Oct2020:10:59:39):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s133(05Oct2020:11:04:30):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s134(05Oct2020:11:28:52):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s135(05Oct2020:12:09:05):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s136(05Oct2020:12:12:25):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s137(05Oct2020:12:41:52):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s138(05Oct2020:12:45:42):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s139(05Oct2020:12:55:28):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s140(05Oct2020:12:59:13):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s141(05Oct2020:15:11:19):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s142(05Oct2020:16:08:38):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s143(05Oct2020:16:20:43):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s144(05Oct2020:16:22:32):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s145(05Oct2020:16:39:46):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s146(05Oct2020:16:40:26):  ncverilog -sv +gui +ncaccess+r +tcl+testbench/de0_wrapper.tcl -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv 
+s147(05Oct2020:16:41:13):  ncverilog -sv +gui +ncaccess+r +tcl+testbench/de0_wrapper.tcl -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv 
+s148(05Oct2020:16:47:56):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s  
+s149(05Oct2020:16:49:55):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s150(05Oct2020:17:19:39):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s151(05Oct2020:17:24:28):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s152(05Oct2020:19:02:33):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s153(05Oct2020:19:09:01):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s154(06Oct2020:16:46:48):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s155(06Oct2020:18:32:01):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s156(06Oct2020:18:38:21):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s157(06Oct2020:23:15:18):  ncverilog -sv +gui +ncaccess+r +tcl+testbench/de0_wrapper.tcl -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv 
+s158(06Oct2020:23:16:00):  ncverilog -sv +gui +ncaccess+r +tcl+testbench/de0_wrapper.tcl -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv 
+s159(06Oct2020:23:20:50):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s  
+s160(07Oct2020:10:28:23):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s161(07Oct2020:11:47:49):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s162(07Oct2020:11:51:24):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s163(07Oct2020:11:56:42):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s164(07Oct2020:14:43:17):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s165(07Oct2020:14:44:59):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s166(07Oct2020:16:45:59):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s167(07Oct2020:16:51:56):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s168(08Oct2020:15:46:51):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
+s169(08Oct2020:16:21:39):  ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s 
diff --git a/ncverilog.key b/ncverilog.key
index 06d41aba73d19181c721b849078e7545bfce1747..6e67483f4dcec38d76a1f7065dedb72447db4c2d 100644
--- a/ncverilog.key
+++ b/ncverilog.key
@@ -3,4 +3,3 @@ input {testbench/de0_wrapper.tcl}
 input -quiet .reinvoke.sim
 file delete .reinvoke.sim
 run
-run
diff --git a/ncverilog.log b/ncverilog.log
index ad3e8ed3b86c02707b107792e9d3c619b472036e..ec6505ce4a1294b5ba173a69346003a0b6f05511 100644
--- a/ncverilog.log
+++ b/ncverilog.log
@@ -1,5 +1,5 @@
 ncverilog(64): 15.20-s058: (c) Copyright 1995-2018 Cadence Design Systems, Inc.
-TOOL:	ncverilog	15.20-s058: Started on Oct 01, 2020 at 13:28:33 BST
+TOOL:	ncverilog	15.20-s058: Started on Oct 08, 2020 at 16:21:39 BST
 ncverilog
 	-sv
 	+gui
@@ -10,38 +10,6 @@ ncverilog
 	+define+prog_file=software/code.hex
 	testbench/de1_soc_wrapper_stim.sv
 	-s
-Recompiling... reason: file './behavioural/razzle.sv' is newer than expected.
-	expected: Wed Sep 30 12:20:32 2020
-	actual:   Thu Oct  1 11:54:47 2020
-file: behavioural/razzle.sv
-	module behavioural.razzle:sv
-		errors: 0, warnings: 0
-		Caching library 'behavioural' ....... Done
-		Caching library 'worklib' ....... Done
-	Elaborating the design hierarchy:
-ncelab: *W,DSEMEL: This SystemVerilog design will be simulated as per IEEE 1800-2009 SystemVerilog simulation semantics. Use -disable_sem2009 option for turning off SV 2009 simulation semantics.
-  de1_soc_wrapper dut(.CLOCK_50, .LEDR, .SW, .KEY, .HEX0, .HEX1, .HEX2, .HEX3,.VGA_R, .VGA_G, .VGA_B, .VGA_HS, .VGA_VS, .VGA_CLK, .VGA_BLANK_N);
-                                                |
-ncelab: *W,CUVMPW (./testbench/de1_soc_wrapper_stim.sv,20|48): port sizes differ in port connection (3/4).
-	Building instance overlay tables: .................... Done
-	Generating native compiled code:
-		behavioural.razzle:sv <0x627b90f6>
-			streams:  14, words:  6298
-	Building instance specific data structures.
-	Loading native compiled code:     .................... Done
-	Design hierarchy summary:
-		                   Instances  Unique
-		Modules:                  10      10
-		Registers:               919     919
-		Scalar wires:          11159       -
-		Expanded wires:          122       6
-		Vectored wires:           51       -
-		Always blocks:           858     858
-		Initial blocks:            3       3
-		Cont. assignments:       973   11132
-		Pseudo assignments:       22      22
-		Simulation timescale:  100ps
-	Writing initial simulation snapshot: worklib.de1_soc_wrapper_stim:sv
 ncsim: *W,DSEM2009: This SystemVerilog design is simulated as per IEEE 1800-2009 SystemVerilog simulation semantics. Use -disable_sem2009 option for turning off SV 2009 simulation semantics.
 ncsim> 
 ncsim> source /eda/cadence/incisiv/tools/inca/files/ncsimrc
@@ -87,7 +55,5 @@ ncsim>
 ncsim> input -quiet .reinvoke.sim
 ncsim> file delete .reinvoke.sim
 ncsim> run
-Simulation interrupted at 30645785 NS + 5
-ncsim> run
-Simulation interrupted at 37091065 NS + 1
+Simulation interrupted at 35438205 NS + 5
 ncsim> 
\ No newline at end of file
diff --git a/output_files/de1_soc_wrapper.asm.rpt b/output_files/de1_soc_wrapper.asm.rpt
index 5c117462615527934b36d4517b917f9fb4c78579..a1477e820259a7c75da83b8af1b3e9267db36a38 100644
--- a/output_files/de1_soc_wrapper.asm.rpt
+++ b/output_files/de1_soc_wrapper.asm.rpt
@@ -1,5 +1,5 @@
 Assembler report for de1_soc_wrapper
-Thu Oct  1 13:36:08 2020
+Thu Oct  8 16:46:25 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -38,7 +38,7 @@ agreement for further details.
 +---------------------------------------------------------------+
 ; Assembler Summary                                             ;
 +-----------------------+---------------------------------------+
-; Assembler Status      ; Successful - Thu Oct  1 13:36:08 2020 ;
+; Assembler Status      ; Successful - Thu Oct  8 16:46:25 2020 ;
 ; Revision Name         ; de1_soc_wrapper                       ;
 ; Top-level Entity Name ; de1_soc_wrapper                       ;
 ; Family                ; Cyclone V                             ;
@@ -68,8 +68,8 @@ agreement for further details.
 ; Option         ; Setting                      ;
 +----------------+------------------------------+
 ; Device         ; 5CSEMA5F31C6                 ;
-; JTAG usercode  ; 0x0218798E                   ;
-; Checksum       ; 0x0218798E                   ;
+; JTAG usercode  ; 0x0218F368                   ;
+; Checksum       ; 0x0218F368                   ;
 +----------------+------------------------------+
 
 
@@ -79,14 +79,14 @@ agreement for further details.
 Info: *******************************************************************
 Info: Running Quartus Prime Assembler
     Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
-    Info: Processing started: Thu Oct  1 13:35:59 2020
+    Info: Processing started: Thu Oct  8 16:46:16 2020
 Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (115030): Assembler is generating device programming files
 Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
-    Info: Peak virtual memory: 1117 megabytes
-    Info: Processing ended: Thu Oct  1 13:36:08 2020
+    Info: Peak virtual memory: 1114 megabytes
+    Info: Processing ended: Thu Oct  8 16:46:25 2020
     Info: Elapsed time: 00:00:09
-    Info: Total CPU time (on all processors): 00:00:08
+    Info: Total CPU time (on all processors): 00:00:09
 
 
diff --git a/output_files/de1_soc_wrapper.done b/output_files/de1_soc_wrapper.done
index ae684aa6c2911035509b7410dbc60cb92f33fe22..1a5fa757304a77243b3e408afe4f278b0ddbabe8 100644
--- a/output_files/de1_soc_wrapper.done
+++ b/output_files/de1_soc_wrapper.done
@@ -1 +1 @@
-Thu Oct  1 13:36:24 2020
+Thu Oct  8 16:46:42 2020
diff --git a/output_files/de1_soc_wrapper.eda.rpt b/output_files/de1_soc_wrapper.eda.rpt
index 1df513b72d487284995884b92612e885305aca9c..4503e99c851570d88b96873f15642caeec30bc53 100644
--- a/output_files/de1_soc_wrapper.eda.rpt
+++ b/output_files/de1_soc_wrapper.eda.rpt
@@ -1,5 +1,5 @@
 EDA Netlist Writer report for de1_soc_wrapper
-Thu Oct  1 13:36:24 2020
+Thu Oct  8 16:46:41 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -37,7 +37,7 @@ agreement for further details.
 +-------------------------------------------------------------------+
 ; EDA Netlist Writer Summary                                        ;
 +---------------------------+---------------------------------------+
-; EDA Netlist Writer Status ; Successful - Thu Oct  1 13:36:24 2020 ;
+; EDA Netlist Writer Status ; Successful - Thu Oct  8 16:46:41 2020 ;
 ; Revision Name             ; de1_soc_wrapper                       ;
 ; Top-level Entity Name     ; de1_soc_wrapper                       ;
 ; Family                    ; Cyclone V                             ;
@@ -82,15 +82,15 @@ agreement for further details.
 Info: *******************************************************************
 Info: Running Quartus Prime EDA Netlist Writer
     Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
-    Info: Processing started: Thu Oct  1 13:36:21 2020
+    Info: Processing started: Thu Oct  8 16:46:39 2020
 Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off project24_09 -c de1_soc_wrapper
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Warning (10905): Generated the EDA functional simulation netlist because it is the only supported netlist type for this device.
 Info (204019): Generated file de1_soc_wrapper.vo in folder "/home/ks6n19/Documents/project/simulation/modelsim/" for EDA simulation tool
 Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 2 warnings
-    Info: Peak virtual memory: 1314 megabytes
-    Info: Processing ended: Thu Oct  1 13:36:24 2020
-    Info: Elapsed time: 00:00:03
+    Info: Peak virtual memory: 1317 megabytes
+    Info: Processing ended: Thu Oct  8 16:46:41 2020
+    Info: Elapsed time: 00:00:02
     Info: Total CPU time (on all processors): 00:00:02
 
 
diff --git a/output_files/de1_soc_wrapper.fit.rpt b/output_files/de1_soc_wrapper.fit.rpt
index 603acd16a2289ed9c22015878fd40d2d82fca04e..3144aaa10ecbd4ab873a6ec61e7fd07131d35d0d 100644
--- a/output_files/de1_soc_wrapper.fit.rpt
+++ b/output_files/de1_soc_wrapper.fit.rpt
@@ -1,5 +1,5 @@
 Fitter report for de1_soc_wrapper
-Thu Oct  1 13:35:55 2020
+Thu Oct  8 16:46:12 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -66,15 +66,15 @@ agreement for further details.
 +-----------------------------------------------------------------------------------+
 ; Fitter Summary                                                                    ;
 +---------------------------------+-------------------------------------------------+
-; Fitter Status                   ; Successful - Thu Oct  1 13:35:55 2020           ;
+; Fitter Status                   ; Successful - Thu Oct  8 16:46:12 2020           ;
 ; Quartus Prime Version           ; 16.1.2 Build 203 01/18/2017 SJ Standard Edition ;
 ; Revision Name                   ; de1_soc_wrapper                                 ;
 ; Top-level Entity Name           ; de1_soc_wrapper                                 ;
 ; Family                          ; Cyclone V                                       ;
 ; Device                          ; 5CSEMA5F31C6                                    ;
 ; Timing Models                   ; Final                                           ;
-; Logic utilization (in ALMs)     ; 2,044 / 32,070 ( 6 % )                          ;
-; Total registers                 ; 1252                                            ;
+; Logic utilization (in ALMs)     ; 2,072 / 32,070 ( 6 % )                          ;
+; Total registers                 ; 1292                                            ;
 ; Total pins                      ; 81 / 457 ( 18 % )                               ;
 ; Total virtual pins              ; 0                                               ;
 ; Total block memory bits         ; 438,272 / 4,065,280 ( 11 % )                    ;
@@ -156,339 +156,379 @@ agreement for further details.
 ; Number detected on machine ; 24          ;
 ; Maximum allowed            ; 16          ;
 ;                            ;             ;
-; Average used               ; 1.31        ;
+; Average used               ; 1.30        ;
 ; Maximum used               ; 16          ;
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;   2.8%      ;
+;     Processor 2            ;   2.6%      ;
 ;     Processor 3            ;   2.5%      ;
-;     Processor 4            ;   2.4%      ;
-;     Processor 5            ;   2.1%      ;
-;     Processor 6            ;   2.1%      ;
+;     Processor 4            ;   2.3%      ;
+;     Processor 5            ;   2.0%      ;
+;     Processor 6            ;   2.0%      ;
 ;     Processor 7            ;   2.0%      ;
-;     Processor 8            ;   2.0%      ;
-;     Processor 9            ;   1.9%      ;
-;     Processor 10           ;   1.9%      ;
-;     Processor 11           ;   1.9%      ;
-;     Processor 12           ;   1.9%      ;
-;     Processor 13           ;   1.9%      ;
-;     Processor 14           ;   1.9%      ;
-;     Processor 15           ;   1.9%      ;
-;     Processor 16           ;   1.9%      ;
+;     Processor 8            ;   1.9%      ;
+;     Processor 9            ;   1.8%      ;
+;     Processor 10           ;   1.8%      ;
+;     Processor 11           ;   1.8%      ;
+;     Processor 12           ;   1.8%      ;
+;     Processor 13           ;   1.8%      ;
+;     Processor 14           ;   1.8%      ;
+;     Processor 15           ;   1.8%      ;
+;     Processor 16           ;   1.8%      ;
 +----------------------------+-------------+
 
 
-+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
-; Fitter Netlist Optimizations                                                                                                                                                                                                                                                                                        ;
-+------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+----------------------------------------------------------------------------+------------------+-----------------------+
-; Node                                                             ; Action     ; Operation                                         ; Reason                     ; Node Port ; Node Port Name ; Destination Node                                                           ; Destination Port ; Destination Port Name ;
-+------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+----------------------------------------------------------------------------+------------------+-----------------------+
-; CLOCK_50~inputCLKENA0                                            ; Created    ; Placement                                         ; Fitter Periphery Placement ;           ;                ;                                                                            ;                  ;                       ;
-; KEY[2]~inputCLKENA0                                              ; Created    ; Placement                                         ; Fitter Periphery Placement ;           ;                ;                                                                            ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aez2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aez2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aff3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aff3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An83z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aok2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aok2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Art2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Art2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aud3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aud3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Azs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Azs2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5e3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5e3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5u2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5u2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B173z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B173z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B613z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B613z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bec3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bec3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bf93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bf93z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk13z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bmb3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bmb3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bn53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bn53z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bus2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bus2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5v2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5v2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C183z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C183z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cai3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cai3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cax2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cax2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc53z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc73z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ch03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ch03z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cll2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cll2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cq93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cq93z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cxc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cxc3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D1p2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D1p2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D4g3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D4g3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D7k2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D7k2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D923z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D923z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Df83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Df83z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dks2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dks2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dpc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dpc3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq53z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq83z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duu2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Duv2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dvy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dvy2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E0d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E0d3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E153z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E153z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E163z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E163z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E913z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E913z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ebh3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ebh3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ec33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ec33z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ec43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ec43z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Efp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Efp2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ehz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ehz2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ek03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ek03z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eq63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eq63z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eun2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eun2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Exd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Exd3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ey03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ey03z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eyr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eyr2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F2o2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F2o2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4c3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4c3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F9j2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F9j2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fcj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fcj2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fed3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fed3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffs2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fgm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fgm2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fij2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fij2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fio2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fio2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fli3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fli3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fn13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fn13z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fn23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fn23z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fpi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fpi2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ft73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ft73z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fwj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fwj2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fzl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fzl2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G4r2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G4r2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G8n2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G8n2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G9w2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G9w2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcb3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcb3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gci2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gci2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcr2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf63z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf73z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gfq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gfq2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gha3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gha3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gjt2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gjt2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmd3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gxk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gxk2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gza3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gza3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H903z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H903z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hc23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hc23z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hn03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hn03z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ht53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ht53z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hub3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hub3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I4s2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I4s2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I113z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I113z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I443z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I443z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I453z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I453z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I793z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I793z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ibe3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ibe3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Idk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Idk2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ieh3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ieh3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igl2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ii73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ii73z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ikz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ikz2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ilf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ilf3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ilp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ilp2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ipb3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ipb3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ipn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ipn2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|It63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|It63z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ixn2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J4x2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J4x2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5o2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5o2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7q2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7q2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J9d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J9d3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jex2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jex2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ji43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ji43z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jkc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jkc3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jsc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jsc3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw73z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw93z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K423z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K423z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kaf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kaf3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kev2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kev2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf23z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kfr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kfr2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kjk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kjk2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Knz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Knz2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ksm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ksm2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kt43z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kzf3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kzf3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L7a3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L7a3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L753z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L753z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L763z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L763z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lhd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lhd3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lns2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lns2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpv2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lq03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lq03z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lrx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lrx2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lul2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lul2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M0i3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M0i3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3u2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3u2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M9y2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M9y2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mcz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mcz2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mhn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mhn2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mi13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mi13z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mjl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mjl2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mz63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mz63z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mzp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mzp2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na53z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na73z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Naq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Naq2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nen2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nen2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5t2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O403z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O403z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O723z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O723z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Oar2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Oar2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ogo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ogo2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Olg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Olg3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow13z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow13z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow23z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow33z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pa33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pa33z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pfz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pfz2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po73z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po83z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pst2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pst2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Psv2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pty2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pty2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pvd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pvd3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pwg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pwg3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pxb3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pxb3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6l2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6l2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6u2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6u2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q273z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q273z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qfc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qfc3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qg93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qg93z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql33z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qwr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qwr2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qzq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qzq2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R0t2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R0t2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rbo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rbo2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd73z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhi2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ruj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ruj2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvv2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S3i3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S3i3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S4w2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S4w2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa23z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sg83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sg83z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sog3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sog3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svs2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Swy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Swy2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T1d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T1d3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T8f3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T8f3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T9v2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T9v2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T583z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T583z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tel2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tel2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tib3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tib3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tiz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tiz2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tme3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tme3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tna3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tna3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To33z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqs2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqs2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tvn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tvn2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2x2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2x2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5q2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5q2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9e3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9e3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9u2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9u2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug73z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug73z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uic3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uic3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uu83z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uup2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uup2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyu2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyu2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyv2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyv2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V1l2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V1l2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V4d3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V4d3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V233z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V233z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vdr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vdr2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vg53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vg53z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vhk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vhk2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vvx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vvx2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W5s2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W5s2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbk2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wce3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wce3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj63z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj63z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnh3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnh3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wrg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wrg3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wuq2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wuq2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X6m2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X6m2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X213z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X213z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X563z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X563z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xeo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xeo2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xg33z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xg33z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xsx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xsx2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xx93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xx93z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1v2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1v2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y6o2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y6o2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yb93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yb93z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yd03z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yd03z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yfn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yfn2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yg23z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yg23z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yj43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yj43z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ylc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ylc3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ym93z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ym93z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ymo2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ymo2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ytm2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ytm2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yzi2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yzi2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z4l2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z4l2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z7i2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z7i2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8s2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8s2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z523z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z523z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z863z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z863z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zb83z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zb83z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zei2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zei2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zfh3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zfh3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zgr2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zgr2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zj53z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zj53z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjg3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjg3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zkk2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zkk2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zoy2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zoy2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zpx2z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zpx2z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ztc3z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ztc3z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu43z4 ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu43z4~DUPLICATE ;                  ;                       ;
-; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[0]                    ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[0]~DUPLICATE                    ;                  ;                       ;
-; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[2]                    ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[2]~DUPLICATE                    ;                  ;                       ;
-; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[3]                    ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[3]~DUPLICATE                    ;                  ;                       ;
-; arm_soc:soc_inst|ahb_ram:ram_1|read_cycle                        ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|read_cycle~DUPLICATE                        ;                  ;                       ;
-; razzle:raz_inst|H_count[1]                                       ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; razzle:raz_inst|H_count[1]~DUPLICATE                                       ;                  ;                       ;
-+------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+----------------------------------------------------------------------------+------------------+-----------------------+
++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+; Fitter Netlist Optimizations                                                                                                                                                                                                                                                                                                                                                                                    ;
++----------------------------------------------------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+--------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
+; Node                                                                                                           ; Action     ; Operation                                         ; Reason                     ; Node Port ; Node Port Name ; Destination Node                                                                                                         ; Destination Port ; Destination Port Name ;
++----------------------------------------------------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+--------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
+; CLOCK_50~inputCLKENA0                                                                                          ; Created    ; Placement                                         ; Fitter Periphery Placement ;           ;                ;                                                                                                                          ;                  ;                       ;
+; KEY[2]~inputCLKENA0                                                                                            ; Created    ; Placement                                         ; Fitter Periphery Placement ;           ;                ;                                                                                                                          ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A933z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A933z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|An83z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aok2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aok2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Arh3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Arh3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Asr2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Asr2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Av13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Av13z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ay53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ay53z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Azs2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Azs2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5u2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B5u2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B613z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B613z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B943z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B943z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bdm2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bdm2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bjd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bjd3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk13z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bk23z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ble3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ble3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bmb3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bmb3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bnx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bnx2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C183z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C183z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cai3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cai3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cam2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cam2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cax2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cax2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cc53z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ccg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ccg3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgt2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cgt2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ch03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ch03z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cps2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cps2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cqo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cqo2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy33z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cy43z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D4a3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D4a3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D4g3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D4g3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D923z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D923z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dcs2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dcs2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dkr2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dkr2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dks2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dks2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dpc3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dpc3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dq73z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dtj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dtj2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dvy2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dvy2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dy23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dy23z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E913z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|E913z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ec43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ec43z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ecp2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ecp2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Edl2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Edl2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eif3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eif3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eq63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eq63z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eqq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eqq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eut2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Eut2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ey03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ey03z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4c3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4c3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F8e3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F8e3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F9j2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F9j2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fcj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fcj2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffs2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffs2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fgm2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fgm2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fhx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fhx2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fi93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fi93z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fij2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fij2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fn23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fn23z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Foe3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Foe3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fpi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fpi2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fvz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fvz2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G1s2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G1s2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G7x2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G7x2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G123z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G123z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcb3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcb3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gci2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gci2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcr2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcr2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf43z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gf63z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gfq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gfq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gip2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gip2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmd3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmm2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gmm2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gt93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gt93z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gto2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gto2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gza3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gza3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2m2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2m2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H3d3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H133z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H133z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H783z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H783z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hak2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hak2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hmh3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hmh3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hmv2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hmv2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hn03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hn03z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hpd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hpd3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hq23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hq23z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hq33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hq33z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ht53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ht53z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hue3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hue3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hxx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hxx2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyz2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I443z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I443z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I793z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I793z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Idk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Idk2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ii73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ii73z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ilp2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ilp2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ipn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ipn2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Iwp2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Iwp2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J0n2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J0n2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J4x2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J4x2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5i3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5i3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5m2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5m2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7q2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7q2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J433z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J433z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J773z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J773z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jky2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jky2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Joi3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Joi3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jq13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jq13z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw73z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jw83z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jxs2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jxs2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K2k2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K2k2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K6y2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K6y2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K7s2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K7s2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K423z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K423z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kc03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kc03z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kev2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kev2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kf13z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kkb3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kkb3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kop2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kop2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kwo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kwo2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kzf3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kzf3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L7p2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L7p2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lbn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lbn2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ldf3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ldf3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lee3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lee3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Llq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Llq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lph3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lph3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpu2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lpu2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lsd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lsd3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lul2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lul2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lz93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lz93z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M0i3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M0i3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3e3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3e3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3u2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M3u2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M4j2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M4j2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M5f3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M5f3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M413z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M413z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mi13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mi13z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mi23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mi23z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mi33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mi33z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mis2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mis2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mjl2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mjl2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mof3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mof3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mt13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mt13z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mz63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mz63z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N3v2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|N3v2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Na73z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nag3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nag3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Naq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Naq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nbx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nbx2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nfb3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nfb3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|No93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|No93z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nox2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nox2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Npk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Npk2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nz73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nz73z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nz83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nz83z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O2g3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O2g3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5t2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5t2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O403z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O403z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O723z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O723z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ogo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ogo2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ohh3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ohh3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Okn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Okn2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Olg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Olg3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Omk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Omk2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Otr2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Otr2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ovc3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ovc3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ow13z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Owq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Owq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|P2a3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|P2a3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pab3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pab3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pap2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pap2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pcd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pcd3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Po53z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Poq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Poq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pst2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pst2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pw03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pw03z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pwg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pwg3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pxb3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pxb3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q2q2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q2q2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6e3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6e3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6l2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6l2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qfc3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qfc3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qg93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qg93z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ql23z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qrf3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qrf3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qxa3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qxa3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R1w2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R6v2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R6v2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R293z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|R293z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rd53z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rdg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rdg3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rdq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rdq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rds2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rds2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhi2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhu2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rhu2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rpe3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rpe3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rr93z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rro2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rro2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvu2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvu2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvv2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rvv2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rxl2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rxl2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa13z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sa23z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sd43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sd43z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sg83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sg83z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgj2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Skh3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Skh3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Skv2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Skv2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Slr2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Slr2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sog3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sog3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sr53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sr53z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svk2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Swy2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Swy2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sz23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sz23z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T8f3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T8f3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tch3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tch3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tdp2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tib3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tib3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tjf3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tjf3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tna3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tna3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To23z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To33z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|To33z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqs2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqs2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tr63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tr63z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tvn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tvn2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tvt2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tvt2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Twz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Twz2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Txj2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyd3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyx2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2s2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2s2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2x2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2x2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U7w2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U7w2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9e3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9e3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9u2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U9u2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U573z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U573z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ufx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ufx2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug73z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ug73z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uls2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uls2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uqi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uqi2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uup2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uup2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyu2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyu2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyv2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyv2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V3m2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V3m2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V223z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V223z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V883z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V883z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vg53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vg53z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vgg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vgg3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vr43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vr43z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vuo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vuo2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vve3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vve3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vvx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vvx2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vzz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vzz2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W5s2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W5s2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W7z2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W7z2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wa03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wa03z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wai2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbf3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wbf3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wce3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wce3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wd13z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wd13z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj63z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wj63z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnh3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wnh3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wor2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wor2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wrg3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wrg3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wuq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wuq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X0c3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X0c3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X9n2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X9n2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X213z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X213z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X553z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X553z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xeo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xeo2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xsx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xsx2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xx93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xx93z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1u2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y1u2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y6o2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y6o2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9l2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9l2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9t2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9t2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yaz2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yb93z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yb93z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ymo2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ymo2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ywi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ywi2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yx83z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yzi2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yzi2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z3k2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z3k2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8b3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8b3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z853z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z853z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zb83z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zb83z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zcn2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zei2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zei2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zj53z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zj53z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjq2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zjq2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zkk2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zkk2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zoy2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zoy2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zpj2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zpj2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zpx2z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zpx2z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zr03z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zr03z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ztc3z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ztc3z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu23z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu23z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu43z4                                               ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zu43z4~DUPLICATE                                               ;                  ;                       ;
+; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[0]                                                    ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[0]~DUPLICATE                                                    ;                  ;                       ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|address_reg_b[1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|address_reg_b[1]~DUPLICATE ;                  ;                       ;
+; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[0]                                                                  ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[0]~DUPLICATE                                                                  ;                  ;                       ;
+; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[2]                                                                  ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[2]~DUPLICATE                                                                  ;                  ;                       ;
+; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[3]                                                                  ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[3]~DUPLICATE                                                                  ;                  ;                       ;
+; arm_soc:soc_inst|ahb_ram:ram_1|read_cycle                                                                      ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|read_cycle~DUPLICATE                                                                      ;                  ;                       ;
+; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle                                                                     ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle~DUPLICATE                                                                     ;                  ;                       ;
+; arm_soc:soc_inst|ahb_switches:switches_1|half_word_address[1]                                                  ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; arm_soc:soc_inst|ahb_switches:switches_1|half_word_address[1]~DUPLICATE                                                  ;                  ;                       ;
+; razzle:raz_inst|H_count[1]                                                                                     ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; razzle:raz_inst|H_count[1]~DUPLICATE                                                                                     ;                  ;                       ;
+; razzle:raz_inst|H_count[10]                                                                                    ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; razzle:raz_inst|H_count[10]~DUPLICATE                                                                                    ;                  ;                       ;
+; razzle:raz_inst|video_on_H                                                                                     ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; razzle:raz_inst|video_on_H~DUPLICATE                                                                                     ;                  ;                       ;
+; razzle:raz_inst|video_on_V                                                                                     ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization   ;           ;                ; razzle:raz_inst|video_on_V~DUPLICATE                                                                                     ;                  ;                       ;
++----------------------------------------------------------------------------------------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+--------------------------------------------------------------------------------------------------------------------------+------------------+-----------------------+
 
 
 +--------------------------------------------------------------------------------------------+
@@ -682,8 +722,8 @@ agreement for further details.
 ; Type                ; Total [A + B]       ; From Design Partitions [A] ; From Rapid Recompile [B] ;
 +---------------------+---------------------+----------------------------+--------------------------+
 ; Placement (by node) ;                     ;                            ;                          ;
-;     -- Requested    ; 0.00 % ( 0 / 4385 ) ; 0.00 % ( 0 / 4385 )        ; 0.00 % ( 0 / 4385 )      ;
-;     -- Achieved     ; 0.00 % ( 0 / 4385 ) ; 0.00 % ( 0 / 4385 )        ; 0.00 % ( 0 / 4385 )      ;
+;     -- Requested    ; 0.00 % ( 0 / 4379 ) ; 0.00 % ( 0 / 4379 )        ; 0.00 % ( 0 / 4379 )      ;
+;     -- Achieved     ; 0.00 % ( 0 / 4379 ) ; 0.00 % ( 0 / 4379 )        ; 0.00 % ( 0 / 4379 )      ;
 ;                     ;                     ;                            ;                          ;
 ; Routing (by net)    ;                     ;                            ;                          ;
 ;     -- Requested    ; 0.00 % ( 0 / 0 )    ; 0.00 % ( 0 / 0 )           ; 0.00 % ( 0 / 0 )         ;
@@ -706,7 +746,7 @@ agreement for further details.
 +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+
 ; Partition Name                 ; Preservation Achieved ; Preservation Level Used ; Netlist Type Used ; Preservation Method ; Notes ;
 +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+
-; Top                            ; 0.00 % ( 0 / 4385 )   ; N/A                     ; Source File       ; N/A                 ;       ;
+; Top                            ; 0.00 % ( 0 / 4379 )   ; N/A                     ; Source File       ; N/A                 ;       ;
 ; hard_block:auto_generated_inst ; 0.00 % ( 0 / 0 )      ; N/A                     ; Source File       ; N/A                 ;       ;
 +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+
 
@@ -722,41 +762,41 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 +-------------------------------------------------------------+-----------------------+-------+
 ; Resource                                                    ; Usage                 ; %     ;
 +-------------------------------------------------------------+-----------------------+-------+
-; Logic utilization (ALMs needed / total ALMs on device)      ; 2,044 / 32,070        ; 6 %   ;
-; ALMs needed [=A-B+C]                                        ; 2,044                 ;       ;
-;     [A] ALMs used in final placement [=a+b+c+d]             ; 2,293 / 32,070        ; 7 %   ;
-;         [a] ALMs used for LUT logic and registers           ; 210                   ;       ;
-;         [b] ALMs used for LUT logic                         ; 1,818                 ;       ;
-;         [c] ALMs used for registers                         ; 265                   ;       ;
+; Logic utilization (ALMs needed / total ALMs on device)      ; 2,072 / 32,070        ; 6 %   ;
+; ALMs needed [=A-B+C]                                        ; 2,072                 ;       ;
+;     [A] ALMs used in final placement [=a+b+c+d]             ; 2,316 / 32,070        ; 7 %   ;
+;         [a] ALMs used for LUT logic and registers           ; 212                   ;       ;
+;         [b] ALMs used for LUT logic                         ; 1,841                 ;       ;
+;         [c] ALMs used for registers                         ; 263                   ;       ;
 ;         [d] ALMs used for memory (up to half of total ALMs) ; 0                     ;       ;
-;     [B] Estimate of ALMs recoverable by dense packing       ; 281 / 32,070          ; < 1 % ;
-;     [C] Estimate of ALMs unavailable [=a+b+c+d]             ; 32 / 32,070           ; < 1 % ;
+;     [B] Estimate of ALMs recoverable by dense packing       ; 292 / 32,070          ; < 1 % ;
+;     [C] Estimate of ALMs unavailable [=a+b+c+d]             ; 48 / 32,070           ; < 1 % ;
 ;         [a] Due to location constrained logic               ; 0                     ;       ;
-;         [b] Due to LAB-wide signal conflicts                ; 0                     ;       ;
-;         [c] Due to LAB input limits                         ; 32                    ;       ;
+;         [b] Due to LAB-wide signal conflicts                ; 2                     ;       ;
+;         [c] Due to LAB input limits                         ; 46                    ;       ;
 ;         [d] Due to virtual I/Os                             ; 0                     ;       ;
 ;                                                             ;                       ;       ;
 ; Difficulty packing design                                   ; Low                   ;       ;
 ;                                                             ;                       ;       ;
-; Total LABs:  partially or completely used                   ; 283 / 3,207           ; 9 %   ;
-;     -- Logic LABs                                           ; 283                   ;       ;
+; Total LABs:  partially or completely used                   ; 278 / 3,207           ; 9 %   ;
+;     -- Logic LABs                                           ; 278                   ;       ;
 ;     -- Memory LABs (up to half of total LABs)               ; 0                     ;       ;
 ;                                                             ;                       ;       ;
-; Combinational ALUT usage for logic                          ; 3,202                 ;       ;
+; Combinational ALUT usage for logic                          ; 3,196                 ;       ;
 ;     -- 7 input functions                                    ; 36                    ;       ;
 ;     -- 6 input functions                                    ; 1,022                 ;       ;
-;     -- 5 input functions                                    ; 755                   ;       ;
-;     -- 4 input functions                                    ; 699                   ;       ;
-;     -- <=3 input functions                                  ; 690                   ;       ;
-; Combinational ALUT usage for route-throughs                 ; 85                    ;       ;
+;     -- 5 input functions                                    ; 746                   ;       ;
+;     -- 4 input functions                                    ; 688                   ;       ;
+;     -- <=3 input functions                                  ; 704                   ;       ;
+; Combinational ALUT usage for route-throughs                 ; 78                    ;       ;
 ;                                                             ;                       ;       ;
-; Dedicated logic registers                                   ; 1,252                 ;       ;
+; Dedicated logic registers                                   ; 1,292                 ;       ;
 ;     -- By type:                                             ;                       ;       ;
 ;         -- Primary logic registers                          ; 950 / 64,140          ; 1 %   ;
-;         -- Secondary logic registers                        ; 302 / 64,140          ; < 1 % ;
+;         -- Secondary logic registers                        ; 342 / 64,140          ; < 1 % ;
 ;     -- By function:                                         ;                       ;       ;
 ;         -- Design implementation registers                  ; 950                   ;       ;
-;         -- Routing optimization registers                   ; 302                   ;       ;
+;         -- Routing optimization registers                   ; 342                   ;       ;
 ;                                                             ;                       ;       ;
 ; Virtual pins                                                ; 0                     ;       ;
 ; I/O pins                                                    ; 81 / 457              ; 18 %  ;
@@ -811,12 +851,12 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; Oscillator blocks                                           ; 0 / 1                 ; 0 %   ;
 ; Impedance control blocks                                    ; 0 / 4                 ; 0 %   ;
 ; Hard Memory Controllers                                     ; 0 / 2                 ; 0 %   ;
-; Average interconnect usage (total/H/V)                      ; 2.8% / 2.7% / 2.9%    ;       ;
-; Peak interconnect usage (total/H/V)                         ; 33.0% / 31.9% / 36.8% ;       ;
-; Maximum fan-out                                             ; 1306                  ;       ;
+; Average interconnect usage (total/H/V)                      ; 3.0% / 2.9% / 3.0%    ;       ;
+; Peak interconnect usage (total/H/V)                         ; 52.2% / 53.1% / 49.4% ;       ;
+; Maximum fan-out                                             ; 1346                  ;       ;
 ; Highest non-global fan-out                                  ; 606                   ;       ;
-; Total fan-out                                               ; 20925                 ;       ;
-; Average fan-out                                             ; 4.40                  ;       ;
+; Total fan-out                                               ; 21008                 ;       ;
+; Average fan-out                                             ; 4.39                  ;       ;
 +-------------------------------------------------------------+-----------------------+-------+
 
 
@@ -825,33 +865,33 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 +-------------------------------------------------------------+-----------------------+--------------------------------+
 ; Statistic                                                   ; Top                   ; hard_block:auto_generated_inst ;
 +-------------------------------------------------------------+-----------------------+--------------------------------+
-; Logic utilization (ALMs needed / total ALMs on device)      ; 2044 / 32070 ( 6 % )  ; 0 / 32070 ( 0 % )              ;
-; ALMs needed [=A-B+C]                                        ; 2044                  ; 0                              ;
-;     [A] ALMs used in final placement [=a+b+c+d]             ; 2293 / 32070 ( 7 % )  ; 0 / 32070 ( 0 % )              ;
-;         [a] ALMs used for LUT logic and registers           ; 210                   ; 0                              ;
-;         [b] ALMs used for LUT logic                         ; 1818                  ; 0                              ;
-;         [c] ALMs used for registers                         ; 265                   ; 0                              ;
+; Logic utilization (ALMs needed / total ALMs on device)      ; 2072 / 32070 ( 6 % )  ; 0 / 32070 ( 0 % )              ;
+; ALMs needed [=A-B+C]                                        ; 2072                  ; 0                              ;
+;     [A] ALMs used in final placement [=a+b+c+d]             ; 2316 / 32070 ( 7 % )  ; 0 / 32070 ( 0 % )              ;
+;         [a] ALMs used for LUT logic and registers           ; 212                   ; 0                              ;
+;         [b] ALMs used for LUT logic                         ; 1841                  ; 0                              ;
+;         [c] ALMs used for registers                         ; 263                   ; 0                              ;
 ;         [d] ALMs used for memory (up to half of total ALMs) ; 0                     ; 0                              ;
-;     [B] Estimate of ALMs recoverable by dense packing       ; 281 / 32070 ( < 1 % ) ; 0 / 32070 ( 0 % )              ;
-;     [C] Estimate of ALMs unavailable [=a+b+c+d]             ; 32 / 32070 ( < 1 % )  ; 0 / 32070 ( 0 % )              ;
+;     [B] Estimate of ALMs recoverable by dense packing       ; 292 / 32070 ( < 1 % ) ; 0 / 32070 ( 0 % )              ;
+;     [C] Estimate of ALMs unavailable [=a+b+c+d]             ; 48 / 32070 ( < 1 % )  ; 0 / 32070 ( 0 % )              ;
 ;         [a] Due to location constrained logic               ; 0                     ; 0                              ;
-;         [b] Due to LAB-wide signal conflicts                ; 0                     ; 0                              ;
-;         [c] Due to LAB input limits                         ; 32                    ; 0                              ;
+;         [b] Due to LAB-wide signal conflicts                ; 2                     ; 0                              ;
+;         [c] Due to LAB input limits                         ; 46                    ; 0                              ;
 ;         [d] Due to virtual I/Os                             ; 0                     ; 0                              ;
 ;                                                             ;                       ;                                ;
 ; Difficulty packing design                                   ; Low                   ; Low                            ;
 ;                                                             ;                       ;                                ;
-; Total LABs:  partially or completely used                   ; 283 / 3207 ( 9 % )    ; 0 / 3207 ( 0 % )               ;
-;     -- Logic LABs                                           ; 283                   ; 0                              ;
+; Total LABs:  partially or completely used                   ; 278 / 3207 ( 9 % )    ; 0 / 3207 ( 0 % )               ;
+;     -- Logic LABs                                           ; 278                   ; 0                              ;
 ;     -- Memory LABs (up to half of total LABs)               ; 0                     ; 0                              ;
 ;                                                             ;                       ;                                ;
-; Combinational ALUT usage for logic                          ; 3202                  ; 0                              ;
+; Combinational ALUT usage for logic                          ; 3196                  ; 0                              ;
 ;     -- 7 input functions                                    ; 36                    ; 0                              ;
 ;     -- 6 input functions                                    ; 1022                  ; 0                              ;
-;     -- 5 input functions                                    ; 755                   ; 0                              ;
-;     -- 4 input functions                                    ; 699                   ; 0                              ;
-;     -- <=3 input functions                                  ; 690                   ; 0                              ;
-; Combinational ALUT usage for route-throughs                 ; 85                    ; 0                              ;
+;     -- 5 input functions                                    ; 746                   ; 0                              ;
+;     -- 4 input functions                                    ; 688                   ; 0                              ;
+;     -- <=3 input functions                                  ; 704                   ; 0                              ;
+; Combinational ALUT usage for route-throughs                 ; 78                    ; 0                              ;
 ; Memory ALUT usage                                           ; 0                     ; 0                              ;
 ;     -- 64-address deep                                      ; 0                     ; 0                              ;
 ;     -- 32-address deep                                      ; 0                     ; 0                              ;
@@ -859,10 +899,10 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ; Dedicated logic registers                                   ; 0                     ; 0                              ;
 ;     -- By type:                                             ;                       ;                                ;
 ;         -- Primary logic registers                          ; 950 / 64140 ( 1 % )   ; 0 / 64140 ( 0 % )              ;
-;         -- Secondary logic registers                        ; 302 / 64140 ( < 1 % ) ; 0 / 64140 ( 0 % )              ;
+;         -- Secondary logic registers                        ; 342 / 64140 ( < 1 % ) ; 0 / 64140 ( 0 % )              ;
 ;     -- By function:                                         ;                       ;                                ;
 ;         -- Design implementation registers                  ; 950                   ; 0                              ;
-;         -- Routing optimization registers                   ; 302                   ; 0                              ;
+;         -- Routing optimization registers                   ; 342                   ; 0                              ;
 ;                                                             ;                       ;                                ;
 ;                                                             ;                       ;                                ;
 ; Virtual pins                                                ; 0                     ; 0                              ;
@@ -880,8 +920,8 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 ;     -- Registered Output Connections                        ; 0                     ; 0                              ;
 ;                                                             ;                       ;                                ;
 ; Internal Connections                                        ;                       ;                                ;
-;     -- Total Connections                                    ; 21903                 ; 0                              ;
-;     -- Registered Connections                               ; 7327                  ; 0                              ;
+;     -- Total Connections                                    ; 21986                 ; 0                              ;
+;     -- Registered Connections                               ; 7304                  ; 0                              ;
 ;                                                             ;                       ;                                ;
 ; External Connections                                        ;                       ;                                ;
 ;     -- Top                                                  ; 0                     ; 0                              ;
@@ -913,10 +953,10 @@ The pin-out file can be found in /home/ks6n19/Documents/project/output_files/de1
 +----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
 ; Name     ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination ; Termination Control Block ; Location assigned by ; Slew Rate ;
 +----------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+
-; CLOCK_50 ; AF14  ; 3B       ; 32           ; 0            ; 0            ; 1306                  ; 0                  ; yes    ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; CLOCK_50 ; AF14  ; 3B       ; 32           ; 0            ; 0            ; 1346                  ; 0                  ; yes    ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
 ; KEY[0]   ; AA14  ; 3B       ; 36           ; 0            ; 0            ; 3                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
 ; KEY[1]   ; AA15  ; 3B       ; 36           ; 0            ; 17           ; 3                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
-; KEY[2]   ; W15   ; 3B       ; 40           ; 0            ; 0            ; 1245                  ; 0                  ; yes    ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
+; KEY[2]   ; W15   ; 3B       ; 40           ; 0            ; 0            ; 1284                  ; 0                  ; yes    ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
 ; KEY[3]   ; Y16   ; 3B       ; 40           ; 0            ; 17           ; 0                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
 ; SW[0]    ; AB12  ; 3A       ; 12           ; 0            ; 17           ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
 ; SW[1]    ; AC12  ; 3A       ; 16           ; 0            ; 0            ; 2                     ; 0                  ; no     ; no             ; no              ; no       ; Off          ; 2.5 V        ; Off         ; --                        ; User                 ; no        ;
@@ -2026,21 +2066,21 @@ Note: Pin directions (input, output or bidir) are based on device operating in u
 +----------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
 ; Compilation Hierarchy Node                   ; ALMs needed [=A-B+C] ; [A] ALMs used in final placement ; [B] Estimate of ALMs recoverable by dense packing ; [C] Estimate of ALMs unavailable ; ALMs used for memory ; Combinational ALUTs ; Dedicated Logic Registers ; I/O Registers ; Block Memory Bits ; M10Ks ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name                                                                                                               ; Entity Name      ; Library Name ;
 +----------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
-; |de1_soc_wrapper                             ; 2044.0 (14.0)        ; 2292.5 (14.5)                    ; 280.0 (0.5)                                       ; 31.5 (0.0)                       ; 0.0 (0.0)            ; 3202 (29)           ; 1252 (28)                 ; 0 (0)         ; 438272            ; 54    ; 0          ; 81   ; 0            ; |de1_soc_wrapper                                                                                                                  ; de1_soc_wrapper  ; work         ;
-;    |arm_soc:soc_inst|                        ; 1986.4 (0.0)         ; 2231.0 (0.0)                     ; 276.2 (0.0)                                       ; 31.5 (0.0)                       ; 0.0 (0.0)            ; 3100 (0)            ; 1197 (0)                  ; 0 (0)         ; 438272            ; 54    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst                                                                                                 ; arm_soc          ; work         ;
-;       |CORTEXM0DS:m0_1|                      ; 1868.8 (0.0)         ; 2112.3 (0.0)                     ; 273.1 (0.0)                                       ; 29.6 (0.0)                       ; 0.0 (0.0)            ; 2912 (0)            ; 1119 (0)                  ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1                                                                                 ; CORTEXM0DS       ; work         ;
-;          |cortexm0ds_logic:u_logic|          ; 1868.8 (1868.8)      ; 2112.3 (2112.3)                  ; 273.1 (273.1)                                     ; 29.6 (29.6)                      ; 0.0 (0.0)            ; 2912 (2912)         ; 1119 (1119)               ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic                                                        ; cortexm0ds_logic ; work         ;
-;       |ahb_interconnect:interconnect_1|      ; 19.8 (19.8)          ; 22.7 (22.7)                      ; 2.8 (2.8)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 43 (43)             ; 3 (3)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1                                                                 ; ahb_interconnect ; work         ;
-;       |ahb_pixel_memory:pix1|                ; 53.6 (15.7)          ; 52.7 (15.2)                      ; 0.0 (0.0)                                         ; 1.0 (0.6)                        ; 0.0 (0.0)            ; 82 (21)             ; 26 (20)                   ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1                                                                           ; ahb_pixel_memory ; work         ;
-;          |altsyncram:memory_rtl_0|           ; 37.7 (0.0)           ; 37.5 (0.0)                       ; 0.2 (0.0)                                         ; 0.4 (0.0)                        ; 0.0 (0.0)            ; 61 (0)              ; 6 (0)                     ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0                                                   ; altsyncram       ; work         ;
-;             |altsyncram_6ot1:auto_generated| ; 37.7 (1.8)           ; 37.5 (1.5)                       ; 0.2 (0.0)                                         ; 0.4 (0.3)                        ; 0.0 (0.0)            ; 61 (0)              ; 6 (6)                     ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated                    ; altsyncram_6ot1  ; work         ;
+; |de1_soc_wrapper                             ; 2071.5 (14.0)        ; 2315.5 (14.5)                    ; 291.0 (0.5)                                       ; 47.0 (0.0)                       ; 0.0 (0.0)            ; 3196 (29)           ; 1292 (28)                 ; 0 (0)         ; 438272            ; 54    ; 0          ; 81   ; 0            ; |de1_soc_wrapper                                                                                                                  ; de1_soc_wrapper  ; work         ;
+;    |arm_soc:soc_inst|                        ; 2015.5 (0.0)         ; 2258.5 (0.0)                     ; 290.0 (0.0)                                       ; 47.0 (0.0)                       ; 0.0 (0.0)            ; 3100 (0)            ; 1234 (0)                  ; 0 (0)         ; 438272            ; 54    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst                                                                                                 ; arm_soc          ; work         ;
+;       |CORTEXM0DS:m0_1|                      ; 1903.9 (0.0)         ; 2136.9 (0.0)                     ; 279.2 (0.0)                                       ; 46.2 (0.0)                       ; 0.0 (0.0)            ; 2912 (0)            ; 1152 (0)                  ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1                                                                                 ; CORTEXM0DS       ; work         ;
+;          |cortexm0ds_logic:u_logic|          ; 1903.9 (1903.9)      ; 2136.9 (2136.9)                  ; 279.2 (279.2)                                     ; 46.2 (46.2)                      ; 0.0 (0.0)            ; 2912 (2912)         ; 1152 (1152)               ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic                                                        ; cortexm0ds_logic ; work         ;
+;       |ahb_interconnect:interconnect_1|      ; 20.7 (20.7)          ; 24.1 (24.1)                      ; 3.9 (3.9)                                         ; 0.6 (0.6)                        ; 0.0 (0.0)            ; 43 (43)             ; 4 (4)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_interconnect:interconnect_1                                                                 ; ahb_interconnect ; work         ;
+;       |ahb_pixel_memory:pix1|                ; 52.9 (15.3)          ; 52.8 (15.2)                      ; 0.0 (0.0)                                         ; 0.1 (0.1)                        ; 0.0 (0.0)            ; 82 (21)             ; 27 (20)                   ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1                                                                           ; ahb_pixel_memory ; work         ;
+;          |altsyncram:memory_rtl_0|           ; 37.3 (0.0)           ; 37.6 (0.0)                       ; 0.3 (0.0)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 61 (0)              ; 7 (0)                     ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0                                                   ; altsyncram       ; work         ;
+;             |altsyncram_6ot1:auto_generated| ; 37.3 (1.5)           ; 37.6 (1.6)                       ; 0.3 (0.1)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 61 (0)              ; 7 (7)                     ; 0 (0)         ; 307200            ; 38    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated                    ; altsyncram_6ot1  ; work         ;
 ;                |decode_3na:decode2|          ; 24.8 (24.8)          ; 25.0 (25.0)                      ; 0.2 (0.2)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 50 (50)             ; 0 (0)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2 ; decode_3na       ; work         ;
-;                |mux_chb:mux3|                ; 11.1 (11.1)          ; 11.0 (11.0)                      ; 0.0 (0.0)                                         ; 0.1 (0.1)                        ; 0.0 (0.0)            ; 11 (11)             ; 0 (0)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|mux_chb:mux3       ; mux_chb          ; work         ;
-;       |ahb_ram:ram_1|                        ; 32.4 (32.4)          ; 31.9 (31.9)                      ; 0.4 (0.4)                                         ; 0.9 (0.9)                        ; 0.0 (0.0)            ; 52 (52)             ; 22 (22)                   ; 0 (0)         ; 131072            ; 16    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1                                                                                   ; ahb_ram          ; work         ;
+;                |mux_chb:mux3|                ; 11.0 (11.0)          ; 11.0 (11.0)                      ; 0.0 (0.0)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 11 (11)             ; 0 (0)                     ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|mux_chb:mux3       ; mux_chb          ; work         ;
+;       |ahb_ram:ram_1|                        ; 25.8 (25.8)          ; 31.1 (31.1)                      ; 5.4 (5.4)                                         ; 0.1 (0.1)                        ; 0.0 (0.0)            ; 52 (52)             ; 23 (23)                   ; 0 (0)         ; 131072            ; 16    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1                                                                                   ; ahb_ram          ; work         ;
 ;          |altsyncram:memory_rtl_0|           ; 0.0 (0.0)            ; 0.0 (0.0)                        ; 0.0 (0.0)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 0 (0)               ; 0 (0)                     ; 0 (0)         ; 131072            ; 16    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0                                                           ; altsyncram       ; work         ;
 ;             |altsyncram_nms1:auto_generated| ; 0.0 (0.0)            ; 0.0 (0.0)                        ; 0.0 (0.0)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 0 (0)               ; 0 (0)                     ; 0 (0)         ; 131072            ; 16    ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated                            ; altsyncram_nms1  ; work         ;
-;       |ahb_switches:switches_1|              ; 11.2 (11.2)          ; 11.5 (11.5)                      ; 0.3 (0.3)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 11 (11)             ; 27 (27)                   ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_switches:switches_1                                                                         ; ahb_switches     ; work         ;
-;    |razzle:raz_inst|                         ; 43.7 (43.7)          ; 47.0 (47.0)                      ; 3.3 (3.3)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 73 (73)             ; 27 (27)                   ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|razzle:raz_inst                                                                                                  ; razzle           ; work         ;
+;       |ahb_switches:switches_1|              ; 12.2 (12.2)          ; 13.6 (13.6)                      ; 1.4 (1.4)                                         ; 0.1 (0.1)                        ; 0.0 (0.0)            ; 11 (11)             ; 28 (28)                   ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_switches:switches_1                                                                         ; ahb_switches     ; work         ;
+;    |razzle:raz_inst|                         ; 42.0 (42.0)          ; 42.5 (42.5)                      ; 0.5 (0.5)                                         ; 0.0 (0.0)                        ; 0.0 (0.0)            ; 67 (67)             ; 30 (30)                   ; 0 (0)         ; 0                 ; 0     ; 0          ; 0    ; 0            ; |de1_soc_wrapper|razzle:raz_inst                                                                                                  ; razzle           ; work         ;
 +----------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
 Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
 
@@ -2118,15 +2158,15 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 ; VGA_CLK     ; Output   ; -- ; --   ; --   ; -- ; (0)  ; (31)  ; --     ; --                     ; --                       ;
 ; VGA_BLANK_N ; Output   ; -- ; --   ; --   ; -- ; (0)  ; (31)  ; --     ; --                     ; --                       ;
 ; CLOCK_50    ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; KEY[2]      ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; KEY[2]      ; Input    ; -- ; (0)  ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[7]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; KEY[1]      ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; KEY[0]      ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; KEY[1]      ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; KEY[0]      ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[2]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; SW[9]       ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; SW[9]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[1]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[4]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
-; SW[3]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
+; SW[3]       ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[5]       ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[0]       ; Input    ; -- ; (0)  ; --   ; -- ; --   ; --    ; --     ; --                     ; --                       ;
 ; SW[8]       ; Input    ; -- ; --   ; (0)  ; -- ; --   ; --    ; --     ; --                     ; --                       ;
@@ -2142,24 +2182,24 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 ; KEY[3]                                                             ;                   ;         ;
 ; CLOCK_50                                                           ;                   ;         ;
 ; KEY[2]                                                             ;                   ;         ;
-;      - razzle:raz_inst|VGA_HS~0                                    ; 0                 ; 0       ;
+;      - razzle:raz_inst|VGA_HS~0                                    ; 1                 ; 0       ;
 ; SW[7]                                                              ;                   ;         ;
 ;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][7] ; 0                 ; 0       ;
 ;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][7] ; 0                 ; 0       ;
 ; KEY[1]                                                             ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|always0~0          ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|DataValid~0        ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|last_buttons[1]~0  ; 1                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|always0~0          ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|DataValid~0        ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|last_buttons[1]~0  ; 0                 ; 0       ;
 ; KEY[0]                                                             ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|always0~1          ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|DataValid~1        ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|last_buttons[0]~1  ; 1                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|always0~1          ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|DataValid~1        ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|last_buttons[0]~1  ; 0                 ; 0       ;
 ; SW[2]                                                              ;                   ;         ;
 ;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][2] ; 0                 ; 0       ;
 ;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][2] ; 0                 ; 0       ;
 ; SW[9]                                                              ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][9] ; 1                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][9] ; 1                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][9] ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][9] ; 0                 ; 0       ;
 ; SW[1]                                                              ;                   ;         ;
 ;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][1] ; 0                 ; 0       ;
 ;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][1] ; 0                 ; 0       ;
@@ -2167,8 +2207,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 ;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][4] ; 0                 ; 0       ;
 ;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][4] ; 0                 ; 0       ;
 ; SW[3]                                                              ;                   ;         ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][3] ; 0                 ; 0       ;
-;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][3] ; 0                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][3] ; 1                 ; 0       ;
+;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][3] ; 1                 ; 0       ;
 ; SW[5]                                                              ;                   ;         ;
 ;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[0][5] ; 1                 ; 0       ;
 ;      - arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][5] ; 1                 ; 0       ;
@@ -2189,90 +2229,91 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 +------------------------------------------------------------------------------------------------------------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+
 ; Name                                                                                                                               ; Location             ; Fan-Out ; Usage        ; Global ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
 +------------------------------------------------------------------------------------------------------------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+
-; CLOCK_50                                                                                                                           ; PIN_AF14             ; 1306    ; Clock        ; yes    ; Global Clock         ; GCLK6            ; --                        ;
-; KEY[2]                                                                                                                             ; PIN_W15              ; 1244    ; Async. clear ; yes    ; Global Clock         ; GCLK4            ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ax1wx4~0                                                                 ; LABCELL_X29_Y24_N15  ; 41      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bpsvx4~0                                                                 ; MLABCELL_X52_Y19_N33 ; 19      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5ovx4                                                                   ; LABCELL_X46_Y16_N6   ; 27      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dv1wx4~0                                                                 ; MLABCELL_X28_Y23_N6  ; 44      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Edovx4                                                                   ; LABCELL_X51_Y16_N54  ; 11      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fw1wx4~1                                                                 ; MLABCELL_X28_Y25_N12 ; 41      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G02wx4                                                                   ; LABCELL_X29_Y21_N45  ; 43      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hfyvx4~2                                                                 ; LABCELL_X30_Y25_N33  ; 39      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hx1wx4~1                                                                 ; LABCELL_X29_Y24_N24  ; 40      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2uvx4~0                                                                 ; MLABCELL_X47_Y16_N36 ; 2       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5vvx4                                                                   ; LABCELL_X51_Y17_N15  ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K6yvx4~10                                                                ; LABCELL_X50_Y23_N6   ; 8       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kv1wx4~0                                                                 ; MLABCELL_X28_Y22_N24 ; 38      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L0uvx4                                                                   ; LABCELL_X45_Y17_N0   ; 14      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Meyvx4                                                                   ; MLABCELL_X28_Y23_N27 ; 44      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mw1wx4~1                                                                 ; LABCELL_X29_Y22_N0   ; 46      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pu1wx4                                                                   ; LABCELL_X29_Y21_N51  ; 42      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qztvx4                                                                   ; LABCELL_X46_Y21_N33  ; 14      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rfpvx4~5                                                                 ; LABCELL_X53_Y19_N54  ; 8       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rv1wx4~1                                                                 ; LABCELL_X27_Y23_N39  ; 42      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T5tvx4                                                                   ; LABCELL_X45_Y14_N30  ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tw1wx4~1                                                                 ; MLABCELL_X28_Y23_N3  ; 46      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U1uvx4                                                                   ; MLABCELL_X47_Y15_N36 ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5qvx4                                                                   ; LABCELL_X40_Y18_N30  ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vytvx4                                                                   ; MLABCELL_X47_Y16_N33 ; 11      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W2uvx4                                                                   ; LABCELL_X46_Y21_N15  ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wcyvx4~3                                                                 ; MLABCELL_X34_Y24_N6  ; 43      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wu1wx4~1                                                                 ; MLABCELL_X25_Y24_N27 ; 38      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yafwx4~5                                                                 ; MLABCELL_X52_Y19_N36 ; 8       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ydyvx4                                                                   ; MLABCELL_X28_Y21_N39 ; 42      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yv1wx4~1                                                                 ; MLABCELL_X28_Y23_N36 ; 46      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0uvx4                                                                   ; LABCELL_X45_Y18_N9   ; 13      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z9zvx4~0                                                                 ; LABCELL_X37_Y25_N27  ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_interconnect:interconnect_1|HREADY~0                                                                          ; MLABCELL_X39_Y14_N24 ; 66      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2699w[3]~1 ; MLABCELL_X39_Y27_N42 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2716w[3]~0 ; MLABCELL_X39_Y27_N21 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2726w[3]~0 ; MLABCELL_X39_Y27_N54 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2736w[3]~0 ; MLABCELL_X39_Y27_N33 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2746w[3]~1 ; LABCELL_X37_Y28_N6   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2756w[3]~0 ; LABCELL_X37_Y28_N51  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2766w[3]~1 ; LABCELL_X37_Y28_N30  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2776w[3]~0 ; MLABCELL_X39_Y28_N45 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2799w[3]~0 ; MLABCELL_X39_Y27_N0  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2810w[3]~0 ; MLABCELL_X39_Y27_N12 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2820w[3]~0 ; MLABCELL_X39_Y27_N24 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2830w[3]~0 ; MLABCELL_X39_Y27_N36 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2840w[3]~0 ; LABCELL_X37_Y28_N48  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2850w[3]~0 ; LABCELL_X37_Y28_N9   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2860w[3]~0 ; LABCELL_X37_Y28_N33  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2870w[3]~0 ; LABCELL_X37_Y28_N0   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2892w[3]~1 ; LABCELL_X37_Y28_N24  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2903w[3]~0 ; LABCELL_X37_Y28_N54  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2913w[3]~0 ; LABCELL_X37_Y28_N39  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2923w[3]~0 ; LABCELL_X37_Y28_N45  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2933w[3]~0 ; MLABCELL_X39_Y28_N6  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2943w[3]~1 ; LABCELL_X36_Y28_N12  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2953w[3]~1 ; MLABCELL_X39_Y28_N21 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2963w[3]~1 ; MLABCELL_X39_Y28_N18 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2985w[3]~1 ; LABCELL_X37_Y28_N3   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2996w[3]~0 ; LABCELL_X37_Y28_N18  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3006w[3]~0 ; LABCELL_X37_Y28_N21  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3016w[3]~0 ; LABCELL_X37_Y28_N12  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3026w[3]~1 ; MLABCELL_X39_Y28_N9  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3036w[3]~0 ; LABCELL_X36_Y28_N9   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3046w[3]~1 ; MLABCELL_X39_Y28_N12 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3056w[3]~0 ; MLABCELL_X39_Y28_N27 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3078w[3]~0 ; LABCELL_X36_Y28_N36  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3089w[3]~0 ; LABCELL_X36_Y28_N21  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3099w[3]~1 ; LABCELL_X36_Y28_N27  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3109w[3]~0 ; LABCELL_X36_Y28_N54  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3119w[3]~0 ; MLABCELL_X39_Y28_N42 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3129w[3]~0 ; MLABCELL_X39_Y28_N15 ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|always0~0                                                                                   ; MLABCELL_X39_Y15_N24 ; 20      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_ram:ram_1|always1~0                                                                                           ; MLABCELL_X39_Y15_N48 ; 33      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle                                                                                         ; FF_X40_Y16_N16       ; 61      ; Write enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_switches:switches_1|always0~0                                                                                 ; LABCELL_X43_Y15_N9   ; 10      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; arm_soc:soc_inst|ahb_switches:switches_1|always0~1                                                                                 ; LABCELL_X42_Y15_N6   ; 10      ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; razzle:raz_inst|Equal0~4                                                                                                           ; LABCELL_X30_Y28_N51  ; 11      ; Sync. load   ; no     ; --                   ; --               ; --                        ;
-; razzle:raz_inst|LessThan2~3                                                                                                        ; LABCELL_X29_Y28_N45  ; 21      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
-; razzle:raz_inst|VGA_HS~0                                                                                                           ; LABCELL_X30_Y28_N33  ; 2       ; Clock enable ; no     ; --                   ; --               ; --                        ;
-; razzle:raz_inst|always0~14                                                                                                         ; LABCELL_X30_Y27_N3   ; 11      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
-; tick_count[0]                                                                                                                      ; FF_X55_Y27_N2        ; 29      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; CLOCK_50                                                                                                                           ; PIN_AF14             ; 1346    ; Clock        ; yes    ; Global Clock         ; GCLK6            ; --                        ;
+; KEY[2]                                                                                                                             ; PIN_W15              ; 1283    ; Async. clear ; yes    ; Global Clock         ; GCLK4            ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ax1wx4~0                                                                 ; MLABCELL_X21_Y21_N24 ; 45      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bpsvx4~0                                                                 ; LABCELL_X30_Y14_N3   ; 19      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C5ovx4                                                                   ; MLABCELL_X39_Y20_N27 ; 26      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dv1wx4~0                                                                 ; LABCELL_X17_Y21_N51  ; 43      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Edovx4                                                                   ; MLABCELL_X34_Y16_N45 ; 11      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fw1wx4~1                                                                 ; LABCELL_X16_Y18_N3   ; 42      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G02wx4                                                                   ; LABCELL_X16_Y17_N15  ; 38      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hfyvx4~2                                                                 ; MLABCELL_X15_Y18_N45 ; 42      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hx1wx4~1                                                                 ; MLABCELL_X15_Y18_N54 ; 46      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2uvx4~0                                                                 ; LABCELL_X30_Y17_N24  ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J5vvx4                                                                   ; MLABCELL_X25_Y12_N9  ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K6yvx4~10                                                                ; LABCELL_X30_Y11_N36  ; 7       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kv1wx4~0                                                                 ; LABCELL_X17_Y21_N24  ; 45      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L0uvx4                                                                   ; LABCELL_X37_Y20_N3   ; 11      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Meyvx4                                                                   ; LABCELL_X17_Y21_N12  ; 45      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mw1wx4~1                                                                 ; LABCELL_X16_Y18_N33  ; 43      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pu1wx4                                                                   ; LABCELL_X18_Y15_N39  ; 40      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qztvx4                                                                   ; LABCELL_X33_Y20_N42  ; 14      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rfpvx4~5                                                                 ; LABCELL_X29_Y12_N42  ; 6       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rv1wx4~1                                                                 ; LABCELL_X17_Y21_N15  ; 41      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T5tvx4                                                                   ; MLABCELL_X39_Y20_N0  ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tw1wx4~1                                                                 ; LABCELL_X17_Y21_N54  ; 43      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U1uvx4                                                                   ; LABCELL_X35_Y16_N6   ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5qvx4                                                                   ; LABCELL_X30_Y14_N30  ; 4       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vytvx4                                                                   ; MLABCELL_X39_Y18_N24 ; 14      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W2uvx4                                                                   ; LABCELL_X30_Y20_N3   ; 6       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wcyvx4~3                                                                 ; MLABCELL_X15_Y18_N57 ; 43      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wu1wx4~1                                                                 ; LABCELL_X17_Y13_N39  ; 44      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yafwx4~5                                                                 ; LABCELL_X31_Y12_N36  ; 8       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ydyvx4                                                                   ; LABCELL_X16_Y13_N9   ; 47      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Yv1wx4~1                                                                 ; LABCELL_X17_Y21_N30  ; 50      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z0uvx4                                                                   ; LABCELL_X30_Y20_N15  ; 12      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z9zvx4~0                                                                 ; LABCELL_X23_Y13_N30  ; 3       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_interconnect:interconnect_1|HREADY~0                                                                          ; LABCELL_X29_Y17_N51  ; 69      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2699w[3]~1 ; LABCELL_X43_Y19_N30  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2716w[3]~0 ; LABCELL_X43_Y19_N6   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2726w[3]~0 ; LABCELL_X43_Y19_N27  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2736w[3]~0 ; LABCELL_X43_Y19_N24  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2746w[3]~1 ; LABCELL_X43_Y20_N15  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2756w[3]~0 ; LABCELL_X43_Y20_N57  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2766w[3]~1 ; LABCELL_X43_Y19_N42  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2776w[3]~0 ; LABCELL_X43_Y19_N45  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2799w[3]~0 ; LABCELL_X43_Y19_N48  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2810w[3]~0 ; LABCELL_X43_Y19_N9   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2820w[3]~0 ; LABCELL_X43_Y19_N51  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2830w[3]~0 ; LABCELL_X43_Y19_N33  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2840w[3]~0 ; LABCELL_X43_Y20_N54  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2850w[3]~0 ; LABCELL_X43_Y20_N12  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2860w[3]~0 ; LABCELL_X43_Y19_N54  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2870w[3]~0 ; LABCELL_X43_Y18_N27  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2892w[3]~1 ; LABCELL_X43_Y19_N57  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2903w[3]~0 ; LABCELL_X43_Y19_N39  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2913w[3]~0 ; LABCELL_X43_Y19_N18  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2923w[3]~0 ; LABCELL_X43_Y19_N21  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2933w[3]~0 ; LABCELL_X43_Y18_N24  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2943w[3]~1 ; LABCELL_X43_Y18_N57  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2953w[3]~1 ; LABCELL_X43_Y18_N3   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2963w[3]~1 ; LABCELL_X43_Y18_N0   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2985w[3]~1 ; LABCELL_X43_Y20_N30  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode2996w[3]~0 ; LABCELL_X43_Y19_N12  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3006w[3]~0 ; LABCELL_X43_Y19_N15  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3016w[3]~0 ; LABCELL_X43_Y20_N42  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3026w[3]~1 ; LABCELL_X43_Y18_N15  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3036w[3]~0 ; LABCELL_X43_Y18_N12  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3046w[3]~1 ; LABCELL_X43_Y18_N54  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3056w[3]~0 ; LABCELL_X43_Y18_N9   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3078w[3]~0 ; LABCELL_X43_Y20_N48  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3089w[3]~0 ; LABCELL_X43_Y20_N45  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3099w[3]~1 ; LABCELL_X43_Y20_N36  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3109w[3]~0 ; LABCELL_X43_Y20_N39  ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3119w[3]~0 ; LABCELL_X43_Y19_N3   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|decode_3na:decode2|w_anode3129w[3]~0 ; LABCELL_X43_Y19_N0   ; 1       ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|always0~0                                                                                   ; MLABCELL_X21_Y17_N6  ; 20      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_ram:ram_1|always1~0                                                                                           ; LABCELL_X22_Y17_N0   ; 33      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle                                                                                         ; FF_X29_Y17_N43       ; 30      ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle~DUPLICATE                                                                               ; FF_X29_Y17_N44       ; 31      ; Write enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_switches:switches_1|always0~0                                                                                 ; MLABCELL_X34_Y17_N0  ; 10      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; arm_soc:soc_inst|ahb_switches:switches_1|always0~1                                                                                 ; MLABCELL_X34_Y17_N6  ; 10      ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; razzle:raz_inst|Equal0~4                                                                                                           ; LABCELL_X45_Y21_N18  ; 11      ; Sync. load   ; no     ; --                   ; --               ; --                        ;
+; razzle:raz_inst|LessThan0~3                                                                                                        ; LABCELL_X43_Y21_N54  ; 22      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
+; razzle:raz_inst|VGA_HS~0                                                                                                           ; LABCELL_X42_Y21_N39  ; 2       ; Clock enable ; no     ; --                   ; --               ; --                        ;
+; razzle:raz_inst|always0~14                                                                                                         ; LABCELL_X42_Y21_N18  ; 11      ; Sync. clear  ; no     ; --                   ; --               ; --                        ;
+; tick_count[0]                                                                                                                      ; FF_X51_Y21_N2        ; 32      ; Clock enable ; no     ; --                   ; --               ; --                        ;
 +------------------------------------------------------------------------------------------------------------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+
 
 
@@ -2281,8 +2322,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 +----------+----------+---------+----------------------+------------------+---------------------------+
 ; Name     ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
 +----------+----------+---------+----------------------+------------------+---------------------------+
-; CLOCK_50 ; PIN_AF14 ; 1306    ; Global Clock         ; GCLK6            ; --                        ;
-; KEY[2]   ; PIN_W15  ; 1244    ; Global Clock         ; GCLK4            ; --                        ;
+; CLOCK_50 ; PIN_AF14 ; 1346    ; Global Clock         ; GCLK6            ; --                        ;
+; KEY[2]   ; PIN_W15  ; 1283    ; Global Clock         ; GCLK4            ; --                        ;
 +----------+----------+---------+----------------------+------------------+---------------------------+
 
 
@@ -2300,8 +2341,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
 +----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+-----------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
 ; Name                                                                                                     ; Type ; Mode             ; Clock Mode   ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size   ; Implementation Port A Depth ; Implementation Port A Width ; Implementation Port B Depth ; Implementation Port B Width ; Implementation Bits ; M10K blocks ; MLAB cells ; MIF                                                       ; Location                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             ; Mixed Width RDW Mode ; Port A RDW Mode ; Port B RDW Mode ; ECC Mode ; ECC Pipeline Registers ; Fits in MLABs         ;
 +----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+-----------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 307200       ; 1            ; 307200       ; 1            ; yes                    ; no                      ; yes                    ; no                      ; 307200 ; 307200                      ; 1                           ; 307200                      ; 1                           ; 307200              ; 38          ; 0          ; db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif ; M10K_X38_Y31_N0, M10K_X26_Y26_N0, M10K_X41_Y29_N0, M10K_X26_Y25_N0, M10K_X49_Y25_N0, M10K_X41_Y25_N0, M10K_X49_Y30_N0, M10K_X38_Y24_N0, M10K_X49_Y28_N0, M10K_X38_Y26_N0, M10K_X41_Y24_N0, M10K_X41_Y26_N0, M10K_X41_Y21_N0, M10K_X41_Y22_N0, M10K_X38_Y29_N0, M10K_X26_Y30_N0, M10K_X26_Y29_N0, M10K_X49_Y29_N0, M10K_X49_Y27_N0, M10K_X41_Y30_N0, M10K_X49_Y24_N0, M10K_X41_Y28_N0, M10K_X41_Y31_N0, M10K_X38_Y20_N0, M10K_X38_Y27_N0, M10K_X38_Y21_N0, M10K_X26_Y27_N0, M10K_X26_Y28_N0, M10K_X26_Y23_N0, M10K_X26_Y24_N0, M10K_X41_Y23_N0, M10K_X38_Y30_N0, M10K_X38_Y23_N0, M10K_X38_Y22_N0, M10K_X38_Y25_N0, M10K_X49_Y26_N0, M10K_X41_Y27_N0, M10K_X38_Y28_N0 ; Old data             ; New data        ; New data        ; Off      ; No                     ; No - Address Too Wide ;
-; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM         ; AUTO ; Simple Dual Port ; Single Clock ; 4096         ; 32           ; 4096         ; 32           ; yes                    ; no                      ; yes                    ; no                      ; 131072 ; 4096                        ; 32                          ; 4096                        ; 32                          ; 131072              ; 16          ; 0          ; db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif          ; M10K_X38_Y14_N0, M10K_X41_Y12_N0, M10K_X41_Y15_N0, M10K_X41_Y11_N0, M10K_X41_Y14_N0, M10K_X41_Y17_N0, M10K_X38_Y12_N0, M10K_X38_Y16_N0, M10K_X41_Y16_N0, M10K_X38_Y15_N0, M10K_X38_Y18_N0, M10K_X41_Y18_N0, M10K_X38_Y17_N0, M10K_X41_Y19_N0, M10K_X41_Y13_N0, M10K_X38_Y13_N0                                                                                                                                                                                                                                                                                                                                                                                       ; Old data             ; New data        ; New data        ; Off      ; No                     ; No - Address Too Wide ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Single Clock ; 307200       ; 1            ; 307200       ; 1            ; yes                    ; no                      ; yes                    ; no                      ; 307200 ; 307200                      ; 1                           ; 307200                      ; 1                           ; 307200              ; 38          ; 0          ; db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif ; M10K_X38_Y20_N0, M10K_X14_Y20_N0, M10K_X38_Y22_N0, M10K_X38_Y24_N0, M10K_X49_Y22_N0, M10K_X38_Y25_N0, M10K_X38_Y15_N0, M10K_X41_Y22_N0, M10K_X41_Y20_N0, M10K_X41_Y16_N0, M10K_X38_Y18_N0, M10K_X49_Y14_N0, M10K_X38_Y16_N0, M10K_X41_Y14_N0, M10K_X41_Y25_N0, M10K_X49_Y21_N0, M10K_X41_Y21_N0, M10K_X41_Y24_N0, M10K_X41_Y26_N0, M10K_X49_Y18_N0, M10K_X49_Y16_N0, M10K_X41_Y18_N0, M10K_X41_Y17_N0, M10K_X49_Y24_N0, M10K_X49_Y17_N0, M10K_X49_Y20_N0, M10K_X41_Y19_N0, M10K_X38_Y23_N0, M10K_X49_Y19_N0, M10K_X26_Y25_N0, M10K_X38_Y19_N0, M10K_X38_Y21_N0, M10K_X14_Y21_N0, M10K_X41_Y15_N0, M10K_X49_Y25_N0, M10K_X41_Y23_N0, M10K_X49_Y23_N0, M10K_X49_Y15_N0 ; Old data             ; New data        ; New data        ; Off      ; No                     ; No - Address Too Wide ;
+; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM         ; AUTO ; Simple Dual Port ; Single Clock ; 4096         ; 32           ; 4096         ; 32           ; yes                    ; no                      ; yes                    ; no                      ; 131072 ; 4096                        ; 32                          ; 4096                        ; 32                          ; 131072              ; 16          ; 0          ; db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif          ; M10K_X26_Y14_N0, M10K_X26_Y11_N0, M10K_X26_Y12_N0, M10K_X26_Y17_N0, M10K_X26_Y23_N0, M10K_X26_Y22_N0, M10K_X38_Y17_N0, M10K_X26_Y18_N0, M10K_X26_Y13_N0, M10K_X26_Y16_N0, M10K_X26_Y21_N0, M10K_X26_Y20_N0, M10K_X14_Y17_N0, M10K_X26_Y15_N0, M10K_X26_Y19_N0, M10K_X26_Y24_N0                                                                                                                                                                                                                                                                                                                                                                                       ; Old data             ; New data        ; New data        ; Off      ; No                     ; No - Address Too Wide ;
 +----------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+--------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+-------------+------------+-----------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------+-----------------+-----------------+----------+------------------------+-----------------------+
 Note: Fitter may spread logical memories into multiple blocks to improve timing. The actual required RAM blocks can be found in the Fitter Resource Usage section.
 
@@ -2311,10 +2352,10 @@ Note: Fitter may spread logical memories into multiple blocks to improve timing.
 +---------------------------------------------+-------------------------+
 ; Routing Resource Type                       ; Usage                   ;
 +---------------------------------------------+-------------------------+
-; Block interconnects                         ; 9,654 / 289,320 ( 3 % ) ;
-; C12 interconnects                           ; 191 / 13,420 ( 1 % )    ;
-; C2 interconnects                            ; 3,510 / 119,108 ( 3 % ) ;
-; C4 interconnects                            ; 1,853 / 56,300 ( 3 % )  ;
+; Block interconnects                         ; 9,930 / 289,320 ( 3 % ) ;
+; C12 interconnects                           ; 230 / 13,420 ( 2 % )    ;
+; C2 interconnects                            ; 3,662 / 119,108 ( 3 % ) ;
+; C4 interconnects                            ; 1,877 / 56,300 ( 3 % )  ;
 ; DQS bus muxes                               ; 0 / 25 ( 0 % )          ;
 ; DQS-18 I/O buses                            ; 0 / 25 ( 0 % )          ;
 ; DQS-9 I/O buses                             ; 0 / 25 ( 0 % )          ;
@@ -2374,13 +2415,13 @@ Note: Fitter may spread logical memories into multiple blocks to improve timing.
 ; HPS_INTERFACE_TPIU_TRACE_INPUTs             ; 0 / 2 ( 0 % )           ;
 ; HPS_INTERFACE_TPIU_TRACE_OUTPUTs            ; 0 / 33 ( 0 % )          ;
 ; Horizontal periphery clocks                 ; 0 / 72 ( 0 % )          ;
-; Local interconnects                         ; 1,823 / 84,580 ( 2 % )  ;
+; Local interconnects                         ; 1,870 / 84,580 ( 2 % )  ;
 ; Quadrant clocks                             ; 0 / 66 ( 0 % )          ;
 ; R14 interconnects                           ; 361 / 12,676 ( 3 % )    ;
-; R14/C12 interconnect drivers                ; 491 / 20,720 ( 2 % )    ;
-; R3 interconnects                            ; 4,028 / 130,992 ( 3 % ) ;
-; R6 interconnects                            ; 6,290 / 266,960 ( 2 % ) ;
-; Spine clocks                                ; 14 / 360 ( 4 % )        ;
+; R14/C12 interconnect drivers                ; 522 / 20,720 ( 3 % )    ;
+; R3 interconnects                            ; 4,164 / 130,992 ( 3 % ) ;
+; R6 interconnects                            ; 6,276 / 266,960 ( 2 % ) ;
+; Spine clocks                                ; 13 / 360 ( 4 % )        ;
 ; Wire stub REs                               ; 0 / 15,858 ( 0 % )      ;
 +---------------------------------------------+-------------------------+
 
@@ -2576,7 +2617,7 @@ Note: Fitter may spread logical memories into multiple blocks to improve timing.
 +-----------------+----------------------+-------------------+
 ; Source Clock(s) ; Destination Clock(s) ; Delay Added in ns ;
 +-----------------+----------------------+-------------------+
-; CLOCK_50        ; CLOCK_50             ; 37.5              ;
+; CLOCK_50        ; CLOCK_50             ; 38.1              ;
 +-----------------+----------------------+-------------------+
 Note: For more information on problematic transfers, consider running the Fitter again with the Optimize hold timing option (Settings Menu) turned off.
 This will disable optimization of problematic paths and expose them for further analysis using the TimeQuest Timing Analyzer.
@@ -2587,106 +2628,106 @@ This will disable optimization of problematic paths and expose them for further
 +------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+-------------------+
 ; Source Register                                                  ; Destination Register                                                                                                           ; Delay Added in ns ;
 +------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+-------------------+
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.666             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.501             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aok2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.501             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5t2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.501             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fij2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.501             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.501             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.501             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgj2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.501             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cyq2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.490             ;
-; tick_count[0]                                                    ; tick_count[25]                                                                                                                 ; 0.477             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vaw2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.457             ;
-; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[11]            ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.428             ;
-; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[8]             ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a3~porta_address_reg0          ; 0.422             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fcj2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.419             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|S4w2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.389             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|P2a3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.388             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W7z2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I6z2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K9z2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C3z2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K1z2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I2t2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Auk2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y6t2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Npk2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|byte_select[1]                                                                                  ; 0.378             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Igi2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4                                                               ; 0.375             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tna3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|She3z4                                                               ; 0.361             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7b3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8b3z4                                                               ; 0.350             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[10]            ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.583             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[11]            ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.529             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[3]             ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.493             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[4]             ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.477             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wu63z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ujp2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgp2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W893z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F483z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wyt2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gip2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F8v2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Efp2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ovc3z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wmp2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ilp2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nl53z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ec43z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mt13z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|V233z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zr03z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M1j2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fgm2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rni2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sjj2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fvz2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Wzy2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aok2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nsk2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Emi2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|O5t2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fij2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ark2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ffj2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Npk2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|L8t2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Sgj2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[3]                                                                         ; 0.472             ;
+; tick_count[0]                                                    ; tick_count[25]                                                                                                                 ; 0.467             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[1]             ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.457             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[7]             ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.457             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[5]             ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.445             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[6]             ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.445             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[8]             ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.445             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ywi2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.415             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[2]             ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.384             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U7w2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.372             ;
+; arm_soc:soc_inst|ahb_ram:ram_1|saved_word_address[0]             ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a30~portb_address_reg0         ; 0.366             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J7b3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z8b3z4                                                               ; 0.364             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U5a3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Rsa3z4                                                               ; 0.364             ;
+; razzle:raz_inst|H_count[1]                                       ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ram_block1a31~portb_address_reg0 ; 0.353             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tna3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jpa3z4                                                               ; 0.346             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lbn2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.342             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ycx2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|I793z4                                                               ; 0.340             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Taa3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gza3z4                                                               ; 0.332             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mka3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qxa3z4                                                               ; 0.326             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|A4t2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tki2z4                                                               ; 0.321             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qfa3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|C4b3z4                                                               ; 0.317             ;
 ; tick_count[25]                                                   ; heartbeat                                                                                                                      ; 0.311             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xly2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.307             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zoy2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.307             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nqy2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.307             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lny2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.307             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H9i2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.307             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hyy2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.307             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2x2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.307             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qdj2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.307             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tyx2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.307             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hxx2z4 ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a10~porta_address_reg0         ; 0.307             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z7i2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Iwp2z4                                                               ; 0.300             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|D4a3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ara3z4                                                               ; 0.288             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nfb3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dhb3z4                                                               ; 0.288             ;
-; arm_soc:soc_inst|ahb_ram:ram_1|write_cycle                       ; arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ram_block1a11~porta_we_reg               ; 0.287             ;
-; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][4]      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ckw2z4                                                               ; 0.284             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xuw2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Swy2z4                                                               ; 0.282             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fzl2z4 ; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[4]                                                                         ; 0.280             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Itw2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dvy2z4                                                               ; 0.267             ;
-; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][1]      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mfw2z4                                                               ; 0.266             ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[0]           ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ram_block1a12~porta_address_reg0 ; 0.265             ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[2]           ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ram_block1a22~porta_address_reg0 ; 0.260             ;
-; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[4]           ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ram_block1a22~porta_address_reg0 ; 0.257             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G9w2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jhy2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svs2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aqp2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uqi2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B1a3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vgs2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uls2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lns2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pab3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jxs2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqs2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcb3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z4l2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6l2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lhd3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|T7d3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J9d3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bjd3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H8l2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qrp2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Azs2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pcd3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Axm2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mis2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kss2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cps2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[1]      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Fed3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G8n2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|X9n2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Zad3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bmb3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tib3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kkb3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dks2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uaj2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|G0w2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Thm2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Trq2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|J0l2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|ahb_interconnect:interconnect_1|mux_sel[2]      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
-; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cam2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Bsy2z4                                                               ; 0.253             ;
+; razzle:raz_inst|H_count[5]                                       ; razzle:raz_inst|VGA_HS                                                                                                         ; 0.304             ;
+; razzle:raz_inst|H_count[4]                                       ; razzle:raz_inst|VGA_HS                                                                                                         ; 0.304             ;
+; razzle:raz_inst|H_count[3]                                       ; razzle:raz_inst|VGA_HS                                                                                                         ; 0.304             ;
+; razzle:raz_inst|H_count[2]                                       ; razzle:raz_inst|VGA_HS                                                                                                         ; 0.304             ;
+; razzle:raz_inst|H_count[0]                                       ; razzle:raz_inst|VGA_HS                                                                                                         ; 0.304             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mjl2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|K3l2z4                                                               ; 0.298             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Itw2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dvy2z4                                                               ; 0.297             ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][1]      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Mfw2z4                                                               ; 0.294             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Cma3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ddi3z4                                                               ; 0.286             ;
+; arm_soc:soc_inst|ahb_switches:switches_1|switch_store[1][4]      ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ckw2z4                                                               ; 0.280             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Nfb3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dhb3z4                                                               ; 0.279             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|U2x2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pdi2z4                                                               ; 0.276             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M9y2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Dvy2z4                                                               ; 0.272             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|W3f3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|M5f3z4                                                               ; 0.272             ;
+; arm_soc:soc_inst|ahb_pixel_memory:pix1|word_address[0]           ; arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ram_block1a33~porta_address_reg0 ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|F4c3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jkc3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Kyi2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Svs2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Aqp2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Hzj2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uqi2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|B1a3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uyv2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vgs2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Uls2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lns2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Pab3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lee3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Ble3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Jxs2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|H2f3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Tqs2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Gcb3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Y9l2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Z4l2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Usl2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Xdb3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Q6l2z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Vfd3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
+; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Lhd3z4 ; arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic|Qcy2z4                                                               ; 0.270             ;
 +------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+-------------------+
 Note: This table only shows the top 100 path(s) that have the largest delay added for hold.
 
@@ -2894,7 +2935,7 @@ Warning (15705): Ignored locations or region assignments to the following nodes
     Warning (15706): Node "USB_SDA" is assigned to location or region, but does not exist in design
     Warning (15706): Node "USB_WR_N" is assigned to location or region, but does not exist in design
     Warning (15706): Node "VGA_SYNC_N" is assigned to location or region, but does not exist in design
-Info (11798): Fitter preparation operations ending: elapsed time is 00:00:15
+Info (11798): Fitter preparation operations ending: elapsed time is 00:00:16
 Info (170189): Fitter placement preparation operations beginning
 Info (14951): The Fitter is using Advanced Physical Optimization.
 Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:15
@@ -2903,11 +2944,11 @@ Info (170137): Fitter placement was successful
 Info (170192): Fitter placement operations ending: elapsed time is 00:00:09
 Info (170193): Fitter routing operations beginning
 Info (170195): Router estimated average interconnect usage is 2% of the available device resources
-    Info (170196): Router estimated peak interconnect usage is 27% of the available device resources in the region that extends from location X33_Y11 to location X44_Y22
+    Info (170196): Router estimated peak interconnect usage is 42% of the available device resources in the region that extends from location X22_Y11 to location X32_Y22
 Info (170199): The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time.
     Info (170201): Optimizations that may affect the design's routability were skipped
-Info (170194): Fitter routing operations ending: elapsed time is 00:00:32
-Info (11888): Total time spent on timing analysis during the Fitter is 5.85 seconds.
+Info (170194): Fitter routing operations ending: elapsed time is 00:00:37
+Info (11888): Total time spent on timing analysis during the Fitter is 5.61 seconds.
 Info (334003): Started post-fitting delay annotation
 Info (334004): Delay annotation completed successfully
 Info (334003): Started post-fitting delay annotation
@@ -2916,10 +2957,10 @@ Info (11801): Fitter post-fit operations ending: elapsed time is 00:00:10
 Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
 Info (144001): Generated suppressed messages file /home/ks6n19/Documents/project/output_files/de1_soc_wrapper.fit.smsg
 Info: Quartus Prime Fitter was successful. 0 errors, 182 warnings
-    Info: Peak virtual memory: 2653 megabytes
-    Info: Processing ended: Thu Oct  1 13:35:57 2020
-    Info: Elapsed time: 00:02:02
-    Info: Total CPU time (on all processors): 00:11:26
+    Info: Peak virtual memory: 2657 megabytes
+    Info: Processing ended: Thu Oct  8 16:46:14 2020
+    Info: Elapsed time: 00:02:08
+    Info: Total CPU time (on all processors): 00:11:48
 
 
 +----------------------------+
diff --git a/output_files/de1_soc_wrapper.fit.summary b/output_files/de1_soc_wrapper.fit.summary
index bfff02488d71b48a678f5f2cf6de67b3f711b94b..6190aedb8c2e1d9cb27c047ffd2a0706cb5420f3 100644
--- a/output_files/de1_soc_wrapper.fit.summary
+++ b/output_files/de1_soc_wrapper.fit.summary
@@ -1,12 +1,12 @@
-Fitter Status : Successful - Thu Oct  1 13:35:55 2020
+Fitter Status : Successful - Thu Oct  8 16:46:12 2020
 Quartus Prime Version : 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 Revision Name : de1_soc_wrapper
 Top-level Entity Name : de1_soc_wrapper
 Family : Cyclone V
 Device : 5CSEMA5F31C6
 Timing Models : Final
-Logic utilization (in ALMs) : 2,044 / 32,070 ( 6 % )
-Total registers : 1252
+Logic utilization (in ALMs) : 2,072 / 32,070 ( 6 % )
+Total registers : 1292
 Total pins : 81 / 457 ( 18 % )
 Total virtual pins : 0
 Total block memory bits : 438,272 / 4,065,280 ( 11 % )
diff --git a/output_files/de1_soc_wrapper.flow.rpt b/output_files/de1_soc_wrapper.flow.rpt
index e6650fc8f502d173ea56281b8ceef9c617088507..6830815f6c541005e85806fae4294ac8bcd84ca3 100644
--- a/output_files/de1_soc_wrapper.flow.rpt
+++ b/output_files/de1_soc_wrapper.flow.rpt
@@ -1,5 +1,5 @@
 Flow report for de1_soc_wrapper
-Thu Oct  1 13:36:24 2020
+Thu Oct  8 16:46:41 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -41,15 +41,15 @@ agreement for further details.
 +-----------------------------------------------------------------------------------+
 ; Flow Summary                                                                      ;
 +---------------------------------+-------------------------------------------------+
-; Flow Status                     ; Successful - Thu Oct  1 13:36:24 2020           ;
+; Flow Status                     ; Successful - Thu Oct  8 16:46:41 2020           ;
 ; Quartus Prime Version           ; 16.1.2 Build 203 01/18/2017 SJ Standard Edition ;
 ; Revision Name                   ; de1_soc_wrapper                                 ;
 ; Top-level Entity Name           ; de1_soc_wrapper                                 ;
 ; Family                          ; Cyclone V                                       ;
 ; Device                          ; 5CSEMA5F31C6                                    ;
 ; Timing Models                   ; Final                                           ;
-; Logic utilization (in ALMs)     ; 2,044 / 32,070 ( 6 % )                          ;
-; Total registers                 ; 1252                                            ;
+; Logic utilization (in ALMs)     ; 2,072 / 32,070 ( 6 % )                          ;
+; Total registers                 ; 1292                                            ;
 ; Total pins                      ; 81 / 457 ( 18 % )                               ;
 ; Total virtual pins              ; 0                                               ;
 ; Total block memory bits         ; 438,272 / 4,065,280 ( 11 % )                    ;
@@ -68,7 +68,7 @@ agreement for further details.
 +-------------------+---------------------+
 ; Option            ; Setting             ;
 +-------------------+---------------------+
-; Start date & time ; 10/01/2020 13:33:28 ;
+; Start date & time ; 10/08/2020 16:43:39 ;
 ; Main task         ; Compilation         ;
 ; Revision Name     ; de1_soc_wrapper     ;
 +-------------------+---------------------+
@@ -79,7 +79,7 @@ agreement for further details.
 +-------------------------------------+----------------------------------------+---------------+-------------+----------------+
 ; Assignment Name                     ; Value                                  ; Default Value ; Entity Name ; Section Id     ;
 +-------------------------------------+----------------------------------------+---------------+-------------+----------------+
-; COMPILER_SIGNATURE_ID               ; 345050572627.160155560834601           ; --            ; --          ; --             ;
+; COMPILER_SIGNATURE_ID               ; 345050572627.160217181904096           ; --            ; --          ; --             ;
 ; EDA_OUTPUT_DATA_FORMAT              ; Verilog Hdl                            ; --            ; --          ; eda_simulation ;
 ; EDA_SIMULATION_TOOL                 ; ModelSim-Altera (Verilog)              ; <None>        ; --          ; --             ;
 ; EDA_TIME_SCALE                      ; 1 ps                                   ; --            ; --          ; eda_simulation ;
@@ -97,12 +97,12 @@ agreement for further details.
 +---------------------------+--------------+-------------------------+---------------------+------------------------------------+
 ; Module Name               ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
 +---------------------------+--------------+-------------------------+---------------------+------------------------------------+
-; Analysis & Synthesis      ; 00:00:26     ; 1.0                     ; 1290 MB             ; 00:00:41                           ;
-; Fitter                    ; 00:02:00     ; 1.3                     ; 2653 MB             ; 00:11:25                           ;
-; Assembler                 ; 00:00:09     ; 1.0                     ; 1117 MB             ; 00:00:08                           ;
-; TimeQuest Timing Analyzer ; 00:00:11     ; 3.3                     ; 1564 MB             ; 00:00:29                           ;
-; EDA Netlist Writer        ; 00:00:03     ; 1.0                     ; 1314 MB             ; 00:00:02                           ;
-; Total                     ; 00:02:49     ; --                      ; --                  ; 00:12:45                           ;
+; Analysis & Synthesis      ; 00:00:27     ; 1.0                     ; 1302 MB             ; 00:00:41                           ;
+; Fitter                    ; 00:02:06     ; 1.3                     ; 2657 MB             ; 00:11:47                           ;
+; Assembler                 ; 00:00:09     ; 1.0                     ; 1114 MB             ; 00:00:09                           ;
+; TimeQuest Timing Analyzer ; 00:00:11     ; 3.3                     ; 1563 MB             ; 00:00:30                           ;
+; EDA Netlist Writer        ; 00:00:02     ; 1.0                     ; 1317 MB             ; 00:00:02                           ;
+; Total                     ; 00:02:55     ; --                      ; --                  ; 00:13:09                           ;
 +---------------------------+--------------+-------------------------+---------------------+------------------------------------+
 
 
diff --git a/output_files/de1_soc_wrapper.map.rpt b/output_files/de1_soc_wrapper.map.rpt
index 1f71aa15c02f32041462efd504febdcd741f63a3..76d430fd1755f519655bde9340479fd5503e129c 100644
--- a/output_files/de1_soc_wrapper.map.rpt
+++ b/output_files/de1_soc_wrapper.map.rpt
@@ -1,5 +1,5 @@
 Analysis & Synthesis report for de1_soc_wrapper
-Thu Oct  1 13:33:54 2020
+Thu Oct  8 16:44:05 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -59,7 +59,7 @@ agreement for further details.
 +-----------------------------------------------------------------------------------+
 ; Analysis & Synthesis Summary                                                      ;
 +---------------------------------+-------------------------------------------------+
-; Analysis & Synthesis Status     ; Successful - Thu Oct  1 13:33:54 2020           ;
+; Analysis & Synthesis Status     ; Successful - Thu Oct  8 16:44:05 2020           ;
 ; Quartus Prime Version           ; 16.1.2 Build 203 01/18/2017 SJ Standard Edition ;
 ; Revision Name                   ; de1_soc_wrapper                                 ;
 ; Top-level Entity Name           ; de1_soc_wrapper                                 ;
@@ -174,7 +174,7 @@ agreement for further details.
 ; Number detected on machine ; 24          ;
 ; Maximum allowed            ; 16          ;
 ;                            ;             ;
-; Average used               ; 1.01        ;
+; Average used               ; 1.00        ;
 ; Maximum used               ; 16          ;
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
@@ -189,8 +189,7 @@ agreement for further details.
 ;     Processor 9            ;   0.0%      ;
 ;     Processor 10           ;   0.0%      ;
 ;     Processor 11           ;   0.0%      ;
-;     Processor 12           ;   0.0%      ;
-;     Processors 13-16       ;   0.0%      ;
+;     Processors 12-16       ;   0.0%      ;
 +----------------------------+-------------+
 
 
@@ -232,14 +231,14 @@ agreement for further details.
 +---------------------------------------------+----------------+
 ; Resource                                    ; Usage          ;
 +---------------------------------------------+----------------+
-; Estimate of Logic utilization (ALMs needed) ; 2159           ;
+; Estimate of Logic utilization (ALMs needed) ; 2156           ;
 ;                                             ;                ;
-; Combinational ALUT usage for logic          ; 3200           ;
+; Combinational ALUT usage for logic          ; 3194           ;
 ;     -- 7 input functions                    ; 36             ;
 ;     -- 6 input functions                    ; 1022           ;
-;     -- 5 input functions                    ; 755            ;
-;     -- 4 input functions                    ; 699            ;
-;     -- <=3 input functions                  ; 688            ;
+;     -- 5 input functions                    ; 746            ;
+;     -- 4 input functions                    ; 688            ;
+;     -- <=3 input functions                  ; 702            ;
 ;                                             ;                ;
 ; Dedicated logic registers                   ; 950            ;
 ;                                             ;                ;
@@ -251,8 +250,8 @@ agreement for further details.
 ;                                             ;                ;
 ; Maximum fan-out node                        ; CLOCK_50~input ;
 ; Maximum fan-out                             ; 1020           ;
-; Total fan-out                               ; 19937          ;
-; Average fan-out                             ; 4.55           ;
+; Total fan-out                               ; 19883          ;
+; Average fan-out                             ; 4.54           ;
 +---------------------------------------------+----------------+
 
 
@@ -261,7 +260,7 @@ agreement for further details.
 +----------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
 ; Compilation Hierarchy Node                   ; Combinational ALUTs ; Dedicated Logic Registers ; Block Memory Bits ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name                                                                                                               ; Entity Name      ; Library Name ;
 +----------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
-; |de1_soc_wrapper                             ; 3200 (27)           ; 950 (28)                  ; 438272            ; 0          ; 81   ; 0            ; |de1_soc_wrapper                                                                                                                  ; de1_soc_wrapper  ; work         ;
+; |de1_soc_wrapper                             ; 3194 (27)           ; 950 (28)                  ; 438272            ; 0          ; 81   ; 0            ; |de1_soc_wrapper                                                                                                                  ; de1_soc_wrapper  ; work         ;
 ;    |arm_soc:soc_inst|                        ; 3100 (0)            ; 896 (0)                   ; 438272            ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst                                                                                                 ; arm_soc          ; work         ;
 ;       |CORTEXM0DS:m0_1|                      ; 2912 (0)            ; 822 (0)                   ; 0                 ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1                                                                                 ; CORTEXM0DS       ; work         ;
 ;          |cortexm0ds_logic:u_logic|          ; 2912 (2912)         ; 822 (822)                 ; 0                 ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|CORTEXM0DS:m0_1|cortexm0ds_logic:u_logic                                                        ; cortexm0ds_logic ; work         ;
@@ -275,7 +274,7 @@ agreement for further details.
 ;          |altsyncram:memory_rtl_0|           ; 0 (0)               ; 0 (0)                     ; 131072            ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0                                                           ; altsyncram       ; work         ;
 ;             |altsyncram_nms1:auto_generated| ; 0 (0)               ; 0 (0)                     ; 131072            ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated                            ; altsyncram_nms1  ; work         ;
 ;       |ahb_switches:switches_1|              ; 11 (11)             ; 27 (27)                   ; 0                 ; 0          ; 0    ; 0            ; |de1_soc_wrapper|arm_soc:soc_inst|ahb_switches:switches_1                                                                         ; ahb_switches     ; work         ;
-;    |razzle:raz_inst|                         ; 73 (73)             ; 26 (26)                   ; 0                 ; 0          ; 0    ; 0            ; |de1_soc_wrapper|razzle:raz_inst                                                                                                  ; razzle           ; work         ;
+;    |razzle:raz_inst|                         ; 67 (67)             ; 26 (26)                   ; 0                 ; 0          ; 0    ; 0            ; |de1_soc_wrapper|razzle:raz_inst                                                                                                  ; razzle           ; work         ;
 +----------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------+--------------+
 Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
 
@@ -745,21 +744,22 @@ Note: In order to hide this table in the UI and the text report file, please set
 ;     ENA CLR SCLR      ; 11                          ;
 ;     ENA CLR SCLR SLD  ; 11                          ;
 ;     plain             ; 6                           ;
-; arriav_lcell_comb     ; 3205                        ;
+; arriav_lcell_comb     ; 3199                        ;
 ;     arith             ; 193                         ;
 ;         0 data inputs ; 3                           ;
 ;         1 data inputs ; 127                         ;
-;         2 data inputs ; 12                          ;
-;         4 data inputs ; 11                          ;
-;         5 data inputs ; 40                          ;
+;         2 data inputs ; 19                          ;
+;         3 data inputs ; 8                           ;
+;         4 data inputs ; 5                           ;
+;         5 data inputs ; 31                          ;
 ;     extend            ; 36                          ;
 ;         7 data inputs ; 36                          ;
-;     normal            ; 2976                        ;
+;     normal            ; 2970                        ;
 ;         0 data inputs ; 2                           ;
 ;         1 data inputs ; 19                          ;
 ;         2 data inputs ; 235                         ;
-;         3 data inputs ; 295                         ;
-;         4 data inputs ; 688                         ;
+;         3 data inputs ; 294                         ;
+;         4 data inputs ; 683                         ;
 ;         5 data inputs ; 715                         ;
 ;         6 data inputs ; 1022                        ;
 ; boundary_port         ; 81                          ;
@@ -785,7 +785,7 @@ Note: In order to hide this table in the UI and the text report file, please set
 Info: *******************************************************************
 Info: Running Quartus Prime Analysis & Synthesis
     Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
-    Info: Processing started: Thu Oct  1 13:33:27 2020
+    Info: Processing started: Thu Oct  8 16:43:38 2020
 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off project24_09 -c de1_soc_wrapper
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (20030): Parallel compilation is enabled and will use 16 of the 24 processors detected
@@ -829,7 +829,7 @@ Warning (10230): Verilog HDL assignment warning at ahb_interconnect.sv(39): trun
 Warning (10230): Verilog HDL assignment warning at ahb_interconnect.sv(41): truncated value with size 32 to match size of target (3) File: /home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv Line: 41
 Warning (10230): Verilog HDL assignment warning at ahb_interconnect.sv(43): truncated value with size 32 to match size of target (3) File: /home/ks6n19/Documents/project/behavioural/ahb_interconnect.sv Line: 43
 Info (12128): Elaborating entity "ahb_ram" for hierarchy "arm_soc:soc_inst|ahb_ram:ram_1" File: /home/ks6n19/Documents/project/behavioural/arm_soc.sv Line: 81
-Warning (10850): Verilog HDL warning at ahb_ram.sv(69): number of words (139) in memory file does not match the number of elements in the address range [0:4095] File: /home/ks6n19/Documents/project/behavioural/ahb_ram.sv Line: 69
+Warning (10850): Verilog HDL warning at ahb_ram.sv(69): number of words (228) in memory file does not match the number of elements in the address range [0:4095] File: /home/ks6n19/Documents/project/behavioural/ahb_ram.sv Line: 69
 Info (12128): Elaborating entity "ahb_switches" for hierarchy "arm_soc:soc_inst|ahb_switches:switches_1" File: /home/ks6n19/Documents/project/behavioural/arm_soc.sv Line: 91
 Info (12128): Elaborating entity "ahb_pixel_memory" for hierarchy "arm_soc:soc_inst|ahb_pixel_memory:pix1" File: /home/ks6n19/Documents/project/behavioural/arm_soc.sv Line: 97
 Warning (10230): Verilog HDL assignment warning at ahb_pixel_memory.sv(93): truncated value with size 32 to match size of target (1) File: /home/ks6n19/Documents/project/behavioural/ahb_pixel_memory.sv Line: 93
@@ -921,6 +921,8 @@ Info (12133): Instantiated megafunction "arm_soc:soc_inst|ahb_ram:ram_1|altsyncr
     Info (12134): Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA"
 Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_nms1.tdf
     Info (12023): Found entity 1: altsyncram_nms1 File: /home/ks6n19/Documents/project/db/altsyncram_nms1.tdf Line: 28
+Warning (127007): Memory Initialization File or Hexadecimal (Intel-Format) File "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" contains "don't care" values -- overwriting them with 0s File: /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf Line: 792
+Warning (127007): Memory Initialization File or Hexadecimal (Intel-Format) File "/home/ks6n19/Documents/project/db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif" contains "don't care" values -- overwriting them with 0s File: /srv/intelFPGA/16.1/quartus/libraries/megafunctions/altsyncram.tdf Line: 792
 Warning (13024): Output pins are stuck at VCC or GND
     Warning (13410): Pin "LEDR[0]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
     Warning (13410): Pin "LEDR[1]" is stuck at GND File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 15
@@ -973,16 +975,16 @@ Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
     Info (16011): Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL
 Warning (21074): Design contains 1 input pin(s) that do not drive logic
     Warning (15610): No output dependent on input pin "KEY[3]" File: /home/ks6n19/Documents/project/behavioural/de1_soc_wrapper.sv Line: 13
-Info (21057): Implemented 4014 device resources after synthesis - the final resource count might be different
+Info (21057): Implemented 4008 device resources after synthesis - the final resource count might be different
     Info (21058): Implemented 15 input pins
     Info (21059): Implemented 66 output pins
-    Info (21061): Implemented 3863 logic cells
+    Info (21061): Implemented 3857 logic cells
     Info (21064): Implemented 70 RAM segments
-Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 74 warnings
-    Info: Peak virtual memory: 1296 megabytes
-    Info: Processing ended: Thu Oct  1 13:33:54 2020
+Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 76 warnings
+    Info: Peak virtual memory: 1302 megabytes
+    Info: Processing ended: Thu Oct  8 16:44:05 2020
     Info: Elapsed time: 00:00:27
-    Info: Total CPU time (on all processors): 00:00:42
+    Info: Total CPU time (on all processors): 00:00:41
 
 
 +------------------------------------------+
diff --git a/output_files/de1_soc_wrapper.map.summary b/output_files/de1_soc_wrapper.map.summary
index 258ed0d62a6446a80c5a1190b6d9a6c5f611e7e6..55b85f1b452a805dc83044dad383e9a5c9f5ea6c 100644
--- a/output_files/de1_soc_wrapper.map.summary
+++ b/output_files/de1_soc_wrapper.map.summary
@@ -1,4 +1,4 @@
-Analysis & Synthesis Status : Successful - Thu Oct  1 13:33:54 2020
+Analysis & Synthesis Status : Successful - Thu Oct  8 16:44:05 2020
 Quartus Prime Version : 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 Revision Name : de1_soc_wrapper
 Top-level Entity Name : de1_soc_wrapper
diff --git a/output_files/de1_soc_wrapper.sof b/output_files/de1_soc_wrapper.sof
index 5a7bf359311a40772cedf3fd9e99fbfb6ba634f4..7b8a044154cdfa1ba7e7cec894c6c909d1b3cb3b 100644
Binary files a/output_files/de1_soc_wrapper.sof and b/output_files/de1_soc_wrapper.sof differ
diff --git a/output_files/de1_soc_wrapper.sta.rpt b/output_files/de1_soc_wrapper.sta.rpt
index b7ea7cc682b6eba0b6c9b32dbbc2ca572788121c..300be6639b6642af600b41975b3c04646bf20bc9 100644
--- a/output_files/de1_soc_wrapper.sta.rpt
+++ b/output_files/de1_soc_wrapper.sta.rpt
@@ -1,5 +1,5 @@
 TimeQuest Timing Analyzer report for de1_soc_wrapper
-Thu Oct  1 13:36:20 2020
+Thu Oct  8 16:46:38 2020
 Quartus Prime Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
 
 
@@ -100,26 +100,26 @@ agreement for further details.
 ; Number detected on machine ; 24          ;
 ; Maximum allowed            ; 16          ;
 ;                            ;             ;
-; Average used               ; 3.30        ;
+; Average used               ; 3.32        ;
 ; Maximum used               ; 16          ;
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;  24.8%      ;
-;     Processor 3            ;  24.6%      ;
-;     Processor 4            ;  24.5%      ;
-;     Processor 5            ;  13.0%      ;
-;     Processor 6            ;  13.0%      ;
-;     Processor 7            ;  13.0%      ;
-;     Processor 8            ;  13.0%      ;
-;     Processor 9            ;  13.0%      ;
-;     Processor 10           ;  13.0%      ;
-;     Processor 11           ;  13.0%      ;
-;     Processor 12           ;  13.0%      ;
-;     Processor 13           ;  13.0%      ;
-;     Processor 14           ;  13.0%      ;
-;     Processor 15           ;  13.0%      ;
-;     Processor 16           ;  12.9%      ;
+;     Processor 2            ;  24.5%      ;
+;     Processor 3            ;  24.4%      ;
+;     Processor 4            ;  24.3%      ;
+;     Processor 5            ;  13.2%      ;
+;     Processor 6            ;  13.2%      ;
+;     Processor 7            ;  13.2%      ;
+;     Processor 8            ;  13.2%      ;
+;     Processor 9            ;  13.2%      ;
+;     Processor 10           ;  13.2%      ;
+;     Processor 11           ;  13.2%      ;
+;     Processor 12           ;  13.2%      ;
+;     Processor 13           ;  13.2%      ;
+;     Processor 14           ;  13.2%      ;
+;     Processor 15           ;  13.2%      ;
+;     Processor 16           ;  13.2%      ;
 +----------------------------+-------------+
 
 
@@ -137,7 +137,7 @@ agreement for further details.
 +-----------+-----------------+------------+------+
 ; Fmax      ; Restricted Fmax ; Clock Name ; Note ;
 +-----------+-----------------+------------+------+
-; 79.76 MHz ; 79.76 MHz       ; CLOCK_50   ;      ;
+; 80.72 MHz ; 80.72 MHz       ; CLOCK_50   ;      ;
 +-----------+-----------------+------------+------+
 This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
 
@@ -153,7 +153,7 @@ HTML report is unavailable in plain text report export.
 +----------+---------+----------------+
 ; Clock    ; Slack   ; End Point TNS  ;
 +----------+---------+----------------+
-; CLOCK_50 ; -11.537 ; -23913.191     ;
+; CLOCK_50 ; -11.388 ; -23034.431     ;
 +----------+---------+----------------+
 
 
@@ -162,7 +162,7 @@ HTML report is unavailable in plain text report export.
 +----------+-------+-----------------+
 ; Clock    ; Slack ; End Point TNS   ;
 +----------+-------+-----------------+
-; CLOCK_50 ; 0.368 ; 0.000           ;
+; CLOCK_50 ; 0.273 ; 0.000           ;
 +----------+-------+-----------------+
 
 
@@ -183,7 +183,7 @@ No paths to report.
 +----------+--------+-------------------------------+
 ; Clock    ; Slack  ; End Point TNS                 ;
 +----------+--------+-------------------------------+
-; CLOCK_50 ; -2.636 ; -9163.422                     ;
+; CLOCK_50 ; -2.636 ; -9183.818                     ;
 +----------+--------+-------------------------------+
 
 
@@ -198,7 +198,7 @@ No synchronizer chains to report.
 +-----------+-----------------+------------+------+
 ; Fmax      ; Restricted Fmax ; Clock Name ; Note ;
 +-----------+-----------------+------------+------+
-; 81.76 MHz ; 81.76 MHz       ; CLOCK_50   ;      ;
+; 82.21 MHz ; 82.21 MHz       ; CLOCK_50   ;      ;
 +-----------+-----------------+------------+------+
 This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.
 
@@ -208,7 +208,7 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp
 +----------+---------+---------------+
 ; Clock    ; Slack   ; End Point TNS ;
 +----------+---------+---------------+
-; CLOCK_50 ; -11.231 ; -23126.760    ;
+; CLOCK_50 ; -11.164 ; -22324.349    ;
 +----------+---------+---------------+
 
 
@@ -217,7 +217,7 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp
 +----------+-------+----------------+
 ; Clock    ; Slack ; End Point TNS  ;
 +----------+-------+----------------+
-; CLOCK_50 ; 0.340 ; 0.000          ;
+; CLOCK_50 ; 0.258 ; 0.000          ;
 +----------+-------+----------------+
 
 
@@ -238,7 +238,7 @@ No paths to report.
 +----------+--------+------------------------------+
 ; Clock    ; Slack  ; End Point TNS                ;
 +----------+--------+------------------------------+
-; CLOCK_50 ; -2.636 ; -9190.399                    ;
+; CLOCK_50 ; -2.636 ; -9212.118                    ;
 +----------+--------+------------------------------+
 
 
@@ -253,7 +253,7 @@ No synchronizer chains to report.
 +----------+--------+-----------------+
 ; Clock    ; Slack  ; End Point TNS   ;
 +----------+--------+-----------------+
-; CLOCK_50 ; -6.860 ; -13556.504      ;
+; CLOCK_50 ; -6.884 ; -13002.742      ;
 +----------+--------+-----------------+
 
 
@@ -262,7 +262,7 @@ No synchronizer chains to report.
 +----------+-------+-----------------+
 ; Clock    ; Slack ; End Point TNS   ;
 +----------+-------+-----------------+
-; CLOCK_50 ; 0.180 ; 0.000           ;
+; CLOCK_50 ; 0.179 ; 0.000           ;
 +----------+-------+-----------------+
 
 
@@ -283,7 +283,7 @@ No paths to report.
 +----------+--------+-------------------------------+
 ; Clock    ; Slack  ; End Point TNS                 ;
 +----------+--------+-------------------------------+
-; CLOCK_50 ; -2.636 ; -8582.919                     ;
+; CLOCK_50 ; -2.636 ; -8585.675                     ;
 +----------+--------+-------------------------------+
 
 
@@ -298,7 +298,7 @@ No synchronizer chains to report.
 +----------+--------+----------------+
 ; Clock    ; Slack  ; End Point TNS  ;
 +----------+--------+----------------+
-; CLOCK_50 ; -5.976 ; -11702.438     ;
+; CLOCK_50 ; -5.977 ; -11265.488     ;
 +----------+--------+----------------+
 
 
@@ -328,7 +328,7 @@ No paths to report.
 +----------+--------+------------------------------+
 ; Clock    ; Slack  ; End Point TNS                ;
 +----------+--------+------------------------------+
-; CLOCK_50 ; -2.636 ; -8586.688                    ;
+; CLOCK_50 ; -2.636 ; -8590.161                    ;
 +----------+--------+------------------------------+
 
 
@@ -343,10 +343,10 @@ No synchronizer chains to report.
 +------------------+------------+-------+----------+---------+---------------------+
 ; Clock            ; Setup      ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
 +------------------+------------+-------+----------+---------+---------------------+
-; Worst-case Slack ; -11.537    ; 0.170 ; N/A      ; N/A     ; -2.636              ;
-;  CLOCK_50        ; -11.537    ; 0.170 ; N/A      ; N/A     ; -2.636              ;
-; Design-wide TNS  ; -23913.191 ; 0.0   ; 0.0      ; 0.0     ; -9190.399           ;
-;  CLOCK_50        ; -23913.191 ; 0.000 ; N/A      ; N/A     ; -9190.399           ;
+; Worst-case Slack ; -11.388    ; 0.170 ; N/A      ; N/A     ; -2.636              ;
+;  CLOCK_50        ; -11.388    ; 0.170 ; N/A      ; N/A     ; -2.636              ;
+; Design-wide TNS  ; -23034.431 ; 0.0   ; 0.0      ; 0.0     ; -9212.118           ;
+;  CLOCK_50        ; -23034.431 ; 0.000 ; N/A      ; N/A     ; -9212.118           ;
 +------------------+------------+-------+----------+---------+---------------------+
 
 
@@ -748,7 +748,7 @@ No synchronizer chains to report.
 +------------+----------+----------+----------+----------+----------+
 ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
 +------------+----------+----------+----------+----------+----------+
-; CLOCK_50   ; CLOCK_50 ; 81412638 ; 0        ; 0        ; 0        ;
+; CLOCK_50   ; CLOCK_50 ; 83463397 ; 0        ; 0        ; 0        ;
 +------------+----------+----------+----------+----------+----------+
 Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
 
@@ -758,7 +758,7 @@ Entries labeled "false path" only account for clock-to-clock false paths and not
 +------------+----------+----------+----------+----------+----------+
 ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
 +------------+----------+----------+----------+----------+----------+
-; CLOCK_50   ; CLOCK_50 ; 81412638 ; 0        ; 0        ; 0        ;
+; CLOCK_50   ; CLOCK_50 ; 83463397 ; 0        ; 0        ; 0        ;
 +------------+----------+----------+----------+----------+----------+
 Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.
 
@@ -783,9 +783,9 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
 ; Illegal Clocks                  ; 0     ; 0    ;
 ; Unconstrained Clocks            ; 0     ; 0    ;
 ; Unconstrained Input Ports       ; 13    ; 13   ;
-; Unconstrained Input Port Paths  ; 1290  ; 1290 ;
+; Unconstrained Input Port Paths  ; 1329  ; 1329 ;
 ; Unconstrained Output Ports      ; 22    ; 22   ;
-; Unconstrained Output Port Paths ; 679   ; 679  ;
+; Unconstrained Output Port Paths ; 711   ; 711  ;
 +---------------------------------+-------+------+
 
 
@@ -906,7 +906,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
 Info: *******************************************************************
 Info: Running Quartus Prime TimeQuest Timing Analyzer
     Info: Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition
-    Info: Processing started: Thu Oct  1 13:36:09 2020
+    Info: Processing started: Thu Oct  8 16:46:26 2020
 Info: Command: quartus_sta project24_09 -c de1_soc_wrapper
 Info: qsta_default_script.tcl version: #1
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
@@ -923,68 +923,68 @@ Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
 Info: Analyzing Slow 1100mV 85C Model
 Critical Warning (332148): Timing requirements not met
     Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
-Info (332146): Worst-case setup slack is -11.537
+Info (332146): Worst-case setup slack is -11.388
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):   -11.537          -23913.191 CLOCK_50 
-Info (332146): Worst-case hold slack is 0.368
+    Info (332119):   -11.388          -23034.431 CLOCK_50 
+Info (332146): Worst-case hold slack is 0.273
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):     0.368               0.000 CLOCK_50 
+    Info (332119):     0.273               0.000 CLOCK_50 
 Info (332140): No Recovery paths to report
 Info (332140): No Removal paths to report
 Info (332146): Worst-case minimum pulse width slack is -2.636
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -2.636           -9163.422 CLOCK_50 
+    Info (332119):    -2.636           -9183.818 CLOCK_50 
 Info: Analyzing Slow 1100mV 0C Model
 Info (334003): Started post-fitting delay annotation
 Info (334004): Delay annotation completed successfully
 Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
 Critical Warning (332148): Timing requirements not met
     Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
-Info (332146): Worst-case setup slack is -11.231
+Info (332146): Worst-case setup slack is -11.164
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):   -11.231          -23126.760 CLOCK_50 
-Info (332146): Worst-case hold slack is 0.340
+    Info (332119):   -11.164          -22324.349 CLOCK_50 
+Info (332146): Worst-case hold slack is 0.258
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):     0.340               0.000 CLOCK_50 
+    Info (332119):     0.258               0.000 CLOCK_50 
 Info (332140): No Recovery paths to report
 Info (332140): No Removal paths to report
 Info (332146): Worst-case minimum pulse width slack is -2.636
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -2.636           -9190.399 CLOCK_50 
+    Info (332119):    -2.636           -9212.118 CLOCK_50 
 Info: Analyzing Fast 1100mV 85C Model
 Info (334003): Started post-fitting delay annotation
 Info (334004): Delay annotation completed successfully
 Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
 Critical Warning (332148): Timing requirements not met
     Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
-Info (332146): Worst-case setup slack is -6.860
+Info (332146): Worst-case setup slack is -6.884
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -6.860          -13556.504 CLOCK_50 
-Info (332146): Worst-case hold slack is 0.180
+    Info (332119):    -6.884          -13002.742 CLOCK_50 
+Info (332146): Worst-case hold slack is 0.179
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):     0.180               0.000 CLOCK_50 
+    Info (332119):     0.179               0.000 CLOCK_50 
 Info (332140): No Recovery paths to report
 Info (332140): No Removal paths to report
 Info (332146): Worst-case minimum pulse width slack is -2.636
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -2.636           -8582.919 CLOCK_50 
+    Info (332119):    -2.636           -8585.675 CLOCK_50 
 Info: Analyzing Fast 1100mV 0C Model
 Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
 Critical Warning (332148): Timing requirements not met
     Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
-Info (332146): Worst-case setup slack is -5.976
+Info (332146): Worst-case setup slack is -5.977
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -5.976          -11702.438 CLOCK_50 
+    Info (332119):    -5.977          -11265.488 CLOCK_50 
 Info (332146): Worst-case hold slack is 0.170
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
@@ -994,13 +994,13 @@ Info (332140): No Removal paths to report
 Info (332146): Worst-case minimum pulse width slack is -2.636
     Info (332119):     Slack       End Point TNS Clock 
     Info (332119): ========= =================== =====================
-    Info (332119):    -2.636           -8586.688 CLOCK_50 
+    Info (332119):    -2.636           -8590.161 CLOCK_50 
 Info (332102): Design is not fully constrained for setup requirements
 Info (332102): Design is not fully constrained for hold requirements
 Info: Quartus Prime TimeQuest Timing Analyzer was successful. 0 errors, 6 warnings
-    Info: Peak virtual memory: 1564 megabytes
-    Info: Processing ended: Thu Oct  1 13:36:20 2020
-    Info: Elapsed time: 00:00:11
-    Info: Total CPU time (on all processors): 00:00:29
+    Info: Peak virtual memory: 1563 megabytes
+    Info: Processing ended: Thu Oct  8 16:46:38 2020
+    Info: Elapsed time: 00:00:12
+    Info: Total CPU time (on all processors): 00:00:30
 
 
diff --git a/output_files/de1_soc_wrapper.sta.summary b/output_files/de1_soc_wrapper.sta.summary
index 24ee53a2db47d1db7bb7afe5e59a4d98c876f9d5..22e880393881b00fdc7021554a62ed2f6c353f47 100644
--- a/output_files/de1_soc_wrapper.sta.summary
+++ b/output_files/de1_soc_wrapper.sta.summary
@@ -3,44 +3,44 @@ TimeQuest Timing Analyzer Summary
 ------------------------------------------------------------
 
 Type  : Slow 1100mV 85C Model Setup 'CLOCK_50'
-Slack : -11.537
-TNS   : -23913.191
+Slack : -11.388
+TNS   : -23034.431
 
 Type  : Slow 1100mV 85C Model Hold 'CLOCK_50'
-Slack : 0.368
+Slack : 0.273
 TNS   : 0.000
 
 Type  : Slow 1100mV 85C Model Minimum Pulse Width 'CLOCK_50'
 Slack : -2.636
-TNS   : -9163.422
+TNS   : -9183.818
 
 Type  : Slow 1100mV 0C Model Setup 'CLOCK_50'
-Slack : -11.231
-TNS   : -23126.760
+Slack : -11.164
+TNS   : -22324.349
 
 Type  : Slow 1100mV 0C Model Hold 'CLOCK_50'
-Slack : 0.340
+Slack : 0.258
 TNS   : 0.000
 
 Type  : Slow 1100mV 0C Model Minimum Pulse Width 'CLOCK_50'
 Slack : -2.636
-TNS   : -9190.399
+TNS   : -9212.118
 
 Type  : Fast 1100mV 85C Model Setup 'CLOCK_50'
-Slack : -6.860
-TNS   : -13556.504
+Slack : -6.884
+TNS   : -13002.742
 
 Type  : Fast 1100mV 85C Model Hold 'CLOCK_50'
-Slack : 0.180
+Slack : 0.179
 TNS   : 0.000
 
 Type  : Fast 1100mV 85C Model Minimum Pulse Width 'CLOCK_50'
 Slack : -2.636
-TNS   : -8582.919
+TNS   : -8585.675
 
 Type  : Fast 1100mV 0C Model Setup 'CLOCK_50'
-Slack : -5.976
-TNS   : -11702.438
+Slack : -5.977
+TNS   : -11265.488
 
 Type  : Fast 1100mV 0C Model Hold 'CLOCK_50'
 Slack : 0.170
@@ -48,6 +48,6 @@ TNS   : 0.000
 
 Type  : Fast 1100mV 0C Model Minimum Pulse Width 'CLOCK_50'
 Slack : -2.636
-TNS   : -8586.688
+TNS   : -8590.161
 
 ------------------------------------------------------------
diff --git a/simulation/modelsim/de1_soc_wrapper.vo b/simulation/modelsim/de1_soc_wrapper.vo
index f659756a0d16739f57912a9e44944cf80bc0c11a..eb010c0e6c9876e056bc94c01f26219c69b35694 100644
--- a/simulation/modelsim/de1_soc_wrapper.vo
+++ b/simulation/modelsim/de1_soc_wrapper.vo
@@ -17,7 +17,7 @@
 // PROGRAM "Quartus Prime"
 // VERSION "Version 16.1.2 Build 203 01/18/2017 SJ Standard Edition"
 
-// DATE "10/01/2020 13:36:23"
+// DATE "10/08/2020 16:46:40"
 
 // 
 // Device: Altera 5CSEMA5F31C6 Package FBGA896
@@ -214,4229 +214,4183 @@ wire \Add0~10 ;
 wire \Add0~1_sumout ;
 wire \heartbeat~0_combout ;
 wire \heartbeat~q ;
-wire \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tki2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|M9pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S5pvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Emi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xx2wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ark2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z1ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fij2z4~q ;
-wire \soc_inst|m0_1|u_logic|G2lwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Howvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G2lwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Pcyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|C9yvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Dplwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cllwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Socwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q5c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G97wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z5pvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ;
-wire \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ;
-wire \soc_inst|m0_1|u_logic|hsize_o~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qfdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kfd2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Duc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|B8c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Aok2z4~q ;
 wire \soc_inst|m0_1|u_logic|Orewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ibrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hxx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ju5wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Vbovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zlnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nbm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Lwqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P1c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|A0zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G0c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jyb2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xhiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jyb2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Jyb2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|G9w2z4~q ;
-wire \soc_inst|m0_1|u_logic|Y9t2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ahwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Csewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pdi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eyhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B1vvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qp3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ae6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ffxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V1yvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Md6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dc6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dc6wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lny2z4~q ;
-wire \SW[6]~input_o ;
+wire \soc_inst|interconnect_1|HRDATA[25]~1_combout ;
+wire \soc_inst|interconnect_1|Equal1~0_combout ;
+wire \SW[9]~input_o ;
 wire \KEY[1]~input_o ;
 wire \soc_inst|switches_1|last_buttons[1]~0_combout ;
 wire \soc_inst|switches_1|always0~0_combout ;
-wire \soc_inst|switches_1|switch_store[1][6]~q ;
-wire \soc_inst|ram_1|byte0~0_combout ;
+wire \soc_inst|switches_1|switch_store[1][9]~q ;
+wire \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L8t2z4~q ;
+wire \soc_inst|m0_1|u_logic|A4c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kryvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B73wx4~combout ;
+wire \soc_inst|m0_1|u_logic|C9yvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ark2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qr42z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qr42z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|O5t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gzvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1vvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jp3wx4~combout ;
+wire \soc_inst|m0_1|u_logic|X77wx4~combout ;
+wire \soc_inst|m0_1|u_logic|H0zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gzvvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Howvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bxcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lu6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wxcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Emi2z4~q ;
 wire \soc_inst|m0_1|u_logic|Y1d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y1d2z4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Wdxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y1d2z4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Y1d2z4~2_combout ;
 wire \soc_inst|m0_1|u_logic|K1wvx4~combout ;
-wire \soc_inst|m0_1|u_logic|W28wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Egkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Df3wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xiwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H9iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G36wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|O9qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jppvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A76wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O76wx4~combout ;
-wire \soc_inst|m0_1|u_logic|W46wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|M4fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hub3z4~q ;
-wire \soc_inst|m0_1|u_logic|Rsqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H1rvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uaj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pkxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T1xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Na6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yy5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qx52z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~4_combout ;
 wire \soc_inst|m0_1|u_logic|Rngwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Jbhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pkxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|R8d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ry5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~0_combout ;
 wire \soc_inst|m0_1|u_logic|hprot_o~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kzxvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Sy52z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Huqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A4c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B73wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Z0mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~2_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~3_combout ;
-wire \soc_inst|m0_1|u_logic|hprot_o~5_combout ;
-wire \soc_inst|m0_1|u_logic|U5qvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wxp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H4nwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Q8rwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oldwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qxc2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Lcowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lhyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lhyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Egkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ;
+wire \soc_inst|ram_1|byte0~0_combout ;
+wire \soc_inst|m0_1|u_logic|M66wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Amjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mn3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Socwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ucqvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C5c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C5c2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ju5wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vbovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lz93z4~q ;
+wire \soc_inst|m0_1|u_logic|Y8pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wpsvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ps3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lhyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|X8zvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Muawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T3ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zdc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ;
+wire \soc_inst|ram_1|write_cycle~q ;
+wire \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M9pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xdfwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Evcwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fzcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T3ovx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|H4ovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Evcwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Evcwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wzawx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jucwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Otcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fuawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fuawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xdfwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Cax2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wa7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Evcwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pdi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Donvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Donvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|G97wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|G97wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|G97wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Donvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wa7wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Donvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Evcwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|L4bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dsqvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wvewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H5fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xhxvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Icyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ukpvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zpqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Irqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Irqvx4~1_combout ;
-wire \soc_inst|switches_1|half_word_address~2_combout ;
-wire \soc_inst|ram_1|byte_select[0]~DUPLICATE_q ;
-wire \soc_inst|switches_1|read_enable~0_combout ;
-wire \soc_inst|switches_1|read_enable~q ;
-wire \soc_inst|interconnect_1|HRDATA[1]~37_combout ;
-wire \soc_inst|interconnect_1|HRDATA[1]~20_combout ;
-wire \soc_inst|switches_1|DataValid~0_combout ;
-wire \soc_inst|interconnect_1|HRDATA[1]~19_combout ;
-wire \SW[1]~input_o ;
+wire \soc_inst|m0_1|u_logic|Hxx2z4~q ;
+wire \soc_inst|m0_1|u_logic|S5pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yghvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tyx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ibrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|B8c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Scpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I1c2z4~combout ;
+wire \soc_inst|m0_1|u_logic|P1c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G0c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jyb2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xhiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jyb2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qaqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E6nwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z1ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A76wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O76wx4~combout ;
+wire \soc_inst|m0_1|u_logic|W46wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G36wx4~0_combout ;
+wire \soc_inst|ram_1|byte3~0_combout ;
+wire \soc_inst|ram_1|byte_select[3]~DUPLICATE_q ;
+wire \soc_inst|ram_1|read_cycle~0_combout ;
+wire \soc_inst|ram_1|read_cycle~q ;
+wire \soc_inst|interconnect_1|HRDATA[26]~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jvqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[2]~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qtrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dplwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cllwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I6z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lwqvx4~0_combout ;
+wire \SW[5]~input_o ;
 wire \KEY[0]~input_o ;
 wire \soc_inst|switches_1|last_buttons[0]~1_combout ;
 wire \soc_inst|switches_1|always0~1_combout ;
-wire \soc_inst|switches_1|switch_store[0][1]~q ;
-wire \soc_inst|ram_1|data_to_memory[1]~12_combout ;
-wire \soc_inst|m0_1|u_logic|Asbvx4~combout ;
+wire \soc_inst|switches_1|switch_store[0][5]~q ;
+wire \soc_inst|m0_1|u_logic|Xhxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Icyvx4~0_combout ;
+wire \SW[6]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][6]~q ;
+wire \soc_inst|m0_1|u_logic|Wzawx4~combout ;
+wire \soc_inst|m0_1|u_logic|Uwyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y5dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4dwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D1awx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Mddwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Mddwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jfdwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Kcdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jfdwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Kcdwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|W19wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ;
-wire \SW[9]~input_o ;
-wire \soc_inst|switches_1|switch_store[1][9]~q ;
-wire \soc_inst|m0_1|u_logic|Bnnvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add3~30 ;
-wire \soc_inst|m0_1|u_logic|Add3~25_sumout ;
-wire \soc_inst|m0_1|u_logic|Yuovx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[2]~2_combout ;
+wire \SW[2]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][2]~q ;
+wire \soc_inst|m0_1|u_logic|Jucwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Otcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fuawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fuawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Muawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X8zvx4~combout ;
+wire \soc_inst|m0_1|u_logic|C2yvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Z3yvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rmpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dvy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rmpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yzi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vapvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qdnvx4~0_combout ;
+wire \SW[0]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][0]~q ;
+wire \soc_inst|interconnect_1|HRDATA[16]~30_combout ;
+wire \soc_inst|m0_1|u_logic|Qqhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ydw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qdnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qdnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ;
 wire \SW[4]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][4]~q ;
+wire \SW[3]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][3]~q ;
+wire \soc_inst|m0_1|u_logic|Sknwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kswwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Djywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lstwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qxc2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Lcowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vwc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kuc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cxc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Awc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Awc2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ocfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R1d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jky2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fbfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G27wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Swy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Keiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Celwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Celwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fbfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rafwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wvewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Csewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V1yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M4fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rjrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mkrwx4~combout ;
+wire \soc_inst|m0_1|u_logic|J3xvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nkpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|H5fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J7swx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Yafwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Rni2z4~q ;
+wire \soc_inst|m0_1|u_logic|E4iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Enrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rblwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rblwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J3iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rblwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ;
+wire \soc_inst|switches_1|switch_store[1][5]~q ;
 wire \soc_inst|switches_1|switch_store[0][4]~q ;
-wire \soc_inst|m0_1|u_logic|Xwawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xwawx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Xwawx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Xwawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H0dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z4bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z4bwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Y5dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W4dwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uwyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ucqvx4~combout ;
-wire \soc_inst|m0_1|u_logic|W4dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I4dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O0dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xucwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gpcwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Shyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|X77wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Pmgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ez8wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zz8wx4~combout ;
-wire \soc_inst|m0_1|u_logic|D1awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y29wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qsewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P7wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qslwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ohwvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Z3yvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Fyrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fyrwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Surwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dghvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qtrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dghvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|W7z2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uz9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~26 ;
-wire \soc_inst|m0_1|u_logic|Add3~34 ;
-wire \soc_inst|m0_1|u_logic|Add3~53_sumout ;
-wire \soc_inst|m0_1|u_logic|Hszvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Fskvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U593z4~q ;
-wire \soc_inst|m0_1|u_logic|Lq03z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Glnwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E1r2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ut0xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Cr0xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Oi2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ut0xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Oi2wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hklwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z5wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K8wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vhwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vhwvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K8wvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K8wvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Oowvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ejwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Blwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R8wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R8wvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ndwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K1z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fw0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ax0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vi2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vi2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|I2mwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ilpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W3mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I2t2z4~q ;
-wire \soc_inst|m0_1|u_logic|W3mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|I3mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I3mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hw2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xr0xx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zy2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jq2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nz2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fh2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|X8kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zzfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T1xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tuwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xiwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X5gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|My6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vnxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qsewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P7wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K6yvx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|V2iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A2iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A2iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qj2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qj2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ro0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qj2wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ge2wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Ey2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hw2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ru2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Bt2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fh2wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|L53wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nz2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zy2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jq2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fh2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fh2wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|It2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fh2wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|It2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Op2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fh2wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Fh2wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Bxcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L53wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|L53wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L53wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L53wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Xc2wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ge2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ge2wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wzy2z4~q ;
+wire \soc_inst|m0_1|u_logic|G2lwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G2lwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ggswx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ggswx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ggswx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yaz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vb2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xr0xx4~combout ;
 wire \soc_inst|m0_1|u_logic|If2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fbfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R1d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Keiwx4~0_combout ;
-wire \soc_inst|ram_1|memory.raddr_a[4]~4_combout ;
-wire \soc_inst|ram_1|memory.raddr_a[5]~5_combout ;
-wire \soc_inst|m0_1|u_logic|I793z4~q ;
-wire \soc_inst|m0_1|u_logic|Pgnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|J5vvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Q5vvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X7mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X7mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I6w2z4~q ;
-wire \soc_inst|m0_1|u_logic|F5mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J4x2z4~q ;
-wire \soc_inst|m0_1|u_logic|F5mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|F5mvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U5x2z4~q ;
-wire \soc_inst|m0_1|u_logic|Lefwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jex2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~54 ;
-wire \soc_inst|m0_1|u_logic|Add2~49_sumout ;
-wire \soc_inst|m0_1|u_logic|Pm9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lk9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zz1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zz1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Glnwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ka93z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|J3iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E4iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Enrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rblwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rblwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rblwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|J7swx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Qllwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rjrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mkrwx4~combout ;
-wire \soc_inst|m0_1|u_logic|J3xvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Yafwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vb2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fw1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ob2wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ob2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fgm2z4~q ;
+wire \soc_inst|m0_1|u_logic|H3d3z4~q ;
 wire \soc_inst|m0_1|u_logic|Yg2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ax0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vi2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qaqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fw0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vi2wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ro0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qj2wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qj2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qj2wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Yg2wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Xc2wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wlwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wlwvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C3z2z4~q ;
-wire \soc_inst|m0_1|u_logic|E4xvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B3mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B3mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ob2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ob2wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Hx1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V2iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A2iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A2iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sjj2z4~q ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Srgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X8kwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tuwvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zzfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|I2mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|X5gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|My6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vnxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K6yvx4~10_combout ;
-wire \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ax1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E1r2z4~q ;
 wire \soc_inst|m0_1|u_logic|If2wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|If2wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Hx1wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Ka93z4~q ;
-wire \soc_inst|m0_1|u_logic|Svk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ge2wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ge2wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Rv1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rv1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T9v2z4~q ;
 wire \soc_inst|m0_1|u_logic|Kv1wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|S2r2z4~q ;
-wire \soc_inst|m0_1|u_logic|Fw1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ax1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E1r2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rv1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Ixxwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Tw1wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Tw1wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Kw63z4~q ;
-wire \soc_inst|m0_1|u_logic|Dv1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G4r2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hfyvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Hfyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hfyvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Hfyvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|K0u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dv1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G4r2z4~q ;
 wire \soc_inst|m0_1|u_logic|Wcyvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Wcyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sjj2z4~q ;
 wire \soc_inst|m0_1|u_logic|Wcyvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Wcyvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|T583z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|T583z4~q ;
 wire \soc_inst|m0_1|u_logic|Ixxwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Ixxwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Svxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|H3d3z4~q ;
-wire \soc_inst|m0_1|u_logic|H2m2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|H2m2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ebbwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|H783z4~q ;
-wire \soc_inst|m0_1|u_logic|Y1u2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ebbwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|V3m2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yx63z4~q ;
-wire \soc_inst|m0_1|u_logic|Ebbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T0m2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yb93z4~q ;
-wire \soc_inst|m0_1|u_logic|Ebbwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ebbwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Awc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kuc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Awc2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vwc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cxc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Mvc2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Kuc2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Akewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kryvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Acnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G0w2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tdp2z4~q ;
-wire \soc_inst|m0_1|u_logic|S6ovx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Shyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lhyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lhyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lhyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pmgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ez8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qppvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X4pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|J4pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J4pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q8rwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qs7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qs7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F8iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C8rwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V9iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S8ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H9iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H9iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ffs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qknvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Xknvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Kop2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mjl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nmnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|W0pvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wxcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sknwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kswwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fgm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yilwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sknwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sknwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|T2owx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T2owx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|S6nwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Imnwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Nen2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qppvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q77wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qobwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R29wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U09wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P0pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qnyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vllvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vllvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U4z2z4~q ;
-wire \soc_inst|m0_1|u_logic|D4mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D4mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z7i2z4~q ;
-wire \soc_inst|m0_1|u_logic|D4mvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Iwp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ug63z4~q ;
-wire \soc_inst|m0_1|u_logic|Duuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ukt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Duuwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Duu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dtj2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Dtj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Duuwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Wlz2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|C3w2z4~q ;
+wire \soc_inst|m0_1|u_logic|L6nwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wjyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Omyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Omyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|F4nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F4nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K3l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D31wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fjlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Phlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yilwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oa3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oa3wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ab9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y29wx4~combout ;
+wire \soc_inst|m0_1|u_logic|T7cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oa3wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Oldwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oaawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zb83z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Zb83z4~q ;
 wire \soc_inst|m0_1|u_logic|Mw1wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Wu1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wu1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wlz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qi03z4~q ;
-wire \soc_inst|m0_1|u_logic|Punvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Yv1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ydyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|To23z4~q ;
-wire \soc_inst|m0_1|u_logic|Yv1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kf13z4~q ;
-wire \soc_inst|m0_1|u_logic|Punvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Txj2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Txj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Fwj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Duuwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Punvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Fw1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cy33z4~q ;
-wire \soc_inst|m0_1|u_logic|Mw1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L753z4~q ;
-wire \soc_inst|m0_1|u_logic|Punvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Punvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Lz8wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dfd2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Ek03z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|L61xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hq23z4~q ;
-wire \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Z853z4~q ;
-wire \soc_inst|m0_1|u_logic|Zhyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zhyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yg13z4~q ;
-wire \soc_inst|m0_1|u_logic|Zhyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G02wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pu1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xyh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zfv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Qg93z4~q ;
+wire \soc_inst|m0_1|u_logic|Q273z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Q273z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|S61xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Oaawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T4uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Txtvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hxmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ii63z4~q ;
 wire \soc_inst|m0_1|u_logic|Rr73z4~q ;
 wire \soc_inst|m0_1|u_logic|Imt2z4~q ;
 wire \soc_inst|m0_1|u_logic|Skm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ii63z4~q ;
 wire \soc_inst|m0_1|u_logic|Q8ywx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ejm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Gmm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rvu2z4~q ;
 wire \soc_inst|m0_1|u_logic|Unm2z4~q ;
 wire \soc_inst|m0_1|u_logic|Q8ywx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Q8ywx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zhyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|E1bvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Vxnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zznvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D5ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|T0m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V3m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yx63z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H783z4~q ;
+wire \soc_inst|m0_1|u_logic|Y1u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hbv2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Hbv2z4~q ;
+wire \soc_inst|m0_1|u_logic|H2m2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|H2m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ebbwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bdwwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jmdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gju2z4~q ;
+wire \soc_inst|m0_1|u_logic|Po83z4~q ;
+wire \soc_inst|m0_1|u_logic|Ylbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mhn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Psv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yfn2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Yfn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vu93z4~q ;
+wire \soc_inst|m0_1|u_logic|Ylbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ylbwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Duu2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Duu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dtj2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ukt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dq73z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Txj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fwj2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Fwj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ruj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ug63z4~q ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Duuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kw7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jmdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pm9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ijcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ft73z4~q ;
+wire \soc_inst|m0_1|u_logic|G02wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cai3z4~q ;
+wire \soc_inst|m0_1|u_logic|N8i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uu83z4~q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Y21xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Mi13z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Yv1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yv1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vuo2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Vuo2z4~q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P0pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sknwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sknwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Imnwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Meyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kzf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wu1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vxf3z4~q ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z0g3z4~q ;
+wire \soc_inst|m0_1|u_logic|F5a2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fw1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vr43z4~q ;
+wire \soc_inst|m0_1|u_logic|Mw1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E163z4~q ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ue9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D923z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ydyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mi33z4~q ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I3a2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Psh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Y91xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vr33z4~q ;
+wire \soc_inst|m0_1|u_logic|Ft83z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ft83z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Mi23z4~q ;
+wire \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wj73z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fxv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|E153z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Na63z4~q ;
+wire \soc_inst|m0_1|u_logic|E0d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ccq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Euh3z4~q ;
+wire \soc_inst|m0_1|u_logic|T04xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wnu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rdq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Z62wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add2~46 ;
+wire \soc_inst|m0_1|u_logic|Add2~42 ;
+wire \soc_inst|m0_1|u_logic|Add2~85_sumout ;
+wire \soc_inst|m0_1|u_logic|Gmd3z4~q ;
+wire \soc_inst|m0_1|u_logic|R99wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B5e3z4~q ;
+wire \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|F8e3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|F8e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ibe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Uo5xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X1e3z4~q ;
+wire \soc_inst|m0_1|u_logic|I0e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Snd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wqd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Exd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|M3e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lsd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hpd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ai9wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nbx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~26 ;
+wire \soc_inst|m0_1|u_logic|Add2~17_sumout ;
+wire \soc_inst|m0_1|u_logic|Bmhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zoy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jvxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vnqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y7xvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xipvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gqxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Irxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zpxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hnxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dsqvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ffxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ae6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U9swx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S8swx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bkxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rfpvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yplwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vopvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zcn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mmxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zpqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~2_combout ;
+wire \soc_inst|switches_1|switch_store[0][3]~q ;
+wire \soc_inst|interconnect_1|HRDATA[3]~26_combout ;
+wire \soc_inst|m0_1|u_logic|U7w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q5vvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F5mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cr0xx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lny2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xly2z4~q ;
+wire \soc_inst|m0_1|u_logic|W7hwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Poa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ik4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bk4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ik4wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kofwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Si4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pd4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pd4wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sa13z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Sa13z4~q ;
+wire \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Isi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T253z4~q ;
+wire \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bk23z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Pfz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ehz2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ehz2z4~q ;
+wire \soc_inst|m0_1|u_logic|N71xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yd03z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Glj2z4~q ;
 wire \soc_inst|m0_1|u_logic|K0qvx4~combout ;
-wire \soc_inst|m0_1|u_logic|X4pvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wspvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rmawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y5zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Phh2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Phh2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zwcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ovcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|V41xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R7iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Akewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fhc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zqpvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Zqpvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Zqpvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|P37wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|P37wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fhc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zqpvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Zqpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wspvx4~combout ;
 wire \soc_inst|m0_1|u_logic|Lqpvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Zei2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ijcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O3awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kih2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yhnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yhnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cqo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Jw83z4~q ;
-wire \soc_inst|m0_1|u_logic|Fio2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eruwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Jlo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ll63z4~q ;
-wire \soc_inst|m0_1|u_logic|Eruwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lpt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uu73z4~q ;
-wire \soc_inst|m0_1|u_logic|Eruwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ujo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Eruwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Eruwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Noo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wzy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ue9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bk13z4~q ;
-wire \soc_inst|m0_1|u_logic|N662z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|M1j2z4~q ;
-wire \soc_inst|m0_1|u_logic|G02wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pu1wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|K862z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cc53z4~q ;
-wire \soc_inst|m0_1|u_logic|T243z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|T243z4~q ;
-wire \soc_inst|m0_1|u_logic|N662z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yoz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Sl03z4~q ;
-wire \soc_inst|m0_1|u_logic|N662z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|N662z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Xrnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ehcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rmawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mdzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ducvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Sscvx4~combout ;
-wire \soc_inst|m0_1|u_logic|C8rwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V9iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wfhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K9z2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wfhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wfhvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tuawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C51xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X553z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|X553z4~q ;
-wire \soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ch03z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ch03z4~q ;
-wire \soc_inst|m0_1|u_logic|Wd13z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Wd13z4~q ;
-wire \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ht5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ow33z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ht5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ht5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Po73z4~q ;
-wire \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xowwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qml2z4~q ;
-wire \soc_inst|m0_1|u_logic|Psu2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Psu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Spl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Grl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xowwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xowwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ht5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tuawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cll2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pl62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fn23z4~q ;
-wire \soc_inst|m0_1|u_logic|Sj62z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ow33z4~q ;
-wire \soc_inst|m0_1|u_logic|Sj62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mcz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ikz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Sj62z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Sj62z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Yonvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wsawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~94 ;
-wire \soc_inst|m0_1|u_logic|Add5~102 ;
-wire \soc_inst|m0_1|u_logic|Add5~34 ;
-wire \soc_inst|m0_1|u_logic|Add5~98 ;
-wire \soc_inst|m0_1|u_logic|Add5~110 ;
-wire \soc_inst|m0_1|u_logic|Add5~38 ;
-wire \soc_inst|m0_1|u_logic|Add5~81_sumout ;
-wire \soc_inst|m0_1|u_logic|Z4qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D31wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qs7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qs7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Phlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jp3wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Fjlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Djywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lstwx4~0_combout ;
-wire \SW[7]~input_o ;
-wire \soc_inst|switches_1|switch_store[0][7]~q ;
-wire \soc_inst|ram_1|data_to_memory[7]~4_combout ;
-wire \soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|L763z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|L763z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kf23z4~q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hue3z4~q ;
-wire \soc_inst|m0_1|u_logic|Rpe3z4~q ;
-wire \soc_inst|m0_1|u_logic|Y21xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fre3z4~q ;
-wire \soc_inst|m0_1|u_logic|N71xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cy43z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Cy43z4~q ;
-wire \soc_inst|m0_1|u_logic|U2s2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|U2s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Tse3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ug73z4~q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Duv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uku2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Vf5wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Ox1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kzbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kzbwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~82 ;
-wire \soc_inst|m0_1|u_logic|Add5~42 ;
-wire \soc_inst|m0_1|u_logic|Add5~113_sumout ;
-wire \soc_inst|m0_1|u_logic|Ox1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ksbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iu1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W5s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pybwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dq83z4~q ;
-wire \soc_inst|m0_1|u_logic|Pybwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cxc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Pybwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I4s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pybwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Pybwx4~combout ;
-wire \soc_inst|m0_1|u_logic|To33z4~q ;
-wire \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Oubwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oubwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Lwbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L763z4~q ;
-wire \soc_inst|m0_1|u_logic|Oubwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oubwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Konvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~54 ;
-wire \soc_inst|m0_1|u_logic|Add3~50 ;
-wire \soc_inst|m0_1|u_logic|Add3~46 ;
-wire \soc_inst|m0_1|u_logic|Add3~41_sumout ;
-wire \soc_inst|m0_1|u_logic|Xxovx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[7]~7_combout ;
-wire \soc_inst|ram_1|memory.raddr_a[8]~8_combout ;
-wire \soc_inst|m0_1|u_logic|Nlnwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T4uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I7owx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|F4nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F4nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K3l2z4~q ;
-wire \soc_inst|m0_1|u_logic|Txtvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qfa3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H6tvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C5ovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qfa3z4~q ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~5_combout ;
-wire \soc_inst|m0_1|u_logic|A5uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T5tvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Tna3z4~q ;
-wire \soc_inst|m0_1|u_logic|Aea3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Aea3z4~q ;
-wire \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Etmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add0~94_cout ;
-wire \soc_inst|m0_1|u_logic|Add0~33_sumout ;
-wire \soc_inst|m0_1|u_logic|Xsmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C4b3z4~q ;
-wire \soc_inst|m0_1|u_logic|J5m2z4~q ;
-wire \soc_inst|m0_1|u_logic|X6m2z4~q ;
-wire \soc_inst|m0_1|u_logic|Po53z4~q ;
-wire \soc_inst|m0_1|u_logic|Gf43z4~q ;
-wire \soc_inst|m0_1|u_logic|X533z4~q ;
-wire \soc_inst|m0_1|u_logic|Bv03z4~q ;
-wire \soc_inst|m0_1|u_logic|R40wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hyz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ow13z4~q ;
-wire \soc_inst|m0_1|u_logic|Xx93z4~q ;
-wire \soc_inst|m0_1|u_logic|R40wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|R40wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R40wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wq5wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ab9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R99wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lsd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tyd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qc1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mj7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mj7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nf03z4~q ;
+wire \soc_inst|m0_1|u_logic|Tiz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Aez2z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|I453z4~q ;
+wire \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Zu33z4~q ;
+wire \soc_inst|m0_1|u_logic|Kjk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ggk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ta1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U71xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rek2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rht2z4~q ;
+wire \soc_inst|m0_1|u_logic|Aru2z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Rd63z4~q ;
+wire \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Vhk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc13z4~q ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Izpvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S17wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D47wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zxpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rhnvx4~0_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[9]~9_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~82 ;
+wire \soc_inst|m0_1|u_logic|Add3~77_sumout ;
 wire \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|R99wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Aj1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Aj1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Xk1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xk1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nl53z4~q ;
-wire \soc_inst|m0_1|u_logic|Ilp2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ec43z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wmp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Fvz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Mt13z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Mt13z4~q ;
-wire \soc_inst|m0_1|u_logic|Zr03z4~q ;
-wire \soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Mka3z4~q ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~20_combout ;
-wire \soc_inst|m0_1|u_logic|Wia3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~34 ;
-wire \soc_inst|m0_1|u_logic|Add0~21_sumout ;
-wire \soc_inst|m0_1|u_logic|Cr1wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|P03wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G6d3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G6d3z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G6d3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ffbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cr1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cr1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cr1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|X563z4~q ;
-wire \soc_inst|m0_1|u_logic|Okn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Gf73z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Gf73z4~q ;
-wire \soc_inst|m0_1|u_logic|Gju2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ajn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Q1ywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vu93z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Vu93z4~q ;
-wire \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Q1ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q1ywx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wa03z4~q ;
-wire \soc_inst|m0_1|u_logic|Fn33z4~q ;
-wire \soc_inst|m0_1|u_logic|Wd23z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Wd23z4~q ;
-wire \soc_inst|m0_1|u_logic|Q713z4~q ;
-wire \soc_inst|m0_1|u_logic|Sh5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ow43z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ow43z4~q ;
-wire \soc_inst|m0_1|u_logic|Cmn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Sh5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sh5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Sh5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gha3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gha3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qsmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M2b3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~22 ;
-wire \soc_inst|m0_1|u_logic|Add0~57_sumout ;
-wire \soc_inst|m0_1|u_logic|Jsmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W0b3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~58 ;
-wire \soc_inst|m0_1|u_logic|Add0~41_sumout ;
-wire \soc_inst|m0_1|u_logic|Gza3z4~q ;
-wire \soc_inst|m0_1|u_logic|Taa3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Taa3z4~q ;
-wire \soc_inst|m0_1|u_logic|Csmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add0~42 ;
-wire \soc_inst|m0_1|u_logic|Add0~65_sumout ;
-wire \soc_inst|m0_1|u_logic|Vrmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qxa3z4~q ;
-wire \soc_inst|m0_1|u_logic|M5tvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zyovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Uic3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uic3z4~q ;
-wire \soc_inst|m0_1|u_logic|Cymwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cymwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B7owx4~combout ;
-wire \soc_inst|m0_1|u_logic|Cymwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Oir2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dy4xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vdr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lpv2z4~q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Kfr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cc73z4~q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rr93z4~q ;
+wire \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cgu2z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Cgu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Bk33z4~q ;
+wire \soc_inst|m0_1|u_logic|Ll83z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Ll83z4~q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gcr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rr93z4~q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|M413z4~q ;
-wire \soc_inst|m0_1|u_logic|S703z4~q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Vdr2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Cc73z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Cc73z4~q ;
-wire \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H2wwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|T263z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~86 ;
-wire \soc_inst|m0_1|u_logic|Add2~81_sumout ;
-wire \soc_inst|m0_1|u_logic|Ekhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F8iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pmnwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Imu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rr83z4~q ;
-wire \soc_inst|m0_1|u_logic|Lr9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qyc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Asr2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Asr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Lr9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cvr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ii73z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Lr9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rvv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Otr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Lr9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Lr9wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Godwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D5ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Snd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hpd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ai9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|M3e3z4~q ;
-wire \soc_inst|m0_1|u_logic|Wqd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ai9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|I0e3z4~q ;
-wire \soc_inst|m0_1|u_logic|X1e3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|X1e3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ai9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|B5e3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ai9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ai9wx4~combout ;
-wire \soc_inst|m0_1|u_logic|S3cwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I463z4~q ;
-wire \soc_inst|m0_1|u_logic|Ql33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Zu43z4~q ;
-wire \soc_inst|m0_1|u_logic|K7s2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|K7s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Rds2z4~q ;
-wire \soc_inst|m0_1|u_logic|D432z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B613z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|B613z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|H903z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Hc23z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Hc23z4~q ;
-wire \soc_inst|m0_1|u_logic|Oas2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Z8s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hvivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rkd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|An83z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|An83z4~q ;
-wire \soc_inst|m0_1|u_logic|Dcs2z4~q ;
-wire \soc_inst|m0_1|u_logic|Gt93z4~q ;
-wire \soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Arv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rhu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|S3cwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~114 ;
-wire \soc_inst|m0_1|u_logic|Add5~105_sumout ;
-wire \soc_inst|m0_1|u_logic|Zh5wx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|Do1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Do1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Do1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Glnwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pn1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rd73z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Rd73z4~q ;
-wire \soc_inst|m0_1|u_logic|Pjqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pjqwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pjqwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pjqwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Pjqwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Sndwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Godwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|T9v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bdwwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|T583z4~q ;
-wire \soc_inst|m0_1|u_logic|Bdwwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bdwwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bdwwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bdwwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qmdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G493z4~q ;
-wire \soc_inst|m0_1|u_logic|Ipm2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ipm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Svqwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wqm2z4~q ;
-wire \soc_inst|m0_1|u_logic|R6v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Svqwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|R283z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|R283z4~q ;
-wire \soc_inst|m0_1|u_logic|Ixt2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ixt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Svqwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ksm2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ksm2z4~q ;
-wire \soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Svqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Svqwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Tkdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qmdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G6owx4~combout ;
-wire \soc_inst|m0_1|u_logic|Yz4wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Oxuvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R1ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ipb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Fhc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fhc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dewwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B2uvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U1uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Adt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dewwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Gtmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gtmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Gtmwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wbk2z4~q ;
-wire \soc_inst|m0_1|u_logic|T2owx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T2owx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Gmd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~42 ;
-wire \soc_inst|m0_1|u_logic|Add3~38 ;
-wire \soc_inst|m0_1|u_logic|Add3~82 ;
-wire \soc_inst|m0_1|u_logic|Add3~77_sumout ;
+wire \soc_inst|m0_1|u_logic|Bk33z4~q ;
+wire \soc_inst|m0_1|u_logic|U9a2z4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Kt43z4~q ;
+wire \soc_inst|m0_1|u_logic|T263z4~q ;
 wire \soc_inst|m0_1|u_logic|U9a2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S703z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|S703z4~q ;
+wire \soc_inst|m0_1|u_logic|U9a2z4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Zgr2z4~q ;
 wire \soc_inst|m0_1|u_logic|Rba2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U9a2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Sa23z4~q ;
-wire \soc_inst|m0_1|u_logic|U9a2z4~1_combout ;
 wire \soc_inst|m0_1|u_logic|U9a2z4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fzl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ejawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ejawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~106 ;
-wire \soc_inst|m0_1|u_logic|Add5~46 ;
-wire \soc_inst|m0_1|u_logic|Add5~13_sumout ;
 wire \soc_inst|m0_1|u_logic|Cqovx4~combout ;
 wire \soc_inst|ram_1|memory.raddr_a[10]~10_combout ;
 wire \soc_inst|m0_1|u_logic|Add3~78 ;
 wire \soc_inst|m0_1|u_logic|Add3~105_sumout ;
-wire \soc_inst|m0_1|u_logic|Ciawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wnv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kzf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Lqr2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Lqr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Neu2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Neu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|E163z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Cq93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wor2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O2g3z4~q ;
-wire \soc_inst|m0_1|u_logic|X94xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vxf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Vr43z4~q ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|D923z4~q ;
+wire \soc_inst|m0_1|u_logic|Hnr2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Hnr2z4~q ;
 wire \soc_inst|m0_1|u_logic|Na73z4~q ;
 wire \soc_inst|m0_1|u_logic|Hc1wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Wj83z4~q ;
-wire \soc_inst|m0_1|u_logic|Mi33z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Mi33z4~q ;
+wire \soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Hc1wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|D923z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Z0g3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Z0g3z4~q ;
-wire \soc_inst|m0_1|u_logic|Y91xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Hc1wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ciawx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ciawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ya1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ya1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hc1wx4~combout ;
-wire \soc_inst|m0_1|u_logic|B91wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~14 ;
-wire \soc_inst|m0_1|u_logic|Add5~17_sumout ;
-wire \soc_inst|m0_1|u_logic|B91wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|B91wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hnr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cq93z4~q ;
-wire \soc_inst|m0_1|u_logic|Zkuwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zkuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zkuwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Zkuwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zkuwx4~combout ;
-wire \soc_inst|m0_1|u_logic|F5a2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|I3a2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|E163z4~q ;
-wire \soc_inst|m0_1|u_logic|I3a2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D923z4~q ;
-wire \soc_inst|m0_1|u_logic|I3a2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I3a2z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|haddr_o~5_combout ;
-wire \soc_inst|ram_1|memory.raddr_a[11]~11_combout ;
-wire \soc_inst|m0_1|u_logic|Sx3wx4~0_combout ;
-wire \soc_inst|ram_1|data_to_memory[28]~14_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ;
-wire \soc_inst|ram_1|data_to_memory[12]~13_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ;
-wire \soc_inst|m0_1|u_logic|Lsmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cawwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cawwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cawwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Cawwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cawwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Duuwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jiowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xmdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jiowx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xuxwx4~combout ;
-wire \soc_inst|m0_1|u_logic|R91xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T31xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wnt2z4~q ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|N8i3z4~q ;
-wire \soc_inst|m0_1|u_logic|Cai3z4~q ;
-wire \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|E143z4~q ;
-wire \soc_inst|m0_1|u_logic|Rro2z4~q ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Y6i3z4~q ;
-wire \soc_inst|m0_1|u_logic|J5i3z4~q ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Gto2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Velvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kzbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ohivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Szr2z4~q ;
+wire \soc_inst|m0_1|u_logic|P03wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G6d3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ecawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Psn2z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V223z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eun2z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ixn2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ixn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jq1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wu53z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Wu53z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec33z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Arn2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Arn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nl43z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ey03z4~q ;
+wire \soc_inst|m0_1|u_logic|K103z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|St0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Od83z4~q ;
+wire \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ohv2z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Fi93z4~q ;
+wire \soc_inst|m0_1|u_logic|F473z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|St0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ecawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~106 ;
+wire \soc_inst|m0_1|u_logic|Add3~98 ;
+wire \soc_inst|m0_1|u_logic|Add3~94 ;
+wire \soc_inst|m0_1|u_logic|Add3~89_sumout ;
+wire \soc_inst|m0_1|u_logic|Ay53z4~q ;
+wire \soc_inst|m0_1|u_logic|If33z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Skv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jbu2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Jbu2z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J5o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ro43z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I113z4~q ;
+wire \soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|N8o2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|N8o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z523z4~q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W21wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Kfawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ns9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ns9wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Mgawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|No93z4~q ;
-wire \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|R21xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xg33z4~q ;
-wire \soc_inst|m0_1|u_logic|Hi83z4~q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X213z4~q ;
-wire \soc_inst|m0_1|u_logic|D603z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|D603z4~q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hmv2z4~q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Q2q2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ycu2z4~q ;
-wire \soc_inst|m0_1|u_logic|S71wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|S71wx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Y873z4~q ;
-wire \soc_inst|m0_1|u_logic|F4q2z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|F4q2z4~q ;
-wire \soc_inst|m0_1|u_logic|Gq43z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Gq43z4~q ;
+wire \soc_inst|m0_1|u_logic|Qc1xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gq43z4~q ;
 wire \soc_inst|m0_1|u_logic|S71wx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|Pz53z4~q ;
 wire \soc_inst|m0_1|u_logic|S71wx4~7_combout ;
 wire \soc_inst|m0_1|u_logic|S71wx4~8_combout ;
 wire \soc_inst|m0_1|u_logic|Mgawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J61wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J61wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O51wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S71wx4~combout ;
-wire \soc_inst|m0_1|u_logic|M41wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z0uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Lhd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Qwowx4~combout ;
-wire \soc_inst|m0_1|u_logic|K7pwx4~combout ;
-wire \soc_inst|m0_1|u_logic|L0uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Q6l2z4~q ;
-wire \soc_inst|m0_1|u_logic|E0uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|K3uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W2uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Aqp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qztvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jxs2z4~q ;
-wire \soc_inst|m0_1|u_logic|I2uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B1a3z4~q ;
-wire \soc_inst|m0_1|u_logic|Repwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Repwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lns2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Vytvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Lns2z4~q ;
-wire \soc_inst|m0_1|u_logic|Repwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ncpwx4~0_combout ;
-wire \soc_inst|ram_1|data_to_memory[30]~29_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ;
-wire \soc_inst|m0_1|u_logic|Bq5wx4~0_combout ;
-wire \soc_inst|ram_1|data_to_memory[14]~30_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ;
-wire \soc_inst|interconnect_1|HRDATA[30]~34_combout ;
-wire \soc_inst|m0_1|u_logic|Kepwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xmdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J7ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A9iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C0ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sndwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tkdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~4_combout ;
-wire \soc_inst|m0_1|u_logic|J9d3z4~q ;
-wire \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|J7b3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J7b3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~66 ;
-wire \soc_inst|m0_1|u_logic|Add0~89_sumout ;
-wire \soc_inst|m0_1|u_logic|Ormvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z8b3z4~q ;
-wire \soc_inst|m0_1|u_logic|Jkc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jkc3z4~q ;
-wire \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Jruvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D1ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F4c3z4~q ;
-wire \soc_inst|m0_1|u_logic|Wkpwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gcb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Pab3z4~q ;
-wire \soc_inst|m0_1|u_logic|Wkpwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wkpwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wkpwx4~3_combout ;
-wire \soc_inst|switches_1|switch_store[0][6]~q ;
-wire \soc_inst|interconnect_1|HRDATA[6]~36_combout ;
-wire \soc_inst|m0_1|u_logic|O9iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O9iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ba0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ba0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Pw03z4~q ;
-wire \soc_inst|m0_1|u_logic|Vzz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|N3n2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cy13z4~q ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y1n2z4~q ;
-wire \soc_inst|m0_1|u_logic|Gha3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bec3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bec3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Trq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ckuvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F2ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pxb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Mbt2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Mbt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yrqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ojmwx4~0_combout ;
-wire \SW[2]~input_o ;
-wire \soc_inst|switches_1|switch_store[0][2]~q ;
-wire \soc_inst|ram_1|data_to_memory[2]~7_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ;
-wire \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F7qwx4~combout ;
-wire \soc_inst|m0_1|u_logic|M7qwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S5b3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|S5b3z4~q ;
-wire \soc_inst|m0_1|u_logic|R3uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ynvvx4~combout ;
-wire \soc_inst|m0_1|u_logic|C1lvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lgi3z4~q ;
-wire \soc_inst|m0_1|u_logic|Pbl2z4~q ;
-wire \soc_inst|m0_1|u_logic|C193z4~q ;
-wire \soc_inst|m0_1|u_logic|N3v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Edl2z4~q ;
-wire \soc_inst|m0_1|u_logic|U7uwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nz73z4~q ;
-wire \soc_inst|m0_1|u_logic|Eq63z4~q ;
-wire \soc_inst|m0_1|u_logic|Eut2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tel2z4~q ;
-wire \soc_inst|m0_1|u_logic|U7uwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U7uwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Xhl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|M082z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uo13z4~q ;
-wire \soc_inst|m0_1|u_logic|Dy23z4~q ;
-wire \soc_inst|m0_1|u_logic|Py72z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wo03z4~q ;
-wire \soc_inst|m0_1|u_logic|Py72z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Vg53z4~q ;
-wire \soc_inst|m0_1|u_logic|M743z4~q ;
-wire \soc_inst|m0_1|u_logic|Py72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Py72z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Oa3wx4~combout ;
-wire \soc_inst|m0_1|u_logic|T7cwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bf9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M4j2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pgf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Eif3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bc82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uuf3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Uuf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Tjf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bc82z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qrf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ftf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bc82z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bc82z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Aff3z4~q ;
-wire \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Icxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Orj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wbf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Icxwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bqf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Icxwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Mof3z4~q ;
-wire \soc_inst|m0_1|u_logic|Xmf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Icxwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Icxwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Bc82z4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rbmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V3o2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bk23z4~q ;
-wire \soc_inst|m0_1|u_logic|T253z4~q ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sa13z4~q ;
-wire \soc_inst|m0_1|u_logic|Isi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X2j2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xti2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cc63z4~q ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Lpu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Ll73z4~q ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Glj2z4~q ;
-wire \soc_inst|m0_1|u_logic|U71xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ta1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V1l2z4~q ;
-wire \soc_inst|m0_1|u_logic|Phh2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Eb72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pfz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kt33z4~q ;
-wire \soc_inst|m0_1|u_logic|H972z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yd03z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Yd03z4~q ;
-wire \soc_inst|m0_1|u_logic|Ehz2z4~q ;
-wire \soc_inst|m0_1|u_logic|H972z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|H972z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|H972z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|A67wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zwcvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ec62z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Vr23z4~q ;
-wire \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ec62z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Be62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Na53z4~q ;
-wire \soc_inst|m0_1|u_logic|Ec62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ec62z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Q8zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ovcvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Dih2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~118 ;
-wire \soc_inst|m0_1|u_logic|Add5~10 ;
-wire \soc_inst|m0_1|u_logic|Add5~77_sumout ;
-wire \soc_inst|m0_1|u_logic|R5zvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add2~106 ;
-wire \soc_inst|m0_1|u_logic|Add2~118 ;
-wire \soc_inst|m0_1|u_logic|Add2~114 ;
-wire \soc_inst|m0_1|u_logic|Add2~78 ;
-wire \soc_inst|m0_1|u_logic|Add2~29_sumout ;
-wire \soc_inst|m0_1|u_logic|Lrx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~66 ;
-wire \soc_inst|m0_1|u_logic|Add3~62 ;
-wire \soc_inst|m0_1|u_logic|Add3~58 ;
-wire \soc_inst|m0_1|u_logic|Add3~102 ;
-wire \soc_inst|m0_1|u_logic|Add3~114 ;
-wire \soc_inst|m0_1|u_logic|Add3~110 ;
-wire \soc_inst|m0_1|u_logic|Add3~74 ;
-wire \soc_inst|m0_1|u_logic|Add3~21_sumout ;
-wire \soc_inst|m0_1|u_logic|Nhzvx4~combout ;
-wire \soc_inst|m0_1|u_logic|R5lvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S8k2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nz83z4~q ;
-wire \soc_inst|m0_1|u_logic|V0k2z4~q ;
-wire \soc_inst|m0_1|u_logic|Y1v2z4~q ;
-wire \soc_inst|m0_1|u_logic|K2k2z4~q ;
-wire \soc_inst|m0_1|u_logic|Feqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Po63z4~q ;
-wire \soc_inst|m0_1|u_logic|Pst2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yx73z4~q ;
-wire \soc_inst|m0_1|u_logic|Z3k2z4~q ;
-wire \soc_inst|m0_1|u_logic|Feqwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Feqwx4~combout ;
-wire \soc_inst|m0_1|u_logic|D7k2z4~q ;
-wire \soc_inst|m0_1|u_logic|O5k2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|O5k2z4~q ;
-wire \soc_inst|m0_1|u_logic|Au72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fn13z4~q ;
-wire \soc_inst|m0_1|u_logic|Ds72z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nqz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ds72z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|X543z4~q ;
-wire \soc_inst|m0_1|u_logic|Gf53z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Gf53z4~q ;
-wire \soc_inst|m0_1|u_logic|Ds72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ds72z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wpcvx4~combout ;
-wire \soc_inst|m0_1|u_logic|H3awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Locvx4~combout ;
-wire \soc_inst|m0_1|u_logic|J4awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ancvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add5~126 ;
-wire \soc_inst|m0_1|u_logic|Add5~122 ;
-wire \soc_inst|m0_1|u_logic|Add5~58 ;
-wire \soc_inst|m0_1|u_logic|Add5~5_sumout ;
-wire \soc_inst|m0_1|u_logic|Hihvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hihvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hihvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add2~30 ;
-wire \soc_inst|m0_1|u_logic|Add2~22 ;
-wire \soc_inst|m0_1|u_logic|Add2~10 ;
-wire \soc_inst|m0_1|u_logic|Add2~14 ;
-wire \soc_inst|m0_1|u_logic|Add2~2 ;
-wire \soc_inst|m0_1|u_logic|Add2~5_sumout ;
-wire \soc_inst|m0_1|u_logic|Wthvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wthvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J0l2z4~q ;
-wire \soc_inst|m0_1|u_logic|O3ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y5zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Phh2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Y5zvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Uvdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vmj2z4~q ;
-wire \soc_inst|m0_1|u_logic|C5v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mnvwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Zpj2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Zpj2z4~q ;
-wire \soc_inst|m0_1|u_logic|R293z4~q ;
-wire \soc_inst|m0_1|u_logic|Mnvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tr63z4~q ;
-wire \soc_inst|m0_1|u_logic|F9j2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mnvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tvt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mnvwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Mnvwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uvdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fwtwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yih2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zbbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~6 ;
-wire \soc_inst|m0_1|u_logic|Add5~89_sumout ;
-wire \soc_inst|m0_1|u_logic|Cfzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cfzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Gfq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vgq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yx83z4~q ;
-wire \soc_inst|m0_1|u_logic|J0v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Fexwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Art2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kiq2z4~q ;
-wire \soc_inst|m0_1|u_logic|An63z4~q ;
-wire \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fexwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fexwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zkk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ggk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Aru2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Aru2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kjk2z4~q ;
-wire \soc_inst|m0_1|u_logic|F8wwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rd63z4~q ;
-wire \soc_inst|m0_1|u_logic|Rht2z4~q ;
-wire \soc_inst|m0_1|u_logic|An73z4~q ;
-wire \soc_inst|m0_1|u_logic|Vhk2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|F8wwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|F8wwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Yvtwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xs7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xs7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U72wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add2~82 ;
-wire \soc_inst|m0_1|u_logic|Add2~110 ;
-wire \soc_inst|m0_1|u_logic|Add2~102 ;
-wire \soc_inst|m0_1|u_logic|Add2~97_sumout ;
-wire \soc_inst|m0_1|u_logic|Ns9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mi23z4~q ;
-wire \soc_inst|m0_1|u_logic|Psh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ft83z4~q ;
-wire \soc_inst|m0_1|u_logic|Vr33z4~q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Naq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wj73z4~q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Ns9wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Add5~18 ;
 wire \soc_inst|m0_1|u_logic|Add5~62 ;
-wire \soc_inst|m0_1|u_logic|Add5~65_sumout ;
-wire \soc_inst|m0_1|u_logic|Sdhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sdhvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Sdhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jwf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~106 ;
-wire \soc_inst|m0_1|u_logic|Add3~98 ;
-wire \soc_inst|m0_1|u_logic|Add3~93_sumout ;
-wire \soc_inst|m0_1|u_logic|haddr_o~3_combout ;
-wire \soc_inst|m0_1|u_logic|Zcivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y8q2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ym93z4~q ;
-wire \soc_inst|m0_1|u_logic|Cao2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Jl93z4~q ;
-wire \soc_inst|m0_1|u_logic|J773z4~q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Z52xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W21wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Kfawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N8o2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z523z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I113z4~q ;
-wire \soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Jbu2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Jbu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Skv2z4~q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|If33z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|If33z4~q ;
-wire \soc_inst|m0_1|u_logic|Ay53z4~q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ro43z4~q ;
-wire \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Y6o2z4~q ;
-wire \soc_inst|m0_1|u_logic|W21wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|W21wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Kfawx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Add5~66 ;
 wire \soc_inst|m0_1|u_logic|Add5~69_sumout ;
-wire \soc_inst|m0_1|u_logic|Add3~94 ;
-wire \soc_inst|m0_1|u_logic|Add3~89_sumout ;
 wire \soc_inst|m0_1|u_logic|Vpovx4~combout ;
 wire \soc_inst|m0_1|u_logic|Eijvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rbo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hs92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z523z4~q ;
-wire \soc_inst|m0_1|u_logic|Kq92z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|O403z4~q ;
-wire \soc_inst|m0_1|u_logic|I113z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kq92z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kq92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kq92z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|U11wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G11wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G11wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W21wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qz0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qz0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qz0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sg83z4~q ;
-wire \soc_inst|m0_1|u_logic|Nrvwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nrvwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|J5o2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nrvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nrvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nrvwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Rdq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ey9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fxv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ccq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ey9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Wnu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ey9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|E0d3z4~q ;
-wire \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ey9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ey9wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Yxdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~69_sumout ;
-wire \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|F8u2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ohv2z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Od83z4~q ;
-wire \soc_inst|m0_1|u_logic|F473z4~q ;
-wire \soc_inst|m0_1|u_logic|Fi93z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|St0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Ecawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Jq1xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wu53z4~q ;
-wire \soc_inst|m0_1|u_logic|Ec33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Nl43z4~q ;
-wire \soc_inst|m0_1|u_logic|Arn2z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ey03z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ey03z4~q ;
-wire \soc_inst|m0_1|u_logic|K103z4~q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|V223z4~q ;
-wire \soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|St0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|St0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|St0wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Ecawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ym93z4~q ;
+wire \soc_inst|m0_1|u_logic|Fyrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fyrwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Surwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qslwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dghvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W7z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dghvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Gdawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~70 ;
-wire \soc_inst|m0_1|u_logic|Add5~73_sumout ;
-wire \soc_inst|m0_1|u_logic|Add3~90 ;
-wire \soc_inst|m0_1|u_logic|Add3~85_sumout ;
-wire \soc_inst|m0_1|u_logic|Bv0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Tmjvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H4p2z4~q ;
-wire \soc_inst|m0_1|u_logic|U573z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|U573z4~q ;
-wire \soc_inst|m0_1|u_logic|Ozo2z4~q ;
-wire \soc_inst|m0_1|u_logic|U9u2z4~q ;
-wire \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xcuwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zxo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Djv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Uj93z4~q ;
-wire \soc_inst|m0_1|u_logic|Kwo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xcuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xcuwx4~combout ;
-wire \soc_inst|m0_1|u_logic|S2p2z4~q ;
 wire \soc_inst|m0_1|u_logic|Td33z4~q ;
-wire \soc_inst|m0_1|u_logic|K423z4~q ;
-wire \soc_inst|m0_1|u_logic|Yj92z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vl92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z203z4~q ;
-wire \soc_inst|m0_1|u_logic|Tz03z4~q ;
-wire \soc_inst|m0_1|u_logic|Yj92z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Lw53z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Lw53z4~q ;
-wire \soc_inst|m0_1|u_logic|Cn43z4~q ;
-wire \soc_inst|m0_1|u_logic|Yj92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yj92z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fx0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M92xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Zxo2z4~q ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tz03z4~q ;
+wire \soc_inst|m0_1|u_logic|Z203z4~q ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Cn43z4~q ;
+wire \soc_inst|m0_1|u_logic|Kwo2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Kwo2z4~q ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|K423z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ozo2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ozo2z4~q ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S2p2z4~q ;
+wire \soc_inst|m0_1|u_logic|M92xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|D1p2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uj93z4~q ;
+wire \soc_inst|m0_1|u_logic|U573z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|U9u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Djv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Yw0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Gdawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fx0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Yw0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~70 ;
+wire \soc_inst|m0_1|u_logic|Add5~73_sumout ;
 wire \soc_inst|m0_1|u_logic|Iv0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zndwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Duv2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Duv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Cxc3z4~q ;
+wire \soc_inst|m0_1|u_logic|U2s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dq83z4~q ;
+wire \soc_inst|m0_1|u_logic|Uku2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Uku2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pybwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rd73z4~q ;
+wire \soc_inst|m0_1|u_logic|Oas2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rhu2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Rhu2z4~q ;
+wire \soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z8s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Gt93z4~q ;
+wire \soc_inst|m0_1|u_logic|K7s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pjqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nodwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zndwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Neu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wnv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wor2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Cq93z4~q ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zkuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mzp2z4~q ;
+wire \soc_inst|m0_1|u_logic|No93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hmv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hi83z4~q ;
+wire \soc_inst|m0_1|u_logic|Ycu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hmqwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Vzdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sg83z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Sg83z4~q ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Y6o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Jl93z4~q ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J773z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|J773z4~q ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nrvwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yxdwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Yxdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ;
-wire \soc_inst|m0_1|u_logic|Kxe3z4~q ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ;
-wire \soc_inst|m0_1|u_logic|W3f3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~90 ;
-wire \soc_inst|m0_1|u_logic|Add0~9_sumout ;
-wire \soc_inst|m0_1|u_logic|Nfb3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nfb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hrmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dhb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~10 ;
-wire \soc_inst|m0_1|u_logic|Add0~77_sumout ;
-wire \soc_inst|m0_1|u_logic|Armvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M5f3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~78 ;
-wire \soc_inst|m0_1|u_logic|Add0~25_sumout ;
-wire \soc_inst|m0_1|u_logic|Tqmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Aze3z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~5_combout ;
+wire \soc_inst|m0_1|u_logic|A5uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5tvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tna3z4~q ;
+wire \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Aea3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H6tvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C5ovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Aea3z4~q ;
+wire \soc_inst|m0_1|u_logic|Etmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F2o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mxtvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Pgnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I793z4~q ;
+wire \soc_inst|m0_1|u_logic|Yg23z4~q ;
+wire \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Eyr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qz43z4~q ;
+wire \soc_inst|m0_1|u_logic|Z863z4~q ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kc03z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qwr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hp9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kn9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Imu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rr83z4~q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qyc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Asr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cvr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Otr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lr9wx4~combout ;
+wire \soc_inst|m0_1|u_logic|F32wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lk9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lk9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zz1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xwawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tuawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tuawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fskvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U593z4~q ;
+wire \soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gf63z4~q ;
+wire \soc_inst|m0_1|u_logic|Eol2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Po73z4~q ;
+wire \soc_inst|m0_1|u_logic|Gjt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qml2z4~q ;
+wire \soc_inst|m0_1|u_logic|Psu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Grl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Spl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bywwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wd13z4~q ;
+wire \soc_inst|m0_1|u_logic|Fn23z4~q ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ikz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ch03z4~q ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mcz2z4~q ;
+wire \soc_inst|m0_1|u_logic|X553z4~q ;
+wire \soc_inst|m0_1|u_logic|Ow33z4~q ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cll2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pl62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sj62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Yonvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~38 ;
+wire \soc_inst|m0_1|u_logic|Add5~82 ;
+wire \soc_inst|m0_1|u_logic|Add5~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Zz1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pmnwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nlnwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G6owx4~combout ;
+wire \soc_inst|m0_1|u_logic|I7owx4~combout ;
+wire \soc_inst|m0_1|u_logic|M5tvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zyovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ztc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ztc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D9ovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yz4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nxqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rsqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H1rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tdp2z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~20_combout ;
+wire \soc_inst|m0_1|u_logic|Wia3z4~q ;
+wire \soc_inst|m0_1|u_logic|X563z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|X563z4~q ;
+wire \soc_inst|m0_1|u_logic|Okn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa03z4~q ;
+wire \soc_inst|m0_1|u_logic|Q713z4~q ;
+wire \soc_inst|m0_1|u_logic|Fn33z4~q ;
+wire \soc_inst|m0_1|u_logic|Wd23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Wd23z4~q ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ow43z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ow43z4~q ;
+wire \soc_inst|m0_1|u_logic|Cmn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Sh5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gha3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gha3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~94_cout ;
+wire \soc_inst|m0_1|u_logic|Add0~33_sumout ;
+wire \soc_inst|m0_1|u_logic|Qfa3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xsmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C4b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~34 ;
+wire \soc_inst|m0_1|u_logic|Add0~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Qsmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M2b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~22 ;
+wire \soc_inst|m0_1|u_logic|Add0~57_sumout ;
+wire \soc_inst|m0_1|u_logic|Jsmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W0b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~58 ;
+wire \soc_inst|m0_1|u_logic|Add0~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Taa3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Taa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Csmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gza3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~42 ;
+wire \soc_inst|m0_1|u_logic|Add0~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Qxa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Mka3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vrmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uic3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uic3z4~q ;
+wire \soc_inst|m0_1|u_logic|Zz8wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fyzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wccwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yxzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W893z4~q ;
+wire \soc_inst|m0_1|u_logic|Sgp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F8v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ujp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wu63z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wyt2z4~q ;
+wire \soc_inst|m0_1|u_logic|F483z4~q ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qxuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Rw7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fkdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nodwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qfc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Uaj2z4~q ;
+wire \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pguvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hub3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B2uvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|I2twx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ecowx4~combout ;
-wire \soc_inst|interconnect_1|HRDATA[9]~5_combout ;
-wire \soc_inst|interconnect_1|HRDATA[6]~9_combout ;
-wire \soc_inst|interconnect_1|HRDATA[9]~15_combout ;
-wire \soc_inst|switches_1|switch_store[0][9]~q ;
-wire \soc_inst|interconnect_1|HRDATA[9]~16_combout ;
-wire \soc_inst|m0_1|u_logic|Mxa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I0ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y9l2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vve3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vve3z4~q ;
-wire \soc_inst|m0_1|u_logic|Khfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Khfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Khfwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Khfwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Mx0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qdtwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Gvdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ihlwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ykyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Amyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Amyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xuxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kvtwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mjlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rvu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cawwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Gftwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gftwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|M5ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pgfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pgfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mrdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|M9awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Olg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Kw7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Iutwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mjlwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U0vvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X0ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vzdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bge3z4~q ;
+wire \soc_inst|m0_1|u_logic|I463z4~q ;
+wire \soc_inst|m0_1|u_logic|Ql33z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Hc23z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D432z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B613z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H903z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|H903z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Zu43z4~q ;
+wire \soc_inst|m0_1|u_logic|K7s2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Wq5wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ;
+wire \soc_inst|m0_1|u_logic|C9a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~26 ;
+wire \soc_inst|m0_1|u_logic|Add0~13_sumout ;
+wire \soc_inst|m0_1|u_logic|Mqmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zva3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~14 ;
+wire \soc_inst|m0_1|u_logic|Add0~49_sumout ;
+wire \soc_inst|m0_1|u_logic|Fqmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|She3z4~q ;
+wire \soc_inst|m0_1|u_logic|Lee3z4~q ;
+wire \soc_inst|m0_1|u_logic|Lee3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Trq2z4~q ;
+wire \soc_inst|m0_1|u_logic|K9vvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uzhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ble3z4~q ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Whlwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|U0vvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U0vvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|L8mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cam2z4~q ;
+wire \soc_inst|m0_1|u_logic|Iuuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N7c3z4~q ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fkdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cymwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nz83z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Yx73z4~q ;
+wire \soc_inst|m0_1|u_logic|O5k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pst2z4~q ;
+wire \soc_inst|m0_1|u_logic|Y1v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Gf53z4~q ;
+wire \soc_inst|m0_1|u_logic|Ow23z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nqz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hn03z4~q ;
+wire \soc_inst|m0_1|u_logic|D7k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|X543z4~q ;
+wire \soc_inst|m0_1|u_logic|V0k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fn13z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K2k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kepwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jiowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kepwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fio2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jw83z4~q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lpt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uu73z4~q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ll63z4~q ;
+wire \soc_inst|m0_1|u_logic|Jlo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ujo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eruwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Beowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jw73z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yx83z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Yx83z4~q ;
+wire \soc_inst|m0_1|u_logic|An63z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Zu23z4~q ;
+wire \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Vgq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hak2z4~q ;
+wire \soc_inst|m0_1|u_logic|Djh3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Djh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Skh3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Skh3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wnh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hmh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Co72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rd53z4~q ;
+wire \soc_inst|m0_1|u_logic|I443z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|I443z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ql13z4~q ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fm72z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lsnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zpx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vjnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add3~90 ;
+wire \soc_inst|m0_1|u_logic|Add3~86 ;
+wire \soc_inst|m0_1|u_logic|Add3~70 ;
+wire \soc_inst|m0_1|u_logic|Add3~66 ;
+wire \soc_inst|m0_1|u_logic|Add3~62 ;
+wire \soc_inst|m0_1|u_logic|Add3~58 ;
+wire \soc_inst|m0_1|u_logic|Add3~102 ;
+wire \soc_inst|m0_1|u_logic|Add3~114 ;
+wire \soc_inst|m0_1|u_logic|Add3~109_sumout ;
+wire \soc_inst|m0_1|u_logic|Y1pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vjnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q7j2z4~q ;
+wire \soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tvt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|F9j2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vmj2z4~q ;
+wire \soc_inst|m0_1|u_logic|C5v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|R293z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zpj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mnvwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Sz23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Jq13z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P582z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Joi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Fli3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qji3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Qji3z4~q ;
+wire \soc_inst|m0_1|u_logic|P582z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ki53z4~q ;
+wire \soc_inst|m0_1|u_logic|B943z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|B943z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P582z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Umi3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Umi3z4~q ;
+wire \soc_inst|m0_1|u_logic|M782z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P582z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Gtnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q9cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yqzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rqzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C183z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|C183z4~q ;
+wire \soc_inst|m0_1|u_logic|Jq13z4~q ;
+wire \soc_inst|m0_1|u_logic|F9j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|B943z4~q ;
+wire \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Sz23z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|R293z4~q ;
+wire \soc_inst|m0_1|u_logic|Tr63z4~q ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|T31xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|R91xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eacwx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Rih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ancvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add3~101_sumout ;
+wire \soc_inst|m0_1|u_logic|Tkdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Godwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tkdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sndwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C0ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sndwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~4_combout ;
+wire \soc_inst|m0_1|u_logic|Z0uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|J9d3z4~q ;
+wire \soc_inst|m0_1|u_logic|K7pwx4~combout ;
+wire \soc_inst|m0_1|u_logic|L0uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xdb3z4~q ;
+wire \soc_inst|m0_1|u_logic|J7b3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J7b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Z8b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~66 ;
+wire \soc_inst|m0_1|u_logic|Add0~89_sumout ;
+wire \soc_inst|m0_1|u_logic|Ormvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|E0uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qztvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qwowx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vytvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Pab3z4~q ;
+wire \soc_inst|m0_1|u_logic|Jkc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jkc3z4~q ;
+wire \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Jruvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F4c3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wkpwx4~3_combout ;
+wire \soc_inst|switches_1|switch_store[0][6]~q ;
+wire \soc_inst|interconnect_1|HRDATA[6]~36_combout ;
+wire \soc_inst|m0_1|u_logic|O9iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O9iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Orj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wbf3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Wbf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Aff3z4~q ;
+wire \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bqf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mof3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xmf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Icxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|J0n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Md93z4~q ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N3n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V883z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vcv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Y1n2z4~q ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|G4qwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Asdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dy23z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Pbl2z4~q ;
+wire \soc_inst|m0_1|u_logic|M743z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tel2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uo13z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Edl2z4~q ;
+wire \soc_inst|m0_1|u_logic|C1lvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lgi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xhl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wo03z4~q ;
+wire \soc_inst|m0_1|u_logic|Csz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Igl2z4~q ;
+wire \soc_inst|m0_1|u_logic|C193z4~q ;
+wire \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Eut2z4~q ;
+wire \soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Kqzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|J4awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vg53z4~q ;
+wire \soc_inst|m0_1|u_logic|Py72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M082z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Py72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Py72z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Py72z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nozvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Znzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uozvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uozvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Locvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~122 ;
+wire \soc_inst|m0_1|u_logic|Add5~57_sumout ;
+wire \soc_inst|m0_1|u_logic|Xmzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|N3v2z4~q ;
+wire \soc_inst|m0_1|u_logic|U7uwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eq63z4~q ;
+wire \soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nz73z4~q ;
+wire \soc_inst|m0_1|u_logic|U7uwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U7uwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nvdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Asdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C5n2z4~q ;
+wire \soc_inst|m0_1|u_logic|M3u2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|V883z4~q ;
+wire \soc_inst|m0_1|u_logic|Mz63z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fed3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dks2z4~q ;
+wire \soc_inst|m0_1|u_logic|G8n2z4~q ;
+wire \soc_inst|m0_1|u_logic|K3uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W2uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|X9n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bus2z4~q ;
+wire \soc_inst|m0_1|u_logic|Avowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Avowx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Avowx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cma3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cma3z4~q ;
+wire \soc_inst|m0_1|u_logic|Y7iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y7iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Y7iwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ba0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bq5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Axm2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Axm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pcd3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pcd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Sa23z4~q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ;
+wire \soc_inst|m0_1|u_logic|L7a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~50 ;
+wire \soc_inst|m0_1|u_logic|Add0~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Ypmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iua3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~38 ;
+wire \soc_inst|m0_1|u_logic|Add0~61_sumout ;
+wire \soc_inst|m0_1|u_logic|T5g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Rpmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K7g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~62 ;
+wire \soc_inst|m0_1|u_logic|Add0~81_sumout ;
+wire \soc_inst|m0_1|u_logic|U5a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Kpmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rsa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Mis2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tqc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tqc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Txa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zyhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rym2z4~q ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kss2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kss2z4~q ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|M1pwx4~4_combout ;
+wire \soc_inst|ram_1|data_to_memory[14]~30_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ;
+wire \soc_inst|ram_1|data_to_memory[30]~29_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ;
+wire \soc_inst|m0_1|u_logic|Qapwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rdg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Pwg3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Pwg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gfg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nag3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Dng3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hqg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Zjg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eyg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xi2xx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Hk0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ltg3z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Ltg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Avg3z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Avg3z4~q ;
 wire \soc_inst|m0_1|u_logic|Hk0wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Kig3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ccg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ccg3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Hk0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Eyg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Xi2xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add5~74 ;
+wire \soc_inst|m0_1|u_logic|Add5~22 ;
+wire \soc_inst|m0_1|u_logic|Add5~49_sumout ;
+wire \soc_inst|m0_1|u_logic|Add3~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Ql0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xvjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L7p2z4~q ;
+wire \soc_inst|m0_1|u_logic|Olg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uw82z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Vgg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xu82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M9awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M9awx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~50 ;
+wire \soc_inst|m0_1|u_logic|Add5~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Add3~61_sumout ;
+wire \soc_inst|m0_1|u_logic|Ug0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|M0kvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tzg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Hk0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wh0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ri0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ri0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bh0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nvdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xtdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ;
+wire \soc_inst|m0_1|u_logic|I1h3z4~q ;
+wire \soc_inst|m0_1|u_logic|St0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ;
+wire \soc_inst|m0_1|u_logic|Xyn2z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ;
+wire \soc_inst|m0_1|u_logic|B2i3z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ;
+wire \soc_inst|m0_1|u_logic|D4a3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D4a3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add0~82 ;
+wire \soc_inst|m0_1|u_logic|Add0~1_sumout ;
+wire \soc_inst|m0_1|u_logic|Dpmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ara3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~2 ;
+wire \soc_inst|m0_1|u_logic|Add0~73_sumout ;
+wire \soc_inst|m0_1|u_logic|Xeo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Womvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add0~74 ;
+wire \soc_inst|m0_1|u_logic|Add0~29_sumout ;
+wire \soc_inst|m0_1|u_logic|Pomvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S3i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~30 ;
+wire \soc_inst|m0_1|u_logic|Add0~17_sumout ;
+wire \soc_inst|m0_1|u_logic|Iomvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O0o2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~18 ;
+wire \soc_inst|m0_1|u_logic|Add0~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Bomvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jpa3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~54 ;
+wire \soc_inst|m0_1|u_logic|Add0~45_sumout ;
+wire \soc_inst|m0_1|u_logic|Unmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z2h3z4~q ;
+wire \soc_inst|m0_1|u_logic|Sjvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ntmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ntmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Godwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qmdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qmdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fhc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fhc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Oxuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R1ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ipb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dewwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B2uvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U1uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Adt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dewwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gtmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gtmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gtmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tj0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tj0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ia0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Bh0wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Sog3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Dng3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hqg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Pwg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gfg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Nag3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|M9awx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xyh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zfv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Zb83z4~q ;
-wire \soc_inst|m0_1|u_logic|Qg93z4~q ;
-wire \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|X892z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|A792z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M0i3z4~q ;
-wire \soc_inst|m0_1|u_logic|G123z4~q ;
-wire \soc_inst|m0_1|u_logic|Pa33z4~q ;
-wire \soc_inst|m0_1|u_logic|A792z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tvh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ixh3z4~q ;
-wire \soc_inst|m0_1|u_logic|A792z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|A792z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ccg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dmvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wrg3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dmvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dmvwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Poq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kev2z4~q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Anq2z4~q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B173z4~q ;
+wire \soc_inst|m0_1|u_logic|Eqq2z4~q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ka83z4~q ;
+wire \soc_inst|m0_1|u_logic|B5u2z4~q ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|D9uwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Xtdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|A9p2z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|A9p2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pap2z4~q ;
 wire \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Bjxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q6u2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ecp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Q273z4~q ;
 wire \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Bjxwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Bjxwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~22 ;
-wire \soc_inst|m0_1|u_logic|Add5~49_sumout ;
-wire \soc_inst|m0_1|u_logic|Un0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xl0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vzdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|R1w2z4~q ;
-wire \soc_inst|m0_1|u_logic|K9vvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uzhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ble3z4~q ;
-wire \soc_inst|m0_1|u_logic|Lee3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lee3z4~q ;
-wire \soc_inst|m0_1|u_logic|Whlwx4~0_combout ;
-wire \soc_inst|ram_1|data_to_memory[11]~17_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ;
-wire \soc_inst|ram_1|byte_select[2]~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ;
-wire \soc_inst|ram_1|data_to_memory[19]~18_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[11]~24_combout ;
-wire \soc_inst|m0_1|u_logic|Whlwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Whlwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Whlwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Bo0wx4~0_combout ;
-wire \soc_inst|ram_1|data_to_memory[27]~19_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[3]~20_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ;
-wire \soc_inst|m0_1|u_logic|Mjlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kvtwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Kw7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kw7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Iutwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mjlwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bo0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Xl0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ht53z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ht53z4~q ;
-wire \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Yj43z4~q ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nr2xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nn0wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Oaawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oaawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~50 ;
-wire \soc_inst|m0_1|u_logic|Add5~53_sumout ;
-wire \soc_inst|m0_1|u_logic|Dpc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dpc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Kwa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nzhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oar2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bsvwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Eudwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eudwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|E1ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E1ewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L7a3z4~q ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ;
-wire \soc_inst|m0_1|u_logic|C9a3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~26 ;
-wire \soc_inst|m0_1|u_logic|Add0~13_sumout ;
-wire \soc_inst|m0_1|u_logic|Mqmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zva3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~14 ;
-wire \soc_inst|m0_1|u_logic|Add0~50 ;
-wire \soc_inst|m0_1|u_logic|Add0~37_sumout ;
-wire \soc_inst|m0_1|u_logic|Ypmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iua3z4~q ;
-wire \soc_inst|interconnect_1|HRDATA[12]~22_combout ;
-wire \soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xrmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C0ewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xrmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mydwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D7iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sx3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Imvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Knvvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Sta2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wbk2z4~q ;
 wire \soc_inst|m0_1|u_logic|Uyv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kofwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cr0xx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Zx3wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|H6mvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wwywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|I2uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1a3z4~q ;
+wire \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S4pwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Qrp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Aqp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bec3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bec3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ckuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F2ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pxb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D0wwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D0wwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I90xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B90xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zad3z4~q ;
+wire \soc_inst|m0_1|u_logic|T7d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ruvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M2ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vac3z4~q ;
+wire \soc_inst|m0_1|u_logic|Mcc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mcc3z4~q ;
+wire \soc_inst|m0_1|u_logic|G10xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G10xx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tb0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S00xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fb0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I90xx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cjuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Usl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wzvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wzvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jjuwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Douvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W0ivx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|X0c3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ylc3z4~q ;
+wire \soc_inst|m0_1|u_logic|W0ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Ylc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|G8n2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ylc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6l2z4~q ;
 wire \soc_inst|m0_1|u_logic|H8l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z4l2z4~q ;
 wire \soc_inst|m0_1|u_logic|A50xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Ayzwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Jjuwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wvzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F40xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bmb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Axm2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Axm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wzvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wzvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wvzwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kwa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nzhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oar2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D4g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yauvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gzhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wuq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mis2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vgs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zxvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dpc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Dpc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zxvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lns2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Jsa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Syhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uls2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jsc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jsc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xwvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xwvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Iazwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dizwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tqzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cps2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kizwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Arzwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Arzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pazwx4~combout ;
+wire \soc_inst|m0_1|u_logic|J7zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nnc3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nnc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ipn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wva2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B0ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Azs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Svs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gyvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gyvwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mxa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9l2z4~q ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ;
+wire \soc_inst|m0_1|u_logic|I0ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vve3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vve3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H2f3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H2f3z4~q ;
+wire \soc_inst|m0_1|u_logic|Mhvvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P0ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kkb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Whzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Whzwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fjzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yizwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qlzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mczwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fczwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gcb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Clzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jxs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ihzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T5zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|G2zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G2zwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Qzzwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|N10xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jzzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F40xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Czzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kbzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wvzwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Adzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mcc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mcc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Hdzwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I90xx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|R4zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A6zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H6zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vzywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vzywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J0zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C0zwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U5pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I6pwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6pwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|X2rvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uqi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hzywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wwywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tyywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ozywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gvywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E5owx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X2rvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|D7iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ba0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|J70wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z80wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z80wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J70wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|J70wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pw03z4~q ;
+wire \soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ug43z4~q ;
+wire \soc_inst|m0_1|u_logic|J0n2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cy13z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R6n2z4~q ;
+wire \soc_inst|m0_1|u_logic|T83xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L733z4~q ;
+wire \soc_inst|m0_1|u_logic|Dq53z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Dq53z4~q ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wa0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|E5awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E5awx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~57_sumout ;
+wire \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|U6awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A933z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ji43z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rz13z4~q ;
+wire \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A8h3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|A8h3z4~q ;
+wire \soc_inst|m0_1|u_logic|P9h3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|P9h3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tch3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D03xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|U6awx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~54 ;
+wire \soc_inst|m0_1|u_logic|Add5~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Fc0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|B5kvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Llq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Tch3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ebh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Iq82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sr53z4~q ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A933z4~q ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lo82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~26 ;
+wire \soc_inst|m0_1|u_logic|Add5~1_sumout ;
+wire \soc_inst|m0_1|u_logic|C70wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nox2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q9kvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zfh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pw03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vzz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wj82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zh82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|N90wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~2 ;
+wire \soc_inst|m0_1|u_logic|Add5~126 ;
+wire \soc_inst|m0_1|u_logic|Add5~121_sumout ;
+wire \soc_inst|m0_1|u_logic|Add2~118 ;
+wire \soc_inst|m0_1|u_logic|Add2~113_sumout ;
+wire \soc_inst|m0_1|u_logic|Duhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Duhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xyk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~114 ;
+wire \soc_inst|m0_1|u_logic|Add2~78 ;
+wire \soc_inst|m0_1|u_logic|Add2~30 ;
+wire \soc_inst|m0_1|u_logic|Add2~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Yih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hrcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ds72z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Au72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ds72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ds72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ds72z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wpcvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~58 ;
+wire \soc_inst|m0_1|u_logic|Add5~6 ;
+wire \soc_inst|m0_1|u_logic|Add5~89_sumout ;
+wire \soc_inst|m0_1|u_logic|Aihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qfzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qfzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Aihvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Aihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xsx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~110 ;
+wire \soc_inst|m0_1|u_logic|Add3~74 ;
+wire \soc_inst|m0_1|u_logic|Add3~22 ;
+wire \soc_inst|m0_1|u_logic|Add3~17_sumout ;
+wire \soc_inst|m0_1|u_logic|Vezvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Galvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|I443z4~q ;
+wire \soc_inst|m0_1|u_logic|Gfq2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kiq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Skh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|J0v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pdbwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zbbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cfzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cfzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Art2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fexwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gfq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fexwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fexwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zudwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zudwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F7qwx4~combout ;
+wire \soc_inst|m0_1|u_logic|A6ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~10_combout ;
+wire \soc_inst|ram_1|data_to_memory[26]~8_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[2]~7_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ;
+wire \soc_inst|m0_1|u_logic|T7qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jkmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jkmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qkmwx4~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[10]~12_combout ;
+wire \soc_inst|m0_1|u_logic|Qkmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qkmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qkmwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ecowx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ajmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ajmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ajmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yjzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xmdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mbt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yrqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ojmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ojmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ojmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yjzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hihvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~29_sumout ;
+wire \soc_inst|m0_1|u_logic|Add5~5_sumout ;
+wire \soc_inst|m0_1|u_logic|Hihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lrx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Nhzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|R5lvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S8k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Djzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|H3awx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rjzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uhzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uhzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Po63z4~q ;
+wire \soc_inst|m0_1|u_logic|Z3k2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Feqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Feqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Feqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Uvdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gvdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qtdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jymwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jymwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vcuvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vcuvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wamvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|K9ovx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|T2ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ztc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ztc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Zad3z4~q ;
-wire \soc_inst|m0_1|u_logic|Pcd3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pcd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ruvvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M2ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vac3z4~q ;
-wire \soc_inst|m0_1|u_logic|G10xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G10xx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I90xx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tb0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bjd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qfc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qfc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|D0wwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D0wwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B90xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hdzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A6zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uls2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cps2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tqc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tqc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Txa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zyhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rym2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Jsc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jsc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Jsa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Syhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xwvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xwvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kizwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Arzwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D4g3z4~q ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ;
-wire \soc_inst|m0_1|u_logic|D4g3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Mis2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mis2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wuq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yauvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gzhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vgs2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zxvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zxvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tqzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tib3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dizwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fczwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nnc3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nnc3z4~q ;
-wire \soc_inst|m0_1|u_logic|Wva2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B0ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ipn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Gyvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gyvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B6pwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kkb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Tqs2z4~q ;
-wire \soc_inst|m0_1|u_logic|H2f3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H2f3z4~q ;
-wire \soc_inst|m0_1|u_logic|Mhvvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P0ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kss2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Whzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Whzwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qlzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fjzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yizwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mczwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bus2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ihzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Clzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T5zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B6pwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B6pwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Lns2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Iazwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Arzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pazwx4~combout ;
-wire \soc_inst|m0_1|u_logic|J7zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B6pwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|H6zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G2zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J0zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vzywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vzywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C0zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Viuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Arzwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fb0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S00xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kbzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xdb3z4~q ;
-wire \soc_inst|m0_1|u_logic|Jzzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qzzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Czzwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U5pwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jjuwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cjuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|B6pwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|P2a3z4~q ;
-wire \soc_inst|m0_1|u_logic|Uqi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hzywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X9n2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tyywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ozywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pwywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gvywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E5owx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Kkrvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Xrmwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Xtdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M3u2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|M3u2z4~q ;
-wire \soc_inst|m0_1|u_logic|G4qwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|G4qwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vcv2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Vcv2z4~q ;
-wire \soc_inst|m0_1|u_logic|G4qwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Md93z4~q ;
-wire \soc_inst|m0_1|u_logic|J0n2z4~q ;
-wire \soc_inst|m0_1|u_logic|G4qwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G4qwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Asdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xtdwx4~1_combout ;
-wire \soc_inst|switches_1|switch_store[1][4]~q ;
-wire \soc_inst|m0_1|u_logic|Hk0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ;
-wire \soc_inst|ram_1|data_to_memory[20]~16_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ;
-wire \soc_inst|m0_1|u_logic|Sjvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I1h3z4~q ;
-wire \soc_inst|m0_1|u_logic|O24wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gdo2z4~q ;
-wire \soc_inst|m0_1|u_logic|U5a3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|U5a3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~38 ;
-wire \soc_inst|m0_1|u_logic|Add0~61_sumout ;
-wire \soc_inst|m0_1|u_logic|T5g3z4~q ;
-wire \soc_inst|m0_1|u_logic|Rpmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K7g3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~62 ;
-wire \soc_inst|m0_1|u_logic|Add0~81_sumout ;
-wire \soc_inst|m0_1|u_logic|Kpmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rsa3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~82 ;
-wire \soc_inst|m0_1|u_logic|Add0~1_sumout ;
-wire \soc_inst|m0_1|u_logic|D4a3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D4a3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dpmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ara3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~2 ;
-wire \soc_inst|m0_1|u_logic|Add0~73_sumout ;
-wire \soc_inst|m0_1|u_logic|Womvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xeo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~74 ;
-wire \soc_inst|m0_1|u_logic|Add0~29_sumout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ;
-wire \soc_inst|m0_1|u_logic|B2i3z4~q ;
-wire \soc_inst|m0_1|u_logic|Pomvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S3i3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~30 ;
-wire \soc_inst|m0_1|u_logic|Add0~18 ;
-wire \soc_inst|m0_1|u_logic|Add0~53_sumout ;
-wire \soc_inst|m0_1|u_logic|L8m2z4~q ;
-wire \soc_inst|m0_1|u_logic|Bomvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jpa3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~54 ;
-wire \soc_inst|m0_1|u_logic|Add0~45_sumout ;
-wire \soc_inst|m0_1|u_logic|Unmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z2h3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ntmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zudwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nvdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nvdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ntmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tj0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tj0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wh0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ri0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ri0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bh0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ia0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Bh0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rdg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Wrg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Dmvwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Dmvwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dmvwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jtdwx4~1_combout ;
-wire \soc_inst|switches_1|switch_store[1][1]~q ;
-wire \soc_inst|m0_1|u_logic|Mbtwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S3i3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bgfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bgfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gxk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ahowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tgowx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tlyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jiowx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B28wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tlyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S08wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hmyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hmyvx4~1_combout ;
+wire \soc_inst|switches_1|half_word_address[1]~DUPLICATE_q ;
+wire \soc_inst|switches_1|read_enable~0_combout ;
+wire \soc_inst|switches_1|read_enable~q ;
+wire \soc_inst|interconnect_1|HRDATA[9]~5_combout ;
+wire \soc_inst|switches_1|half_word_address~3_combout ;
+wire \soc_inst|interconnect_1|HRDATA[6]~9_combout ;
+wire \soc_inst|interconnect_1|HRDATA[9]~15_combout ;
+wire \SW[8]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][8]~q ;
+wire \soc_inst|ram_1|data_to_memory[8]~28_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[0]~27_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ;
+wire \soc_inst|interconnect_1|HRDATA[8]~33_combout ;
+wire \soc_inst|m0_1|u_logic|Hmyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Beowx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q7ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q7ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rkyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K22wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K22wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zz1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hq33z4~q ;
+wire \soc_inst|m0_1|u_logic|Ii73z4~q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Kc03z4~q ;
+wire \soc_inst|m0_1|u_logic|Rvv2z4~q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|E913z4~q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P12wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P12wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ;
+wire \soc_inst|m0_1|u_logic|W3f3z4~q ;
+wire \soc_inst|m0_1|u_logic|Nfb3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nfb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~90 ;
+wire \soc_inst|m0_1|u_logic|Add0~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Hrmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dhb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~10 ;
+wire \soc_inst|m0_1|u_logic|Add0~77_sumout ;
+wire \soc_inst|m0_1|u_logic|Armvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M5f3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~78 ;
+wire \soc_inst|m0_1|u_logic|Add0~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Kxe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Tqmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aze3z4~q ;
+wire \soc_inst|switches_1|switch_store[0][9]~q ;
+wire \soc_inst|ram_1|data_to_memory[9]~9_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ;
+wire \soc_inst|ram_1|data_to_memory[17]~10_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[9]~16_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Khfwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|S5b3z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6twx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6twx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rhfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rhfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rhfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mx0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Mx0wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Iv0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Df83z4~feeder_combout ;
 wire \soc_inst|m0_1|u_logic|Df83z4~q ;
-wire \soc_inst|m0_1|u_logic|D1p2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yw0wx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Yw0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Yw0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Gdawx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~74 ;
-wire \soc_inst|m0_1|u_logic|Add5~21_sumout ;
-wire \soc_inst|m0_1|u_logic|Fq0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Irjvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W5p2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tvn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Jf92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ixn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Md92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ec33z4~q ;
-wire \soc_inst|m0_1|u_logic|Md92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xcuwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xcuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xcuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vl92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K423z4~q ;
+wire \soc_inst|m0_1|u_logic|Yj92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yj92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yj92z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yj92z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~85_sumout ;
+wire \soc_inst|m0_1|u_logic|Bv0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tmjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H4p2z4~q ;
 wire \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Md92z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|V223z4~q ;
+wire \soc_inst|m0_1|u_logic|Md92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Md92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvn2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jf92z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Md92z4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|St0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~21_sumout ;
 wire \soc_inst|m0_1|u_logic|Mq0wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Cs0wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Cs0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Mq0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Et0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Et0wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Mq0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Psn2z4~q ;
-wire \soc_inst|m0_1|u_logic|H1qwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Eun2z4~q ;
+wire \soc_inst|m0_1|u_logic|F8u2z4~q ;
 wire \soc_inst|m0_1|u_logic|H1qwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H1qwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|H1qwx4~combout ;
 wire \soc_inst|m0_1|u_logic|X0ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X0ewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tq7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fq7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Po7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vr7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jmdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jtdwx4~1_combout ;
+wire \SW[1]~input_o ;
+wire \soc_inst|switches_1|switch_store[1][1]~q ;
+wire \soc_inst|m0_1|u_logic|Mbtwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bgfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bgfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vq1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vq1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vq1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|G6d3z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G6d3z4~q ;
+wire \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dmivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dmivx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G1s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rpe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Fre3z4~q ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hue3z4~q ;
+wire \soc_inst|m0_1|u_logic|To33z4~q ;
+wire \soc_inst|m0_1|u_logic|Kf23z4~q ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cy43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|L763z4~q ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tse3z4~q ;
+wire \soc_inst|m0_1|u_logic|Lwbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oubwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Konvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~42 ;
+wire \soc_inst|m0_1|u_logic|Add5~113_sumout ;
+wire \soc_inst|m0_1|u_logic|Ox1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ox1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ksbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iu1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I4s2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|I4s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|W5s2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Cy43z4~q ;
+wire \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rpe3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ug73z4~q ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Vf5wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Kzbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~114 ;
+wire \soc_inst|m0_1|u_logic|Add5~105_sumout ;
+wire \soc_inst|m0_1|u_logic|Do1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Do1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Do1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Glnwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wn1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wn1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pn1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Arv2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Dcs2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Dcs2z4~q ;
+wire \soc_inst|m0_1|u_logic|An83z4~q ;
+wire \soc_inst|m0_1|u_logic|Gt93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Zh5wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|S3cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S3cwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~106 ;
+wire \soc_inst|m0_1|u_logic|Add5~46 ;
+wire \soc_inst|m0_1|u_logic|Add5~14 ;
+wire \soc_inst|m0_1|u_logic|Add5~17_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~5_combout ;
+wire \soc_inst|ram_1|memory.raddr_a[11]~11_combout ;
+wire \soc_inst|ram_1|data_to_memory[28]~14_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[12]~13_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ;
+wire \soc_inst|m0_1|u_logic|Lsmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X7ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lsmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wzpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wzpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rhnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Idk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qh72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ql23z4~q ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tf72z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Esnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Whh2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mnawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C3qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sscvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~90 ;
+wire \soc_inst|m0_1|u_logic|Add5~85_sumout ;
+wire \soc_inst|m0_1|u_logic|C3qvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|An73z4~q ;
+wire \soc_inst|m0_1|u_logic|F8wwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zkk2z4~q ;
+wire \soc_inst|m0_1|u_logic|F8wwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F8wwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Yvtwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xs7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uvdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xs7wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Cuxwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Hr7wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fc7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qtdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tq7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fq7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Po7wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fc7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Et7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xowwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xowwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xowwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ksm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ixt2z4~q ;
+wire \soc_inst|m0_1|u_logic|It63z4~q ;
+wire \soc_inst|m0_1|u_logic|R283z4~q ;
+wire \soc_inst|m0_1|u_logic|Qowwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wqm2z4~q ;
+wire \soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|G493z4~q ;
+wire \soc_inst|m0_1|u_logic|Ipm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qowwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qowwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ok7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jl7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E1ewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U18wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nu7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dtpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Dtpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~78 ;
+wire \soc_inst|m0_1|u_logic|Add5~129_sumout ;
+wire \soc_inst|m0_1|u_logic|Dtpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zei2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zei2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mdzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ehcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ducvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add5~86 ;
+wire \soc_inst|m0_1|u_logic|Add5~117_sumout ;
+wire \soc_inst|m0_1|u_logic|Mdzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fdzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T243z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yoz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Sl03z4~q ;
+wire \soc_inst|m0_1|u_logic|Noo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kt23z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Uyu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Yhnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yhnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cqo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rtpvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Kih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~118 ;
+wire \soc_inst|m0_1|u_logic|Add5~10 ;
+wire \soc_inst|m0_1|u_logic|Add5~77_sumout ;
+wire \soc_inst|m0_1|u_logic|Y5zvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Cb3wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|R38wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|R38wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Qb3wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Z9zvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add3~22 ;
-wire \soc_inst|m0_1|u_logic|Add3~18 ;
-wire \soc_inst|m0_1|u_logic|Add3~14 ;
-wire \soc_inst|m0_1|u_logic|Add3~10 ;
-wire \soc_inst|m0_1|u_logic|Add3~6 ;
-wire \soc_inst|m0_1|u_logic|Add3~1_sumout ;
-wire \soc_inst|m0_1|u_logic|haddr_o~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3ivx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|O3ivx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|V1l2z4~q ;
 wire \soc_inst|m0_1|u_logic|Nd3wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nd3wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|V41xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X2j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ll73z4~q ;
+wire \soc_inst|m0_1|u_logic|Cc63z4~q ;
+wire \soc_inst|m0_1|u_logic|Xti2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Lpu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Nd3wx4~7_combout ;
 wire \soc_inst|m0_1|u_logic|Koj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kt33z4~q ;
 wire \soc_inst|m0_1|u_logic|Nd3wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Nd3wx4~combout ;
 wire \soc_inst|m0_1|u_logic|hwdata_o~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ux4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P2a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Tib3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tqs2z4~q ;
+wire \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bjd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vfd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|N8b2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Inb2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Luywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Luywx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ypa2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xtywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ypa2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C34wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Pd4wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Q5vvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q7mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Owgvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ywi2z4~q ;
 wire \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X2rvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pjyvx4~0_combout ;
-wire \soc_inst|switches_1|DataValid~1_combout ;
-wire \soc_inst|ram_1|data_to_memory[0]~27_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ;
-wire \soc_inst|ram_1|data_to_memory[8]~28_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ;
-wire \SW[0]~input_o ;
-wire \soc_inst|switches_1|switch_store[0][0]~q ;
-wire \soc_inst|interconnect_1|HRDATA[0]~32_combout ;
-wire \soc_inst|m0_1|u_logic|B28wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ahowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tgowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tlyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tlyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pjyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U18wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pjyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|T8f3z4~q ;
-wire \soc_inst|m0_1|u_logic|Hmyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hmyvx4~1_combout ;
-wire \SW[8]~input_o ;
-wire \soc_inst|switches_1|switch_store[0][8]~q ;
-wire \soc_inst|interconnect_1|HRDATA[8]~33_combout ;
-wire \soc_inst|m0_1|u_logic|S08wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hmyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|I21wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q7ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q7ewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rkyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I21wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add2~98 ;
-wire \soc_inst|m0_1|u_logic|Add2~93_sumout ;
-wire \soc_inst|m0_1|u_logic|Qjhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qjhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dkx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~94 ;
-wire \soc_inst|m0_1|u_logic|Add2~89_sumout ;
-wire \soc_inst|m0_1|u_logic|Jjhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jjhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Plx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~86 ;
-wire \soc_inst|m0_1|u_logic|Add3~70 ;
-wire \soc_inst|m0_1|u_logic|Add3~65_sumout ;
-wire \soc_inst|m0_1|u_logic|Ql0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Xvjvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L7p2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xu82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xu82z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uw82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zjg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Xu82z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xu82z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~61_sumout ;
-wire \soc_inst|m0_1|u_logic|Ug0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|M0kvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tzg3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ebh3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ebh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Iq82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rz13z4~q ;
-wire \soc_inst|m0_1|u_logic|A933z4~q ;
-wire \soc_inst|m0_1|u_logic|Lo82z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tch3z4~q ;
-wire \soc_inst|m0_1|u_logic|Sr53z4~q ;
-wire \soc_inst|m0_1|u_logic|Ji43z4~q ;
-wire \soc_inst|m0_1|u_logic|Lo82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P9h3z4~q ;
-wire \soc_inst|m0_1|u_logic|A8h3z4~q ;
-wire \soc_inst|m0_1|u_logic|Lo82z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Lo82z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~57_sumout ;
-wire \soc_inst|m0_1|u_logic|U6awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Eqq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D03xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Anq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Poq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Ka83z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ka83z4~q ;
-wire \soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|B5u2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|B173z4~q ;
-wire \soc_inst|m0_1|u_logic|Bf93z4~q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|U6awx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~54 ;
-wire \soc_inst|m0_1|u_logic|Add5~25_sumout ;
-wire \soc_inst|m0_1|u_logic|Fc0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|B5kvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Llq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zfh3z4~q ;
-wire \soc_inst|m0_1|u_logic|L733z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh82z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zh82z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|C5n2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wj82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R6n2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ug43z4~q ;
-wire \soc_inst|m0_1|u_logic|Zh82z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zh82z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|N90wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~26 ;
-wire \soc_inst|m0_1|u_logic|Add5~2 ;
-wire \soc_inst|m0_1|u_logic|Add5~125_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~117_sumout ;
-wire \soc_inst|m0_1|u_logic|Zdhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zdhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kaf3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~113_sumout ;
-wire \soc_inst|m0_1|u_logic|Y92wx4~combout ;
-wire \soc_inst|m0_1|u_logic|K8ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B6j2z4~q ;
-wire \soc_inst|m0_1|u_logic|Joi3z4~q ;
-wire \soc_inst|m0_1|u_logic|Sz23z4~q ;
-wire \soc_inst|m0_1|u_logic|Jq13z4~q ;
-wire \soc_inst|m0_1|u_logic|P582z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Umi3z4~q ;
-wire \soc_inst|m0_1|u_logic|M782z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ki53z4~q ;
-wire \soc_inst|m0_1|u_logic|B943z4~q ;
-wire \soc_inst|m0_1|u_logic|P582z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qji3z4~q ;
-wire \soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|P582z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|P582z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Gtnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q9cwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yqzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O3pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O3pvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rqzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C5v2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Fli3z4~q ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|C183z4~q ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Eacwx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|Rih2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~121_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~113_sumout ;
-wire \soc_inst|m0_1|u_logic|Duhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O3pvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Duhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xyk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vjnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~109_sumout ;
-wire \soc_inst|m0_1|u_logic|Y1pvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Vjnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Q7j2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nozvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uozvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uozvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Znzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xmzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~57_sumout ;
-wire \soc_inst|m0_1|u_logic|Xmzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Csz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Igl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kqzvx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~18_combout ;
-wire \soc_inst|m0_1|u_logic|M5mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M5mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hzj2z4~q ;
-wire \soc_inst|m0_1|u_logic|T7qwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jkmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Beowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zudwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|A6ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jkmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qkmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qkmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qkmwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qkmwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Yjzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yjzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rjzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uhzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uhzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ow23z4~q ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hn03z4~q ;
-wire \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Djzvx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~10_combout ;
-wire \soc_inst|ram_1|data_to_memory[26]~8_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[2]~14_combout ;
-wire \soc_inst|m0_1|u_logic|Ojmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ojmwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Et0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Et0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add2~90 ;
-wire \soc_inst|m0_1|u_logic|Add2~73_sumout ;
-wire \soc_inst|m0_1|u_logic|Cjhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cjhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bnx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~74 ;
-wire \soc_inst|m0_1|u_logic|Add2~69_sumout ;
-wire \soc_inst|m0_1|u_logic|Ithvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ithvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zjq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~70 ;
-wire \soc_inst|m0_1|u_logic|Add2~65_sumout ;
-wire \soc_inst|m0_1|u_logic|Ldhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ldhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B9g3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~66 ;
-wire \soc_inst|m0_1|u_logic|Add2~61_sumout ;
-wire \soc_inst|m0_1|u_logic|Gehvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gehvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Foe3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~62 ;
-wire \soc_inst|m0_1|u_logic|Add2~105_sumout ;
-wire \soc_inst|m0_1|u_logic|Vihvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~1_sumout ;
-wire \soc_inst|m0_1|u_logic|Vihvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nox2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~101_sumout ;
-wire \soc_inst|m0_1|u_logic|C70wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Q9kvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dq53z4~q ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|T83xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|E5awx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E5awx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J70wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z80wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z80wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J70wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|J70wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V883z4~q ;
-wire \soc_inst|m0_1|u_logic|Mz63z4~q ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Wa0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ;
-wire \soc_inst|m0_1|u_logic|Cma3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cma3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~46 ;
-wire \soc_inst|m0_1|u_logic|Add0~69_sumout ;
-wire \soc_inst|m0_1|u_logic|Ogo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ce0wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ;
-wire \soc_inst|m0_1|u_logic|Ieh3z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nnmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add0~70 ;
-wire \soc_inst|m0_1|u_logic|Add0~85_sumout ;
-wire \soc_inst|m0_1|u_logic|Gnmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ddi3z4~q ;
-wire \soc_inst|m0_1|u_logic|Y7iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fed3z4~q ;
-wire \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Avowx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Avowx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Avowx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Y7iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Asdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Y7iwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|N4rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mbnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gtp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Irqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Irqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|A1yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gokwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbxvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Uup2z4~q ;
+wire \soc_inst|m0_1|u_logic|L4bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I4dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4bwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|S4bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q3bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G7x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xx93z4~q ;
+wire \soc_inst|m0_1|u_logic|Mekvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mekvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hyz2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Hyz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bv03z4~q ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X533z4~q ;
+wire \soc_inst|m0_1|u_logic|Ow13z4~q ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|J5m2z4~q ;
+wire \soc_inst|m0_1|u_logic|A9bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D7bwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Asbvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Dfd2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Kfd2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q77wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qobwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R29wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E1bvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zznvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vxnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qynvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qynvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Vxnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~134_cout ;
+wire \soc_inst|m0_1|u_logic|Add5~30 ;
+wire \soc_inst|m0_1|u_logic|Add5~94 ;
+wire \soc_inst|m0_1|u_logic|Add5~102 ;
+wire \soc_inst|m0_1|u_logic|Add5~33_sumout ;
+wire \soc_inst|m0_1|u_logic|Bmhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~18 ;
+wire \soc_inst|m0_1|u_logic|Add2~34 ;
+wire \soc_inst|m0_1|u_logic|Add2~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Cax2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nlhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nlhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bnnvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add3~30 ;
+wire \soc_inst|m0_1|u_logic|Add3~26 ;
+wire \soc_inst|m0_1|u_logic|Add3~34 ;
+wire \soc_inst|m0_1|u_logic|Add3~54 ;
+wire \soc_inst|m0_1|u_logic|Add3~50 ;
+wire \soc_inst|m0_1|u_logic|Add3~46 ;
+wire \soc_inst|m0_1|u_logic|Add3~42 ;
+wire \soc_inst|m0_1|u_logic|Add3~38 ;
+wire \soc_inst|m0_1|u_logic|Add3~81_sumout ;
+wire \soc_inst|m0_1|u_logic|Owovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wzivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wce3z4~q ;
+wire \soc_inst|m0_1|u_logic|Pvd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Aud3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Aud3z4~q ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tyd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U9e3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ge9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6e3z4~q ;
+wire \soc_inst|m0_1|u_logic|F8e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cc9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aj1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Aj1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xk1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xk1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ll1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ll1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Aj1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Gm1wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|R99wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~45_sumout ;
+wire \soc_inst|m0_1|u_logic|Uehvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Uehvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~86 ;
+wire \soc_inst|m0_1|u_logic|Add2~82 ;
+wire \soc_inst|m0_1|u_logic|Add2~110 ;
+wire \soc_inst|m0_1|u_logic|Add2~101_sumout ;
+wire \soc_inst|m0_1|u_logic|Xjhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~61_sumout ;
 wire \soc_inst|m0_1|u_logic|X61wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|X61wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rix2z4~q ;
+wire \soc_inst|m0_1|u_logic|J7q2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~97_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~4_combout ;
+wire \soc_inst|m0_1|u_logic|Pdjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Aw9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lph3z4~q ;
+wire \soc_inst|m0_1|u_logic|Arh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Du9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|P82wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N72wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Q52wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q52wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Naq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rdq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ey9wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Mydwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C0ewx4~1_combout ;
+wire \soc_inst|interconnect_1|HRDATA[12]~22_combout ;
+wire \soc_inst|m0_1|u_logic|Xrmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xrmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bsvwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Arzwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Viuwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jjuwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Kkrvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Xrmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Uf1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uf1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nf1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qd1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qd1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oir2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dy4xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gcr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|M413z4~q ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ze1wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Ejawx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ejawx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~13_sumout ;
+wire \soc_inst|m0_1|u_logic|Fhx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~81_sumout ;
+wire \soc_inst|m0_1|u_logic|Ekhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ekhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|L4jvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dkr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ya1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ya1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B91wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B91wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|B91wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lqr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O2g3z4~q ;
+wire \soc_inst|m0_1|u_logic|X94xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Hc1wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ;
+wire \soc_inst|m0_1|u_logic|D4g3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Geuwx4~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[13]~27_combout ;
+wire \soc_inst|m0_1|u_logic|Twmwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Twmwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kzqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kzqvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kzqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Twmwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mb1wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mb1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~109_sumout ;
+wire \soc_inst|m0_1|u_logic|Nehvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nehvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tme3z4~q ;
+wire \soc_inst|m0_1|u_logic|A9jvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Slr2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ty92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U5q2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xg33z4~q ;
+wire \soc_inst|m0_1|u_logic|O723z4~q ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|D603z4~q ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ww92z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|C61wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J61wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J61wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O51wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M41wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|M41wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|B1q2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hmqwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Mzp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hmqwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hmqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hmqwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hmqwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Mydwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mydwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Eudwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qapwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D7iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kss2z4~q ;
-wire \soc_inst|m0_1|u_logic|M1pwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M1pwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|M1pwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|M1pwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|M1pwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|D7iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X213z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|No93z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Q2q2z4~q ;
+wire \soc_inst|m0_1|u_logic|S71wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|R21xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S71wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S71wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|S71wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lhd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Repwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Repwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Repwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ncpwx4~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[30]~34_combout ;
+wire \soc_inst|m0_1|u_logic|J7ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A9iwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|E9zvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|E9zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Jmdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|F5ewx4~combout ;
-wire \soc_inst|m0_1|u_logic|W3ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W3ewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kqdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kqdwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Dqdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~22 ;
+wire \soc_inst|m0_1|u_logic|Add2~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Thhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Thhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Thhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jux2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~10 ;
+wire \soc_inst|m0_1|u_logic|Add2~14 ;
+wire \soc_inst|m0_1|u_logic|Add2~1_sumout ;
+wire \soc_inst|m0_1|u_logic|Tvhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tvhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rhi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Velvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Djdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wwdwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Kqdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wwdwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wwdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z78wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Dqdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kqdwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kqdwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Kqdwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Z78wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Widwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Djdwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Djdwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Widwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Djdwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Djdwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Z78wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Z78wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wwdwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wwdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wwdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z78wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zetwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qdtwx4~combout ;
+wire \soc_inst|m0_1|u_logic|M5ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W3ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W3ewx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Z78wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Do8wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Add5~29_sumout ;
 wire \soc_inst|m0_1|u_logic|Do8wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Do8wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~9_sumout ;
-wire \soc_inst|m0_1|u_logic|Do8wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Do8wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Do8wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Fyzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~81_sumout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O2bwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I30wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~15_combout ;
 wire \soc_inst|m0_1|u_logic|N88wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L9zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L9zvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|L9zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L9zvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Luzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Luzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~13_combout ;
 wire \soc_inst|m0_1|u_logic|G5qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nyawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~19_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~21_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~18_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~20_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~10_combout ;
-wire \soc_inst|m0_1|u_logic|Ee8wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ee8wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|G11wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G11wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ee8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ee8wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ee8wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Ee8wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|G79wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|C8zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Dv8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G79wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|G79wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|G79wx4~7_combout ;
 wire \soc_inst|m0_1|u_logic|N88wx4~11_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~18_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~21_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~19_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~20_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~9_combout ;
 wire \soc_inst|m0_1|u_logic|N88wx4~12_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L9zvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Luzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Luzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~13_combout ;
+wire \soc_inst|m0_1|u_logic|Nyawx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|N88wx4~17_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Rjzvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Nf1wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|N88wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|N88wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|N88wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|N88wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Wsawx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|N88wx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|N88wx4~14_combout ;
-wire \soc_inst|m0_1|u_logic|D6cwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Va3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Idk2z4~q ;
-wire \soc_inst|m0_1|u_logic|D47wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zxpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S17wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rhnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rhnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Mnawx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C3qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N88wx4~15_combout ;
 wire \soc_inst|m0_1|u_logic|N88wx4~16_combout ;
 wire \soc_inst|m0_1|u_logic|Z78wx4~7_combout ;
 wire \soc_inst|m0_1|u_logic|S9zvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Igi2z4~q ;
 wire \soc_inst|m0_1|u_logic|Velvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rhi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|O7zvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Vuo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mi13z4~q ;
-wire \soc_inst|m0_1|u_logic|O7zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Na53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|J5i3z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Y6i3z4~q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|E143z4~q ;
+wire \soc_inst|m0_1|u_logic|Rro2z4~q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vr23z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Vr23z4~q ;
+wire \soc_inst|m0_1|u_logic|Na53z4~q ;
 wire \soc_inst|m0_1|u_logic|O7zvx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|O7zvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Wnt2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fxu2z4~q ;
+wire \soc_inst|m0_1|u_logic|O7zvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|O7zvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Dih2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~9_sumout ;
 wire \soc_inst|m0_1|u_logic|F6zvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|F6zvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fxu2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gto2z4~q ;
 wire \soc_inst|m0_1|u_logic|Saqwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Uu83z4~q ;
+wire \soc_inst|m0_1|u_logic|Rro2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Saqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Saqwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Wj63z4~q ;
+wire \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Saqwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ft73z4~q ;
-wire \soc_inst|m0_1|u_logic|Saqwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Saqwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Kepwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Beowx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|X7ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lsmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uf1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uf1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ekhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fhx2z4~q ;
-wire \soc_inst|m0_1|u_logic|L4jvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dkr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Ze1wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Nf1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qd1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qd1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lpv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vdr2z4~q ;
-wire \soc_inst|m0_1|u_logic|H2wwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|H2wwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|H2wwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kfr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cc73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|H2wwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H2wwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zndwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nodwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zndwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cymwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ieh3z4~q ;
-wire \SW[5]~input_o ;
-wire \soc_inst|switches_1|switch_store[1][5]~q ;
-wire \soc_inst|ram_1|data_to_memory[21]~24_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[5]~23_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ;
-wire \soc_inst|interconnect_1|HRDATA[21]~29_combout ;
-wire \soc_inst|m0_1|u_logic|Jymwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jymwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fwtwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gftwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mouwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F5ewx4~combout ;
+wire \soc_inst|m0_1|u_logic|Hxmwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Qe0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Qe0wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Je0wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Mc0wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Mc0wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|D9uwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B5u2z4~q ;
-wire \soc_inst|m0_1|u_logic|D9uwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kev2z4~q ;
-wire \soc_inst|m0_1|u_logic|D9uwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|B173z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|D9uwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D9uwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qtdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qtdwx4~1_combout ;
-wire \SW[3]~input_o ;
-wire \soc_inst|switches_1|switch_store[1][3]~q ;
-wire \soc_inst|interconnect_1|HRDATA[19]~25_combout ;
-wire \soc_inst|m0_1|u_logic|Rilwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rilwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rilwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ll1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ll1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Aj1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ibe3z4~q ;
-wire \soc_inst|m0_1|u_logic|Uo5xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|F8e3z4~q ;
-wire \soc_inst|m0_1|u_logic|Q6e3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Exd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Gm1wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ;
-wire \soc_inst|m0_1|u_logic|Bge3z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~49_sumout ;
-wire \soc_inst|m0_1|u_logic|Fqmvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|She3z4~q ;
-wire \soc_inst|m0_1|u_logic|Oytvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bf93z4~q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Ce0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ;
+wire \soc_inst|m0_1|u_logic|Ieh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ogo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add0~46 ;
+wire \soc_inst|m0_1|u_logic|Add0~69_sumout ;
+wire \soc_inst|m0_1|u_logic|Nnmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add0~70 ;
+wire \soc_inst|m0_1|u_logic|Add0~85_sumout ;
+wire \soc_inst|m0_1|u_logic|Gnmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ddi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Jca3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jca3z4~q ;
 wire \soc_inst|m0_1|u_logic|Add0~86 ;
 wire \soc_inst|m0_1|u_logic|Add0~5_sumout ;
 wire \soc_inst|m0_1|u_logic|Zmmvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Uei3z4~q ;
 wire \soc_inst|m0_1|u_logic|Oytvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oytvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Oytvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Oytvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Oytvx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Oytvx4~combout ;
-wire \soc_inst|m0_1|u_logic|F2o2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mxtvx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ;
-wire \soc_inst|m0_1|u_logic|Xyn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add0~17_sumout ;
-wire \soc_inst|m0_1|u_logic|Iomvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O0o2z4~q ;
-wire \soc_inst|switches_1|switch_store[1][2]~q ;
-wire \soc_inst|ram_1|data_to_memory[18]~6_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[10]~5_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ;
-wire \soc_inst|interconnect_1|HRDATA[18]~13_combout ;
-wire \soc_inst|m0_1|u_logic|Ajmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ajmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ajmwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wn1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wn1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~50 ;
-wire \soc_inst|m0_1|u_logic|Add2~46 ;
-wire \soc_inst|m0_1|u_logic|Add2~41_sumout ;
-wire \soc_inst|m0_1|u_logic|Lkhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lkhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ufx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~42 ;
-wire \soc_inst|m0_1|u_logic|Add2~85_sumout ;
-wire \soc_inst|m0_1|u_logic|Uehvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Uehvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wzivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wce3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|U9e3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ge9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Cc9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pvd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Aud3z4~q ;
-wire \soc_inst|m0_1|u_logic|Cc9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cc9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cc9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~45_sumout ;
-wire \soc_inst|m0_1|u_logic|Add3~81_sumout ;
-wire \soc_inst|m0_1|u_logic|Owovx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[9]~9_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ;
-wire \soc_inst|ram_1|data_to_memory[23]~3_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[7]~11_combout ;
-wire \soc_inst|m0_1|u_logic|Wywwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wywwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wywwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wywwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|G9lwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oa3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oa3wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R3uvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rbmvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V3o2z4~q ;
+wire \soc_inst|m0_1|u_logic|X2rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pjyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I21wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I21wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add2~102 ;
+wire \soc_inst|m0_1|u_logic|Add2~98 ;
+wire \soc_inst|m0_1|u_logic|Add2~93_sumout ;
+wire \soc_inst|m0_1|u_logic|Qjhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tjlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dkx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~94 ;
+wire \soc_inst|m0_1|u_logic|Add2~89_sumout ;
+wire \soc_inst|m0_1|u_logic|Jjhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Plx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~90 ;
+wire \soc_inst|m0_1|u_logic|Add2~73_sumout ;
+wire \soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cjhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cjhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bnx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~69_sumout ;
+wire \soc_inst|m0_1|u_logic|Fq0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Irjvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W5p2z4~q ;
+wire \soc_inst|m0_1|u_logic|M0i3z4~q ;
+wire \soc_inst|m0_1|u_logic|X892z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pa33z4~q ;
+wire \soc_inst|m0_1|u_logic|G123z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|A792z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tvh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ixh3z4~q ;
+wire \soc_inst|m0_1|u_logic|A792z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Yj43z4~q ;
+wire \soc_inst|m0_1|u_logic|Ht53z4~q ;
+wire \soc_inst|m0_1|u_logic|A792z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A792z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Un0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xl0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xl0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ecp2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ecp2z4~q ;
+wire \soc_inst|m0_1|u_logic|G123z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nr2xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pap2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Nn0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ;
+wire \soc_inst|m0_1|u_logic|L8m2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rilwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rilwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rilwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bo0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bo0wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add2~74 ;
+wire \soc_inst|m0_1|u_logic|Add2~69_sumout ;
+wire \soc_inst|m0_1|u_logic|Ithvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ithvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zjq2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~70 ;
+wire \soc_inst|m0_1|u_logic|Add2~65_sumout ;
+wire \soc_inst|m0_1|u_logic|Ldhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ldhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B9g3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add2~66 ;
+wire \soc_inst|m0_1|u_logic|Add2~61_sumout ;
+wire \soc_inst|m0_1|u_logic|Foe3z4~q ;
+wire \soc_inst|m0_1|u_logic|Gehvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gehvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~62 ;
+wire \soc_inst|m0_1|u_logic|Add2~105_sumout ;
+wire \soc_inst|m0_1|u_logic|Vihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~106 ;
+wire \soc_inst|m0_1|u_logic|Add2~117_sumout ;
+wire \soc_inst|m0_1|u_logic|Zdhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zdhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kaf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~113_sumout ;
+wire \soc_inst|m0_1|u_logic|Y92wx4~combout ;
+wire \soc_inst|m0_1|u_logic|K8ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B6j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bf9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pgf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Eif3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M4j2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uuf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qrf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ftf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tjf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ilf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bc82z4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~125_sumout ;
+wire \soc_inst|m0_1|u_logic|D6cwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Va3wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fa2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ldf3z4~q ;
-wire \soc_inst|m0_1|u_logic|I852z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|R6cwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Fpi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ilf3z4~q ;
-wire \soc_inst|m0_1|u_logic|R6cwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R6cwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|P852z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|W852z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|S652z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|G752z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|R6cwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|M352z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ldf3z4~q ;
+wire \soc_inst|m0_1|u_logic|I852z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|T352z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|C552z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qrf3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|M352z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tjf3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|O452z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|R6cwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mof3z4~q ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fpi2z4~q ;
+wire \soc_inst|m0_1|u_logic|R6cwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|R6cwx4~5_combout ;
 wire \soc_inst|ram_1|data_to_memory[23]~0_combout ;
 wire \soc_inst|m0_1|u_logic|V4ovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jca3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jca3z4~q ;
-wire \soc_inst|m0_1|u_logic|Vfd3z4~q ;
-wire \soc_inst|m0_1|u_logic|Z4l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|R6xwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|R6xwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|R6xwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Walwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Walwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C3w2z4~q ;
-wire \soc_inst|m0_1|u_logic|Omyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Omyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L6nwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wjyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Amyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Amyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Amyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ykyvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|W4zvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|W4zvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z4qvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Z4qvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Eol2z4~q ;
-wire \soc_inst|m0_1|u_logic|Gf63z4~q ;
-wire \soc_inst|m0_1|u_logic|Bywwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gjt2z4~q ;
-wire \soc_inst|m0_1|u_logic|Po73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bywwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bywwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bywwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Bywwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Fkdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nodwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ihlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ihlwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ihlwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ihlwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Qfzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qfzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Aihvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~21_sumout ;
-wire \soc_inst|m0_1|u_logic|Xsx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Aihvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Aihvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add3~17_sumout ;
-wire \soc_inst|m0_1|u_logic|Vezvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Galvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hak2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wnh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Rd53z4~q ;
-wire \soc_inst|m0_1|u_logic|I443z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fm72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hmh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Co72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zu23z4~q ;
-wire \soc_inst|m0_1|u_logic|Ql13z4~q ;
-wire \soc_inst|m0_1|u_logic|Fm72z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Djh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Skh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Fm72z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Fm72z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Lsnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hrcvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add5~90 ;
-wire \soc_inst|m0_1|u_logic|Add5~85_sumout ;
-wire \soc_inst|m0_1|u_logic|C3qvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zu33z4~q ;
-wire \soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hc13z4~q ;
-wire \soc_inst|m0_1|u_logic|Vhk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I453z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|I453z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ql23z4~q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Nf03z4~q ;
-wire \soc_inst|m0_1|u_logic|Tiz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Rek2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Izpvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Whh2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~86 ;
-wire \soc_inst|m0_1|u_logic|Add5~117_sumout ;
-wire \soc_inst|m0_1|u_logic|Mdzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fdzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kt23z4~q ;
-wire \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ymo2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Uyu2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Fio2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Rtpvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Et7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mj7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|It63z4~q ;
-wire \soc_inst|m0_1|u_logic|Qowwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qowwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qowwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ok7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jl7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mj7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nu7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dtpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Dtpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~78 ;
-wire \soc_inst|m0_1|u_logic|Add5~129_sumout ;
-wire \soc_inst|m0_1|u_logic|Dtpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zei2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zei2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qynvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qynvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vxnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~134_cout ;
-wire \soc_inst|m0_1|u_logic|Add5~30 ;
-wire \soc_inst|m0_1|u_logic|Add5~93_sumout ;
-wire \soc_inst|m0_1|u_logic|Qppvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qppvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Dq73z4~q ;
-wire \soc_inst|m0_1|u_logic|Ruj2z4~q ;
-wire \soc_inst|m0_1|u_logic|V7ywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fwj2z4~q ;
-wire \soc_inst|m0_1|u_logic|V7ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V7ywx4~combout ;
-wire \soc_inst|m0_1|u_logic|A7ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zetwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Mouwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o~12_combout ;
-wire \soc_inst|ram_1|data_to_memory[29]~22_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[13]~21_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ;
-wire \soc_inst|m0_1|u_logic|Hxmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hxmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mb1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mb1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~109_sumout ;
-wire \soc_inst|m0_1|u_logic|Nehvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nehvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tme3z4~q ;
-wire \soc_inst|m0_1|u_logic|A9jvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Slr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ww92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U5q2z4~q ;
-wire \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|O723z4~q ;
-wire \soc_inst|m0_1|u_logic|Ww92z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ty92z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ww92z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ww92z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|C61wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~61_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~101_sumout ;
-wire \soc_inst|m0_1|u_logic|Xjhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xjhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rix2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~97_sumout ;
-wire \soc_inst|m0_1|u_logic|haddr_o~4_combout ;
-wire \soc_inst|m0_1|u_logic|Pdjvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J7q2z4~q ;
-wire \soc_inst|m0_1|u_logic|Du9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E153z4~q ;
-wire \soc_inst|m0_1|u_logic|Du9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Euh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Aw9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Arh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Lph3z4~q ;
-wire \soc_inst|m0_1|u_logic|Du9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Du9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|P82wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N72wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q52wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q52wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Na63z4~q ;
-wire \soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|T04xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Z62wx4~combout ;
-wire \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ;
-wire \soc_inst|m0_1|u_logic|Usl2z4~q ;
-wire \soc_inst|m0_1|u_logic|T7d3z4~q ;
-wire \soc_inst|m0_1|u_logic|Lul2z4~q ;
-wire \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Wjxwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wjxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wjxwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Wjxwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Wjxwx4~4_combout ;
-wire \soc_inst|ram_1|data_to_memory[15]~2_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ;
-wire \soc_inst|ram_1|data_to_memory[31]~1_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[15]~4_combout ;
-wire \soc_inst|m0_1|u_logic|U9lwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N4rvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U9lwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|X553z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wd13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ht5wx4~0_combout ;
+wire \soc_inst|ram_1|data_to_memory[7]~4_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ;
+wire \soc_inst|ram_1|data_to_memory[23]~3_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ;
+wire \SW[7]~input_o ;
+wire \soc_inst|switches_1|switch_store[0][7]~q ;
+wire \soc_inst|interconnect_1|HRDATA[7]~11_combout ;
+wire \soc_inst|m0_1|u_logic|Bmb3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nfb3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wywwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|G9lwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|R5zvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|R5zvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|J3qvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Cgt2z4~q ;
 wire \soc_inst|m0_1|u_logic|N3ywx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|N3ywx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|N3ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N3ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|N3ywx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|N3ywx4~combout ;
 wire \soc_inst|m0_1|u_logic|U2ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ttwwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B8nwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B8nwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vq1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vq1wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vq1wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Add2~45_sumout ;
-wire \soc_inst|m0_1|u_logic|V4d3z4~q ;
-wire \soc_inst|m0_1|u_logic|Bfhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Dmivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dmivx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G1s2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ql33z4~q ;
-wire \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uga2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ria2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uga2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B613z4~q ;
-wire \soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uga2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Uga2z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~37_sumout ;
-wire \soc_inst|m0_1|u_logic|Jxovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Qknvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ffs2z4~q ;
-wire \soc_inst|m0_1|u_logic|B2uvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wfuwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Geuwx4~0_combout ;
-wire \soc_inst|interconnect_1|HRDATA[13]~27_combout ;
-wire \soc_inst|m0_1|u_logic|Twmwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Twmwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Twmwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Vcuvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vcuvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wamvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rryvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Upyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R3mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pet2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nen2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nen2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|C1zvx4~combout ;
-wire \soc_inst|m0_1|u_logic|M1j2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M1j2z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|M1j2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fzyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H0zvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cuyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yyyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Cuyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cuyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cuyvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|M1j2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|G02wx4~combout ;
-wire \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|D7bwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|D7bwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D7bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A9bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D7bwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O2bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I30wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I30wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U0vvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U0vvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U0vvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|I30wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hbv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Fzxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fzxwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fzxwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wxxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y9nwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pwdwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Glnwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K22wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|K22wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zz1wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hq33z4~q ;
-wire \soc_inst|m0_1|u_logic|Kc03z4~q ;
-wire \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|P12wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|P12wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|P12wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|E913z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|P12wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|P12wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qz43z4~q ;
-wire \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|P12wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ii73z4~q ;
-wire \soc_inst|m0_1|u_logic|Qwr2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|P12wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|P12wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|P12wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Lk9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~41_sumout ;
-wire \soc_inst|m0_1|u_logic|Skhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Skhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ohivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Szr2z4~q ;
-wire \soc_inst|m0_1|u_logic|E913z4~q ;
-wire \soc_inst|m0_1|u_logic|Kn9wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Yg23z4~q ;
-wire \soc_inst|m0_1|u_logic|Kn9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Eyr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z863z4~q ;
-wire \soc_inst|m0_1|u_logic|Kn9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qwr2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hp9wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kn9wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|F32wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~45_sumout ;
-wire \soc_inst|m0_1|u_logic|Z6ovx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[6]~6_combout ;
-wire \soc_inst|ram_1|data_to_memory[17]~10_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[9]~9_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ;
-wire \soc_inst|m0_1|u_logic|Jqhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bpsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mfw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pqrvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S7nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S7nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rxl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Celwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Celwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fbfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Herwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Herwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Vb2wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vb2wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Meyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Lq03z4~q ;
-wire \soc_inst|m0_1|u_logic|Rtz2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Rtz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qp62z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Yr13z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Yr13z4~q ;
-wire \soc_inst|m0_1|u_logic|H133z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|H133z4~q ;
-wire \soc_inst|m0_1|u_logic|Qp62z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ytm2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Nr62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qa43z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Qa43z4~q ;
-wire \soc_inst|m0_1|u_logic|Qp62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qp62z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Euzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qtzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oszvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zuzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zuzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oszvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mvm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ytm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zj53z4~q ;
-wire \soc_inst|m0_1|u_logic|Uvzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Uvzvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Uvzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uvzvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Uz9wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~37_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~38 ;
-wire \soc_inst|m0_1|u_logic|Add2~57_sumout ;
-wire \soc_inst|m0_1|u_logic|Glhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Glhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nbx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~58 ;
-wire \soc_inst|m0_1|u_logic|Add2~53_sumout ;
-wire \soc_inst|m0_1|u_logic|Zkhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Zkhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ycx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add3~49_sumout ;
-wire \soc_inst|m0_1|u_logic|S4qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|M7qwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pgfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pgfwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ppzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ppzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oihvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~77_sumout ;
+wire \soc_inst|m0_1|u_logic|Oihvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oihvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add3~73_sumout ;
+wire \soc_inst|m0_1|u_logic|Rnovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~93_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~3_combout ;
+wire \soc_inst|m0_1|u_logic|hsize_o~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Nlovx4~7_combout ;
 wire \soc_inst|m0_1|u_logic|Elnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|J6i2z4~q ;
-wire \soc_inst|m0_1|u_logic|D9ovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Iuuvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K1ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N7c3z4~q ;
-wire \soc_inst|m0_1|u_logic|Jjuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wvzwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G2zwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|N1uvx4~combout ;
+wire \soc_inst|m0_1|u_logic|S9ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S9ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S9ywx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Otxwx4~0_combout ;
+wire \soc_inst|ram_1|data_to_memory[31]~1_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[15]~2_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ;
+wire \soc_inst|interconnect_1|HRDATA[31]~2_combout ;
+wire \soc_inst|m0_1|u_logic|Palwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U72wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~97_sumout ;
+wire \soc_inst|m0_1|u_logic|Sdhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Sdhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Sdhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jwf3z4~q ;
+wire \soc_inst|m0_1|u_logic|Zcivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y8q2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cao2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hs92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O403z4~q ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kq92z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|U11wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qz0wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qz0wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qz0wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rbo2z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Rbo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Z52xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J773z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W21wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|W21wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|W21wx4~combout ;
+wire \soc_inst|m0_1|u_logic|O24wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gdo2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pjyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pjyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|O3pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|O3pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ojnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F9pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F9pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ojnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ojnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z7i2z4~q ;
+wire \soc_inst|m0_1|u_logic|Iwp2z4~q ;
+wire \soc_inst|m0_1|u_logic|D4mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D4mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D4mvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Cy33z4~q ;
+wire \soc_inst|m0_1|u_logic|L753z4~q ;
+wire \soc_inst|m0_1|u_logic|Punvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kf13z4~q ;
+wire \soc_inst|m0_1|u_logic|To23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Punvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wlz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qi03z4~q ;
+wire \soc_inst|m0_1|u_logic|Punvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Punvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Punvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Lz8wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qppvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C2rvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C2rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C2rvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qppvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dtj2z4~q ;
+wire \soc_inst|m0_1|u_logic|V7ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dq73z4~q ;
+wire \soc_inst|m0_1|u_logic|V7ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V7ywx4~combout ;
+wire \soc_inst|m0_1|u_logic|A7ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mzxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vy7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pwdwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Glnwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lkhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lkhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ufx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hvivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rkd3z4~q ;
+wire \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rds2z4~q ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B613z4~q ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ria2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uga2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Jxovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[8]~8_combout ;
+wire \soc_inst|ram_1|data_to_memory[20]~16_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[4]~23_combout ;
 wire \soc_inst|m0_1|u_logic|W5rvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Jvqvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Fbnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Owq2z4~q ;
 wire \soc_inst|m0_1|u_logic|Leuvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Leuvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Pamvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bjkvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bjkvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ovc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Qnkvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qnkvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Efp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wmp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|V233z4~q ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zr03z4~q ;
+wire \soc_inst|m0_1|u_logic|Fvz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ec43z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Ec43z4~q ;
+wire \soc_inst|m0_1|u_logic|Nl53z4~q ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ilp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ny62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qw62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I7r2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z472z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nt03z4~q ;
+wire \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|C372z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|J433z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Av13z4~q ;
+wire \soc_inst|m0_1|u_logic|C372z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bn53z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Bn53z4~q ;
+wire \soc_inst|m0_1|u_logic|Sd43z4~q ;
+wire \soc_inst|m0_1|u_logic|C372z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C372z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~34 ;
+wire \soc_inst|m0_1|u_logic|Add5~98 ;
+wire \soc_inst|m0_1|u_logic|Add5~110 ;
+wire \soc_inst|m0_1|u_logic|Add5~37_sumout ;
+wire \soc_inst|m0_1|u_logic|Zuzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zuzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~38 ;
+wire \soc_inst|m0_1|u_logic|Add2~57_sumout ;
+wire \soc_inst|m0_1|u_logic|Glhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Glhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add2~58 ;
+wire \soc_inst|m0_1|u_logic|Add2~54 ;
+wire \soc_inst|m0_1|u_logic|Add2~50 ;
+wire \soc_inst|m0_1|u_logic|Add2~45_sumout ;
+wire \soc_inst|m0_1|u_logic|Bfhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V4d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~41_sumout ;
+wire \soc_inst|m0_1|u_logic|Xxovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[7]~7_combout ;
+wire \soc_inst|ram_1|data_to_memory[21]~24_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ;
+wire \soc_inst|interconnect_1|HRDATA[21]~29_combout ;
+wire \soc_inst|m0_1|u_logic|Q6nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hphvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qlw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Q6nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q6nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Herwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Herwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mvc2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Kuc2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Eb72z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H972z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H972z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H972z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H972z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|A67wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~18 ;
+wire \soc_inst|m0_1|u_logic|Add3~14 ;
+wire \soc_inst|m0_1|u_logic|Add3~10 ;
+wire \soc_inst|m0_1|u_logic|Add3~6 ;
+wire \soc_inst|m0_1|u_logic|Add3~1_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~0_combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Nmnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mjl2z4~q ;
+wire \soc_inst|m0_1|u_logic|B7owx4~combout ;
+wire \soc_inst|m0_1|u_logic|U9lwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D4a3z4~q ;
+wire \soc_inst|m0_1|u_logic|Wjxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lul2z4~q ;
+wire \soc_inst|m0_1|u_logic|Wjxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wjxwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wjxwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Wjxwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|U9lwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ttwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B8nwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B8nwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~49_sumout ;
+wire \soc_inst|m0_1|u_logic|Skhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Skhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jex2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~45_sumout ;
+wire \soc_inst|m0_1|u_logic|Z6ovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[6]~6_combout ;
+wire \soc_inst|ram_1|data_to_memory[19]~18_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ;
+wire \soc_inst|interconnect_1|HRDATA[19]~25_combout ;
+wire \soc_inst|m0_1|u_logic|Vphvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oiw2z4~q ;
+wire \soc_inst|m0_1|u_logic|E7nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E7nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E7nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H0dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O0dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xucwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~97_sumout ;
 wire \soc_inst|m0_1|u_logic|J00wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gpcwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Gpcwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|J00wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|C00wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bn53z4~q ;
 wire \soc_inst|m0_1|u_logic|U5r2z4~q ;
 wire \soc_inst|m0_1|u_logic|Twz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|J433z4~q ;
-wire \soc_inst|m0_1|u_logic|Av13z4~q ;
-wire \soc_inst|m0_1|u_logic|Nt03z4~q ;
-wire \soc_inst|m0_1|u_logic|Bjkvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bjkvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ovc3z4~q ;
+wire \soc_inst|m0_1|u_logic|Av13z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Am5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|I7r2z4~q ;
-wire \soc_inst|m0_1|u_logic|Sd43z4~q ;
+wire \soc_inst|m0_1|u_logic|Sd43z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Am5wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Am5wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Am5wx4~1_combout ;
 wire \soc_inst|ram_1|data_to_memory[4]~15_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[4]~23_combout ;
-wire \soc_inst|m0_1|u_logic|Pxrvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xly2z4~q ;
-wire \soc_inst|m0_1|u_logic|X6nvx4~0_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ;
 wire \soc_inst|m0_1|u_logic|Ophvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ckw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pxrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X6nvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|X6nvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tecwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Afcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ydcwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~109_sumout ;
-wire \soc_inst|m0_1|u_logic|Add3~33_sumout ;
-wire \soc_inst|m0_1|u_logic|Rxzvx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[3]~3_combout ;
-wire \soc_inst|ram_1|data_to_memory[25]~11_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ;
-wire \soc_inst|interconnect_1|HRDATA[25]~18_combout ;
-wire \soc_inst|m0_1|u_logic|Pty2z4~q ;
-wire \soc_inst|m0_1|u_logic|O5nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fohvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Urw2z4~q ;
-wire \soc_inst|m0_1|u_logic|O5nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|O5nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|G27wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X3xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X3xvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U9swx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S8swx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G27wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bkxvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bkxvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bkxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bkxvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Rfpvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gxxvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ljpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jipvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hhpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mnpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Kfpvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Qzq2z4~q ;
 wire \soc_inst|m0_1|u_logic|Hnbwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Z4bwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Hnbwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ffbwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Add5~101_sumout ;
-wire \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add2~25_sumout ;
-wire \soc_inst|m0_1|u_logic|Imhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Imhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add3~29_sumout ;
-wire \soc_inst|m0_1|u_logic|Ekovx4~combout ;
-wire \soc_inst|ram_1|memory.raddr_a[1]~1_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ;
-wire \soc_inst|interconnect_1|HRDATA[1]~21_combout ;
-wire \soc_inst|m0_1|u_logic|Hcnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dwl2z4~q ;
-wire \soc_inst|m0_1|u_logic|Fmqvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|A1yvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mnpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fmqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rmpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rmpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yplwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vopvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ljpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jvxvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Vnqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xipvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Onqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hhpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fmqvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Fmqvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Fzl2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Mmxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sbxvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Sbxvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Mbnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gtp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Gokwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sbxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gqxvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Y7xvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Hnxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sbxvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Uup2z4~q ;
-wire \soc_inst|m0_1|u_logic|S4bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q3bwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~33_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~26 ;
-wire \soc_inst|m0_1|u_logic|Add2~17_sumout ;
-wire \soc_inst|m0_1|u_logic|Bmhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bmhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G7x2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mekvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mekvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|C372z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C372z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|C372z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z472z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C372z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add5~97_sumout ;
-wire \soc_inst|m0_1|u_logic|Add2~18 ;
-wire \soc_inst|m0_1|u_logic|Add2~33_sumout ;
-wire \soc_inst|m0_1|u_logic|Ulhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ulhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|R8x2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add2~34 ;
-wire \soc_inst|m0_1|u_logic|Add2~37_sumout ;
-wire \soc_inst|m0_1|u_logic|Nlhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nlhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Qnkvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qnkvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Efp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ilp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ny62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V233z4~q ;
-wire \soc_inst|m0_1|u_logic|Qw62z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ec43z4~q ;
-wire \soc_inst|m0_1|u_logic|Qw62z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qw62z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qw62z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wccwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yxzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ujp2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Ujp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wu63z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Wu63z4~q ;
-wire \soc_inst|m0_1|u_logic|Qxuwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gip2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Gip2z4~q ;
-wire \soc_inst|m0_1|u_logic|F8v2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qxuwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|W893z4~q ;
-wire \soc_inst|m0_1|u_logic|Sgp2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qxuwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wyt2z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|Wyt2z4~q ;
-wire \soc_inst|m0_1|u_logic|F483z4~feeder_combout ;
-wire \soc_inst|m0_1|u_logic|F483z4~q ;
-wire \soc_inst|m0_1|u_logic|Qxuwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qxuwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Rw7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fkdwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Q6twx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q6twx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rhfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rhfwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rhfwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ppzvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ppzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oihvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~77_sumout ;
-wire \soc_inst|m0_1|u_logic|Zpx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Oihvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oihvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add3~73_sumout ;
-wire \soc_inst|m0_1|u_logic|Rnovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nlovx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Jknvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lz93z4~q ;
-wire \soc_inst|m0_1|u_logic|N1uvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Azs2z4~q ;
-wire \soc_inst|m0_1|u_logic|S9ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S9ywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|S9ywx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Otxwx4~0_combout ;
-wire \soc_inst|interconnect_1|HRDATA[31]~2_combout ;
-wire \soc_inst|m0_1|u_logic|Palwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Zluvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Zluvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Zluvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U9mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pguvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y1ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|I90xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I90xx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|R4zwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I6pwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kzqvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kzqvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kzqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C9rvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|C9rvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C9rvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|C9rvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C9rvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cr1wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Gf73z4~q ;
+wire \soc_inst|m0_1|u_logic|Q1ywx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q1ywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q1ywx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tzxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y9nwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kkyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Zkhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zkhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ycx2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~49_sumout ;
+wire \soc_inst|m0_1|u_logic|S4qvx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[5]~5_combout ;
+wire \soc_inst|ram_1|data_to_memory[18]~6_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[10]~5_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ;
+wire \soc_inst|interconnect_1|HRDATA[18]~13_combout ;
+wire \soc_inst|m0_1|u_logic|Cqhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ahw2z4~q ;
+wire \soc_inst|m0_1|u_logic|L7nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|L7nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L7nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Viy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I6xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z4xvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rryvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Upyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R3mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pet2z4~q ;
+wire \soc_inst|m0_1|u_logic|Nen2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nen2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Nen2z4~q ;
+wire \soc_inst|m0_1|u_logic|C1zvx4~combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cuyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yyyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cuyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Cuyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cuyvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|M1j2z4~q ;
+wire \soc_inst|m0_1|u_logic|C51xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ytm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mvm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Zj53z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Rtz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qa43z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Qa43z4~q ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yr13z4~q ;
+wire \soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Lq03z4~q ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uvzvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Uz9wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uz9wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qtzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oszvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oszvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R6v2z4~q ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Svqwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zj53z4~q ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nr62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H133z4~q ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qp62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Euzvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~53_sumout ;
+wire \soc_inst|m0_1|u_logic|Hszvx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[4]~4_combout ;
+wire \soc_inst|ram_1|data_to_memory[22]~31_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[6]~32_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ;
+wire \soc_inst|interconnect_1|HRDATA[22]~35_combout ;
 wire \soc_inst|m0_1|u_logic|Edovx4~combout ;
 wire \soc_inst|m0_1|u_logic|Add1~34_cout ;
 wire \soc_inst|m0_1|u_logic|Add1~5_sumout ;
-wire \soc_inst|m0_1|u_logic|Ranvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I3y2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add1~6 ;
-wire \soc_inst|m0_1|u_logic|Add1~9_sumout ;
-wire \soc_inst|m0_1|u_logic|Kanvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W4y2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add1~10 ;
-wire \soc_inst|m0_1|u_logic|Add1~21_sumout ;
-wire \soc_inst|m0_1|u_logic|Danvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K6y2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add1~22 ;
-wire \soc_inst|m0_1|u_logic|Add1~25_sumout ;
-wire \soc_inst|m0_1|u_logic|W9nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Y7y2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add1~26 ;
-wire \soc_inst|m0_1|u_logic|Add1~29_sumout ;
-wire \soc_inst|m0_1|u_logic|M9y2z4~q ;
-wire \soc_inst|m0_1|u_logic|P9nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add1~30 ;
-wire \soc_inst|m0_1|u_logic|Add1~13_sumout ;
-wire \soc_inst|m0_1|u_logic|I9nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bby2z4~q ;
-wire \soc_inst|m0_1|u_logic|Add1~14 ;
-wire \soc_inst|m0_1|u_logic|Add1~1_sumout ;
-wire \soc_inst|m0_1|u_logic|B9nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qcy2z4~q ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lbn2z4~q ;
+wire \soc_inst|m0_1|u_logic|C9rvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ranvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Aphvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Enw2z4~q ;
+wire \soc_inst|m0_1|u_logic|J6nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J6nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J6nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Kxkwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tykwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tykwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kxkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kxkwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Svk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Mt13z4~q ;
+wire \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Fvz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~2_combout ;
+wire \soc_inst|ram_1|data_to_memory[5]~23_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[5]~28_combout ;
+wire \soc_inst|m0_1|u_logic|Yanvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F0y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Gvrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ctrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ctrwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kghvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Tecwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Afcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ydcwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~109_sumout ;
+wire \soc_inst|m0_1|u_logic|Add3~33_sumout ;
+wire \soc_inst|m0_1|u_logic|Rxzvx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[3]~3_combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~12_combout ;
+wire \soc_inst|ram_1|data_to_memory[29]~22_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[13]~21_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ;
+wire \soc_inst|m0_1|u_logic|Ajnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Add1~2 ;
 wire \soc_inst|m0_1|u_logic|Add1~17_sumout ;
 wire \soc_inst|m0_1|u_logic|U8nvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Bdm2z4~q ;
-wire \soc_inst|m0_1|u_logic|Oylwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oylwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|By4wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Y6t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dnhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Byw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ajnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ajnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qem2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ahwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ohwvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Oowvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ejwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Blwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R8wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R8wvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K8wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vhwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vhwvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K8wvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K8wvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|F9wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|P3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Auk2z4~q ;
+wire \soc_inst|m0_1|u_logic|E4xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wlwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wlwvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C3z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Emewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wvswx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fjswx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fjswx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T1d3z4~q ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Gip2z4~q ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Eo5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ylwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ylwwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ok7wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Manwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S1ewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W6iwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Bspvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bspvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~13_sumout ;
+wire \soc_inst|m0_1|u_logic|Mhhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mhhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add3~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Va62z4~combout ;
+wire \soc_inst|m0_1|u_logic|H362z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ;
+wire \soc_inst|switches_1|half_word_address~1_combout ;
+wire \soc_inst|switches_1|half_word_address~2_combout ;
+wire \soc_inst|interconnect_1|HRDATA[1]~19_combout ;
+wire \soc_inst|switches_1|DataValid~1_combout ;
+wire \soc_inst|switches_1|switch_store[0][0]~q ;
+wire \soc_inst|interconnect_1|HRDATA[0]~32_combout ;
+wire \soc_inst|m0_1|u_logic|Vcnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kyi2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kkyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ocnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R1w2z4~q ;
+wire \soc_inst|m0_1|u_logic|J5vvx4~combout ;
+wire \soc_inst|m0_1|u_logic|X7mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X7mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I6w2z4~q ;
+wire \soc_inst|m0_1|u_logic|F5mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|F5mvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U5x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lefwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Imhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Imhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add3~29_sumout ;
+wire \soc_inst|m0_1|u_logic|Ekovx4~combout ;
+wire \soc_inst|ram_1|memory.raddr_a[1]~1_combout ;
+wire \soc_inst|ram_1|data_to_memory[27]~19_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[3]~20_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ;
+wire \soc_inst|m0_1|u_logic|Rnhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xuw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Oesvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Dj6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vskwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H06wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ptgwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|V76wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|V76wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Wdqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yy5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xu5wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|D56wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mz5wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|G27wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|P0hwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Px5wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Uw5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mz5wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Xu5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xu5wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Xu5wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Dj6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vskwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H06wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Xu5wx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Xu5wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Wai2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tzxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vy7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S8ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H9iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bspvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bspvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~13_sumout ;
+wire \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fzxwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yb93z4~q ;
+wire \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fzxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fzxwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wxxwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vr7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R7iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R5zvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Add2~2 ;
+wire \soc_inst|m0_1|u_logic|Add2~5_sumout ;
+wire \soc_inst|m0_1|u_logic|Wthvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wthvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|J0l2z4~q ;
+wire \soc_inst|m0_1|u_logic|Omk2z4~q ;
 wire \soc_inst|m0_1|u_logic|Vvx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Mhhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mhhvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Add3~9_sumout ;
-wire \soc_inst|m0_1|u_logic|S6ovx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Va62z4~combout ;
-wire \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ;
-wire \soc_inst|m0_1|u_logic|H362z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ;
-wire \soc_inst|switches_1|half_word_address~1_combout ;
-wire \soc_inst|switches_1|half_word_address~3_combout ;
-wire \soc_inst|interconnect_1|HRDATA[24]~6_combout ;
-wire \soc_inst|interconnect_1|HRDATA[24]~17_combout ;
-wire \soc_inst|switches_1|switch_store[1][8]~q ;
-wire \soc_inst|m0_1|u_logic|Ny3wx4~1_combout ;
-wire \soc_inst|ram_1|data_to_memory[24]~26_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[16]~25_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ;
-wire \soc_inst|interconnect_1|HRDATA[24]~31_combout ;
-wire \soc_inst|m0_1|u_logic|V5nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mohvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gqw2z4~q ;
-wire \soc_inst|m0_1|u_logic|V5nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|V5nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bsy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Msyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jyb2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Scpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ipsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Scpvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rxl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pqrvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S7nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jqhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mfw2z4~q ;
+wire \soc_inst|m0_1|u_logic|S7nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Onqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fmqvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fzl2z4~q ;
+wire \soc_inst|m0_1|u_logic|U09wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add5~93_sumout ;
+wire \soc_inst|m0_1|u_logic|Fcj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Cxhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cxhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Pfovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ynhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Itw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Dcsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|W28wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ho3wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Df3wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mn3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qp3wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Df3wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Df3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Df3wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Df3wx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Df3wx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|Df3wx4~7_combout ;
 wire \soc_inst|m0_1|u_logic|Df3wx4~8_combout ;
 wire \soc_inst|m0_1|u_logic|Df3wx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|R1pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W0pvx4~combout ;
+wire \soc_inst|m0_1|u_logic|J4x2z4~q ;
 wire \soc_inst|m0_1|u_logic|K4mvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|K4mvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Jw93z4~q ;
-wire \soc_inst|m0_1|u_logic|X563z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Xhbwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Xhbwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Xhbwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Xhbwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Xhbwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Qrnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Uzvvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Fvovx4~combout ;
 wire \soc_inst|ram_1|memory.raddr_a[0]~0_combout ;
-wire \soc_inst|ram_1|data_to_memory[22]~31_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ;
-wire \soc_inst|ram_1|data_to_memory[6]~32_combout ;
-wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ;
-wire \soc_inst|interconnect_1|HRDATA[22]~35_combout ;
-wire \soc_inst|m0_1|u_logic|J6nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Aphvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Enw2z4~q ;
-wire \soc_inst|m0_1|u_logic|J6nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J6nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Zoy2z4~q ;
-wire \soc_inst|m0_1|u_logic|W7hwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iikwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~1_combout ;
+wire \soc_inst|ram_1|data_to_memory[24]~26_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ;
+wire \soc_inst|ram_1|data_to_memory[16]~25_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ;
+wire \soc_inst|switches_1|switch_store[1][8]~q ;
+wire \soc_inst|interconnect_1|HRDATA[24]~6_combout ;
+wire \soc_inst|interconnect_1|HRDATA[24]~17_combout ;
+wire \soc_inst|interconnect_1|HRDATA[24]~31_combout ;
+wire \soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Add1~6 ;
+wire \soc_inst|m0_1|u_logic|Add1~9_sumout ;
+wire \soc_inst|m0_1|u_logic|Kanvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W4y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add1~10 ;
+wire \soc_inst|m0_1|u_logic|Add1~21_sumout ;
+wire \soc_inst|m0_1|u_logic|Danvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K6y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mohvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Gqw2z4~q ;
+wire \soc_inst|m0_1|u_logic|V5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|V5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|V5nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bsy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Gpjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ua6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Na6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q86wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rqywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Vsywx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|V5mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G9w2z4~q ;
 wire \soc_inst|m0_1|u_logic|Xf6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lu6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Uv6wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Uijwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Qf6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uv6wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Q86wx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Q86wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Gpjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Og4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ua6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q86wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q86wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Q86wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Q86wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Md6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dc6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dc6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mhgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iikwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Q86wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Jm6wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Jm6wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Jm6wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ad7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Eyhvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Jm6wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Hyewx4~combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jm6wx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|P28wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ad7wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Xt6wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Q07wx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|X07wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Gci2z4~q ;
 wire \soc_inst|m0_1|u_logic|Q07wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Xt6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|P28wx4~combout ;
 wire \soc_inst|m0_1|u_logic|Jm6wx4~7_combout ;
 wire \soc_inst|m0_1|u_logic|Eyhvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ;
 wire \soc_inst|m0_1|u_logic|Bpzvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G5qvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|F9pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F9pvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|G5qvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qz33z4~q ;
-wire \soc_inst|m0_1|u_logic|Oxnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Knz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ek03z4~q ;
-wire \soc_inst|m0_1|u_logic|Oxnvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Oxnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|N5qvx4~0_combout ;
-wire \soc_inst|ram_1|byte1~0_combout ;
-wire \soc_inst|ram_1|read_cycle~DUPLICATE_q ;
-wire \soc_inst|interconnect_1|HRDATA[11]~3_combout ;
-wire \soc_inst|interconnect_1|HRDATA[10]~12_combout ;
-wire \soc_inst|m0_1|u_logic|Dvy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dcsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H5nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ynhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Itw2z4~q ;
-wire \soc_inst|m0_1|u_logic|H5nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kxkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tykwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tykwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kxkwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kxkwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|S61xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jw73z4~q ;
-wire \soc_inst|m0_1|u_logic|Art2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|I443z4~q ;
-wire \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Pdbwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ny3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Knvvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T5mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Imvvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T5mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|S4pwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X2rvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|X2rvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Tbnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lbn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Cqhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ahw2z4~q ;
-wire \soc_inst|m0_1|u_logic|L7nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L7nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L7nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Viy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ggswx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ggswx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ggswx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Yaz2z4~q ;
-wire \soc_inst|m0_1|u_logic|Htyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Htyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Htyvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Htyvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|R0t2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rexvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ppsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ppsvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Una2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Amjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C5c2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z6c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C5c2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C5c2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ppsvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ppsvx4~combout ;
-wire \soc_inst|m0_1|u_logic|S6ovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S6ovx4~1_combout ;
-wire \soc_inst|ram_1|always1~0_combout ;
-wire \soc_inst|ram_1|read_cycle~0_combout ;
-wire \soc_inst|ram_1|read_cycle~q ;
-wire \soc_inst|interconnect_1|HRDATA[6]~10_combout ;
-wire \soc_inst|switches_1|switch_store[0][5]~q ;
-wire \soc_inst|interconnect_1|HRDATA[5]~28_combout ;
-wire \soc_inst|m0_1|u_logic|Yanvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F0y2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hphvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qlw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Q6nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Q6nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q6nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Gvrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ctrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ctrwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kghvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I6z2z4~q ;
-wire \soc_inst|m0_1|u_logic|Fjewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fjewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I1c2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Wpsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Scpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dks2z4~q ;
-wire \soc_inst|m0_1|u_logic|N8b2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Svs2z4~q ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Inb2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Luywx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Ypa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Poa2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ik4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bk4wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ik4wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xtywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ypa2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z5pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|It52z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ipsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|It52z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E7mwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Vaw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pfovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I30wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I30wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|X6m2z4~q ;
+wire \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Gf43z4~q ;
+wire \soc_inst|m0_1|u_logic|Po53z4~q ;
+wire \soc_inst|m0_1|u_logic|R40wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|R40wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R40wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|R40wx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ;
+wire \soc_inst|ram_1|data_to_memory[11]~17_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[11]~24_combout ;
+wire \soc_inst|m0_1|u_logic|Add1~22 ;
+wire \soc_inst|m0_1|u_logic|Add1~25_sumout ;
+wire \soc_inst|m0_1|u_logic|W9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Y7y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add1~26 ;
+wire \soc_inst|m0_1|u_logic|Add1~30 ;
+wire \soc_inst|m0_1|u_logic|Add1~13_sumout ;
+wire \soc_inst|m0_1|u_logic|I9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bby2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add1~14 ;
+wire \soc_inst|m0_1|u_logic|Add1~1_sumout ;
+wire \soc_inst|m0_1|u_logic|B9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qcy2z4~q ;
 wire \soc_inst|m0_1|u_logic|Knhvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Mww2z4~q ;
 wire \soc_inst|m0_1|u_logic|Zgsvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|T4nvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|T4nvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Hyy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ocfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rafwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rni2z4~q ;
-wire \soc_inst|m0_1|u_logic|Po83z4~q ;
-wire \soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ylbwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mhn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Psv2z4~q ;
-wire \soc_inst|m0_1|u_logic|Yfn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ylbwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ylbwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ekc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Skc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Wmc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhc2z4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Mac2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Kgc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Dcrwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Qaiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|H4nwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Add2~33_sumout ;
+wire \soc_inst|m0_1|u_logic|Ulhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ulhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R8x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add3~25_sumout ;
+wire \soc_inst|m0_1|u_logic|Yuovx4~combout ;
+wire \soc_inst|m0_1|u_logic|Jknvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wfuwx4~combout ;
+wire \soc_inst|m0_1|u_logic|hwdata_o~18_combout ;
+wire \soc_inst|m0_1|u_logic|Ynvvx4~combout ;
+wire \soc_inst|m0_1|u_logic|M5mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M5mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hzj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pwywx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6mwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Z9dwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Jk0xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aj0xx4~combout ;
+wire \soc_inst|m0_1|u_logic|Gjqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Abovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zlnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nbm2z4~q ;
+wire \soc_inst|m0_1|u_logic|Add1~29_sumout ;
+wire \soc_inst|m0_1|u_logic|P9nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|M9y2z4~q ;
+wire \soc_inst|m0_1|u_logic|Oylwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Oylwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|By4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Y6t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z6c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C5c2z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Una2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ppsvx4~combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|S6ovx4~1_combout ;
+wire \soc_inst|ram_1|always1~0_combout ;
+wire \soc_inst|ram_1|byte_select[0]~DUPLICATE_q ;
+wire \soc_inst|interconnect_1|HRDATA[1]~37_combout ;
+wire \soc_inst|interconnect_1|HRDATA[1]~20_combout ;
+wire \soc_inst|switches_1|DataValid~0_combout ;
+wire \soc_inst|switches_1|switch_store[0][1]~q ;
+wire \soc_inst|ram_1|data_to_memory[1]~12_combout ;
+wire \soc_inst|ram_1|data_to_memory[25]~11_combout ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ;
+wire \soc_inst|interconnect_1|HRDATA[1]~21_combout ;
+wire \soc_inst|m0_1|u_logic|Hcnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dwl2z4~q ;
+wire \soc_inst|m0_1|u_logic|Acnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G0w2z4~q ;
+wire \soc_inst|m0_1|u_logic|Qnyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vllvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vllvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U4z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Htyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Htyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|To23z4~q ;
+wire \soc_inst|m0_1|u_logic|Htyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Htyvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|R0t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Rexvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qx52z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~4_combout ;
+wire \soc_inst|m0_1|u_logic|Sy52z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z0mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~2_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~3_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~5_combout ;
+wire \soc_inst|m0_1|u_logic|U5qvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wxp2z4~q ;
+wire \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|G5qvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|G5qvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Knz2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ek03z4~q ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qz33z4~q ;
+wire \soc_inst|m0_1|u_logic|Z853z4~q ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hq23z4~q ;
+wire \soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ;
+wire \soc_inst|m0_1|u_logic|Yg13z4~q ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|N5qvx4~0_combout ;
+wire \soc_inst|ram_1|byte1~0_combout ;
+wire \soc_inst|ram_1|read_cycle~DUPLICATE_q ;
+wire \soc_inst|interconnect_1|HRDATA[11]~3_combout ;
+wire \soc_inst|interconnect_1|HRDATA[15]~4_combout ;
+wire \soc_inst|m0_1|u_logic|Hjnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pmhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|F1x2z4~q ;
+wire \soc_inst|m0_1|u_logic|G8nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ufy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Hjnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hjnvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U2x2z4~q ;
+wire \soc_inst|m0_1|u_logic|Srgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fzyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X3xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X3xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pa7wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q3xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q3xvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|U6wvx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Ndwvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|K1z2z4~q ;
+wire \soc_inst|m0_1|u_logic|E4xvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Jeewx4~combout ;
+wire \soc_inst|m0_1|u_logic|Zmlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hklwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Bthvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cyq2z4~q ;
 wire \soc_inst|m0_1|u_logic|Vff2z4~combout ;
 wire \soc_inst|m0_1|u_logic|Aeg2z4~combout ;
 wire \soc_inst|m0_1|u_logic|Tdg2z4~combout ;
+wire \soc_inst|m0_1|u_logic|Jhe2z4~combout ;
 wire \soc_inst|m0_1|u_logic|Qhe2z4~combout ;
 wire \soc_inst|m0_1|u_logic|Hhd2z4~combout ;
-wire \soc_inst|m0_1|u_logic|Jhe2z4~combout ;
 wire \soc_inst|m0_1|u_logic|Ohd2z4~combout ;
 wire \soc_inst|m0_1|u_logic|Mgd2z4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Cgf2z4~combout ;
 wire \soc_inst|m0_1|u_logic|Mgd2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gzvvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Gzvvx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|O092z4~0_combout ;
 wire \soc_inst|m0_1|u_logic|T50wx4~0_combout ;
 wire \soc_inst|switches_1|half_word_address~0_combout ;
 wire \soc_inst|ram_1|byte2~0_combout ;
+wire \soc_inst|ram_1|byte_select[2]~DUPLICATE_q ;
 wire \soc_inst|interconnect_1|HRDATA[16]~7_combout ;
-wire \soc_inst|switches_1|switch_store[1][0]~q ;
-wire \soc_inst|interconnect_1|HRDATA[16]~30_combout ;
-wire \soc_inst|m0_1|u_logic|Yzi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qdnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qqhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ydw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qdnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qdnvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Kfpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kfpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Kfpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Kfpvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Kfpvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Jipvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kfpvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|W4ywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mzxwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kkyvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C2rvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C2rvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C2rvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Cxhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cxhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fcj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qbpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wmhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qzw2z4~q ;
-wire \soc_inst|m0_1|u_logic|M4nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|N8nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fey2z4~q ;
-wire \soc_inst|m0_1|u_logic|M4nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|M4nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|H9i2z4~q ;
-wire \soc_inst|m0_1|u_logic|C2yvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Z5pvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z5pvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|It52z4~2_combout ;
-wire \soc_inst|ram_1|byte3~0_combout ;
-wire \soc_inst|ram_1|byte_select[3]~DUPLICATE_q ;
-wire \soc_inst|interconnect_1|HRDATA[26]~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dnhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Byw2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ajnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ajnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ajnvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qem2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qllwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pa7wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q3xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q3xvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Qllwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Qllwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Qllwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Jeewx4~combout ;
-wire \soc_inst|m0_1|u_logic|Zmlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hklwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hklwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Hklwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Hklwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Bthvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cyq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Emewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wvswx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fjswx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fjswx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|T1d3z4~q ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Eo5wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ylwwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ylwwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ok7wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Manwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|S1ewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|W6iwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Wzpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Wzpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~9_sumout ;
-wire \soc_inst|m0_1|u_logic|Thhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Thhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Thhvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Jux2z4~q ;
-wire \soc_inst|m0_1|u_logic|Khnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Khnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ohh3z4~q ;
-wire \soc_inst|m0_1|u_logic|Qh72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I453z4~q ;
-wire \soc_inst|m0_1|u_logic|Tf72z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Aez2z4~q ;
-wire \soc_inst|m0_1|u_logic|Tf72z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Tf72z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Tf72z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Esnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~13_sumout ;
-wire \soc_inst|m0_1|u_logic|V2qvx4~combout ;
-wire \soc_inst|interconnect_1|LessThan1~0_combout ;
-wire \soc_inst|interconnect_1|Equal1~0_combout ;
-wire \soc_inst|switches_1|switch_store[0][3]~q ;
-wire \soc_inst|interconnect_1|HRDATA[3]~26_combout ;
-wire \soc_inst|m0_1|u_logic|E7nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vphvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Oiw2z4~q ;
-wire \soc_inst|m0_1|u_logic|E7nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E7nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Jky2z4~q ;
-wire \soc_inst|m0_1|u_logic|Gxxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Irxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zpxvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|I6xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qzq2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z4xvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Z4xvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z4xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z4xvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Zcn2z4~q ;
-wire \soc_inst|m0_1|u_logic|Z9dwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Jk0xx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Aj0xx4~combout ;
-wire \soc_inst|m0_1|u_logic|Gjqvx4~0_combout ;
+wire \soc_inst|switches_1|switch_store[1][7]~q ;
+wire \soc_inst|interconnect_1|HRDATA[23]~8_combout ;
+wire \soc_inst|m0_1|u_logic|Tohvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sow2z4~q ;
+wire \soc_inst|m0_1|u_logic|C6nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C6nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|C6nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Nqy2z4~q ;
+wire \soc_inst|m0_1|u_logic|Z5wvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W3mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|W3mvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|I2t2z4~q ;
+wire \soc_inst|m0_1|u_logic|V8yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D6yvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|D6yvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|D6yvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|L61xx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zhyvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zhyvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Zhyvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Zhyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ujqvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Xdnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Thm2z4~q ;
 wire \soc_inst|m0_1|u_logic|C34wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C34wx4~combout ;
-wire \soc_inst|m0_1|u_logic|I0hwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I0hwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zygwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tvgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tvgwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hvhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P0hwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kugwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Togwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Togwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Togwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Togwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ekgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Poa2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~14_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~13_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~15_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~16_combout ;
-wire \soc_inst|m0_1|u_logic|Itgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|P0hwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~10_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~11_combout ;
-wire \soc_inst|m0_1|u_logic|Ugewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~18_combout ;
-wire \soc_inst|m0_1|u_logic|Hahwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Thgwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhgwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|P0hwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bhewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Ahhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~12_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~17_combout ;
-wire \soc_inst|m0_1|u_logic|Bfgwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Sgj2z4~q ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|S4w2z4~q ;
-wire \soc_inst|m0_1|u_logic|Zdc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhc2z4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Mhc2z4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Wmc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhc2z4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Skc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ekc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mhc2z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Kgc2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Mac2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Dcrwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Yghvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tyx2z4~q ;
-wire \soc_inst|m0_1|u_logic|Scpvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Scpvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Vapvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Hjnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G8nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ufy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pmhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|F1x2z4~q ;
-wire \soc_inst|m0_1|u_logic|Hjnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hjnvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U2x2z4~q ;
-wire \soc_inst|m0_1|u_logic|Wpkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Akewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Yiewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lgkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Unewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Unewx4~combout ;
-wire \soc_inst|m0_1|u_logic|Sfewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sfewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fcewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fcewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ws3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H3ivx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H3ivx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|H3ivx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Si4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pd4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pd4wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pd4wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Q5vvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Gxk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~9_combout ;
-wire \soc_inst|m0_1|u_logic|Ny3wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Ny3wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ny3wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Ny3wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~10_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~11_combout ;
-wire \soc_inst|m0_1|u_logic|Av3wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|H3ivx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|H3ivx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Gji2z4~q ;
-wire \soc_inst|m0_1|u_logic|Pw6wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pw6wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|My6wx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lfewx4~combout ;
-wire \soc_inst|m0_1|u_logic|Pw6wx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Pw6wx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Pw6wx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Pw6wx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Vz6wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Pw6wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|It52z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|It52z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|E7mwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Vaw2z4~q ;
+wire \soc_inst|m0_1|u_logic|Bpsvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Xnrvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Jvqvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Jnrvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Jhy2z4~q ;
 wire \soc_inst|m0_1|u_logic|Wfovx4~combout ;
-wire \soc_inst|m0_1|u_logic|Oesvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A5nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rnhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xuw2z4~q ;
-wire \soc_inst|m0_1|u_logic|A5nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Swy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Nkpvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pyiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Pyiwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|S3jwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|X2jwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ofjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ehjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lhjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ofjwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ubjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ubjwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Eajwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q9jwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iyiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Iyiwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q2jwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|R6jwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T7jwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Q6fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q6fwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Lwiwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Fvhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Npk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Y8pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ojnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ojnvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|J4pvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|J4pvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ojnvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Rbi3z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rbi3z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rbi3z4~q ;
-wire \soc_inst|m0_1|u_logic|Ueovx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Slnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|T1y2z4~q ;
 wire \soc_inst|m0_1|u_logic|Jcw2z4~q ;
 wire \soc_inst|m0_1|u_logic|Llnvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Llnvx4~combout ;
 wire \soc_inst|m0_1|u_logic|Qdj2z4~q ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|U6wvx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|F9wvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P3mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P3mvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Auk2z4~q ;
-wire \soc_inst|m0_1|u_logic|E4xvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V8yvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D6yvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D6yvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|D6yvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ujqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vsywx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|C6mwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C6mwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|C6mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C6mwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Abovx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Vcnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Kyi2z4~q ;
-wire \soc_inst|m0_1|u_logic|Kkyvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ocnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Q7mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|U7w2z4~q ;
-wire \soc_inst|m0_1|u_logic|Rqywx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|V5mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Fkkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fkkwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pikwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Askwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ugewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Askwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mkkwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Mkkwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lgkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Unewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Unewx4~combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|My6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hekwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mkkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bbkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q8kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bhewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Aekwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|T6kwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Ruhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nsk2z4~q ;
+wire \soc_inst|m0_1|u_logic|G1mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P2mwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hwrite_o~0_combout ;
+wire \soc_inst|ram_1|write_cycle~0_combout ;
+wire \soc_inst|ram_1|write_cycle~DUPLICATE_q ;
+wire \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ;
+wire \soc_inst|interconnect_1|HRDATA[25]~18_combout ;
+wire \soc_inst|m0_1|u_logic|Fohvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Urw2z4~q ;
+wire \soc_inst|m0_1|u_logic|O5nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|O5nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O5nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pty2z4~q ;
+wire \soc_inst|m0_1|u_logic|G27wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ubjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ubjwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|S3jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|X2jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ehjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ofjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lhjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ofjwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hvhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Pyiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pyiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T7jwx4~combout ;
+wire \soc_inst|m0_1|u_logic|R6jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q6fwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Eajwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q9jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Q2jwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Iyiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Iyiwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Lwiwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Fvhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Npk2z4~q ;
+wire \soc_inst|m0_1|u_logic|Xx2wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ejhwx4~combout ;
+wire \soc_inst|m0_1|u_logic|I0hwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Tghwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ahhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fghwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Sjhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|K0iwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K0iwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Fuhwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Hohwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xphwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Rmhwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Ndhwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Fij2z4~q ;
 wire \soc_inst|m0_1|u_logic|Ivewx4~combout ;
-wire \soc_inst|m0_1|u_logic|E7fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R3fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E0fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E0fwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|E0fwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Dwewx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Dwewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Bvewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Woewx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Woewx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~5_combout ;
 wire \soc_inst|m0_1|u_logic|Woewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Woewx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Woewx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|Woewx4~7_combout ;
 wire \soc_inst|m0_1|u_logic|Woewx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Dwewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Dwewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bvewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Woewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E0fwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|R3fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E0fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|E0fwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|E7fwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Woewx4~9_combout ;
 wire \soc_inst|m0_1|u_logic|Qxhvx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Ajfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Vqfwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Infwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Lsfwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Lsfwx4~0_combout ;
@@ -4445,183 +4399,257 @@ wire \soc_inst|m0_1|u_logic|Ajfwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Zlfwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ajfwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Ajfwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ajfwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ajfwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Vqfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cyfwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B1gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K2gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|B1gwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|B1gwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|L6gwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Rvfwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L6gwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Rvfwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Rvfwx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Rvfwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|B1gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|K2gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|B1gwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|B1gwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ccgwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Y9gwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|K9gwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ccgwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|D9gwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cyfwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|E6gwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|E6gwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Rvfwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Ajfwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Ffj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Kzxvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Og4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ag4wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mtqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mtqvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Cdnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Jppvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ry5wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|hprot_o~0_combout ;
+wire \soc_inst|m0_1|u_logic|L7fwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z5d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|L5d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|P7d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|G6d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O3d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|C4d2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~13_sumout ;
+wire \soc_inst|m0_1|u_logic|V2qvx4~combout ;
+wire \soc_inst|interconnect_1|LessThan1~0_combout ;
+wire \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ;
+wire \soc_inst|interconnect_1|HRDATA[6]~10_combout ;
+wire \soc_inst|switches_1|switch_store[0][2]~q ;
+wire \soc_inst|interconnect_1|HRDATA[2]~14_combout ;
+wire \soc_inst|m0_1|u_logic|Tbnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|U9mvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ye4wx4~combout ;
+wire \soc_inst|m0_1|u_logic|S4w2z4~q ;
+wire \soc_inst|m0_1|u_logic|It52z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|I6qvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Nfnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|A4t2z4~q ;
+wire \soc_inst|m0_1|u_logic|Etlwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Xslwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ushvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Wkiwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Wkiwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Wkiwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Wkiwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Wkiwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Wkiwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Wkiwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Agiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Yeiwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Idiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ws3wx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Sbiwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Ttiwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Ttiwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Sbiwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Idiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Agiwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Yeiwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Sbiwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Sbiwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Sbiwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Hohwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sbiwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Sbiwx4~2_combout ;
 wire \soc_inst|m0_1|u_logic|Sbiwx4~6_combout ;
 wire \soc_inst|m0_1|u_logic|Mvhvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Aok2z4~q ;
-wire \soc_inst|m0_1|u_logic|Qr42z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Qr42z4~1_combout ;
-wire \soc_inst|m0_1|u_logic|I6qvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nfnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|A4t2z4~q ;
-wire \soc_inst|m0_1|u_logic|Fuhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|E6nwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R7iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|R7iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Add2~1_sumout ;
-wire \soc_inst|m0_1|u_logic|Tvhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tvhvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Tvhvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Omk2z4~q ;
-wire \soc_inst|m0_1|u_logic|Msyvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Xslwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Xslwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Xslwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Xslwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Xslwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Etlwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ushvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O5t2z4~q ;
-wire \soc_inst|m0_1|u_logic|M66wx4~combout ;
-wire \soc_inst|m0_1|u_logic|Mtqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ag4wx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mtqvx4~combout ;
-wire \soc_inst|m0_1|u_logic|Cdnvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L8t2z4~q ;
-wire \soc_inst|m0_1|u_logic|Fuhwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|K0iwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|K0iwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fuhwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Fuhwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Fuhwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Fuhwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Xphwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Rmhwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Sjhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ejhwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ndhwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Ndhwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Ndhwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Tghwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fghwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Ndhwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Ndhwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Ndhwx4~combout ;
-wire \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|R1pvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Ohh3z4~q ;
+wire \soc_inst|m0_1|u_logic|Khnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Khnvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|N662z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Cc53z4~q ;
+wire \soc_inst|m0_1|u_logic|N662z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bk13z4~q ;
+wire \soc_inst|m0_1|u_logic|N662z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ymo2z4~q ;
+wire \soc_inst|m0_1|u_logic|K862z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N662z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Xrnvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ;
+wire \soc_inst|m0_1|u_logic|Rbi3z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Rbi3z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Rbi3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ueovx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qbpvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wmhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qzw2z4~q ;
+wire \soc_inst|m0_1|u_logic|M4nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|N8nvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fey2z4~q ;
+wire \soc_inst|m0_1|u_logic|M4nvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|M4nvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H9i2z4~q ;
+wire \soc_inst|m0_1|u_logic|Ukpvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Wpkwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Itgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H3ivx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|H3ivx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|H3ivx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Ny3wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|T8f3z4~q ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Av3wx4~11_combout ;
+wire \soc_inst|m0_1|u_logic|H3ivx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|H3ivx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Gji2z4~q ;
+wire \soc_inst|m0_1|u_logic|Lfewx4~combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Sfewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sfewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Fcewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fcewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Akewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Yiewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Vz6wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Pw6wx4~combout ;
+wire \soc_inst|m0_1|u_logic|Tki2z4~q ;
+wire \soc_inst|m0_1|u_logic|Pcyvx4~combout ;
+wire \soc_inst|m0_1|u_logic|Duc2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|J5i3z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Be62z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mi13z4~q ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ec62z4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Q8zvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Add3~5_sumout ;
+wire \soc_inst|m0_1|u_logic|haddr_o~1_combout ;
+wire \soc_inst|interconnect_1|LessThan0~0_combout ;
+wire \soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ;
+wire \soc_inst|interconnect_1|HREADY~0_combout ;
+wire \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Zygwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Tvgwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|I0hwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Kugwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Togwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Poa2z4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Ekgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~14_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~13_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~15_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~16_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~5_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~6_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~7_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~8_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~9_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~10_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~11_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Thgwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Mhgwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Hahwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~18_combout ;
+wire \soc_inst|m0_1|u_logic|P0hwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~12_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~17_combout ;
+wire \soc_inst|m0_1|u_logic|Bfgwx4~combout ;
+wire \soc_inst|m0_1|u_logic|Sgj2z4~q ;
+wire \soc_inst|m0_1|u_logic|Huqvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qllwx4~4_combout ;
+wire \soc_inst|m0_1|u_logic|Wfhvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Wfhvx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Wfhvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|K9z2z4~q ;
+wire \soc_inst|m0_1|u_logic|Fjewx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Fjewx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Tsjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Krjwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Amjwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|D5kwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Amjwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|D5kwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Amjwx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Amjwx4~4_combout ;
 wire \soc_inst|m0_1|u_logic|Amjwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|Qujwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Zvjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Xujwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|E2kwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Htjwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Htjwx4~1_combout ;
 wire \soc_inst|m0_1|u_logic|Htjwx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Zvjwx4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Xujwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Htjwx4~3_combout ;
+wire \soc_inst|m0_1|u_logic|Qujwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Drjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Krjwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Tsjwx4~0_combout ;
 wire \soc_inst|m0_1|u_logic|Amjwx4~combout ;
 wire \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ;
-wire \soc_inst|m0_1|u_logic|Mrsvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|G6d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Z5d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L5d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P7d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L7fwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mrsvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Aekwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|O3d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mrsvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C4d2z4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mrsvx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|Add3~5_sumout ;
-wire \soc_inst|m0_1|u_logic|haddr_o~1_combout ;
-wire \soc_inst|interconnect_1|LessThan0~0_combout ;
-wire \soc_inst|interconnect_1|HRDATA[25]~1_combout ;
-wire \soc_inst|switches_1|switch_store[1][7]~q ;
-wire \soc_inst|interconnect_1|HRDATA[23]~8_combout ;
-wire \soc_inst|m0_1|u_logic|Tohvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Sow2z4~q ;
-wire \soc_inst|m0_1|u_logic|C6nvx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|C6nvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|C6nvx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|Nqy2z4~q ;
-wire \soc_inst|m0_1|u_logic|Askwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Pikwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Mkkwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mkkwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~7_combout ;
-wire \soc_inst|m0_1|u_logic|Askwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~8_combout ;
-wire \soc_inst|m0_1|u_logic|Fkkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Fkkwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Hekwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~2_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~3_combout ;
-wire \soc_inst|m0_1|u_logic|Bbkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~1_combout ;
-wire \soc_inst|m0_1|u_logic|Mkkwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Q8kwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~4_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~5_combout ;
-wire \soc_inst|m0_1|u_logic|T6kwx4~6_combout ;
-wire \soc_inst|m0_1|u_logic|Ruhvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nsk2z4~q ;
-wire \soc_inst|m0_1|u_logic|G1mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|P2mwx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|hwrite_o~0_combout ;
-wire \soc_inst|ram_1|write_cycle~0_combout ;
-wire \soc_inst|ram_1|write_cycle~q ;
-wire \soc_inst|interconnect_1|HREADY~0_combout ;
-wire \soc_inst|m0_1|u_logic|Nxqvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|L8mvx4~0_combout ;
-wire \soc_inst|m0_1|u_logic|Cam2z4~q ;
-wire \soc_inst|m0_1|u_logic|Ye4wx4~combout ;
-wire \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~1_combout ;
+wire \soc_inst|m0_1|u_logic|Q5c2z4~0_combout ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~2_combout ;
+wire \soc_inst|m0_1|u_logic|Z5pvx4~3_combout ;
 wire \soc_inst|m0_1|u_logic|Z5pvx4~4_combout ;
 wire \running~feeder_combout ;
 wire \running~q ;
-wire \raz_inst|Add1~37_sumout ;
 wire \raz_inst|Add0~25_sumout ;
 wire \raz_inst|Add0~26 ;
 wire \raz_inst|Add0~29_sumout ;
@@ -4635,31 +4663,45 @@ wire \raz_inst|Add0~41_sumout ;
 wire \raz_inst|Add0~42 ;
 wire \raz_inst|Add0~33_sumout ;
 wire \raz_inst|Add0~34 ;
-wire \raz_inst|Add0~17_sumout ;
 wire \raz_inst|Add0~18 ;
 wire \raz_inst|Add0~5_sumout ;
 wire \raz_inst|Add0~6 ;
+wire \raz_inst|Add0~9_sumout ;
 wire \raz_inst|Add0~10 ;
 wire \raz_inst|Add0~13_sumout ;
+wire \raz_inst|LessThan0~2_combout ;
 wire \raz_inst|Add0~14 ;
 wire \raz_inst|Add0~1_sumout ;
-wire \raz_inst|LessThan2~2_combout ;
-wire \raz_inst|LessThan2~0_combout ;
-wire \raz_inst|LessThan2~1_combout ;
-wire \raz_inst|LessThan2~3_combout ;
-wire \raz_inst|Add0~9_sumout ;
+wire \raz_inst|H_count[10]~DUPLICATE_q ;
+wire \raz_inst|LessThan0~1_combout ;
+wire \raz_inst|LessThan0~0_combout ;
+wire \raz_inst|LessThan0~3_combout ;
+wire \raz_inst|Add0~17_sumout ;
+wire \raz_inst|LessThan4~0_combout ;
+wire \raz_inst|always0~0_combout ;
+wire \raz_inst|always0~1_combout ;
+wire \raz_inst|Equal0~1_combout ;
+wire \raz_inst|Equal0~2_combout ;
+wire \raz_inst|Equal0~0_combout ;
+wire \raz_inst|Add1~37_sumout ;
+wire \raz_inst|Add1~6 ;
+wire \raz_inst|Add1~9_sumout ;
+wire \raz_inst|Equal0~3_combout ;
+wire \raz_inst|Equal0~4_combout ;
+wire \raz_inst|Add1~10 ;
+wire \raz_inst|Add1~13_sumout ;
+wire \raz_inst|Add1~14 ;
+wire \raz_inst|Add1~17_sumout ;
+wire \raz_inst|Add1~18 ;
+wire \raz_inst|Add1~21_sumout ;
 wire \raz_inst|always0~2_combout ;
 wire \raz_inst|always0~3_combout ;
 wire \raz_inst|always0~4_combout ;
-wire \raz_inst|H_count~1_combout ;
 wire \raz_inst|H_count~0_combout ;
-wire \raz_inst|LessThan6~1_combout ;
+wire \raz_inst|H_count~1_combout ;
+wire \raz_inst|LessThan4~1_combout ;
 wire \raz_inst|always0~13_combout ;
 wire \raz_inst|always0~14_combout ;
-wire \raz_inst|Equal0~1_combout ;
-wire \raz_inst|Equal0~0_combout ;
-wire \raz_inst|Equal0~3_combout ;
-wire \raz_inst|Equal0~4_combout ;
 wire \raz_inst|Add1~38 ;
 wire \raz_inst|Add1~41_sumout ;
 wire \raz_inst|Add1~42 ;
@@ -4672,51 +4714,20 @@ wire \raz_inst|Add1~34 ;
 wire \raz_inst|Add1~1_sumout ;
 wire \raz_inst|Add1~2 ;
 wire \raz_inst|Add1~5_sumout ;
-wire \raz_inst|Add1~6 ;
-wire \raz_inst|Add1~9_sumout ;
-wire \raz_inst|Add1~10 ;
-wire \raz_inst|Add1~13_sumout ;
-wire \raz_inst|Add1~14 ;
-wire \raz_inst|Add1~17_sumout ;
-wire \raz_inst|Add1~18 ;
-wire \raz_inst|Add1~21_sumout ;
-wire \raz_inst|LessThan1~0_combout ;
-wire \raz_inst|LessThan1~1_combout ;
-wire \raz_inst|pixel_x[9]~7_combout ;
-wire \soc_inst|pix1|Add1~18 ;
-wire \soc_inst|pix1|Add1~22 ;
-wire \soc_inst|pix1|Add1~26 ;
-wire \soc_inst|pix1|Add1~30 ;
-wire \soc_inst|pix1|Add1~10 ;
-wire \soc_inst|pix1|Add1~14 ;
-wire \soc_inst|pix1|Add1~6 ;
-wire \soc_inst|pix1|Add1~1_sumout ;
-wire \soc_inst|pix1|Add1~5_sumout ;
-wire \soc_inst|pix1|Add1~13_sumout ;
-wire \soc_inst|pix1|Add1~9_sumout ;
-wire \soc_inst|pix1|Add1~29_sumout ;
-wire \soc_inst|pix1|Add1~25_sumout ;
-wire \soc_inst|pix1|Add1~21_sumout ;
-wire \soc_inst|pix1|Add1~17_sumout ;
-wire \raz_inst|pixel_y[1]~1_combout ;
-wire \raz_inst|pixel_y[0]~0_combout ;
-wire \soc_inst|pix1|Add0~26 ;
-wire \soc_inst|pix1|Add0~30 ;
-wire \soc_inst|pix1|Add0~34 ;
-wire \soc_inst|pix1|Add0~38 ;
-wire \soc_inst|pix1|Add0~42 ;
-wire \soc_inst|pix1|Add0~46 ;
-wire \soc_inst|pix1|Add0~18 ;
-wire \soc_inst|pix1|Add0~22 ;
-wire \soc_inst|pix1|Add0~14 ;
-wire \soc_inst|pix1|Add0~10 ;
-wire \soc_inst|pix1|Add0~6 ;
-wire \soc_inst|pix1|Add0~1_sumout ;
+wire \raz_inst|LessThan8~0_combout ;
+wire \raz_inst|LessThan8~2_combout ;
+wire \raz_inst|LessThan8~3_combout ;
+wire \raz_inst|LessThan8~1_combout ;
+wire \raz_inst|LessThan8~4_combout ;
+wire \raz_inst|video_on_V~q ;
+wire \raz_inst|LessThan7~0_combout ;
+wire \raz_inst|video_on_H~q ;
+wire \raz_inst|VGA_BLANK_N~combout ;
 wire \soc_inst|pix1|always0~0_combout ;
 wire \soc_inst|pix1|write_enable~q ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ;
-wire \raz_inst|LessThan0~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout ;
+wire \raz_inst|video_on_H~DUPLICATE_q ;
 wire \raz_inst|pixel_x[0]~0_combout ;
 wire \raz_inst|pixel_x[1]~1_combout ;
 wire \raz_inst|pixel_x[2]~2_combout ;
@@ -4725,108 +4736,133 @@ wire \raz_inst|pixel_x[4]~4_combout ;
 wire \raz_inst|pixel_x[5]~5_combout ;
 wire \raz_inst|pixel_x[6]~6_combout ;
 wire \soc_inst|pix1|Add0~25_sumout ;
+wire \soc_inst|pix1|Add0~26 ;
 wire \soc_inst|pix1|Add0~29_sumout ;
+wire \raz_inst|video_on_V~DUPLICATE_q ;
+wire \soc_inst|pix1|Add1~17_sumout ;
+wire \soc_inst|pix1|Add0~30 ;
 wire \soc_inst|pix1|Add0~33_sumout ;
+wire \soc_inst|pix1|Add1~18 ;
+wire \soc_inst|pix1|Add1~21_sumout ;
+wire \soc_inst|pix1|Add0~34 ;
 wire \soc_inst|pix1|Add0~37_sumout ;
+wire \soc_inst|pix1|Add1~22 ;
+wire \soc_inst|pix1|Add1~25_sumout ;
+wire \soc_inst|pix1|Add0~38 ;
 wire \soc_inst|pix1|Add0~41_sumout ;
-wire \soc_inst|pix1|Add0~45_sumout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ;
-wire \soc_inst|pix1|Add0~21_sumout ;
-wire \soc_inst|pix1|Add0~13_sumout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ;
-wire \soc_inst|pix1|Add0~17_sumout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ;
+wire \soc_inst|pix1|Add1~26 ;
+wire \soc_inst|pix1|Add1~29_sumout ;
+wire \soc_inst|pix1|Add0~42 ;
+wire \soc_inst|pix1|Add0~45_sumout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ;
+wire \soc_inst|pix1|Add1~30 ;
+wire \soc_inst|pix1|Add1~9_sumout ;
+wire \soc_inst|pix1|Add0~46 ;
+wire \soc_inst|pix1|Add0~17_sumout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ;
+wire \soc_inst|pix1|Add1~10 ;
+wire \soc_inst|pix1|Add1~13_sumout ;
+wire \soc_inst|pix1|Add0~18 ;
+wire \soc_inst|pix1|Add0~21_sumout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ;
+wire \soc_inst|pix1|Add1~14 ;
+wire \soc_inst|pix1|Add1~5_sumout ;
+wire \soc_inst|pix1|Add0~22 ;
+wire \soc_inst|pix1|Add0~13_sumout ;
 wire \raz_inst|Red~0_combout ;
-wire \soc_inst|pix1|Add0~9_sumout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ;
+wire \soc_inst|pix1|Add1~6 ;
+wire \soc_inst|pix1|Add1~1_sumout ;
+wire \soc_inst|pix1|Add0~14 ;
+wire \soc_inst|pix1|Add0~9_sumout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout ;
-wire \raz_inst|LessThan9~0_combout ;
-wire \raz_inst|video_on_H~q ;
-wire \raz_inst|LessThan6~0_combout ;
-wire \raz_inst|always0~0_combout ;
-wire \raz_inst|always0~1_combout ;
-wire \raz_inst|LessThan10~2_combout ;
-wire \raz_inst|LessThan10~3_combout ;
-wire \raz_inst|Equal0~2_combout ;
-wire \raz_inst|LessThan10~1_combout ;
-wire \raz_inst|LessThan10~0_combout ;
-wire \raz_inst|LessThan10~4_combout ;
-wire \raz_inst|video_on_V~q ;
-wire \raz_inst|VGA_BLANK_N~combout ;
+wire \soc_inst|pix1|Add0~10 ;
+wire \soc_inst|pix1|Add0~6 ;
+wire \soc_inst|pix1|Add0~1_sumout ;
 wire \soc_inst|pix1|Add0~5_sumout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ;
+wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout ;
@@ -4836,15 +4872,6 @@ wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ;
-wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ;
 wire \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout ;
 wire \raz_inst|Red~1_combout ;
 wire \raz_inst|always0~5_combout ;
@@ -4861,14 +4888,14 @@ wire \raz_inst|VGA_VS~q ;
 wire [1:0] \soc_inst|switches_1|last_buttons ;
 wire [12:0] \soc_inst|ram_1|saved_word_address ;
 wire [31:0] \soc_inst|m0_1|u_logic|haddr_o ;
+wire [2:0] \soc_inst|interconnect_1|mux_sel ;
 wire [10:0] \raz_inst|H_count ;
+wire [18:0] \soc_inst|pix1|word_address ;
+wire [5:0] \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b ;
 wire [25:0] tick_count;
 wire [3:0] \soc_inst|ram_1|byte_select ;
 wire [1:0] \soc_inst|switches_1|half_word_address ;
 wire [10:0] \raz_inst|V_count ;
-wire [18:0] \soc_inst|pix1|word_address ;
-wire [5:0] \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b ;
-wire [2:0] \soc_inst|interconnect_1|mux_sel ;
 wire [1:0] \soc_inst|switches_1|DataValid ;
 wire [31:0] \soc_inst|m0_1|u_logic|hwdata_o ;
 
@@ -5403,1492 +5430,788 @@ defparam \HEX1[4]~output .open_drain_output = "false";
 defparam \HEX1[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X89_Y15_N56
-cyclonev_io_obuf \HEX1[5]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX1[5]),
-	.obar());
-// synopsys translate_off
-defparam \HEX1[5]~output .bus_hold = "false";
-defparam \HEX1[5]~output .open_drain_output = "false";
-defparam \HEX1[5]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y8_N56
-cyclonev_io_obuf \HEX1[6]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX1[6]),
-	.obar());
-// synopsys translate_off
-defparam \HEX1[6]~output .bus_hold = "false";
-defparam \HEX1[6]~output .open_drain_output = "false";
-defparam \HEX1[6]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y9_N22
-cyclonev_io_obuf \HEX2[0]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[0]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[0]~output .bus_hold = "false";
-defparam \HEX2[0]~output .open_drain_output = "false";
-defparam \HEX2[0]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y23_N39
-cyclonev_io_obuf \HEX2[1]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[1]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[1]~output .bus_hold = "false";
-defparam \HEX2[1]~output .open_drain_output = "false";
-defparam \HEX2[1]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y23_N56
-cyclonev_io_obuf \HEX2[2]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[2]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[2]~output .bus_hold = "false";
-defparam \HEX2[2]~output .open_drain_output = "false";
-defparam \HEX2[2]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y20_N79
-cyclonev_io_obuf \HEX2[3]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[3]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[3]~output .bus_hold = "false";
-defparam \HEX2[3]~output .open_drain_output = "false";
-defparam \HEX2[3]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y25_N39
-cyclonev_io_obuf \HEX2[4]~output (
-	.i(!\running~q ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[4]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[4]~output .bus_hold = "false";
-defparam \HEX2[4]~output .open_drain_output = "false";
-defparam \HEX2[4]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y20_N96
-cyclonev_io_obuf \HEX2[5]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[5]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[5]~output .bus_hold = "false";
-defparam \HEX2[5]~output .open_drain_output = "false";
-defparam \HEX2[5]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y25_N56
-cyclonev_io_obuf \HEX2[6]~output (
-	.i(!\running~q ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX2[6]),
-	.obar());
-// synopsys translate_off
-defparam \HEX2[6]~output .bus_hold = "false";
-defparam \HEX2[6]~output .open_drain_output = "false";
-defparam \HEX2[6]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y16_N5
-cyclonev_io_obuf \HEX3[0]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[0]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[0]~output .bus_hold = "false";
-defparam \HEX3[0]~output .open_drain_output = "false";
-defparam \HEX3[0]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y16_N22
-cyclonev_io_obuf \HEX3[1]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[1]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[1]~output .bus_hold = "false";
-defparam \HEX3[1]~output .open_drain_output = "false";
-defparam \HEX3[1]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y4_N45
-cyclonev_io_obuf \HEX3[2]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[2]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[2]~output .bus_hold = "false";
-defparam \HEX3[2]~output .open_drain_output = "false";
-defparam \HEX3[2]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y4_N62
-cyclonev_io_obuf \HEX3[3]~output (
-	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[3]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[3]~output .bus_hold = "false";
-defparam \HEX3[3]~output .open_drain_output = "false";
-defparam \HEX3[3]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y21_N39
-cyclonev_io_obuf \HEX3[4]~output (
-	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[4]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[4]~output .bus_hold = "false";
-defparam \HEX3[4]~output .open_drain_output = "false";
-defparam \HEX3[4]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y11_N62
-cyclonev_io_obuf \HEX3[5]~output (
-	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[5]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[5]~output .bus_hold = "false";
-defparam \HEX3[5]~output .open_drain_output = "false";
-defparam \HEX3[5]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X89_Y9_N5
-cyclonev_io_obuf \HEX3[6]~output (
-	.i(vcc),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(HEX3[6]),
-	.obar());
-// synopsys translate_off
-defparam \HEX3[6]~output .bus_hold = "false";
-defparam \HEX3[6]~output .open_drain_output = "false";
-defparam \HEX3[6]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X40_Y81_N53
-cyclonev_io_obuf \VGA_R[0]~output (
-	.i(\raz_inst|Red~1_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(VGA_R[0]),
-	.obar());
-// synopsys translate_off
-defparam \VGA_R[0]~output .bus_hold = "false";
-defparam \VGA_R[0]~output .open_drain_output = "false";
-defparam \VGA_R[0]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X38_Y81_N2
-cyclonev_io_obuf \VGA_R[1]~output (
-	.i(\raz_inst|Red~1_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(VGA_R[1]),
-	.obar());
-// synopsys translate_off
-defparam \VGA_R[1]~output .bus_hold = "false";
-defparam \VGA_R[1]~output .open_drain_output = "false";
-defparam \VGA_R[1]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X26_Y81_N59
-cyclonev_io_obuf \VGA_R[2]~output (
-	.i(\raz_inst|Red~1_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(VGA_R[2]),
-	.obar());
-// synopsys translate_off
-defparam \VGA_R[2]~output .bus_hold = "false";
-defparam \VGA_R[2]~output .open_drain_output = "false";
-defparam \VGA_R[2]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X38_Y81_N19
-cyclonev_io_obuf \VGA_R[3]~output (
-	.i(\raz_inst|Red~1_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(VGA_R[3]),
-	.obar());
-// synopsys translate_off
-defparam \VGA_R[3]~output .bus_hold = "false";
-defparam \VGA_R[3]~output .open_drain_output = "false";
-defparam \VGA_R[3]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X36_Y81_N36
-cyclonev_io_obuf \VGA_R[4]~output (
-	.i(\raz_inst|Red~1_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(VGA_R[4]),
-	.obar());
-// synopsys translate_off
-defparam \VGA_R[4]~output .bus_hold = "false";
-defparam \VGA_R[4]~output .open_drain_output = "false";
-defparam \VGA_R[4]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X22_Y81_N19
-cyclonev_io_obuf \VGA_R[5]~output (
-	.i(\raz_inst|Red~1_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(VGA_R[5]),
-	.obar());
-// synopsys translate_off
-defparam \VGA_R[5]~output .bus_hold = "false";
-defparam \VGA_R[5]~output .open_drain_output = "false";
-defparam \VGA_R[5]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X22_Y81_N2
-cyclonev_io_obuf \VGA_R[6]~output (
-	.i(\raz_inst|Red~1_combout ),
-	.oe(vcc),
-	.dynamicterminationcontrol(gnd),
-	.seriesterminationcontrol(16'b0000000000000000),
-	.parallelterminationcontrol(16'b0000000000000000),
-	.devoe(devoe),
-	.o(VGA_R[6]),
-	.obar());
-// synopsys translate_off
-defparam \VGA_R[6]~output .bus_hold = "false";
-defparam \VGA_R[6]~output .open_drain_output = "false";
-defparam \VGA_R[6]~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOOBUF_X26_Y81_N42
-cyclonev_io_obuf \VGA_R[7]~output (
-	.i(\raz_inst|Red~1_combout ),
+// Location: IOOBUF_X89_Y15_N56
+cyclonev_io_obuf \HEX1[5]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_R[7]),
+	.o(HEX1[5]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_R[7]~output .bus_hold = "false";
-defparam \VGA_R[7]~output .open_drain_output = "false";
-defparam \VGA_R[7]~output .shift_series_termination_control = "false";
+defparam \HEX1[5]~output .bus_hold = "false";
+defparam \HEX1[5]~output .open_drain_output = "false";
+defparam \HEX1[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X4_Y81_N19
-cyclonev_io_obuf \VGA_G[0]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y8_N56
+cyclonev_io_obuf \HEX1[6]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[0]),
+	.o(HEX1[6]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[0]~output .bus_hold = "false";
-defparam \VGA_G[0]~output .open_drain_output = "false";
-defparam \VGA_G[0]~output .shift_series_termination_control = "false";
+defparam \HEX1[6]~output .bus_hold = "false";
+defparam \HEX1[6]~output .open_drain_output = "false";
+defparam \HEX1[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X4_Y81_N2
-cyclonev_io_obuf \VGA_G[1]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y9_N22
+cyclonev_io_obuf \HEX2[0]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[1]),
+	.o(HEX2[0]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[1]~output .bus_hold = "false";
-defparam \VGA_G[1]~output .open_drain_output = "false";
-defparam \VGA_G[1]~output .shift_series_termination_control = "false";
+defparam \HEX2[0]~output .bus_hold = "false";
+defparam \HEX2[0]~output .open_drain_output = "false";
+defparam \HEX2[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X20_Y81_N19
-cyclonev_io_obuf \VGA_G[2]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y23_N39
+cyclonev_io_obuf \HEX2[1]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[2]),
+	.o(HEX2[1]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[2]~output .bus_hold = "false";
-defparam \VGA_G[2]~output .open_drain_output = "false";
-defparam \VGA_G[2]~output .shift_series_termination_control = "false";
+defparam \HEX2[1]~output .bus_hold = "false";
+defparam \HEX2[1]~output .open_drain_output = "false";
+defparam \HEX2[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X6_Y81_N2
-cyclonev_io_obuf \VGA_G[3]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y23_N56
+cyclonev_io_obuf \HEX2[2]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[3]),
+	.o(HEX2[2]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[3]~output .bus_hold = "false";
-defparam \VGA_G[3]~output .open_drain_output = "false";
-defparam \VGA_G[3]~output .shift_series_termination_control = "false";
+defparam \HEX2[2]~output .bus_hold = "false";
+defparam \HEX2[2]~output .open_drain_output = "false";
+defparam \HEX2[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X10_Y81_N59
-cyclonev_io_obuf \VGA_G[4]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y20_N79
+cyclonev_io_obuf \HEX2[3]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[4]),
+	.o(HEX2[3]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[4]~output .bus_hold = "false";
-defparam \VGA_G[4]~output .open_drain_output = "false";
-defparam \VGA_G[4]~output .shift_series_termination_control = "false";
+defparam \HEX2[3]~output .bus_hold = "false";
+defparam \HEX2[3]~output .open_drain_output = "false";
+defparam \HEX2[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X10_Y81_N42
-cyclonev_io_obuf \VGA_G[5]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y25_N39
+cyclonev_io_obuf \HEX2[4]~output (
+	.i(!\running~q ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[5]),
+	.o(HEX2[4]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[5]~output .bus_hold = "false";
-defparam \VGA_G[5]~output .open_drain_output = "false";
-defparam \VGA_G[5]~output .shift_series_termination_control = "false";
+defparam \HEX2[4]~output .bus_hold = "false";
+defparam \HEX2[4]~output .open_drain_output = "false";
+defparam \HEX2[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X18_Y81_N42
-cyclonev_io_obuf \VGA_G[6]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y20_N96
+cyclonev_io_obuf \HEX2[5]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[6]),
+	.o(HEX2[5]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[6]~output .bus_hold = "false";
-defparam \VGA_G[6]~output .open_drain_output = "false";
-defparam \VGA_G[6]~output .shift_series_termination_control = "false";
+defparam \HEX2[5]~output .bus_hold = "false";
+defparam \HEX2[5]~output .open_drain_output = "false";
+defparam \HEX2[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X18_Y81_N59
-cyclonev_io_obuf \VGA_G[7]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y25_N56
+cyclonev_io_obuf \HEX2[6]~output (
+	.i(!\running~q ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_G[7]),
+	.o(HEX2[6]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_G[7]~output .bus_hold = "false";
-defparam \VGA_G[7]~output .open_drain_output = "false";
-defparam \VGA_G[7]~output .shift_series_termination_control = "false";
+defparam \HEX2[6]~output .bus_hold = "false";
+defparam \HEX2[6]~output .open_drain_output = "false";
+defparam \HEX2[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X40_Y81_N36
-cyclonev_io_obuf \VGA_B[0]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y16_N5
+cyclonev_io_obuf \HEX3[0]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[0]),
+	.o(HEX3[0]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[0]~output .bus_hold = "false";
-defparam \VGA_B[0]~output .open_drain_output = "false";
-defparam \VGA_B[0]~output .shift_series_termination_control = "false";
+defparam \HEX3[0]~output .bus_hold = "false";
+defparam \HEX3[0]~output .open_drain_output = "false";
+defparam \HEX3[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X28_Y81_N19
-cyclonev_io_obuf \VGA_B[1]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y16_N22
+cyclonev_io_obuf \HEX3[1]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[1]),
+	.o(HEX3[1]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[1]~output .bus_hold = "false";
-defparam \VGA_B[1]~output .open_drain_output = "false";
-defparam \VGA_B[1]~output .shift_series_termination_control = "false";
+defparam \HEX3[1]~output .bus_hold = "false";
+defparam \HEX3[1]~output .open_drain_output = "false";
+defparam \HEX3[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X20_Y81_N2
-cyclonev_io_obuf \VGA_B[2]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y4_N45
+cyclonev_io_obuf \HEX3[2]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[2]),
+	.o(HEX3[2]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[2]~output .bus_hold = "false";
-defparam \VGA_B[2]~output .open_drain_output = "false";
-defparam \VGA_B[2]~output .shift_series_termination_control = "false";
+defparam \HEX3[2]~output .bus_hold = "false";
+defparam \HEX3[2]~output .open_drain_output = "false";
+defparam \HEX3[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X36_Y81_N19
-cyclonev_io_obuf \VGA_B[3]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y4_N62
+cyclonev_io_obuf \HEX3[3]~output (
+	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[3]),
+	.o(HEX3[3]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[3]~output .bus_hold = "false";
-defparam \VGA_B[3]~output .open_drain_output = "false";
-defparam \VGA_B[3]~output .shift_series_termination_control = "false";
+defparam \HEX3[3]~output .bus_hold = "false";
+defparam \HEX3[3]~output .open_drain_output = "false";
+defparam \HEX3[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X28_Y81_N2
-cyclonev_io_obuf \VGA_B[4]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y21_N39
+cyclonev_io_obuf \HEX3[4]~output (
+	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[4]),
+	.o(HEX3[4]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[4]~output .bus_hold = "false";
-defparam \VGA_B[4]~output .open_drain_output = "false";
-defparam \VGA_B[4]~output .shift_series_termination_control = "false";
+defparam \HEX3[4]~output .bus_hold = "false";
+defparam \HEX3[4]~output .open_drain_output = "false";
+defparam \HEX3[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X36_Y81_N2
-cyclonev_io_obuf \VGA_B[5]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y11_N62
+cyclonev_io_obuf \HEX3[5]~output (
+	.i(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[5]),
+	.o(HEX3[5]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[5]~output .bus_hold = "false";
-defparam \VGA_B[5]~output .open_drain_output = "false";
-defparam \VGA_B[5]~output .shift_series_termination_control = "false";
+defparam \HEX3[5]~output .bus_hold = "false";
+defparam \HEX3[5]~output .open_drain_output = "false";
+defparam \HEX3[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X40_Y81_N19
-cyclonev_io_obuf \VGA_B[6]~output (
-	.i(gnd),
+// Location: IOOBUF_X89_Y9_N5
+cyclonev_io_obuf \HEX3[6]~output (
+	.i(vcc),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[6]),
+	.o(HEX3[6]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[6]~output .bus_hold = "false";
-defparam \VGA_B[6]~output .open_drain_output = "false";
-defparam \VGA_B[6]~output .shift_series_termination_control = "false";
+defparam \HEX3[6]~output .bus_hold = "false";
+defparam \HEX3[6]~output .open_drain_output = "false";
+defparam \HEX3[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X32_Y81_N19
-cyclonev_io_obuf \VGA_B[7]~output (
-	.i(gnd),
+// Location: IOOBUF_X40_Y81_N53
+cyclonev_io_obuf \VGA_R[0]~output (
+	.i(\raz_inst|Red~1_combout ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_B[7]),
+	.o(VGA_R[0]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_B[7]~output .bus_hold = "false";
-defparam \VGA_B[7]~output .open_drain_output = "false";
-defparam \VGA_B[7]~output .shift_series_termination_control = "false";
+defparam \VGA_R[0]~output .bus_hold = "false";
+defparam \VGA_R[0]~output .open_drain_output = "false";
+defparam \VGA_R[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X36_Y81_N53
-cyclonev_io_obuf \VGA_HS~output (
-	.i(\raz_inst|VGA_HS~q ),
+// Location: IOOBUF_X38_Y81_N2
+cyclonev_io_obuf \VGA_R[1]~output (
+	.i(\raz_inst|Red~1_combout ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_HS),
+	.o(VGA_R[1]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_HS~output .bus_hold = "false";
-defparam \VGA_HS~output .open_drain_output = "false";
-defparam \VGA_HS~output .shift_series_termination_control = "false";
+defparam \VGA_R[1]~output .bus_hold = "false";
+defparam \VGA_R[1]~output .open_drain_output = "false";
+defparam \VGA_R[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X34_Y81_N42
-cyclonev_io_obuf \VGA_VS~output (
-	.i(\raz_inst|VGA_VS~q ),
+// Location: IOOBUF_X26_Y81_N59
+cyclonev_io_obuf \VGA_R[2]~output (
+	.i(\raz_inst|Red~1_combout ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_VS),
+	.o(VGA_R[2]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_VS~output .bus_hold = "false";
-defparam \VGA_VS~output .open_drain_output = "false";
-defparam \VGA_VS~output .shift_series_termination_control = "false";
+defparam \VGA_R[2]~output .bus_hold = "false";
+defparam \VGA_R[2]~output .open_drain_output = "false";
+defparam \VGA_R[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X38_Y81_N36
-cyclonev_io_obuf \VGA_CLK~output (
-	.i(tick_count[0]),
+// Location: IOOBUF_X38_Y81_N19
+cyclonev_io_obuf \VGA_R[3]~output (
+	.i(\raz_inst|Red~1_combout ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_CLK),
+	.o(VGA_R[3]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_CLK~output .bus_hold = "false";
-defparam \VGA_CLK~output .open_drain_output = "false";
-defparam \VGA_CLK~output .shift_series_termination_control = "false";
+defparam \VGA_R[3]~output .bus_hold = "false";
+defparam \VGA_R[3]~output .open_drain_output = "false";
+defparam \VGA_R[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOOBUF_X6_Y81_N19
-cyclonev_io_obuf \VGA_BLANK_N~output (
-	.i(\raz_inst|VGA_BLANK_N~combout ),
+// Location: IOOBUF_X36_Y81_N36
+cyclonev_io_obuf \VGA_R[4]~output (
+	.i(\raz_inst|Red~1_combout ),
 	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
 	.seriesterminationcontrol(16'b0000000000000000),
 	.parallelterminationcontrol(16'b0000000000000000),
 	.devoe(devoe),
-	.o(VGA_BLANK_N),
+	.o(VGA_R[4]),
 	.obar());
 // synopsys translate_off
-defparam \VGA_BLANK_N~output .bus_hold = "false";
-defparam \VGA_BLANK_N~output .open_drain_output = "false";
-defparam \VGA_BLANK_N~output .shift_series_termination_control = "false";
-// synopsys translate_on
-
-// Location: IOIBUF_X32_Y0_N1
-cyclonev_io_ibuf \CLOCK_50~input (
-	.i(CLOCK_50),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\CLOCK_50~input_o ));
-// synopsys translate_off
-defparam \CLOCK_50~input .bus_hold = "false";
-defparam \CLOCK_50~input .simulate_z_as = "z";
-// synopsys translate_on
-
-// Location: CLKCTRL_G6
-cyclonev_clkena \CLOCK_50~inputCLKENA0 (
-	.inclk(\CLOCK_50~input_o ),
-	.ena(vcc),
-	.outclk(\CLOCK_50~inputCLKENA0_outclk ),
-	.enaout());
-// synopsys translate_off
-defparam \CLOCK_50~inputCLKENA0 .clock_type = "global clock";
-defparam \CLOCK_50~inputCLKENA0 .disable_mode = "low";
-defparam \CLOCK_50~inputCLKENA0 .ena_register_mode = "always enabled";
-defparam \CLOCK_50~inputCLKENA0 .ena_register_power_up = "high";
-defparam \CLOCK_50~inputCLKENA0 .test_syn = "high";
-// synopsys translate_on
-
-// Location: LABCELL_X55_Y27_N0
-cyclonev_lcell_comb \tick_count[0]~0 (
-// Equation(s):
-// \tick_count[0]~0_combout  = ( !tick_count[0] )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!tick_count[0]),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\tick_count[0]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \tick_count[0]~0 .extended_lut = "off";
-defparam \tick_count[0]~0 .lut_mask = 64'hFFFF0000FFFF0000;
-defparam \tick_count[0]~0 .shared_arith = "off";
+defparam \VGA_R[4]~output .bus_hold = "false";
+defparam \VGA_R[4]~output .open_drain_output = "false";
+defparam \VGA_R[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: IOIBUF_X40_Y0_N1
-cyclonev_io_ibuf \KEY[2]~input (
-	.i(KEY[2]),
-	.ibar(gnd),
+// Location: IOOBUF_X22_Y81_N19
+cyclonev_io_obuf \VGA_R[5]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
 	.dynamicterminationcontrol(gnd),
-	.o(\KEY[2]~input_o ));
-// synopsys translate_off
-defparam \KEY[2]~input .bus_hold = "false";
-defparam \KEY[2]~input .simulate_z_as = "z";
-// synopsys translate_on
-
-// Location: CLKCTRL_G4
-cyclonev_clkena \KEY[2]~inputCLKENA0 (
-	.inclk(\KEY[2]~input_o ),
-	.ena(vcc),
-	.outclk(\KEY[2]~inputCLKENA0_outclk ),
-	.enaout());
-// synopsys translate_off
-defparam \KEY[2]~inputCLKENA0 .clock_type = "global clock";
-defparam \KEY[2]~inputCLKENA0 .disable_mode = "low";
-defparam \KEY[2]~inputCLKENA0 .ena_register_mode = "always enabled";
-defparam \KEY[2]~inputCLKENA0 .ena_register_power_up = "high";
-defparam \KEY[2]~inputCLKENA0 .test_syn = "high";
-// synopsys translate_on
-
-// Location: FF_X55_Y27_N2
-dffeas \tick_count[0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\tick_count[0]~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[0]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \tick_count[0] .is_wysiwyg = "true";
-defparam \tick_count[0] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X55_Y27_N30
-cyclonev_lcell_comb \Add0~97 (
-// Equation(s):
-// \Add0~97_sumout  = SUM(( tick_count[0] ) + ( tick_count[1] ) + ( !VCC ))
-// \Add0~98  = CARRY(( tick_count[0] ) + ( tick_count[1] ) + ( !VCC ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[1]),
-	.datad(!tick_count[0]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~97_sumout ),
-	.cout(\Add0~98 ),
-	.shareout());
-// synopsys translate_off
-defparam \Add0~97 .extended_lut = "off";
-defparam \Add0~97 .lut_mask = 64'h0000F0F0000000FF;
-defparam \Add0~97 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X55_Y27_N31
-dffeas \tick_count[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~97_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \tick_count[1] .is_wysiwyg = "true";
-defparam \tick_count[1] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X55_Y27_N33
-cyclonev_lcell_comb \Add0~93 (
-// Equation(s):
-// \Add0~93_sumout  = SUM(( tick_count[2] ) + ( GND ) + ( \Add0~98  ))
-// \Add0~94  = CARRY(( tick_count[2] ) + ( GND ) + ( \Add0~98  ))
-
-	.dataa(!tick_count[2]),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~98 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~93_sumout ),
-	.cout(\Add0~94 ),
-	.shareout());
-// synopsys translate_off
-defparam \Add0~93 .extended_lut = "off";
-defparam \Add0~93 .lut_mask = 64'h0000FFFF00005555;
-defparam \Add0~93 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X55_Y27_N35
-dffeas \tick_count[2] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~93_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[2]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \tick_count[2] .is_wysiwyg = "true";
-defparam \tick_count[2] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X55_Y27_N36
-cyclonev_lcell_comb \Add0~89 (
-// Equation(s):
-// \Add0~89_sumout  = SUM(( tick_count[3] ) + ( GND ) + ( \Add0~94  ))
-// \Add0~90  = CARRY(( tick_count[3] ) + ( GND ) + ( \Add0~94  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!tick_count[3]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~94 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~89_sumout ),
-	.cout(\Add0~90 ),
-	.shareout());
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[5]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~89 .extended_lut = "off";
-defparam \Add0~89 .lut_mask = 64'h0000FFFF000000FF;
-defparam \Add0~89 .shared_arith = "off";
+defparam \VGA_R[5]~output .bus_hold = "false";
+defparam \VGA_R[5]~output .open_drain_output = "false";
+defparam \VGA_R[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y27_N37
-dffeas \tick_count[3] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~89_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[3]),
-	.prn(vcc));
+// Location: IOOBUF_X22_Y81_N2
+cyclonev_io_obuf \VGA_R[6]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[6]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[3] .is_wysiwyg = "true";
-defparam \tick_count[3] .power_up = "low";
+defparam \VGA_R[6]~output .bus_hold = "false";
+defparam \VGA_R[6]~output .open_drain_output = "false";
+defparam \VGA_R[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y27_N39
-cyclonev_lcell_comb \Add0~85 (
-// Equation(s):
-// \Add0~85_sumout  = SUM(( tick_count[4] ) + ( GND ) + ( \Add0~90  ))
-// \Add0~86  = CARRY(( tick_count[4] ) + ( GND ) + ( \Add0~90  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[4]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~90 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~85_sumout ),
-	.cout(\Add0~86 ),
-	.shareout());
+// Location: IOOBUF_X26_Y81_N42
+cyclonev_io_obuf \VGA_R[7]~output (
+	.i(\raz_inst|Red~1_combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_R[7]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~85 .extended_lut = "off";
-defparam \Add0~85 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~85 .shared_arith = "off";
+defparam \VGA_R[7]~output .bus_hold = "false";
+defparam \VGA_R[7]~output .open_drain_output = "false";
+defparam \VGA_R[7]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y27_N41
-dffeas \tick_count[4] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~85_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[4]),
-	.prn(vcc));
+// Location: IOOBUF_X4_Y81_N19
+cyclonev_io_obuf \VGA_G[0]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[0]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[4] .is_wysiwyg = "true";
-defparam \tick_count[4] .power_up = "low";
+defparam \VGA_G[0]~output .bus_hold = "false";
+defparam \VGA_G[0]~output .open_drain_output = "false";
+defparam \VGA_G[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y27_N42
-cyclonev_lcell_comb \Add0~81 (
-// Equation(s):
-// \Add0~81_sumout  = SUM(( tick_count[5] ) + ( GND ) + ( \Add0~86  ))
-// \Add0~82  = CARRY(( tick_count[5] ) + ( GND ) + ( \Add0~86  ))
-
-	.dataa(gnd),
-	.datab(!tick_count[5]),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~86 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~81_sumout ),
-	.cout(\Add0~82 ),
-	.shareout());
+// Location: IOOBUF_X4_Y81_N2
+cyclonev_io_obuf \VGA_G[1]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[1]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~81 .extended_lut = "off";
-defparam \Add0~81 .lut_mask = 64'h0000FFFF00003333;
-defparam \Add0~81 .shared_arith = "off";
+defparam \VGA_G[1]~output .bus_hold = "false";
+defparam \VGA_G[1]~output .open_drain_output = "false";
+defparam \VGA_G[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y27_N44
-dffeas \tick_count[5] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~81_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[5]),
-	.prn(vcc));
+// Location: IOOBUF_X20_Y81_N19
+cyclonev_io_obuf \VGA_G[2]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[2]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[5] .is_wysiwyg = "true";
-defparam \tick_count[5] .power_up = "low";
+defparam \VGA_G[2]~output .bus_hold = "false";
+defparam \VGA_G[2]~output .open_drain_output = "false";
+defparam \VGA_G[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y27_N45
-cyclonev_lcell_comb \Add0~77 (
-// Equation(s):
-// \Add0~77_sumout  = SUM(( tick_count[6] ) + ( GND ) + ( \Add0~82  ))
-// \Add0~78  = CARRY(( tick_count[6] ) + ( GND ) + ( \Add0~82  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[6]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~82 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~77_sumout ),
-	.cout(\Add0~78 ),
-	.shareout());
+// Location: IOOBUF_X6_Y81_N2
+cyclonev_io_obuf \VGA_G[3]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[3]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~77 .extended_lut = "off";
-defparam \Add0~77 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~77 .shared_arith = "off";
+defparam \VGA_G[3]~output .bus_hold = "false";
+defparam \VGA_G[3]~output .open_drain_output = "false";
+defparam \VGA_G[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y27_N47
-dffeas \tick_count[6] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~77_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[6]),
-	.prn(vcc));
+// Location: IOOBUF_X10_Y81_N59
+cyclonev_io_obuf \VGA_G[4]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[4]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[6] .is_wysiwyg = "true";
-defparam \tick_count[6] .power_up = "low";
+defparam \VGA_G[4]~output .bus_hold = "false";
+defparam \VGA_G[4]~output .open_drain_output = "false";
+defparam \VGA_G[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y27_N48
-cyclonev_lcell_comb \Add0~73 (
-// Equation(s):
-// \Add0~73_sumout  = SUM(( tick_count[7] ) + ( GND ) + ( \Add0~78  ))
-// \Add0~74  = CARRY(( tick_count[7] ) + ( GND ) + ( \Add0~78  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[7]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~78 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~73_sumout ),
-	.cout(\Add0~74 ),
-	.shareout());
+// Location: IOOBUF_X10_Y81_N42
+cyclonev_io_obuf \VGA_G[5]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[5]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~73 .extended_lut = "off";
-defparam \Add0~73 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~73 .shared_arith = "off";
+defparam \VGA_G[5]~output .bus_hold = "false";
+defparam \VGA_G[5]~output .open_drain_output = "false";
+defparam \VGA_G[5]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y27_N50
-dffeas \tick_count[7] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~73_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[7]),
-	.prn(vcc));
+// Location: IOOBUF_X18_Y81_N42
+cyclonev_io_obuf \VGA_G[6]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[6]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[7] .is_wysiwyg = "true";
-defparam \tick_count[7] .power_up = "low";
+defparam \VGA_G[6]~output .bus_hold = "false";
+defparam \VGA_G[6]~output .open_drain_output = "false";
+defparam \VGA_G[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y27_N51
-cyclonev_lcell_comb \Add0~69 (
-// Equation(s):
-// \Add0~69_sumout  = SUM(( tick_count[8] ) + ( GND ) + ( \Add0~74  ))
-// \Add0~70  = CARRY(( tick_count[8] ) + ( GND ) + ( \Add0~74  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[8]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~74 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~69_sumout ),
-	.cout(\Add0~70 ),
-	.shareout());
+// Location: IOOBUF_X18_Y81_N59
+cyclonev_io_obuf \VGA_G[7]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_G[7]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~69 .extended_lut = "off";
-defparam \Add0~69 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~69 .shared_arith = "off";
+defparam \VGA_G[7]~output .bus_hold = "false";
+defparam \VGA_G[7]~output .open_drain_output = "false";
+defparam \VGA_G[7]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y27_N52
-dffeas \tick_count[8] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~69_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[8]),
-	.prn(vcc));
+// Location: IOOBUF_X40_Y81_N36
+cyclonev_io_obuf \VGA_B[0]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[0]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[8] .is_wysiwyg = "true";
-defparam \tick_count[8] .power_up = "low";
+defparam \VGA_B[0]~output .bus_hold = "false";
+defparam \VGA_B[0]~output .open_drain_output = "false";
+defparam \VGA_B[0]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y27_N54
-cyclonev_lcell_comb \Add0~65 (
-// Equation(s):
-// \Add0~65_sumout  = SUM(( tick_count[9] ) + ( GND ) + ( \Add0~70  ))
-// \Add0~66  = CARRY(( tick_count[9] ) + ( GND ) + ( \Add0~70  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[9]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~70 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~65_sumout ),
-	.cout(\Add0~66 ),
-	.shareout());
+// Location: IOOBUF_X28_Y81_N19
+cyclonev_io_obuf \VGA_B[1]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[1]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~65 .extended_lut = "off";
-defparam \Add0~65 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~65 .shared_arith = "off";
+defparam \VGA_B[1]~output .bus_hold = "false";
+defparam \VGA_B[1]~output .open_drain_output = "false";
+defparam \VGA_B[1]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y27_N56
-dffeas \tick_count[9] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~65_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[9]),
-	.prn(vcc));
+// Location: IOOBUF_X20_Y81_N2
+cyclonev_io_obuf \VGA_B[2]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[2]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[9] .is_wysiwyg = "true";
-defparam \tick_count[9] .power_up = "low";
+defparam \VGA_B[2]~output .bus_hold = "false";
+defparam \VGA_B[2]~output .open_drain_output = "false";
+defparam \VGA_B[2]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y27_N57
-cyclonev_lcell_comb \Add0~61 (
-// Equation(s):
-// \Add0~61_sumout  = SUM(( tick_count[10] ) + ( GND ) + ( \Add0~66  ))
-// \Add0~62  = CARRY(( tick_count[10] ) + ( GND ) + ( \Add0~66  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[10]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~66 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~61_sumout ),
-	.cout(\Add0~62 ),
-	.shareout());
+// Location: IOOBUF_X36_Y81_N19
+cyclonev_io_obuf \VGA_B[3]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[3]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~61 .extended_lut = "off";
-defparam \Add0~61 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~61 .shared_arith = "off";
+defparam \VGA_B[3]~output .bus_hold = "false";
+defparam \VGA_B[3]~output .open_drain_output = "false";
+defparam \VGA_B[3]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y27_N59
-dffeas \tick_count[10] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~61_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[10]),
-	.prn(vcc));
+// Location: IOOBUF_X28_Y81_N2
+cyclonev_io_obuf \VGA_B[4]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[4]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[10] .is_wysiwyg = "true";
-defparam \tick_count[10] .power_up = "low";
+defparam \VGA_B[4]~output .bus_hold = "false";
+defparam \VGA_B[4]~output .open_drain_output = "false";
+defparam \VGA_B[4]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N0
-cyclonev_lcell_comb \Add0~57 (
-// Equation(s):
-// \Add0~57_sumout  = SUM(( tick_count[11] ) + ( GND ) + ( \Add0~62  ))
-// \Add0~58  = CARRY(( tick_count[11] ) + ( GND ) + ( \Add0~62  ))
+// Location: IOOBUF_X36_Y81_N2
+cyclonev_io_obuf \VGA_B[5]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[5]),
+	.obar());
+// synopsys translate_off
+defparam \VGA_B[5]~output .bus_hold = "false";
+defparam \VGA_B[5]~output .open_drain_output = "false";
+defparam \VGA_B[5]~output .shift_series_termination_control = "false";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[11]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~62 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~57_sumout ),
-	.cout(\Add0~58 ),
-	.shareout());
+// Location: IOOBUF_X40_Y81_N19
+cyclonev_io_obuf \VGA_B[6]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[6]),
+	.obar());
 // synopsys translate_off
-defparam \Add0~57 .extended_lut = "off";
-defparam \Add0~57 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~57 .shared_arith = "off";
+defparam \VGA_B[6]~output .bus_hold = "false";
+defparam \VGA_B[6]~output .open_drain_output = "false";
+defparam \VGA_B[6]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N2
-dffeas \tick_count[11] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~57_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[11]),
-	.prn(vcc));
+// Location: IOOBUF_X32_Y81_N19
+cyclonev_io_obuf \VGA_B[7]~output (
+	.i(gnd),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_B[7]),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[11] .is_wysiwyg = "true";
-defparam \tick_count[11] .power_up = "low";
+defparam \VGA_B[7]~output .bus_hold = "false";
+defparam \VGA_B[7]~output .open_drain_output = "false";
+defparam \VGA_B[7]~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N3
-cyclonev_lcell_comb \Add0~53 (
-// Equation(s):
-// \Add0~53_sumout  = SUM(( tick_count[12] ) + ( GND ) + ( \Add0~58  ))
-// \Add0~54  = CARRY(( tick_count[12] ) + ( GND ) + ( \Add0~58  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!tick_count[12]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~58 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~53_sumout ),
-	.cout(\Add0~54 ),
-	.shareout());
+// Location: IOOBUF_X36_Y81_N53
+cyclonev_io_obuf \VGA_HS~output (
+	.i(\raz_inst|VGA_HS~q ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_HS),
+	.obar());
 // synopsys translate_off
-defparam \Add0~53 .extended_lut = "off";
-defparam \Add0~53 .lut_mask = 64'h0000FFFF000000FF;
-defparam \Add0~53 .shared_arith = "off";
+defparam \VGA_HS~output .bus_hold = "false";
+defparam \VGA_HS~output .open_drain_output = "false";
+defparam \VGA_HS~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N5
-dffeas \tick_count[12] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~53_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[12]),
-	.prn(vcc));
+// Location: IOOBUF_X34_Y81_N42
+cyclonev_io_obuf \VGA_VS~output (
+	.i(\raz_inst|VGA_VS~q ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_VS),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[12] .is_wysiwyg = "true";
-defparam \tick_count[12] .power_up = "low";
+defparam \VGA_VS~output .bus_hold = "false";
+defparam \VGA_VS~output .open_drain_output = "false";
+defparam \VGA_VS~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N6
-cyclonev_lcell_comb \Add0~49 (
-// Equation(s):
-// \Add0~49_sumout  = SUM(( tick_count[13] ) + ( GND ) + ( \Add0~54  ))
-// \Add0~50  = CARRY(( tick_count[13] ) + ( GND ) + ( \Add0~54  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[13]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~54 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~49_sumout ),
-	.cout(\Add0~50 ),
-	.shareout());
+// Location: IOOBUF_X38_Y81_N36
+cyclonev_io_obuf \VGA_CLK~output (
+	.i(tick_count[0]),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_CLK),
+	.obar());
 // synopsys translate_off
-defparam \Add0~49 .extended_lut = "off";
-defparam \Add0~49 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~49 .shared_arith = "off";
+defparam \VGA_CLK~output .bus_hold = "false";
+defparam \VGA_CLK~output .open_drain_output = "false";
+defparam \VGA_CLK~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N7
-dffeas \tick_count[13] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~49_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[13]),
-	.prn(vcc));
+// Location: IOOBUF_X6_Y81_N19
+cyclonev_io_obuf \VGA_BLANK_N~output (
+	.i(\raz_inst|VGA_BLANK_N~combout ),
+	.oe(vcc),
+	.dynamicterminationcontrol(gnd),
+	.seriesterminationcontrol(16'b0000000000000000),
+	.parallelterminationcontrol(16'b0000000000000000),
+	.devoe(devoe),
+	.o(VGA_BLANK_N),
+	.obar());
 // synopsys translate_off
-defparam \tick_count[13] .is_wysiwyg = "true";
-defparam \tick_count[13] .power_up = "low";
+defparam \VGA_BLANK_N~output .bus_hold = "false";
+defparam \VGA_BLANK_N~output .open_drain_output = "false";
+defparam \VGA_BLANK_N~output .shift_series_termination_control = "false";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N9
-cyclonev_lcell_comb \Add0~45 (
-// Equation(s):
-// \Add0~45_sumout  = SUM(( tick_count[14] ) + ( GND ) + ( \Add0~50  ))
-// \Add0~46  = CARRY(( tick_count[14] ) + ( GND ) + ( \Add0~50  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[14]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~50 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~45_sumout ),
-	.cout(\Add0~46 ),
-	.shareout());
+// Location: IOIBUF_X32_Y0_N1
+cyclonev_io_ibuf \CLOCK_50~input (
+	.i(CLOCK_50),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\CLOCK_50~input_o ));
 // synopsys translate_off
-defparam \Add0~45 .extended_lut = "off";
-defparam \Add0~45 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~45 .shared_arith = "off";
+defparam \CLOCK_50~input .bus_hold = "false";
+defparam \CLOCK_50~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N11
-dffeas \tick_count[14] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~45_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
+// Location: CLKCTRL_G6
+cyclonev_clkena \CLOCK_50~inputCLKENA0 (
+	.inclk(\CLOCK_50~input_o ),
 	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[14]),
-	.prn(vcc));
+	.outclk(\CLOCK_50~inputCLKENA0_outclk ),
+	.enaout());
 // synopsys translate_off
-defparam \tick_count[14] .is_wysiwyg = "true";
-defparam \tick_count[14] .power_up = "low";
+defparam \CLOCK_50~inputCLKENA0 .clock_type = "global clock";
+defparam \CLOCK_50~inputCLKENA0 .disable_mode = "low";
+defparam \CLOCK_50~inputCLKENA0 .ena_register_mode = "always enabled";
+defparam \CLOCK_50~inputCLKENA0 .ena_register_power_up = "high";
+defparam \CLOCK_50~inputCLKENA0 .test_syn = "high";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N12
-cyclonev_lcell_comb \Add0~41 (
+// Location: LABCELL_X51_Y21_N0
+cyclonev_lcell_comb \tick_count[0]~0 (
 // Equation(s):
-// \Add0~41_sumout  = SUM(( tick_count[15] ) + ( GND ) + ( \Add0~46  ))
-// \Add0~42  = CARRY(( tick_count[15] ) + ( GND ) + ( \Add0~46  ))
+// \tick_count[0]~0_combout  = ( !tick_count[0] )
 
 	.dataa(gnd),
-	.datab(!tick_count[15]),
+	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
+	.datae(!tick_count[0]),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~46 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~41_sumout ),
-	.cout(\Add0~42 ),
+	.combout(\tick_count[0]~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~41 .extended_lut = "off";
-defparam \Add0~41 .lut_mask = 64'h0000FFFF00003333;
-defparam \Add0~41 .shared_arith = "off";
+defparam \tick_count[0]~0 .extended_lut = "off";
+defparam \tick_count[0]~0 .lut_mask = 64'hFFFF0000FFFF0000;
+defparam \tick_count[0]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N14
-dffeas \tick_count[15] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~41_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(tick_count[15]),
-	.prn(vcc));
+// Location: IOIBUF_X40_Y0_N1
+cyclonev_io_ibuf \KEY[2]~input (
+	.i(KEY[2]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\KEY[2]~input_o ));
 // synopsys translate_off
-defparam \tick_count[15] .is_wysiwyg = "true";
-defparam \tick_count[15] .power_up = "low";
+defparam \KEY[2]~input .bus_hold = "false";
+defparam \KEY[2]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N15
-cyclonev_lcell_comb \Add0~37 (
-// Equation(s):
-// \Add0~37_sumout  = SUM(( tick_count[16] ) + ( GND ) + ( \Add0~42  ))
-// \Add0~38  = CARRY(( tick_count[16] ) + ( GND ) + ( \Add0~42  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!tick_count[16]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\Add0~42 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\Add0~37_sumout ),
-	.cout(\Add0~38 ),
-	.shareout());
+// Location: CLKCTRL_G4
+cyclonev_clkena \KEY[2]~inputCLKENA0 (
+	.inclk(\KEY[2]~input_o ),
+	.ena(vcc),
+	.outclk(\KEY[2]~inputCLKENA0_outclk ),
+	.enaout());
 // synopsys translate_off
-defparam \Add0~37 .extended_lut = "off";
-defparam \Add0~37 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~37 .shared_arith = "off";
+defparam \KEY[2]~inputCLKENA0 .clock_type = "global clock";
+defparam \KEY[2]~inputCLKENA0 .disable_mode = "low";
+defparam \KEY[2]~inputCLKENA0 .ena_register_mode = "always enabled";
+defparam \KEY[2]~inputCLKENA0 .ena_register_power_up = "high";
+defparam \KEY[2]~inputCLKENA0 .test_syn = "high";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N17
-dffeas \tick_count[16] (
+// Location: FF_X51_Y21_N2
+dffeas \tick_count[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~37_sumout ),
+	.d(\tick_count[0]~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -6897,42 +6220,42 @@ dffeas \tick_count[16] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[16]),
+	.q(tick_count[0]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[16] .is_wysiwyg = "true";
-defparam \tick_count[16] .power_up = "low";
+defparam \tick_count[0] .is_wysiwyg = "true";
+defparam \tick_count[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N18
-cyclonev_lcell_comb \Add0~33 (
+// Location: LABCELL_X51_Y21_N30
+cyclonev_lcell_comb \Add0~97 (
 // Equation(s):
-// \Add0~33_sumout  = SUM(( tick_count[17] ) + ( GND ) + ( \Add0~38  ))
-// \Add0~34  = CARRY(( tick_count[17] ) + ( GND ) + ( \Add0~38  ))
+// \Add0~97_sumout  = SUM(( tick_count[0] ) + ( tick_count[1] ) + ( !VCC ))
+// \Add0~98  = CARRY(( tick_count[0] ) + ( tick_count[1] ) + ( !VCC ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!tick_count[17]),
-	.datad(gnd),
+	.datac(!tick_count[1]),
+	.datad(!tick_count[0]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~38 ),
+	.cin(gnd),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~33_sumout ),
-	.cout(\Add0~34 ),
+	.sumout(\Add0~97_sumout ),
+	.cout(\Add0~98 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~33 .extended_lut = "off";
-defparam \Add0~33 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~33 .shared_arith = "off";
+defparam \Add0~97 .extended_lut = "off";
+defparam \Add0~97 .lut_mask = 64'h0000F0F0000000FF;
+defparam \Add0~97 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N20
-dffeas \tick_count[17] (
+// Location: FF_X51_Y21_N31
+dffeas \tick_count[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~33_sumout ),
+	.d(\Add0~97_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -6941,42 +6264,42 @@ dffeas \tick_count[17] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[17]),
+	.q(tick_count[1]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[17] .is_wysiwyg = "true";
-defparam \tick_count[17] .power_up = "low";
+defparam \tick_count[1] .is_wysiwyg = "true";
+defparam \tick_count[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N21
-cyclonev_lcell_comb \Add0~29 (
+// Location: LABCELL_X51_Y21_N33
+cyclonev_lcell_comb \Add0~93 (
 // Equation(s):
-// \Add0~29_sumout  = SUM(( tick_count[18] ) + ( GND ) + ( \Add0~34  ))
-// \Add0~30  = CARRY(( tick_count[18] ) + ( GND ) + ( \Add0~34  ))
+// \Add0~93_sumout  = SUM(( tick_count[2] ) + ( GND ) + ( \Add0~98  ))
+// \Add0~94  = CARRY(( tick_count[2] ) + ( GND ) + ( \Add0~98  ))
 
-	.dataa(!tick_count[18]),
+	.dataa(!tick_count[2]),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~34 ),
+	.cin(\Add0~98 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~29_sumout ),
-	.cout(\Add0~30 ),
+	.sumout(\Add0~93_sumout ),
+	.cout(\Add0~94 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~29 .extended_lut = "off";
-defparam \Add0~29 .lut_mask = 64'h0000FFFF00005555;
-defparam \Add0~29 .shared_arith = "off";
+defparam \Add0~93 .extended_lut = "off";
+defparam \Add0~93 .lut_mask = 64'h0000FFFF00005555;
+defparam \Add0~93 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N23
-dffeas \tick_count[18] (
+// Location: FF_X51_Y21_N35
+dffeas \tick_count[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~29_sumout ),
+	.d(\Add0~93_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -6985,42 +6308,42 @@ dffeas \tick_count[18] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[18]),
+	.q(tick_count[2]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[18] .is_wysiwyg = "true";
-defparam \tick_count[18] .power_up = "low";
+defparam \tick_count[2] .is_wysiwyg = "true";
+defparam \tick_count[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N24
-cyclonev_lcell_comb \Add0~25 (
+// Location: LABCELL_X51_Y21_N36
+cyclonev_lcell_comb \Add0~89 (
 // Equation(s):
-// \Add0~25_sumout  = SUM(( tick_count[19] ) + ( GND ) + ( \Add0~30  ))
-// \Add0~26  = CARRY(( tick_count[19] ) + ( GND ) + ( \Add0~30  ))
+// \Add0~89_sumout  = SUM(( tick_count[3] ) + ( GND ) + ( \Add0~94  ))
+// \Add0~90  = CARRY(( tick_count[3] ) + ( GND ) + ( \Add0~94  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!tick_count[19]),
+	.datac(!tick_count[3]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~30 ),
+	.cin(\Add0~94 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~25_sumout ),
-	.cout(\Add0~26 ),
+	.sumout(\Add0~89_sumout ),
+	.cout(\Add0~90 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~25 .extended_lut = "off";
-defparam \Add0~25 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~25 .shared_arith = "off";
+defparam \Add0~89 .extended_lut = "off";
+defparam \Add0~89 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~89 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N26
-dffeas \tick_count[19] (
+// Location: FF_X51_Y21_N38
+dffeas \tick_count[3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~25_sumout ),
+	.d(\Add0~89_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7029,42 +6352,42 @@ dffeas \tick_count[19] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[19]),
+	.q(tick_count[3]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[19] .is_wysiwyg = "true";
-defparam \tick_count[19] .power_up = "low";
+defparam \tick_count[3] .is_wysiwyg = "true";
+defparam \tick_count[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N27
-cyclonev_lcell_comb \Add0~21 (
+// Location: LABCELL_X51_Y21_N39
+cyclonev_lcell_comb \Add0~85 (
 // Equation(s):
-// \Add0~21_sumout  = SUM(( tick_count[20] ) + ( GND ) + ( \Add0~26  ))
-// \Add0~22  = CARRY(( tick_count[20] ) + ( GND ) + ( \Add0~26  ))
+// \Add0~85_sumout  = SUM(( tick_count[4] ) + ( GND ) + ( \Add0~90  ))
+// \Add0~86  = CARRY(( tick_count[4] ) + ( GND ) + ( \Add0~90  ))
 
-	.dataa(!tick_count[20]),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!tick_count[4]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~26 ),
+	.cin(\Add0~90 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~21_sumout ),
-	.cout(\Add0~22 ),
+	.sumout(\Add0~85_sumout ),
+	.cout(\Add0~86 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~21 .extended_lut = "off";
-defparam \Add0~21 .lut_mask = 64'h0000FFFF00005555;
-defparam \Add0~21 .shared_arith = "off";
+defparam \Add0~85 .extended_lut = "off";
+defparam \Add0~85 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~85 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N29
-dffeas \tick_count[20] (
+// Location: FF_X51_Y21_N41
+dffeas \tick_count[4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~21_sumout ),
+	.d(\Add0~85_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7073,42 +6396,42 @@ dffeas \tick_count[20] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[20]),
+	.q(tick_count[4]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[20] .is_wysiwyg = "true";
-defparam \tick_count[20] .power_up = "low";
+defparam \tick_count[4] .is_wysiwyg = "true";
+defparam \tick_count[4] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N30
-cyclonev_lcell_comb \Add0~17 (
+// Location: LABCELL_X51_Y21_N42
+cyclonev_lcell_comb \Add0~81 (
 // Equation(s):
-// \Add0~17_sumout  = SUM(( tick_count[21] ) + ( GND ) + ( \Add0~22  ))
-// \Add0~18  = CARRY(( tick_count[21] ) + ( GND ) + ( \Add0~22  ))
+// \Add0~81_sumout  = SUM(( tick_count[5] ) + ( GND ) + ( \Add0~86  ))
+// \Add0~82  = CARRY(( tick_count[5] ) + ( GND ) + ( \Add0~86  ))
 
 	.dataa(gnd),
-	.datab(!tick_count[21]),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!tick_count[5]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~22 ),
+	.cin(\Add0~86 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~17_sumout ),
-	.cout(\Add0~18 ),
+	.sumout(\Add0~81_sumout ),
+	.cout(\Add0~82 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~17 .extended_lut = "off";
-defparam \Add0~17 .lut_mask = 64'h0000FFFF00003333;
-defparam \Add0~17 .shared_arith = "off";
+defparam \Add0~81 .extended_lut = "off";
+defparam \Add0~81 .lut_mask = 64'h0000FFFF000000FF;
+defparam \Add0~81 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N32
-dffeas \tick_count[21] (
+// Location: FF_X51_Y21_N43
+dffeas \tick_count[5] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~17_sumout ),
+	.d(\Add0~81_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7117,42 +6440,42 @@ dffeas \tick_count[21] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[21]),
+	.q(tick_count[5]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[21] .is_wysiwyg = "true";
-defparam \tick_count[21] .power_up = "low";
+defparam \tick_count[5] .is_wysiwyg = "true";
+defparam \tick_count[5] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N33
-cyclonev_lcell_comb \Add0~13 (
+// Location: LABCELL_X51_Y21_N45
+cyclonev_lcell_comb \Add0~77 (
 // Equation(s):
-// \Add0~13_sumout  = SUM(( tick_count[22] ) + ( GND ) + ( \Add0~18  ))
-// \Add0~14  = CARRY(( tick_count[22] ) + ( GND ) + ( \Add0~18  ))
+// \Add0~77_sumout  = SUM(( tick_count[6] ) + ( GND ) + ( \Add0~82  ))
+// \Add0~78  = CARRY(( tick_count[6] ) + ( GND ) + ( \Add0~82  ))
 
-	.dataa(!tick_count[22]),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!tick_count[6]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~18 ),
+	.cin(\Add0~82 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~13_sumout ),
-	.cout(\Add0~14 ),
+	.sumout(\Add0~77_sumout ),
+	.cout(\Add0~78 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~13 .extended_lut = "off";
-defparam \Add0~13 .lut_mask = 64'h0000FFFF00005555;
-defparam \Add0~13 .shared_arith = "off";
+defparam \Add0~77 .extended_lut = "off";
+defparam \Add0~77 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~77 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N35
-dffeas \tick_count[22] (
+// Location: FF_X51_Y21_N47
+dffeas \tick_count[6] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~13_sumout ),
+	.d(\Add0~77_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7161,42 +6484,42 @@ dffeas \tick_count[22] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[22]),
+	.q(tick_count[6]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[22] .is_wysiwyg = "true";
-defparam \tick_count[22] .power_up = "low";
+defparam \tick_count[6] .is_wysiwyg = "true";
+defparam \tick_count[6] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N36
-cyclonev_lcell_comb \Add0~5 (
+// Location: LABCELL_X51_Y21_N48
+cyclonev_lcell_comb \Add0~73 (
 // Equation(s):
-// \Add0~5_sumout  = SUM(( tick_count[23] ) + ( GND ) + ( \Add0~14  ))
-// \Add0~6  = CARRY(( tick_count[23] ) + ( GND ) + ( \Add0~14  ))
+// \Add0~73_sumout  = SUM(( tick_count[7] ) + ( GND ) + ( \Add0~78  ))
+// \Add0~74  = CARRY(( tick_count[7] ) + ( GND ) + ( \Add0~78  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!tick_count[23]),
+	.datac(!tick_count[7]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~14 ),
+	.cin(\Add0~78 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~5_sumout ),
-	.cout(\Add0~6 ),
+	.sumout(\Add0~73_sumout ),
+	.cout(\Add0~74 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~5 .extended_lut = "off";
-defparam \Add0~5 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~5 .shared_arith = "off";
+defparam \Add0~73 .extended_lut = "off";
+defparam \Add0~73 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~73 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N38
-dffeas \tick_count[23] (
+// Location: FF_X51_Y21_N50
+dffeas \tick_count[7] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~5_sumout ),
+	.d(\Add0~73_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7205,42 +6528,42 @@ dffeas \tick_count[23] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[23]),
+	.q(tick_count[7]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[23] .is_wysiwyg = "true";
-defparam \tick_count[23] .power_up = "low";
+defparam \tick_count[7] .is_wysiwyg = "true";
+defparam \tick_count[7] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N39
-cyclonev_lcell_comb \Add0~9 (
+// Location: LABCELL_X51_Y21_N51
+cyclonev_lcell_comb \Add0~69 (
 // Equation(s):
-// \Add0~9_sumout  = SUM(( tick_count[24] ) + ( GND ) + ( \Add0~6  ))
-// \Add0~10  = CARRY(( tick_count[24] ) + ( GND ) + ( \Add0~6  ))
+// \Add0~69_sumout  = SUM(( tick_count[8] ) + ( GND ) + ( \Add0~74  ))
+// \Add0~70  = CARRY(( tick_count[8] ) + ( GND ) + ( \Add0~74  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!tick_count[24]),
+	.datac(!tick_count[8]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~6 ),
+	.cin(\Add0~74 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~9_sumout ),
-	.cout(\Add0~10 ),
-	.shareout());
-// synopsys translate_off
-defparam \Add0~9 .extended_lut = "off";
-defparam \Add0~9 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~9 .shared_arith = "off";
+	.sumout(\Add0~69_sumout ),
+	.cout(\Add0~70 ),
+	.shareout());
+// synopsys translate_off
+defparam \Add0~69 .extended_lut = "off";
+defparam \Add0~69 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~69 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N41
-dffeas \tick_count[24] (
+// Location: FF_X51_Y21_N52
+dffeas \tick_count[8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~9_sumout ),
+	.d(\Add0~69_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7249,41 +6572,42 @@ dffeas \tick_count[24] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[24]),
+	.q(tick_count[8]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[24] .is_wysiwyg = "true";
-defparam \tick_count[24] .power_up = "low";
+defparam \tick_count[8] .is_wysiwyg = "true";
+defparam \tick_count[8] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N42
-cyclonev_lcell_comb \Add0~1 (
+// Location: LABCELL_X51_Y21_N54
+cyclonev_lcell_comb \Add0~65 (
 // Equation(s):
-// \Add0~1_sumout  = SUM(( tick_count[25] ) + ( GND ) + ( \Add0~10  ))
+// \Add0~65_sumout  = SUM(( tick_count[9] ) + ( GND ) + ( \Add0~70  ))
+// \Add0~66  = CARRY(( tick_count[9] ) + ( GND ) + ( \Add0~70  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!tick_count[25]),
+	.datac(!tick_count[9]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\Add0~10 ),
+	.cin(\Add0~70 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\Add0~1_sumout ),
-	.cout(),
+	.sumout(\Add0~65_sumout ),
+	.cout(\Add0~66 ),
 	.shareout());
 // synopsys translate_off
-defparam \Add0~1 .extended_lut = "off";
-defparam \Add0~1 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \Add0~1 .shared_arith = "off";
+defparam \Add0~65 .extended_lut = "off";
+defparam \Add0~65 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~65 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N44
-dffeas \tick_count[25] (
+// Location: FF_X51_Y21_N56
+dffeas \tick_count[9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\Add0~1_sumout ),
+	.d(\Add0~65_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7292,41 +6616,42 @@ dffeas \tick_count[25] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(tick_count[25]),
+	.q(tick_count[9]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \tick_count[25] .is_wysiwyg = "true";
-defparam \tick_count[25] .power_up = "low";
+defparam \tick_count[9] .is_wysiwyg = "true";
+defparam \tick_count[9] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y26_N48
-cyclonev_lcell_comb \heartbeat~0 (
+// Location: LABCELL_X51_Y21_N57
+cyclonev_lcell_comb \Add0~61 (
 // Equation(s):
-// \heartbeat~0_combout  = ( tick_count[25] & ( tick_count[23] ) )
+// \Add0~61_sumout  = SUM(( tick_count[10] ) + ( GND ) + ( \Add0~66  ))
+// \Add0~62  = CARRY(( tick_count[10] ) + ( GND ) + ( \Add0~66  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!tick_count[23]),
+	.datac(!tick_count[10]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!tick_count[25]),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~66 ),
 	.sharein(gnd),
-	.combout(\heartbeat~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~61_sumout ),
+	.cout(\Add0~62 ),
 	.shareout());
 // synopsys translate_off
-defparam \heartbeat~0 .extended_lut = "off";
-defparam \heartbeat~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \heartbeat~0 .shared_arith = "off";
+defparam \Add0~61 .extended_lut = "off";
+defparam \Add0~61 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~61 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X55_Y26_N49
-dffeas heartbeat(
+// Location: FF_X51_Y21_N59
+dffeas \tick_count[10] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\heartbeat~0_combout ),
+	.d(\Add0~61_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7335,142 +6660,86 @@ dffeas heartbeat(
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\heartbeat~q ),
+	.q(tick_count[10]),
 	.prn(vcc));
 // synopsys translate_off
-defparam heartbeat.is_wysiwyg = "true";
-defparam heartbeat.power_up = "low";
+defparam \tick_count[10] .is_wysiwyg = "true";
+defparam \tick_count[10] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y19_N26
-dffeas \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X51_Y20_N0
+cyclonev_lcell_comb \Add0~57 (
+// Equation(s):
+// \Add0~57_sumout  = SUM(( tick_count[11] ) + ( GND ) + ( \Add0~62  ))
+// \Add0~58  = CARRY(( tick_count[11] ) + ( GND ) + ( \Add0~62  ))
 
-// Location: FF_X39_Y19_N44
-dffeas \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!tick_count[11]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\Add0~62 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\Add0~57_sumout ),
+	.cout(\Add0~58 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE .power_up = "low";
+defparam \Add0~57 .extended_lut = "off";
+defparam \Add0~57 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~57 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y21_N19
-dffeas \soc_inst|m0_1|u_logic|Tki2z4 (
+// Location: FF_X51_Y20_N2
+dffeas \tick_count[11] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
+	.d(\Add0~57_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tki2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tki2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X39_Y19_N17
-dffeas \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.q(tick_count[11]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9pvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|M9pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q 
-// ) # ((\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .lut_mask = 64'hAFFFAFFFAAFFAAFF;
-defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .shared_arith = "off";
+defparam \tick_count[11] .is_wysiwyg = "true";
+defparam \tick_count[11] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S5pvx4 (
+// Location: LABCELL_X51_Y20_N3
+cyclonev_lcell_comb \Add0~53 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S5pvx4~combout  = ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
+// \Add0~53_sumout  = SUM(( tick_count[12] ) + ( GND ) + ( \Add0~58  ))
+// \Add0~54  = CARRY(( tick_count[12] ) + ( GND ) + ( \Add0~58  ))
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datad(!tick_count[12]),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~58 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~53_sumout ),
+	.cout(\Add0~54 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S5pvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S5pvx4 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|S5pvx4 .shared_arith = "off";
+defparam \Add0~53 .extended_lut = "off";
+defparam \Add0~53 .lut_mask = 64'h0000FFFF000000FF;
+defparam \Add0~53 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y19_N34
-dffeas \soc_inst|m0_1|u_logic|Emi2z4 (
+// Location: FF_X51_Y20_N5
+dffeas \tick_count[12] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
+	.d(\Add0~53_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7479,343 +6748,262 @@ dffeas \soc_inst|m0_1|u_logic|Emi2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.q(tick_count[12]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Emi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Emi2z4 .power_up = "low";
+defparam \tick_count[12] .is_wysiwyg = "true";
+defparam \tick_count[12] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xx2wx4 (
+// Location: LABCELL_X51_Y20_N6
+cyclonev_lcell_comb \Add0~49 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xx2wx4~combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  ) )
+// \Add0~49_sumout  = SUM(( tick_count[13] ) + ( GND ) + ( \Add0~54  ))
+// \Add0~50  = CARRY(( tick_count[13] ) + ( GND ) + ( \Add0~54  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!tick_count[13]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~54 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~49_sumout ),
+	.cout(\Add0~50 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xx2wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xx2wx4 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Xx2wx4 .shared_arith = "off";
+defparam \Add0~49 .extended_lut = "off";
+defparam \Add0~49 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~49 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y19_N40
-dffeas \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE (
+// Location: FF_X51_Y20_N7
+dffeas \tick_count[13] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
+	.d(\Add0~49_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.q(tick_count[13]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE .power_up = "low";
+defparam \tick_count[13] .is_wysiwyg = "true";
+defparam \tick_count[13] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdh2z4~0 (
+// Location: LABCELL_X51_Y20_N9
+cyclonev_lcell_comb \Add0~45 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \Add0~45_sumout  = SUM(( tick_count[14] ) + ( GND ) + ( \Add0~50  ))
+// \Add0~46  = CARRY(( tick_count[14] ) + ( GND ) + ( \Add0~50  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!tick_count[14]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~50 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~45_sumout ),
+	.cout(\Add0~46 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .shared_arith = "off";
+defparam \Add0~45 .extended_lut = "off";
+defparam \Add0~45 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~45 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y19_N37
-dffeas \soc_inst|m0_1|u_logic|Ark2z4 (
+// Location: FF_X51_Y20_N11
+dffeas \tick_count[14] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
+	.d(\Add0~45_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.q(tick_count[14]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ark2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ark2z4 .power_up = "low";
+defparam \tick_count[14] .is_wysiwyg = "true";
+defparam \tick_count[14] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z1ewx4~0 (
+// Location: LABCELL_X51_Y20_N12
+cyclonev_lcell_comb \Add0~41 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  ) )
+// \Add0~41_sumout  = SUM(( tick_count[15] ) + ( GND ) + ( \Add0~46  ))
+// \Add0~42  = CARRY(( tick_count[15] ) + ( GND ) + ( \Add0~46  ))
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!tick_count[15]),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~46 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~41_sumout ),
+	.cout(\Add0~42 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .shared_arith = "off";
+defparam \Add0~41 .extended_lut = "off";
+defparam \Add0~41 .lut_mask = 64'h0000FFFF00003333;
+defparam \Add0~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y19_N31
-dffeas \soc_inst|m0_1|u_logic|Fij2z4 (
+// Location: FF_X51_Y20_N14
+dffeas \tick_count[15] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
+	.d(\Add0~41_sumout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.q(tick_count[15]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fij2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fij2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2lwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|G2lwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
-// ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .lut_mask = 64'h5050F0F000005050;
-defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .shared_arith = "off";
+defparam \tick_count[15] .is_wysiwyg = "true";
+defparam \tick_count[15] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Howvx4~0 (
+// Location: LABCELL_X51_Y20_N15
+cyclonev_lcell_comb \Add0~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Howvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
+// \Add0~37_sumout  = SUM(( tick_count[16] ) + ( GND ) + ( \Add0~42  ))
+// \Add0~38  = CARRY(( tick_count[16] ) + ( GND ) + ( \Add0~42  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Howvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Howvx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Howvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2lwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|G2lwx4~combout  = ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2lwx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
-	.datac(gnd),
+	.datac(!tick_count[16]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~42 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G2lwx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~37_sumout ),
+	.cout(\Add0~38 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G2lwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G2lwx4 .lut_mask = 64'hCCCCCCCC00000000;
-defparam \soc_inst|m0_1|u_logic|G2lwx4 .shared_arith = "off";
+defparam \Add0~37 .extended_lut = "off";
+defparam \Add0~37 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pcyvx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pcyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X51_Y20_N17
+dffeas \tick_count[16] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~37_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[16]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pcyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pcyvx4 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Pcyvx4 .shared_arith = "off";
+defparam \tick_count[16] .is_wysiwyg = "true";
+defparam \tick_count[16] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9yvx4 (
+// Location: LABCELL_X51_Y20_N18
+cyclonev_lcell_comb \Add0~33 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C9yvx4~combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
+// \Add0~33_sumout  = SUM(( tick_count[17] ) + ( GND ) + ( \Add0~38  ))
+// \Add0~34  = CARRY(( tick_count[17] ) + ( GND ) + ( \Add0~38  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datab(gnd),
+	.datac(!tick_count[17]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9yvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9yvx4 .lut_mask = 64'hC0C0C0C000000000;
-defparam \soc_inst|m0_1|u_logic|C9yvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dplwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Dplwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  
-// & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  & (((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) 
-// )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~38 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~33_sumout ),
+	.cout(\Add0~34 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .lut_mask = 64'h7340330000000000;
-defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .shared_arith = "off";
+defparam \Add0~33 .extended_lut = "off";
+defparam \Add0~33 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cllwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cllwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
-// (((!\soc_inst|m0_1|u_logic|C9yvx4~combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X51_Y20_N20
+dffeas \tick_count[17] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~33_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[17]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .lut_mask = 64'hAFA3AFA300000000;
-defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .shared_arith = "off";
+defparam \tick_count[17] .is_wysiwyg = "true";
+defparam \tick_count[17] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y15_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdh2z4~1 (
+// Location: LABCELL_X51_Y20_N21
+cyclonev_lcell_comb \Add0~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) )
+// \Add0~29_sumout  = SUM(( tick_count[18] ) + ( GND ) + ( \Add0~34  ))
+// \Add0~30  = CARRY(( tick_count[18] ) + ( GND ) + ( \Add0~34  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(!tick_count[18]),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~34 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~29_sumout ),
+	.cout(\Add0~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .lut_mask = 64'h0A0AFFFF0F0F0000;
-defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .shared_arith = "off";
+defparam \Add0~29 .extended_lut = "off";
+defparam \Add0~29 .lut_mask = 64'h0000FFFF00005555;
+defparam \Add0~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y21_N7
-dffeas \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE (
+// Location: FF_X51_Y20_N23
+dffeas \tick_count[18] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
+	.d(\Add0~29_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -7824,279 +7012,348 @@ dffeas \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.q(tick_count[18]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE .power_up = "low";
+defparam \tick_count[18] .is_wysiwyg = "true";
+defparam \tick_count[18] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Socwx4~0 (
+// Location: LABCELL_X51_Y20_N24
+cyclonev_lcell_comb \Add0~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Socwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \Add0~25_sumout  = SUM(( tick_count[19] ) + ( GND ) + ( \Add0~30  ))
+// \Add0~26  = CARRY(( tick_count[19] ) + ( GND ) + ( \Add0~30  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!tick_count[19]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~30 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~25_sumout ),
+	.cout(\Add0~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Socwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Socwx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Socwx4~0 .shared_arith = "off";
+defparam \Add0~25 .extended_lut = "off";
+defparam \Add0~25 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5c2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q5c2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Socwx4~0_combout  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q5c2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X51_Y20_N26
+dffeas \tick_count[19] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~25_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[19]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .lut_mask = 64'h0003000300000000;
-defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .shared_arith = "off";
+defparam \tick_count[19] .is_wysiwyg = "true";
+defparam \tick_count[19] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~0 (
+// Location: LABCELL_X51_Y20_N27
+cyclonev_lcell_comb \Add0~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G97wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) )
+// \Add0~21_sumout  = SUM(( tick_count[20] ) + ( GND ) + ( \Add0~26  ))
+// \Add0~22  = CARRY(( tick_count[20] ) + ( GND ) + ( \Add0~26  ))
 
-	.dataa(gnd),
+	.dataa(!tick_count[20]),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~21_sumout ),
+	.cout(\Add0~22 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G97wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G97wx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|G97wx4~0 .shared_arith = "off";
+defparam \Add0~21 .extended_lut = "off";
+defparam \Add0~21 .lut_mask = 64'h0000FFFF00005555;
+defparam \Add0~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~1 (
+// Location: FF_X51_Y20_N29
+dffeas \tick_count[20] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~21_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[20]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \tick_count[20] .is_wysiwyg = "true";
+defparam \tick_count[20] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y20_N30
+cyclonev_lcell_comb \Add0~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z5pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+// \Add0~17_sumout  = SUM(( tick_count[21] ) + ( GND ) + ( \Add0~22  ))
+// \Add0~18  = CARRY(( tick_count[21] ) + ( GND ) + ( \Add0~22  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!tick_count[21]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~22 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~17_sumout ),
+	.cout(\Add0~18 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .lut_mask = 64'h0000000055005500;
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .shared_arith = "off";
+defparam \Add0~17 .extended_lut = "off";
+defparam \Add0~17 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sy2wx4~0 (
+// Location: FF_X51_Y20_N31
+dffeas \tick_count[21] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~17_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[21]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \tick_count[21] .is_wysiwyg = "true";
+defparam \tick_count[21] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y20_N33
+cyclonev_lcell_comb \Add0~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
+// \Add0~13_sumout  = SUM(( tick_count[22] ) + ( GND ) + ( \Add0~18  ))
+// \Add0~14  = CARRY(( tick_count[22] ) + ( GND ) + ( \Add0~18  ))
 
-	.dataa(gnd),
+	.dataa(!tick_count[22]),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~18 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~13_sumout ),
+	.cout(\Add0~14 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .shared_arith = "off";
+defparam \Add0~13 .extended_lut = "off";
+defparam \Add0~13 .lut_mask = 64'h0000FFFF00005555;
+defparam \Add0~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N33
-cyclonev_lcell_comb \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 (
+// Location: FF_X51_Y20_N35
+dffeas \tick_count[22] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~13_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[22]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \tick_count[22] .is_wysiwyg = "true";
+defparam \tick_count[22] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y20_N36
+cyclonev_lcell_comb \Add0~5 (
 // Equation(s):
-// \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout  = ( \soc_inst|interconnect_1|LessThan0~0_combout  & ( \soc_inst|interconnect_1|LessThan1~0_combout  ) ) # ( !\soc_inst|interconnect_1|LessThan0~0_combout  & ( 
-// !\soc_inst|interconnect_1|LessThan1~0_combout  ) )
+// \Add0~5_sumout  = SUM(( tick_count[23] ) + ( GND ) + ( \Add0~14  ))
+// \Add0~6  = CARRY(( tick_count[23] ) + ( GND ) + ( \Add0~14  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|LessThan1~0_combout ),
+	.datac(!tick_count[23]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~5_sumout ),
+	.cout(\Add0~6 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .lut_mask = 64'hF0F0F0F00F0F0F0F;
-defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .shared_arith = "off";
+defparam \Add0~5 .extended_lut = "off";
+defparam \Add0~5 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N11
-dffeas \soc_inst|interconnect_1|mux_sel[1] (
+// Location: FF_X51_Y20_N38
+dffeas \tick_count[23] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
+	.d(\Add0~5_sumout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|interconnect_1|mux_sel [1]),
+	.q(tick_count[23]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|mux_sel[1] .is_wysiwyg = "true";
-defparam \soc_inst|interconnect_1|mux_sel[1] .power_up = "low";
+defparam \tick_count[23] .is_wysiwyg = "true";
+defparam \tick_count[23] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hsize_o~0 (
+// Location: LABCELL_X51_Y20_N39
+cyclonev_lcell_comb \Add0~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hsize_o~0_combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|It52z4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) )
+// \Add0~9_sumout  = SUM(( tick_count[24] ) + ( GND ) + ( \Add0~6  ))
+// \Add0~10  = CARRY(( tick_count[24] ) + ( GND ) + ( \Add0~6  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datac(!tick_count[24]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~6 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\Add0~9_sumout ),
+	.cout(\Add0~10 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hsize_o~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hsize_o~0 .lut_mask = 64'h0F000F00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|hsize_o~0 .shared_arith = "off";
+defparam \Add0~9 .extended_lut = "off";
+defparam \Add0~9 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfdwx4~0 (
+// Location: FF_X51_Y20_N41
+dffeas \tick_count[24] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~9_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[24]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \tick_count[24] .is_wysiwyg = "true";
+defparam \tick_count[24] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X51_Y20_N42
+cyclonev_lcell_comb \Add0~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) )
+// \Add0~1_sumout  = SUM(( tick_count[25] ) + ( GND ) + ( \Add0~10  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!tick_count[25]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\Add0~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\Add0~1_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .lut_mask = 64'h000000000A000A00;
-defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .shared_arith = "off";
+defparam \Add0~1 .extended_lut = "off";
+defparam \Add0~1 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \Add0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfd2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kfd2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X51_Y20_N43
+dffeas \tick_count[25] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\Add0~1_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(tick_count[25]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .lut_mask = 64'h0000000000080008;
-defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .shared_arith = "off";
+defparam \tick_count[25] .is_wysiwyg = "true";
+defparam \tick_count[25] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duc2z4~0 (
+// Location: LABCELL_X51_Y20_N48
+cyclonev_lcell_comb \heartbeat~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  ) )
+// \heartbeat~0_combout  = ( tick_count[25] & ( tick_count[23] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!tick_count[23]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!tick_count[25]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.combout(\heartbeat~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .lut_mask = 64'hFF00FF00FB00FB00;
-defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .shared_arith = "off";
+defparam \heartbeat~0 .extended_lut = "off";
+defparam \heartbeat~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \heartbeat~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y20_N26
-dffeas \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE (
+// Location: FF_X51_Y20_N49
+dffeas heartbeat(
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
+	.d(\heartbeat~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -8105,65 +7362,60 @@ dffeas \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.q(\heartbeat~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE .power_up = "low";
+defparam heartbeat.is_wysiwyg = "true";
+defparam heartbeat.power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y19_N56
-dffeas \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE (
+// Location: FF_X23_Y15_N37
+dffeas \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8c2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|B8c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y15_N16
+dffeas \soc_inst|m0_1|u_logic|Aok2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aok2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aok2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N9
+// Location: LABCELL_X24_Y11_N18
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Orewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Orewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Orewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
@@ -8175,461 +7427,501 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Orewx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Orewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Orewx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Orewx4~0 .lut_mask = 64'hCCCCCCCC00000000;
 defparam \soc_inst|m0_1|u_logic|Orewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ibrwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ibrwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tyx2z4~q  & ((\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # (\soc_inst|m0_1|u_logic|M9pvx4~0_combout ))) 
-// ) ) ) # ( \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # (\soc_inst|m0_1|u_logic|Tyx2z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .lut_mask = 64'hF3F3F0F013130000;
-defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y22_N55
-dffeas \soc_inst|m0_1|u_logic|Hxx2z4 (
+// Location: FF_X24_Y15_N22
+dffeas \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.sload(vcc),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hxx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hxx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ju5wx4 (
+// Location: LABCELL_X22_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A0zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ju5wx4~combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|A0zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ju5wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ju5wx4 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Ju5wx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X50_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vbovx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Vbovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .lut_mask = 64'h0000000000200020;
-defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X48_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zlnvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Zlnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Abovx4~0_combout  )
-
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .lut_mask = 64'hFFFFFFFF00FA00FA;
-defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y16_N34
-dffeas \soc_inst|m0_1|u_logic|Nbm2z4 (
+// Location: FF_X21_Y17_N14
+dffeas \soc_inst|interconnect_1|mux_sel[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
+	.d(\soc_inst|interconnect_1|LessThan1~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.q(\soc_inst|interconnect_1|mux_sel [2]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nbm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nbm2z4 .power_up = "low";
+defparam \soc_inst|interconnect_1|mux_sel[2] .is_wysiwyg = "true";
+defparam \soc_inst|interconnect_1|mux_sel[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwqvx4~0 (
+// Location: LABCELL_X31_Y17_N15
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[25]~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Nbm2z4~q ) # (\soc_inst|m0_1|u_logic|Hxx2z4~q )) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  ) )
+// \soc_inst|interconnect_1|HRDATA[25]~1_combout  = ( \soc_inst|interconnect_1|mux_sel [2] & ( (!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q  & !\soc_inst|interconnect_1|mux_sel [1]) ) ) # ( !\soc_inst|interconnect_1|mux_sel [2] & ( 
+// !\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q  $ (!\soc_inst|interconnect_1|mux_sel [1]) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ),
+	.datad(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .lut_mask = 64'h00000000FFFFAFFF;
-defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[25]~1 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[25]~1 .lut_mask = 64'h0FF00FF0F000F000;
+defparam \soc_inst|interconnect_1|HRDATA[25]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y19_N44
-dffeas \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE (
+// Location: FF_X22_Y17_N41
+dffeas \soc_inst|interconnect_1|mux_sel[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|interconnect_1|LessThan0~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.q(\soc_inst|interconnect_1|mux_sel [0]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|interconnect_1|mux_sel[0] .is_wysiwyg = "true";
+defparam \soc_inst|interconnect_1|mux_sel[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ncqvx4~0 (
+// Location: LABCELL_X31_Y17_N0
+cyclonev_lcell_comb \soc_inst|interconnect_1|Equal1~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \soc_inst|interconnect_1|Equal1~0_combout  = ( !\soc_inst|interconnect_1|mux_sel [2] & ( (\soc_inst|interconnect_1|mux_sel [1] & !\soc_inst|interconnect_1|mux_sel [0]) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|Equal1~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|Equal1~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|Equal1~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|interconnect_1|Equal1~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P1c2z4~0 (
+// Location: IOIBUF_X2_Y0_N58
+cyclonev_io_ibuf \SW[9]~input (
+	.i(SW[9]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[9]~input_o ));
+// synopsys translate_off
+defparam \SW[9]~input .bus_hold = "false";
+defparam \SW[9]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: IOIBUF_X36_Y0_N18
+cyclonev_io_ibuf \KEY[1]~input (
+	.i(KEY[1]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\KEY[1]~input_o ));
+// synopsys translate_off
+defparam \KEY[1]~input .bus_hold = "false";
+defparam \KEY[1]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y17_N21
+cyclonev_lcell_comb \soc_inst|switches_1|last_buttons[1]~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P1c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C9yvx4~combout  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
+// \soc_inst|switches_1|last_buttons[1]~0_combout  = ( !\KEY[1]~input_o  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\KEY[1]~input_o ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P1c2z4~0_combout ),
+	.combout(\soc_inst|switches_1|last_buttons[1]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .lut_mask = 64'h0000000C0033003F;
-defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|last_buttons[1]~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|last_buttons[1]~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|switches_1|last_buttons[1]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A0zvx4~0 (
+// Location: FF_X34_Y17_N23
+dffeas \soc_inst|switches_1|last_buttons[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|switches_1|last_buttons[1]~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|last_buttons [1]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|last_buttons[1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|last_buttons[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y17_N0
+cyclonev_lcell_comb \soc_inst|switches_1|always0~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A0zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
+// \soc_inst|switches_1|always0~0_combout  = ( !\KEY[1]~input_o  & ( !\soc_inst|switches_1|last_buttons [1] ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(!\soc_inst|switches_1|last_buttons [1]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\KEY[1]~input_o ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.combout(\soc_inst|switches_1|always0~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|A0zvx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|always0~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|always0~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|switches_1|always0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z7fwx4~0 (
+// Location: FF_X31_Y15_N25
+dffeas \soc_inst|switches_1|switch_store[1][9] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[9]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[1][9]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][9] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][9] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y15_N38
+dffeas \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xkfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Xkfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .lut_mask = 64'h3300330000000000;
+defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zzb2z4~0 (
+// Location: FF_X25_Y15_N56
+dffeas \soc_inst|m0_1|u_logic|L8t2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L8t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L8t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A4c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  
-// & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|A4c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .lut_mask = 64'hFFFF0000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G0c2z4~0 (
+// Location: FF_X24_Y15_N53
+dffeas \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sy2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G0c2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G0c2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .lut_mask = 64'h5000500000000000;
-defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Sy2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~0 (
+// Location: LABCELL_X31_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kryvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jyb2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0c2z4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) 
-// ) )
+// \soc_inst|m0_1|u_logic|Kryvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|A4c2z4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G0c2z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .lut_mask = 64'hDDDFDDDF00000000;
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .lut_mask = 64'h003300330F3F0033;
+defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhiwx4~0 (
+// Location: LABCELL_X27_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B73wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xhiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|B73wx4~combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .lut_mask = 64'h0000000000330033;
-defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B73wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B73wx4 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|B73wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~1 (
+// Location: MLABCELL_X25_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9yvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jyb2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xhiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jyb2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q 
-// )))) ) )
+// \soc_inst|m0_1|u_logic|C9yvx4~combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jyb2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9yvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .lut_mask = 64'h3323332300000000;
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9yvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9yvx4 .lut_mask = 64'hF000F00000000000;
+defparam \soc_inst|m0_1|u_logic|C9yvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~2 (
+// Location: LABCELL_X29_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jyb2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Jyb2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P1c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Msyvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Hklwx4~1_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P1c2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jyb2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .lut_mask = 64'h000000008AAA8AAA;
-defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .lut_mask = 64'hC000C000C0FFC0FF;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y20_N8
-dffeas \soc_inst|m0_1|u_logic|G9w2z4 (
+// Location: FF_X23_Y16_N4
+dffeas \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G9w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G9w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y22_N22
-dffeas \soc_inst|m0_1|u_logic|Y9t2z4 (
+// Location: FF_X24_Y15_N4
+dffeas \soc_inst|m0_1|u_logic|Ark2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -8637,65 +7929,93 @@ dffeas \soc_inst|m0_1|u_logic|Y9t2z4 (
 	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y9t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y9t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ark2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ark2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahwvx4~0 (
+// Location: LABCELL_X36_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdh2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .lut_mask = 64'h0000CFCFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qr42z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qr42z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
+// ((\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qr42z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .lut_mask = 64'hCD00CD00CC11CC11;
+defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Csewx4~0 (
+// Location: LABCELL_X27_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qr42z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Csewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Qr42z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qr42z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Csewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Csewx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Csewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .lut_mask = 64'h0FFF0FFF00000000;
+defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y21_N14
-dffeas \soc_inst|m0_1|u_logic|Pdi2z4 (
+// Location: FF_X24_Y15_N19
+dffeas \soc_inst|m0_1|u_logic|O5t2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -8704,48 +8024,52 @@ dffeas \soc_inst|m0_1|u_logic|Pdi2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pdi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O5t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O5t2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eyhvx4~0 (
+// Location: LABCELL_X27_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eyhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pdi2z4~q  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Gzvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q 
+//  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .lut_mask = 64'h00000000AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .lut_mask = 64'h02460044FF202020;
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N15
+// Location: LABCELL_X27_Y15_N21
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1vvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B1vvx4~0_combout  = (\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )
+// \soc_inst|m0_1|u_logic|B1vvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -8755,183 +8079,208 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1vvx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .lut_mask = 64'h0FFF0FFF0FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
 defparam \soc_inst|m0_1|u_logic|B1vvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp3wx4~0 (
+// Location: LABCELL_X27_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jp3wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qp3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Jp3wx4~combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jp3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jp3wx4 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Jp3wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ae6wx4~0 (
+// Location: LABCELL_X24_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X77wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ae6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|X77wx4~combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .lut_mask = 64'h000000000C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X77wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X77wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|X77wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y24_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ffxvx4~0 (
+// Location: LABCELL_X27_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H0zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ffxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|H0zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gzvvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Jp3wx4~combout  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Jp3wx4~combout  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Jp3wx4~combout  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .lut_mask = 64'h0000000000000505;
-defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .lut_mask = 64'h0505FFFF05050505;
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V1yvx4~0 (
+// Location: LABCELL_X24_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Howvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V1yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Howvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Howvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Howvx4~0 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Howvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md6wx4~0 (
+// Location: LABCELL_X27_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bxcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Md6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Md6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .lut_mask = 64'h0000000030300000;
-defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dc6wx4~0 (
+// Location: LABCELL_X27_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lu6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dc6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Md6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Md6wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Lu6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Md6wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dc6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .lut_mask = 64'hAAAA8A8A00000000;
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dc6wx4~1 (
+// Location: MLABCELL_X28_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wxcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dc6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dc6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Wxcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dc6wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .lut_mask = 64'h00000000F300F300;
-defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y18_N35
-dffeas \soc_inst|m0_1|u_logic|Lny2z4 (
+// Location: FF_X24_Y15_N8
+dffeas \soc_inst|m0_1|u_logic|Emi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -8940,737 +8289,697 @@ dffeas \soc_inst|m0_1|u_logic|Lny2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lny2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lny2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lny2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Emi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Emi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: IOIBUF_X4_Y0_N35
-cyclonev_io_ibuf \SW[6]~input (
-	.i(SW[6]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[6]~input_o ));
-// synopsys translate_off
-defparam \SW[6]~input .bus_hold = "false";
-defparam \SW[6]~input .simulate_z_as = "z";
-// synopsys translate_on
+// Location: MLABCELL_X28_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y1d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q 
+//  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) )
 
-// Location: IOIBUF_X36_Y0_N18
-cyclonev_io_ibuf \KEY[1]~input (
-	.i(KEY[1]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\KEY[1]~input_o ));
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \KEY[1]~input .bus_hold = "false";
-defparam \KEY[1]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .lut_mask = 64'h000030300F003030;
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N48
-cyclonev_lcell_comb \soc_inst|switches_1|last_buttons[1]~0 (
+// Location: LABCELL_X27_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wdxvx4~0 (
 // Equation(s):
-// \soc_inst|switches_1|last_buttons[1]~0_combout  = ( !\KEY[1]~input_o  )
+// \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\KEY[1]~input_o ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|last_buttons[1]~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|last_buttons[1]~0 .extended_lut = "off";
-defparam \soc_inst|switches_1|last_buttons[1]~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|switches_1|last_buttons[1]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y15_N50
-dffeas \soc_inst|switches_1|last_buttons[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|last_buttons[1]~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|last_buttons [1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|last_buttons[1] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|last_buttons[1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N9
-cyclonev_lcell_comb \soc_inst|switches_1|always0~0 (
+// Location: MLABCELL_X28_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~1 (
 // Equation(s):
-// \soc_inst|switches_1|always0~0_combout  = ( !\soc_inst|switches_1|last_buttons [1] & ( !\KEY[1]~input_o  ) )
+// \soc_inst|m0_1|u_logic|Y1d2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\KEY[1]~input_o ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|switches_1|last_buttons [1]),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|always0~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|always0~0 .extended_lut = "off";
-defparam \soc_inst|switches_1|always0~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|switches_1|always0~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y16_N35
-dffeas \soc_inst|switches_1|switch_store[1][6] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[6]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][6]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][6] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][6] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .lut_mask = 64'h33332323F8F8A8A8;
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N36
-cyclonev_lcell_comb \soc_inst|ram_1|byte0~0 (
+// Location: LABCELL_X27_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~2 (
 // Equation(s):
-// \soc_inst|ram_1|byte0~0_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|T50wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Y1d2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y1d2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y1d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|Ark2z4~q 
+// ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y1d2z4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y1d2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|byte0~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte0~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|byte0~0 .lut_mask = 64'hFFFFEEFFAAFFAAFF;
-defparam \soc_inst|ram_1|byte0~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y15_N37
-dffeas \soc_inst|ram_1|byte_select[0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte0~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select [0]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[0] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .lut_mask = 64'h00000000E0E00000;
+defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~0 (
+// Location: LABCELL_X22_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K1wvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y1d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (((\soc_inst|m0_1|u_logic|Sgj2z4~q )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|K1wvx4~combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q ) # (!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ) # (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K1wvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .lut_mask = 64'h0400040004AA04AA;
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K1wvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K1wvx4 .lut_mask = 64'hFFFCFCFC00000000;
+defparam \soc_inst|m0_1|u_logic|K1wvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~1 (
+// Location: LABCELL_X24_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y1d2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((\soc_inst|m0_1|u_logic|Fij2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (!\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|O9qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .lut_mask = 64'h33FC33FC20AC20AC;
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wdxvx4~0 (
+// Location: MLABCELL_X25_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rngwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Rngwx4~combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Wdxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rngwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rngwx4 .lut_mask = 64'hFF00FF00FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Rngwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1d2z4~2 (
+// Location: MLABCELL_X25_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jbhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y1d2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Y1d2z4~0_combout  & (\soc_inst|m0_1|u_logic|Y1d2z4~1_combout  & !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Y1d2z4~0_combout  & (\soc_inst|m0_1|u_logic|Y1d2z4~1_combout  & !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Jbhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & !\soc_inst|m0_1|u_logic|A4t2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y1d2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y1d2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .lut_mask = 64'h0C000C0008000800;
-defparam \soc_inst|m0_1|u_logic|Y1d2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K1wvx4 (
+// Location: LABCELL_X24_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pkxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K1wvx4~combout  = ( \soc_inst|m0_1|u_logic|Y1d2z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Y1d2z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  ) )
+// \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y1d2z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K1wvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K1wvx4 .lut_mask = 64'hFF00FF00F800F800;
-defparam \soc_inst|m0_1|u_logic|K1wvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W28wx4~0 (
+// Location: LABCELL_X27_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ncqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W28wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  )
+// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W28wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W28wx4~0 .lut_mask = 64'hFFFFFFFFFF00FF00;
-defparam \soc_inst|m0_1|u_logic|W28wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .lut_mask = 64'h5555555500000000;
+defparam \soc_inst|m0_1|u_logic|Ncqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Egkwx4~0 (
+// Location: MLABCELL_X25_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Egkwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|R8d2z4~0_combout  = (\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .lut_mask = 64'hFFFF000000000000;
-defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~3 (
+// Location: MLABCELL_X25_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|hprot_o~1_combout  = ( \soc_inst|m0_1|u_logic|hprot_o~0_combout  & ( (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .lut_mask = 64'h00000000000A000A;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~1 .lut_mask = 64'h00000000FF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|hprot_o~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~4 (
+// Location: LABCELL_X27_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Egkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  
-// & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Egkwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .lut_mask = 64'h05000500FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Egkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y19_N5
-dffeas \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE (
+// Location: FF_X25_Y12_N55
+dffeas \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xiwvx4~0 (
+// Location: LABCELL_X31_Y17_N21
+cyclonev_lcell_comb \soc_inst|ram_1|byte0~0 (
+// Equation(s):
+// \soc_inst|ram_1|byte0~0_combout  = ( \soc_inst|m0_1|u_logic|It52z4~2_combout  ) # ( !\soc_inst|m0_1|u_logic|It52z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|T50wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|N5qvx4~0_combout )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|ram_1|byte0~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte0~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte0~0 .lut_mask = 64'hFCECFCECFFFFFFFF;
+defparam \soc_inst|ram_1|byte0~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M66wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xiwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|M66wx4~combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M66wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M66wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M66wx4 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|M66wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y15_N35
-dffeas \soc_inst|ram_1|byte_select[3] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte3~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select [3]),
-	.prn(vcc));
+// Location: LABCELL_X24_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M66wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M66wx4~combout  & ( !\soc_inst|m0_1|u_logic|Og4wx4~0_combout  ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[3] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[3] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .lut_mask = 64'hF0F0F0F0F0C0F0C0;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H9iwx4~0 (
+// Location: LABCELL_X23_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H9iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .lut_mask = 64'hFFF2FFF200000000;
-defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|m0_1|u_logic|Qfdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G36wx4~0 (
+// Location: LABCELL_X24_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mn3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G36wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|L8t2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Mn3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G36wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G36wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G36wx4~0 .lut_mask = 64'h00000A0A0000AAAA;
-defparam \soc_inst|m0_1|u_logic|G36wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .lut_mask = 64'h0000000000005555;
+defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9qvx4~0 (
+// Location: LABCELL_X27_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Socwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O9qvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Emi2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Socwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|O9qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Socwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Socwx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Socwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jppvx4~0 (
+// Location: MLABCELL_X25_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ucqvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jppvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ucqvx4~combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ucqvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ucqvx4 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Ucqvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A76wx4~0 (
+// Location: LABCELL_X24_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdh2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A76wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A76wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A76wx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|A76wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Hdh2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O76wx4 (
+// Location: LABCELL_X24_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O76wx4~combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Ppsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Ucqvx4~combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( (\soc_inst|m0_1|u_logic|Ucqvx4~combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .lut_mask = 64'h0505050505FF05FF;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ppsvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ppsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Socwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (!\soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O76wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O76wx4 .lut_mask = 64'h4040404000000000;
-defparam \soc_inst|m0_1|u_logic|O76wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .lut_mask = 64'hFFFCFFFC00000000;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W46wx4~0 (
+// Location: LABCELL_X24_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W46wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & (((\soc_inst|m0_1|u_logic|O76wx4~combout  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|A76wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|A76wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|C5c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W46wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C5c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W46wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W46wx4~0 .lut_mask = 64'h1111111115111511;
-defparam \soc_inst|m0_1|u_logic|W46wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y18_N13
-dffeas \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .lut_mask = 64'h00FF00FF00F000F0;
+defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4fwx4~0 (
+// Location: MLABCELL_X25_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M4fwx4~0_combout  = (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )
+// \soc_inst|m0_1|u_logic|C5c2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C5c2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .lut_mask = 64'h5500550055005500;
-defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y17_N50
-dffeas \soc_inst|m0_1|u_logic|Hub3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hub3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hub3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hub3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .lut_mask = 64'hAAAAAAAA0A0AAAAA;
+defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rsqvx4~0 (
+// Location: LABCELL_X24_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ju5wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rsqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Ju5wx4~combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .lut_mask = 64'hFF00FF00F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ju5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ju5wx4 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Ju5wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1rvx4~0 (
+// Location: MLABCELL_X28_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vbovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H1rvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rsqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nbm2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Vbovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) 
+// ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .lut_mask = 64'h0F0F000000000000;
-defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .lut_mask = 64'h00000000000000C0;
+defparam \soc_inst|m0_1|u_logic|Vbovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y21_N26
-dffeas \soc_inst|m0_1|u_logic|Uaj2z4 (
+// Location: FF_X24_Y16_N47
+dffeas \soc_inst|m0_1|u_logic|Lz93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -9679,1196 +8988,1295 @@ dffeas \soc_inst|m0_1|u_logic|Uaj2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lz93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uaj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uaj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lz93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lz93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pkxvx4~0 (
+// Location: MLABCELL_X25_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y8pvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Pkxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .lut_mask = 64'hFF00FF00F300F300;
+defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T1xvx4~0 (
+// Location: LABCELL_X24_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T1xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Wpsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Npk2z4~q ))))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .lut_mask = 64'h0000000002070207;
+defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Na6wx4~0 (
+// Location: LABCELL_X23_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ps3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Na6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1xvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ps3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .lut_mask = 64'hFFFFFFFF00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yy5wx4~0 (
+// Location: LABCELL_X24_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yy5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|O76wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Zdc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~q  & (((\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|X77wx4~combout  & ( (\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & \soc_inst|m0_1|u_logic|S4w2z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zdc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .lut_mask = 64'h0505050507050705;
+defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qx52z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qx52z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & \soc_inst|m0_1|u_logic|Egkwx4~0_combout )) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qx52z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y15_N23
+dffeas \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .lut_mask = 64'h0000000000C000C0;
-defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~4_combout  = ( !\soc_inst|m0_1|u_logic|Qx52z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q ))) ) )
+// Location: FF_X25_Y15_N53
+dffeas \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qx52z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X29_Y17_N43
+dffeas \soc_inst|ram_1|write_cycle (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|write_cycle~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|write_cycle~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~4 .lut_mask = 64'hF500F50000000000;
-defparam \soc_inst|m0_1|u_logic|hprot_o~4 .shared_arith = "off";
+defparam \soc_inst|ram_1|write_cycle .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|write_cycle .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rngwx4 (
+// Location: LABCELL_X30_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rngwx4~combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rngwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rngwx4 .lut_mask = 64'hFF00FF00FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Rngwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jbhwx4~0 (
+// Location: FF_X25_Y15_N50
+dffeas \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9pvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jbhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & !\soc_inst|m0_1|u_logic|A4t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|M9pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|Jbhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .lut_mask = 64'hFF55FF55FFF5FFF5;
+defparam \soc_inst|m0_1|u_logic|M9pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8d2z4~0 (
+// Location: LABCELL_X19_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xdfwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R8d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Xdfwx4~combout  = ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|R8d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xdfwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xdfwx4 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Xdfwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ry5wx4~0 (
+// Location: LABCELL_X24_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ry5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Evcwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .lut_mask = 64'h00AA00AA00000000;
-defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .lut_mask = 64'h00CC000000000000;
+defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~0 (
+// Location: LABCELL_X24_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~0_combout  = ( !\soc_inst|m0_1|u_logic|Ry5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout 
-// )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & (((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Fzcwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~0 .lut_mask = 64'hD0DDD0DD00000000;
-defparam \soc_inst|m0_1|u_logic|hprot_o~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .lut_mask = 64'h0003000300000000;
+defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~1 (
+// Location: LABCELL_X24_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T3ovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~1_combout  = ( \soc_inst|m0_1|u_logic|hprot_o~0_combout  & ( (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # ((\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|Ark2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|T3ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~1 .lut_mask = 64'h00000000F5F0F5F0;
-defparam \soc_inst|m0_1|u_logic|hprot_o~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .lut_mask = 64'h3733050000000000;
+defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzxvx4 (
+// Location: LABCELL_X24_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H4ovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzxvx4~combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|H4ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzxvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzxvx4 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Kzxvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sy52z4~0 (
+// Location: LABCELL_X24_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sy52z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Evcwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sy52z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .lut_mask = 64'h0500050000000000;
-defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .lut_mask = 64'h05000A0005000A11;
+defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Huqvx4~0 (
+// Location: LABCELL_X24_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Huqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Evcwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|H4ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Evcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|T3ovx4~0_combout )) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .lut_mask = 64'hA000000000000000;
+defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpzvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y15_N2
+dffeas \soc_inst|m0_1|u_logic|Pdi2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pdi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A4c2z4~0 (
+// Location: MLABCELL_X25_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A4c2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Donvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
+// (((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Donvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .lut_mask = 64'h000000000F0F0000;
-defparam \soc_inst|m0_1|u_logic|A4c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~0 .lut_mask = 64'hA2AAA2AAA2AA020A;
+defparam \soc_inst|m0_1|u_logic|Donvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B73wx4 (
+// Location: MLABCELL_X25_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B73wx4~combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Donvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Donvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B73wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B73wx4 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|B73wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~1 .lut_mask = 64'h0303000003032200;
+defparam \soc_inst|m0_1|u_logic|Donvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0mwx4~0 (
+// Location: MLABCELL_X25_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z0mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( (\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|G97wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G97wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .lut_mask = 64'h00000F0022222F22;
-defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~2 .lut_mask = 64'h000F000F0C0F0C0F;
+defparam \soc_inst|m0_1|u_logic|G97wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~2 (
+// Location: MLABCELL_X25_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~2_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout  & (!\soc_inst|m0_1|u_logic|A76wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout  & !\soc_inst|m0_1|u_logic|A76wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|G97wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~2 .lut_mask = 64'hCC00CC00C400C400;
-defparam \soc_inst|m0_1|u_logic|hprot_o~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|G97wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~3 (
+// Location: MLABCELL_X25_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~3_combout  = ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hprot_o~2_combout  & ( (!\soc_inst|m0_1|u_logic|Sy52z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Y6t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hprot_o~2_combout  & ( !\soc_inst|m0_1|u_logic|Sy52z4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|G97wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((\soc_inst|m0_1|u_logic|Aok2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy52z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G97wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~3 .lut_mask = 64'h00000000FF00AF00;
-defparam \soc_inst|m0_1|u_logic|hprot_o~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G97wx4~1 .lut_mask = 64'h3333333323332333;
+defparam \soc_inst|m0_1|u_logic|G97wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~5 (
+// Location: MLABCELL_X25_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hprot_o~5_combout  = ( \soc_inst|m0_1|u_logic|hprot_o~3_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~4_combout  & (\soc_inst|m0_1|u_logic|hprot_o~1_combout  & ((!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Wa7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|hprot_o~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|hprot_o~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hprot_o~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hprot_o~5 .lut_mask = 64'h0000000000320032;
-defparam \soc_inst|m0_1|u_logic|hprot_o~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .lut_mask = 64'hCC00CC000A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5qvx4 (
+// Location: MLABCELL_X25_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U5qvx4~combout  = ( !\soc_inst|m0_1|u_logic|hprot_o~5_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Donvx4~2_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wa7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Donvx4~0_combout  & !\soc_inst|m0_1|u_logic|Donvx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G97wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wa7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Donvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Donvx4~1_combout  & (!\soc_inst|m0_1|u_logic|G97wx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|G97wx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G97wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G97wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5qvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U5qvx4 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|U5qvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Donvx4~2 .lut_mask = 64'h0040444400000000;
+defparam \soc_inst|m0_1|u_logic|Donvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y17_N41
-dffeas \soc_inst|m0_1|u_logic|Wxp2z4 (
+// Location: FF_X19_Y13_N14
+dffeas \soc_inst|m0_1|u_logic|Hxx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hxx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wxp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wxp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hxx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hxx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qaiwx4~0 (
+// Location: LABCELL_X19_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S5pvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|S5pvx4~combout  = ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .lut_mask = 64'hFF00FF00FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S5pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S5pvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|S5pvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H4nwx4 (
+// Location: LABCELL_X19_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yghvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H4nwx4~combout  = ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Yghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (\soc_inst|m0_1|u_logic|Tyx2z4~q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Hxx2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & (((\soc_inst|m0_1|u_logic|Tyx2z4~q )))) # (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Hxx2z4~q  & \soc_inst|m0_1|u_logic|Tyx2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H4nwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H4nwx4 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|H4nwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .lut_mask = 64'h22EF22EF00CF00CF;
+defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8rwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q8rwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y13_N23
+dffeas \soc_inst|m0_1|u_logic|Tyx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .lut_mask = 64'hEFFFECFC00000000;
-defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tyx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tyx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oldwx4~0 (
+// Location: LABCELL_X19_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ibrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oldwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  $ 
-// (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ibrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Tyx2z4~q  & !\soc_inst|m0_1|u_logic|Hxx2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Tyx2z4~q  & (\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hxx2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .lut_mask = 64'hF00FF00FF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .lut_mask = 64'hF1F0F1F055005500;
+defparam \soc_inst|m0_1|u_logic|Ibrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxc2z4 (
+// Location: FF_X19_Y13_N13
+dffeas \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ibrwx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y13_N22
+dffeas \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qxc2z4~combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|B8c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxc2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxc2z4 .lut_mask = 64'h0000FFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Qxc2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|B8c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lcowx4~0 (
+// Location: LABCELL_X30_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lcowx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Qxc2z4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & ((\soc_inst|m0_1|u_logic|Qxc2z4~combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Scpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bpsvx4~0_combout  & \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.dataf(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Scpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .lut_mask = 64'h30F010F030F010F0;
-defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~0 (
+// Location: LABCELL_X24_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I1c2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lhyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (!\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|I1c2z4~combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I1c2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .lut_mask = 64'hE0E0E0E000000000;
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I1c2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I1c2z4 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|m0_1|u_logic|I1c2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~1 (
+// Location: LABCELL_X27_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P1c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lhyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qxc2z4~combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qxc2z4~combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|P1c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|C9yvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|C9yvx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P1c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .lut_mask = 64'hFF330A02FF000A00;
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .lut_mask = 64'h00000300000003FF;
+defparam \soc_inst|m0_1|u_logic|P1c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ps3wx4~0 (
+// Location: LABCELL_X23_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zzb2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ps3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  )
+// \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .lut_mask = 64'hFFFFFFFF00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Ps3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .lut_mask = 64'hFFFFFFFF00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Zzb2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~2 (
+// Location: LABCELL_X23_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z7fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ps3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .lut_mask = 64'h0707070777077707;
-defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Z7fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X8zvx4 (
+// Location: LABCELL_X23_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G0c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X8zvx4~combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|G0c2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|G0c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X8zvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X8zvx4 .lut_mask = 64'h0000808000000000;
-defparam \soc_inst|m0_1|u_logic|X8zvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .lut_mask = 64'h5000500000000000;
+defparam \soc_inst|m0_1|u_logic|G0c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Muawx4~0 (
+// Location: LABCELL_X23_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Muawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (((\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Jyb2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G0c2z4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Zzb2z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G0c2z4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G0c2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Muawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Muawx4~0 .lut_mask = 64'h20202020202220AA;
-defparam \soc_inst|m0_1|u_logic|Muawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .lut_mask = 64'hFFFF0F3F00000000;
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T3ovx4~0 (
+// Location: LABCELL_X23_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T3ovx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xhiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .lut_mask = 64'h3070303000500000;
-defparam \soc_inst|m0_1|u_logic|T3ovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Xhiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzcwx4~0 (
+// Location: LABCELL_X23_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzcwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Jyb2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xhiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jyb2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jyb2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .lut_mask = 64'h0005000500000000;
-defparam \soc_inst|m0_1|u_logic|Fzcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .lut_mask = 64'h3323332300000000;
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H4ovx4~0 (
+// Location: FF_X23_Y15_N26
+dffeas \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H4ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .lut_mask = 64'h0000000000500050;
-defparam \soc_inst|m0_1|u_logic|H4ovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~0 (
+// Location: LABCELL_X24_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qaqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Evcwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~q  ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~q  & ( \soc_inst|m0_1|u_logic|L8t2z4~q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .lut_mask = 64'h0C000C0000000000;
-defparam \soc_inst|m0_1|u_logic|Evcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~1 (
+// Location: LABCELL_X18_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6nwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Evcwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|E6nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .lut_mask = 64'h1122000011220005;
-defparam \soc_inst|m0_1|u_logic|Evcwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .lut_mask = 64'h5050505055555050;
+defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzawx4 (
+// Location: MLABCELL_X28_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z1ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzawx4~combout  = ( \soc_inst|m0_1|u_logic|Evcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Evcwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Evcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Evcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & !\soc_inst|m0_1|u_logic|H4ovx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzawx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzawx4 .lut_mask = 64'h8F0F0F0F0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Wzawx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .lut_mask = 64'hAAAAAAAA00000000;
+defparam \soc_inst|m0_1|u_logic|Z1ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jucwx4~0 (
+// Location: LABCELL_X30_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A76wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jucwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & (((\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|A4t2z4~q 
-// ))) ) ) # ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A4t2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|A76wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .lut_mask = 64'h0505050507050705;
-defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A76wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A76wx4~0 .lut_mask = 64'h3030303000000000;
+defparam \soc_inst|m0_1|u_logic|A76wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkxvx4~0 (
+// Location: MLABCELL_X25_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O76wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|O76wx4~combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O76wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O76wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O76wx4 .lut_mask = 64'h0000C0C000000000;
+defparam \soc_inst|m0_1|u_logic|O76wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Otcwx4~0 (
+// Location: LABCELL_X27_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W46wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Otcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) 
-// )
+// \soc_inst|m0_1|u_logic|W46wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & (((\soc_inst|m0_1|u_logic|O76wx4~combout  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|A76wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|A76wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Otcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W46wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .lut_mask = 64'h00050005AA05AA05;
-defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W46wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W46wx4~0 .lut_mask = 64'h1111111115111511;
+defparam \soc_inst|m0_1|u_logic|W46wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuawx4~0 (
+// Location: LABCELL_X29_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G36wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuawx4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Otcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jucwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Otcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jucwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|G36wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Rexvx4~0_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Otcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G36wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .lut_mask = 64'hFF00F30000000000;
-defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G36wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G36wx4~0 .lut_mask = 64'h000000000CCC0CCC;
+defparam \soc_inst|m0_1|u_logic|G36wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuawx4~1 (
+// Location: MLABCELL_X21_Y12_N42
+cyclonev_lcell_comb \soc_inst|ram_1|byte3~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )) ) )
+// \soc_inst|ram_1|byte3~0_combout  = ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.combout(\soc_inst|ram_1|byte3~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .lut_mask = 64'hCCFCCCFC00F000F0;
-defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|byte3~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte3~0 .lut_mask = 64'hC0FFE0FFC0FFF1FF;
+defparam \soc_inst|ram_1|byte3~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xdfwx4 (
+// Location: FF_X31_Y16_N53
+dffeas \soc_inst|ram_1|byte_select[3]~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|ram_1|byte3~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[3]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[3]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y17_N6
+cyclonev_lcell_comb \soc_inst|ram_1|read_cycle~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xdfwx4~combout  = ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  ) )
+// \soc_inst|ram_1|read_cycle~0_combout  = (!\soc_inst|m0_1|u_logic|hwrite_o~0_combout  & \soc_inst|ram_1|always1~0_combout )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.datad(!\soc_inst|ram_1|always1~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.combout(\soc_inst|ram_1|read_cycle~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xdfwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xdfwx4 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Xdfwx4 .shared_arith = "off";
+defparam \soc_inst|ram_1|read_cycle~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|read_cycle~0 .lut_mask = 64'h00F000F000F000F0;
+defparam \soc_inst|ram_1|read_cycle~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y25_N53
-dffeas \soc_inst|m0_1|u_logic|Cax2z4 (
+// Location: FF_X31_Y17_N7
+dffeas \soc_inst|ram_1|read_cycle (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
+	.d(\soc_inst|ram_1|read_cycle~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -10877,300 +10285,409 @@ dffeas \soc_inst|m0_1|u_logic|Cax2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cax2z4~q ),
+	.q(\soc_inst|ram_1|read_cycle~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cax2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cax2z4 .power_up = "low";
+defparam \soc_inst|ram_1|read_cycle .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|read_cycle .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa7wx4~0 (
+// Location: LABCELL_X31_Y16_N48
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[26]~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|interconnect_1|HRDATA[26]~0_combout  = ( \soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q  & ( !\soc_inst|interconnect_1|mux_sel [1] & ( (!\soc_inst|interconnect_1|mux_sel [2] & (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & 
+// \soc_inst|ram_1|read_cycle~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|mux_sel [2]),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|read_cycle~q ),
+	.datae(!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa7wx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .lut_mask = 64'hF000F00022222222;
-defparam \soc_inst|m0_1|u_logic|Wa7wx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[26]~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[26]~0 .lut_mask = 64'h0000000A00000000;
+defparam \soc_inst|interconnect_1|HRDATA[26]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~1 (
+// Location: MLABCELL_X34_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvqvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Donvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sgj2z4~q )))) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q 
-// )))) ) ) )
+// \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & \soc_inst|m0_1|u_logic|Xnrvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Donvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Donvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Donvx4~1 .lut_mask = 64'h0000335000003300;
-defparam \soc_inst|m0_1|u_logic|Donvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .lut_mask = 64'h0000000000000040;
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~2 (
+// Location: LABCELL_X27_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G97wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G97wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G97wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G97wx4~2 .lut_mask = 64'h0055005550555055;
-defparam \soc_inst|m0_1|u_logic|G97wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .lut_mask = 64'hFFFF000000000000;
+defparam \soc_inst|m0_1|u_logic|Wkxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G97wx4~1 (
+// Location: FF_X23_Y18_N55
+dffeas \soc_inst|ram_1|saved_word_address[2] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|saved_word_address [2]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[2] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[2] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y17_N42
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[2]~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G97wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  ) )
+// \soc_inst|ram_1|memory.raddr_a[2]~2_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yuovx4~combout )) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// ((\soc_inst|ram_1|saved_word_address [2]))) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [2] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|saved_word_address [2]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G97wx4~1_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[2]~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G97wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G97wx4~1 .lut_mask = 64'h0F0F0F0F0D0F0D0F;
-defparam \soc_inst|m0_1|u_logic|G97wx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .lut_mask = 64'h0F0F0F0F47474747;
+defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~0 (
+// Location: FF_X28_Y15_N13
+dffeas \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Donvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|E4xvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Donvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Donvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Donvx4~0 .lut_mask = 64'hCCC0CCC04444CCCC;
-defparam \soc_inst|m0_1|u_logic|Donvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Donvx4~2 (
+// Location: LABCELL_X30_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dplwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Donvx4~2_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout  & !\soc_inst|m0_1|u_logic|Donvx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|G97wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Donvx4~1_combout  & (!\soc_inst|m0_1|u_logic|G97wx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|G97wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Dplwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) 
+// ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wa7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G97wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|G97wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Donvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Donvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Donvx4~2 .lut_mask = 64'h0000000000808888;
-defparam \soc_inst|m0_1|u_logic|Donvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .lut_mask = 64'h08CC080000CC0000;
+defparam \soc_inst|m0_1|u_logic|Dplwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Evcwx4~2 (
+// Location: LABCELL_X30_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cllwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Evcwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4ovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Evcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Cllwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dplwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dplwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .lut_mask = 64'h8000800000000000;
-defparam \soc_inst|m0_1|u_logic|Evcwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .lut_mask = 64'hAA22AA228A028A02;
+defparam \soc_inst|m0_1|u_logic|Cllwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L4bwx4~0 (
+// Location: FF_X25_Y13_N41
+dffeas \soc_inst|m0_1|u_logic|I6z2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I6z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I6z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L4bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Lwqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L4bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .lut_mask = 64'h0010000000000000;
-defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .lut_mask = 64'h00000000FDFDFFFF;
+defparam \soc_inst|m0_1|u_logic|Lwqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dsqvx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Dsqvx4~combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|C2yvx4~combout ) ) )
+// Location: IOIBUF_X16_Y0_N18
+cyclonev_io_ibuf \SW[5]~input (
+	.i(SW[5]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[5]~input_o ));
+// synopsys translate_off
+defparam \SW[5]~input .bus_hold = "false";
+defparam \SW[5]~input .simulate_z_as = "z";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: IOIBUF_X36_Y0_N1
+cyclonev_io_ibuf \KEY[0]~input (
+	.i(KEY[0]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\KEY[0]~input_o ));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dsqvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dsqvx4 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Dsqvx4 .shared_arith = "off";
+defparam \KEY[0]~input .bus_hold = "false";
+defparam \KEY[0]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvewx4~0 (
+// Location: MLABCELL_X34_Y17_N9
+cyclonev_lcell_comb \soc_inst|switches_1|last_buttons[0]~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wvewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  ) )
+// \soc_inst|switches_1|last_buttons[0]~1_combout  = !\KEY[0]~input_o 
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataa(!\KEY[0]~input_o ),
+	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.combout(\soc_inst|switches_1|last_buttons[0]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .lut_mask = 64'h0000CCCC0000CCCC;
-defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|last_buttons[0]~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|last_buttons[0]~1 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
+defparam \soc_inst|switches_1|last_buttons[0]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5fwx4~0 (
+// Location: FF_X34_Y17_N11
+dffeas \soc_inst|switches_1|last_buttons[0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|switches_1|last_buttons[0]~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|last_buttons [0]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|last_buttons[0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|last_buttons[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y17_N6
+cyclonev_lcell_comb \soc_inst|switches_1|always0~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H5fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~q  ) )
+// \soc_inst|switches_1|always0~1_combout  = ( !\soc_inst|switches_1|last_buttons [0] & ( !\KEY[0]~input_o  ) )
 
-	.dataa(gnd),
+	.dataa(!\KEY[0]~input_o ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.dataf(!\soc_inst|switches_1|last_buttons [0]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.combout(\soc_inst|switches_1|always0~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|always0~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|always0~1 .lut_mask = 64'hAAAAAAAA00000000;
+defparam \soc_inst|switches_1|always0~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y20_N41
+dffeas \soc_inst|switches_1|switch_store[0][5] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[5]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][5]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][5] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][5] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X31_Y17_N22
+dffeas \soc_inst|ram_1|byte_select[0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|byte0~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|byte_select [0]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[0] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N15
+// Location: LABCELL_X35_Y12_N48
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhxvx4 (
 // Equation(s):
 // \soc_inst|m0_1|u_logic|Xhxvx4~combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -11180,20 +10697,20 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhxvx4 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Xhxvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhxvx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Xhxvx4 .lut_mask = 64'h000000000F0F0F0F;
 defparam \soc_inst|m0_1|u_logic|Xhxvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N27
+// Location: LABCELL_X31_Y13_N57
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Icyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -11204,728 +10721,731 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icyvx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .lut_mask = 64'h00000000CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .lut_mask = 64'h00000000FFFF0000;
 defparam \soc_inst|m0_1|u_logic|Icyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ukpvx4 (
+// Location: IOIBUF_X4_Y0_N35
+cyclonev_io_ibuf \SW[6]~input (
+	.i(SW[6]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[6]~input_o ));
+// synopsys translate_off
+defparam \SW[6]~input .bus_hold = "false";
+defparam \SW[6]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N11
+dffeas \soc_inst|switches_1|switch_store[1][6] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[6]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[1][6]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][6] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzawx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ukpvx4~combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Wzawx4~combout  = ( \soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Evcwx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|H4ovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & !\soc_inst|m0_1|u_logic|Evcwx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Evcwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Evcwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzawx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzawx4 .lut_mask = 64'hB333333333333333;
+defparam \soc_inst|m0_1|u_logic|Wzawx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uwyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uwyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ukpvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ukpvx4 .lut_mask = 64'hCCCCCCCC00000000;
-defparam \soc_inst|m0_1|u_logic|Ukpvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .lut_mask = 64'h0000000000100010;
+defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5dwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y5dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .lut_mask = 64'h4050005050500050;
+defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpqvx4~0 (
+// Location: MLABCELL_X25_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zpqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( (\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|H5fwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|W4dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .lut_mask = 64'h000000000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y20_N59
-dffeas \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .lut_mask = 64'h00000000CFFFCFFF;
+defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irqvx4~0 (
+// Location: LABCELL_X24_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4dwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Irqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G97wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Huqvx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Huqvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|W4dwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .lut_mask = 64'h00F000F0C0F0C0F0;
-defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .lut_mask = 64'h000000000A2A0A2A;
+defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irqvx4~1 (
+// Location: MLABCELL_X25_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Irqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nbm2z4~q  & ( \soc_inst|m0_1|u_logic|Irqvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|D1awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( \soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & (((!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Y5dwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( \soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( !\soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( !\soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D1awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D1awx4~0 .lut_mask = 64'h30307070F030F070;
+defparam \soc_inst|m0_1|u_logic|D1awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N42
-cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~2 (
+// Location: LABCELL_X23_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mddwx4~1 (
 // Equation(s):
-// \soc_inst|switches_1|half_word_address~2_combout  = ( \soc_inst|switches_1|half_word_address~1_combout  & ( \soc_inst|m0_1|u_logic|Fvovx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Mddwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|switches_1|half_word_address~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|half_word_address~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mddwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address~2 .extended_lut = "off";
-defparam \soc_inst|switches_1|half_word_address~2 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|switches_1|half_word_address~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y15_N43
-dffeas \soc_inst|switches_1|half_word_address[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|half_word_address~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|half_word_address [1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address[1] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|half_word_address[1] .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X43_Y15_N38
-dffeas \soc_inst|ram_1|byte_select[0]~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte0~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select[0]~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[0]~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[0]~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .lut_mask = 64'h3F0F3F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N24
-cyclonev_lcell_comb \soc_inst|switches_1|read_enable~0 (
+// Location: LABCELL_X23_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mddwx4~0 (
 // Equation(s):
-// \soc_inst|switches_1|read_enable~0_combout  = ( \soc_inst|switches_1|half_word_address~1_combout  & ( !\soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Mddwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q 
+// )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|switches_1|half_word_address~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mddwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|read_enable~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|read_enable~0 .extended_lut = "off";
-defparam \soc_inst|switches_1|read_enable~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|switches_1|read_enable~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y15_N25
-dffeas \soc_inst|switches_1|read_enable (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|read_enable~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|read_enable~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|read_enable .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|read_enable .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .lut_mask = 64'h0000003F00005F7F;
+defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N24
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~37 (
+// Location: LABCELL_X23_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kcdwx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[1]~37_combout  = ( !\soc_inst|interconnect_1|mux_sel [0] & ( (((!\soc_inst|switches_1|read_enable~q ) # ((!\soc_inst|interconnect_1|mux_sel [1]) # (\soc_inst|interconnect_1|mux_sel [2]))) # 
-// (\soc_inst|switches_1|half_word_address [0])) ) ) # ( \soc_inst|interconnect_1|mux_sel [0] & ( (!\soc_inst|ram_1|byte_select[0]~DUPLICATE_q ) # (((!\soc_inst|ram_1|read_cycle~q ) # ((\soc_inst|interconnect_1|mux_sel [1]) # 
-// (\soc_inst|interconnect_1|mux_sel [2])))) ) )
+// \soc_inst|m0_1|u_logic|Kcdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Emi2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select[0]~DUPLICATE_q ),
-	.datab(!\soc_inst|switches_1|half_word_address [0]),
-	.datac(!\soc_inst|ram_1|read_cycle~q ),
-	.datad(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datae(!\soc_inst|interconnect_1|mux_sel [0]),
-	.dataf(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datag(!\soc_inst|switches_1|read_enable~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[1]~37 .extended_lut = "on";
-defparam \soc_inst|interconnect_1|HRDATA[1]~37 .lut_mask = 64'hFFFFFAFFF3FFFFFF;
-defparam \soc_inst|interconnect_1|HRDATA[1]~37 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .lut_mask = 64'h3030BA3030303030;
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N18
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~20 (
+// Location: LABCELL_X23_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jfdwx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[1]~20_combout  = ( !\soc_inst|interconnect_1|HRDATA[1]~37_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout ) # (!\soc_inst|switches_1|half_word_address [1]) ) )
+// \soc_inst|m0_1|u_logic|Jfdwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|switches_1|half_word_address [1]),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[1]~20 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[1]~20 .lut_mask = 64'hFFAAFFAA00000000;
-defparam \soc_inst|interconnect_1|HRDATA[1]~20 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .lut_mask = 64'h5000500000000000;
+defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N30
-cyclonev_lcell_comb \soc_inst|switches_1|DataValid~0 (
+// Location: LABCELL_X23_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kcdwx4~1 (
 // Equation(s):
-// \soc_inst|switches_1|DataValid~0_combout  = ( \soc_inst|switches_1|DataValid [1] & ( \soc_inst|switches_1|half_word_address [0] & ( (!\soc_inst|switches_1|read_enable~q ) # (((!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o )) # 
-// (\soc_inst|switches_1|half_word_address [1])) ) ) ) # ( !\soc_inst|switches_1|DataValid [1] & ( \soc_inst|switches_1|half_word_address [0] & ( (!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o ) ) ) ) # ( \soc_inst|switches_1|DataValid [1] & ( 
-// !\soc_inst|switches_1|half_word_address [0] ) ) # ( !\soc_inst|switches_1|DataValid [1] & ( !\soc_inst|switches_1|half_word_address [0] & ( (!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o ) ) ) )
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jfdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jfdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kcdwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((\soc_inst|m0_1|u_logic|Emi2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Jfdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jfdwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kcdwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Emi2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|switches_1|read_enable~q ),
-	.datab(!\soc_inst|switches_1|last_buttons [1]),
-	.datac(!\KEY[1]~input_o ),
-	.datad(!\soc_inst|switches_1|half_word_address [1]),
-	.datae(!\soc_inst|switches_1|DataValid [1]),
-	.dataf(!\soc_inst|switches_1|half_word_address [0]),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|DataValid~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|DataValid~0 .extended_lut = "off";
-defparam \soc_inst|switches_1|DataValid~0 .lut_mask = 64'hC0C0FFFFC0C0EAFF;
-defparam \soc_inst|switches_1|DataValid~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y15_N31
-dffeas \soc_inst|switches_1|DataValid[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|DataValid~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|DataValid [1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|DataValid[1] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|DataValid[1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .lut_mask = 64'hD0F0C0C0D0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N15
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~19 (
+// Location: LABCELL_X23_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W19wx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[1]~19_combout  = ( !\soc_inst|interconnect_1|HRDATA[1]~37_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|half_word_address [1]) ) )
+// \soc_inst|m0_1|u_logic|W19wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q 
+//  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|switches_1|half_word_address [1]),
-	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[1]~19 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[1]~19 .lut_mask = 64'hFF0FFF0F00000000;
-defparam \soc_inst|interconnect_1|HRDATA[1]~19 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W19wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W19wx4~0 .lut_mask = 64'hFF00FF000F000F00;
+defparam \soc_inst|m0_1|u_logic|W19wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: IOIBUF_X16_Y0_N1
-cyclonev_io_ibuf \SW[1]~input (
-	.i(SW[1]),
+// Location: IOIBUF_X8_Y0_N35
+cyclonev_io_ibuf \SW[2]~input (
+	.i(SW[2]),
 	.ibar(gnd),
 	.dynamicterminationcontrol(gnd),
-	.o(\SW[1]~input_o ));
+	.o(\SW[2]~input_o ));
 // synopsys translate_off
-defparam \SW[1]~input .bus_hold = "false";
-defparam \SW[1]~input .simulate_z_as = "z";
+defparam \SW[2]~input .bus_hold = "false";
+defparam \SW[2]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: IOIBUF_X36_Y0_N1
-cyclonev_io_ibuf \KEY[0]~input (
-	.i(KEY[0]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\KEY[0]~input_o ));
+// Location: FF_X31_Y15_N32
+dffeas \soc_inst|switches_1|switch_store[1][2] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[2]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[1][2]~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \KEY[0]~input .bus_hold = "false";
-defparam \KEY[0]~input .simulate_z_as = "z";
+defparam \soc_inst|switches_1|switch_store[1][2] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N39
-cyclonev_lcell_comb \soc_inst|switches_1|last_buttons[0]~1 (
+// Location: LABCELL_X23_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jucwx4~0 (
 // Equation(s):
-// \soc_inst|switches_1|last_buttons[0]~1_combout  = ( !\KEY[0]~input_o  )
+// \soc_inst|m0_1|u_logic|Jucwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|A4t2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|G97wx4~0_combout )) # (\soc_inst|m0_1|u_logic|A4t2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\KEY[0]~input_o ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|last_buttons[0]~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|last_buttons[0]~1 .extended_lut = "off";
-defparam \soc_inst|switches_1|last_buttons[0]~1 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|switches_1|last_buttons[0]~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y15_N41
-dffeas \soc_inst|switches_1|last_buttons[0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|last_buttons[0]~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|last_buttons [0]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|last_buttons[0] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|last_buttons[0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .lut_mask = 64'h0057005700550055;
+defparam \soc_inst|m0_1|u_logic|Jucwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N6
-cyclonev_lcell_comb \soc_inst|switches_1|always0~1 (
+// Location: LABCELL_X23_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Otcwx4~0 (
 // Equation(s):
-// \soc_inst|switches_1|always0~1_combout  = ( !\soc_inst|switches_1|last_buttons [0] & ( !\KEY[0]~input_o  ) )
+// \soc_inst|m0_1|u_logic|Otcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\KEY[0]~input_o ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|switches_1|last_buttons [0]),
+	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|always0~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Otcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|always0~1 .extended_lut = "off";
-defparam \soc_inst|switches_1|always0~1 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|switches_1|always0~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y15_N2
-dffeas \soc_inst|switches_1|switch_store[0][1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[1]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][1]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][1] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .lut_mask = 64'h0C000C000C330C33;
+defparam \soc_inst|m0_1|u_logic|Otcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N36
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[1]~12 (
+// Location: LABCELL_X23_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuawx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[1]~12_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (\soc_inst|ram_1|write_cycle~q  & ((!\soc_inst|ram_1|byte_select [0]) # (\soc_inst|m0_1|u_logic|hwdata_o [1]))) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|m0_1|u_logic|hwdata_o [1] & \soc_inst|ram_1|byte_select [0])) ) )
+// \soc_inst|m0_1|u_logic|Fuawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Otcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jucwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|L8t2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Otcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jucwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
-	.datac(!\soc_inst|ram_1|byte_select [0]),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Otcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[1]~12_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[1]~12 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[1]~12 .lut_mask = 64'h0101010151515151;
-defparam \soc_inst|ram_1|data_to_memory[1]~12 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .lut_mask = 64'hCCCC8C8C00000000;
+defparam \soc_inst|m0_1|u_logic|Fuawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asbvx4 (
+// Location: MLABCELL_X21_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Asbvx4~combout  = ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  ) ) # ( 
-// \soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fuawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Asbvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Asbvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Asbvx4 .lut_mask = 64'h0800FFFFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Asbvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .lut_mask = 64'hAA00AA00FAF0FAF0;
+defparam \soc_inst|m0_1|u_logic|Fuawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mddwx4~1 (
+// Location: LABCELL_X17_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Muawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mddwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Muawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mddwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .lut_mask = 64'h33BB33BB00000000;
-defparam \soc_inst|m0_1|u_logic|Mddwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Muawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Muawx4~0 .lut_mask = 64'h3030317500000000;
+defparam \soc_inst|m0_1|u_logic|Muawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mddwx4~0 (
+// Location: LABCELL_X17_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X8zvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mddwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Mddwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|X8zvx4~combout  = ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~q 
+// )) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mddwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .lut_mask = 64'h0005050503070F0F;
-defparam \soc_inst|m0_1|u_logic|Mddwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X8zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X8zvx4 .lut_mask = 64'h5000000000000000;
+defparam \soc_inst|m0_1|u_logic|X8zvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jfdwx4~0 (
+// Location: LABCELL_X30_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2yvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jfdwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|C2yvx4~combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .lut_mask = 64'h2020202000000000;
-defparam \soc_inst|m0_1|u_logic|Jfdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C2yvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2yvx4 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|C2yvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kcdwx4~0 (
+// Location: MLABCELL_X34_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z3yvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kcdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # ((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Z3yvx4~combout  = ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (((!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Hyy2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .lut_mask = 64'h4F440F000F000F00;
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z3yvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z3yvx4 .lut_mask = 64'h0000000012301230;
+defparam \soc_inst|m0_1|u_logic|Z3yvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kcdwx4~1 (
+// Location: MLABCELL_X34_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Kcdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # 
-// ((!\soc_inst|m0_1|u_logic|Jfdwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Rmpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Z3yvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|U2x2z4~q ) # ((!\soc_inst|m0_1|u_logic|Xhxvx4~combout ) # (!\soc_inst|m0_1|u_logic|Ukpvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jfdwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kcdwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .lut_mask = 64'hBFAA0000AEAA0000;
-defparam \soc_inst|m0_1|u_logic|Kcdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .lut_mask = 64'hF0E0F0E0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W19wx4~0 (
+// Location: FF_X31_Y14_N25
+dffeas \soc_inst|m0_1|u_logic|Dvy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|H5nvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dvy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dvy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W19wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Rmpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (\soc_inst|m0_1|u_logic|Rmpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (\soc_inst|m0_1|u_logic|Rmpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rmpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W19wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W19wx4~0 .lut_mask = 64'hFF00FF000F000F00;
-defparam \soc_inst|m0_1|u_logic|W19wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .lut_mask = 64'h3311331130103010;
+defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y14_N53
+dffeas \soc_inst|m0_1|u_logic|Yzi2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yzi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yzi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~1 (
+// Location: LABCELL_X30_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vapvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((\soc_inst|m0_1|u_logic|Sgj2z4~q ))))) ) )
+// \soc_inst|m0_1|u_logic|Vapvx4~combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & (\soc_inst|m0_1|u_logic|Vaw2z4~q  & ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .lut_mask = 64'h880A880A88008800;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vapvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vapvx4 .lut_mask = 64'h0000000001110111;
+defparam \soc_inst|m0_1|u_logic|Vapvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mk6wx4~0 (
+// Location: LABCELL_X31_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mk6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~q  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Qdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout )) # (\soc_inst|interconnect_1|HRDATA[0]~32_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & !\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .lut_mask = 64'hA0A0A0A0A0FFA0FF;
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: IOIBUF_X2_Y0_N58
-cyclonev_io_ibuf \SW[9]~input (
-	.i(SW[9]),
+// Location: IOIBUF_X12_Y0_N18
+cyclonev_io_ibuf \SW[0]~input (
+	.i(SW[0]),
 	.ibar(gnd),
 	.dynamicterminationcontrol(gnd),
-	.o(\SW[9]~input_o ));
+	.o(\SW[0]~input_o ));
 // synopsys translate_off
-defparam \SW[9]~input .bus_hold = "false";
-defparam \SW[9]~input .simulate_z_as = "z";
+defparam \SW[0]~input .bus_hold = "false";
+defparam \SW[0]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: FF_X46_Y15_N44
-dffeas \soc_inst|switches_1|switch_store[1][9] (
+// Location: FF_X31_Y15_N29
+dffeas \soc_inst|switches_1|switch_store[1][0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[9]~input_o ),
+	.asdata(\SW[0]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -11933,161 +11453,148 @@ dffeas \soc_inst|switches_1|switch_store[1][9] (
 	.ena(\soc_inst|switches_1|always0~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][9]~q ),
+	.q(\soc_inst|switches_1|switch_store[1][0]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][9] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][9] .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[1][0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][0] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bnnvx4 (
+// Location: LABCELL_X31_Y15_N27
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[16]~30 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bnnvx4~combout  = ( \soc_inst|m0_1|u_logic|Fcj2z4~q  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q 
-//  $ (\soc_inst|m0_1|u_logic|Tyx2z4~q )) # (\soc_inst|m0_1|u_logic|Hxx2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fcj2z4~q  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & 
-// ( ((!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Tyx2z4~q ))) # (\soc_inst|m0_1|u_logic|Hxx2z4~q ) ) ) )
+// \soc_inst|interconnect_1|HRDATA[16]~30_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
+// (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[1][0]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( 
+// (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (((\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|switches_1|switch_store[1][0]~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[1][0]~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bnnvx4~combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bnnvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bnnvx4 .lut_mask = 64'hFFB7FFFFB7B7FFFF;
-defparam \soc_inst|m0_1|u_logic|Bnnvx4 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[16]~30 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[16]~30 .lut_mask = 64'h888D888DD8DDD8DD;
+defparam \soc_inst|interconnect_1|HRDATA[16]~30 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~29 (
+// Location: LABCELL_X31_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qqhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~29_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Bnnvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tyx2z4~q  & (!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) + ( 
-// !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( !VCC ))
-// \soc_inst|m0_1|u_logic|Add3~30  = CARRY(( (!\soc_inst|m0_1|u_logic|Bnnvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tyx2z4~q  & (!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|G7x2z4~q  
-// ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|Qqhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[16]~30_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[16]~30_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bnnvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~29_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~30 ),
+	.combout(\soc_inst|m0_1|u_logic|Qqhvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~29 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~29 .lut_mask = 64'h000000FF0000FF08;
-defparam \soc_inst|m0_1|u_logic|Add3~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~25 (
+// Location: FF_X31_Y14_N10
+dffeas \soc_inst|m0_1|u_logic|Ydw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qqhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ydw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ydw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ydw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~30  ))
-// \soc_inst|m0_1|u_logic|Add3~26  = CARRY(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~30  ))
+// \soc_inst|m0_1|u_logic|Qdnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ydw2z4~q ) # ((!\soc_inst|m0_1|u_logic|Kyi2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
+//  & ( (!\soc_inst|m0_1|u_logic|Kyi2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ydw2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~30 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~25_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~26 ),
+	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~25 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~25 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add3~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y15_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yuovx4 (
+// Location: LABCELL_X31_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yuovx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (((\soc_inst|m0_1|u_logic|Add3~25_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|Add5~97_sumout )) # (\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Add3~25_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~97_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Add3~25_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (\soc_inst|m0_1|u_logic|Add3~25_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qdnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qdnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qdnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[16]~30_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~25_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdnvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yuovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yuovx4 .lut_mask = 64'h005533770F5F3F7F;
-defparam \soc_inst|m0_1|u_logic|Yuovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .lut_mask = 64'hF0A0F0A000000000;
+defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y15_N34
-dffeas \soc_inst|ram_1|saved_word_address[2] (
+// Location: FF_X31_Y14_N52
+dffeas \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [2]),
+	.q(\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[2] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[2] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y15_N12
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[2]~2 (
-// Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[2]~2_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|Yuovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [2])) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [2] ) )
-
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|saved_word_address [2]),
-	.datad(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[2]~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .lut_mask = 64'h0F0F0F0F05AF05AF;
-defparam \soc_inst|ram_1|memory.raddr_a[2]~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
 // Location: IOIBUF_X2_Y0_N41
@@ -12101,8 +11608,8 @@ defparam \SW[4]~input .bus_hold = "false";
 defparam \SW[4]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: FF_X42_Y16_N29
-dffeas \soc_inst|switches_1|switch_store[0][4] (
+// Location: FF_X33_Y15_N8
+dffeas \soc_inst|switches_1|switch_store[1][4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
 	.asdata(\SW[4]~input_o ),
@@ -12110,463 +11617,481 @@ dffeas \soc_inst|switches_1|switch_store[0][4] (
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][4]~q ),
+	.q(\soc_inst|switches_1|switch_store[1][4]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][4] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][4] .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[1][4] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][4] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xwawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # 
-// ((\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) )
+// Location: IOIBUF_X4_Y0_N52
+cyclonev_io_ibuf \SW[3]~input (
+	.i(SW[3]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[3]~input_o ));
+// synopsys translate_off
+defparam \SW[3]~input .bus_hold = "false";
+defparam \SW[3]~input .simulate_z_as = "z";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwawx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y15_N14
+dffeas \soc_inst|switches_1|switch_store[1][3] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[3]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[1][3]~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .lut_mask = 64'h0000CE0A8888CE8A;
-defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .shared_arith = "off";
+defparam \soc_inst|switches_1|switch_store[1][3] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][3] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~3 (
+// Location: LABCELL_X30_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xwawx4~3_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  $ 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Sknwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwawx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .lut_mask = 64'h82AA88AA02AA00AA;
-defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~2 (
+// Location: LABCELL_X18_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kswwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xwawx4~2_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Kswwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwawx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kswwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .lut_mask = 64'h000055D5550055D5;
-defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .lut_mask = 64'h0000000000005555;
+defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xwawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwawx4~3_combout  & ( \soc_inst|m0_1|u_logic|Xwawx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) 
-// ) ) ) # ( \soc_inst|m0_1|u_logic|Xwawx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Xwawx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Xwawx4~1_combout )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xwawx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xwawx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwawx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y17_N10
+dffeas \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .lut_mask = 64'h000003CF000077FF;
-defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H0dwx4~0 (
+// Location: LABCELL_X27_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H0dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Jky2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Djywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  
+// & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H0dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .lut_mask = 64'h0000020000000000;
-defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djywx4~0 .lut_mask = 64'h000000CC303030FC;
+defparam \soc_inst|m0_1|u_logic|Djywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~0 (
+// Location: LABCELL_X30_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lstwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # 
-// ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Lstwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Djywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Djywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Djywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Djywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Djywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .lut_mask = 64'hAAAA0000A0E0A0E0;
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .lut_mask = 64'hAAA0AA00AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~2 (
+// Location: MLABCELL_X28_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxc2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # 
-// ((!\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Qxc2z4~combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .lut_mask = 64'h3230030022000000;
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxc2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxc2z4 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Qxc2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5dwx4~0 (
+// Location: LABCELL_X30_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lcowx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y5dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Lcowx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qxc2z4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qxc2z4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qxc2z4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qxc2z4~combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .lut_mask = 64'h0088000800AA00AA;
-defparam \soc_inst|m0_1|u_logic|Y5dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .lut_mask = 64'h22AA00AA22AA22AA;
+defparam \soc_inst|m0_1|u_logic|Lcowx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4dwx4~1 (
+// Location: FF_X24_Y16_N2
+dffeas \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vwc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W4dwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Vwc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .lut_mask = 64'h0010001000F000F0;
-defparam \soc_inst|m0_1|u_logic|W4dwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .lut_mask = 64'hA000A000F000F000;
+defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uwyvx4~0 (
+// Location: LABCELL_X24_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kuc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uwyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Kuc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kuc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .lut_mask = 64'h0000000000050000;
-defparam \soc_inst|m0_1|u_logic|Uwyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .lut_mask = 64'h00A000A00AAA0AAA;
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ucqvx4 (
+// Location: LABCELL_X24_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ucqvx4~combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Cxc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q 
+// ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cxc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ucqvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ucqvx4 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Ucqvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .lut_mask = 64'h0000000040004000;
+defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4dwx4~0 (
+// Location: LABCELL_X24_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Awc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W4dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Awc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Awc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .lut_mask = 64'h0000AFAF0000FFFF;
-defparam \soc_inst|m0_1|u_logic|W4dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .lut_mask = 64'hF0F0F0F050F050F0;
+defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I4dwx4~0 (
+// Location: LABCELL_X24_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Awc2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I4dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( \soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & !\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( \soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( !\soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W4dwx4~1_combout  & !\soc_inst|m0_1|u_logic|Uwyvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( !\soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & !\soc_inst|m0_1|u_logic|W4dwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Awc2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  
+// & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Awc2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .lut_mask = 64'hA0A0A000AAAAAA00;
-defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .lut_mask = 64'hCC40CC40CC00CC00;
+defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O0dwx4~0 (
+// Location: LABCELL_X36_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ocfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O0dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zcn2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zcn2z4~q  & \soc_inst|m0_1|u_logic|Z4bwx4~0_combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zcn2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zcn2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ocfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~q  & (!\soc_inst|m0_1|u_logic|H9i2z4~q  & !\soc_inst|m0_1|u_logic|Rngwx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O0dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .lut_mask = 64'hA0A0A0A000A0A0A0;
-defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .lut_mask = 64'h0000000010001000;
+defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xucwx4~0 (
+// Location: LABCELL_X37_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xucwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O0dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H0dwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O0dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H0dwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|R1d2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H0dwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O0dwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .lut_mask = 64'hD0000000D0D00000;
-defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpcwx4~1 (
+// Location: FF_X31_Y14_N38
+dffeas \soc_inst|m0_1|u_logic|Jky2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jky2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jky2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gpcwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Fbfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Jky2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fbfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .lut_mask = 64'hEE00EE00DD00DD00;
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .lut_mask = 64'h5050727250507272;
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Shyvx4~0 (
+// Location: LABCELL_X35_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Shyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|G27wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .lut_mask = 64'h00004040F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~0 .lut_mask = 64'h33333333FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|G27wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y21_N50
-dffeas \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE (
+// Location: FF_X34_Y14_N13
+dffeas \soc_inst|m0_1|u_logic|Swy2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -12575,6538 +12100,6279 @@ dffeas \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Swy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Swy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X77wx4 (
+// Location: LABCELL_X36_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Keiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X77wx4~combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Keiwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & !\soc_inst|m0_1|u_logic|H9i2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X77wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X77wx4 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|X77wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .lut_mask = 64'h8080808000000000;
+defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmgwx4~0 (
+// Location: LABCELL_X37_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Celwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Celwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Keiwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|R1d2z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Jky2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Keiwx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Celwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Celwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Celwx4~0 .lut_mask = 64'hFFFFFFF300000000;
+defparam \soc_inst|m0_1|u_logic|Celwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ez8wx4~0 (
+// Location: LABCELL_X36_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Celwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Celwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Celwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Swy2z4~q  & ((\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (\soc_inst|m0_1|u_logic|G27wx4~0_combout 
+// )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Celwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .lut_mask = 64'h0000000000880088;
-defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Celwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Celwx4~1 .lut_mask = 64'h00000000FF07FF07;
+defparam \soc_inst|m0_1|u_logic|Celwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz8wx4 (
+// Location: LABCELL_X36_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zz8wx4~combout  = ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Fbfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Hyy2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (\soc_inst|m0_1|u_logic|Hyy2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fbfwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zz8wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zz8wx4 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Zz8wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .lut_mask = 64'h0000000021330133;
+defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1awx4~0 (
+// Location: LABCELL_X24_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rafwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D1awx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ucqvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// (((\soc_inst|m0_1|u_logic|Uwyvx4~0_combout  & \soc_inst|m0_1|u_logic|Ucqvx4~combout )) # (\soc_inst|m0_1|u_logic|W4dwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rafwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|R1d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Nqy2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D1awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D1awx4~0 .lut_mask = 64'h30700050F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|D1awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .lut_mask = 64'h000000008CFF8CFF;
+defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y29wx4 (
+// Location: LABCELL_X31_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y29wx4~combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Wvewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y29wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y29wx4 .lut_mask = 64'h0000000000000A00;
-defparam \soc_inst|m0_1|u_logic|Y29wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .lut_mask = 64'h3333333300000000;
+defparam \soc_inst|m0_1|u_logic|Wvewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qsewx4~0 (
+// Location: LABCELL_X31_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qsewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Qllwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P7wvx4~0 (
+// Location: LABCELL_X30_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Csewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P7wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Wvewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Csewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Csewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Csewx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Csewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qslwx4~0 (
+// Location: LABCELL_X30_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V1yvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qslwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|V1yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .lut_mask = 64'hFFFFF0F000000000;
-defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|V1yvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohwvx4 (
+// Location: LABCELL_X36_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ohwvx4~combout  = ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|M4fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohwvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ohwvx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Ohwvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|M4fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z3yvx4 (
+// Location: LABCELL_X33_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z3yvx4~combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (!\soc_inst|m0_1|u_logic|Hyy2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rjrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & \soc_inst|m0_1|u_logic|Dvy2z4~q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|m0_1|u_logic|Pty2z4~q  & !\soc_inst|m0_1|u_logic|Dvy2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z3yvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z3yvx4 .lut_mask = 64'h0000000006060A0A;
-defparam \soc_inst|m0_1|u_logic|Z3yvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .lut_mask = 64'h0F000F000FC00FC0;
+defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyrwx4~0 (
+// Location: LABCELL_X27_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkrwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fyrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Z3yvx4~combout  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Z3yvx4~combout  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Mkrwx4~combout  = ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|L8t2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fyrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .lut_mask = 64'hAA22AA220A020A02;
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mkrwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkrwx4 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Mkrwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyrwx4~1 (
+// Location: LABCELL_X33_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3xvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fyrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) # ((\soc_inst|m0_1|u_logic|Swy2z4~q  & 
-// \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|J3xvx4~combout  = ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
 	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fyrwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J3xvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .lut_mask = 64'h00000000FFF1FFF1;
-defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J3xvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J3xvx4 .lut_mask = 64'hF5C4F5C400000000;
+defparam \soc_inst|m0_1|u_logic|J3xvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Surwx4~0 (
+// Location: LABCELL_X35_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Surwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Yafwx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )))) 
+// ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Surwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Surwx4~0 .lut_mask = 64'h00000000CCCCCCCC;
-defparam \soc_inst|m0_1|u_logic|Surwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .lut_mask = 64'h0000000033323332;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dghvx4~0 (
+// Location: LABCELL_X35_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Surwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Surwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Yafwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|H9i2z4~q  & (((\soc_inst|m0_1|u_logic|Hyy2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dghvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .lut_mask = 64'hFAAAFAAAF000F000;
-defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .lut_mask = 64'h0000000025272527;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtrwx4~0 (
+// Location: LABCELL_X35_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|E4xvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Yafwx4~2_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yafwx4~1_combout  & !\soc_inst|m0_1|u_logic|Xhxvx4~combout 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yafwx4~1_combout  & !\soc_inst|m0_1|u_logic|Xhxvx4~combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yafwx4~1_combout  & !\soc_inst|m0_1|u_logic|Xhxvx4~combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~0_combout  & !\soc_inst|m0_1|u_logic|Yafwx4~1_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yafwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yafwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Qtrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .lut_mask = 64'h8888808080808080;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dghvx4~1 (
+// Location: LABCELL_X31_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nkpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dghvx4~1_combout  = ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout  & (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ((\soc_inst|m0_1|u_logic|I6z2z4~q ) # (\soc_inst|m0_1|u_logic|Cllwx4~0_combout )))) 
-// ) ) ) # ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cllwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout  & \soc_inst|m0_1|u_logic|Qllwx4~4_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .lut_mask = 64'h0044FFCC004CFFCC;
-defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y21_N20
-dffeas \soc_inst|m0_1|u_logic|W7z2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yafwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|M66wx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M66wx4~combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W7z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W7z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .lut_mask = 64'h00F000F0A0F0A0F0;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uz9wx4~0 (
+// Location: LABCELL_X31_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uz9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( (\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( ((\soc_inst|m0_1|u_logic|Y29wx4~combout  
-// & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|H5fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uz9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .lut_mask = 64'h7733773355005500;
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|H5fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~33 (
+// Location: LABCELL_X30_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7swx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~26  ))
-// \soc_inst|m0_1|u_logic|Add3~34  = CARRY(( !\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~26  ))
+// \soc_inst|m0_1|u_logic|J7swx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~26 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~33_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~34 ),
+	.combout(\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~33 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~33 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~33 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J7swx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J7swx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|J7swx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~53 (
+// Location: LABCELL_X30_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nbx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~34  ))
-// \soc_inst|m0_1|u_logic|Add3~54  = CARRY(( !\soc_inst|m0_1|u_logic|Nbx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~34  ))
+// \soc_inst|m0_1|u_logic|Yafwx4~4_combout  = ( \soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Yafwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yafwx4~3_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~34 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~53_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~54 ),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~4_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~53 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~53 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add3~53 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .lut_mask = 64'hDD00DD00D000D000;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yafwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yafwx4~4_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|J3xvx4~combout ) # ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yafwx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Yafwx4~4_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|J3xvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yafwx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yafwx4~4_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .lut_mask = 64'h5555555545444544;
+defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y18_N29
+dffeas \soc_inst|m0_1|u_logic|Rni2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rni2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rni2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hszvx4 (
+// Location: LABCELL_X27_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hszvx4~combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|Add5~37_sumout  & \soc_inst|m0_1|u_logic|K1wvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Euzvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Add3~53_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Add5~37_sumout  & 
-// \soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Add5~37_sumout  & 
-// \soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Add3~53_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Add5~37_sumout  & 
-// \soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|E4iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1d2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout  & !\soc_inst|m0_1|u_logic|Jky2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|R1d2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ocfwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add3~53_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hszvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hszvx4 .lut_mask = 64'h0505373705FF37FF;
-defparam \soc_inst|m0_1|u_logic|Hszvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .lut_mask = 64'hAAAAA0A0AAAAA0A0;
+defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fskvx4~0 (
+// Location: LABCELL_X36_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Enrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fskvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U593z4~q  & ( \soc_inst|m0_1|u_logic|Hszvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U593z4~q  & ( \soc_inst|m0_1|u_logic|Hszvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|U593z4~q  & ( !\soc_inst|m0_1|u_logic|Hszvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U593z4~q  & ( !\soc_inst|m0_1|u_logic|Hszvx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Enrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q )) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|H9i2z4~q  & 
+// \soc_inst|m0_1|u_logic|Hyy2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & ((\soc_inst|m0_1|u_logic|Pty2z4~q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Qem2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) # ((!\soc_inst|m0_1|u_logic|Hyy2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|U593z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .lut_mask = 64'h0A0FFAFF080CC8CC;
-defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y17_N35
-dffeas \soc_inst|m0_1|u_logic|U593z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U593z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U593z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U593z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .lut_mask = 64'h5676567626262626;
+defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lq03z4~feeder (
+// Location: LABCELL_X36_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lq03z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Rblwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~q  & !\soc_inst|m0_1|u_logic|Qem2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lq03z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rblwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lq03z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lq03z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Lq03z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .lut_mask = 64'h0000000020202020;
+defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr0xx4~0 (
+// Location: LABCELL_X36_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cr0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Rblwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rblwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Rblwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Enrwx4~0_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rblwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rblwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .lut_mask = 64'hC000C000CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oi2wx4~0 (
+// Location: LABCELL_X36_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oi2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|J3iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Rngwx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|H9i2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Rngwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rngwx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .lut_mask = 64'h0F00000005000500;
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .lut_mask = 64'hA0A05050A0A00000;
+defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ut0xx4~0 (
+// Location: LABCELL_X22_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ut0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Rblwx4~2_combout  = ( \soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rblwx4~1_combout  & (\soc_inst|m0_1|u_logic|Pty2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|E4iwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rblwx4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|E4iwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rblwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .lut_mask = 64'h02020202AA02EECE;
-defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .lut_mask = 64'h000000004C4C004C;
+defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oi2wx4~1 (
+// Location: FF_X22_Y18_N25
+dffeas \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y17_N35
+dffeas \soc_inst|switches_1|switch_store[1][5] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[5]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[1][5]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][5] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][5] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X31_Y17_N44
+dffeas \soc_inst|switches_1|switch_store[0][4] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[4]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][4]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][4] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oi2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ut0xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Oi2wx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ut0xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & !\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Glnwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Glnwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .lut_mask = 64'hCC00CC00C000C000;
-defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .lut_mask = 64'h0101010189018901;
+defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~1 (
+// Location: MLABCELL_X21_Y21_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1r2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hklwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & 
-// \soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|E1r2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C00wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E1r2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .lut_mask = 64'hF5F5050505050505;
-defparam \soc_inst|m0_1|u_logic|Hklwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E1r2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E1r2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|E1r2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5wvx4~0 (
+// Location: LABCELL_X17_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ut0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z5wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( \soc_inst|m0_1|u_logic|Hklwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~q 
-//  & ( (\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hklwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ut0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .lut_mask = 64'h00005F5F00005555;
-defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .lut_mask = 64'h202020AA332033AA;
+defparam \soc_inst|m0_1|u_logic|Ut0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~0 (
+// Location: MLABCELL_X25_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K8wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Cr0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K8wvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .lut_mask = 64'h0000000000500050;
-defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhwvx4~0 (
+// Location: LABCELL_X17_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oi2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vhwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Ohwvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|Ohwvx4~combout  & (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Swy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Oi2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vhwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .lut_mask = 64'h0020002022222222;
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .lut_mask = 64'h5011501100000000;
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhwvx4~1 (
+// Location: LABCELL_X17_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oi2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vhwvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vhwvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) # (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout )) # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Oi2wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Oi2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ut0xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vhwvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oi2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .lut_mask = 64'hFFF3FFF300000000;
-defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .lut_mask = 64'hF0C0F0C000000000;
+defparam \soc_inst|m0_1|u_logic|Oi2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~1 (
+// Location: LABCELL_X17_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K8wvx4~1_combout  = ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Fw0xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|G97wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K8wvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fw0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .lut_mask = 64'h0000000001090109;
-defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .lut_mask = 64'h0C000C0000000000;
+defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~2 (
+// Location: LABCELL_X29_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ax0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K8wvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|K8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vhwvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|K8wvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Qem2z4~q )))) 
-// ) )
+// \soc_inst|m0_1|u_logic|Ax0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K8wvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K8wvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .lut_mask = 64'h00F100F100000000;
-defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oowvx4~0 (
+// Location: LABCELL_X18_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vi2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oowvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qdj2z4~q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Vi2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
 	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .lut_mask = 64'h5555000055550000;
-defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .lut_mask = 64'h0000005000000050;
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejwvx4~0 (
+// Location: LABCELL_X16_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vi2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ejwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Howvx4~0_combout 
-// ) ) )
+// \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vi2wx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout  & !\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .lut_mask = 64'h00F000F0F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .lut_mask = 64'hCC00CC00C000C000;
+defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Blwvx4~0 (
+// Location: LABCELL_X29_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Blwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~q ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .lut_mask = 64'h00000000F500F500;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8wvx4~0 (
+// Location: LABCELL_X30_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R8wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & ((!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H9i2z4~q )) 
-// # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H9i2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  
-// & (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|I2mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R8wvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .lut_mask = 64'h0000002008080828;
-defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .lut_mask = 64'h50505050505050FF;
+defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8wvx4~1 (
+// Location: MLABCELL_X28_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ilpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R8wvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & !\soc_inst|m0_1|u_logic|R8wvx4~0_combout 
-// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout  & !\soc_inst|m0_1|u_logic|R8wvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R8wvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .lut_mask = 64'hCC00CC0080008000;
-defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndwvx4~0 (
+// Location: LABCELL_X29_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & (\soc_inst|m0_1|u_logic|Viy2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & (\soc_inst|m0_1|u_logic|Viy2z4~q  & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & (\soc_inst|m0_1|u_logic|Viy2z4~q  & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~7_combout  = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .lut_mask = 64'h000045CF45CF45CF;
-defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y21_N14
-dffeas \soc_inst|m0_1|u_logic|K1z2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K1z2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K1z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K1z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .lut_mask = 64'h00000000C0F3C0F3;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ilpvx4~0 (
+// Location: LABCELL_X29_Y10_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~8_combout  = ( !\soc_inst|m0_1|u_logic|K6yvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|I2mwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .lut_mask = 64'h3333000000000000;
-defparam \soc_inst|m0_1|u_logic|Ilpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .lut_mask = 64'hF0D0F0D000000000;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3mvx4~0 (
+// Location: LABCELL_X29_Y10_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X8kwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|K8wvx4~2_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|K8wvx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|X8kwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Srgwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W3mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .lut_mask = 64'hC0C0C0C0EAEAEAEA;
-defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y21_N38
-dffeas \soc_inst|m0_1|u_logic|I2t2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I2t2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I2t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I2t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3mvx4~1 (
+// Location: MLABCELL_X28_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zzfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~q  & ( \soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ) # 
-// (!\soc_inst|m0_1|u_logic|W3mvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~q  & ( \soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|W3mvx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|I2t2z4~q  & ( !\soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|W3mvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~q  & ( !\soc_inst|m0_1|u_logic|R8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & 
-// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & !\soc_inst|m0_1|u_logic|W3mvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W3mvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .lut_mask = 64'h1000B0A05000F0A0;
-defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y21_N37
-dffeas \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X35_Y21_N41
-dffeas \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3mvx4~0 (
+// Location: MLABCELL_X25_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T1xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|T1xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .lut_mask = 64'hF5F0F5F0C4C0C4C0;
-defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|T1xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3mvx4~1 (
+// Location: LABCELL_X27_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I3mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & (\soc_inst|m0_1|u_logic|K1z2z4~q  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ndwvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|I3mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ((\soc_inst|m0_1|u_logic|K1z2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & (\soc_inst|m0_1|u_logic|Ndwvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Tuwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ndwvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I3mvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .lut_mask = 64'h048C048C008C008C;
-defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y21_N13
-dffeas \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .lut_mask = 64'h0000000000C000C0;
+defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hw2wx4~0 (
+// Location: LABCELL_X27_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|T1xvx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .lut_mask = 64'hEEE2EEE200000000;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xr0xx4 (
+// Location: LABCELL_X29_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xr0xx4~combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Hw2wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~9_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|K6yvx4~5_combout  & (\soc_inst|m0_1|u_logic|K6yvx4~8_combout  & ((!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Jky2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K6yvx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K6yvx4~8_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xr0xx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xr0xx4 .lut_mask = 64'h0505050500000000;
-defparam \soc_inst|m0_1|u_logic|Xr0xx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .lut_mask = 64'h000000000C040C04;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zy2wx4~0 (
+// Location: LABCELL_X30_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zy2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q  
-// & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & !\soc_inst|m0_1|u_logic|Dvy2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .lut_mask = 64'h00000500A0A0A5A0;
-defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .lut_mask = 64'h0F000F000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq2wx4~0 (
+// Location: LABCELL_X31_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xiwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jq2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Aok2z4~q 
-//  & (((\soc_inst|m0_1|u_logic|L8t2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|L8t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Xiwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datag(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .lut_mask = 64'hFF77F3F3F077FFFF;
-defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Xiwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nz2wx4~0 (
+// Location: LABCELL_X31_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X5gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nz2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|X5gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nz2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .lut_mask = 64'h1010101055105510;
-defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~0 (
+// Location: LABCELL_X31_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nz2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & \soc_inst|m0_1|u_logic|Jq2wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nz2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Jq2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Nz2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Nz2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~3_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|C9yvx4~combout  & ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xiwvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Nz2wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .lut_mask = 64'hEEEEAAAA0E0E0A0A;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .lut_mask = 64'h00000A0A33333B3B;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey2wx4~0 (
+// Location: LABCELL_X31_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # ((\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K6yvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|K6yvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K6yvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|K6yvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|K6yvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .lut_mask = 64'hF4F4F4F411331133;
-defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .lut_mask = 64'h00000400CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ru2wx4~0 (
+// Location: LABCELL_X33_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|My6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ru2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|My6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .lut_mask = 64'h0002000200000000;
-defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|My6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|My6wx4~0 .lut_mask = 64'h0300030000000000;
+defparam \soc_inst|m0_1|u_logic|My6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bt2wx4~0 (
+// Location: LABCELL_X35_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vnxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bt2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ru2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Ru2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ru2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Hyy2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bt2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .lut_mask = 64'h00000202AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~5 (
+// Location: LABCELL_X33_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qsewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bt2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Ey2wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bt2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qsewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bt2wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .lut_mask = 64'hCFCFCECE00000000;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Qsewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~2 (
+// Location: LABCELL_X33_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P7wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|P7wvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & \soc_inst|m0_1|u_logic|Wvewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .lut_mask = 64'h1010101000F000F0;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|P7wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It2wx4~0 (
+// Location: LABCELL_X33_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|It2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|M4fwx4~0_combout ))) ) 
+// )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|It2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|It2wx4~0 .lut_mask = 64'h0000000000C000C0;
-defparam \soc_inst|m0_1|u_logic|It2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .lut_mask = 64'h0000000000200020;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~1 (
+// Location: LABCELL_X33_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~1_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (((\soc_inst|m0_1|u_logic|My6wx4~0_combout  & \soc_inst|m0_1|u_logic|Vnxvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|K6yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (\soc_inst|m0_1|u_logic|My6wx4~0_combout  & \soc_inst|m0_1|u_logic|Vnxvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .lut_mask = 64'h10101010101A101A;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .lut_mask = 64'h00080008222A222A;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Op2wx4~0 (
+// Location: LABCELL_X30_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Op2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|K6yvx4~10_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~1_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|K6yvx4~9_combout ) # ((\soc_inst|m0_1|u_logic|K6yvx4~4_combout ) # 
+// (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|K6yvx4~1_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|K6yvx4~9_combout ) # (\soc_inst|m0_1|u_logic|K6yvx4~4_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K6yvx4~9_combout ),
+	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|K6yvx4~4_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .lut_mask = 64'h2233223323332333;
+defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~3 (
+// Location: FF_X22_Y20_N35
+dffeas \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V2iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Op2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fh2wx4~2_combout  & (!\soc_inst|m0_1|u_logic|It2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Fh2wx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|V2iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Enrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fh2wx4~2_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|It2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fh2wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .lut_mask = 64'hFFFF000000000000;
+defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~4 (
+// Location: LABCELL_X33_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A2iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fh2wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fh2wx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|A2iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( \soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~q  & \soc_inst|m0_1|u_logic|V2iwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|J3iwx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( !\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~q  & \soc_inst|m0_1|u_logic|V2iwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  
+// & ( !\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~q  & \soc_inst|m0_1|u_logic|V2iwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A2iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .lut_mask = 64'h00000000FF77FF77;
-defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .lut_mask = 64'h0A0A0A0AFFFF0A0A;
+defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bxcwx4~0 (
+// Location: MLABCELL_X21_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A2iwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  ) )
+// \soc_inst|m0_1|u_logic|A2iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & !\soc_inst|m0_1|u_logic|A2iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & (\soc_inst|m0_1|u_logic|E4iwx4~0_combout  & !\soc_inst|m0_1|u_logic|A2iwx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|A2iwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Bxcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .lut_mask = 64'h1100110055005500;
+defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~2 (
+// Location: FF_X21_Y19_N31
+dffeas \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L53wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|X77wx4~combout  & \soc_inst|m0_1|u_logic|Socwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X77wx4~combout  & \soc_inst|m0_1|u_logic|Socwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Qj2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L53wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L53wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L53wx4~2 .lut_mask = 64'h000000FF050505FF;
-defparam \soc_inst|m0_1|u_logic|L53wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .lut_mask = 64'h22221D1100001D11;
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~0 (
+// Location: LABCELL_X17_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L53wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Xx2wx4~combout 
-//  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Qj2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// (((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|G97wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L53wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L53wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L53wx4~0 .lut_mask = 64'hFF00FF00F500F500;
-defparam \soc_inst|m0_1|u_logic|L53wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .lut_mask = 64'h2F002F00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~1 (
+// Location: LABCELL_X17_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ro0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L53wx4~1_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (\soc_inst|m0_1|u_logic|L53wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( \soc_inst|m0_1|u_logic|L53wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ro0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L53wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L53wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ro0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L53wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L53wx4~1 .lut_mask = 64'h0F0F0F0F0F030F03;
-defparam \soc_inst|m0_1|u_logic|L53wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .lut_mask = 64'h0000101011111111;
+defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~3 (
+// Location: LABCELL_X17_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L53wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|L53wx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|L53wx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|L53wx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Jucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qj2wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Qj2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ro0xx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L53wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L53wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ro0xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L53wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L53wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L53wx4~3 .lut_mask = 64'hFF0FFF0F00001101;
-defparam \soc_inst|m0_1|u_logic|L53wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xc2wx4~0 (
+// Location: LABCELL_X16_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fh2wx4~4_combout  & ( \soc_inst|m0_1|u_logic|L53wx4~3_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fh2wx4~4_combout  & ( 
-// \soc_inst|m0_1|u_logic|L53wx4~3_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Fh2wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|L53wx4~3_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fh2wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|L53wx4~3_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ge2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L53wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .lut_mask = 64'h3333333033333333;
-defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .lut_mask = 64'hFF88FF8888888888;
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~0 (
+// Location: LABCELL_X17_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ge2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ey2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .lut_mask = 64'hFFFF222211551155;
+defparam \soc_inst|m0_1|u_logic|Ey2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~0 (
+// Location: LABCELL_X23_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hw2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|If2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ( \soc_inst|m0_1|u_logic|Ge2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|If2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|If2wx4~0 .lut_mask = 64'h00000000CFCF0000;
-defparam \soc_inst|m0_1|u_logic|If2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Hw2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbfwx4~0 (
+// Location: LABCELL_X23_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ru2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fbfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Jky2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Jky2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Ru2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) 
+// ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fbfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .lut_mask = 64'h333300003F3F0C0C;
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .lut_mask = 64'h0010001000000000;
+defparam \soc_inst|m0_1|u_logic|Ru2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1d2z4~0 (
+// Location: LABCELL_X23_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bt2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R1d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Bt2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ru2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ru2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ru2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|A4t2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ru2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bt2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|R1d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .lut_mask = 64'h00000030F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Bt2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Keiwx4~0 (
+// Location: LABCELL_X17_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Keiwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Hyy2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Fh2wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Bt2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ey2wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bt2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ey2wx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bt2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Keiwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y17_N50
-dffeas \soc_inst|ram_1|saved_word_address[4] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [4]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[4] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[4] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .lut_mask = 64'hF5F50000F5F00000;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N15
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[4]~4 (
+// Location: LABCELL_X23_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[4]~4_combout  = ( \soc_inst|m0_1|u_logic|Hszvx4~combout  & ( ((!\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|always1~0_combout )) # (\soc_inst|ram_1|saved_word_address [4]) ) ) # ( !\soc_inst|m0_1|u_logic|Hszvx4~combout  
-// & ( (\soc_inst|ram_1|saved_word_address [4] & ((!\soc_inst|ram_1|always1~0_combout ) # (\soc_inst|ram_1|write_cycle~q ))) ) )
+// \soc_inst|m0_1|u_logic|L53wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|ram_1|saved_word_address [4]),
-	.datad(!\soc_inst|ram_1|always1~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[4]~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L53wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .lut_mask = 64'h0F050F050FAF0FAF;
-defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y15_N56
-dffeas \soc_inst|ram_1|saved_word_address[5] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [5]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[5] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[5] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L53wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~0 .lut_mask = 64'hAAAAAAAAAA0AAA0A;
+defparam \soc_inst|m0_1|u_logic|L53wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N51
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[5]~5 (
+// Location: LABCELL_X27_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[5]~5_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( \soc_inst|m0_1|u_logic|S4qvx4~combout  & ( (!\soc_inst|ram_1|write_cycle~q ) # (\soc_inst|ram_1|saved_word_address [5]) ) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & 
-// ( \soc_inst|m0_1|u_logic|S4qvx4~combout  & ( \soc_inst|ram_1|saved_word_address [5] ) ) ) # ( \soc_inst|ram_1|always1~0_combout  & ( !\soc_inst|m0_1|u_logic|S4qvx4~combout  & ( (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|saved_word_address [5]) ) ) 
-// ) # ( !\soc_inst|ram_1|always1~0_combout  & ( !\soc_inst|m0_1|u_logic|S4qvx4~combout  & ( \soc_inst|ram_1|saved_word_address [5] ) ) )
+// \soc_inst|m0_1|u_logic|L53wx4~1_combout  = ( \soc_inst|m0_1|u_logic|L53wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|B73wx4~combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|ram_1|saved_word_address [5]),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|always1~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|L53wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[5]~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L53wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .lut_mask = 64'h0F0F05050F0FAFAF;
-defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y15_N38
-dffeas \soc_inst|m0_1|u_logic|I793z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I793z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I793z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I793z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L53wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~1 .lut_mask = 64'h00000000FFF5FFF5;
+defparam \soc_inst|m0_1|u_logic|L53wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y15_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgnvx4~0 (
+// Location: LABCELL_X27_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pgnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I793z4~q  & ( \soc_inst|m0_1|u_logic|S4qvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I793z4~q  & ( \soc_inst|m0_1|u_logic|S4qvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I793z4~q  & ( !\soc_inst|m0_1|u_logic|S4qvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|I793z4~q  & ( !\soc_inst|m0_1|u_logic|S4qvx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ycx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|L53wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Socwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Socwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|I793z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L53wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .lut_mask = 64'h0C0FFCFF080AA8AA;
-defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y15_N37
-dffeas \soc_inst|m0_1|u_logic|I793z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I793z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I793z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L53wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~2 .lut_mask = 64'h0003000355575557;
+defparam \soc_inst|m0_1|u_logic|L53wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5vvx4 (
+// Location: LABCELL_X27_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L53wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J5vvx4~combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|L53wx4~3_combout  = ( \soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( \soc_inst|m0_1|u_logic|L53wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Wkxvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( \soc_inst|m0_1|u_logic|L53wx4~2_combout  ) ) # ( \soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|L53wx4~2_combout  & ( 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L53wx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|L53wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|L53wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|L53wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|L53wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5vvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J5vvx4 .lut_mask = 64'h5555555500000000;
-defparam \soc_inst|m0_1|u_logic|J5vvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L53wx4~3 .lut_mask = 64'hFF000100FFFF0101;
+defparam \soc_inst|m0_1|u_logic|L53wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5vvx4~0 (
+// Location: LABCELL_X27_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nz2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( \soc_inst|m0_1|u_logic|Ye4wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Nz2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nz2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .lut_mask = 64'h000000F00000CCFC;
+defparam \soc_inst|m0_1|u_logic|Nz2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7mvx4~0 (
+// Location: LABCELL_X27_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zy2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X7mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J5vvx4~combout  & ( \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A4t2z4~q  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q  & (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|J5vvx4~combout  & ( !\soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & (\soc_inst|m0_1|u_logic|A4t2z4~q  
-// & \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zy2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~q  
+// & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|J5vvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X7mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .lut_mask = 64'h0000000300000407;
-defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .lut_mask = 64'h00A000A004A404A4;
+defparam \soc_inst|m0_1|u_logic|Zy2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7mvx4~1 (
+// Location: LABCELL_X27_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X7mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I6w2z4~q  & ( \soc_inst|m0_1|u_logic|X7mvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I6w2z4~q  & ( \soc_inst|m0_1|u_logic|X7mvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|I6w2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|X7mvx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Jq2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (((!\soc_inst|m0_1|u_logic|Nsk2z4~q ))))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  & 
+// ((((\soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|I6w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|X7mvx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X7mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .lut_mask = 64'h0000FCFCFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X53_Y18_N16
-dffeas \soc_inst|m0_1|u_logic|I6w2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|X7mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I6w2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I6w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .lut_mask = 64'hFA33F7F7FAFFF7F7;
+defparam \soc_inst|m0_1|u_logic|Jq2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~0 (
+// Location: LABCELL_X27_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F5mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Y9t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Fh2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jq2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Nz2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Zy2wx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jq2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Nz2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Zy2wx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nz2wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zy2wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jq2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y22_N4
-dffeas \soc_inst|m0_1|u_logic|J4x2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J4x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J4x2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .lut_mask = 64'hAA80AA80FFC0FFC0;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~1 (
+// Location: LABCELL_X29_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( \soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( \soc_inst|m0_1|u_logic|J4x2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( !\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( \soc_inst|m0_1|u_logic|J4x2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Fh2wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F5mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .lut_mask = 64'h0F0F00000F0FAAAA;
-defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .lut_mask = 64'h00000C0033003F00;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~2 (
+// Location: LABCELL_X29_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F5mvx4~2_combout  = ( \soc_inst|m0_1|u_logic|U5x2z4~q  & ( \soc_inst|m0_1|u_logic|F5mvx4~1_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|F5mvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U5x2z4~q  & ( \soc_inst|m0_1|u_logic|F5mvx4~1_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|F5mvx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|U5x2z4~q  & ( !\soc_inst|m0_1|u_logic|F5mvx4~1_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Fh2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|A4t2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|U5x2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|F5mvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F5mvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .lut_mask = 64'h0000FFCC0303FFCF;
-defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X53_Y18_N19
-dffeas \soc_inst|m0_1|u_logic|U5x2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|F5mvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U5x2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U5x2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .lut_mask = 64'h0000030300F000F0;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lefwx4~0 (
+// Location: LABCELL_X29_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lefwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z5pvx4~4_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|U5x2z4~q ))) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|I6w2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|It2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I6w2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U5x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|It2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .lut_mask = 64'h03110000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y22_N7
-dffeas \soc_inst|m0_1|u_logic|Jex2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jex2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jex2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jex2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|It2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It2wx4~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|m0_1|u_logic|It2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~53 (
+// Location: LABCELL_X29_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Op2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~58  ))
-// \soc_inst|m0_1|u_logic|Add2~54  = CARRY(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~58  ))
+// \soc_inst|m0_1|u_logic|Op2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~58 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~53_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~54 ),
+	.combout(\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~53 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~53 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add2~53 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Op2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~49 (
+// Location: LABCELL_X29_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~54  ))
-// \soc_inst|m0_1|u_logic|Add2~50  = CARRY(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~54  ))
+// \soc_inst|m0_1|u_logic|Fh2wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Op2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fh2wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Fh2wx4~1_combout  & !\soc_inst|m0_1|u_logic|It2wx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fh2wx4~2_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fh2wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|It2wx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~54 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~49_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~50 ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~49 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~49 .lut_mask = 64'h0000FFFF0000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add2~49 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pm9wx4~0 (
+// Location: LABCELL_X29_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fh2wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Fh2wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fh2wx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .lut_mask = 64'h0000000008000800;
-defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .lut_mask = 64'h00000000F3FFF3FF;
+defparam \soc_inst|m0_1|u_logic|Fh2wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lk9wx4~0 (
+// Location: LABCELL_X16_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xc2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lk9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Y29wx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fh2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fh2wx4~4_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ) # 
+// (\soc_inst|m0_1|u_logic|L53wx4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fh2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fh2wx4~4_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Fh2wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Fh2wx4~4_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fh2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fh2wx4~4_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fh2wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L53wx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fh2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fh2wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .lut_mask = 64'h0F0FFF0F0000FF00;
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .lut_mask = 64'h5555555555555055;
+defparam \soc_inst|m0_1|u_logic|Xc2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~1 (
+// Location: LABCELL_X16_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zz1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
-// (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
-// (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
-// (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ge2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .lut_mask = 64'hFCCFCAACFCCF0000;
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~2 (
+// Location: LABCELL_X16_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zz1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|P12wx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|P12wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|P12wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ge2wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ge2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I2t2z4~q ) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ge2wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .lut_mask = 64'hF300F3000000F300;
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .lut_mask = 64'h000000003F3F0000;
+defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y19_N34
+dffeas \soc_inst|m0_1|u_logic|Wzy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wzy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wzy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~0 (
+// Location: LABCELL_X24_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2lwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Glnwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q 
-// ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|G2lwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glnwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .lut_mask = 64'h2000200020552055;
-defparam \soc_inst|m0_1|u_logic|Glnwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .lut_mask = 64'h30300000F3F30000;
+defparam \soc_inst|m0_1|u_logic|G2lwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ka93z4~feeder (
+// Location: LABCELL_X24_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2lwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ka93z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C00wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|G2lwx4~combout  = ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2lwx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ka93z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G2lwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ka93z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ka93z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ka93z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G2lwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2lwx4 .lut_mask = 64'hFFFF000000000000;
+defparam \soc_inst|m0_1|u_logic|G2lwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3iwx4~0 (
+// Location: MLABCELL_X28_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J3iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|Rngwx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rngwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Ggswx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|K1z2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( ((\soc_inst|m0_1|u_logic|Pcyvx4~combout  & 
+// !\soc_inst|m0_1|u_logic|K1z2z4~q )) # (\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ggswx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .lut_mask = 64'hAA00AA0050005000;
-defparam \soc_inst|m0_1|u_logic|J3iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .lut_mask = 64'h7373737350505050;
+defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4iwx4~0 (
+// Location: LABCELL_X35_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E4iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ocfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~q ) # (!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ggswx4~0_combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Csewx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ggswx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .lut_mask = 64'hEEEEEEEE00000000;
-defparam \soc_inst|m0_1|u_logic|E4iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .lut_mask = 64'h0DCD08CC0DCD08CC;
+defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Enrwx4~0 (
+// Location: LABCELL_X22_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Enrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Hyy2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qem2z4~q ))) # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qem2z4~q )))) # (\soc_inst|m0_1|u_logic|Hyy2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ggswx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ggswx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ggswx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout  & ((!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|C9yvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ggswx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ggswx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .lut_mask = 64'h07B807B80FB80FB8;
-defparam \soc_inst|m0_1|u_logic|Enrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .lut_mask = 64'h5454000000000000;
+defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y15_N2
-dffeas \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE (
+// Location: FF_X22_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|Yaz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yaz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yaz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~0 (
+// Location: LABCELL_X16_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vb2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rblwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Vb2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rblwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vb2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .lut_mask = 64'h0030003000000000;
-defparam \soc_inst|m0_1|u_logic|Rblwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .lut_mask = 64'hFAF0FAF0AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~1 (
+// Location: MLABCELL_X21_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xr0xx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rblwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rblwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Rblwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Enrwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rngwx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Xr0xx4~combout  = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rblwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rblwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .lut_mask = 64'hA000A000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Rblwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xr0xx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xr0xx4 .lut_mask = 64'h0000000050505050;
+defparam \soc_inst|m0_1|u_logic|Xr0xx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rblwx4~2 (
+// Location: LABCELL_X16_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rblwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rblwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Celwx4~1_combout  & ((\soc_inst|m0_1|u_logic|E4iwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rblwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Celwx4~1_combout  & (!\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|E4iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rxl2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|If2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ge2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rblwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .lut_mask = 64'h1050115500000000;
-defparam \soc_inst|m0_1|u_logic|Rblwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~0 .lut_mask = 64'h00000000B0B0B0B0;
+defparam \soc_inst|m0_1|u_logic|If2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~3 (
+// Location: LABCELL_X16_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vb2wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Pkxvx4~0_combout )) # (\soc_inst|m0_1|u_logic|M66wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Vb2wx4~combout  = ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|K1z2z4~q ) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vb2wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .lut_mask = 64'h0AFF0AFF00000000;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vb2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vb2wx4 .lut_mask = 64'h0000000030F030F0;
+defparam \soc_inst|m0_1|u_logic|Vb2wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7swx4~0 (
+// Location: LABCELL_X17_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J7swx4~0_combout  = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vb2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7swx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J7swx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|J7swx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~4 (
+// Location: LABCELL_X16_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ob2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Yafwx4~3_combout  & ( \soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yafwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ob2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~q ) # ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yafwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ob2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .lut_mask = 64'hF0FF0000C0CC0000;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .lut_mask = 64'hFFC0FFC0C0C0C0C0;
+defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~0 (
+// Location: LABCELL_X16_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ob2wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qllwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Ob2wx4~combout  = ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ob2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|C3z2z4~q ) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ob2wx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Qllwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ob2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ob2wx4 .lut_mask = 64'h000000000AAA0AAA;
+defparam \soc_inst|m0_1|u_logic|Ob2wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjrwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rjrwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bsy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y18_N26
+dffeas \soc_inst|m0_1|u_logic|Fgm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .lut_mask = 64'h55550A0A55550000;
-defparam \soc_inst|m0_1|u_logic|Rjrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fgm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fgm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkrwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mkrwx4~combout  = ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|L8t2z4~q ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|H3d3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mkrwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mkrwx4 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Mkrwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H3d3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3xvx4 (
+// Location: LABCELL_X17_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J3xvx4~combout  = ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout )) # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Yg2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( \soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~q  & ( \soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( !\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rjrwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J3xvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yg2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J3xvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J3xvx4 .lut_mask = 64'hFA32FA3200000000;
-defparam \soc_inst|m0_1|u_logic|J3xvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .lut_mask = 64'h0000A2A2A2A2A2A2;
+defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~1 (
+// Location: LABCELL_X16_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg2wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Swy2z4~q )) # (\soc_inst|m0_1|u_logic|H9i2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Hyy2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Hyy2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|H9i2z4~q  & ((\soc_inst|m0_1|u_logic|Hyy2z4~q ))))) ) )
+// \soc_inst|m0_1|u_logic|Yg2wx4~combout  = ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Yg2wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yg2wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Yg2wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Yg2wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yg2wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .lut_mask = 64'h1003100310131013;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yg2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yg2wx4 .lut_mask = 64'h0101050503030F0F;
+defparam \soc_inst|m0_1|u_logic|Yg2wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~0 (
+// Location: LABCELL_X16_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xc2wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Xc2wx4~combout  = ( \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yg2wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .lut_mask = 64'h0033003300320032;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xc2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xc2wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Xc2wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~2 (
+// Location: LABCELL_X16_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hx1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Yafwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|G27wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|H9i2z4~q  & ( !\soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~1_combout  & !\soc_inst|m0_1|u_logic|Yafwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( !\soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~1_combout  & !\soc_inst|m0_1|u_logic|Yafwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  = (\soc_inst|m0_1|u_logic|Ob2wx4~combout  & \soc_inst|m0_1|u_logic|Xc2wx4~combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yafwx4~1_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yafwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .lut_mask = 64'hA0A0A0A0A0000000;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yafwx4~5 (
+// Location: MLABCELL_X21_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ax1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yafwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~q  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|J3xvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Yafwx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qdj2z4~q  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yafwx4~4_combout ) # (!\soc_inst|m0_1|u_logic|J3xvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ax1wx4~0_combout  = (\soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & \soc_inst|m0_1|u_logic|Hx1wx4~0_combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yafwx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|J3xvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yafwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .lut_mask = 64'h00000000EEEEFEFE;
-defparam \soc_inst|m0_1|u_logic|Yafwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y22_N1
-dffeas \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE (
+// Location: FF_X21_Y21_N10
+dffeas \soc_inst|m0_1|u_logic|E1r2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|E1r2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|E1r2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E1r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E1r2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg2wx4~0 (
+// Location: MLABCELL_X15_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yg2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( !\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|Xr0xx4~combout  & ( (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|If2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ((\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & \soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xr0xx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yg2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|If2wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .lut_mask = 64'h0B0BBBBB00000000;
-defparam \soc_inst|m0_1|u_logic|Yg2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~1 .lut_mask = 64'h00331133003F153F;
+defparam \soc_inst|m0_1|u_logic|If2wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ax0xx4~0 (
+// Location: MLABCELL_X15_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ax0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) )
+// \soc_inst|m0_1|u_logic|If2wx4~2_combout  = ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|If2wx4~1_combout  & (((\soc_inst|m0_1|u_logic|I2t2z4~q  & \soc_inst|m0_1|u_logic|K1z2z4~q )) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) 
+// )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|If2wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ax0xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vi2wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Vi2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ax0xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .lut_mask = 64'h0000003300000000;
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|If2wx4~2 .lut_mask = 64'h0000000005150515;
+defparam \soc_inst|m0_1|u_logic|If2wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qaqvx4~0 (
+// Location: MLABCELL_X15_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hx1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Hx1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Qaqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw0xx4~0 (
+// Location: FF_X22_Y21_N41
+dffeas \soc_inst|m0_1|u_logic|Ka93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ka93z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ka93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ka93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rv1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fw0xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vb2wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fw0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .lut_mask = 64'h0000000088880000;
-defparam \soc_inst|m0_1|u_logic|Fw0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .lut_mask = 64'h00000000AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vi2wx4~1 (
+// Location: LABCELL_X17_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rv1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vi2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fw0xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Rv1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Vi2wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fw0xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .lut_mask = 64'hFAFA000000000000;
-defparam \soc_inst|m0_1|u_logic|Vi2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ro0xx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ro0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Emi2z4~q  & ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ro0xx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y21_N47
+dffeas \soc_inst|m0_1|u_logic|T9v2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T9v2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .lut_mask = 64'h0000050000005555;
-defparam \soc_inst|m0_1|u_logic|Ro0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T9v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T9v2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~1 (
+// Location: LABCELL_X17_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kv1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qj2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((\soc_inst|m0_1|u_logic|Fij2z4~q ))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (((\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fij2z4~q )))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  $ ((\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kv1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .lut_mask = 64'h0399031100990011;
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~0 (
+// Location: FF_X22_Y21_N50
+dffeas \soc_inst|m0_1|u_logic|S2r2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|S2r2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S2r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S2r2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y20_N19
+dffeas \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qj2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ixxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ka93z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|T9v2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|E1r2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|S2r2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E1r2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ka93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T9v2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S2r2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .lut_mask = 64'h0C00FF00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .lut_mask = 64'hFF00AAAAF0F0CCCC;
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qj2wx4~2 (
+// Location: LABCELL_X16_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tw1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qj2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ro0xx4~0_combout  & !\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ob2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ro0xx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qj2wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qj2wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jucwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .lut_mask = 64'hAA00000000000000;
-defparam \soc_inst|m0_1|u_logic|Qj2wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg2wx4 (
+// Location: LABCELL_X17_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tw1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yg2wx4~combout  = ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Yg2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yg2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Tw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yg2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg2wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yg2wx4 .lut_mask = 64'h0111011103330333;
-defparam \soc_inst|m0_1|u_logic|Yg2wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xc2wx4 (
+// Location: FF_X22_Y22_N56
+dffeas \soc_inst|m0_1|u_logic|Kw63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kw63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kw63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kw63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xc2wx4~combout  = ( \soc_inst|m0_1|u_logic|Yg2wx4~combout  & ( \soc_inst|m0_1|u_logic|Xc2wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  & ( \soc_inst|m0_1|u_logic|If2wx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xc2wx4~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xc2wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xc2wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Xc2wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlwvx4~0 (
+// Location: MLABCELL_X15_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wlwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & !\soc_inst|m0_1|u_logic|G27wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (\soc_inst|m0_1|u_logic|Ejwvx4~0_combout  & !\soc_inst|m0_1|u_logic|Swy2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Hfyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) 
+// # (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  
+// & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ((\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & \soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wlwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .lut_mask = 64'h30303030B030B030;
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .lut_mask = 64'h03031313030F135F;
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlwvx4~1 (
+// Location: MLABCELL_X15_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wlwvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wlwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Jky2z4~q )))) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Jky2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Hfyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hfyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~combout  & (((\soc_inst|m0_1|u_logic|C3z2z4~q  & \soc_inst|m0_1|u_logic|I2t2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wlwvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hfyvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wlwvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .lut_mask = 64'h0DDD0DDD00000000;
-defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .lut_mask = 64'h0000000000000A2A;
+defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y21_N37
-dffeas \soc_inst|m0_1|u_logic|C3z2z4 (
+// Location: FF_X22_Y22_N8
+dffeas \soc_inst|m0_1|u_logic|K0u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K0u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C3z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C3z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K0u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K0u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4xvx4~1 (
+// Location: LABCELL_X17_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dv1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E4xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|C3z2z4~q  & ((!\soc_inst|m0_1|u_logic|Auk2z4~q ) # (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|C3z2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Dv1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~combout  & !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E4xvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .lut_mask = 64'hFF00FF00FC00FC00;
-defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .lut_mask = 64'h00000000AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y24_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B3mvx4~0 (
+// Location: FF_X22_Y22_N37
+dffeas \soc_inst|m0_1|u_logic|G4r2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G4r2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G4r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G4r2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|E4xvx4~1_combout  & (\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|E4xvx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Wcyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|T1d3z4~q ) # (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E4xvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B3mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .lut_mask = 64'h5555555505000500;
-defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .lut_mask = 64'hFFFAFFFA00000000;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B3mvx4~1 (
+// Location: MLABCELL_X15_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B3mvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|B3mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ((\soc_inst|m0_1|u_logic|C3z2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & (\soc_inst|m0_1|u_logic|Wlwvx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Wcyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|C3z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|K1z2z4~q ) # (!\soc_inst|m0_1|u_logic|I2t2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|C3z2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wlwvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B3mvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .lut_mask = 64'h048C048C00000000;
-defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .lut_mask = 64'hCCCCCCCCCCC0CCC0;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y21_N38
-dffeas \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE (
+// Location: FF_X21_Y19_N32
+dffeas \soc_inst|m0_1|u_logic|Sjj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X30_Y22_N28
-dffeas \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
 	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sjj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sjj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ob2wx4~0 (
+// Location: LABCELL_X12_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ob2wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Wcyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ob2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .lut_mask = 64'hFCFCCCCCF0F00000;
-defparam \soc_inst|m0_1|u_logic|Ob2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .lut_mask = 64'hFFFFFFAA00000000;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ob2wx4 (
+// Location: MLABCELL_X15_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ob2wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ob2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|If2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) # (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Wcyvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wcyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wcyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wcyvx4~2_combout  & \soc_inst|m0_1|u_logic|Hfyvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wcyvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wcyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ob2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wcyvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ob2wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ob2wx4 .lut_mask = 64'h0077007700000000;
-defparam \soc_inst|m0_1|u_logic|Ob2wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .lut_mask = 64'h00A000A000000000;
+defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hx1wx4~0 (
+// Location: FF_X22_Y24_N22
+dffeas \soc_inst|m0_1|u_logic|T583z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T583z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T583z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T583z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y22_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ob2wx4~combout  & ( \soc_inst|m0_1|u_logic|Xc2wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Ixxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T583z4~q  & ( (!\soc_inst|m0_1|u_logic|Kw63z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T583z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G4r2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|K0u2z4~q )) 
+// ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T583z4~q  & ( (!\soc_inst|m0_1|u_logic|Kw63z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|T583z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G4r2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|K0u2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kw63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K0u2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G4r2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T583z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .lut_mask = 64'hF0CCAAFFF0CCAA00;
+defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V2iwx4~0 (
+// Location: LABCELL_X23_Y23_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V2iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Enrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Ixxwx4~combout  = ( \soc_inst|m0_1|u_logic|Ixxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ixxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Ixxwx4~0_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Enrwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ixxwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|V2iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixxwx4 .lut_mask = 64'h000500050A0F0A0F;
+defparam \soc_inst|m0_1|u_logic|Ixxwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A2iwx4~0 (
+// Location: MLABCELL_X28_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A2iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Jky2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( 
-// ((\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Jky2z4~q )) # (\soc_inst|m0_1|u_logic|J3iwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Svxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A2iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .lut_mask = 64'h7575757530303030;
-defparam \soc_inst|m0_1|u_logic|A2iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .lut_mask = 64'h00A000A022A222A2;
+defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A2iwx4~1 (
+// Location: LABCELL_X18_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Shyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A2iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|E4iwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & !\soc_inst|m0_1|u_logic|A2iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E4iwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & (\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|A2iwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Shyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|A2iwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .lut_mask = 64'h1010101050505050;
-defparam \soc_inst|m0_1|u_logic|A2iwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y22_N38
-dffeas \soc_inst|m0_1|u_logic|Sjj2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sjj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sjj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .lut_mask = 64'h00000808AAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Shyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~5 (
+// Location: LABCELL_X27_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~5_combout  = (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~q ))))
+// \soc_inst|m0_1|u_logic|Lhyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .lut_mask = 64'h2202220222022202;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .lut_mask = 64'hF0C0F0C000000000;
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Srgwx4~0 (
+// Location: MLABCELL_X28_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Srgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) 
-// ) )
+// \soc_inst|m0_1|u_logic|Lhyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Lhyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qxc2z4~combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .lut_mask = 64'h0010001000000000;
-defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .lut_mask = 64'hCCEECCEE0C0E0000;
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X8kwx4~0 (
+// Location: LABCELL_X27_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X8kwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Srgwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pdi2z4~q  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout 
+//  & \soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pdi2z4~q  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout  & \soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .lut_mask = 64'h0A0A0A0A00000000;
-defparam \soc_inst|m0_1|u_logic|X8kwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .lut_mask = 64'h040455550C0CFFFF;
+defparam \soc_inst|m0_1|u_logic|Lhyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuwvx4~0 (
+// Location: MLABCELL_X21_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tuwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .lut_mask = 64'h0500050000000000;
-defparam \soc_inst|m0_1|u_logic|Tuwvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Pmgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zzfwx4~0 (
+// Location: MLABCELL_X25_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ez8wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|X77wx4~combout  & (\soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .lut_mask = 64'h0F000F0000000000;
-defparam \soc_inst|m0_1|u_logic|Zzfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .lut_mask = 64'h0500050000000000;
+defparam \soc_inst|m0_1|u_logic|Ez8wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~6 (
+// Location: MLABCELL_X28_Y22_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~6_combout  = ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (!\soc_inst|m0_1|u_logic|T1xvx4~0_combout 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Qppvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qzq2z4~q  & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nen2z4~q  & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzq2z4~q  & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nen2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|G0w2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qppvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .lut_mask = 64'hFB00FB00C800C800;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .lut_mask = 64'h000000002F202020;
+defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~7 (
+// Location: LABCELL_X27_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X4pvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~7_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q 
-//  & ( (\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|X4pvx4~combout  = (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mtqvx4~combout )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X4pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X4pvx4 .lut_mask = 64'h0FFF0FFF0FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|X4pvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J4pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J4pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .lut_mask = 64'h0C0F0C0F00030003;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .lut_mask = 64'h88AACCFF0000C0F0;
+defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2mwx4~0 (
+// Location: LABCELL_X29_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4pvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I2mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ucqvx4~combout  & (((\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )))) # (\soc_inst|m0_1|u_logic|Ucqvx4~combout  & 
-// (((\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|J4pvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|J4pvx4~0_combout  & (!\soc_inst|m0_1|u_logic|S5pvx4~combout  & !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|J4pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J4pvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .lut_mask = 64'h0F000F001F111F11;
-defparam \soc_inst|m0_1|u_logic|I2mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~8 (
+// Location: LABCELL_X17_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8rwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~8_combout  = ( !\soc_inst|m0_1|u_logic|I2mwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K6yvx4~7_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q 
-// )))) ) )
+// \soc_inst|m0_1|u_logic|Q8rwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K6yvx4~7_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .lut_mask = 64'hF0B0F0B000000000;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .lut_mask = 64'hFFD8FFFA00000000;
+defparam \soc_inst|m0_1|u_logic|Q8rwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~9 (
+// Location: MLABCELL_X28_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~9_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|K6yvx4~5_combout  & (\soc_inst|m0_1|u_logic|K6yvx4~6_combout  & ((!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Jky2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Qs7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K6yvx4~5_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K6yvx4~6_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .lut_mask = 64'h0000000000A200A2;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .lut_mask = 64'hF000F00000000000;
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X5gwx4~0 (
+// Location: MLABCELL_X28_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X5gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|X5gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~3 (
+// Location: MLABCELL_X28_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|C9yvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|C9yvx4~combout )) # (\soc_inst|m0_1|u_logic|X5gwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & \soc_inst|m0_1|u_logic|X5gwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|F8iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jp3wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Jp3wx4~combout  & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .lut_mask = 64'h0505050505CD05CD;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~2 (
+// Location: LABCELL_X29_Y21_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C8rwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|C8rwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & !\soc_inst|m0_1|u_logic|Manwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .lut_mask = 64'h0F0F0F0F05050505;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .lut_mask = 64'h0500050000000000;
+defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~4 (
+// Location: LABCELL_X29_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V9iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K6yvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|K6yvx4~3_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K6yvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|K6yvx4~3_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|K6yvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (((\soc_inst|m0_1|u_logic|Qdj2z4~q  & \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|K6yvx4~3_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K6yvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|K6yvx4~3_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|V9iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K6yvx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .lut_mask = 64'h0A0A0A2A0A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|My6wx4~0 (
+// Location: MLABCELL_X28_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S8ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|My6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|S8ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|My6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|My6wx4~0 .lut_mask = 64'h0022002200000000;
-defparam \soc_inst|m0_1|u_logic|My6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vnxvx4~0 (
+// Location: LABCELL_X17_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H9iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Ohwvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|H9iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .lut_mask = 64'h0C0C0C0C00000000;
-defparam \soc_inst|m0_1|u_logic|Vnxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .lut_mask = 64'hFCFEFCFE00000000;
+defparam \soc_inst|m0_1|u_logic|H9iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~0 (
+// Location: LABCELL_X29_Y21_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H9iwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|P7wvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|H9iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|H9iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .lut_mask = 64'h0004000400000000;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~1 (
+// Location: FF_X24_Y16_N8
+dffeas \soc_inst|m0_1|u_logic|Ffs2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ffs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffs2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qknvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~1_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|My6wx4~0_combout  & \soc_inst|m0_1|u_logic|Vnxvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|K6yvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|My6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Vnxvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Qknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ekovx4~combout  $ (!\soc_inst|m0_1|u_logic|Jxovx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ekovx4~combout  $ (!\soc_inst|m0_1|u_logic|Jxovx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .lut_mask = 64'h0400040004CC04CC;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .lut_mask = 64'h00FFAAFF003CAABE;
+defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K6yvx4~10 (
+// Location: FF_X24_Y16_N7
+dffeas \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xknvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K6yvx4~10_combout  = ( \soc_inst|m0_1|u_logic|K6yvx4~1_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (((!\soc_inst|m0_1|u_logic|K6yvx4~9_combout ) # (\soc_inst|m0_1|u_logic|K6yvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|K6yvx4~1_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|K6yvx4~9_combout ) # (\soc_inst|m0_1|u_logic|K6yvx4~4_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
+// ((\soc_inst|m0_1|u_logic|Ekovx4~combout ) # (\soc_inst|m0_1|u_logic|Rxzvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
+// ((\soc_inst|m0_1|u_logic|Ekovx4~combout ) # (\soc_inst|m0_1|u_logic|Rxzvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|K6yvx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K6yvx4~4_combout ),
-	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K6yvx4~1_combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .lut_mask = 64'h00CF00CF00DF00DF;
-defparam \soc_inst|m0_1|u_logic|K6yvx4~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .lut_mask = 64'h00FFAAFF003FAABF;
+defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y22_N44
-dffeas \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE (
+// Location: FF_X24_Y16_N37
+dffeas \soc_inst|m0_1|u_logic|Kop2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Kop2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kop2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kop2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~1 (
+// Location: LABCELL_X24_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2owx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|If2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & (((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ((\soc_inst|m0_1|u_logic|Sjj2z4~q ) # (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & \soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|T2owx4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|Kop2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|If2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|If2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|If2wx4~1 .lut_mask = 64'h111111331515153F;
-defparam \soc_inst|m0_1|u_logic|If2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T2owx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T2owx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|T2owx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If2wx4~2 (
+// Location: LABCELL_X30_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2owx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|If2wx4~2_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|If2wx4~1_combout  & (\soc_inst|m0_1|u_logic|If2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & (\soc_inst|m0_1|u_logic|If2wx4~1_combout  & \soc_inst|m0_1|u_logic|If2wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|T2owx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|T2owx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|If2wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|If2wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|If2wx4~2 .lut_mask = 64'h0003000300070007;
-defparam \soc_inst|m0_1|u_logic|If2wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T2owx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T2owx4~1 .lut_mask = 64'h0000000000400040;
+defparam \soc_inst|m0_1|u_logic|T2owx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hx1wx4~1 (
+// Location: MLABCELL_X34_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6nwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hx1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|S6nwx4~combout  = ( \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) ) 
+// )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S6nwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Hx1wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y25_N7
-dffeas \soc_inst|m0_1|u_logic|Ka93z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ka93z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ka93z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ka93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ka93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S6nwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6nwx4 .lut_mask = 64'h0000003000000000;
+defparam \soc_inst|m0_1|u_logic|S6nwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y22_N10
-dffeas \soc_inst|m0_1|u_logic|Svk2z4 (
+// Location: FF_X21_Y14_N8
+dffeas \soc_inst|m0_1|u_logic|C3w2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.ena(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|C3w2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Svk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C3w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C3w2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~1 (
+// Location: MLABCELL_X34_Y21_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L6nwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ge2wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & !\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|L6nwx4~combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|C3w2z4~q )) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L6nwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .lut_mask = 64'hFFC0FFC0C0C0C0C0;
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L6nwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L6nwx4 .lut_mask = 64'h0000300000000000;
+defparam \soc_inst|m0_1|u_logic|L6nwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge2wx4~2 (
+// Location: LABCELL_X29_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ge2wx4~1_combout  & \soc_inst|m0_1|u_logic|Ge2wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Ge2wx4~1_combout  & (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & \soc_inst|m0_1|u_logic|Ge2wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & (!\soc_inst|m0_1|u_logic|L6nwx4~combout  & ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & !\soc_inst|m0_1|u_logic|L6nwx4~combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ge2wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ge2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S6nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L6nwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .lut_mask = 64'h000C000C00CC00CC;
-defparam \soc_inst|m0_1|u_logic|Ge2wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .lut_mask = 64'hA0A0A0A0A020A020;
+defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rv1wx4~0 (
+// Location: LABCELL_X31_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Omyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  = (!\soc_inst|m0_1|u_logic|Vb2wx4~combout  & \soc_inst|m0_1|u_logic|Hx1wx4~0_combout )
+// \soc_inst|m0_1|u_logic|Omyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|C3w2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Wxp2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|C3w2z4~q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Omyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .lut_mask = 64'h00F000F000F000F0;
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .lut_mask = 64'h333B333B00080008;
+defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kv1wx4~0 (
+// Location: LABCELL_X30_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Omyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kv1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Omyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Omyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Omyvx4~0_combout  & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Omyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Omyvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Omyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Kv1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .lut_mask = 64'h0F005F00CFCCDFCC;
+defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y23_N56
-dffeas \soc_inst|m0_1|u_logic|S2r2z4 (
+// Location: FF_X24_Y16_N38
+dffeas \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S2r2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S2r2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S2r2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw1wx4~0 (
+// Location: LABCELL_X24_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Vb2wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|F4nvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & !\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ax1wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ax1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hx1wx4~0_combout  ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Hx1wx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Ax1wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y19_N37
-dffeas \soc_inst|m0_1|u_logic|E1r2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E1r2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E1r2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E1r2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rv1wx4~1 (
+// Location: LABCELL_X27_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rv1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rv1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|F4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|K3l2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( !\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & 
+// \soc_inst|m0_1|u_logic|F4nvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rv1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F4nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Rv1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .lut_mask = 64'h00000A0A33333333;
+defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N52
-dffeas \soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE (
+// Location: FF_X27_Y16_N22
+dffeas \soc_inst|m0_1|u_logic|K3l2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|F4nvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K3l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K3l2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4~0 (
+// Location: MLABCELL_X25_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ab1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ixxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|E1r2z4~q  & ( \soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|S2r2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Ka93z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E1r2z4~q  & ( \soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|S2r2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Ka93z4~q ) # ((!\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|E1r2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((!\soc_inst|m0_1|u_logic|S2r2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Ka93z4~q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E1r2z4~q  & ( !\soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((!\soc_inst|m0_1|u_logic|S2r2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Ka93z4~q ) # ((!\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ka93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(gnd),
 	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|S2r2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|E1r2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .lut_mask = 64'hFE3ECE0EF232C202;
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .lut_mask = 64'h0050005000000000;
+defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tw1wx4~0 (
+// Location: LABCELL_X31_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D31wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ob2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|D31wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D31wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D31wx4~0 .lut_mask = 64'h5500545400000000;
+defparam \soc_inst|m0_1|u_logic|D31wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tw1wx4~1 (
+// Location: LABCELL_X29_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Fjlwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jp3wx4~combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Tw1wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y23_N38
-dffeas \soc_inst|m0_1|u_logic|Kw63z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kw63z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kw63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kw63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .lut_mask = 64'hAAFFAAFF00000000;
+defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dv1wx4~0 (
+// Location: LABCELL_X29_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dv1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tw1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & !\soc_inst|m0_1|u_logic|Vb2wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Phlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X77wx4~combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tw1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .lut_mask = 64'h00000000A0A0A0A0;
-defparam \soc_inst|m0_1|u_logic|Dv1wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y23_N52
-dffeas \soc_inst|m0_1|u_logic|G4r2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G4r2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4r2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G4r2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~1 (
+// Location: MLABCELL_X28_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yilwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hfyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) 
-// # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & (((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & ((\soc_inst|m0_1|u_logic|Sjj2z4~q ) # (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q 
-//  & ( (\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & \soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Yilwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9iwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H9iwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .lut_mask = 64'h111113131155135F;
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .lut_mask = 64'hF0F0F0F0F050F050;
+defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~0 (
+// Location: LABCELL_X29_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Xc2wx4~combout  & \soc_inst|m0_1|u_logic|If2wx4~0_combout )
+// \soc_inst|m0_1|u_logic|Oa3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & !\soc_inst|m0_1|u_logic|Walwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & !\soc_inst|m0_1|u_logic|Walwx4~1_combout )) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .lut_mask = 64'h00AA00AA00AA00AA;
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .lut_mask = 64'hF555F555F000F000;
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y25_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hfyvx4~2 (
+// Location: LABCELL_X29_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hfyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Hfyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~combout  & (((\soc_inst|m0_1|u_logic|C3z2z4~q  & 
-// \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Oa3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Oa3wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|U9lwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oa3wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hfyvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oa3wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .lut_mask = 64'h00000000000002AA;
-defparam \soc_inst|m0_1|u_logic|Hfyvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y22_N56
-dffeas \soc_inst|m0_1|u_logic|K0u2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K0u2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K0u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K0u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .lut_mask = 64'hFC00FC0054005400;
+defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~0 (
+// Location: LABCELL_X24_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ab9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wcyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  & !\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ab9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|C3z2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .lut_mask = 64'hCCCCCCCCCCCCC0C0;
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~2 (
+// Location: LABCELL_X24_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y29wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wcyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|C3z2z4~q ) # (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Oi2wx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Y29wx4~combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .lut_mask = 64'hF0F0F0F0E0E0E0E0;
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y29wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y29wx4 .lut_mask = 64'h0000000000080008;
+defparam \soc_inst|m0_1|u_logic|Y29wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~1 (
+// Location: LABCELL_X23_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7cwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wcyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|T7cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (!\soc_inst|m0_1|u_logic|C3z2z4~q ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  $ (!\soc_inst|m0_1|u_logic|C3z2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .lut_mask = 64'hFFFFFAFA00000000;
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .lut_mask = 64'hC0C04080CCCC4488;
+defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wcyvx4~3 (
+// Location: LABCELL_X29_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wcyvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hfyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wcyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wcyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Wcyvx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Oa3wx4~combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oa3wx4~1_combout  & (((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oa3wx4~1_combout  & ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wcyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wcyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wcyvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hfyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .lut_mask = 64'h00000000C000C000;
-defparam \soc_inst|m0_1|u_logic|Wcyvx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y22_N31
-dffeas \soc_inst|m0_1|u_logic|T583z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T583z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T583z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T583z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oa3wx4 .lut_mask = 64'h030F030F070F070F;
+defparam \soc_inst|m0_1|u_logic|Oa3wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4~1 (
+// Location: MLABCELL_X28_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oldwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ixxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T583z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|K0u2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kw63z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G4r2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  $ 
+// (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kw63z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G4r2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K0u2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T583z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .lut_mask = 64'hCCCCAAAAF0F0FF00;
-defparam \soc_inst|m0_1|u_logic|Ixxwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .lut_mask = 64'hF00FF00FF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Oldwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixxwx4 (
+// Location: LABCELL_X24_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oaawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ixxwx4~combout  = ( \soc_inst|m0_1|u_logic|Ixxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ixxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ixxwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Oaawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|I2t2z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ixxwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ixxwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oaawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixxwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ixxwx4 .lut_mask = 64'h0003000330333033;
-defparam \soc_inst|m0_1|u_logic|Ixxwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .lut_mask = 64'hF0FFF0FF00000000;
+defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svxwx4~0 (
+// Location: LABCELL_X17_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zb83z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svxwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wai2z4~q  & ( \soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( ((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Cyq2z4~q )) # (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Wai2z4~q  & ( !\soc_inst|m0_1|u_logic|Ixxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Cyq2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Zb83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zb83z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .lut_mask = 64'h550000005F0F0000;
-defparam \soc_inst|m0_1|u_logic|Svxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zb83z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zb83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Zb83z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y23_N38
-dffeas \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE (
+// Location: FF_X17_Y14_N56
+dffeas \soc_inst|m0_1|u_logic|Zb83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zb83z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X29_Y22_N37
-dffeas \soc_inst|m0_1|u_logic|H3d3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zb83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H3d3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zb83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zb83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y26_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2m2z4~feeder (
+// Location: LABCELL_X16_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mw1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2m2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|I30wx4~2_combout  )
+// \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ob2wx4~combout  & ( \soc_inst|m0_1|u_logic|Xc2wx4~combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2m2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2m2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2m2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|H2m2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y26_N56
-dffeas \soc_inst|m0_1|u_logic|H2m2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H2m2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H2m2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H2m2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~3 (
+// Location: LABCELL_X16_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ebbwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hbv2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|H2m2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  = (!\soc_inst|m0_1|u_logic|Vb2wx4~combout  & \soc_inst|m0_1|u_logic|Mw1wx4~0_combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hbv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H2m2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .lut_mask = 64'h000000C0000000A0;
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .lut_mask = 64'h00F000F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y23_N17
-dffeas \soc_inst|m0_1|u_logic|H783z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H783z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H783z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H783z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X17_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G02wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G02wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
 
-// Location: FF_X37_Y23_N59
-dffeas \soc_inst|m0_1|u_logic|Y1u2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y1u2z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y1u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G02wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G02wx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|G02wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~2 (
+// Location: LABCELL_X18_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pu1wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ebbwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H783z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Y1u2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pu1wx4~combout  = ( \soc_inst|m0_1|u_logic|G02wx4~0_combout  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H783z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y1u2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .lut_mask = 64'h000000000A000808;
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y23_N2
-dffeas \soc_inst|m0_1|u_logic|V3m2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V3m2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V3m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V3m2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pu1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pu1wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Pu1wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y26_N25
-dffeas \soc_inst|m0_1|u_logic|Yx63z4 (
+// Location: FF_X18_Y15_N5
+dffeas \soc_inst|m0_1|u_logic|Xyh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yx63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xyh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yx63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yx63z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ebbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Yx63z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|V3m2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|V3m2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yx63z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .lut_mask = 64'h000000008080C000;
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xyh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xyh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y23_N7
-dffeas \soc_inst|m0_1|u_logic|T0m2z4 (
+// Location: FF_X18_Y14_N5
+dffeas \soc_inst|m0_1|u_logic|Q6u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T0m2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Q6u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T0m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T0m2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q6u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y23_N44
-dffeas \soc_inst|m0_1|u_logic|Yb93z4 (
+// Location: FF_X18_Y14_N34
+dffeas \soc_inst|m0_1|u_logic|Zfv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yb93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zfv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yb93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yb93z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ebbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|T0m2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Yb93z4~q ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|T0m2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yb93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .lut_mask = 64'h0000000000000A0C;
-defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zfv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zfv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4 (
+// Location: LABCELL_X18_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ebbwx4~combout  = ( !\soc_inst|m0_1|u_logic|Ebbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ebbwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Ebbwx4~2_combout  & !\soc_inst|m0_1|u_logic|Ebbwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zfv2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Q6u2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ebbwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ebbwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q6u2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zfv2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebbwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebbwx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Ebbwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .lut_mask = 64'h000A0000000C0000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y15_N11
-dffeas \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE (
+// Location: FF_X18_Y14_N38
+dffeas \soc_inst|m0_1|u_logic|Qg93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Qg93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qg93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qg93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Awc2z4~0 (
+// Location: LABCELL_X17_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q273z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Awc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & ((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  
-// & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Q273z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Awc2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .lut_mask = 64'hF0F0F0F030F030F0;
-defparam \soc_inst|m0_1|u_logic|Awc2z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kuc2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kuc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kuc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q273z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .lut_mask = 64'h00500050F050F050;
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q273z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q273z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Q273z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Awc2z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Awc2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Awc2z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X17_Y14_N25
+dffeas \soc_inst|m0_1|u_logic|Q273z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Q273z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Q273z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .lut_mask = 64'hA2A0A2A0A0A0A0A0;
-defparam \soc_inst|m0_1|u_logic|Awc2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q273z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q273z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vwc2z4~0 (
+// Location: LABCELL_X18_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vwc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qg93z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Q273z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qg93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q273z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .lut_mask = 64'hC000C000F000F000;
-defparam \soc_inst|m0_1|u_logic|Vwc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .lut_mask = 64'h00000C000000000A;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxc2z4~0 (
+// Location: LABCELL_X19_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S61xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cxc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|S61xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cxc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .lut_mask = 64'h0200020000000000;
-defparam \soc_inst|m0_1|u_logic|Cxc2z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y22_N37
-dffeas \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|A2iwx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S61xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S61xx4~0 .lut_mask = 64'h00000000000F0000;
+defparam \soc_inst|m0_1|u_logic|S61xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mvc2z4 (
+// Location: LABCELL_X17_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mvc2z4~combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Nn0wx4~6_combout  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zb83z4~q  & (!\soc_inst|m0_1|u_logic|Nn0wx4~7_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xyh3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~7_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xyh3z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zb83z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xyh3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nn0wx4~7_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mvc2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mvc2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mvc2z4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Mvc2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .lut_mask = 64'hCF00000045000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kuc2z4~1 (
+// Location: LABCELL_X18_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oaawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Cxc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mvc2z4~combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Vwc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Awc2z4~1_combout ) # (\soc_inst|m0_1|u_logic|Awc2z4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Oaawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Oaawx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( 
+// \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Awc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Awc2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mvc2z4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oaawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .lut_mask = 64'hC400000000000000;
-defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .lut_mask = 64'h1033103310333333;
+defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Akewx4~0 (
+// Location: LABCELL_X24_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4uvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Akewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \soc_inst|m0_1|u_logic|T4uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (!\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Kop2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Akewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Akewx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Akewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .lut_mask = 64'h0004000400000000;
+defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xkfwx4~0 (
+// Location: LABCELL_X33_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txtvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xkfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Txtvx4~0_combout  = ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|Xkfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kryvx4~0 (
+// Location: LABCELL_X30_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kryvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q 
-//  & (((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|A4c2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// \soc_inst|m0_1|u_logic|Xkfwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Hxmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ) # (!\soc_inst|interconnect_1|HRDATA[26]~0_combout ))) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hxmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .lut_mask = 64'h0505050505CD05CD;
-defparam \soc_inst|m0_1|u_logic|Kryvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .lut_mask = 64'hFF00FF00FA00FA00;
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Acnvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Acnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Dwl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( 
-// (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y20_N44
+dffeas \soc_inst|m0_1|u_logic|Ii63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ii63z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .lut_mask = 64'h450045CFCF00CFCF;
-defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ii63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ii63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y21_N31
-dffeas \soc_inst|m0_1|u_logic|G0w2z4 (
+// Location: FF_X21_Y22_N40
+dffeas \soc_inst|m0_1|u_logic|Rr73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rr73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G0w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G0w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rr73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y21_N20
-dffeas \soc_inst|m0_1|u_logic|Tdp2z4 (
+// Location: FF_X22_Y22_N4
+dffeas \soc_inst|m0_1|u_logic|Imt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Imt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tdp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tdp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Imt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Imt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|S6ovx4~3_combout  = ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( (\soc_inst|m0_1|u_logic|U5qvx4~combout  & \soc_inst|m0_1|u_logic|S6ovx4~1_combout ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U5qvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y22_N53
+dffeas \soc_inst|m0_1|u_logic|Skm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Skm2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Skm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xknvx4~0 (
+// Location: LABCELL_X22_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( (((!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Nlovx4~7_combout )) # 
-// (\soc_inst|m0_1|u_logic|Ekovx4~combout )) # (\soc_inst|m0_1|u_logic|Rxzvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ekovx4~combout )) # (\soc_inst|m0_1|u_logic|Rxzvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( !\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Q8ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Imt2z4~q  & ( \soc_inst|m0_1|u_logic|Skm2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ii63z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Rr73z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Imt2z4~q  & ( \soc_inst|m0_1|u_logic|Skm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ii63z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Rr73z4~q ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Imt2z4~q  & ( !\soc_inst|m0_1|u_logic|Skm2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ii63z4~q ) # ((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Rr73z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Imt2z4~q  & ( !\soc_inst|m0_1|u_logic|Skm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ii63z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Rr73z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ii63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rr73z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Imt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Skm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .lut_mask = 64'h0000F0F0FF77FFF7;
-defparam \soc_inst|m0_1|u_logic|Xknvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .lut_mask = 64'hFFD8AAD855D800D8;
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y16_N43
-dffeas \soc_inst|m0_1|u_logic|Kop2z4 (
+// Location: FF_X22_Y21_N5
+dffeas \soc_inst|m0_1|u_logic|Ejm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xknvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ejm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kop2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kop2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ejm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ejm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y16_N53
-dffeas \soc_inst|m0_1|u_logic|Mjl2z4 (
+// Location: FF_X22_Y21_N7
+dffeas \soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mjl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mjl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nmnvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nmnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ) # ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout  & 
-// \soc_inst|m0_1|u_logic|Mjl2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Mjl2z4~q ) ) )
-
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y20_N38
+dffeas \soc_inst|m0_1|u_logic|Gmm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gmm2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .lut_mask = 64'h00AA00AAFCFEFCFE;
-defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gmm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gmm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y16_N52
-dffeas \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE (
+// Location: FF_X22_Y21_N26
+dffeas \soc_inst|m0_1|u_logic|Unm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Unm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Unm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Unm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W0pvx4 (
+// Location: LABCELL_X22_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W0pvx4~combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) )
+// \soc_inst|m0_1|u_logic|Q8ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gmm2z4~q  & ( \soc_inst|m0_1|u_logic|Unm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ejm2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE_q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gmm2z4~q  & ( \soc_inst|m0_1|u_logic|Unm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ejm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gmm2z4~q  & ( !\soc_inst|m0_1|u_logic|Unm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Ejm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Gmm2z4~q  & ( !\soc_inst|m0_1|u_logic|Unm2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ejm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE_q 
+// )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ejm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gmm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Unm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W0pvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W0pvx4 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|W0pvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .lut_mask = 64'hBBF388F3BBC088C0;
+defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wxcwx4~0 (
+// Location: LABCELL_X22_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wxcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Q8ywx4~combout  = ( \soc_inst|m0_1|u_logic|Q8ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q8ywx4~1_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Q8ywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Q8ywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Q8ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q8ywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Wxcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8ywx4 .lut_mask = 64'h00000A0A05050F0F;
+defparam \soc_inst|m0_1|u_logic|Q8ywx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~0 (
+// Location: LABCELL_X22_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sknwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~q ) # (\soc_inst|m0_1|u_logic|Q8ywx4~combout ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & !\soc_inst|m0_1|u_logic|Wai2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q8ywx4~combout  & !\soc_inst|m0_1|u_logic|Wai2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .lut_mask = 64'h0000FFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Sknwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .lut_mask = 64'h00005500CC00DD00;
+defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kswwx4~0 (
+// Location: LABCELL_X27_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D5ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kswwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  $ (\soc_inst|m0_1|u_logic|A7ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|A7ywx4~0_combout  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kswwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Kswwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .lut_mask = 64'hF0F0F0F0A5A5A5A5;
+defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y23_N55
-dffeas \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE (
+// Location: FF_X24_Y20_N32
+dffeas \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y22_N2
-dffeas \soc_inst|m0_1|u_logic|Fgm2z4 (
+// Location: FF_X22_Y18_N28
+dffeas \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rblwx4~2_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fgm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fgm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yilwx4~0 (
+// Location: FF_X23_Y21_N14
+dffeas \soc_inst|m0_1|u_logic|T0m2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T0m2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T0m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T0m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yilwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9iwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H9iwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ebbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T0m2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T0m2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q 
+//  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T0m2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .lut_mask = 64'hCCCCCCCC88CC88CC;
-defparam \soc_inst|m0_1|u_logic|Yilwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .lut_mask = 64'h0000000E00000004;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sknwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// Location: FF_X19_Y21_N2
+dffeas \soc_inst|m0_1|u_logic|V3m2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V3m2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V3m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V3m2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sknwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y21_N29
+dffeas \soc_inst|m0_1|u_logic|Yx63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yx63z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .lut_mask = 64'hFF00FF00B1B1B1B1;
-defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yx63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~2 (
+// Location: LABCELL_X19_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sknwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sknwx4~1_combout  & ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Sknwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Wxp2z4~q ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ebbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|V3m2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yx63z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sknwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|V3m2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yx63z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .lut_mask = 64'h0000AFFF00000F0F;
-defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .lut_mask = 64'h000000008C800000;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y16_N14
-dffeas \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE (
+// Location: FF_X18_Y22_N35
+dffeas \soc_inst|m0_1|u_logic|H783z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|H783z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H783z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H783z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6nwx4 (
+// Location: FF_X18_Y22_N44
+dffeas \soc_inst|m0_1|u_logic|Y1u2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y1u2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1u2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y22_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S6nwx4~combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wxp2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Ebbwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|H783z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Y1u2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H783z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y1u2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S6nwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S6nwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S6nwx4 .lut_mask = 64'h0000000000080008;
-defparam \soc_inst|m0_1|u_logic|S6nwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .lut_mask = 64'h0000000000C00088;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imnwx4 (
+// Location: LABCELL_X19_Y23_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hbv2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Imnwx4~combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q 
-// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S6nwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Hbv2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|I30wx4~2_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S6nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hbv2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imnwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Imnwx4 .lut_mask = 64'hAAAA8AAAAA008A00;
-defparam \soc_inst|m0_1|u_logic|Imnwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hbv2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hbv2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Hbv2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y19_N14
-dffeas \soc_inst|m0_1|u_logic|Nen2z4 (
+// Location: FF_X19_Y23_N38
+dffeas \soc_inst|m0_1|u_logic|Hbv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hbv2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hbv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nen2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nen2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hbv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hbv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~0 (
+// Location: LABCELL_X19_Y23_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2m2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qppvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nen2z4~q  & (\soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Nen2z4~q ))) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|H2m2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|I30wx4~2_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qppvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H2m2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .lut_mask = 64'h030A0300000A0000;
-defparam \soc_inst|m0_1|u_logic|Qppvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2m2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2m2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|H2m2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q77wx4~0 (
+// Location: FF_X19_Y23_N44
+dffeas \soc_inst|m0_1|u_logic|H2m2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|H2m2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H2m2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H2m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y23_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q77wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Ebbwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|H2m2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Hbv2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hbv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H2m2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .lut_mask = 64'h0F000F0000000000;
-defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .lut_mask = 64'h000000000000CA00;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qobwx4~0 (
+// Location: LABCELL_X24_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebbwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qobwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( \soc_inst|m0_1|u_logic|Q77wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ebbwx4~combout  = ( !\soc_inst|m0_1|u_logic|Ebbwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ebbwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Ebbwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ebbwx4~2_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ebbwx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ebbwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ebbwx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ebbwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .lut_mask = 64'h0000000000000F00;
-defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ebbwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Ebbwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R29wx4~0 (
+// Location: LABCELL_X22_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R29wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qobwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xwawx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Bdwwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|T9v2z4~q  & ( \soc_inst|m0_1|u_logic|S2r2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T9v2z4~q  & ( !\soc_inst|m0_1|u_logic|S2r2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T9v2z4~q  & ( !\soc_inst|m0_1|u_logic|S2r2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T9v2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S2r2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R29wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R29wx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|R29wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .lut_mask = 64'h0404040000040000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U09wx4~0 (
+// Location: LABCELL_X22_Y22_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U09wx4~0_combout  = ( \soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y29wx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ) # (((!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|W19wx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Bdwwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|G4r2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Kw63z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kw63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|G4r2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U09wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U09wx4~0 .lut_mask = 64'hAEFF0CFFAEAE0C0C;
-defparam \soc_inst|m0_1|u_logic|U09wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .lut_mask = 64'h00000000C0A00000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0pvx4~0 (
+// Location: LABCELL_X22_Y21_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Bdwwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ka93z4~q  & ( \soc_inst|m0_1|u_logic|E1r2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ka93z4~q  & ( !\soc_inst|m0_1|u_logic|E1r2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ka93z4~q  & ( !\soc_inst|m0_1|u_logic|E1r2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ka93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E1r2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .lut_mask = 64'h0000000000000F0F;
-defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .lut_mask = 64'h0003000200010000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnyvx4~0 (
+// Location: LABCELL_X22_Y22_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qnyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Bdwwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|K0u2z4~q  & ( \soc_inst|m0_1|u_logic|T583z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K0u2z4~q  & ( !\soc_inst|m0_1|u_logic|T583z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K0u2z4~q  & ( !\soc_inst|m0_1|u_logic|T583z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|K0u2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T583z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .lut_mask = 64'h00000000FFFFBB00;
-defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .lut_mask = 64'h0300010002000000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vllvx4~0 (
+// Location: LABCELL_X23_Y23_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vllvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U4z2z4~q  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fcj2z4~q  & \soc_inst|m0_1|u_logic|Df3wx4~9_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|U4z2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Fcj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Bdwwx4~combout  = ( !\soc_inst|m0_1|u_logic|Bdwwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bdwwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bdwwx4~3_combout  & !\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bdwwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bdwwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bdwwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vllvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .lut_mask = 64'hFF30FF3000300030;
-defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bdwwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Bdwwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y16_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vllvx4~1 (
+// Location: LABCELL_X24_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jmdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vllvx4~1_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|Vllvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T50wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|Vllvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T50wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bdwwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bdwwx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Ebbwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bdwwx4~combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vllvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .lut_mask = 64'hA8A8FCFC00000000;
-defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .lut_mask = 64'h0F0F00000F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y16_N41
-dffeas \soc_inst|m0_1|u_logic|U4z2z4 (
+// Location: FF_X18_Y18_N32
+dffeas \soc_inst|m0_1|u_logic|Ajn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U4z2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ajn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U4z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U4z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ajn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ajn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|D4mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & !\soc_inst|m0_1|u_logic|Iwp2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & !\soc_inst|m0_1|u_logic|Iwp2z4~q ) ) )
+// Location: FF_X18_Y18_N8
+dffeas \soc_inst|m0_1|u_logic|Gju2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gju2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gju2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gju2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Iwp2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D4mvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y18_N23
+dffeas \soc_inst|m0_1|u_logic|Po83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Po83z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .lut_mask = 64'hC0C0C0C0FFC0FFC0;
-defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Po83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~0 (
+// Location: LABCELL_X18_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D4mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Tki2z4~q ))) # (\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Ylbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Po83z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gju2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gf73z4~q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ajn2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gf73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ajn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gju2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Po83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D4mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .lut_mask = 64'h30BA30BA00AA00AA;
-defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .lut_mask = 64'h333355550F0F00FF;
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y15_N56
-dffeas \soc_inst|m0_1|u_logic|Z7i2z4 (
+// Location: FF_X18_Y17_N23
+dffeas \soc_inst|m0_1|u_logic|Mhn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mhn2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mhn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mhn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y17_N44
+dffeas \soc_inst|m0_1|u_logic|Psv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Psv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z7i2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z7i2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Psv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~2 (
+// Location: LABCELL_X18_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yfn2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D4mvx4~2_combout  = ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z7i2z4~q  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & !\soc_inst|m0_1|u_logic|D4mvx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z7i2z4~q  & ( !\soc_inst|m0_1|u_logic|D4mvx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & !\soc_inst|m0_1|u_logic|D4mvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( (!\soc_inst|m0_1|u_logic|D4mvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|D4mvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Yfn2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D4mvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D4mvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yfn2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .lut_mask = 64'hF0C0C0C0F0F0C0C0;
-defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yfn2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yfn2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Yfn2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y15_N49
-dffeas \soc_inst|m0_1|u_logic|Iwp2z4 (
+// Location: FF_X18_Y20_N25
+dffeas \soc_inst|m0_1|u_logic|Yfn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Yfn2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Iwp2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iwp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Iwp2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X34_Y22_N26
-dffeas \soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Yfn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yfn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yfn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X35_Y22_N20
-dffeas \soc_inst|m0_1|u_logic|Ug63z4 (
+// Location: FF_X18_Y17_N2
+dffeas \soc_inst|m0_1|u_logic|Vu93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ug63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vu93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ug63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ug63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vu93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vu93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~0 (
+// Location: LABCELL_X18_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ug63z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ylbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Vu93z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Psv2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yfn2z4~q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Mhn2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ug63z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mhn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Psv2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yfn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vu93z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .lut_mask = 64'h0000A0000000C000;
-defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .lut_mask = 64'h55550F0F333300FF;
+defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y22_N17
-dffeas \soc_inst|m0_1|u_logic|Ukt2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ukt2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ylbwx4~combout  = ( \soc_inst|m0_1|u_logic|Ylbwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ylbwx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ylbwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ukt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ukt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylbwx4 .lut_mask = 64'h5505550550005000;
+defparam \soc_inst|m0_1|u_logic|Ylbwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~2 (
+// Location: LABCELL_X22_Y24_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duu2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duuwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Dq73z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Ukt2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dq73z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Ukt2z4~q ) 
-// # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Duu2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qppvx4~2_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ukt2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dq73z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duu2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .lut_mask = 64'h0000000022022000;
-defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duu2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Duu2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y23_N22
+// Location: FF_X22_Y24_N53
 dffeas \soc_inst|m0_1|u_logic|Duu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Duu2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
@@ -19117,7 +18383,7 @@ defparam \soc_inst|m0_1|u_logic|Duu2z4 .is_wysiwyg = "true";
 defparam \soc_inst|m0_1|u_logic|Duu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y23_N39
+// Location: MLABCELL_X21_Y21_N45
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtj2z4~feeder (
 // Equation(s):
 // \soc_inst|m0_1|u_logic|Dtj2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qppvx4~2_combout  )
@@ -19141,8 +18407,8 @@ defparam \soc_inst|m0_1|u_logic|Dtj2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
 defparam \soc_inst|m0_1|u_logic|Dtj2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y23_N40
-dffeas \soc_inst|m0_1|u_logic|Dtj2z4 (
+// Location: FF_X21_Y21_N46
+dffeas \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Dtj2z4~feeder_combout ),
 	.asdata(vcc),
@@ -19153,25 +18419,25 @@ dffeas \soc_inst|m0_1|u_logic|Dtj2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dtj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dtj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dtj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N0
+// Location: LABCELL_X22_Y24_N27
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duuwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Duu2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Dtj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Duuwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Duu2z4~q )))) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Duu2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dtj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -19181,14 +18447,33 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~3 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .lut_mask = 64'h0300020200000000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .lut_mask = 64'h00000C0A00000000;
 defparam \soc_inst|m0_1|u_logic|Duuwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlz2z4~feeder (
+// Location: FF_X22_Y22_N32
+dffeas \soc_inst|m0_1|u_logic|Ukt2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ukt2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ukt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ukt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dq73z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wlz2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qppvx4~2_combout  )
+// \soc_inst|m0_1|u_logic|Dq73z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qppvx4~2_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
@@ -19199,109 +18484,169 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlz2z4~feeder (
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wlz2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dq73z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wlz2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wlz2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Wlz2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dq73z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dq73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Dq73z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mw1wx4~0 (
+// Location: FF_X24_Y18_N34
+dffeas \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dq73z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y22_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ob2wx4~combout  & ( \soc_inst|m0_1|u_logic|Xc2wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Duuwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ukt2z4~q  & ( \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ukt2z4~q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ukt2z4~q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ukt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .lut_mask = 64'h000A000200080000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu1wx4~0 (
+// Location: FF_X23_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|Txj2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Txj2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Txj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Txj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fwj2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  = (!\soc_inst|m0_1|u_logic|Vb2wx4~combout  & \soc_inst|m0_1|u_logic|Mw1wx4~0_combout )
+// \soc_inst|m0_1|u_logic|Fwj2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qppvx4~2_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fwj2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .lut_mask = 64'h0C0C0C0C0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fwj2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fwj2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Fwj2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y24_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu1wx4~1 (
+// Location: FF_X21_Y21_N8
+dffeas \soc_inst|m0_1|u_logic|Fwj2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fwj2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fwj2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fwj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fwj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wu1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Duuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Txj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fwj2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fwj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .lut_mask = 64'h0000003000000022;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y24_N20
-dffeas \soc_inst|m0_1|u_logic|Wlz2z4 (
+// Location: FF_X22_Y22_N20
+dffeas \soc_inst|m0_1|u_logic|Ruj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wlz2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wlz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ruj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wlz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wlz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ruj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ruj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y24_N55
-dffeas \soc_inst|m0_1|u_logic|Qi03z4 (
+// Location: FF_X22_Y22_N14
+dffeas \soc_inst|m0_1|u_logic|Ug63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
 	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
@@ -19309,1547 +18654,1866 @@ dffeas \soc_inst|m0_1|u_logic|Qi03z4 (
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qi03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ug63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qi03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qi03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ug63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~2 (
+// Location: LABCELL_X22_Y22_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Punvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wlz2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Qi03z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Duuwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ruj2z4~q  & ( \soc_inst|m0_1|u_logic|Ug63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ug63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ug63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wlz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qi03z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ruj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ug63z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Punvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Punvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Punvx4~2 .lut_mask = 64'h0C00000008080000;
-defparam \soc_inst|m0_1|u_logic|Punvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .lut_mask = 64'h4040004040000000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yv1wx4~0 (
+// Location: LABCELL_X23_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ob2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Duuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Duuwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duuwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Duuwx4~2_combout  & !\soc_inst|m0_1|u_logic|Duuwx4~1_combout )) ) )
 
 	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Duuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duuwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Duuwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kw7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ylbwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Duuwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|Ylbwx4~combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .lut_mask = 64'h55005500FFAAFFAA;
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ydyvx4 (
+// Location: MLABCELL_X28_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jmdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ydyvx4~combout  = ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Jmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kw7wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Jmdwx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ydyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ydyvx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Ydyvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .lut_mask = 64'h00AA00AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y24_N26
-dffeas \soc_inst|m0_1|u_logic|To23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|To23z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pm9wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|To23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|To23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .lut_mask = 64'h0200020000000000;
+defparam \soc_inst|m0_1|u_logic|Pm9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yv1wx4~1 (
+// Location: LABCELL_X24_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ijcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yv1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ijcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|C3z2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|C3z2z4~q ) 
+// ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .lut_mask = 64'hAAFFAAFF00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y24_N8
-dffeas \soc_inst|m0_1|u_logic|Kf13z4 (
+// Location: FF_X22_Y24_N56
+dffeas \soc_inst|m0_1|u_logic|Ft73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kf13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ft73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kf13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kf13z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X35_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Punvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|To23z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kf13z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|To23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kf13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Punvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Punvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Punvx4~1 .lut_mask = 64'h00000000C000A000;
-defparam \soc_inst|m0_1|u_logic|Punvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ft73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ft73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txj2z4~feeder (
+// Location: LABCELL_X16_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G02wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Txj2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qppvx4~2_combout  )
+// \soc_inst|m0_1|u_logic|G02wx4~combout  = ( \soc_inst|m0_1|u_logic|G02wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M1j2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Txj2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Txj2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Txj2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Txj2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G02wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G02wx4 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|G02wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y25_N38
-dffeas \soc_inst|m0_1|u_logic|Txj2z4 (
+// Location: FF_X21_Y20_N55
+dffeas \soc_inst|m0_1|u_logic|Cai3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Txj2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Txj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cai3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Txj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Txj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cai3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cai3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y23_N13
-dffeas \soc_inst|m0_1|u_logic|Fwj2z4~DUPLICATE (
+// Location: FF_X21_Y20_N2
+dffeas \soc_inst|m0_1|u_logic|N8i3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fwj2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|N8i3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fwj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fwj2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Duuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Txj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fwj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Txj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fwj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .lut_mask = 64'h0000000000300022;
-defparam \soc_inst|m0_1|u_logic|Duuwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X35_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Punvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Punvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Duuwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duuwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Duuwx4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|Duuwx4~3_combout  & !\soc_inst|m0_1|u_logic|Punvx4~2_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Punvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Punvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Punvx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Punvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Punvx4~3 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Punvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N8i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N8i3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y25_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw1wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Fw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X18_Y21_N37
+dffeas \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .lut_mask = 64'h00000F0F00000F0F;
-defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N38
-dffeas \soc_inst|m0_1|u_logic|Cy33z4 (
+// Location: FF_X25_Y21_N56
+dffeas \soc_inst|m0_1|u_logic|Uu83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cy33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uu83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cy33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cy33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uu83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uu83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mw1wx4~1 (
+// Location: MLABCELL_X21_Y24_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~7_combout  = ( \soc_inst|m0_1|u_logic|Uu83z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uu83z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uu83z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .lut_mask = 64'h0000000040054000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N17
-dffeas \soc_inst|m0_1|u_logic|L753z4 (
+// Location: FF_X21_Y20_N10
+dffeas \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L753z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L753z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L753z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~0 (
+// Location: MLABCELL_X21_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y21xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Punvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L753z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cy33z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Y21xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cy33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|L753z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Punvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Punvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Punvx4~0 .lut_mask = 64'h0000220000003000;
-defparam \soc_inst|m0_1|u_logic|Punvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .lut_mask = 64'h0080008000000000;
+defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~4 (
+// Location: LABCELL_X22_Y24_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Punvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Punvx4~3_combout ) # (\soc_inst|m0_1|u_logic|Punvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|U4z2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cai3z4~q  & (\soc_inst|m0_1|u_logic|N8i3z4~q  & !\soc_inst|m0_1|u_logic|O7zvx4~7_combout )) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cai3z4~q  & !\soc_inst|m0_1|u_logic|O7zvx4~7_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|N8i3z4~q  & !\soc_inst|m0_1|u_logic|O7zvx4~7_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|O7zvx4~7_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Iwp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Punvx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Punvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Cai3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|N8i3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O7zvx4~7_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Punvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Punvx4~4 .lut_mask = 64'hCCCCAAAACCCCF0FF;
-defparam \soc_inst|m0_1|u_logic|Punvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .lut_mask = 64'hFF000F0033000300;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lz8wx4~0 (
+// Location: MLABCELL_X21_Y24_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mi13z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lz8wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Punvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|U09wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|U09wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|U09wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|U09wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Punvx4~4_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|U09wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Punvx4~4_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|U09wx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Mi13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lz8wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mi13z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .lut_mask = 64'hFF66FF66F6900000;
-defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mi13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mi13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Mi13z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dfd2z4 (
+// Location: LABCELL_X16_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yv1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dfd2z4~combout  = ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qfdwx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ob2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Xc2wx4~combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xc2wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ob2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dfd2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dfd2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dfd2z4 .lut_mask = 64'hFFFFFFFFFFCFFFCF;
-defparam \soc_inst|m0_1|u_logic|Dfd2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y26_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ek03z4~feeder (
+// Location: LABCELL_X17_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yv1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ek03z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Yv1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ek03z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ek03z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ek03z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ek03z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .lut_mask = 64'h00000F0F00000F0F;
+defparam \soc_inst|m0_1|u_logic|Yv1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y26_N31
-dffeas \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE (
+// Location: FF_X21_Y24_N35
+dffeas \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ek03z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mi13z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y24_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vuo2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vuo2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Vuo2z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vuo2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vuo2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Vuo2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y22_N7
-dffeas \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE (
+// Location: FF_X21_Y24_N25
+dffeas \soc_inst|m0_1|u_logic|Vuo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vuo2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Vuo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vuo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vuo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L61xx4~0 (
+// Location: MLABCELL_X21_Y24_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L61xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Vuo2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vuo2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L61xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L61xx4~0 .lut_mask = 64'h00000000A000A000;
-defparam \soc_inst|m0_1|u_logic|L61xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .lut_mask = 64'h0000A000C0000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y24_N43
-dffeas \soc_inst|m0_1|u_logic|Hq23z4 (
+// Location: FF_X19_Y21_N34
+dffeas \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hq23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hq23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hq23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y25_N49
-dffeas \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P0pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .lut_mask = 64'h0000000000000F0F;
+defparam \soc_inst|m0_1|u_logic|P0pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y25_N47
-dffeas \soc_inst|m0_1|u_logic|Z853z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z853z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sknwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wxp2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Sknwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z853z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z853z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .lut_mask = 64'hCFCFC0C0C5C5C5C5;
+defparam \soc_inst|m0_1|u_logic|Sknwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~2 (
+// Location: LABCELL_X31_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sknwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zhyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Z853z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Sknwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Sknwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wxp2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z853z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .lut_mask = 64'hFF55FF55000F000F;
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .lut_mask = 64'h00000000D5DDD5DD;
+defparam \soc_inst|m0_1|u_logic|Sknwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y24_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~1 (
+// Location: LABCELL_X29_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imnwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zhyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Iwp2z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hq23z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Imnwx4~combout  = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # 
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S6nwx4~combout  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q 
+// )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hq23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Iwp2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S6nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Imnwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .lut_mask = 64'h20203030C0000000;
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Imnwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imnwx4 .lut_mask = 64'hAA8AAAAAAA8A0000;
+defparam \soc_inst|m0_1|u_logic|Imnwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y24_N41
-dffeas \soc_inst|m0_1|u_logic|Yg13z4 (
+// Location: LABCELL_X17_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Meyvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Meyvx4~combout  = ( \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & !\soc_inst|m0_1|u_logic|Vb2wx4~combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Meyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Meyvx4 .lut_mask = 64'h0000000050505050;
+defparam \soc_inst|m0_1|u_logic|Meyvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y14_N25
+dffeas \soc_inst|m0_1|u_logic|Kzf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yg13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kzf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yg13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kzf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kzf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~0 (
+// Location: LABCELL_X17_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zhyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Qz33z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yg13z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Wu1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qz33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yg13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .lut_mask = 64'h0C0000000A000000;
-defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Wu1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y22_N2
-dffeas \soc_inst|m0_1|u_logic|Rr73z4 (
+// Location: FF_X27_Y21_N11
+dffeas \soc_inst|m0_1|u_logic|Vxf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rr73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vxf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rr73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rr73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vxf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vxf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X35_Y22_N41
-dffeas \soc_inst|m0_1|u_logic|Imt2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Imt2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Imt2z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X19_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|I3a2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Vxf3z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Kzf3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vxf3z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Kzf3z4~q ) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )))) ) ) )
 
-// Location: FF_X36_Y25_N49
-dffeas \soc_inst|m0_1|u_logic|Skm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Skm2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kzf3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vxf3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|I3a2z4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Skm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .lut_mask = 64'h0000000080A08000;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y22_N50
-dffeas \soc_inst|m0_1|u_logic|Ii63z4 (
+// Location: FF_X19_Y14_N37
+dffeas \soc_inst|m0_1|u_logic|Z0g3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ii63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z0g3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ii63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ii63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z0g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z0g3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4~0 (
+// Location: LABCELL_X19_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5a2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr73z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Imt2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ii63z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Skm2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|F5a2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Z0g3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rr73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Imt2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Skm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ii63z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z0g3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F5a2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .lut_mask = 64'hF0F0FF00CCCCAAAA;
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .lut_mask = 64'h0000008000000000;
+defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N31
-dffeas \soc_inst|m0_1|u_logic|Ejm2z4 (
+// Location: FF_X19_Y14_N8
+dffeas \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ejm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ejm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ejm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N17
-dffeas \soc_inst|m0_1|u_logic|Gmm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gmm2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X16_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fw1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fw1wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gmm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gmm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Fw1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y25_N14
-dffeas \soc_inst|m0_1|u_logic|Rvu2z4 (
+// Location: FF_X16_Y18_N50
+dffeas \soc_inst|m0_1|u_logic|Vr43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rvu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vr43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rvu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vr43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X36_Y25_N55
-dffeas \soc_inst|m0_1|u_logic|Unm2z4 (
+// Location: LABCELL_X16_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mw1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mw1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mw1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mw1wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Mw1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X16_Y18_N17
+dffeas \soc_inst|m0_1|u_logic|E163z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Unm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|E163z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Unm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Unm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E163z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E163z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y25_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4~1 (
+// Location: LABCELL_X16_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Unm2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rvu2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gmm2z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ejm2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|I3a2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Vr43z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|E163z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ejm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gmm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rvu2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Unm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vr43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|E163z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I3a2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .lut_mask = 64'hAAAACCCCF0F0FF00;
-defparam \soc_inst|m0_1|u_logic|Q8ywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .lut_mask = 64'h000000000000AC00;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8ywx4 (
+// Location: MLABCELL_X21_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ue9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8ywx4~combout  = ( \soc_inst|m0_1|u_logic|Q8ywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Q8ywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Q8ywx4~0_combout  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Q8ywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8ywx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8ywx4 .lut_mask = 64'h03000300030F030F;
-defparam \soc_inst|m0_1|u_logic|Q8ywx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .lut_mask = 64'h00C0000000000000;
+defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4 (
+// Location: LABCELL_X24_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D923z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zhyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Q8ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zhyvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Zhyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|D923z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zhyvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|D923z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zhyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zhyvx4 .lut_mask = 64'hD000D00000000000;
-defparam \soc_inst|m0_1|u_logic|Zhyvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D923z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D923z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|D923z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1bvx4 (
+// Location: FF_X24_Y21_N38
+dffeas \soc_inst|m0_1|u_logic|D923z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|D923z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D923z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D923z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ydyvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E1bvx4~combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|R29wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( (\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|R29wx4~0_combout )) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ((\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ydyvx4~combout  = ( \soc_inst|m0_1|u_logic|If2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Yv1wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|If2wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E1bvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E1bvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E1bvx4 .lut_mask = 64'h5F00A0FF5F5FA0A0;
-defparam \soc_inst|m0_1|u_logic|E1bvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ydyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ydyvx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Ydyvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxnvx4~0 (
+// Location: FF_X27_Y21_N26
+dffeas \soc_inst|m0_1|u_logic|Mi33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mi33z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mi33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vxnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|I3a2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Mi33z4~q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mi33z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vxnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I3a2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .lut_mask = 64'hAA0AAA0A00000000;
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .lut_mask = 64'h000080800000C000;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zznvx4~0 (
+// Location: LABCELL_X19_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zznvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|I3a2z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I3a2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I3a2z4~2_combout  & (!\soc_inst|m0_1|u_logic|F5a2z4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|I3a2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I3a2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I3a2z4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|F5a2z4~0_combout  & !\soc_inst|m0_1|u_logic|I3a2z4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|I3a2z4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|F5a2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|I3a2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I3a2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zznvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I3a2z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .lut_mask = 64'h0000000000100010;
-defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .lut_mask = 64'h8800080000000000;
+defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0qvx4 (
+// Location: FF_X27_Y16_N53
+dffeas \soc_inst|m0_1|u_logic|Psh3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Psh3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Psh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y91xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K0qvx4~combout  = ( \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  )
+// \soc_inst|m0_1|u_logic|Y91xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K0qvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K0qvx4 .lut_mask = 64'hFFFFFFFFFFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|K0qvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .lut_mask = 64'h0000F00000000000;
+defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X4pvx4 (
+// Location: FF_X17_Y17_N38
+dffeas \soc_inst|m0_1|u_logic|Vr33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vr33z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vr33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ft83z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X4pvx4~combout  = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ft83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ft83z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X4pvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X4pvx4 .lut_mask = 64'h55555555FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|X4pvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ft83z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ft83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ft83z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wspvx4 (
+// Location: FF_X18_Y13_N38
+dffeas \soc_inst|m0_1|u_logic|Ft83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ft83z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ft83z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ft83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ft83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wspvx4~combout  = ( \soc_inst|m0_1|u_logic|X4pvx4~combout  & ( \soc_inst|m0_1|u_logic|K0qvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ft83z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Vr33z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vr33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ft83z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wspvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wspvx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Wspvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .lut_mask = 64'h00000A0000000C00;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~0 (
+// Location: FF_X15_Y17_N1
+dffeas \soc_inst|m0_1|u_logic|Mi23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mi23z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mi23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y21_N56
+dffeas \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y20_N52
+dffeas \soc_inst|m0_1|u_logic|Wj73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wj73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wj73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zqpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Wj73z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q 
+//  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wj73z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wj73z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .lut_mask = 64'h00CC00CC08CC08CC;
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .lut_mask = 64'h0302000200000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~1 (
+// Location: LABCELL_X17_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zqpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xx2wx4~combout  & !\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Zqpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Mi23z4~q  & ( !\soc_inst|m0_1|u_logic|Z62wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Z62wx4~7_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Psh3z4~q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mi23z4~q  & ( !\soc_inst|m0_1|u_logic|Z62wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z62wx4~7_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Psh3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Psh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z62wx4~7_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mi23z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .lut_mask = 64'hC0F0C0F0C0C0C0C0;
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .lut_mask = 64'hC040F05000000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P37wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P37wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|X77wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q ))))) ) )
+// Location: FF_X19_Y19_N10
+dffeas \soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P37wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X18_Y17_N58
+dffeas \soc_inst|m0_1|u_logic|Fxv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fxv2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P37wx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|P37wx4~1 .lut_mask = 64'h000000F2002000F2;
-defparam \soc_inst|m0_1|u_logic|P37wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fxv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fxv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P37wx4~0 (
+// Location: LABCELL_X18_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P37wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|P37wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fxv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fxv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fxv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  $ (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P37wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fxv2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P37wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P37wx4~0 .lut_mask = 64'hFCA8FCA800000000;
-defparam \soc_inst|m0_1|u_logic|P37wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .lut_mask = 64'h0802000208000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fhc2z4~0 (
+// Location: FF_X17_Y16_N32
+dffeas \soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X16_Y18_N44
+dffeas \soc_inst|m0_1|u_logic|E153z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|E153z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E153z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E153z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fhc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|E153z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|E153z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .lut_mask = 64'h0404000050000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~2 (
+// Location: FF_X16_Y18_N59
+dffeas \soc_inst|m0_1|u_logic|Na63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Na63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Na63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y17_N17
+dffeas \soc_inst|m0_1|u_logic|E0d3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|E0d3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E0d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E0d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zqpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fhc2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Akewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fhc2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Akewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Na63z4~q  & ( \soc_inst|m0_1|u_logic|E0d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Na63z4~q  & ( !\soc_inst|m0_1|u_logic|E0d3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Na63z4~q  & ( !\soc_inst|m0_1|u_logic|E0d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Na63z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E0d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .lut_mask = 64'hF0F0F0F030303030;
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .lut_mask = 64'h0003000100020000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Zqpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|P37wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zqpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|P37wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zqpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ))) ) ) )
+// Location: FF_X19_Y15_N14
+dffeas \soc_inst|m0_1|u_logic|Ccq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ccq2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ccq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ccq2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zqpvx4~2_combout ),
+// Location: LABCELL_X19_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z62wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ccq2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Y8q2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ccq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .lut_mask = 64'h0000AA220000FF33;
-defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .lut_mask = 64'hA000000000C00000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lqpvx4~0 (
+// Location: FF_X19_Y15_N2
+dffeas \soc_inst|m0_1|u_logic|Euh3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Euh3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Euh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Euh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T04xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lqpvx4~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wspvx4~combout ) # (!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|T04xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Euh3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Euh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T04xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .lut_mask = 64'h00000000FFAAFFAA;
-defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T04xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T04xx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|T04xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y22_N13
-dffeas \soc_inst|m0_1|u_logic|Zei2z4 (
+// Location: FF_X18_Y13_N26
+dffeas \soc_inst|m0_1|u_logic|Wnu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zei2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wnu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zei2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zei2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wnu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ijcwx4~0 (
+// Location: FF_X19_Y21_N49
+dffeas \soc_inst|m0_1|u_logic|Rdq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rdq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rdq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ijcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Rdq2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wnu2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rdq2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wnu2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rdq2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wnu2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .lut_mask = 64'hF000F000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ijcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .lut_mask = 64'h3000000020002000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3awx4~0 (
+// Location: LABCELL_X17_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Wzawx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|T04xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Z62wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Z62wx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Z62wx4~1_combout  & !\soc_inst|m0_1|u_logic|Z62wx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z62wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z62wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z62wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|T04xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3awx4~0 .lut_mask = 64'h00FF00FFF000F000;
-defparam \soc_inst|m0_1|u_logic|O3awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kih2z4~0 (
+// Location: LABCELL_X17_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rtpvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Rtpvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Z62wx4~combout  = ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~8_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z62wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .lut_mask = 64'hFFCCFFCCF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z62wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Z62wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yhnvx4~0 (
+// Location: MLABCELL_X39_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~45 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yhnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cqo2z4~q  & ( \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Cqo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cqo2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Add2~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~50  ))
+// \soc_inst|m0_1|u_logic|Add2~46  = CARRY(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~50  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~50 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~45_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~46 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .lut_mask = 64'hF0F0F3F300003333;
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~45 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~45 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yhnvx4~1 (
+// Location: MLABCELL_X39_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~41 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yhnvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ufx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~46  ))
+// \soc_inst|m0_1|u_logic|Add2~42  = CARRY(( !\soc_inst|m0_1|u_logic|Ufx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~46  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~46 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~41_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~42 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .lut_mask = 64'hA2A20000F3F30000;
-defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~41 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N13
-dffeas \soc_inst|m0_1|u_logic|Cqo2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cqo2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cqo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cqo2z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X39_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~85 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~42  ))
+// \soc_inst|m0_1|u_logic|Add2~86  = CARRY(( !\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~42  ))
 
-// Location: FF_X30_Y20_N49
-dffeas \soc_inst|m0_1|u_logic|Jw83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jw83z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~42 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~85_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~86 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jw83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jw83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~85 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~85 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N58
-dffeas \soc_inst|m0_1|u_logic|Fio2z4 (
+// Location: FF_X29_Y16_N35
+dffeas \soc_inst|m0_1|u_logic|Gmd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fio2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gmd3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fio2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fio2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gmd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gmd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~1 (
+// Location: LABCELL_X16_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R99wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eruwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Jw83z4~q  & ( \soc_inst|m0_1|u_logic|Fio2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jw83z4~q  & ( !\soc_inst|m0_1|u_logic|Fio2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jw83z4~q  & ( !\soc_inst|m0_1|u_logic|Fio2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|R99wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Jw83z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fio2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eruwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R99wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .lut_mask = 64'h0011001000010000;
-defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R99wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R99wx4~0 .lut_mask = 64'hFFFF0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|R99wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y20_N58
-dffeas \soc_inst|m0_1|u_logic|Jlo2z4 (
+// Location: FF_X16_Y18_N29
+dffeas \soc_inst|m0_1|u_logic|B5e3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -20857,2491 +20521,1997 @@ dffeas \soc_inst|m0_1|u_logic|Jlo2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jlo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B5e3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jlo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jlo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B5e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B5e3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N26
-dffeas \soc_inst|m0_1|u_logic|Ll63z4 (
+// Location: FF_X15_Y18_N22
+dffeas \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ll63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ll63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~0 (
+// Location: LABCELL_X16_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eruwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ll63z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Jlo2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll63z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Jlo2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|B5e3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|B5e3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jlo2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ll63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B5e3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eruwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .lut_mask = 64'h0A02080000000000;
-defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .lut_mask = 64'h4000400044000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N56
-dffeas \soc_inst|m0_1|u_logic|Lpt2z4 (
+// Location: LABCELL_X12_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8e3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F8e3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|F8e3z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8e3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8e3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|F8e3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X12_Y20_N50
+dffeas \soc_inst|m0_1|u_logic|F8e3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|F8e3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lpt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F8e3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lpt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lpt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F8e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8e3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y22_N56
-dffeas \soc_inst|m0_1|u_logic|Uu73z4 (
+// Location: FF_X13_Y20_N56
+dffeas \soc_inst|m0_1|u_logic|Q6e3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uu73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Q6e3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uu73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uu73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q6e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6e3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~2 (
+// Location: LABCELL_X12_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eruwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Lpt2z4~q  & ( \soc_inst|m0_1|u_logic|Uu73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lpt2z4~q  & ( !\soc_inst|m0_1|u_logic|Uu73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lpt2z4~q  & ( !\soc_inst|m0_1|u_logic|Uu73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Q6e3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|F8e3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lpt2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uu73z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|F8e3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q6e3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eruwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .lut_mask = 64'h0500010004000000;
-defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y21_N2
-dffeas \soc_inst|m0_1|u_logic|Ujo2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ujo2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ujo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ujo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .lut_mask = 64'h00A000C000000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y21_N11
-dffeas \soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE (
+// Location: FF_X16_Y20_N26
+dffeas \soc_inst|m0_1|u_logic|Ibe3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ibe3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Eruwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ujo2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE_q ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ujo2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eruwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .lut_mask = 64'h00000000000088C0;
-defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ibe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ibe3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4 (
+// Location: LABCELL_X16_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uo5xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eruwx4~combout  = ( !\soc_inst|m0_1|u_logic|Eruwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Eruwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Eruwx4~0_combout  & !\soc_inst|m0_1|u_logic|Eruwx4~2_combout )) ) )
+// \soc_inst|m0_1|u_logic|Uo5xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Ibe3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eruwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Eruwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eruwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Eruwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ibe3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eruwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eruwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Eruwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y17_N13
-dffeas \soc_inst|m0_1|u_logic|Noo2z4 (
+// Location: FF_X15_Y19_N35
+dffeas \soc_inst|m0_1|u_logic|X1e3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Noo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X1e3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Noo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Noo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X1e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X1e3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y22_N41
-dffeas \soc_inst|m0_1|u_logic|Wzy2z4 (
+// Location: FF_X15_Y19_N17
+dffeas \soc_inst|m0_1|u_logic|I0e3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I0e3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wzy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I0e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I0e3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ue9wx4~0 (
+// Location: MLABCELL_X15_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|I0e3z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|X1e3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|X1e3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|I0e3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .lut_mask = 64'h4000400000000000;
-defparam \soc_inst|m0_1|u_logic|Ue9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .lut_mask = 64'h0202030000000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y20_N22
-dffeas \soc_inst|m0_1|u_logic|Bk13z4 (
+// Location: FF_X13_Y17_N29
+dffeas \soc_inst|m0_1|u_logic|Snd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bk13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bk13z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|N662z4~1_combout  = ( \soc_inst|m0_1|u_logic|Bk13z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kt23z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bk13z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kt23z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bk13z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) 
-// )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Kt23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bk13z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N662z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Snd3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N662z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N662z4~1 .lut_mask = 64'h3000000020002000;
-defparam \soc_inst|m0_1|u_logic|N662z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Snd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Snd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y22_N7
-dffeas \soc_inst|m0_1|u_logic|M1j2z4 (
+// Location: FF_X13_Y17_N35
+dffeas \soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M1j2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G02wx4~0 (
+// Location: LABCELL_X13_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G02wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Wu1wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Snd3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Wu1wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Snd3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G02wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G02wx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|G02wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .lut_mask = 64'h00000000000000E2;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pu1wx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pu1wx4~combout  = ( \soc_inst|m0_1|u_logic|G02wx4~0_combout  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X15_Y20_N5
+dffeas \soc_inst|m0_1|u_logic|Wqd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wqd3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pu1wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pu1wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Pu1wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wqd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wqd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N2
-dffeas \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE (
+// Location: FF_X15_Y18_N56
+dffeas \soc_inst|m0_1|u_logic|Exd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Exd3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Exd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Exd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K862z4~0 (
+// Location: MLABCELL_X15_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K862z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wqd3z4~q  & ( \soc_inst|m0_1|u_logic|Exd3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wqd3z4~q  & ( !\soc_inst|m0_1|u_logic|Exd3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wqd3z4~q  & ( !\soc_inst|m0_1|u_logic|Exd3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wqd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Exd3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K862z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K862z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K862z4~0 .lut_mask = 64'h0000400000000000;
-defparam \soc_inst|m0_1|u_logic|K862z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .lut_mask = 64'h0022002000020000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y17_N38
-dffeas \soc_inst|m0_1|u_logic|Cc53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cc53z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X16_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Gm1wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~4_combout  & (!\soc_inst|m0_1|u_logic|Gm1wx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Uo5xx4~0_combout  & !\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Gm1wx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gm1wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cc53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y27_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T243z4~feeder (
+// Location: LABCELL_X17_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T243z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fdzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Gm1wx4~combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~8_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T243z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T243z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T243z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|T243z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y27_N43
-dffeas \soc_inst|m0_1|u_logic|T243z4 (
+// Location: FF_X15_Y18_N23
+dffeas \soc_inst|m0_1|u_logic|M3e3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|T243z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T243z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M3e3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T243z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T243z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M3e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M3e3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~0 (
+// Location: MLABCELL_X15_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N662z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T243z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cc53z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ai9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wqd3z4~q  & ( \soc_inst|m0_1|u_logic|M3e3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wqd3z4~q  & ( !\soc_inst|m0_1|u_logic|M3e3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wqd3z4~q  & ( !\soc_inst|m0_1|u_logic|M3e3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cc53z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T243z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wqd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M3e3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N662z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N662z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N662z4~0 .lut_mask = 64'h0000000000E20000;
-defparam \soc_inst|m0_1|u_logic|N662z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y23_N23
-dffeas \soc_inst|m0_1|u_logic|Yoz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yoz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yoz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yoz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .lut_mask = 64'h1010100000100000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y23_N44
-dffeas \soc_inst|m0_1|u_logic|Sl03z4 (
+// Location: FF_X17_Y20_N13
+dffeas \soc_inst|m0_1|u_logic|Lsd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sl03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lsd3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sl03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sl03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lsd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lsd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~2 (
+// Location: LABCELL_X16_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N662z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Yoz2z4~q  & ( \soc_inst|m0_1|u_logic|Sl03z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yoz2z4~q  & ( !\soc_inst|m0_1|u_logic|Sl03z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yoz2z4~q  & ( !\soc_inst|m0_1|u_logic|Sl03z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ai9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Lsd3z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|B5e3z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B5e3z4~q ),
 	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yoz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sl03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lsd3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N662z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N662z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N662z4~2 .lut_mask = 64'h2200200002000000;
-defparam \soc_inst|m0_1|u_logic|N662z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .lut_mask = 64'h0088000000C00000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|N662z4~3_combout  = ( !\soc_inst|m0_1|u_logic|N662z4~0_combout  & ( !\soc_inst|m0_1|u_logic|N662z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|N662z4~1_combout  & (!\soc_inst|m0_1|u_logic|K862z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Noo2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Noo2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N662z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K862z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N662z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N662z4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N662z4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X13_Y17_N34
+dffeas \soc_inst|m0_1|u_logic|Hpd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hpd3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N662z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N662z4~3 .lut_mask = 64'hD000000000000000;
-defparam \soc_inst|m0_1|u_logic|N662z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hpd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hpd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrnvx4~0 (
+// Location: LABCELL_X13_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|N662z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|Cqo2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Eruwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|N662z4~3_combout  & ( \soc_inst|m0_1|u_logic|Ohh3z4~q  ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|N662z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & \soc_inst|m0_1|u_logic|Cqo2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|N662z4~3_combout  & ( \soc_inst|m0_1|u_logic|Ohh3z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Ai9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Hpd3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Snd3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N662z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Snd3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hpd3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .lut_mask = 64'h55550C0C55550C3F;
-defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .lut_mask = 64'h0000000000000C0A;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehcwx4~0 (
+// Location: MLABCELL_X15_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ehcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (\soc_inst|m0_1|u_logic|Kih2z4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Xrnvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (\soc_inst|m0_1|u_logic|Kih2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & \soc_inst|m0_1|u_logic|Kih2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ai9wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|X1e3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|I0e3z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X1e3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|I0e3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ehcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .lut_mask = 64'hF2FFD02200FF0022;
-defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .lut_mask = 64'h000000000000AC00;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmawx4~0 (
+// Location: LABCELL_X16_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cyq2z4~q  & \soc_inst|m0_1|u_logic|Zcn2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ai9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ai9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ai9wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Ai9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ai9wx4~1_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ai9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ai9wx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Ai9wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mdzvx4~0 (
+// Location: FF_X31_Y18_N44
+dffeas \soc_inst|m0_1|u_logic|Nbx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nbx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nbx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mdzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Add2~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q  ) + ( !\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|Add2~26  = CARRY(( !\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q  ) + ( !\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  ) + ( !VCC ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
+	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mdzvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~25_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .lut_mask = 64'hC080F0A0C080F0A0;
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~25 .lut_mask = 64'h000033330000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ducvx4 (
+// Location: MLABCELL_X39_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ducvx4~combout  = ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) # ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Add2~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~26  ))
+// \soc_inst|m0_1|u_logic|Add2~18  = CARRY(( !\soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~26  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ducvx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~17_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~18 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ducvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ducvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ducvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~17 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sscvx4 (
+// Location: LABCELL_X33_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bmhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sscvx4~combout  = ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Bmhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~17_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add2~17_sumout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~17_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sscvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bmhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sscvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sscvx4 .lut_mask = 64'h33333333FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Sscvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .lut_mask = 64'hC800C800FB00FB00;
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C8rwx4~0 (
+// Location: FF_X30_Y16_N5
+dffeas \soc_inst|m0_1|u_logic|Zoy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zoy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zoy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvxvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C8rwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & \soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Jvxvx4~combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jky2z4~q 
+// )) # (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jky2z4~q )))) # (\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jky2z4~q )) # (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Jky2z4~q ) # (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ))))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Jky2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jky2z4~q )))) # (\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jky2z4~q )) # (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jky2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .lut_mask = 64'h0030003000000000;
-defparam \soc_inst|m0_1|u_logic|C8rwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jvxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jvxvx4 .lut_mask = 64'hE881E88181178117;
+defparam \soc_inst|m0_1|u_logic|Jvxvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V9iwx4~0 (
+// Location: LABCELL_X35_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vnqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V9iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & \soc_inst|m0_1|u_logic|C8rwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|X77wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & \soc_inst|m0_1|u_logic|C8rwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Vnqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvxvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q  & ((\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ))) 
+// # (\soc_inst|m0_1|u_logic|Zoy2z4~q  & ((!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q  & ((!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ) 
+// # (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Zoy2z4~q  & (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q  & (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zoy2z4~q  & (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q  & (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zoy2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ))))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .lut_mask = 64'h00F000F0CCFCCCFC;
-defparam \soc_inst|m0_1|u_logic|V9iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .lut_mask = 64'h811781177EE87EE8;
+defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~1 (
+// Location: LABCELL_X35_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7xvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wfhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Y7xvx4~combout  = ( \soc_inst|m0_1|u_logic|Ljpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Vnqvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .lut_mask = 64'hFFFFCC00CC00CC00;
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y21_N52
-dffeas \soc_inst|m0_1|u_logic|K9z2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K9z2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K9z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K9z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y7xvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7xvx4 .lut_mask = 64'h0000000022002200;
+defparam \soc_inst|m0_1|u_logic|Y7xvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~0 (
+// Location: LABCELL_X35_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xipvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wfhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6z2z4~q  & ( (\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & \soc_inst|m0_1|u_logic|W7z2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Xipvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Ukpvx4~combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vnxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Ukpvx4~combout 
+//  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .lut_mask = 64'h0000FF002020FF20;
+defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~2 (
+// Location: LABCELL_X35_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gqxvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wfhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wfhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ((\soc_inst|m0_1|u_logic|K9z2z4~q ))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & (((\soc_inst|m0_1|u_logic|K9z2z4~q )))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout  & ((\soc_inst|m0_1|u_logic|K9z2z4~q ) # (\soc_inst|m0_1|u_logic|Cllwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Gqxvx4~combout  = ( \soc_inst|m0_1|u_logic|Jvxvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nqy2z4~q ))) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Gxxvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~q  $ (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfhvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .lut_mask = 64'h10FC10FC30FC30FC;
-defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y21_N53
-dffeas \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gqxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gqxvx4 .lut_mask = 64'h1600160080008000;
+defparam \soc_inst|m0_1|u_logic|Gqxvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuawx4~0 (
+// Location: LABCELL_X35_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tuawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & !\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( 
-// ((\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & !\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Irxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Jky2z4~q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q 
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jky2z4~q  & ((!\soc_inst|m0_1|u_logic|Viy2z4~q ) # (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Jky2z4~q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Jky2z4~q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tuawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Irxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .lut_mask = 64'h3F0F3F0F33003300;
-defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .lut_mask = 64'hE880E88080008000;
+defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C51xx4~0 (
+// Location: LABCELL_X35_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C51xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zpxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvxvx4~combout  & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  & ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout  $ 
+// (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Irxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C51xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C51xx4~0 .lut_mask = 64'h000000C000000000;
-defparam \soc_inst|m0_1|u_logic|C51xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .lut_mask = 64'h1E781E78F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X553z4~feeder (
+// Location: LABCELL_X35_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X553z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Z4qvx4~combout  )
+// \soc_inst|m0_1|u_logic|Hnxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zpxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y7xvx4~combout  & (\soc_inst|m0_1|u_logic|Xipvx4~0_combout  & \soc_inst|m0_1|u_logic|Gqxvx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zpxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gqxvx4~combout ) # (\soc_inst|m0_1|u_logic|Y7xvx4~combout ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X553z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hnxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X553z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X553z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|X553z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y21_N14
-dffeas \soc_inst|m0_1|u_logic|X553z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|X553z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X553z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X553z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X553z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X28_Y21_N19
-dffeas \soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .lut_mask = 64'h050F050F00050005;
+defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sd1xx4~0 (
+// Location: MLABCELL_X34_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dsqvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Dsqvx4~combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & \soc_inst|m0_1|u_logic|C2yvx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .lut_mask = 64'h0000000003000300;
-defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y21_N31
-dffeas \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dsqvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dsqvx4 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Dsqvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ch03z4~feeder (
+// Location: LABCELL_X29_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ch03z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Z4qvx4~combout  )
+// \soc_inst|m0_1|u_logic|Rfpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ch03z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ch03z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ch03z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ch03z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y16_N14
-dffeas \soc_inst|m0_1|u_logic|Ch03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ch03z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ch03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ch03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ch03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .lut_mask = 64'hBA00BA0010001000;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wd13z4~feeder (
+// Location: LABCELL_X27_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ffxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wd13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Z4qvx4~combout  )
+// \soc_inst|m0_1|u_logic|Ffxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|C9yvx4~combout  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wd13z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wd13z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wd13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Wd13z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y19_N25
-dffeas \soc_inst|m0_1|u_logic|Wd13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wd13z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wd13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wd13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wd13z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X25_Y21_N55
-dffeas \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Ffxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~2 (
+// Location: LABCELL_X29_Y10_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ht5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ch03z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ch03z4~q ) # (\soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Wd13z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Wd13z4~q 
-// ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rfpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Y6t2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ch03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wd13z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .lut_mask = 64'hAFA0AFA0CFCFC0C0;
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y21_N25
-dffeas \soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .lut_mask = 64'h0407040700000000;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ow33z4~feeder (
+// Location: LABCELL_X30_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ow33z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Z4qvx4~combout  )
+// \soc_inst|m0_1|u_logic|Rfpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ow33z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow33z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ow33z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ow33z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y21_N19
-dffeas \soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ow33z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .lut_mask = 64'hA2A2A2A2A200A200;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~1 (
+// Location: LABCELL_X30_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ht5wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  ) ) # ( \soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Rfpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Rfpvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (\soc_inst|m0_1|u_logic|Rfpvx4~3_combout  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) # 
+// ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Xhxvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rfpvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .lut_mask = 64'hAA00AA00FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .lut_mask = 64'h0F0E0F0E0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~3 (
+// Location: LABCELL_X29_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ht5wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (((\soc_inst|m0_1|u_logic|Ht5wx4~2_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))))) ) )
+// \soc_inst|m0_1|u_logic|Rfpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .lut_mask = 64'h03002000CF00EC00;
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X23_Y23_N31
-dffeas \soc_inst|m0_1|u_logic|Po73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po73z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X24_Y23_N44
-dffeas \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X25_Y21_N49
-dffeas \soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .lut_mask = 64'h0A0F0A0F000F000F;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4~1 (
+// Location: LABCELL_X27_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xowwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Po73z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// ( !\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Eol2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Bkxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1xvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Po73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eol2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xowwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .lut_mask = 64'hFF00F0F0CCCCAAAA;
-defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y23_N31
-dffeas \soc_inst|m0_1|u_logic|Qml2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qml2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qml2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qml2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .lut_mask = 64'hC400C400F500F500;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y24_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Psu2z4~feeder (
+// Location: LABCELL_X24_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ae6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Psu2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Z4qvx4~combout  )
+// \soc_inst|m0_1|u_logic|Ae6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Psu2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psu2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Psu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Psu2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y24_N40
-dffeas \soc_inst|m0_1|u_logic|Psu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Psu2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psu2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psu2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X23_Y23_N4
-dffeas \soc_inst|m0_1|u_logic|Spl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Spl2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Spl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Spl2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X24_Y23_N20
-dffeas \soc_inst|m0_1|u_logic|Grl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Grl2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Grl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Grl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Ae6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4~0 (
+// Location: LABCELL_X31_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xowwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Grl2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// ( !\soc_inst|m0_1|u_logic|Spl2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Psu2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-//  & ( !\soc_inst|m0_1|u_logic|Qml2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Bkxvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H9i2z4~q  
+// & ((!\soc_inst|m0_1|u_logic|G27wx4~1_combout ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qml2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Psu2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Spl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Grl2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xowwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .lut_mask = 64'hAAAACCCCF0F0FF00;
-defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .lut_mask = 64'hF0F0F0F0B080B080;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4 (
+// Location: LABCELL_X30_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xowwx4~combout  = ( \soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xowwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Xowwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Xowwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Bkxvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|J7swx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Jky2z4~q  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|J7swx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xowwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xowwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bkxvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xowwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xowwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xowwx4 .lut_mask = 64'h000000CC003300FF;
-defparam \soc_inst|m0_1|u_logic|Xowwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .lut_mask = 64'h00FA00FA00C800C8;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~0 (
+// Location: LABCELL_X36_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9swx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ht5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ht5wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Xowwx4~combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|X553z4~q ))) # (\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (\soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X553z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|U9swx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (((!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( ((\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|Pty2z4~q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X553z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ht5wx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xowwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9swx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .lut_mask = 64'hAF23000000000000;
-defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9swx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9swx4~0 .lut_mask = 64'h7F7F7F7FF7FFF7FF;
+defparam \soc_inst|m0_1|u_logic|U9swx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuawx4~1 (
+// Location: LABCELL_X36_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S8swx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tuawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|S8swx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|U9swx4~0_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q )) # (\soc_inst|m0_1|u_logic|Swy2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|H9i2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # (\soc_inst|m0_1|u_logic|U9swx4~0_combout ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tuawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U9swx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S8swx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .lut_mask = 64'h80C080C0A0F0A0F0;
-defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y21_N20
-dffeas \soc_inst|m0_1|u_logic|Cll2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cll2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cll2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cll2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S8swx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|S8swx4~0 .lut_mask = 64'hFAFAEEEEEAFAEAFA;
+defparam \soc_inst|m0_1|u_logic|S8swx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pl62z4~0 (
+// Location: LABCELL_X30_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pl62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cll2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bkxvx4~combout  = ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Bkxvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|S8swx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cll2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bkxvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S8swx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pl62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y21_N56
-dffeas \soc_inst|m0_1|u_logic|Fn23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fn23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fn23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fn23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bkxvx4 .lut_mask = 64'h0000000004050405;
+defparam \soc_inst|m0_1|u_logic|Bkxvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~1 (
+// Location: LABCELL_X29_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sj62z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fn23z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wd13z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Rfpvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Bkxvx4~combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ) # (\soc_inst|m0_1|u_logic|Rfpvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bkxvx4~combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fn23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wd13z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sj62z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .lut_mask = 64'h00000000C0008080;
-defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .lut_mask = 64'h00000000FFFFDFDF;
+defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y21_N20
-dffeas \soc_inst|m0_1|u_logic|Ow33z4 (
+// Location: FF_X29_Y14_N10
+dffeas \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ow33z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~0 (
+// Location: LABCELL_X30_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yplwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sj62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|X553z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Ow33z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Yplwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|X553z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ow33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sj62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .lut_mask = 64'h0000000050004040;
-defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .lut_mask = 64'h3000300000000000;
+defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y21_N26
-dffeas \soc_inst|m0_1|u_logic|Mcz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mcz2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vopvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vopvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Dplwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Dplwx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Dplwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dplwx4~0_combout  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mcz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mcz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .lut_mask = 64'hF0F0C0C0A0A08080;
+defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y21_N32
-dffeas \soc_inst|m0_1|u_logic|Ikz2z4 (
+// Location: FF_X27_Y15_N25
+dffeas \soc_inst|m0_1|u_logic|Zcn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ikz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ikz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ikz2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X28_Y16_N13
-dffeas \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ch03z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Zcn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zcn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zcn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~2 (
+// Location: LABCELL_X27_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mmxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sj62z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ikz2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Ikz2z4~q ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mmxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qzq2z4~q  & ( \soc_inst|m0_1|u_logic|Zcn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzq2z4~q  & 
+// ( \soc_inst|m0_1|u_logic|Zcn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qzq2z4~q  & ( !\soc_inst|m0_1|u_logic|Zcn2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzq2z4~q  & ( !\soc_inst|m0_1|u_logic|Zcn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fzl2z4~q  
+// $ (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ikz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sj62z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mmxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .lut_mask = 64'h5400000004000000;
-defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .lut_mask = 64'h6600CC00CC00CC00;
+defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~3 (
+// Location: LABCELL_X27_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sj62z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sj62z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pl62z4~0_combout  & (!\soc_inst|m0_1|u_logic|Sj62z4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Sj62z4~0_combout  & \soc_inst|m0_1|u_logic|Mcz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sj62z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pl62z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Sj62z4~1_combout  & !\soc_inst|m0_1|u_logic|Sj62z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Sbxvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mmxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pl62z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sj62z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sj62z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mcz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sj62z4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mmxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sj62z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .lut_mask = 64'h8080008000000000;
-defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .lut_mask = 64'hFC74FC7400000000;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yonvx4~0 (
+// Location: LABCELL_X30_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yonvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Bywwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|U593z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sj62z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Bywwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|U593z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|I793z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bywwx4~combout  & ( (!\soc_inst|m0_1|u_logic|U593z4~q 
-// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bywwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|U593z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|I793z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zpqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ukpvx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U593z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|I793z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sj62z4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .lut_mask = 64'hAACCAAFFAACCAAF0;
-defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .lut_mask = 64'h000F000F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Zpqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wsawx4~0 (
+// Location: LABCELL_X27_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wsawx4~0_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yonvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ ((\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Sbxvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( \soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sbxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Dsqvx4~combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ))) ) 
+// ) ) # ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( !\soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sbxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Dsqvx4~combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( !\soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sbxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Dsqvx4~combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sbxvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .lut_mask = 64'hFFF99960FF009900;
-defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~93 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~30  ))
-// \soc_inst|m0_1|u_logic|Add5~94  = CARRY(( !\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~30  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~30 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~93_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~94 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~93 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~93 .lut_mask = 64'h0000FF0F00008877;
-defparam \soc_inst|m0_1|u_logic|Add5~93 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .lut_mask = 64'h0A0F0A0F00000A0F;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~101 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Asbvx4~combout  ) + ( 
-// \soc_inst|m0_1|u_logic|Add5~94  ))
-// \soc_inst|m0_1|u_logic|Add5~102  = CARRY(( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Asbvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~94  
-// ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Asbvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~94 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~101_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~102 ),
-	.shareout());
+// Location: FF_X31_Y21_N2
+dffeas \soc_inst|switches_1|switch_store[0][3] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[3]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][3]~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~101 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~101 .lut_mask = 64'h00000F0F00008877;
-defparam \soc_inst|m0_1|u_logic|Add5~101 .shared_arith = "off";
+defparam \soc_inst|switches_1|switch_store[0][3] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][3] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~33 (
+// Location: LABCELL_X31_Y21_N18
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[3]~26 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~102  ))
-// \soc_inst|m0_1|u_logic|Add5~34  = CARRY(( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~102  ))
+// \soc_inst|interconnect_1|HRDATA[3]~26_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
+// ((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[0][3]~q ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( 
+// ((!\soc_inst|interconnect_1|HRDATA[6]~10_combout ) # (!\soc_inst|interconnect_1|Equal1~0_combout )) # (\soc_inst|switches_1|switch_store[0][3]~q ) ) ) ) # ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( (\soc_inst|switches_1|switch_store[0][3]~q  & (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & \soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout ) # ((\soc_inst|switches_1|switch_store[0][3]~q  & 
+// \soc_inst|interconnect_1|Equal1~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+	.dataa(!\soc_inst|switches_1|switch_store[0][3]~q ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
+	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~102 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~33_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~34 ),
+	.combout(\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~33 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~33 .lut_mask = 64'h0000FF5500003FC0;
-defparam \soc_inst|m0_1|u_logic|Add5~33 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[3]~26 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[3]~26 .lut_mask = 64'hCDCD0101FDFD3131;
+defparam \soc_inst|interconnect_1|HRDATA[3]~26 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~97 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~97_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~34  ))
-// \soc_inst|m0_1|u_logic|Add5~98  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~34  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~34 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~97_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~98 ),
-	.shareout());
+// Location: FF_X35_Y16_N32
+dffeas \soc_inst|m0_1|u_logic|U7w2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U7w2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~97 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~97 .lut_mask = 64'h0000C03F000000AA;
-defparam \soc_inst|m0_1|u_logic|Add5~97 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U7w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U7w2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~109 (
+// Location: MLABCELL_X25_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5vvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~109_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~98  ))
-// \soc_inst|m0_1|u_logic|Add5~110  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~98  ))
+// \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~98 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~109_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~110 ),
+	.combout(\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~109 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~109 .lut_mask = 64'h0000C03F000000AA;
-defparam \soc_inst|m0_1|u_logic|Add5~109 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~37 (
+// Location: LABCELL_X24_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~110  ))
-// \soc_inst|m0_1|u_logic|Add5~38  = CARRY(( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~110  ))
+// \soc_inst|m0_1|u_logic|F5mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~q  & ( !\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~110 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~37_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~38 ),
+	.combout(\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~37 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~37 .lut_mask = 64'h0000FF5500003FC0;
-defparam \soc_inst|m0_1|u_logic|Add5~37 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .lut_mask = 64'h0000AAAA00000000;
+defparam \soc_inst|m0_1|u_logic|F5mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~81 (
+// Location: MLABCELL_X25_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr0xx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~38  ))
-// \soc_inst|m0_1|u_logic|Add5~82  = CARRY(( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~38  ))
+// \soc_inst|m0_1|u_logic|Cr0xx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~38 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~81_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~82 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~81 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~81 .lut_mask = 64'h0000FF0F00007788;
-defparam \soc_inst|m0_1|u_logic|Add5~81 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X24_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4qvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z4qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .lut_mask = 64'hD0D0D0D00000D0D0;
-defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D31wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|D31wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & \soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) )
+// Location: FF_X30_Y16_N56
+dffeas \soc_inst|m0_1|u_logic|Lny2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lny2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lny2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lny2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y16_N41
+dffeas \soc_inst|m0_1|u_logic|Xly2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D31wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D31wx4~0 .lut_mask = 64'h0A0A00000F0C0000;
-defparam \soc_inst|m0_1|u_logic|D31wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xly2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xly2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs7wx4~0 (
+// Location: LABCELL_X30_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W7hwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qs7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|W7hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xly2z4~q  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & \soc_inst|m0_1|u_logic|Lny2z4~q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .lut_mask = 64'hF000F00000000000;
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .lut_mask = 64'h0050005050505050;
+defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs7wx4~1 (
+// Location: MLABCELL_X21_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Poa2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Poa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Qs7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phlwx4~0 (
+// Location: MLABCELL_X21_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ik4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Phlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X77wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Poa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Poa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Poa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Poa2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ik4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Phlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .lut_mask = 64'hAAAAAAAAAAA2AAAA;
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jp3wx4 (
+// Location: LABCELL_X27_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bk4wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jp3wx4~combout  = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Bk4wx4~combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Socwx4~0_combout  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Rngwx4~combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jp3wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jp3wx4 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Jp3wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bk4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bk4wx4 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|Bk4wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjlwx4~0 (
+// Location: MLABCELL_X21_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ik4wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fjlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jp3wx4~combout  & 
-// !\soc_inst|m0_1|u_logic|C8rwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ik4wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~q  & (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bk4wx4~combout  ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ik4wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .lut_mask = 64'hF000F000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Fjlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .lut_mask = 64'h0000FFFF0000F484;
+defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djywx4~0 (
+// Location: LABCELL_X22_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kofwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Fuhwx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Kofwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djywx4~0 .lut_mask = 64'h003000300A3A0A3A;
-defparam \soc_inst|m0_1|u_logic|Djywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .lut_mask = 64'h000000000000A0A0;
+defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lstwx4~0 (
+// Location: MLABCELL_X25_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Si4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lstwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Djywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Djywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Si4wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Djywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Si4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .lut_mask = 64'hAA80AA80AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Lstwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: IOIBUF_X4_Y0_N1
-cyclonev_io_ibuf \SW[7]~input (
-	.i(SW[7]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[7]~input_o ));
-// synopsys translate_off
-defparam \SW[7]~input .bus_hold = "false";
-defparam \SW[7]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .lut_mask = 64'h0000000005050000;
+defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y15_N11
-dffeas \soc_inst|switches_1|switch_store[0][7] (
+// Location: FF_X25_Y12_N56
+dffeas \soc_inst|m0_1|u_logic|Y9t2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[7]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][7]~q ),
+	.q(\soc_inst|m0_1|u_logic|Y9t2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][7] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][7] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y9t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y9t2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[7] (
+// Location: MLABCELL_X25_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o [7] = ( !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Pd4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|A4t2z4~q  & ( (\soc_inst|m0_1|u_logic|Si4wx4~0_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|A4t2z4~q  & ( ((\soc_inst|m0_1|u_logic|Si4wx4~0_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Y9t2z4~q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|A4t2z4~q  & ( (\soc_inst|m0_1|u_logic|Si4wx4~0_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|A4t2z4~q  & ( (\soc_inst|m0_1|u_logic|Si4wx4~0_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Si4wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .lut_mask = 64'h3333333300000000;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .lut_mask = 64'h003300330F3F0033;
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y13_N33
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[7]~4 (
+// Location: MLABCELL_X25_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[7]~4_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Pd4wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pd4wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) # (!\soc_inst|m0_1|u_logic|Bk4wx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X77wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pd4wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [0]),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pd4wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[7]~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[7]~4 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[7]~4 .lut_mask = 64'h000005050A0A0F0F;
-defparam \soc_inst|ram_1|data_to_memory[7]~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y17_N4
-dffeas \soc_inst|m0_1|u_logic|To33z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|To33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|To33z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .lut_mask = 64'hCCCCCCCCCCC0CCC0;
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L763z4~feeder (
+// Location: LABCELL_X24_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sa13z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L763z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Sa13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J3qvx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L763z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sa13z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L763z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L763z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|L763z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sa13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sa13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Sa13z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y18_N16
-dffeas \soc_inst|m0_1|u_logic|L763z4~DUPLICATE (
+// Location: FF_X24_Y21_N50
+dffeas \soc_inst|m0_1|u_logic|Sa13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|L763z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Sa13z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L763z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Sa13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L763z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L763z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sa13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sa13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~3 (
+// Location: MLABCELL_X25_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jc1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|L763z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|L763z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|L763z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L763z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .lut_mask = 64'h0022000200200000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .lut_mask = 64'h00000000A000A000;
+defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y21_N40
-dffeas \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE (
+// Location: FF_X18_Y19_N37
+dffeas \soc_inst|m0_1|u_logic|Isi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -23349,151 +22519,200 @@ dffeas \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Isi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Isi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Isi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y23_N58
-dffeas \soc_inst|m0_1|u_logic|Kf23z4 (
+// Location: LABCELL_X24_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Isi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sa13z4~q  & \soc_inst|m0_1|u_logic|Y91xx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Isi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sa13z4~q  & \soc_inst|m0_1|u_logic|Y91xx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Isi2z4~q  ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Isi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sa13z4~q  & \soc_inst|m0_1|u_logic|Y91xx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sa13z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Isi2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .lut_mask = 64'h0A0AFFFF0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y19_N53
+dffeas \soc_inst|m0_1|u_logic|T253z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kf23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|T253z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kf23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kf23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T253z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T253z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~0 (
+// Location: LABCELL_X23_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ld1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kf23z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kf23z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kf23z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kf23z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .lut_mask = 64'h2080200000800000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N53
-dffeas \soc_inst|m0_1|u_logic|Hue3z4 (
+// Location: FF_X25_Y14_N31
+dffeas \soc_inst|m0_1|u_logic|Bk23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hue3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bk23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hue3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hue3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bk23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N17
-dffeas \soc_inst|m0_1|u_logic|Rpe3z4 (
+// Location: LABCELL_X24_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nd3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bk23z4~q  & ( (!\soc_inst|m0_1|u_logic|T253z4~q  & \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bk23z4~q  & ( (!\soc_inst|m0_1|u_logic|T253z4~q  & \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bk23z4~q  ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bk23z4~q  & ( (!\soc_inst|m0_1|u_logic|T253z4~q  & \soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|T253z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bk23z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .lut_mask = 64'h0C0CFFFF0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y19_N26
+dffeas \soc_inst|m0_1|u_logic|Pfz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rpe3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pfz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rpe3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rpe3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pfz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pfz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y21xx4~0 (
+// Location: LABCELL_X24_Y21_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehz2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y21xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ehz2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J3qvx4~0_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ehz2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .lut_mask = 64'h00000000C0000000;
-defparam \soc_inst|m0_1|u_logic|Y21xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ehz2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ehz2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ehz2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N56
-dffeas \soc_inst|m0_1|u_logic|Fre3z4 (
+// Location: FF_X24_Y21_N11
+dffeas \soc_inst|m0_1|u_logic|Ehz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ehz2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fre3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ehz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fre3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fre3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ehz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ehz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N24
+// Location: LABCELL_X23_Y19_N33
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N71xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N71xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|N71xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -23503,42 +22722,61 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N71xx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|N71xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N71xx4~0 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|m0_1|u_logic|N71xx4~0 .lut_mask = 64'h0300030000000000;
 defparam \soc_inst|m0_1|u_logic|N71xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~4 (
+// Location: FF_X24_Y22_N44
+dffeas \soc_inst|m0_1|u_logic|Yd03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yd03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yd03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yd03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~4_combout  = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rpe3z4~q  & (\soc_inst|m0_1|u_logic|Fre3z4~q  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Hue3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fre3z4~q  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hue3z4~q 
-// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rpe3z4~q  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hue3z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hue3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pfz2z4~q  & (\soc_inst|m0_1|u_logic|Yd03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ehz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pfz2z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ehz2z4~q 
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yd03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ehz2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ehz2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hue3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rpe3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fre3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pfz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yd03z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .lut_mask = 64'hF5F5313100F50031;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .lut_mask = 64'hF3F300F351510051;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N25
-dffeas \soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE (
+// Location: FF_X17_Y21_N29
+dffeas \soc_inst|m0_1|u_logic|Glj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -23546,1852 +22784,1811 @@ dffeas \soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Glj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Glj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Glj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~1 (
+// Location: LABCELL_X31_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0qvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|G1s2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G1s2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G1s2z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|K0qvx4~combout  = ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  ) ) # ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K0qvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .lut_mask = 64'h8080000008000800;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K0qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K0qvx4 .lut_mask = 64'hFFFFFFFFFFFFAAAA;
+defparam \soc_inst|m0_1|u_logic|K0qvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cy43z4~feeder (
+// Location: MLABCELL_X25_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cy43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Rmawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~q  & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ez8wx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cy43z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cy43z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cy43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Cy43z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y25_N7
-dffeas \soc_inst|m0_1|u_logic|Cy43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cy43z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cy43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cy43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cy43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Rmawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U2s2z4~feeder (
+// Location: MLABCELL_X21_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U2s2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Y5zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Rmawx4~0_combout  & !\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( (\soc_inst|m0_1|u_logic|Rmawx4~0_combout  & !\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U2s2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U2s2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U2s2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|U2s2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y22_N31
-dffeas \soc_inst|m0_1|u_logic|U2s2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|U2s2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U2s2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U2s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U2s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .lut_mask = 64'h5050505050FF50FF;
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y25_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~2 (
+// Location: LABCELL_X23_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|U2s2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cy43z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|U2s2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|U2s2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cy43z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|O3awx4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cy43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U2s2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .lut_mask = 64'h0040005000400000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y18_N50
-dffeas \soc_inst|m0_1|u_logic|Tse3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tse3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tse3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tse3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X33_Y18_N32
-dffeas \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O3awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3awx4~0 .lut_mask = 64'h0FF00FF00F000F00;
+defparam \soc_inst|m0_1|u_logic|O3awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y25_N52
-dffeas \soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X23_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phh2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Phh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
 
-// Location: FF_X30_Y25_N11
-dffeas \soc_inst|m0_1|u_logic|Ug73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ug73z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ug73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ug73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .lut_mask = 64'hFF55FF55FAFAFAFA;
+defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~5 (
+// Location: MLABCELL_X25_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phh2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~5_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ug73z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Phh2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Phh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ug73z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .lut_mask = 64'h000000C00000000A;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y21_N29
-dffeas \soc_inst|m0_1|u_logic|Duv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Duv2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y5zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Phh2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|A67wx4~0_combout  & !\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Phh2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|A67wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout  & !\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|A67wx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Duv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .lut_mask = 64'hC8404040C4C44444;
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y21_N8
-dffeas \soc_inst|m0_1|u_logic|Uku2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uku2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zwcvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zwcvx4~combout  = ( !\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uku2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uku2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zwcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zwcvx4 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Zwcvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~6 (
+// Location: MLABCELL_X21_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ovcvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Duv2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Uku2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ovcvx4~combout  = ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uku2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ovcvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .lut_mask = 64'h00000C0000000808;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ovcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ovcvx4 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ovcvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~7 (
+// Location: MLABCELL_X25_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V41xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Vf5wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Tse3z4~q  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Tse3z4~q  & (((!\soc_inst|m0_1|u_logic|S61xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|V41xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tse3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vf5wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .lut_mask = 64'hF351000000000000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V41xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V41xx4~0 .lut_mask = 64'h00000000000F0000;
+defparam \soc_inst|m0_1|u_logic|V41xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~8 (
+// Location: LABCELL_X29_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R7iwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Vf5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Vf5wx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Vf5wx4~4_combout  & !\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|R7iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vf5wx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~7_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .lut_mask = 64'hCC00CC00C000C000;
+defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ox1wx4~1 (
+// Location: LABCELL_X37_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Akewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ox1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Akewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .lut_mask = 64'hA0A0A0A0AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Akewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Akewx4~0 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Akewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzbwx4~0 (
+// Location: LABCELL_X29_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fhc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pm9wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pm9wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Fhc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .lut_mask = 64'h0FCF0FCF00CC00CC;
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .lut_mask = 64'h3333333300000000;
+defparam \soc_inst|m0_1|u_logic|Fhc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzbwx4~1 (
+// Location: LABCELL_X29_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kzbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Kzbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|K9z2z4~q  & \soc_inst|m0_1|u_logic|D1awx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Kzbwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Kzbwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( ((!\soc_inst|m0_1|u_logic|K9z2z4~q  & \soc_inst|m0_1|u_logic|D1awx4~0_combout )) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Zqpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fhc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Akewx4~0_combout  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fhc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Akewx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .lut_mask = 64'h0FAFFFFF00AAFFFF;
-defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .lut_mask = 64'hF0F0F0F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~41 (
+// Location: LABCELL_X29_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~82  ))
-// \soc_inst|m0_1|u_logic|Add5~42  = CARRY(( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Evcwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~82  ))
+// \soc_inst|m0_1|u_logic|Zqpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~82 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~41_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~42 ),
+	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~41 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~41 .lut_mask = 64'h0000FF0F00007788;
-defparam \soc_inst|m0_1|u_logic|Add5~41 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .lut_mask = 64'h02000200FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~113 (
+// Location: LABCELL_X29_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Konvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~42  ))
-// \soc_inst|m0_1|u_logic|Add5~114  = CARRY(( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Konvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~42  ))
+// \soc_inst|m0_1|u_logic|Zqpvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Zqpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & \soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zqpvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~42 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~113_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~114 ),
+	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~113 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~113 .lut_mask = 64'h0000FF330000A05F;
-defparam \soc_inst|m0_1|u_logic|Add5~113 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .lut_mask = 64'hF2F2F2F200000000;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ox1wx4~0 (
+// Location: LABCELL_X29_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P37wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ox1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|P37wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q 
+//  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|X77wx4~combout ) # ((\soc_inst|m0_1|u_logic|Aok2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Nsk2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datag(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P37wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P37wx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|P37wx4~1 .lut_mask = 64'h0000515010005150;
+defparam \soc_inst|m0_1|u_logic|P37wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P37wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P37wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P37wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P37wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
 	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P37wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P37wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P37wx4~0 .lut_mask = 64'hFAFAC8C800000000;
+defparam \soc_inst|m0_1|u_logic|P37wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zqpvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zqpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Zqpvx4~2_combout  & (\soc_inst|m0_1|u_logic|P37wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Zqpvx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|P37wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Zqpvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zqpvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .lut_mask = 64'h00000000AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .lut_mask = 64'h00CF00CF00450045;
+defparam \soc_inst|m0_1|u_logic|Zqpvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ksbwx4~0 (
+// Location: LABCELL_X23_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wspvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ksbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Konvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Wspvx4~combout  = ( \soc_inst|m0_1|u_logic|K0qvx4~combout  & ( \soc_inst|m0_1|u_logic|X4pvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wspvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .lut_mask = 64'hBBEEE2B8BBEE0000;
-defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wspvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wspvx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Wspvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iu1wx4~0 (
+// Location: LABCELL_X23_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lqpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ox1wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout  & \soc_inst|m0_1|u_logic|Ksbwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Lqpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wspvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & \soc_inst|interconnect_1|HREADY~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wspvx4~combout  & ( 
+// \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .lut_mask = 64'h0000000000300030;
-defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .lut_mask = 64'h00FF00FF00F000F0;
+defparam \soc_inst|m0_1|u_logic|Lqpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y21_N41
-dffeas \soc_inst|m0_1|u_logic|W5s2z4 (
+// Location: FF_X23_Y13_N26
+dffeas \soc_inst|m0_1|u_logic|Zei2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W5s2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zei2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W5s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W5s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zei2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zei2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N10
-dffeas \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X15_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mj7wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mj7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & !\soc_inst|m0_1|u_logic|Svxwx4~0_combout ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .lut_mask = 64'h0000C0C000000000;
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~0 (
+// Location: LABCELL_X27_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mj7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pybwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|W5s2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|W5s2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Mj7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mj7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ok7wx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|W5s2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pybwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .lut_mask = 64'h4000500040000000;
-defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y18_N31
-dffeas \soc_inst|m0_1|u_logic|Dq83z4 (
+// Location: FF_X22_Y13_N47
+dffeas \soc_inst|m0_1|u_logic|Nf03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dq83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nf03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dq83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dq83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nf03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nf03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pybwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dq83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Uku2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dq83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dq83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Uku2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uku2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dq83z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pybwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y19_N34
+dffeas \soc_inst|m0_1|u_logic|Tiz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tiz2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .lut_mask = 64'h0008000A00080000;
-defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tiz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tiz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y25_N53
-dffeas \soc_inst|m0_1|u_logic|Cxc3z4 (
+// Location: FF_X29_Y17_N8
+dffeas \soc_inst|m0_1|u_logic|Aez2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cxc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Aez2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cxc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cxc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aez2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aez2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y25_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~1 (
+// Location: LABCELL_X22_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pybwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cxc3z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|U2s2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Aez2z4~q  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nf03z4~q  & (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Tiz2z4~q )))) # (\soc_inst|m0_1|u_logic|Nf03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Tiz2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aez2z4~q  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Nf03z4~q  & (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tiz2z4~q )))) # (\soc_inst|m0_1|u_logic|Nf03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Tiz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aez2z4~q  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nf03z4~q  & (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tiz2z4~q )))) # (\soc_inst|m0_1|u_logic|Nf03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Tiz2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cxc3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|U2s2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nf03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tiz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aez2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pybwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .lut_mask = 64'h0000003000000022;
-defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .lut_mask = 64'hC4F5C4F50000C4F5;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N26
-dffeas \soc_inst|m0_1|u_logic|I4s2z4 (
+// Location: FF_X25_Y19_N43
+dffeas \soc_inst|m0_1|u_logic|I453z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I4s2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I453z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I4s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I4s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I453z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I453z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y21_N28
-dffeas \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE (
+// Location: FF_X27_Y17_N53
+dffeas \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y25_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pybwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|I4s2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|I4s2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pybwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .lut_mask = 64'h000000000000A0C0;
-defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4 (
+// Location: LABCELL_X22_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pybwx4~combout  = ( !\soc_inst|m0_1|u_logic|Pybwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pybwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Pybwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pybwx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I453z4~q ) # (!\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I453z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q  ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pybwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pybwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pybwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pybwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I453z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pybwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pybwx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|Pybwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .lut_mask = 64'h0000FF00F0F0FFF0;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y17_N5
-dffeas \soc_inst|m0_1|u_logic|To33z4 (
+// Location: FF_X25_Y19_N14
+dffeas \soc_inst|m0_1|u_logic|Zu33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|To33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zu33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|To33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|To33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zu33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y23_N59
-dffeas \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE (
+// Location: FF_X25_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|Kjk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Kjk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Oubwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|To33z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|To33z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|To33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oubwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .lut_mask = 64'h00C0000000800080;
-defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Oubwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Fre3z4~q  & ( \soc_inst|m0_1|u_logic|Rpe3z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fre3z4~q  & ( !\soc_inst|m0_1|u_logic|Rpe3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fre3z4~q  & ( !\soc_inst|m0_1|u_logic|Rpe3z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fre3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rpe3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oubwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .lut_mask = 64'h00C0004000800000;
-defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kjk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kjk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwbwx4~0 (
+// Location: MLABCELL_X25_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tse3z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kjk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zu33z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zu33z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tse3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zu33z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kjk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .lut_mask = 64'h0000200000000000;
-defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .lut_mask = 64'h00CC00CCF0FCF0FC;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y18_N17
-dffeas \soc_inst|m0_1|u_logic|L763z4 (
+// Location: FF_X21_Y21_N56
+dffeas \soc_inst|m0_1|u_logic|Ggk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|L763z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L763z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ggk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L763z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L763z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ggk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ggk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~0 (
+// Location: LABCELL_X19_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ta1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oubwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Cy43z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|L763z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Cy43z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|L763z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|L763z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cy43z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oubwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .lut_mask = 64'h00000C0800000400;
-defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~3 (
+// Location: LABCELL_X19_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U71xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oubwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Oubwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hue3z4~q  & (!\soc_inst|m0_1|u_logic|Oubwx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Oubwx4~2_combout  & !\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Oubwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oubwx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Oubwx4~2_combout  & !\soc_inst|m0_1|u_logic|Lwbwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|U71xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hue3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Oubwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oubwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oubwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oubwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .lut_mask = 64'hC000400000000000;
-defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U71xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U71xx4~0 .lut_mask = 64'h000000000F000000;
+defparam \soc_inst|m0_1|u_logic|U71xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Konvx4~0 (
+// Location: MLABCELL_X21_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Konvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pybwx4~combout  & ( \soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Szr2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|G1s2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pybwx4~combout  & ( \soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Szr2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|G1s2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Pybwx4~combout  & ( !\soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Szr2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|G1s2z4~q 
-// ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pybwx4~combout  & ( !\soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Szr2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|G1s2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ggk2z4~q ) # (!\soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ggk2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oubwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ggk2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Konvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Konvx4~0 .lut_mask = 64'hCCAFCCAFCCAFCCA0;
-defparam \soc_inst|m0_1|u_logic|Konvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~49 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~54  ))
-// \soc_inst|m0_1|u_logic|Add3~50  = CARRY(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~54  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~54 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~49_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~50 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~49 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~49 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~49 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~45 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~50  ))
-// \soc_inst|m0_1|u_logic|Add3~46  = CARRY(( !\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~50  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~50 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~45_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~46 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~45 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~45 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~45 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .lut_mask = 64'h0000FF00AAAAFFAA;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~41 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~46  ))
-// \soc_inst|m0_1|u_logic|Add3~42  = CARRY(( !\soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~46  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~46 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~41_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~42 ),
-	.shareout());
+// Location: FF_X27_Y17_N59
+dffeas \soc_inst|m0_1|u_logic|Rek2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rek2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~41 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~41 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add3~41 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rek2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rek2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y15_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xxovx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xxovx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( \soc_inst|m0_1|u_logic|Add3~41_sumout  & ( (((\soc_inst|m0_1|u_logic|Konvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~113_sumout  & ( \soc_inst|m0_1|u_logic|Add3~41_sumout  & ( ((\soc_inst|m0_1|u_logic|Konvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~41_sumout  & ( ((\soc_inst|m0_1|u_logic|Konvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~113_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~41_sumout  & ( (\soc_inst|m0_1|u_logic|Konvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add3~41_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X21_Y22_N2
+dffeas \soc_inst|m0_1|u_logic|Rht2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rht2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xxovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xxovx4 .lut_mask = 64'h0505373705FF37FF;
-defparam \soc_inst|m0_1|u_logic|Xxovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rht2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rht2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y15_N13
-dffeas \soc_inst|ram_1|saved_word_address[7] (
+// Location: FF_X29_Y21_N40
+dffeas \soc_inst|m0_1|u_logic|Aru2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [7]),
+	.q(\soc_inst|m0_1|u_logic|Aru2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[7] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[7] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aru2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aru2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N45
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[7]~7 (
+// Location: MLABCELL_X21_Y22_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~6 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[7]~7_combout  = ( \soc_inst|m0_1|u_logic|Xxovx4~combout  & ( ((!\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|always1~0_combout )) # (\soc_inst|ram_1|saved_word_address [7]) ) ) # ( !\soc_inst|m0_1|u_logic|Xxovx4~combout  
-// & ( (\soc_inst|ram_1|saved_word_address [7] & ((!\soc_inst|ram_1|always1~0_combout ) # (\soc_inst|ram_1|write_cycle~q ))) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Rht2z4~q  & ( \soc_inst|m0_1|u_logic|Aru2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rht2z4~q  & ( !\soc_inst|m0_1|u_logic|Aru2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rht2z4~q  & ( !\soc_inst|m0_1|u_logic|Aru2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|saved_word_address [7]),
-	.datad(!\soc_inst|ram_1|always1~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rht2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aru2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[7]~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .lut_mask = 64'h0F050F050FAF0FAF;
-defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .lut_mask = 64'h000A000200080000;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y15_N37
-dffeas \soc_inst|ram_1|saved_word_address[8] (
+// Location: FF_X21_Y22_N44
+dffeas \soc_inst|m0_1|u_logic|Rd63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [8]),
+	.q(\soc_inst|m0_1|u_logic|Rd63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[8] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[8] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rd63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y15_N0
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[8]~8 (
-// Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[8]~8_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & (\soc_inst|m0_1|u_logic|Jxovx4~combout )) # (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|saved_word_address [8]))) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [8] ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|write_cycle~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
-	.datad(!\soc_inst|ram_1|saved_word_address [8]),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[8]~8_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y21_N55
+dffeas \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .lut_mask = 64'h00FF00FF0C3F0C3F;
-defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlnwx4~0 (
+// Location: MLABCELL_X21_Y22_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & \soc_inst|m0_1|u_logic|C8rwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|X77wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & \soc_inst|m0_1|u_logic|C8rwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Rd63z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rd63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .lut_mask = 64'h00F000F0CCFCCCFC;
-defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .lut_mask = 64'h0000000044000050;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4uvx4~0 (
+// Location: MLABCELL_X21_Y22_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T4uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( (\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & (!\soc_inst|m0_1|u_logic|Lz93z4~q  & \soc_inst|m0_1|u_logic|Ffs2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Izpvx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Izpvx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|An73z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rek2z4~q )))) # (\soc_inst|m0_1|u_logic|An73z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rek2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|An73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rek2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Izpvx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .lut_mask = 64'h0000000000400040;
-defparam \soc_inst|m0_1|u_logic|T4uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .lut_mask = 64'hDD0D000000000000;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I7owx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|I7owx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y20_N50
+dffeas \soc_inst|m0_1|u_logic|Vhk2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vhk2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I7owx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I7owx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|I7owx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vhk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vhk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y16_N4
-dffeas \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE (
+// Location: FF_X33_Y20_N2
+dffeas \soc_inst|m0_1|u_logic|Hc13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Hc13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hc13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hc13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4nvx4~0 (
+// Location: MLABCELL_X25_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F4nvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|Kop2z4~q  & !\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hc13z4~q ) # ((\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Vhk2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Vhk2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vhk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hc13z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|F4nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .lut_mask = 64'h30303030FF30FF30;
+defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4nvx4~1 (
+// Location: LABCELL_X22_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|F4nvx4~0_combout  & \soc_inst|m0_1|u_logic|K3l2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Izpvx4~combout  = ( \soc_inst|m0_1|u_logic|Izpvx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Izpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Izpvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Izpvx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Izpvx4~2_combout  & !\soc_inst|m0_1|u_logic|Izpvx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Izpvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Izpvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Izpvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Izpvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Izpvx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F4nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Izpvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .lut_mask = 64'h000C000C55555555;
-defparam \soc_inst|m0_1|u_logic|F4nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Izpvx4 .lut_mask = 64'h0000400000000000;
+defparam \soc_inst|m0_1|u_logic|Izpvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y15_N55
-dffeas \soc_inst|m0_1|u_logic|K3l2z4 (
+// Location: FF_X23_Y13_N56
+dffeas \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|F4nvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K3l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K3l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txtvx4~0 (
+// Location: LABCELL_X24_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S17wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Txtvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|S17wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & !\soc_inst|m0_1|u_logic|Zwcvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & \soc_inst|m0_1|u_logic|Zwcvx4~combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Txtvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S17wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S17wx4~0 .lut_mask = 64'h00F000F00F000F00;
+defparam \soc_inst|m0_1|u_logic|S17wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfa3z4~0 (
+// Location: LABCELL_X36_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D47wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qfa3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o [1] )
+// \soc_inst|m0_1|u_logic|D47wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qfa3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D47wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D47wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D47wx4~0 .lut_mask = 64'h0000000000000003;
+defparam \soc_inst|m0_1|u_logic|D47wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6tvx4~0 (
+// Location: LABCELL_X29_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H6tvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & (!\soc_inst|m0_1|u_logic|Kop2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Lz93z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Zxpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|P37wx4~0_combout  & !\soc_inst|m0_1|u_logic|D47wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|P37wx4~0_combout  & (!\soc_inst|m0_1|u_logic|D47wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|P37wx4~0_combout  & !\soc_inst|m0_1|u_logic|D47wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|P37wx4~0_combout  & !\soc_inst|m0_1|u_logic|D47wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|D47wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .lut_mask = 64'h0000000008000800;
-defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .lut_mask = 64'h3300330023003300;
+defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5ovx4 (
+// Location: LABCELL_X23_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C5ovx4~combout  = (\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|H6tvx4~0_combout )
+// \soc_inst|m0_1|u_logic|Rhnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wspvx4~combout  & !\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Wspvx4~combout  & !\soc_inst|m0_1|u_logic|S17wx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rhnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5ovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C5ovx4 .lut_mask = 64'h000F000F000F000F;
-defparam \soc_inst|m0_1|u_logic|C5ovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .lut_mask = 64'h3300330030303030;
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y14_N43
-dffeas \soc_inst|m0_1|u_logic|Qfa3z4 (
+// Location: FF_X23_Y17_N38
+dffeas \soc_inst|ram_1|saved_word_address[9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qfa3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Owovx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qfa3z4~q ),
+	.q(\soc_inst|ram_1|saved_word_address [9]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfa3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qfa3z4 .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[9] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[9] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~5 (
+// Location: LABCELL_X27_Y17_N12
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[9]~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~5_combout  = (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Zhyvx4~combout )
+// \soc_inst|ram_1|memory.raddr_a[9]~9_combout  = ( \soc_inst|m0_1|u_logic|Owovx4~combout  & ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q ) # (\soc_inst|ram_1|saved_word_address [9]) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Owovx4~combout  & ( \soc_inst|ram_1|always1~0_combout  & ( (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|saved_word_address [9]) ) ) ) # ( \soc_inst|m0_1|u_logic|Owovx4~combout  & ( !\soc_inst|ram_1|always1~0_combout  & ( 
+// \soc_inst|ram_1|saved_word_address [9] ) ) ) # ( !\soc_inst|m0_1|u_logic|Owovx4~combout  & ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [9] ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~q ),
+	.datac(!\soc_inst|ram_1|saved_word_address [9]),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[9]~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .lut_mask = 64'h0F000F000F000F00;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .lut_mask = 64'h0F0F0F0F0303CFCF;
+defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y15_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5uvx4~0 (
+// Location: LABCELL_X19_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~81 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A5uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F4nvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Add3~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~38  ))
+// \soc_inst|m0_1|u_logic|Add3~82  = CARRY(( !\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~38  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~38 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~81_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~82 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~81 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~81 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y14_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5tvx4 (
+// Location: LABCELL_X19_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~77 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T5tvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Add3~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~82  ))
+// \soc_inst|m0_1|u_logic|Add3~78  = CARRY(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~82  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
+	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~82 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~77_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~78 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T5tvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T5tvx4 .lut_mask = 64'h00000F0F00000F0F;
-defparam \soc_inst|m0_1|u_logic|T5tvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~77 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~77 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y14_N37
-dffeas \soc_inst|m0_1|u_logic|Tna3z4 (
+// Location: FF_X27_Y17_N1
+dffeas \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y12_N31
+dffeas \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X17_Y21_N14
+dffeas \soc_inst|m0_1|u_logic|Vdr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vdr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tna3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tna3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vdr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vdr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aea3z4~0 (
+// Location: FF_X17_Y18_N56
+dffeas \soc_inst|m0_1|u_logic|Lpv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lpv2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lpv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aea3z4~0_combout  = !\soc_inst|m0_1|u_logic|hwdata_o~5_combout 
+// \soc_inst|m0_1|u_logic|H2wwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vdr2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Lpv2z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Vdr2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lpv2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aea3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H2wwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .lut_mask = 64'hFF00FF00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .lut_mask = 64'h0000232000000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y14_N47
-dffeas \soc_inst|m0_1|u_logic|Aea3z4 (
+// Location: FF_X18_Y18_N47
+dffeas \soc_inst|m0_1|u_logic|Kfr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Aea3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aea3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kfr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aea3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aea3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kfr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kfr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y14_N38
-dffeas \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE (
+// Location: FF_X17_Y20_N49
+dffeas \soc_inst|m0_1|u_logic|Cc73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cc73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cc73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Etmvx4~0 (
+// Location: LABCELL_X18_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Etmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q ) # (((\soc_inst|m0_1|u_logic|Aea3z4~q  & \soc_inst|m0_1|u_logic|Oytvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) # (\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|H2wwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cc73z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Kfr2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cc73z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Kfr2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aea3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kfr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cc73z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Etmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H2wwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .lut_mask = 64'h55FF55FFABFFABFF;
-defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .lut_mask = 64'h080A080000000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y14_N29
-dffeas \soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE (
+// Location: FF_X18_Y17_N14
+dffeas \soc_inst|m0_1|u_logic|Rr93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Etmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Rr93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rr93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~94 (
+// Location: FF_X18_Y20_N19
+dffeas \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~94_cout  = CARRY(( !\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q  ) + ( VCC ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|H2wwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rr93z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rr93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
+	.combout(\soc_inst|m0_1|u_logic|H2wwx4~1_combout ),
 	.sumout(),
-	.cout(\soc_inst|m0_1|u_logic|Add0~94_cout ),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~94 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~94 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~94 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .lut_mask = 64'h0000000000005404;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~33 (
+// Location: LABCELL_X16_Y22_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cgu2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|C4b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~94_cout  ))
-// \soc_inst|m0_1|u_logic|Add0~34  = CARRY(( !\soc_inst|m0_1|u_logic|C4b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~94_cout  ))
+// \soc_inst|m0_1|u_logic|Cgu2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qd1wx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~94_cout ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~33_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~34 ),
+	.combout(\soc_inst|m0_1|u_logic|Cgu2z4~feeder_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~33 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~33 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~33 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cgu2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cgu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Cgu2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xsmvx4~0 (
+// Location: FF_X16_Y22_N52
+dffeas \soc_inst|m0_1|u_logic|Cgu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cgu2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cgu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cgu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y22_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll83z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C4b3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~33_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Qfa3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|C4b3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~33_sumout  & ( ((\soc_inst|m0_1|u_logic|Qfa3z4~q  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C4b3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~33_sumout  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # (\soc_inst|m0_1|u_logic|Qfa3z4~q )) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|C4b3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~33_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Qfa3z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ll83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qd1wx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qfa3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add0~33_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ll83z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .lut_mask = 64'h5F57FFF75557F5F7;
-defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ll83z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ll83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ll83z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N7
-dffeas \soc_inst|m0_1|u_logic|C4b3z4 (
+// Location: FF_X16_Y22_N25
+dffeas \soc_inst|m0_1|u_logic|Ll83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ll83z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C4b3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ll83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C4b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C4b3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ll83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y23_N32
-dffeas \soc_inst|m0_1|u_logic|J5m2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J5m2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X16_Y22_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H2wwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Cgu2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Ll83z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ll83z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|H2wwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J5m2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .lut_mask = 64'h000000D800000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y23_N49
-dffeas \soc_inst|m0_1|u_logic|X6m2z4 (
+// Location: LABCELL_X17_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H2wwx4~combout  = ( !\soc_inst|m0_1|u_logic|H2wwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H2wwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H2wwx4~3_combout  & !\soc_inst|m0_1|u_logic|H2wwx4~0_combout ) ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H2wwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H2wwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H2wwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H2wwx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2wwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2wwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|H2wwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X6m2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X6m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X6m2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y23_N26
-dffeas \soc_inst|m0_1|u_logic|Po53z4 (
+// Location: FF_X17_Y18_N49
+dffeas \soc_inst|m0_1|u_logic|Bk33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bk33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bk33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y23_N14
-dffeas \soc_inst|m0_1|u_logic|Gf43z4 (
+// Location: LABCELL_X17_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9a2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Bk33z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bk33z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|U9a2z4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .lut_mask = 64'h00B8000000000000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y20_N35
+dffeas \soc_inst|m0_1|u_logic|Kt43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -25399,37 +24596,62 @@ dffeas \soc_inst|m0_1|u_logic|Gf43z4 (
 	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kt43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kt43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y23_N38
-dffeas \soc_inst|m0_1|u_logic|X533z4 (
+// Location: FF_X17_Y19_N22
+dffeas \soc_inst|m0_1|u_logic|T263z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X533z4~q ),
+	.q(\soc_inst|m0_1|u_logic|T263z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X533z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X533z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T263z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T263z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y23_N29
-dffeas \soc_inst|m0_1|u_logic|Bv03z4 (
+// Location: LABCELL_X18_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9a2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Kt43z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|T263z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Kt43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T263z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|U9a2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .lut_mask = 64'h0000232000000000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X15_Y20_N58
+dffeas \soc_inst|m0_1|u_logic|M413z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -25437,1294 +24659,1407 @@ dffeas \soc_inst|m0_1|u_logic|Bv03z4 (
 	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bv03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bv03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bv03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M413z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M413z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~2 (
+// Location: LABCELL_X16_Y22_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S703z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R40wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Bv03z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|X533z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|S703z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qd1wx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X533z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bv03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R40wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S703z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R40wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R40wx4~2 .lut_mask = 64'h0305030500FF00FF;
-defparam \soc_inst|m0_1|u_logic|R40wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S703z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S703z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|S703z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y23_N29
-dffeas \soc_inst|m0_1|u_logic|Hyz2z4 (
+// Location: FF_X16_Y22_N34
+dffeas \soc_inst|m0_1|u_logic|S703z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|S703z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hyz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|S703z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hyz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hyz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S703z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S703z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y23_N46
-dffeas \soc_inst|m0_1|u_logic|Ow13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow13z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X16_Y22_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U9a2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|S703z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M413z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S703z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|U9a2z4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .lut_mask = 64'h000080800000A000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N59
-dffeas \soc_inst|m0_1|u_logic|Xx93z4 (
+// Location: FF_X21_Y20_N49
+dffeas \soc_inst|m0_1|u_logic|Zgr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xx93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zgr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xx93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xx93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zgr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zgr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~1 (
+// Location: MLABCELL_X21_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rba2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R40wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ow13z4~q  & ( \soc_inst|m0_1|u_logic|Xx93z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) 
-// # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Hyz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ow13z4~q  & ( \soc_inst|m0_1|u_logic|Xx93z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Hyz2z4~q 
-// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ow13z4~q  & ( !\soc_inst|m0_1|u_logic|Xx93z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Hyz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ow13z4~q  & ( !\soc_inst|m0_1|u_logic|Xx93z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Hyz2z4~q 
-// ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Rba2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zgr2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ow13z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xx93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Zgr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R40wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rba2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R40wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R40wx4~1 .lut_mask = 64'h0D030DC3CD03CDC3;
-defparam \soc_inst|m0_1|u_logic|R40wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~0 (
+// Location: LABCELL_X17_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R40wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Po53z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|R40wx4~2_combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|R40wx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|R40wx4~1_combout  & 
-// ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Gf43z4~q ) # (!\soc_inst|m0_1|u_logic|R40wx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|U9a2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|U9a2z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rba2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U9a2z4~1_combout  & (!\soc_inst|m0_1|u_logic|U9a2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oir2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Po53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gf43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R40wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U9a2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oir2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U9a2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U9a2z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rba2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R40wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9a2z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R40wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R40wx4~0 .lut_mask = 64'hF0C0F000000000A0;
-defparam \soc_inst|m0_1|u_logic|R40wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4 (
+// Location: LABCELL_X17_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pg1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R40wx4~combout  = ( !\soc_inst|m0_1|u_logic|R40wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|J5m2z4~q  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X6m2z4~q )))) # (\soc_inst|m0_1|u_logic|J5m2z4~q  & (((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout )) # (\soc_inst|m0_1|u_logic|X6m2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H2wwx4~combout ) # (!\soc_inst|m0_1|u_logic|U9a2z4~3_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J5m2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|X6m2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R40wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U9a2z4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R40wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R40wx4 .lut_mask = 64'hF351000000000000;
-defparam \soc_inst|m0_1|u_logic|R40wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .lut_mask = 64'hAAAACCCCAAAAFFF0;
+defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wq5wx4 (
+// Location: LABCELL_X23_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cqovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wq5wx4~combout  = ( \soc_inst|m0_1|u_logic|Y9t2z4~q  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & \soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Cqovx4~combout  = ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( (((\soc_inst|m0_1|u_logic|Add3~77_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~77_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( ((\soc_inst|m0_1|u_logic|Add3~77_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( (\soc_inst|m0_1|u_logic|Add3~77_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add3~77_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wq5wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wq5wx4 .lut_mask = 64'h0000000000550055;
-defparam \soc_inst|m0_1|u_logic|Wq5wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cqovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cqovx4 .lut_mask = 64'h00550F5F33773F7F;
+defparam \soc_inst|m0_1|u_logic|Cqovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ab9wx4~0 (
+// Location: FF_X23_Y17_N1
+dffeas \soc_inst|ram_1|saved_word_address[10] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|saved_word_address [10]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[10] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[10] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y17_N30
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[10]~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ab9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[10]~10_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cqovx4~combout )) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// ((\soc_inst|ram_1|saved_word_address [10]))) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [10] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|saved_word_address [10]),
+	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[10]~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .lut_mask = 64'h0000000000008000;
-defparam \soc_inst|m0_1|u_logic|Ab9wx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .lut_mask = 64'h0F0F0F0F550F550F;
+defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R99wx4~0 (
+// Location: LABCELL_X19_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~105 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R99wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout  & 
-// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add3~105_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~78  ))
+// \soc_inst|m0_1|u_logic|Add3~106  = CARRY(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~78  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~78 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R99wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~105_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~106 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R99wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R99wx4~0 .lut_mask = 64'hAA00AA00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|R99wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~105 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~105 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~105 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y24_N5
-dffeas \soc_inst|m0_1|u_logic|Lsd3z4 (
+// Location: FF_X24_Y21_N37
+dffeas \soc_inst|m0_1|u_logic|D923z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|D923z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lsd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|D923z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lsd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D923z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D923z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y22_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnr2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hnr2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hnr2z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hnr2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hnr2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Hnr2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y21_N43
-dffeas \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE (
+// Location: FF_X17_Y22_N32
+dffeas \soc_inst|m0_1|u_logic|Hnr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hnr2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Hnr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hnr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hnr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y18_N38
-dffeas \soc_inst|m0_1|u_logic|Tyd3z4 (
+// Location: FF_X18_Y18_N52
+dffeas \soc_inst|m0_1|u_logic|Na73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tyd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Na73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tyd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tyd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Na73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~6 (
+// Location: LABCELL_X17_Y22_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Tyd3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Tyd3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Hnr2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Na73z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tyd3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hnr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Na73z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .lut_mask = 64'h4440000000400000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y17_N40
-dffeas \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .lut_mask = 64'h0000500000004400;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qc1xx4~0 (
+// Location: MLABCELL_X15_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj83z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qc1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Wj83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .lut_mask = 64'h0030003000000000;
-defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wj83z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wj83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wj83z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y21_N13
-dffeas \soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE (
+// Location: FF_X15_Y21_N8
+dffeas \soc_inst|m0_1|u_logic|Wj83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wj83z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Wj83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wj83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X36_Y15_N43
-dffeas \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE (
+// Location: FF_X27_Y21_N25
+dffeas \soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~7 (
+// Location: MLABCELL_X15_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~7_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) 
-// ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wj83z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wj83z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .lut_mask = 64'h8080040000000400;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .lut_mask = 64'h0000500000004400;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~8 (
+// Location: LABCELL_X18_Y21_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Lsd3z4~q  & (!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Hc1wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Z0g3z4~q )))) # (\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & (\soc_inst|m0_1|u_logic|D923z4~q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z0g3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lsd3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z0g3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|D923z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .lut_mask = 64'hC0F0405000000000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .lut_mask = 64'h8ACF000000000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R99wx4~1 (
+// Location: LABCELL_X27_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ciawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R99wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|R99wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ciawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|R99wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ciawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R99wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R99wx4~1 .lut_mask = 64'h03030B0B030F0B0F;
-defparam \soc_inst|m0_1|u_logic|R99wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .lut_mask = 64'hF000F000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~1 (
+// Location: LABCELL_X18_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ciawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aj1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|R99wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Gm1wx4~combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Gm1wx4~combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|R99wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Gm1wx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|R99wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Gm1wx4~combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Gm1wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Gm1wx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ciawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ciawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Hc1wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ciawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( ((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ciawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .lut_mask = 64'h0F004F440F008F88;
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .lut_mask = 64'h00004F4F00004FFF;
+defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~2 (
+// Location: LABCELL_X24_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aj1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~45_sumout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Aj1wx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Kzbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( (\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Bsy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~q  & ( ((\soc_inst|m0_1|u_logic|Y29wx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Bsy2z4~q )) # (\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .lut_mask = 64'hF0F0505000000000;
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .lut_mask = 64'h5F0F5F0F55005500;
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y16_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xk1wx4~1 (
+// Location: LABCELL_X23_Y24_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xk1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|R99wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R99wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|R99wx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ohivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Szr2z4~q  & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Jex2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jex2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Szr2z4~q  & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Jex2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jex2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .lut_mask = 64'h0D0DFDFD0D00FD00;
+defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y24_N43
+dffeas \soc_inst|m0_1|u_logic|Szr2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Szr2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Szr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Szr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P03wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P03wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ) ) )
+
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xk1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .lut_mask = 64'h00AA005555FFAAFF;
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P03wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P03wx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|P03wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xk1wx4~0 (
+// Location: MLABCELL_X25_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xk1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xk1wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xk1wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|G6d3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|P03wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|P03wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xk1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G6d3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .lut_mask = 64'h0000CE0A0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .lut_mask = 64'h000C000C080C080C;
+defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y22_N8
-dffeas \soc_inst|m0_1|u_logic|Nl53z4 (
+// Location: MLABCELL_X15_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ecawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|K9z2z4~q ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ecawx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .lut_mask = 64'hF0FFF0FF00000000;
+defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y19_N20
+dffeas \soc_inst|m0_1|u_logic|Psn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Psn2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Psn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Psn2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|W5p2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Psn2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|W5p2z4~q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q )) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((\soc_inst|m0_1|u_logic|T1d3z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Psn2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~1 .lut_mask = 64'h8050800000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X15_Y17_N35
+dffeas \soc_inst|m0_1|u_logic|V223z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V223z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V223z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V223z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y20_N56
+dffeas \soc_inst|m0_1|u_logic|Eun2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nl53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Eun2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nl53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nl53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eun2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eun2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ilp2z4~feeder (
+// Location: MLABCELL_X15_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|V223z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Eun2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|V223z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Eun2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~0 .lut_mask = 64'h00C0A00000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixn2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ilp2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Ixn2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ilp2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ixn2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ilp2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ilp2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ilp2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ixn2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ixn2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ixn2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y20_N43
-dffeas \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE (
+// Location: FF_X17_Y15_N59
+dffeas \soc_inst|m0_1|u_logic|Ixn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ilp2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ixn2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ixn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ixn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec43z4~feeder (
+// Location: MLABCELL_X15_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ec43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Jq1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ixn2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|M1j2z4~q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ixn2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .lut_mask = 64'h0080000000000000;
+defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X13_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu53z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wu53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ec43z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wu53z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec43z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ec43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ec43z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wu53z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wu53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wu53z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y23_N13
-dffeas \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE (
+// Location: FF_X13_Y15_N16
+dffeas \soc_inst|m0_1|u_logic|Wu53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ec43z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wu53z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X33_Y23_N11
-dffeas \soc_inst|m0_1|u_logic|Wmp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wmp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wu53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wmp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wmp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wu53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wu53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y23_N26
-dffeas \soc_inst|m0_1|u_logic|Fvz2z4 (
+// Location: FF_X18_Y15_N25
+dffeas \soc_inst|m0_1|u_logic|Ec33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fvz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ec33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fvz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fvz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ec33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ec33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~6 (
+// Location: MLABCELL_X15_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~6_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// ( !\soc_inst|m0_1|u_logic|Svk2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fvz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Wmp2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Fvz2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ec33z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Wu53z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wmp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fvz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wu53z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ec33z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .lut_mask = 64'hCCF000F0FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~3 .lut_mask = 64'h0000321000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mt13z4~feeder (
+// Location: LABCELL_X18_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arn2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mt13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Arn2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mt13z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Arn2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mt13z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mt13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Mt13z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Arn2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Arn2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Arn2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y22_N20
-dffeas \soc_inst|m0_1|u_logic|Mt13z4 (
+// Location: FF_X18_Y21_N28
+dffeas \soc_inst|m0_1|u_logic|Arn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mt13z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Arn2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mt13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Arn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mt13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mt13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Arn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Arn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y22_N26
-dffeas \soc_inst|m0_1|u_logic|Zr03z4 (
+// Location: FF_X15_Y17_N47
+dffeas \soc_inst|m0_1|u_logic|Nl43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zr03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nl43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zr03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zr03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nl43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nl43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|St0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Arn2z4~q  & ( \soc_inst|m0_1|u_logic|Nl43z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Arn2z4~q  & ( !\soc_inst|m0_1|u_logic|Nl43z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Arn2z4~q  & ( !\soc_inst|m0_1|u_logic|Nl43z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) 
+// )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Arn2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nl43z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|St0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~2 .lut_mask = 64'h0500040001000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y21_N13
-dffeas \soc_inst|m0_1|u_logic|V233z4~DUPLICATE (
+// Location: FF_X15_Y17_N14
+dffeas \soc_inst|m0_1|u_logic|Ey03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ey03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V233z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V233z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ey03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ey03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y15_N25
-dffeas \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE (
+// Location: FF_X16_Y15_N25
+dffeas \soc_inst|m0_1|u_logic|K103z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|K103z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K103z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K103z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~5 (
+// Location: MLABCELL_X15_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~5_combout  = ( \soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Zr03z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Mt13z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zr03z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Mt13z4~q ) # 
-// ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Zr03z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Mt13z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zr03z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Mt13z4~q ) # 
-// ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~4_combout  = ( \soc_inst|m0_1|u_logic|K103z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Ey03z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K103z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Ey03z4~q ) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mt13z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zr03z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|V233z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ey03z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|K103z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .lut_mask = 64'hEFE3ECE02F232C20;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~4 .lut_mask = 64'h00000000C4008000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~1 (
+// Location: MLABCELL_X15_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Eo5wx4~6_combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|H3d3z4~q 
-// ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~6_combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Eo5wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|St0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|St0wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|St0wx4~1_combout  & (!\soc_inst|m0_1|u_logic|St0wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Jq1xx4~0_combout  & !\soc_inst|m0_1|u_logic|St0wx4~3_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|St0wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|St0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|St0wx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|St0wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .lut_mask = 64'h00000A08A0A0AAA8;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Eo5wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & (\soc_inst|m0_1|u_logic|Nl53z4~q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nl53z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X18_Y13_N58
+dffeas \soc_inst|m0_1|u_logic|Od83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Od83z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .lut_mask = 64'h8CAF000000000000;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Od83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Od83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[5] (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o [5] = ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o [5]),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X18_Y15_N53
+dffeas \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .lut_mask = 64'hF0F0F0F0FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y14_N25
-dffeas \soc_inst|m0_1|u_logic|Mka3z4 (
+// Location: FF_X16_Y19_N25
+dffeas \soc_inst|m0_1|u_logic|Ohv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [5]),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mka3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ohv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mka3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mka3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ohv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ohv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~20 (
+// Location: LABCELL_X18_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~20_combout  = ( \soc_inst|m0_1|u_logic|R40wx4~combout  ) # ( !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( !\soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|St0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|F8u2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ohv2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|F8u2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ohv2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ohv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|F8u2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .lut_mask = 64'hFF00FF00FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~7 .lut_mask = 64'h0302000000020000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y14_N8
-dffeas \soc_inst|m0_1|u_logic|Wia3z4 (
+// Location: FF_X18_Y13_N50
+dffeas \soc_inst|m0_1|u_logic|Fi93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wia3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fi93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wia3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wia3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fi93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fi93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~21 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M2b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~34  ))
-// \soc_inst|m0_1|u_logic|Add0~22  = CARRY(( !\soc_inst|m0_1|u_logic|M2b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~34  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~34 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~21_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~22 ),
-	.shareout());
+// Location: FF_X19_Y17_N58
+dffeas \soc_inst|m0_1|u_logic|F473z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F473z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~21 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F473z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F473z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~3 (
+// Location: LABCELL_X18_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cr1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hnbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fi93z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|F473z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fi93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|F473z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .lut_mask = 64'h12B212B221712171;
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~6 .lut_mask = 64'h00000C000000000A;
+defparam \soc_inst|m0_1|u_logic|St0wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P03wx4~0 (
+// Location: LABCELL_X18_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P03wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|St0wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Od83z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Od83z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Od83z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|St0wx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P03wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P03wx4~0 .lut_mask = 64'h0000000005050505;
-defparam \soc_inst|m0_1|u_logic|P03wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4~8 .lut_mask = 64'hF351000000000000;
+defparam \soc_inst|m0_1|u_logic|St0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d3z4~0 (
+// Location: MLABCELL_X15_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G6d3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( \soc_inst|m0_1|u_logic|P03wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & \soc_inst|interconnect_1|HREADY~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( \soc_inst|m0_1|u_logic|P03wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & \soc_inst|interconnect_1|HREADY~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|P03wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|interconnect_1|HREADY~0_combout  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ecawx4~1_combout  = ( \soc_inst|m0_1|u_logic|St0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ecawx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|St0wx4~5_combout  & ( 
+// \soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|St0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|St0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ecawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ecawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G6d3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .lut_mask = 64'h0000220022222222;
-defparam \soc_inst|m0_1|u_logic|G6d3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .lut_mask = 64'h0233023302333333;
+defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d3z4~1 (
+// Location: LABCELL_X19_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~97 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G6d3z4~1_combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & (((\soc_inst|m0_1|u_logic|G6d3z4~q )))) # (\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Mtqvx4~combout )) # (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & (((\soc_inst|m0_1|u_logic|G6d3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & (\soc_inst|m0_1|u_logic|Mtqvx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Add3~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~106  ))
+// \soc_inst|m0_1|u_logic|Add3~98  = CARRY(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~106  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|G6d3z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .lut_mask = 64'h01AB01AB51FB51FB;
-defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y14_N37
-dffeas \soc_inst|m0_1|u_logic|G6d3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G6d3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G6d3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y14_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ffbwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ffbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|G6d3z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .lut_mask = 64'h0000000008080000;
-defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X35_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cr1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  & !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Shyvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  & !\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~106 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~97_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~98 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .lut_mask = 64'hA0A08080AAAA8888;
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~97 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~97 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~97 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~0 (
+// Location: LABCELL_X19_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~93 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cr1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & (\soc_inst|m0_1|u_logic|Cr1wx4~2_combout  & 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & 
-// (\soc_inst|m0_1|u_logic|Cr1wx4~2_combout  & \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & 
-// (\soc_inst|m0_1|u_logic|Cr1wx4~2_combout  & \soc_inst|m0_1|u_logic|Qrnvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & 
-// \soc_inst|m0_1|u_logic|Cr1wx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jwf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~98  ))
+// \soc_inst|m0_1|u_logic|Add3~94  = CARRY(( !\soc_inst|m0_1|u_logic|Jwf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~98  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cr1wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~98 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~93_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~94 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .lut_mask = 64'h2222002202020002;
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~93 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~93 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~93 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~1 (
+// Location: LABCELL_X19_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~89 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~94  ))
+// \soc_inst|m0_1|u_logic|Add3~90  = CARRY(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~94  ))
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~94 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~89_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~90 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .lut_mask = 64'h000000000000FCFC;
-defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~89 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add3~89 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y22_N49
-dffeas \soc_inst|m0_1|u_logic|X563z4 (
+// Location: FF_X18_Y16_N26
+dffeas \soc_inst|m0_1|u_logic|Ay53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -26732,1069 +26067,948 @@ dffeas \soc_inst|m0_1|u_logic|X563z4 (
 	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X563z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ay53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X563z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X563z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ay53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ay53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X36_Y23_N14
-dffeas \soc_inst|m0_1|u_logic|Okn2z4 (
+// Location: FF_X15_Y16_N58
+dffeas \soc_inst|m0_1|u_logic|If33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Okn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|If33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Okn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Okn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|If33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|If33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gf73z4~feeder (
+// Location: LABCELL_X13_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gf73z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|W21wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ay53z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|If33z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ay53z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|If33z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gf73z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf73z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gf73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Gf73z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y23_N44
-dffeas \soc_inst|m0_1|u_logic|Gf73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gf73z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W21wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~3 .lut_mask = 64'h00000C0000000A00;
+defparam \soc_inst|m0_1|u_logic|W21wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y23_N26
-dffeas \soc_inst|m0_1|u_logic|Gju2z4 (
+// Location: FF_X18_Y17_N52
+dffeas \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gju2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gju2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gju2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y23_N32
-dffeas \soc_inst|m0_1|u_logic|Ajn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ajn2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X13_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|W21wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Ym93z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ajn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W21wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~4 .lut_mask = 64'hC000000020200000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y23_N8
-dffeas \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE (
+// Location: FF_X13_Y16_N50
+dffeas \soc_inst|m0_1|u_logic|Skv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Skv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q1ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Gju2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gju2z4~q ) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ajn2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Gf73z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ajn2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Gf73z4~q 
-// )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gf73z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gju2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ajn2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Po83z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .lut_mask = 64'hEE44EE44F5F5A0A0;
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Skv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vu93z4~feeder (
+// Location: MLABCELL_X15_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jbu2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vu93z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Jbu2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vu93z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jbu2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vu93z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vu93z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Vu93z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jbu2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jbu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Jbu2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y23_N56
-dffeas \soc_inst|m0_1|u_logic|Vu93z4 (
+// Location: FF_X15_Y21_N38
+dffeas \soc_inst|m0_1|u_logic|Jbu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vu93z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jbu2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vu93z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vu93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vu93z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X24_Y19_N34
-dffeas \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X24_Y19_N13
-dffeas \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X24_Y19_N1
-dffeas \soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Jbu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q1ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vu93z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vu93z4~q ) # (!\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Vu93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .lut_mask = 64'hCFC0FAFACFC00A0A;
-defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jbu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jbu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4 (
+// Location: LABCELL_X13_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q1ywx4~combout  = ( \soc_inst|m0_1|u_logic|Q1ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Q1ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Q1ywx4~1_combout  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Skv2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Jbu2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Skv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q1ywx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q1ywx4 .lut_mask = 64'h0500050005550555;
-defparam \soc_inst|m0_1|u_logic|Q1ywx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~0 .lut_mask = 64'h0300000002020000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y19_N32
-dffeas \soc_inst|m0_1|u_logic|Wa03z4 (
+// Location: FF_X13_Y17_N1
+dffeas \soc_inst|m0_1|u_logic|J5o2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wa03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J5o2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wa03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J5o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y19_N26
-dffeas \soc_inst|m0_1|u_logic|Fn33z4 (
+// Location: FF_X13_Y16_N44
+dffeas \soc_inst|m0_1|u_logic|Ro43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fn33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ro43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fn33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fn33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ro43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ro43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wd23z4~feeder (
+// Location: LABCELL_X13_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wd23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|W21wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ro43z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|J5o2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J5o2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ro43z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wd23z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wd23z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wd23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Wd23z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~2 .lut_mask = 64'h0000000000CA0000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y23_N52
-dffeas \soc_inst|m0_1|u_logic|Wd23z4 (
+// Location: FF_X13_Y16_N5
+dffeas \soc_inst|m0_1|u_logic|I113z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wd23z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wd23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I113z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wd23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wd23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I113z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I113z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y19_N50
-dffeas \soc_inst|m0_1|u_logic|Q713z4 (
+// Location: FF_X16_Y15_N50
+dffeas \soc_inst|m0_1|u_logic|O403z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q713z4~q ),
+	.q(\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q713z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q713z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O403z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O403z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~2 (
+// Location: LABCELL_X13_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sh5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Q713z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Fn33z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wd23z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Q713z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Fn33z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wd23z4~q ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|I113z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fn33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wd23z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|I113z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ),
 	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Q713z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .lut_mask = 64'hFCFCFA0A0C0CFA0A;
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~5 .lut_mask = 64'h0000A0000000C000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ow43z4~feeder (
+// Location: LABCELL_X13_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8o2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ow43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|N8o2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ow43z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N8o2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow43z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ow43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ow43z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N8o2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N8o2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|N8o2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y23_N14
-dffeas \soc_inst|m0_1|u_logic|Ow43z4 (
+// Location: FF_X13_Y19_N4
+dffeas \soc_inst|m0_1|u_logic|N8o2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ow43z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|N8o2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|N8o2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N8o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N8o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X36_Y23_N23
-dffeas \soc_inst|m0_1|u_logic|Cmn2z4 (
+// Location: FF_X15_Y20_N50
+dffeas \soc_inst|m0_1|u_logic|Z523z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cmn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z523z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cmn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cmn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z523z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z523z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~1 (
+// Location: MLABCELL_X15_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sh5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Cmn2z4~q  & ( !\soc_inst|m0_1|u_logic|Ow43z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Cmn2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ow43z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Cmn2z4~q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|N8o2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Z523z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ow43z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cmn2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|N8o2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z523z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .lut_mask = 64'hFF00AAAA0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sh5wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (((\soc_inst|m0_1|u_logic|Sh5wx4~2_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wa03z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wa03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .lut_mask = 64'h000A0080AA0AAA80;
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~1 .lut_mask = 64'h0A00000080800000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~0 (
+// Location: LABCELL_X13_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Q1ywx4~combout  & ( !\soc_inst|m0_1|u_logic|Sh5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|X563z4~q  & (!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Okn2z4~q )))) # (\soc_inst|m0_1|u_logic|X563z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Okn2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|W21wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W21wx4~3_combout  & (!\soc_inst|m0_1|u_logic|W21wx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|W21wx4~0_combout  & !\soc_inst|m0_1|u_logic|W21wx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X563z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Okn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W21wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W21wx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W21wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W21wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W21wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .lut_mask = 64'hDD0D000000000000;
-defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~6 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[2] (
+// Location: LABCELL_X13_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o [2] = ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Kfawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.combout(\soc_inst|m0_1|u_logic|Kfawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .lut_mask = 64'hFF0FFF0F00000000;
+defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gha3z4~0 (
+// Location: LABCELL_X13_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gha3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o [2] )
+// \soc_inst|m0_1|u_logic|Kfawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mddwx4~0_combout  & ( \soc_inst|m0_1|u_logic|W21wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Kfawx4~0_combout  & ((\soc_inst|m0_1|u_logic|W21wx4~6_combout ) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & ( \soc_inst|m0_1|u_logic|W21wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Kfawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|W21wx4~6_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mddwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Kfawx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Kfawx4~0_combout  & ((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kfawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y15_N34
-dffeas \soc_inst|m0_1|u_logic|Gha3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gha3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gha3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gha3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .lut_mask = 64'h005F0055007F0077;
+defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qsmvx4~0 (
+// Location: LABCELL_X24_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ns9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M2b3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Gha3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|M2b3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Gha3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|M2b3z4~q  & ( !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Add0~21_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|M2b3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~21_sumout  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ns9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add0~21_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gha3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ns9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .lut_mask = 64'h2F2FEFEF0F3FCFFF;
-defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y13_N1
-dffeas \soc_inst|m0_1|u_logic|M2b3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M2b3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M2b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M2b3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .lut_mask = 64'hA0A0A0A0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~57 (
+// Location: LABCELL_X17_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ns9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|W0b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~22  ))
-// \soc_inst|m0_1|u_logic|Add0~58  = CARRY(( !\soc_inst|m0_1|u_logic|W0b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~22  ))
+// \soc_inst|m0_1|u_logic|Ns9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Z62wx4~8_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ns9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~22 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~57_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~58 ),
+	.combout(\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~57 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~57 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~57 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .lut_mask = 64'h00000AFF00003BFF;
+defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsmvx4~0 (
+// Location: LABCELL_X13_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W0b3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~57_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Wia3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0b3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~57_sumout ))) 
-// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Wia3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|W0b3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|W0b3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Mgawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|Uup2z4~q  & !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wia3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~57_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mgawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .lut_mask = 64'h5555FFFFDF57DF57;
-defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .lut_mask = 64'hFF00FF000F000F00;
+defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N44
-dffeas \soc_inst|m0_1|u_logic|W0b3z4 (
+// Location: FF_X17_Y20_N38
+dffeas \soc_inst|m0_1|u_logic|Y873z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W0b3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Y873z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W0b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W0b3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y13_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~41 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~58  ))
-// \soc_inst|m0_1|u_logic|Add0~42  = CARRY(( !\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~58  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~58 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~41_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~42 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~41 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~41 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~41 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y873z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y873z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N32
-dffeas \soc_inst|m0_1|u_logic|Gza3z4 (
+// Location: FF_X18_Y15_N10
+dffeas \soc_inst|m0_1|u_logic|F4q2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gza3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F4q2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gza3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gza3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F4q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F4q2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Taa3z4~0 (
+// Location: LABCELL_X19_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qc1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Taa3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o [4] )
+// \soc_inst|m0_1|u_logic|Qc1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Taa3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .lut_mask = 64'h0000000050005000;
+defparam \soc_inst|m0_1|u_logic|Qc1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y14_N49
-dffeas \soc_inst|m0_1|u_logic|Taa3z4 (
+// Location: FF_X15_Y18_N43
+dffeas \soc_inst|m0_1|u_logic|O723z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Taa3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Taa3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Taa3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Taa3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O723z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O723z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Csmvx4~0 (
+// Location: FF_X16_Y18_N47
+dffeas \soc_inst|m0_1|u_logic|Gq43z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gq43z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gq43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gq43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Csmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gza3z4~q  & ( \soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~41_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gza3z4~q  & ( \soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~41_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gza3z4~q  & ( !\soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~41_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gza3z4~q  & ( !\soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~41_sumout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gq43z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gq43z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gq43z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add0~41_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Taa3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gq43z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .lut_mask = 64'h5D55FDF55D5FFDFF;
-defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~6 .lut_mask = 64'h4400040040000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N31
-dffeas \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE (
+// Location: FF_X16_Y18_N5
+dffeas \soc_inst|m0_1|u_logic|Pz53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Pz53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pz53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pz53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~65 (
+// Location: LABCELL_X17_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Qxa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~42  ))
-// \soc_inst|m0_1|u_logic|Add0~66  = CARRY(( !\soc_inst|m0_1|u_logic|Qxa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~42  ))
+// \soc_inst|m0_1|u_logic|S71wx4~7_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Pz53z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Pz53z4~q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pz53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~42 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~65_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~66 ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~7_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~65 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~65 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~65 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~7 .lut_mask = 64'hA000004000000040;
+defparam \soc_inst|m0_1|u_logic|S71wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vrmvx4~0 (
+// Location: LABCELL_X17_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vrmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qxa3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~65_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|Mka3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxa3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~65_sumout  & ( ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Mka3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qxa3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~65_sumout  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Mka3z4~q ))) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxa3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~65_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Mka3z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|S71wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Y873z4~q  & (!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|F4q2z4~q )))) # (\soc_inst|m0_1|u_logic|Y873z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout )) # (\soc_inst|m0_1|u_logic|F4q2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mka3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add0~65_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y873z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|F4q2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S71wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .lut_mask = 64'h5D5FFDFF5557F5F7;
-defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~8 .lut_mask = 64'hF351000000000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N49
-dffeas \soc_inst|m0_1|u_logic|Qxa3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qxa3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X13_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgawx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mgawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Mgawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|S71wx4~5_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Mgawx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|S71wx4~5_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Mgawx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// \soc_inst|m0_1|u_logic|Mgawx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mgawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxa3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qxa3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .lut_mask = 64'h003300BB003F00BF;
+defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5tvx4~0 (
+// Location: LABCELL_X22_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M5tvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lz93z4~q  & ( (!\soc_inst|m0_1|u_logic|Kop2z4~q  & (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & !\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Add5~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~14  ))
+// \soc_inst|m0_1|u_logic|Add5~18  = CARRY(( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~14  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~18 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .lut_mask = 64'h00000000A000A000;
-defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~17 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ts5wx4~0 (
+// Location: LABCELL_X22_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~61 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( (!\soc_inst|m0_1|u_logic|Kop2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Add5~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~18  ))
+// \soc_inst|m0_1|u_logic|Add5~62  = CARRY(( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~18  ))
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~18 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~62 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .lut_mask = 64'h000C000C00000000;
-defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~61 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~61 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zyovx4 (
+// Location: LABCELL_X22_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~65 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zyovx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Add5~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~62  ))
+// \soc_inst|m0_1|u_logic|Add5~66  = CARRY(( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~62  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~62 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~66 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~65 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~65 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~69 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~66  ))
+// \soc_inst|m0_1|u_logic|Add5~70  = CARRY(( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~66  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~66 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~70 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~69 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~69 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vpovx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vpovx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~89_sumout  & ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|U11wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~89_sumout  & ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~89_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~89_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~89_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vpovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zyovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zyovx4 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Zyovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vpovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vpovx4 .lut_mask = 64'h000F333F555F777F;
+defparam \soc_inst|m0_1|u_logic|Vpovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uic3z4~0 (
+// Location: LABCELL_X23_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eijvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uic3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|m0_1|u_logic|Uic3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Uic3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Eijvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( \soc_inst|m0_1|u_logic|Vpovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( \soc_inst|m0_1|u_logic|Vpovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( !\soc_inst|m0_1|u_logic|Vpovx4~combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( !\soc_inst|m0_1|u_logic|Vpovx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
+	.dataa(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vpovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .lut_mask = 64'h0AFA0AFA00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .lut_mask = 64'h3311FFDD3010F0D0;
+defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y16_N29
-dffeas \soc_inst|m0_1|u_logic|Uic3z4 (
+// Location: FF_X23_Y12_N1
+dffeas \soc_inst|m0_1|u_logic|Ym93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -27803,549 +27017,671 @@ dffeas \soc_inst|m0_1|u_logic|Uic3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ym93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uic3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uic3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ym93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ym93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~0 (
+// Location: MLABCELL_X34_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cymwx4~0_combout  = ( \soc_inst|m0_1|u_logic|N7c3z4~q  & ( ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Uic3z4~q )) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|N7c3z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Uic3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Fyrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fyrwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .lut_mask = 64'hDDDD0D0D00000000;
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyrwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fyrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) # ((\soc_inst|m0_1|u_logic|U2x2z4~q  & 
+// \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fyrwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cymwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .lut_mask = 64'h0055005533773377;
-defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .lut_mask = 64'h00000000EEEFEEEF;
+defparam \soc_inst|m0_1|u_logic|Fyrwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~1 (
+// Location: LABCELL_X35_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Surwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cymwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cymwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Cymwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Mka3z4~q  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Surwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mka3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cymwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cymwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .lut_mask = 64'h0050005000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Surwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Surwx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Surwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B7owx4 (
+// Location: MLABCELL_X34_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qslwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B7owx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & \soc_inst|m0_1|u_logic|F4nvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qslwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ukpvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B7owx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B7owx4 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|B7owx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .lut_mask = 64'hF0F0F0F0F000F000;
+defparam \soc_inst|m0_1|u_logic|Qslwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~2 (
+// Location: MLABCELL_X28_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dghvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cymwx4~2_combout  = ( \soc_inst|interconnect_1|HRDATA[5]~28_combout  & ( (!\soc_inst|m0_1|u_logic|Cymwx4~1_combout  & (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Qxa3z4~q )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[5]~28_combout  & ( (!\soc_inst|m0_1|u_logic|Cymwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Qxa3z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Dghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Surwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Surwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cymwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cymwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dghvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .lut_mask = 64'hCC44CC44C040C040;
-defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .lut_mask = 64'hFAAAFAAAF000F000;
+defparam \soc_inst|m0_1|u_logic|Dghvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y15_N1
+dffeas \soc_inst|m0_1|u_logic|W7z2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W7z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W7z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dghvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dghvx4~1_combout  = ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( \soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Dghvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Dghvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Cllwx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|W7z2z4~q  & ( !\soc_inst|m0_1|u_logic|Qllwx4~4_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dghvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .lut_mask = 64'h0000FFFF04CCCCCC;
+defparam \soc_inst|m0_1|u_logic|Dghvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y18_N2
-dffeas \soc_inst|m0_1|u_logic|Oir2z4 (
+// Location: FF_X28_Y15_N2
+dffeas \soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dghvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Oir2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oir2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Oir2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dy4xx4~0 (
+// Location: LABCELL_X24_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gdawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dy4xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Oir2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Gdawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & \soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Oir2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dy4xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gdawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .lut_mask = 64'h0800000000000000;
-defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .lut_mask = 64'hF0F0F0F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y24_N43
-dffeas \soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE (
+// Location: FF_X18_Y15_N17
+dffeas \soc_inst|m0_1|u_logic|Td33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Td33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Td33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Td33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y24_N50
-dffeas \soc_inst|m0_1|u_logic|Cgu2z4 (
+// Location: FF_X16_Y18_N35
+dffeas \soc_inst|m0_1|u_logic|Lw53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lw53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cgu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cgu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lw53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lw53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~4 (
+// Location: LABCELL_X16_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Lw53z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Td33z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Lw53z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Lw53z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Td33z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) 
+// ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Td33z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lw53z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .lut_mask = 64'h2022000020000000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y18_N50
-dffeas \soc_inst|m0_1|u_logic|Bk33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bk33z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bk33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .lut_mask = 64'h0040004400400000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y22_N46
-dffeas \soc_inst|m0_1|u_logic|Ll83z4 (
+// Location: FF_X16_Y16_N32
+dffeas \soc_inst|m0_1|u_logic|Zxo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ll83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zxo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ll83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zxo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zxo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~0 (
+// Location: MLABCELL_X15_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ll83z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bk33z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zxo2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H4p2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bk33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ll83z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zxo2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .lut_mask = 64'h00000000008800C0;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .lut_mask = 64'hA000000000008800;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y18_N56
-dffeas \soc_inst|m0_1|u_logic|Gcr2z4 (
+// Location: FF_X13_Y15_N20
+dffeas \soc_inst|m0_1|u_logic|Tz03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gcr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tz03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gcr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gcr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tz03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tz03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N10
-dffeas \soc_inst|m0_1|u_logic|Rr93z4 (
+// Location: FF_X13_Y15_N53
+dffeas \soc_inst|m0_1|u_logic|Z203z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rr93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z203z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rr93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rr93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z203z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z203z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~3 (
+// Location: LABCELL_X13_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rr93z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  
-// & !\soc_inst|m0_1|u_logic|Gcr2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rr93z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Gcr2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Z203z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tz03z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gcr2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rr93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tz03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z203z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .lut_mask = 64'h0000000005010400;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .lut_mask = 64'h080800000C000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y22_N28
-dffeas \soc_inst|m0_1|u_logic|M413z4 (
+// Location: FF_X16_Y18_N53
+dffeas \soc_inst|m0_1|u_logic|Cn43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M413z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cn43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M413z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M413z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cn43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cn43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y22_N47
-dffeas \soc_inst|m0_1|u_logic|S703z4 (
+// Location: MLABCELL_X15_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kwo2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kwo2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kwo2z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kwo2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kwo2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Kwo2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X15_Y15_N5
+dffeas \soc_inst|m0_1|u_logic|Kwo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kwo2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S703z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kwo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S703z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S703z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kwo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kwo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~2 (
+// Location: LABCELL_X16_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|S703z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|M413z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Cn43z4~q  & ( \soc_inst|m0_1|u_logic|Kwo2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cn43z4~q  & ( !\soc_inst|m0_1|u_logic|Kwo2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cn43z4~q  & ( !\soc_inst|m0_1|u_logic|Kwo2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|M413z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|S703z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cn43z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kwo2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .lut_mask = 64'h008800A000000000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .lut_mask = 64'h0030001000200000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K423z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K423z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|K423z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K423z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K423z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|K423z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y22_N53
-dffeas \soc_inst|m0_1|u_logic|Vdr2z4~DUPLICATE (
+// Location: FF_X15_Y14_N44
+dffeas \soc_inst|m0_1|u_logic|K423z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|K423z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vdr2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vdr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vdr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K423z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K423z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ozo2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ozo2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ozo2z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ozo2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ozo2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ozo2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y24_N34
-dffeas \soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE (
+// Location: FF_X17_Y14_N38
+dffeas \soc_inst|m0_1|u_logic|Ozo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ozo2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ozo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ozo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ozo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~1 (
+// Location: MLABCELL_X15_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vdr2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vdr2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ozo2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vdr2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ozo2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .lut_mask = 64'h00080008000C0000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .lut_mask = 64'h00008800A0000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~5 (
+// Location: FF_X18_Y15_N44
+dffeas \soc_inst|m0_1|u_logic|S2p2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|S2p2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S2p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S2p2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M92xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Ze1wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Dy4xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ze1wx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ze1wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|M92xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|S2p2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dy4xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ze1wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S2p2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M92xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M92xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M92xx4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|M92xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc73z4~feeder (
+// Location: LABCELL_X16_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cc73z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qd1wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Yw0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M92xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yw0wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Yw0wx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Yw0wx4~4_combout  & !\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yw0wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M92xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cc73z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc73z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cc73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Cc73z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y22_N29
-dffeas \soc_inst|m0_1|u_logic|Cc73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cc73z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cc73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cc73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y21_N22
-dffeas \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE (
+// Location: FF_X18_Y15_N41
+dffeas \soc_inst|m0_1|u_logic|D1p2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -28353,688 +27689,744 @@ dffeas \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|D1p2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D1p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D1p2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y18_N26
-dffeas \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE (
+// Location: FF_X16_Y16_N50
+dffeas \soc_inst|m0_1|u_logic|Uj93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Uj93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uj93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uj93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y18_N22
-dffeas \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE (
+// Location: FF_X16_Y16_N14
+dffeas \soc_inst|m0_1|u_logic|U573z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|U573z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U573z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U573z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~6 (
+// Location: LABCELL_X16_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Uj93z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U573z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uj93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|U573z4~q ),
 	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .lut_mask = 64'h00C0004000800000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .lut_mask = 64'h000C00000000000A;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y21_N4
-dffeas \soc_inst|m0_1|u_logic|T263z4 (
+// Location: FF_X21_Y19_N56
+dffeas \soc_inst|m0_1|u_logic|U9u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T263z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U9u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T263z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T263z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U9u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~85 (
+// Location: FF_X17_Y15_N38
+dffeas \soc_inst|m0_1|u_logic|Djv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Djv2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Djv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Djv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~42  ))
-// \soc_inst|m0_1|u_logic|Add2~86  = CARRY(( !\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~42  ))
+// \soc_inst|m0_1|u_logic|Yw0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Djv2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|U9u2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|U9u2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Djv2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~42 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~85_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~86 ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~7_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~85 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~85 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~85 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .lut_mask = 64'h0022003000000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~81 (
+// Location: MLABCELL_X15_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Fhx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~86  ))
-// \soc_inst|m0_1|u_logic|Add2~82  = CARRY(( !\soc_inst|m0_1|u_logic|Fhx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~86  ))
+// \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Yw0wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Df83z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|D1p2z4~q )))) # (\soc_inst|m0_1|u_logic|Df83z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout )) # (\soc_inst|m0_1|u_logic|D1p2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fhx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Df83z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|D1p2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~7_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~86 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~81_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~82 ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~81 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~81 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~81 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .lut_mask = 64'hF531000000000000;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekhvx4~0 (
+// Location: LABCELL_X16_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gdawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ekhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~81_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Fhx2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Gdawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Gdawx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( 
+// \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~81_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fhx2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gdawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .lut_mask = 64'h003B003B003B00FF;
+defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fx0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fx0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Gdawx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ekhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fx0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .lut_mask = 64'hC8FBC8FB00000000;
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .lut_mask = 64'hFAACAFCAFA00AF00;
+defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8iwx4~0 (
+// Location: LABCELL_X16_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F8iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jp3wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Jp3wx4~combout  & !\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Yw0wx4~combout  = ( \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .lut_mask = 64'h505050505F5F5F5F;
-defparam \soc_inst|m0_1|u_logic|F8iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yw0wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Yw0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmnwx4 (
+// Location: LABCELL_X22_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~73 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pmnwx4~combout  = ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Add5~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~70  ))
+// \soc_inst|m0_1|u_logic|Add5~74  = CARRY(( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~70  ))
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~70 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~74 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pmnwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pmnwx4 .lut_mask = 64'hFCFFFCFF00000000;
-defparam \soc_inst|m0_1|u_logic|Pmnwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~73 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~73 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y19_N1
-dffeas \soc_inst|m0_1|u_logic|Imu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Imu2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Imu2z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X17_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iv0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iv0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~73_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) )
 
-// Location: FF_X27_Y21_N38
-dffeas \soc_inst|m0_1|u_logic|Rr83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rr83z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fx0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Iv0wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rr83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rr83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .lut_mask = 64'h2202220200002202;
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~2 (
+// Location: LABCELL_X30_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zndwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lr9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Imu2z4~q  & ( \soc_inst|m0_1|u_logic|Rr83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Imu2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Imu2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zndwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|H2wwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|H2wwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Imu2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rr83z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .lut_mask = 64'h000A000200080000;
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y23_N49
-dffeas \soc_inst|m0_1|u_logic|Qyc3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qyc3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qyc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qyc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asr2z4~feeder (
+// Location: MLABCELL_X15_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duv2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Asr2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Duv2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Asr2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duv2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Asr2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Asr2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Asr2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duv2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duv2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Duv2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y22_N8
-dffeas \soc_inst|m0_1|u_logic|Asr2z4 (
+// Location: FF_X15_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Duv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Asr2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Duv2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Asr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Duv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Asr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Asr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Duv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Duv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~1 (
+// Location: LABCELL_X16_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lr9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Asr2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qyc3z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Asr2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qyc3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Asr2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pybwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Duv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I4s2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Duv2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|I4s2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qyc3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Asr2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|I4s2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Duv2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pybwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .lut_mask = 64'h0005000400000004;
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .lut_mask = 64'h000D000000080000;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y19_N56
-dffeas \soc_inst|m0_1|u_logic|Cvr2z4 (
+// Location: FF_X16_Y21_N56
+dffeas \soc_inst|m0_1|u_logic|Cxc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cvr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cxc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cvr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cvr2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y19_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ii73z4~feeder (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ii73z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ii73z4~feeder_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ii73z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ii73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ii73z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cxc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cxc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y19_N46
-dffeas \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE (
+// Location: FF_X16_Y21_N47
+dffeas \soc_inst|m0_1|u_logic|U2s2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ii73z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|U2s2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U2s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U2s2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~0 (
+// Location: LABCELL_X16_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lr9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cvr2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Cvr2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Pybwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U2s2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cxc3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cvr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cxc3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2s2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pybwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .lut_mask = 64'h0B00000008000000;
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .lut_mask = 64'h0000000000000C0A;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y19_N20
-dffeas \soc_inst|m0_1|u_logic|Rvv2z4 (
+// Location: FF_X17_Y21_N35
+dffeas \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rvv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rvv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y19_N8
-dffeas \soc_inst|m0_1|u_logic|Otr2z4 (
+// Location: FF_X16_Y21_N40
+dffeas \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Otr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Otr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Otr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y19_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~3 (
+// Location: LABCELL_X17_Y21_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lr9wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Otr2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rvv2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Pybwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rvv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Otr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pybwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .lut_mask = 64'h000000CA00000000;
-defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .lut_mask = 64'h000080800000C000;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4 (
+// Location: FF_X15_Y20_N32
+dffeas \soc_inst|m0_1|u_logic|Dq83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dq83z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dq83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq83z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uku2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lr9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Lr9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Lr9wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Lr9wx4~1_combout  & !\soc_inst|m0_1|u_logic|Lr9wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Uku2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lr9wx4~2_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lr9wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uku2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lr9wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lr9wx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Lr9wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uku2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uku2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Uku2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Godwx4~0 (
+// Location: FF_X15_Y21_N14
+dffeas \soc_inst|m0_1|u_logic|Uku2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Uku2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uku2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uku2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uku2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Godwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pybwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pybwx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Pybwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Uku2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Dq83z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dq83z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uku2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pybwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Godwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Godwx4~0 .lut_mask = 64'h0000FFFF55555555;
-defparam \soc_inst|m0_1|u_logic|Godwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .lut_mask = 64'h00000C0A00000000;
+defparam \soc_inst|m0_1|u_logic|Pybwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D5ywx4~0 (
+// Location: LABCELL_X16_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pybwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|A7ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q 
-// ) # (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Pybwx4~combout  = ( !\soc_inst|m0_1|u_logic|Pybwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pybwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pybwx4~3_combout  & !\soc_inst|m0_1|u_logic|Pybwx4~1_combout ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pybwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pybwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pybwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pybwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pybwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .lut_mask = 64'hFFF0FFF0000F000F;
-defparam \soc_inst|m0_1|u_logic|D5ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pybwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Pybwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N53
-dffeas \soc_inst|m0_1|u_logic|Snd3z4 (
+// Location: FF_X17_Y20_N2
+dffeas \soc_inst|m0_1|u_logic|Rd73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Snd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rd73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Snd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Snd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rd73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y22_N43
-dffeas \soc_inst|m0_1|u_logic|Hpd3z4 (
+// Location: FF_X16_Y18_N26
+dffeas \soc_inst|m0_1|u_logic|Oas2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hpd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Oas2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hpd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hpd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oas2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oas2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~1 (
+// Location: LABCELL_X16_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ai9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Snd3z4~q  & ( \soc_inst|m0_1|u_logic|Hpd3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Snd3z4~q  & ( !\soc_inst|m0_1|u_logic|Hpd3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Snd3z4~q  & ( !\soc_inst|m0_1|u_logic|Hpd3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pjqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oas2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rd73z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oas2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rd73z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oas2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Snd3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hpd3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rd73z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Oas2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .lut_mask = 64'h0101010000010000;
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .lut_mask = 64'h4400000040004000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N59
-dffeas \soc_inst|m0_1|u_logic|M3e3z4 (
+// Location: LABCELL_X17_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhu2z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rhu2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Rhu2z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhu2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Rhu2z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X17_Y17_N50
+dffeas \soc_inst|m0_1|u_logic|Rhu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rhu2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M3e3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rhu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M3e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M3e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rhu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y22_N40
-dffeas \soc_inst|m0_1|u_logic|Wqd3z4 (
+// Location: FF_X16_Y14_N31
+dffeas \soc_inst|m0_1|u_logic|An83z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -29042,552 +28434,556 @@ dffeas \soc_inst|m0_1|u_logic|Wqd3z4 (
 	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wqd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wqd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wqd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|An83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An83z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~2 (
+// Location: LABCELL_X17_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ai9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|M3e3z4~q  & ( \soc_inst|m0_1|u_logic|Wqd3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|M3e3z4~q  & ( !\soc_inst|m0_1|u_logic|Wqd3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M3e3z4~q  & ( !\soc_inst|m0_1|u_logic|Wqd3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pjqwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rhu2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|M3e3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wqd3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rhu2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .lut_mask = 64'h0050001000400000;
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .lut_mask = 64'h000000000A0C0000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y24_N44
-dffeas \soc_inst|m0_1|u_logic|I0e3z4 (
+// Location: FF_X15_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|Z8s2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I0e3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z8s2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I0e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I0e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z8s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z8s2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X1e3z4~feeder (
+// Location: MLABCELL_X15_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X1e3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Pjqwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Z8s2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Arv2z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z8s2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Arv2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X1e3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X1e3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X1e3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|X1e3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .lut_mask = 64'h000000000000A0C0;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y22_N58
-dffeas \soc_inst|m0_1|u_logic|X1e3z4 (
+// Location: FF_X17_Y20_N56
+dffeas \soc_inst|m0_1|u_logic|Gt93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|X1e3z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X1e3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X1e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X1e3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y24_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ai9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|X1e3z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|I0e3z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|I0e3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|X1e3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+	.q(\soc_inst|m0_1|u_logic|Gt93z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .lut_mask = 64'h0000000032100000;
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gt93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gt93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y24_N41
-dffeas \soc_inst|m0_1|u_logic|B5e3z4 (
+// Location: FF_X18_Y16_N46
+dffeas \soc_inst|m0_1|u_logic|K7s2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B5e3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K7s2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B5e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B5e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K7s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K7s2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4~0 (
+// Location: LABCELL_X17_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ai9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|B5e3z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lsd3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Pjqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Gt93z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|K7s2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lsd3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B5e3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gt93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|K7s2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .lut_mask = 64'h00000000CA000000;
-defparam \soc_inst|m0_1|u_logic|Ai9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .lut_mask = 64'h0000000003000202;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ai9wx4 (
+// Location: LABCELL_X16_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ai9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ai9wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Ai9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ai9wx4~1_combout  & !\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Pjqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Pjqwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pjqwx4~0_combout  & !\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ai9wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ai9wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ai9wx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pjqwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pjqwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ai9wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ai9wx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ai9wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjqwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Pjqwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3cwx4~0 (
+// Location: LABCELL_X30_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nodwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S3cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K1z2z4~q ) # ((\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Nodwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pybwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Pybwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S3cwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .lut_mask = 64'h0F000F00CFCCCFCC;
-defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .lut_mask = 64'h5500550055FF55FF;
+defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y19_N11
-dffeas \soc_inst|m0_1|u_logic|I463z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I463z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zndwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zndwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zndwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Zndwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I463z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I463z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y19_N55
-dffeas \soc_inst|m0_1|u_logic|Ql33z4~DUPLICATE (
+// Location: FF_X18_Y18_N53
+dffeas \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ql33z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ql33z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~3 (
+// Location: LABCELL_X18_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Ql33z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I463z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zkuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lqr2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lqr2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lqr2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I463z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ql33z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Lqr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .lut_mask = 64'h000000000000E200;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .lut_mask = 64'h2200000020002000;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y23_N38
-dffeas \soc_inst|m0_1|u_logic|Zu43z4 (
+// Location: FF_X18_Y18_N41
+dffeas \soc_inst|m0_1|u_logic|Neu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zu43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Neu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zu43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zu43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Neu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Neu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K7s2z4~feeder (
+// Location: LABCELL_X18_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K7s2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Zkuwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wj83z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Neu2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wj83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Neu2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Neu2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wj83z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K7s2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K7s2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K7s2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|K7s2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .lut_mask = 64'h000000D000000080;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y19_N13
-dffeas \soc_inst|m0_1|u_logic|K7s2z4 (
+// Location: FF_X13_Y18_N29
+dffeas \soc_inst|m0_1|u_logic|Wnv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|K7s2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K7s2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wnv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K7s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K7s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wnv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~2 (
+// Location: FF_X13_Y18_N41
+dffeas \soc_inst|m0_1|u_logic|Wor2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wor2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wor2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wor2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X13_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Zu43z4~q  & ( \soc_inst|m0_1|u_logic|K7s2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zu43z4~q  & ( !\soc_inst|m0_1|u_logic|K7s2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zu43z4~q  & ( !\soc_inst|m0_1|u_logic|K7s2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zkuwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wnv2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wor2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zu43z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|K7s2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wnv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wor2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .lut_mask = 64'h0044000400400000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .lut_mask = 64'h00000C0000000A00;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y18_N26
-dffeas \soc_inst|m0_1|u_logic|Rds2z4 (
+// Location: FF_X16_Y21_N34
+dffeas \soc_inst|m0_1|u_logic|Cq93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rds2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cq93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rds2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rds2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cq93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cq93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D432z4~0 (
+// Location: LABCELL_X17_Y22_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D432z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rds2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zkuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Hnr2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Cq93z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rds2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cq93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hnr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D432z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D432z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D432z4~0 .lut_mask = 64'h0080000000000000;
-defparam \soc_inst|m0_1|u_logic|D432z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .lut_mask = 64'h0000000000000C0A;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B613z4~feeder (
+// Location: LABCELL_X18_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B613z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Zkuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Zkuwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zkuwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zkuwx4~2_combout  & !\soc_inst|m0_1|u_logic|Zkuwx4~3_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zkuwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zkuwx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B613z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B613z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B613z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|B613z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkuwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Zkuwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y16_N31
-dffeas \soc_inst|m0_1|u_logic|B613z4~DUPLICATE (
+// Location: FF_X13_Y17_N8
+dffeas \soc_inst|m0_1|u_logic|Mzp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B613z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B613z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Mzp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B613z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B613z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mzp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mzp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y21_N50
-dffeas \soc_inst|m0_1|u_logic|H903z4 (
+// Location: FF_X18_Y17_N41
+dffeas \soc_inst|m0_1|u_logic|No93z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H903z4~q ),
+	.q(\soc_inst|m0_1|u_logic|No93z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H903z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H903z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|No93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|No93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~4 (
+// Location: LABCELL_X18_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|B613z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H903z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B613z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H903z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B613z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H903z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hmqwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mzp2z4~q  & ( \soc_inst|m0_1|u_logic|No93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q 
+//  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mzp2z4~q  & ( !\soc_inst|m0_1|u_logic|No93z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mzp2z4~q  & ( !\soc_inst|m0_1|u_logic|No93z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|B613z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H903z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mzp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|No93z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .lut_mask = 64'h2020002020000000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .lut_mask = 64'h0003000100020000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc23z4~feeder (
+// Location: FF_X18_Y17_N32
+dffeas \soc_inst|m0_1|u_logic|Hmv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hmv2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hmv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Hmqwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|B1q2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Hmv2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|B1q2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Hmv2z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hmv2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B1q2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc23z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc23z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Hc23z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y19_N35
-dffeas \soc_inst|m0_1|u_logic|Hc23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hc23z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hc23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hc23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .lut_mask = 64'h1110000000100000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y19_N41
-dffeas \soc_inst|m0_1|u_logic|Oas2z4 (
+// Location: FF_X17_Y20_N8
+dffeas \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -29595,207 +28991,179 @@ dffeas \soc_inst|m0_1|u_logic|Oas2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Oas2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oas2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Oas2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~0 (
+// Location: LABCELL_X17_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hc23z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Oas2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hmqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y873z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hc23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Oas2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y873z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .lut_mask = 64'h0C00808000000000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .lut_mask = 64'h0C000A0000000000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z8s2z4~feeder (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X16_Y14_N16
+dffeas \soc_inst|m0_1|u_logic|Hi83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hi83z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z8s2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z8s2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Z8s2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hi83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hi83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y18_N14
-dffeas \soc_inst|m0_1|u_logic|Z8s2z4 (
+// Location: FF_X15_Y18_N20
+dffeas \soc_inst|m0_1|u_logic|Ycu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z8s2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ycu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z8s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z8s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ycu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ycu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y16_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hvivx4~0 (
+// Location: MLABCELL_X15_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hvivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rkd3z4~q  & ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Ufx2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rkd3z4~q  & ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rkd3z4~q  & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Ufx2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rkd3z4~q  & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Hmqwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hi83z4~q  & ( \soc_inst|m0_1|u_logic|Ycu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hi83z4~q  & ( !\soc_inst|m0_1|u_logic|Ycu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hi83z4~q  & ( !\soc_inst|m0_1|u_logic|Ycu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hi83z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ycu2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .lut_mask = 64'h0D0DFDFD0D00FD00;
-defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y16_N5
-dffeas \soc_inst|m0_1|u_logic|Rkd3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rkd3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rkd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rkd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .lut_mask = 64'h1100100001000000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~1 (
+// Location: LABCELL_X18_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Rkd3z4~q )))) 
-// # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Z8s2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Hmqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Hmqwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hmqwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hmqwx4~1_combout  & !\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z8s2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hmqwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hmqwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .lut_mask = 64'hA404000000000000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmqwx4 .lut_mask = 64'hA0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Hmqwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~5 (
+// Location: LABCELL_X30_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Zh5wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Zh5wx4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|D432z4~0_combout  & !\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zkuwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Zkuwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zh5wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zh5wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D432z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .lut_mask = 64'h3300330033FF33FF;
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|An83z4~feeder (
+// Location: MLABCELL_X15_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sg83z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|An83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Sg83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|An83z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sg83z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|An83z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|An83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|An83z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sg83z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sg83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Sg83z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y16_N38
-dffeas \soc_inst|m0_1|u_logic|An83z4 (
+// Location: FF_X15_Y21_N55
+dffeas \soc_inst|m0_1|u_logic|Sg83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|An83z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Sg83z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -29804,867 +29172,978 @@ dffeas \soc_inst|m0_1|u_logic|An83z4 (
 	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|An83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sg83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|An83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|An83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sg83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sg83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y21_N56
-dffeas \soc_inst|m0_1|u_logic|Dcs2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dcs2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X15_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nrvwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Jbu2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sg83z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sg83z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dcs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .lut_mask = 64'h0000540400000000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y23_N26
-dffeas \soc_inst|m0_1|u_logic|Gt93z4 (
+// Location: FF_X13_Y16_N49
+dffeas \soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gt93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gt93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gt93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y16_N26
-dffeas \soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE (
+// Location: FF_X18_Y17_N53
+dffeas \soc_inst|m0_1|u_logic|Y6o2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rd73z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Y6o2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y6o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y16_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~6 (
+// Location: LABCELL_X18_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Gt93z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Nrvwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Y6o2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  
+// & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Y6o2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Y6o2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gt93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y6o2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .lut_mask = 64'h00000C000000000A;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .lut_mask = 64'h0300020001000000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y23_N2
-dffeas \soc_inst|m0_1|u_logic|Arv2z4 (
+// Location: FF_X18_Y16_N17
+dffeas \soc_inst|m0_1|u_logic|Jl93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Arv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jl93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Arv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jl93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jl93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y19_N31
-dffeas \soc_inst|m0_1|u_logic|Rhu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rhu2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X13_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nrvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|J5o2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Jl93z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J5o2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jl93z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rhu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .lut_mask = 64'h0000000000000D08;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~7 (
+// Location: LABCELL_X12_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J773z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Rhu2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Arv2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhu2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Arv2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|J773z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Arv2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rhu2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J773z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .lut_mask = 64'h1110010000000000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J773z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J773z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|J773z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~8 (
+// Location: FF_X12_Y19_N40
+dffeas \soc_inst|m0_1|u_logic|J773z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J773z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J773z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J773z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J773z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X13_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|An83z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dcs2z4~q )))) # (\soc_inst|m0_1|u_logic|An83z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dcs2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Nrvwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|N8o2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|J773z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|An83z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dcs2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J773z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|N8o2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .lut_mask = 64'hD0DD000000000000;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .lut_mask = 64'h00000000E0200000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3cwx4~1 (
+// Location: LABCELL_X18_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S3cwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zh5wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Zh5wx4~5_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh5wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zh5wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh5wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
-// !\soc_inst|m0_1|u_logic|S3cwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Nrvwx4~combout  = ( !\soc_inst|m0_1|u_logic|Nrvwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nrvwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nrvwx4~3_combout  & !\soc_inst|m0_1|u_logic|Nrvwx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|S3cwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nrvwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nrvwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nrvwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .lut_mask = 64'h44444C4CCC44CC4C;
-defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nrvwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Nrvwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~105 (
+// Location: LABCELL_X30_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~105_sumout  = SUM(( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~114  ))
-// \soc_inst|m0_1|u_logic|Add5~106  = CARRY(( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~114  ))
+// \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nrvwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Nrvwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~114 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~105_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~106 ),
+	.combout(\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~105 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~105 .lut_mask = 64'h0000FF3300005FA0;
-defparam \soc_inst|m0_1|u_logic|Add5~105 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .lut_mask = 64'h00330033CCFFCCFF;
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~9 (
+// Location: LABCELL_X30_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|Yxdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yxdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Vzdwx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .lut_mask = 64'h00550055AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y16_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~2 (
+// Location: MLABCELL_X39_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & \soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & \soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & \soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & \soc_inst|m0_1|u_logic|Shyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~5_combout  = ( !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do1wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .lut_mask = 64'h5D5D0C0C0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~1 (
+// Location: LABCELL_X33_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5uvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|S3cwx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|S3cwx4~1_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|S3cwx4~1_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|S3cwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|S3cwx4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|A5uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F4nvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mjl2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .lut_mask = 64'hFA00AF00AC00CA00;
-defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|A5uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~0 (
+// Location: MLABCELL_X39_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5tvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Do1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Do1wx4~2_combout  & (((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|T5tvx4~combout  = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Do1wx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Do1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .lut_mask = 64'h00000000FD00FD00;
-defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T5tvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5tvx4 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|T5tvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~2 (
+// Location: FF_X39_Y20_N41
+dffeas \soc_inst|m0_1|u_logic|Tna3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tna3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tna3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X39_Y20_N40
+dffeas \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aea3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Glnwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & !\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Glnwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Aea3z4~0_combout  = !\soc_inst|m0_1|u_logic|hwdata_o~5_combout 
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aea3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .lut_mask = 64'h0F0F0F0F0F000F00;
-defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .lut_mask = 64'hAAAAAAAAAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Aea3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pn1wx4~0 (
+// Location: LABCELL_X24_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6tvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Glnwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~105_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|H6tvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lz93z4~q  & ( (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (\soc_inst|m0_1|u_logic|J6i2z4~q  & (!\soc_inst|m0_1|u_logic|Kop2z4~q  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .lut_mask = 64'h0000000000F50000;
-defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .lut_mask = 64'h1000100000000000;
+defparam \soc_inst|m0_1|u_logic|H6tvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rd73z4~feeder (
+// Location: MLABCELL_X39_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5ovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rd73z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|C5ovx4~combout  = (\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|H6tvx4~0_combout )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rd73z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rd73z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rd73z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Rd73z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C5ovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5ovx4 .lut_mask = 64'h0033003300330033;
+defparam \soc_inst|m0_1|u_logic|C5ovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y16_N25
-dffeas \soc_inst|m0_1|u_logic|Rd73z4 (
+// Location: FF_X39_Y20_N34
+dffeas \soc_inst|m0_1|u_logic|Aea3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rd73z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Aea3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rd73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Aea3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rd73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rd73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aea3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aea3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~0 (
+// Location: LABCELL_X33_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Etmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rd73z4~q  & ( \soc_inst|m0_1|u_logic|Oas2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rd73z4~q  & ( !\soc_inst|m0_1|u_logic|Oas2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rd73z4~q  & ( !\soc_inst|m0_1|u_logic|Oas2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Etmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oytvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|F2o2z4~q ))) # (\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|F2o2z4~q ) # (\soc_inst|m0_1|u_logic|Aea3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Oytvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|F2o2z4~q 
+// )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rd73z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oas2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aea3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Etmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .lut_mask = 64'h5000400010000000;
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .lut_mask = 64'h77BB77BB77BF77BF;
+defparam \soc_inst|m0_1|u_logic|Etmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y16_N37
-dffeas \soc_inst|m0_1|u_logic|An83z4~DUPLICATE (
+// Location: FF_X33_Y20_N16
+dffeas \soc_inst|m0_1|u_logic|F2o2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|An83z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Etmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|F2o2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|An83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|An83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F2o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F2o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~2 (
+// Location: LABCELL_X33_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mxtvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjqwx4~2_combout  = ( \soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rhu2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Rhu2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mxtvx4~combout  = ( \soc_inst|m0_1|u_logic|F2o2z4~q  & ( \soc_inst|m0_1|u_logic|Oytvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rhu2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|An83z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .lut_mask = 64'h0501040000000000;
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mxtvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mxtvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Mxtvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~1 (
+// Location: MLABCELL_X28_Y22_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|K7s2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|Gt93z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7s2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Gt93z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Pgnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I793z4~q  & ( \soc_inst|m0_1|u_logic|Ycx2z4~q  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|S4qvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I793z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Ycx2z4~q  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|S4qvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I793z4~q  & ( !\soc_inst|m0_1|u_logic|Ycx2z4~q  & 
+// ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )))) # (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (!\soc_inst|m0_1|u_logic|S4qvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I793z4~q  & ( !\soc_inst|m0_1|u_logic|Ycx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|S4qvx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gt93z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|K7s2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I793z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .lut_mask = 64'h0000000011100100;
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .lut_mask = 64'h00C8FAC800FAFAFA;
+defparam \soc_inst|m0_1|u_logic|Pgnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y18_N13
-dffeas \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE (
+// Location: FF_X28_Y22_N44
+dffeas \soc_inst|m0_1|u_logic|I793z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z8s2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I793z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I793z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I793z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y23_N14
+dffeas \soc_inst|m0_1|u_logic|Yg23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yg23z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yg23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yg23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y23_N19
+dffeas \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y23_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kn9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Yg23z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Yg23z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yg23z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .lut_mask = 64'h4500400000000000;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y21_N53
+dffeas \soc_inst|m0_1|u_logic|Eyr2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Eyr2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eyr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eyr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y24_N44
+dffeas \soc_inst|m0_1|u_logic|Qz43z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qz43z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qz43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y21_N35
+dffeas \soc_inst|m0_1|u_logic|Z863z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Z863z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pjqwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Arv2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q 
-//  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Arv2z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Arv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .lut_mask = 64'h000000C800000008;
-defparam \soc_inst|m0_1|u_logic|Pjqwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjqwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pjqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Pjqwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Pjqwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pjqwx4~2_combout  & !\soc_inst|m0_1|u_logic|Pjqwx4~1_combout )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pjqwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pjqwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pjqwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~3_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjqwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjqwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Pjqwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z863z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z863z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sndwx4~0 (
+// Location: LABCELL_X22_Y24_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sndwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ai9wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Ai9wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Kn9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Qz43z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Z863z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qz43z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z863z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .lut_mask = 64'h03030303CFCFCFCF;
-defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .lut_mask = 64'h00000000000088A0;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Godwx4~1 (
+// Location: MLABCELL_X21_Y23_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kc03z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Godwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Godwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Godwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kc03z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kc03z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Godwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Godwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Godwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kc03z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kc03z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Kc03z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N53
-dffeas \soc_inst|m0_1|u_logic|T9v2z4 (
+// Location: FF_X21_Y23_N38
+dffeas \soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kc03z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T9v2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T9v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T9v2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bdwwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|S2r2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|T9v2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|S2r2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|T9v2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T9v2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S2r2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .lut_mask = 64'h0032000000100000;
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X35_Y22_N32
-dffeas \soc_inst|m0_1|u_logic|T583z4 (
+// Location: FF_X19_Y19_N34
+dffeas \soc_inst|m0_1|u_logic|E913z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T583z4~q ),
+	.q(\soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T583z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T583z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|E913z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E913z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~2 (
+// Location: MLABCELL_X21_Y23_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bdwwx4~2_combout  = ( \soc_inst|m0_1|u_logic|K0u2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|T583z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K0u2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|T583z4~q ) # (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kn9wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T583z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|K0u2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .lut_mask = 64'h0000000022200020;
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .lut_mask = 64'h0000C00000008800;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y23_N53
-dffeas \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE (
+// Location: FF_X21_Y20_N19
+dffeas \soc_inst|m0_1|u_logic|Qwr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Qwr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qwr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qwr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~0 (
+// Location: MLABCELL_X21_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hp9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bdwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kw63z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hp9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qwr2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kw63z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qwr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .lut_mask = 64'h000088000000C000;
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y25_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4~1 (
+// Location: LABCELL_X22_Y23_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bdwwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ka93z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|E1r2z4~q  
-// & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ka93z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|E1r2z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kn9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Hp9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kn9wx4~1_combout  & (\soc_inst|m0_1|u_logic|Eyr2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hp9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kn9wx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Kn9wx4~2_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|E1r2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ka93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kn9wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Eyr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .lut_mask = 64'h0000000010111000;
-defparam \soc_inst|m0_1|u_logic|Bdwwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .lut_mask = 64'hA000000020000000;
+defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bdwwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bdwwx4~combout  = ( !\soc_inst|m0_1|u_logic|Bdwwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bdwwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Bdwwx4~2_combout  & !\soc_inst|m0_1|u_logic|Bdwwx4~0_combout )) ) )
+// Location: FF_X22_Y22_N35
+dffeas \soc_inst|m0_1|u_logic|Imu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Imu2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Imu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Imu2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bdwwx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bdwwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bdwwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bdwwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y23_N53
+dffeas \soc_inst|m0_1|u_logic|Rr83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rr83z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdwwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bdwwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Bdwwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rr83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qmdwx4~0 (
+// Location: LABCELL_X22_Y22_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (\soc_inst|m0_1|u_logic|Bdwwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Bdwwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Lr9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Imu2z4~q  & ( \soc_inst|m0_1|u_logic|Rr83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Imu2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Imu2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr83z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Imu2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rr83z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .lut_mask = 64'h000A000200080000;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y23_N11
-dffeas \soc_inst|m0_1|u_logic|G493z4 (
+// Location: FF_X22_Y21_N32
+dffeas \soc_inst|m0_1|u_logic|Qyc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -30672,86 +30151,128 @@ dffeas \soc_inst|m0_1|u_logic|G493z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G493z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qyc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G493z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G493z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qyc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qyc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X21_Y21_N31
+dffeas \soc_inst|m0_1|u_logic|Asr2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Asr2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Asr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Asr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ipm2z4~feeder (
+// Location: LABCELL_X22_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ipm2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Lr9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Qyc3z4~q  & ( \soc_inst|m0_1|u_logic|Asr2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qyc3z4~q  & ( !\soc_inst|m0_1|u_logic|Asr2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qyc3z4~q  & ( !\soc_inst|m0_1|u_logic|Asr2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qyc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Asr2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ipm2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipm2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ipm2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ipm2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .lut_mask = 64'h0011001000010000;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y22_N58
-dffeas \soc_inst|m0_1|u_logic|Ipm2z4 (
+// Location: FF_X22_Y22_N29
+dffeas \soc_inst|m0_1|u_logic|Cvr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ipm2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ipm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cvr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ipm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cvr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cvr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~1 (
+// Location: FF_X22_Y23_N1
+dffeas \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y22_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Ipm2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|G493z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Lr9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cvr2z4~q  & ( \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cvr2z4~q  & ( !\soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cvr2z4~q  & ( !\soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G493z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ipm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cvr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svqwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .lut_mask = 64'h0000000000000E04;
-defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .lut_mask = 64'h5000100040000000;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y23_N56
-dffeas \soc_inst|m0_1|u_logic|Wqm2z4 (
+// Location: FF_X21_Y21_N43
+dffeas \soc_inst|m0_1|u_logic|Otr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -30759,18 +30280,18 @@ dffeas \soc_inst|m0_1|u_logic|Wqm2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wqm2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Otr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wqm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wqm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Otr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Otr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y19_N44
-dffeas \soc_inst|m0_1|u_logic|R6v2z4 (
+// Location: FF_X25_Y21_N41
+dffeas \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -30778,832 +30299,844 @@ dffeas \soc_inst|m0_1|u_logic|R6v2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R6v2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R6v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~3 (
+// Location: MLABCELL_X25_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svqwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wqm2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|R6v2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Lr9wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Otr2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wqm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R6v2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Otr2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svqwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .lut_mask = 64'h000000000000AC00;
-defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .lut_mask = 64'h000000000000A0C0;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R283z4~feeder (
+// Location: LABCELL_X23_Y22_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lr9wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R283z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Lr9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Lr9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Lr9wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Lr9wx4~1_combout  & !\soc_inst|m0_1|u_logic|Lr9wx4~0_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lr9wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lr9wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lr9wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R283z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R283z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R283z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|R283z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y20_N11
-dffeas \soc_inst|m0_1|u_logic|R283z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|R283z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R283z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R283z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R283z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lr9wx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Lr9wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ixt2z4~feeder (
+// Location: LABCELL_X22_Y23_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F32wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ixt2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|F32wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Lr9wx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|I793z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Szr2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|I793z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I793z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ixt2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixt2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ixt2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ixt2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y20_N17
-dffeas \soc_inst|m0_1|u_logic|Ixt2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ixt2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ixt2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ixt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F32wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F32wx4~0 .lut_mask = 64'hAAAACCCCAAAAFFF0;
+defparam \soc_inst|m0_1|u_logic|F32wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~2 (
+// Location: LABCELL_X24_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lk9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svqwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|R283z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Ixt2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Lk9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~q ) # ((\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pm9wx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Nqy2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R283z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ixt2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svqwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .lut_mask = 64'h000000A000000088;
-defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .lut_mask = 64'h50505050FF50FF50;
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ksm2z4~feeder (
+// Location: LABCELL_X22_Y23_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lk9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ksm2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|P12wx4~combout  & ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|P12wx4~combout  & ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~combout  & ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ksm2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ksm2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ksm2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ksm2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y21_N38
-dffeas \soc_inst|m0_1|u_logic|Ksm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ksm2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ksm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ksm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ksm2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X23_Y19_N52
-dffeas \soc_inst|m0_1|u_logic|It63z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|It63z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .lut_mask = 64'hF050F0500000F050;
+defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~0 (
+// Location: MLABCELL_X15_Y21_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ksm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zz1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ksm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|It63z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svqwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .lut_mask = 64'h2020000030000000;
-defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .lut_mask = 64'hFCCAF0C0CAFCC0F0;
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4 (
+// Location: MLABCELL_X28_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Svqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Svqwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Svqwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Svqwx4~1_combout  & !\soc_inst|m0_1|u_logic|Svqwx4~3_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Xwawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) 
+// ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & (((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Emi2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Svqwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svqwx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Svqwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svqwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svqwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Svqwx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|Svqwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .lut_mask = 64'h08AA08EE080808CC;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tkdwx4~0 (
+// Location: MLABCELL_X28_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tkdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bywwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svqwx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bywwx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Xwawx4~2_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & 
+// ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwawx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .lut_mask = 64'h0000FFFF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .lut_mask = 64'h13130F0313130303;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qmdwx4~1 (
+// Location: MLABCELL_X28_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tkdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tkdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Qmdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Xwawx4~3_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwawx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .lut_mask = 64'hDD5D55F500000000;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6owx4 (
+// Location: MLABCELL_X28_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G6owx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|H6tvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Xwawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwawx4~2_combout  & ( \soc_inst|m0_1|u_logic|Xwawx4~3_combout  & ( ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Xwawx4~2_combout  & ( \soc_inst|m0_1|u_logic|Xwawx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Xwawx4~1_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xwawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xwawx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwawx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6owx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G6owx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|G6owx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .lut_mask = 64'h0000000005AF77FF;
+defparam \soc_inst|m0_1|u_logic|Xwawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yz4wx4 (
+// Location: MLABCELL_X25_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yz4wx4~combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|K3l2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Tuawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K9z2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K9z2z4~q ) # (\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Y29wx4~combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tuawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yz4wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yz4wx4 .lut_mask = 64'h0000000003030303;
-defparam \soc_inst|m0_1|u_logic|Yz4wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .lut_mask = 64'h55550000F5F5F0F0;
+defparam \soc_inst|m0_1|u_logic|Tuawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxuvx4~0 (
+// Location: LABCELL_X24_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tuawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|G0w2z4~q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q 
-//  & \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Tuawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tuawx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .lut_mask = 64'h0000000000100000;
-defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .lut_mask = 64'h8A008A00CF00CF00;
+defparam \soc_inst|m0_1|u_logic|Tuawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1ivx4~0 (
+// Location: LABCELL_X27_Y23_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fskvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ipb3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) 
-// # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ipb3z4~q  & !\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|hwdata_o [4] & ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Ipb3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [4] 
-// & ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ipb3z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Fskvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U593z4~q  & ( \soc_inst|m0_1|u_logic|Hszvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U593z4~q  & ( \soc_inst|m0_1|u_logic|Hszvx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|U593z4~q  & ( !\soc_inst|m0_1|u_logic|Hszvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U593z4~q  & ( !\soc_inst|m0_1|u_logic|Hszvx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
-	.dataf(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U593z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .lut_mask = 64'h55555F0F44444C0C;
-defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .lut_mask = 64'h5151FBFB5100FB00;
+defparam \soc_inst|m0_1|u_logic|Fskvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y16_N29
-dffeas \soc_inst|m0_1|u_logic|Ipb3z4 (
+// Location: FF_X27_Y23_N17
+dffeas \soc_inst|m0_1|u_logic|U593z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Fskvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U593z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ipb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U593z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U593z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fhc3z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Fhc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o [4] & ((\soc_inst|m0_1|u_logic|Fhc3z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o [4] & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Fhc3z4~q  ) )
+// Location: FF_X28_Y22_N43
+dffeas \soc_inst|m0_1|u_logic|I793z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Pgnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I793z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I793z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
-	.datad(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fhc3z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X21_Y22_N13
+dffeas \soc_inst|m0_1|u_logic|Gf63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gf63z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .lut_mask = 64'h00FF00FF0AFA0AFA;
-defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gf63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y16_N52
-dffeas \soc_inst|m0_1|u_logic|Fhc3z4 (
+// Location: FF_X19_Y21_N37
+dffeas \soc_inst|m0_1|u_logic|Eol2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fhc3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Eol2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fhc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fhc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eol2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eol2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dewwx4~0 (
+// Location: LABCELL_X19_Y22_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dewwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fhc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Kop2z4~q  & ((!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ipb3z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fhc3z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Kop2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ipb3z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Bywwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gf63z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Eol2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gf63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Eol2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dewwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bywwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .lut_mask = 64'h000C000CC0CCC0CC;
-defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .lut_mask = 64'h00000000C0008080;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B2uvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|B2uvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|J6i2z4~q ) ) )
+// Location: FF_X21_Y22_N35
+dffeas \soc_inst|m0_1|u_logic|Po73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Po73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po73z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X21_Y22_N20
+dffeas \soc_inst|m0_1|u_logic|Gjt2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gjt2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gjt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gjt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U1uvx4 (
+// Location: MLABCELL_X21_Y22_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U1uvx4~combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Bywwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Gjt2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Po73z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Po73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gjt2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bywwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U1uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U1uvx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|U1uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .lut_mask = 64'h000000000000C808;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y16_N19
-dffeas \soc_inst|m0_1|u_logic|Adt2z4 (
+// Location: FF_X22_Y21_N19
+dffeas \soc_inst|m0_1|u_logic|Qml2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Adt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qml2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Adt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Adt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qml2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qml2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dewwx4~1 (
+// Location: FF_X22_Y21_N11
+dffeas \soc_inst|m0_1|u_logic|Psu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Psu2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Psu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Psu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dewwx4~1_combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Dewwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Adt2z4~q ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Dewwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Bywwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Qml2z4~q  & ( \soc_inst|m0_1|u_logic|Psu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qml2z4~q  & ( !\soc_inst|m0_1|u_logic|Psu2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qml2z4~q  & ( !\soc_inst|m0_1|u_logic|Psu2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dewwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Adt2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qml2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Psu2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dewwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bywwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .lut_mask = 64'h0404040404FF04FF;
-defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .lut_mask = 64'h0030001000200000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Gtmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dewwx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[4]~23_combout )) # (\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dewwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[4]~23_combout ) ) )
+// Location: FF_X22_Y21_N38
+dffeas \soc_inst|m0_1|u_logic|Grl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Grl2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Grl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Grl2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dewwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X21_Y21_N22
+dffeas \soc_inst|m0_1|u_logic|Spl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Spl2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .lut_mask = 64'h003300330F3F0F3F;
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Spl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Spl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~1 (
+// Location: LABCELL_X22_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gtmwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Gtmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & (((!\soc_inst|m0_1|u_logic|G6owx4~combout )) # (\soc_inst|m0_1|u_logic|Taa3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|I7owx4~combout  & (\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Taa3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Bywwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Grl2z4~q  & ( \soc_inst|m0_1|u_logic|Spl2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  
+// & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Grl2z4~q  & ( !\soc_inst|m0_1|u_logic|Spl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Grl2z4~q  & ( !\soc_inst|m0_1|u_logic|Spl2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Taa3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Grl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Spl2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bywwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .lut_mask = 64'hA2F3A2F300000000;
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .lut_mask = 64'h0003000200010000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~2 (
+// Location: LABCELL_X23_Y22_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Gtmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Godwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Qmdwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Bywwx4~combout  = ( !\soc_inst|m0_1|u_logic|Bywwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bywwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bywwx4~2_combout  & !\soc_inst|m0_1|u_logic|Bywwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bywwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bywwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bywwx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bywwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bywwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .lut_mask = 64'h00000000CEDFCEDF;
-defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bywwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Bywwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y17_N28
-dffeas \soc_inst|m0_1|u_logic|Wbk2z4 (
+// Location: FF_X29_Y22_N52
+dffeas \soc_inst|m0_1|u_logic|Wd13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wd13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wbk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wbk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wd13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wd13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2owx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|T2owx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|J6i2z4~q  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y22_N32
+dffeas \soc_inst|m0_1|u_logic|Fn23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fn23z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T2owx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T2owx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|T2owx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fn23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2owx4~1 (
+// Location: LABCELL_X24_Y22_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T2owx4~1_combout  = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & (!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|Lz93z4~q ))) ) 
-// )
+// \soc_inst|m0_1|u_logic|Sj62z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Fn23z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wd13z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wd13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fn23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sj62z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T2owx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T2owx4~1 .lut_mask = 64'h0000000000080008;
-defparam \soc_inst|m0_1|u_logic|T2owx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .lut_mask = 64'h0088000000A00000;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y22_N44
+dffeas \soc_inst|m0_1|u_logic|Ikz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ikz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ikz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ikz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y20_N44
-dffeas \soc_inst|m0_1|u_logic|Gmd3z4 (
+// Location: FF_X29_Y22_N1
+dffeas \soc_inst|m0_1|u_logic|Ch03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ch03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gmd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gmd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ch03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ch03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~37 (
+// Location: LABCELL_X23_Y22_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ufx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~42  ))
-// \soc_inst|m0_1|u_logic|Add3~38  = CARRY(( !\soc_inst|m0_1|u_logic|Ufx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~42  ))
+// \soc_inst|m0_1|u_logic|Sj62z4~2_combout  = ( \soc_inst|m0_1|u_logic|Ch03z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ikz2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ch03z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Ikz2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ikz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ch03z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~42 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~37_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~38 ),
+	.combout(\soc_inst|m0_1|u_logic|Sj62z4~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~37 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~37 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add3~37 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .lut_mask = 64'h00000000C0800080;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~81 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gmd3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~38  ))
-// \soc_inst|m0_1|u_logic|Add3~82  = CARRY(( !\soc_inst|m0_1|u_logic|Gmd3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~38  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~38 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~81_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~82 ),
-	.shareout());
+// Location: FF_X23_Y22_N55
+dffeas \soc_inst|m0_1|u_logic|Mcz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mcz2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~81 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~81 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add3~81 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mcz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mcz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~77 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Fhx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~82  ))
-// \soc_inst|m0_1|u_logic|Add3~78  = CARRY(( !\soc_inst|m0_1|u_logic|Fhx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~82  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fhx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~82 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~77_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~78 ),
-	.shareout());
+// Location: FF_X27_Y22_N53
+dffeas \soc_inst|m0_1|u_logic|X553z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X553z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~77 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~77 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~77 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X553z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X553z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y18_N23
-dffeas \soc_inst|m0_1|u_logic|Kt43z4 (
+// Location: FF_X29_Y22_N29
+dffeas \soc_inst|m0_1|u_logic|Ow33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -31611,43 +31144,43 @@ dffeas \soc_inst|m0_1|u_logic|Kt43z4 (
 	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kt43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ow33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kt43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kt43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ow33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~0 (
+// Location: LABCELL_X27_Y22_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9a2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kt43z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T263z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Sj62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|X553z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ow33z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kt43z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T263z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|X553z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ow33z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9a2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sj62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .lut_mask = 64'h0000000000B80000;
-defparam \soc_inst|m0_1|u_logic|U9a2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .lut_mask = 64'h0000000000C00088;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y21_N23
-dffeas \soc_inst|m0_1|u_logic|Zgr2z4 (
+// Location: FF_X21_Y20_N28
+dffeas \soc_inst|m0_1|u_logic|Cll2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -31655,7368 +31188,7019 @@ dffeas \soc_inst|m0_1|u_logic|Zgr2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zgr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cll2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zgr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zgr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cll2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cll2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rba2z4~0 (
+// Location: MLABCELL_X21_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pl62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rba2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zgr2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Pl62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cll2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zgr2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cll2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rba2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pl62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|Rba2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Pl62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~2 (
+// Location: LABCELL_X23_Y22_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sj62z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9a2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|S703z4~q  & ( \soc_inst|m0_1|u_logic|M413z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|S703z4~q  & ( !\soc_inst|m0_1|u_logic|M413z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S703z4~q  & ( !\soc_inst|m0_1|u_logic|M413z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Sj62z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pl62z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sj62z4~1_combout  & (!\soc_inst|m0_1|u_logic|Sj62z4~2_combout  & 
+// (\soc_inst|m0_1|u_logic|Mcz2z4~q  & !\soc_inst|m0_1|u_logic|Sj62z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pl62z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sj62z4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Sj62z4~2_combout  & !\soc_inst|m0_1|u_logic|Sj62z4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|S703z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M413z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sj62z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sj62z4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mcz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sj62z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pl62z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9a2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sj62z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .lut_mask = 64'h0C00080004000000;
-defparam \soc_inst|m0_1|u_logic|U9a2z4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y18_N25
-dffeas \soc_inst|m0_1|u_logic|Sa23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sa23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sa23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sa23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .lut_mask = 64'h8800080000000000;
+defparam \soc_inst|m0_1|u_logic|Sj62z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~1 (
+// Location: LABCELL_X23_Y22_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yonvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9a2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sa23z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bk33z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Yonvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bywwx4~combout ) # (!\soc_inst|m0_1|u_logic|Sj62z4~3_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|U593z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|U593z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bk33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sa23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U593z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sj62z4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9a2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .lut_mask = 64'h00000000C0A00000;
-defparam \soc_inst|m0_1|u_logic|U9a2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .lut_mask = 64'hAAAACCCCAAAAFFF0;
+defparam \soc_inst|m0_1|u_logic|Yonvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y18_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9a2z4~3 (
+// Location: LABCELL_X22_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9a2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|U9a2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U9a2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Rba2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|U9a2z4~2_combout  & \soc_inst|m0_1|u_logic|Oir2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9a2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U9a2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Rba2z4~0_combout  & !\soc_inst|m0_1|u_logic|U9a2z4~2_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~37_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~110  ))
+// \soc_inst|m0_1|u_logic|Add5~38  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~110  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|U9a2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rba2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U9a2z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oir2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|U9a2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~110 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9a2z4~3_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~38 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .lut_mask = 64'h8080000000800000;
-defparam \soc_inst|m0_1|u_logic|U9a2z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~37 .lut_mask = 64'h0000C03F000000AA;
+defparam \soc_inst|m0_1|u_logic|Add5~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pg1wx4~0 (
+// Location: LABCELL_X22_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~81 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( \soc_inst|m0_1|u_logic|H2wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Wce3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Dkr2z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( \soc_inst|m0_1|u_logic|H2wwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Wce3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Dkr2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( !\soc_inst|m0_1|u_logic|H2wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Wce3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Dkr2z4~q ) 
-// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9a2z4~3_combout  & ( !\soc_inst|m0_1|u_logic|H2wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Wce3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Dkr2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~38  ))
+// \soc_inst|m0_1|u_logic|Add5~82  = CARRY(( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~38  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U9a2z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~38 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~82 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .lut_mask = 64'hACAFACAFACAFACA0;
-defparam \soc_inst|m0_1|u_logic|Pg1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~81 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~81 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y20_N20
-dffeas \soc_inst|m0_1|u_logic|Fzl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fzl2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~41 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~82  ))
+// \soc_inst|m0_1|u_logic|Add5~42  = CARRY(( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|F32wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~82  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~82 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~42 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fzl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~41 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejawx4~0 (
+// Location: LABCELL_X24_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ejawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fzl2z4~q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Fzl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) 
-// ) )
+// \soc_inst|m0_1|u_logic|Zz1wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|P12wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|P12wx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ejawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .lut_mask = 64'hAA00AA00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .lut_mask = 64'hF5F5000000F50000;
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejawx4~1 (
+// Location: MLABCELL_X28_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmnwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ejawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ejawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ze1wx4~5_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ejawx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ejawx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Ejawx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Pmnwx4~combout  = ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout )) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ejawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .lut_mask = 64'h005500F5007700F7;
-defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pmnwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pmnwx4 .lut_mask = 64'hFDFDFDFD00000000;
+defparam \soc_inst|m0_1|u_logic|Pmnwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~45 (
+// Location: LABCELL_X29_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlnwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~45_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~106  ))
-// \soc_inst|m0_1|u_logic|Add5~46  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~106  ))
+// \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~106 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~45_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~46 ),
+	.combout(\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~45 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~45 .lut_mask = 64'h0000A05F000000CC;
-defparam \soc_inst|m0_1|u_logic|Add5~45 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .lut_mask = 64'h0A0A0A0AFF0AFF0A;
+defparam \soc_inst|m0_1|u_logic|Nlnwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~13 (
+// Location: LABCELL_X33_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6owx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~46  ))
-// \soc_inst|m0_1|u_logic|Add5~14  = CARRY(( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~46  ))
+// \soc_inst|m0_1|u_logic|G6owx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|H6tvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~46 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~13_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~14 ),
+	.combout(\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~13 .lut_mask = 64'h0000FF3300005FA0;
-defparam \soc_inst|m0_1|u_logic|Add5~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G6owx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6owx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|G6owx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cqovx4 (
+// Location: MLABCELL_X34_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I7owx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cqovx4~combout  = ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~77_sumout )) # 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~77_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~77_sumout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~77_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|I7owx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~77_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|I7owx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cqovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cqovx4 .lut_mask = 64'h0303575703FF57FF;
-defparam \soc_inst|m0_1|u_logic|Cqovx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y16_N13
-dffeas \soc_inst|ram_1|saved_word_address[10] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cqovx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [10]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[10] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[10] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I7owx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I7owx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|I7owx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y14_N45
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[10]~10 (
+// Location: LABCELL_X30_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5tvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[10]~10_combout  = ( \soc_inst|m0_1|u_logic|Cqovx4~combout  & ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q ) # (\soc_inst|ram_1|saved_word_address [10]) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Cqovx4~combout  & ( \soc_inst|ram_1|always1~0_combout  & ( (\soc_inst|ram_1|saved_word_address [10] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Cqovx4~combout  & ( !\soc_inst|ram_1|always1~0_combout  & ( 
-// \soc_inst|ram_1|saved_word_address [10] ) ) ) # ( !\soc_inst|m0_1|u_logic|Cqovx4~combout  & ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [10] ) ) )
+// \soc_inst|m0_1|u_logic|M5tvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Kop2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|saved_word_address [10]),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[10]~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .lut_mask = 64'h333333330303F3F3;
-defparam \soc_inst|ram_1|memory.raddr_a[10]~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .lut_mask = 64'h0C000C0000000000;
+defparam \soc_inst|m0_1|u_logic|M5tvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~105 (
+// Location: MLABCELL_X39_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zyovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~105_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~78  ))
-// \soc_inst|m0_1|u_logic|Add3~106  = CARRY(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~78  ))
+// \soc_inst|m0_1|u_logic|Zyovx4~combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~78 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~105_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~106 ),
+	.combout(\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~105 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~105 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~105 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zyovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zyovx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Zyovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ciawx4~0 (
+// Location: LABCELL_X36_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ztc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ciawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & \soc_inst|m0_1|u_logic|Zcn2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ztc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Ztc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( \soc_inst|m0_1|u_logic|Ztc3z4~q  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ciawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .lut_mask = 64'hF0F0F0F000F000F0;
-defparam \soc_inst|m0_1|u_logic|Ciawx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y22_N41
-dffeas \soc_inst|m0_1|u_logic|Wnv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wnv2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wnv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wnv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .lut_mask = 64'h00FF00FF0CFC0CFC;
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y22_N13
-dffeas \soc_inst|m0_1|u_logic|Kzf3z4 (
+// Location: FF_X36_Y19_N46
+dffeas \soc_inst|m0_1|u_logic|Ztc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kzf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ztc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kzf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~3 (
+// Location: LABCELL_X24_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ts5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Kzf3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wnv2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Kzf3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wnv2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Kzf3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( (\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wnv2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kzf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .lut_mask = 64'h2020100000001000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .lut_mask = 64'h0500050000000000;
+defparam \soc_inst|m0_1|u_logic|Ts5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lqr2z4~feeder (
+// Location: LABCELL_X35_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9ovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lqr2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|D9ovx4~combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|K3l2z4~q  & !\soc_inst|m0_1|u_logic|J6i2z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lqr2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9ovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lqr2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lqr2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Lqr2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9ovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9ovx4 .lut_mask = 64'h0000000044444444;
+defparam \soc_inst|m0_1|u_logic|D9ovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y25_N2
-dffeas \soc_inst|m0_1|u_logic|Lqr2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lqr2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lqr2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yz4wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yz4wx4~combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lqr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lqr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yz4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yz4wx4 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Yz4wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y25_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Neu2z4~feeder (
+// Location: LABCELL_X30_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nxqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Neu2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Nxqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Neu2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Neu2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Neu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Neu2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y25_N26
-dffeas \soc_inst|m0_1|u_logic|Neu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Neu2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Neu2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Neu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Neu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .lut_mask = 64'hFF00FF00FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~4 (
+// Location: LABCELL_X36_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rsqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Neu2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Lqr2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Neu2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Lqr2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Rsqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lqr2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Neu2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .lut_mask = 64'h5100000040000000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .lut_mask = 64'hFFFFF0F00000F0F0;
+defparam \soc_inst|m0_1|u_logic|Rsqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N58
-dffeas \soc_inst|m0_1|u_logic|E163z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E163z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X36_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1rvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H1rvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rsqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nbm2z4~q  ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E163z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E163z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .lut_mask = 64'h3333000000000000;
+defparam \soc_inst|m0_1|u_logic|H1rvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y25_N19
-dffeas \soc_inst|m0_1|u_logic|Cq93z4~DUPLICATE (
+// Location: FF_X36_Y21_N14
+dffeas \soc_inst|m0_1|u_logic|Tdp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cq93z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Tdp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cq93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cq93z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tdp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tdp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~1 (
+// Location: MLABCELL_X34_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~20 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cq93z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|E163z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q 
-//  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cq93z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|E163z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~20_combout  = (!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|R40wx4~combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|E163z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cq93z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .lut_mask = 64'h0000000000450040;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .lut_mask = 64'hF0FFF0FFF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~20 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y22_N56
-dffeas \soc_inst|m0_1|u_logic|Wor2z4 (
+// Location: FF_X34_Y20_N32
+dffeas \soc_inst|m0_1|u_logic|Wia3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wor2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wia3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wor2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wor2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wia3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wia3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~0 (
+// Location: LABCELL_X24_Y24_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X563z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wor2z4~q  & ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wor2z4~q  & ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wor2z4~q  & ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  $ 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|X563z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wor2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X563z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .lut_mask = 64'h8008800000080000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X563z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X563z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|X563z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y22_N20
-dffeas \soc_inst|m0_1|u_logic|O2g3z4 (
+// Location: FF_X24_Y24_N25
+dffeas \soc_inst|m0_1|u_logic|X563z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|X563z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O2g3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X563z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O2g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O2g3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y24_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X94xx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|X94xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O2g3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|O2g3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X94xx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X94xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X94xx4~0 .lut_mask = 64'h0800000000000000;
-defparam \soc_inst|m0_1|u_logic|X94xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X563z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X563z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y22_N53
-dffeas \soc_inst|m0_1|u_logic|Vxf3z4 (
+// Location: FF_X28_Y16_N49
+dffeas \soc_inst|m0_1|u_logic|Okn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vxf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Okn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vxf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vxf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Okn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Okn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N35
-dffeas \soc_inst|m0_1|u_logic|Vr43z4 (
+// Location: FF_X24_Y22_N8
+dffeas \soc_inst|m0_1|u_logic|Wa03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vr43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wa03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vr43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vr43z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Vxf3z4~q  & ( \soc_inst|m0_1|u_logic|Vr43z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vxf3z4~q  & ( !\soc_inst|m0_1|u_logic|Vr43z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vxf3z4~q  & ( !\soc_inst|m0_1|u_logic|Vr43z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vxf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vr43z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .lut_mask = 64'h0408000804000000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|X94xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Hc1wx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Hc1wx4~1_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Hc1wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|X94xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wa03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N41
-dffeas \soc_inst|m0_1|u_logic|Na73z4 (
+// Location: FF_X24_Y22_N20
+dffeas \soc_inst|m0_1|u_logic|Q713z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Na73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Q713z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Na73z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~6 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Hnr2z4~q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Na73z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Na73z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hnr2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .lut_mask = 64'h0000404000005000;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q713z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q713z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y25_N1
-dffeas \soc_inst|m0_1|u_logic|Wj83z4 (
+// Location: FF_X24_Y22_N14
+dffeas \soc_inst|m0_1|u_logic|Fn33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wj83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fn33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wj83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fn33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mi33z4~feeder (
+// Location: MLABCELL_X25_Y24_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wd23z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mi33z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Wd23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mi33z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wd23z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mi33z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mi33z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Mi33z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wd23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wd23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wd23z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y25_N37
-dffeas \soc_inst|m0_1|u_logic|Mi33z4 (
+// Location: FF_X25_Y24_N2
+dffeas \soc_inst|m0_1|u_logic|Wd23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mi33z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wd23z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mi33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wd23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mi33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mi33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wd23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wd23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y25_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~7 (
+// Location: LABCELL_X24_Y22_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Mi33z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wj83z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mi33z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wj83z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mi33z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Sh5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Fn33z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Q713z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Wd23z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Jw93z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wj83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mi33z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q713z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fn33z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wd23z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .lut_mask = 64'h0050000000400040;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .lut_mask = 64'hF0F0FF00AAAACCCC;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y25_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D923z4~feeder (
+// Location: LABCELL_X24_Y24_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ow43z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D923z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Ow43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D923z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ow43z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D923z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D923z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|D923z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ow43z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ow43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ow43z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y25_N10
-dffeas \soc_inst|m0_1|u_logic|D923z4~DUPLICATE (
+// Location: FF_X24_Y24_N2
+dffeas \soc_inst|m0_1|u_logic|Ow43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D923z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ow43z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ow43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D923z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D923z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0g3z4~feeder (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z0g3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~0_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z0g3z4~feeder_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z0g3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z0g3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Z0g3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ow43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y23_N19
-dffeas \soc_inst|m0_1|u_logic|Z0g3z4 (
+// Location: FF_X27_Y16_N11
+dffeas \soc_inst|m0_1|u_logic|Cmn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z0g3z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z0g3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cmn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z0g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z0g3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cmn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cmn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y91xx4~0 (
+// Location: LABCELL_X24_Y22_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y91xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Sh5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cmn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ow43z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Cmn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|M1j2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Ow43z4~q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ow43z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .lut_mask = 64'h3000300000000000;
-defparam \soc_inst|m0_1|u_logic|Y91xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~8 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout  & (!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout  & 
-// (\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Z0g3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout  & 
-// (!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout  & \soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout  & 
-// (!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout  & \soc_inst|m0_1|u_logic|Z0g3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout  & 
-// !\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Hc1wx4~6_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hc1wx4~7_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D923z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Z0g3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .lut_mask = 64'h8888008808080008;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4~8 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X35_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ciawx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ciawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( 
-// \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ciawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ciawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Ciawx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ciawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cmn2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .lut_mask = 64'h030B030B030B0F0F;
-defparam \soc_inst|m0_1|u_logic|Ciawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .lut_mask = 64'hF0CCF0CC00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ya1wx4~1 (
+// Location: LABCELL_X24_Y22_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ya1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Sh5wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// (\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (((\soc_inst|m0_1|u_logic|Sh5wx4~2_combout )))) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Wa03z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q ))))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wa03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~2_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Sh5wx4~1_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ya1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .lut_mask = 64'h303F303F03F303F3;
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .lut_mask = 64'h000A0080AA0AAA80;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ya1wx4~0 (
+// Location: MLABCELL_X28_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sh5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ya1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ya1wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ya1wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sh5wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Q1ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|X563z4~q  & (!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Okn2z4~q )))) # (\soc_inst|m0_1|u_logic|X563z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Okn2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ya1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X563z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Okn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sh5wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .lut_mask = 64'h0000C0EA0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .lut_mask = 64'hF351000000000000;
+defparam \soc_inst|m0_1|u_logic|Sh5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4 (
+// Location: MLABCELL_X34_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[2] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hc1wx4~combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|hwdata_o [2] = ( !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o [2]),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc1wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hc1wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Hc1wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[2] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~1 (
+// Location: MLABCELL_X39_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gha3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B91wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
-// (!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
-// (!\soc_inst|m0_1|u_logic|Ciawx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Gha3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o [2] )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B91wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B91wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B91wx4~1 .lut_mask = 64'h55555DD500000CC0;
-defparam \soc_inst|m0_1|u_logic|B91wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Gha3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~17 (
+// Location: FF_X39_Y20_N53
+dffeas \soc_inst|m0_1|u_logic|Gha3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gha3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gha3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gha3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~94 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~14  ))
-// \soc_inst|m0_1|u_logic|Add5~18  = CARRY(( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~14  ))
+// \soc_inst|m0_1|u_logic|Add0~94_cout  = CARRY(( !\soc_inst|m0_1|u_logic|F2o2z4~q  ) + ( VCC ) + ( !VCC ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~14 ),
+	.cin(gnd),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~17_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~18 ),
+	.sumout(),
+	.cout(\soc_inst|m0_1|u_logic|Add0~94_cout ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~17 .lut_mask = 64'h0000FF3300005FA0;
-defparam \soc_inst|m0_1|u_logic|Add5~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~94 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~94 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~94 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~2 (
+// Location: LABCELL_X33_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~33 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B91wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|B91wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|B91wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|B91wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|C4b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~94_cout  ))
+// \soc_inst|m0_1|u_logic|Add0~34  = CARRY(( !\soc_inst|m0_1|u_logic|C4b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~94_cout  ))
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|B91wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~94_cout ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B91wx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~33_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~34 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B91wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B91wx4~2 .lut_mask = 64'hC0C0C0C00000C0C0;
-defparam \soc_inst|m0_1|u_logic|B91wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~33 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~0 (
+// Location: LABCELL_X33_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfa3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B91wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B91wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qfa3z4~0_combout  = !\soc_inst|m0_1|u_logic|hwdata_o [1]
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B91wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qfa3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B91wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B91wx4~0 .lut_mask = 64'h000000000000F010;
-defparam \soc_inst|m0_1|u_logic|B91wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y25_N14
-dffeas \soc_inst|m0_1|u_logic|Hnr2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hnr2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hnr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hnr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .lut_mask = 64'hF0F0F0F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Qfa3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y25_N20
-dffeas \soc_inst|m0_1|u_logic|Cq93z4 (
+// Location: FF_X33_Y21_N31
+dffeas \soc_inst|m0_1|u_logic|Qfa3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qfa3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cq93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qfa3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cq93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cq93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qfa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qfa3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~1 (
+// Location: LABCELL_X33_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xsmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cq93z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hnr2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Xsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C4b3z4~q  & ( \soc_inst|m0_1|u_logic|Qfa3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Add0~33_sumout ) # ((\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) 
+// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C4b3z4~q  & ( \soc_inst|m0_1|u_logic|Qfa3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Add0~33_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C4b3z4~q  & ( !\soc_inst|m0_1|u_logic|Qfa3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # 
+// (((!\soc_inst|m0_1|u_logic|Add0~33_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C4b3z4~q  & ( !\soc_inst|m0_1|u_logic|Qfa3z4~q  & ( 
+// ((\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Add0~33_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hnr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cq93z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Add0~33_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfa3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .lut_mask = 64'h0000040400000500;
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .lut_mask = 64'h40FFEAFF45FFEFFF;
+defparam \soc_inst|m0_1|u_logic|Xsmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N40
-dffeas \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE (
+// Location: FF_X33_Y21_N37
+dffeas \soc_inst|m0_1|u_logic|C4b3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|C4b3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C4b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C4b3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y25_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~0 (
+// Location: LABCELL_X33_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lqr2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M2b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~34  ))
+// \soc_inst|m0_1|u_logic|Add0~22  = CARRY(( !\soc_inst|m0_1|u_logic|M2b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~34  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lqr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Na73z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~34 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~21_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~22 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .lut_mask = 64'h00A000C000000000;
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~21 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~3 (
+// Location: LABCELL_X33_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qsmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkuwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wor2z4~q  & ( \soc_inst|m0_1|u_logic|Wnv2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wor2z4~q  & ( !\soc_inst|m0_1|u_logic|Wnv2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wor2z4~q  & ( !\soc_inst|m0_1|u_logic|Wnv2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Qsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M2b3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Gha3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|M2b3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Gha3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|M2b3z4~q  & ( !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Add0~21_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M2b3z4~q  & ( !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Add0~21_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wor2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wnv2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gha3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~21_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .lut_mask = 64'h0404000404000000;
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .lut_mask = 64'h7755FFDD5757DFDF;
+defparam \soc_inst|m0_1|u_logic|Qsmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y25_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Zkuwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wj83z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Neu2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Neu2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wj83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y21_N25
+dffeas \soc_inst|m0_1|u_logic|M2b3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Qsmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|M2b3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .lut_mask = 64'h0000000000A000C0;
-defparam \soc_inst|m0_1|u_logic|Zkuwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M2b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M2b3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkuwx4 (
+// Location: LABCELL_X33_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~57 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Zkuwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Zkuwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Zkuwx4~0_combout  & !\soc_inst|m0_1|u_logic|Zkuwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Add0~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|W0b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~22  ))
+// \soc_inst|m0_1|u_logic|Add0~58  = CARRY(( !\soc_inst|m0_1|u_logic|W0b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~22  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zkuwx4~1_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zkuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zkuwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~2_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~22 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~57_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~58 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkuwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkuwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Zkuwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~57 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~57 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5a2z4~0 (
+// Location: LABCELL_X37_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F5a2z4~0_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Z0g3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jsmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W0b3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|Wia3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|W0b3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Wia3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|W0b3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~57_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0b3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~57_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z0g3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wia3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~57_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F5a2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .lut_mask = 64'h0000008000000000;
-defparam \soc_inst|m0_1|u_logic|F5a2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .lut_mask = 64'h7755FFDD5757DFDF;
+defparam \soc_inst|m0_1|u_logic|Jsmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y22_N14
-dffeas \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE (
+// Location: FF_X37_Y17_N49
+dffeas \soc_inst|m0_1|u_logic|W0b3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jsmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|W0b3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W0b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W0b3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~2 (
+// Location: LABCELL_X33_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~41 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I3a2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Vxf3z4~q  & ( \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vxf3z4~q  & ( !\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vxf3z4~q  & ( !\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Add0~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gza3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~58  ))
+// \soc_inst|m0_1|u_logic|Add0~42  = CARRY(( !\soc_inst|m0_1|u_logic|Gza3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~58  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vxf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~58 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3a2z4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~41_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~42 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .lut_mask = 64'h2200200002000000;
-defparam \soc_inst|m0_1|u_logic|I3a2z4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y24_N59
-dffeas \soc_inst|m0_1|u_logic|E163z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E163z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E163z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E163z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add0~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~41 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~0 (
+// Location: LABCELL_X37_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Taa3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I3a2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|E163z4~q  & ( \soc_inst|m0_1|u_logic|Vr43z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|E163z4~q  & ( !\soc_inst|m0_1|u_logic|Vr43z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E163z4~q  & ( !\soc_inst|m0_1|u_logic|Vr43z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Taa3z4~0_combout  = !\soc_inst|m0_1|u_logic|hwdata_o [4]
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|E163z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vr43z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3a2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Taa3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .lut_mask = 64'h0044004000040000;
-defparam \soc_inst|m0_1|u_logic|I3a2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .lut_mask = 64'hF0F0F0F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Taa3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y25_N11
-dffeas \soc_inst|m0_1|u_logic|D923z4 (
+// Location: FF_X37_Y17_N46
+dffeas \soc_inst|m0_1|u_logic|Taa3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D923z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Taa3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D923z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Taa3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D923z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D923z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y25_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|I3a2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Mi33z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|D923z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|D923z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mi33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3a2z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .lut_mask = 64'h000080800000A000;
-defparam \soc_inst|m0_1|u_logic|I3a2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Taa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Taa3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3a2z4~3 (
+// Location: LABCELL_X37_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Csmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I3a2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|I3a2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|I3a2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F5a2z4~0_combout  & (!\soc_inst|m0_1|u_logic|I3a2z4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|O2g3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Csmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gza3z4~q  & ( \soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~41_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gza3z4~q  & ( \soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~41_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gza3z4~q  & ( !\soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~41_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gza3z4~q  & ( !\soc_inst|m0_1|u_logic|Taa3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (!\soc_inst|m0_1|u_logic|Add0~41_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O2g3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F5a2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I3a2z4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I3a2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I3a2z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Add0~41_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Taa3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I3a2z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .lut_mask = 64'hD000000000000000;
-defparam \soc_inst|m0_1|u_logic|I3a2z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .lut_mask = 64'h7555FDDD7577FDFF;
+defparam \soc_inst|m0_1|u_logic|Csmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ra1wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|I3a2z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Dkr2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zkuwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|I3a2z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Dkr2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|I3a2z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Dkr2z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|I3a2z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Dkr2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I3a2z4~3_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X37_Y17_N1
+dffeas \soc_inst|m0_1|u_logic|Gza3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gza3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .lut_mask = 64'hCACACFCFCACACFC0;
-defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gza3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gza3z4 .power_up = "low";
 // synopsys translate_on
-
-// Location: LABCELL_X36_Y15_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~5 (
+
+// Location: LABCELL_X33_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~65 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o~5_combout  = ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Add3~105_sumout  & (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Ra1wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Add3~105_sumout  & (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Add3~105_sumout  & 
-// (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Ra1wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Add3~105_sumout  & (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Ra1wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Add3~105_sumout  & (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Add3~105_sumout  & (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Ra1wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~42  ))
+// \soc_inst|m0_1|u_logic|Add0~66  = CARRY(( !\soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~42  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~105_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~42 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~65_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~66 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o~5 .lut_mask = 64'h111F111F111FFFFF;
-defparam \soc_inst|m0_1|u_logic|haddr_o~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~65 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~65 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y15_N50
-dffeas \soc_inst|ram_1|saved_word_address[11] (
+// Location: FF_X37_Y17_N32
+dffeas \soc_inst|m0_1|u_logic|Qxa3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qxa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qxa3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X37_Y17_N25
+dffeas \soc_inst|m0_1|u_logic|Mka3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [5]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [11]),
+	.q(\soc_inst|m0_1|u_logic|Mka3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[11] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[11] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mka3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mka3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N0
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[11]~11 (
+// Location: LABCELL_X37_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vrmvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[11]~11_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|haddr_o~5_combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [11])) ) ) 
-// # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [11] ) )
+// \soc_inst|m0_1|u_logic|Vrmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qxa3z4~q  & ( \soc_inst|m0_1|u_logic|Mka3z4~q  & ( (!\soc_inst|m0_1|u_logic|Add0~65_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxa3z4~q  & ( \soc_inst|m0_1|u_logic|Mka3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~65_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qxa3z4~q  & ( !\soc_inst|m0_1|u_logic|Mka3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~65_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxa3z4~q  & ( !\soc_inst|m0_1|u_logic|Mka3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~65_sumout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|saved_word_address [11]),
-	.datad(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add0~65_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mka3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[11]~11_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .lut_mask = 64'h0F0F0F0F05AF05AF;
-defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .lut_mask = 64'h2F0FEFCF2F3FEFFF;
+defparam \soc_inst|m0_1|u_logic|Vrmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sx3wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Sx3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Izpvx4~combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Izpvx4~combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X37_Y17_N31
+dffeas \soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vrmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .lut_mask = 64'h0A0A0F0C0A0A000C;
-defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N42
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[28]~14 (
+// Location: MLABCELL_X39_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uic3z4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[28]~14_combout  = ( \soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ) # (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & ( (!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 )) ) )
+// \soc_inst|m0_1|u_logic|Uic3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Uic3z4~q  & ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout ) # (\soc_inst|m0_1|u_logic|hwdata_o [5]) ) ) ) # ( \soc_inst|m0_1|u_logic|Uic3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|J6i2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Uic3z4~q  & ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( (!\soc_inst|m0_1|u_logic|hwdata_o [5] & \soc_inst|m0_1|u_logic|Zyovx4~combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
+	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[28]~14_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[28]~14 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[28]~14 .lut_mask = 64'h000C000C030F030F;
-defparam \soc_inst|ram_1|data_to_memory[28]~14 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .lut_mask = 64'h2222FFFF0000DDDD;
+defparam \soc_inst|m0_1|u_logic|Uic3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y12_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[28]~14_combout ,\soc_inst|ram_1|data_to_memory[12]~13_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X39_Y19_N1
+dffeas \soc_inst|m0_1|u_logic|Uic3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_bit_number = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_bit_number = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020BEFCD2C12053874C25309A727C00000000000000E4EB000000000000000000000000";
+defparam \soc_inst|m0_1|u_logic|Uic3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uic3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[12]~19 (
+// Location: MLABCELL_X28_Y23_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz8wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Zz8wx4~combout  = ( !\soc_inst|m0_1|u_logic|Qzq2z4~q  & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zz8wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz8wx4 .lut_mask = 64'h0000000033330000;
+defparam \soc_inst|m0_1|u_logic|Zz8wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N0
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[12]~13 (
+// Location: MLABCELL_X28_Y23_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyzvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[12]~13_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout  & (!\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|write_cycle~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ))) ) )
+// \soc_inst|m0_1|u_logic|Fyzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
-	.datac(!\soc_inst|ram_1|byte_select [1]),
-	.datad(!\soc_inst|ram_1|write_cycle~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[12]~13_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[12]~13 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[12]~13 .lut_mask = 64'h003F003F00300030;
-defparam \soc_inst|ram_1|data_to_memory[12]~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .lut_mask = 64'hC8C80000C8C8C8C8;
+defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsmwx4~0 (
+// Location: MLABCELL_X25_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wccwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (\soc_inst|interconnect_1|HRDATA[25]~1_combout  & (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & 
-// !\soc_inst|m0_1|u_logic|T2owx4~1_combout )) ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((\soc_inst|interconnect_1|HRDATA[26]~0_combout ) 
-// # (\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28  & ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28  & ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Wccwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Ydcwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Ydcwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Ydcwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Ydcwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lsmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .lut_mask = 64'hF0F0F0F070704040;
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .lut_mask = 64'hFF96ED84CC84CC84;
+defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~1 (
+// Location: LABCELL_X24_Y22_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cawwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Gmm2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Unm2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & \soc_inst|m0_1|u_logic|Wccwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gmm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Unm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cawwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .lut_mask = 64'h00000000000000D8;
-defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .lut_mask = 64'h0000000005050005;
+defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cawwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Skm2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ii63z4~q ))))) ) ) )
+// Location: FF_X22_Y21_N35
+dffeas \soc_inst|m0_1|u_logic|W893z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|W893z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W893z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W893z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Skm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ii63z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cawwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Sgp2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sgp2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .lut_mask = 64'h0000000088A00000;
-defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sgp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sgp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~3 (
+// Location: LABCELL_X22_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cawwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Ejm2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rvu2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qxuwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|W893z4~q  & ( \soc_inst|m0_1|u_logic|Sgp2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W893z4~q  & ( !\soc_inst|m0_1|u_logic|Sgp2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W893z4~q  & ( !\soc_inst|m0_1|u_logic|Sgp2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rvu2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ejm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|W893z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgp2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cawwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .lut_mask = 64'h000000000000E400;
-defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .lut_mask = 64'h0101010000010000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cawwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rr73z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Imt2z4~q )) ) ) )
+// Location: FF_X22_Y21_N44
+dffeas \soc_inst|m0_1|u_logic|F8v2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F8v2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8v2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rr73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Imt2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cawwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X21_Y21_N4
+dffeas \soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .lut_mask = 64'h0000300000002020;
-defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4 (
+// Location: LABCELL_X22_Y21_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cawwx4~combout  = ( !\soc_inst|m0_1|u_logic|Cawwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Cawwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Cawwx4~0_combout  & !\soc_inst|m0_1|u_logic|Cawwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Qxuwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|F8v2z4~q  & ( \soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|F8v2z4~q  & ( !\soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8v2z4~q  & ( !\soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Cawwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cawwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cawwx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cawwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|F8v2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cawwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cawwx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Cawwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .lut_mask = 64'h0044004000040000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duuwx4 (
+// Location: FF_X22_Y22_N49
+dffeas \soc_inst|m0_1|u_logic|Ujp2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ujp2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ujp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ujp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y19_N44
+dffeas \soc_inst|m0_1|u_logic|Wu63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wu63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wu63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wu63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y22_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Duuwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duuwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Duuwx4~0_combout  & !\soc_inst|m0_1|u_logic|Duuwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Qxuwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ujp2z4~q  & ( \soc_inst|m0_1|u_logic|Wu63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ujp2z4~q  & ( !\soc_inst|m0_1|u_logic|Wu63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ujp2z4~q  & ( !\soc_inst|m0_1|u_logic|Wu63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ujp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wu63z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duuwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duuwx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Duuwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .lut_mask = 64'h5000100040000000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jiowx4~0 (
+// Location: FF_X22_Y22_N2
+dffeas \soc_inst|m0_1|u_logic|Wyt2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wyt2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wyt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wyt2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y15_N10
+dffeas \soc_inst|m0_1|u_logic|F483z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F483z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F483z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F483z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y22_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jiowx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duuwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Duuwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Cawwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duuwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cawwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Qxuwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wyt2z4~q  & ( \soc_inst|m0_1|u_logic|F483z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wyt2z4~q  & ( !\soc_inst|m0_1|u_logic|F483z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wyt2z4~q  & ( !\soc_inst|m0_1|u_logic|F483z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wyt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|F483z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .lut_mask = 64'h0F0F0F0F0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .lut_mask = 64'h0050001000400000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmdwx4~0 (
+// Location: LABCELL_X23_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Qxuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Qxuwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qxuwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qxuwx4~1_combout  & !\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qxuwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qxuwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .lut_mask = 64'hFFFF00000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxuwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Qxuwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jiowx4~1 (
+// Location: LABCELL_X23_Y22_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rw7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jiowx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xmdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jiowx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xmdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Jiowx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Svqwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Svqwx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
-	.datad(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .lut_mask = 64'h03030303CFCFCFCF;
-defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xuxwx4 (
+// Location: LABCELL_X24_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rw7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xuxwx4~combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Rw7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rw7wx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Jmdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xuxwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xuxwx4 .lut_mask = 64'h0F0F0F0F0F1F0F1F;
-defparam \soc_inst|m0_1|u_logic|Xuxwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R91xx4~0 (
+// Location: LABCELL_X23_Y22_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R91xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Fkdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bywwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R91xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R91xx4~0 .lut_mask = 64'h0000000010101010;
-defparam \soc_inst|m0_1|u_logic|R91xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .lut_mask = 64'h555555550F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T31xx4~0 (
+// Location: LABCELL_X29_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nodwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T31xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Nodwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Fkdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T31xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T31xx4~0 .lut_mask = 64'h0000000030003000;
-defparam \soc_inst|m0_1|u_logic|T31xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y19_N43
-dffeas \soc_inst|m0_1|u_logic|Wnt2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wnt2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wnt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wnt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~0 (
+// Location: LABCELL_X36_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wnt2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fxu2z4~q  & \soc_inst|m0_1|u_logic|R91xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wnt2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Fxu2z4~q  & 
-// \soc_inst|m0_1|u_logic|R91xx4~0_combout )) # (\soc_inst|m0_1|u_logic|T31xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qfc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Qfc3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( 
+// \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( !\soc_inst|m0_1|u_logic|J6i2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Qfc3z4~q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Qfc3z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fxu2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wnt2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .lut_mask = 64'h0AFF0AFF0A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y19_N20
-dffeas \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X29_Y17_N26
-dffeas \soc_inst|m0_1|u_logic|N8i3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N8i3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N8i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N8i3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .lut_mask = 64'h0F0F0F0FCCCC0F0F;
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y17_N23
-dffeas \soc_inst|m0_1|u_logic|Cai3z4 (
+// Location: FF_X34_Y19_N40
+dffeas \soc_inst|m0_1|u_logic|Qfc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cai3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qfc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cai3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cai3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y21_N37
-dffeas \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE (
+// Location: FF_X36_Y20_N14
+dffeas \soc_inst|m0_1|u_logic|Uaj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Uaj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uaj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uaj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y19_N7
-dffeas \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE (
+// Location: FF_X36_Y21_N50
+dffeas \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~7 (
+// Location: LABCELL_X35_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pguvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~7_combout  = ( \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  
-// & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pguvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .lut_mask = 64'h0030000000020002;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~8 (
+// Location: MLABCELL_X34_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~8_combout  = ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|N8i3z4~q  & (\soc_inst|m0_1|u_logic|Cai3z4~q  & !\soc_inst|m0_1|u_logic|O7zvx4~7_combout )) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|N8i3z4~q  & !\soc_inst|m0_1|u_logic|O7zvx4~7_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cai3z4~q  & !\soc_inst|m0_1|u_logic|O7zvx4~7_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|O7zvx4~7_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Y1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (\soc_inst|m0_1|u_logic|Hub3z4~q  & !\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( \soc_inst|m0_1|u_logic|Hub3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Hub3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( ((\soc_inst|m0_1|u_logic|Hub3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N8i3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cai3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O7zvx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .lut_mask = 64'hFF000F0055000500;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~8 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y25_N59
-dffeas \soc_inst|m0_1|u_logic|E143z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E143z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E143z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E143z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .lut_mask = 64'h44FF40F055555050;
+defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y21_N32
-dffeas \soc_inst|m0_1|u_logic|Rro2z4 (
+// Location: FF_X34_Y20_N50
+dffeas \soc_inst|m0_1|u_logic|Hub3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rro2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hub3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rro2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rro2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hub3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hub3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y25_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~2 (
+// Location: MLABCELL_X34_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rro2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Rro2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|E143z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rro2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|E143z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ihlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( ((\soc_inst|m0_1|u_logic|Qfc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hub3z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Qfc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|E143z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rro2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .lut_mask = 64'h0200020002020000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y20_N2
-dffeas \soc_inst|m0_1|u_logic|Y6i3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y6i3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y6i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y6i3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X25_Y20_N56
-dffeas \soc_inst|m0_1|u_logic|J5i3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J5i3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J5i3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .lut_mask = 64'h000F000F333F333F;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~5 (
+// Location: MLABCELL_X28_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B2uvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~5_combout  = ( \soc_inst|m0_1|u_logic|J5i3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Y6i3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J5i3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Y6i3z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|B2uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y6i3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|J5i3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .lut_mask = 64'h2202200000000000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y19_N26
-dffeas \soc_inst|m0_1|u_logic|Gto2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gto2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gto2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gto2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X31_Y16_N44
-dffeas \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .lut_mask = 64'h00F000F000000000;
+defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Velvx4~0 (
+// Location: LABCELL_X30_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2twx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Velvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Omk2z4~q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Omk2z4~q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|I2twx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B2uvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Velvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Velvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Velvx4~0 .lut_mask = 64'hFFFF0A0A00000A0A;
-defparam \soc_inst|m0_1|u_logic|Velvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I2twx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I2twx4~0 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|I2twx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgawx4~0 (
+// Location: LABCELL_X30_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mgawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Y29wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Ihlwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|I2twx4~0_combout  & ( \soc_inst|interconnect_1|HRDATA[3]~26_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2twx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[3]~26_combout  & ( (!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mgawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .lut_mask = 64'hFFFF00000F0F0000;
-defparam \soc_inst|m0_1|u_logic|Mgawx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y22_N26
-dffeas \soc_inst|m0_1|u_logic|No93z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|No93z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|No93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|No93z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X28_Y18_N44
-dffeas \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .lut_mask = 64'hFAFA0000FA000000;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~3 (
+// Location: LABCELL_X30_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|No93z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ihlwx4~2_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|m0_1|u_logic|Ihlwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|W0b3z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Wia3z4~q ))) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|m0_1|u_logic|Ihlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Wia3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|No93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wia3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~3 .lut_mask = 64'h0000003000000022;
-defparam \soc_inst|m0_1|u_logic|S71wx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y17_N7
-dffeas \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .lut_mask = 64'h00000000FF0F3303;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
 // Location: LABCELL_X29_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R21xx4~0 (
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R21xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Nodwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R21xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R21xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R21xx4~0 .lut_mask = 64'h4000000000000000;
-defparam \soc_inst|m0_1|u_logic|R21xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .lut_mask = 64'h00000000AFBBAFBB;
+defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y18_N37
-dffeas \soc_inst|m0_1|u_logic|Xg33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xg33z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xg33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xg33z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X31_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ykyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X77wx4~combout  & ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # (((!\soc_inst|m0_1|u_logic|C3w2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q )))) ) ) # ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ))) ) )
 
-// Location: FF_X28_Y22_N22
-dffeas \soc_inst|m0_1|u_logic|Hi83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hi83z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hi83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hi83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .lut_mask = 64'hF0F0F0F0F0B0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~0 (
+// Location: LABCELL_X27_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hi83z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Xg33z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hi83z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Xg33z4~q ) # (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Amyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Aok2z4~q )))) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xg33z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hi83z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~0 .lut_mask = 64'h0051000000400000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .lut_mask = 64'h00000000FFE0FFE0;
+defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y19_N2
-dffeas \soc_inst|m0_1|u_logic|X213z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X213z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Amyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|C3w2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|C3w2z4~q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (!\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Amyvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X213z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X213z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .lut_mask = 64'hA080A08080808080;
+defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D603z4~feeder (
+// Location: MLABCELL_X28_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D603z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Amyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Amyvx4~1_combout  & !\soc_inst|m0_1|u_logic|Amyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Amyvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Amyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D603z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D603z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D603z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|D603z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .lut_mask = 64'h000000003F0F3F0F;
+defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y20_N53
-dffeas \soc_inst|m0_1|u_logic|D603z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D603z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D603z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xuxwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xuxwx4~combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D603z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D603z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xuxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xuxwx4 .lut_mask = 64'h3333333333373337;
+defparam \soc_inst|m0_1|u_logic|Xuxwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~2 (
+// Location: LABCELL_X29_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kvtwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|X213z4~q  & ( \soc_inst|m0_1|u_logic|D603z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|X213z4~q  & ( !\soc_inst|m0_1|u_logic|D603z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X213z4~q  & ( !\soc_inst|m0_1|u_logic|D603z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Kvtwx4~combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|X213z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|D603z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~2 .lut_mask = 64'h2200020020000000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kvtwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kvtwx4 .lut_mask = 64'h0555055550005000;
+defparam \soc_inst|m0_1|u_logic|Kvtwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y22_N34
-dffeas \soc_inst|m0_1|u_logic|Hmv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hmv2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mjlwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mjlwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & (\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[26]~0_combout )) ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & 
+// ((\soc_inst|interconnect_1|HRDATA[26]~0_combout ) # (\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mjlwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hmv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .lut_mask = 64'hAAAAAAAA2A2A2020;
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~1 (
+// Location: MLABCELL_X21_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~1_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hmv2z4~q  & ( (!\soc_inst|m0_1|u_logic|B1q2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hmv2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|B1q2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Cawwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Skm2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ii63z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1q2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hmv2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ii63z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Skm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cawwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~1 .lut_mask = 64'h0000203000002000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .lut_mask = 64'h5410000000000000;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y24_N53
-dffeas \soc_inst|m0_1|u_logic|Q2q2z4 (
+// Location: FF_X22_Y21_N8
+dffeas \soc_inst|m0_1|u_logic|Rvu2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q2q2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rvu2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q2q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q2q2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rvu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rvu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ycu2z4~feeder (
+// Location: LABCELL_X22_Y21_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Cawwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rvu2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ejm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ejm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rvu2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cawwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ycu2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ycu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ycu2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .lut_mask = 64'h00000088000000C0;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y24_N17
-dffeas \soc_inst|m0_1|u_logic|Ycu2z4 (
+// Location: FF_X22_Y20_N37
+dffeas \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ycu2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ycu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ycu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ycu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~4 (
+// Location: LABCELL_X22_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~4_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Q2q2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ycu2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Cawwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Unm2z4~q  & ( \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Unm2z4~q  & ( !\soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Unm2z4~q  & ( !\soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q2q2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ycu2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Unm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cawwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~4 .lut_mask = 64'h0000AC0000000000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .lut_mask = 64'h0003000200010000;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~5 (
+// Location: LABCELL_X22_Y22_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|S71wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|S71wx4~3_combout  & (!\soc_inst|m0_1|u_logic|R21xx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|S71wx4~0_combout  & !\soc_inst|m0_1|u_logic|S71wx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Cawwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Imt2z4~q  & ( \soc_inst|m0_1|u_logic|Rr73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Imt2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Imt2z4~q  & ( !\soc_inst|m0_1|u_logic|Rr73z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S71wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R21xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S71wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S71wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S71wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Imt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rr73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cawwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y24_N32
-dffeas \soc_inst|m0_1|u_logic|Y873z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y873z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y873z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y873z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .lut_mask = 64'h0500010004000000;
+defparam \soc_inst|m0_1|u_logic|Cawwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F4q2z4~feeder (
+// Location: LABCELL_X22_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cawwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F4q2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Cawwx4~combout  = ( !\soc_inst|m0_1|u_logic|Cawwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Cawwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Cawwx4~0_combout  & !\soc_inst|m0_1|u_logic|Cawwx4~3_combout ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cawwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cawwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cawwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cawwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F4q2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cawwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4q2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F4q2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|F4q2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y17_N44
-dffeas \soc_inst|m0_1|u_logic|F4q2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|F4q2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F4q2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F4q2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cawwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cawwx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|Cawwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gq43z4~feeder (
+// Location: MLABCELL_X25_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gftwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gq43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|M41wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Gftwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|N3ywx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cawwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|N3ywx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gq43z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gq43z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gq43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Gq43z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y17_N2
-dffeas \soc_inst|m0_1|u_logic|Gq43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gq43z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gq43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gq43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gq43z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X27_Y18_N7
-dffeas \soc_inst|m0_1|u_logic|O723z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O723z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O723z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~6 (
+// Location: MLABCELL_X28_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kw7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Gq43z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Kw7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gftwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Kw7wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gftwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gq43z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O723z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~6 .lut_mask = 64'h2200000020200000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~6 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y21_N44
-dffeas \soc_inst|m0_1|u_logic|Pz53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pz53z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pz53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pz53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .lut_mask = 64'h0000FFFF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~7 (
+// Location: LABCELL_X29_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iutwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pz53z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pz53z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Iutwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kvtwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pz53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~7 .lut_mask = 64'hC002000000020000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .lut_mask = 64'hFC30FC3000000000;
+defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~8 (
+// Location: LABCELL_X29_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mjlwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|S71wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|F4q2z4~q )))) # (\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & (\soc_inst|m0_1|u_logic|Y873z4~q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|F4q2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Iutwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Mjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Kvtwx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Iutwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Kvtwx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y873z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F4q2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|S71wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mjlwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4~8 .lut_mask = 64'hB0BB000000000000;
-defparam \soc_inst|m0_1|u_logic|S71wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .lut_mask = 64'h00FA00FA00C800C8;
+defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgawx4~1 (
+// Location: MLABCELL_X28_Y22_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mgawx4~1_combout  = ( \soc_inst|m0_1|u_logic|S71wx4~5_combout  & ( \soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Mgawx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~5_combout  & ( 
-// \soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Mgawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|S71wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Mgawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Mgawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|U0vvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mgawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U0vvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .lut_mask = 64'h1311131113113333;
-defparam \soc_inst|m0_1|u_logic|Mgawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .lut_mask = 64'hFFF0FF00F0F00000;
+defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J61wx4~1 (
+// Location: LABCELL_X30_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X0ewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J61wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & \soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|X0ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|X0ewx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J61wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J61wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J61wx4~1 .lut_mask = 64'h0505F5F550505F5F;
-defparam \soc_inst|m0_1|u_logic|J61wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .lut_mask = 64'h333333330F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J61wx4~0 (
+// Location: LABCELL_X30_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|C61wx4~0_combout  & ( \soc_inst|m0_1|u_logic|J61wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|C61wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|J61wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Vzdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zndwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Zndwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Vzdwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|J61wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J61wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J61wx4~0 .lut_mask = 64'h000088F80000FFFF;
-defparam \soc_inst|m0_1|u_logic|J61wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .lut_mask = 64'h00AA00AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y17_N5
+dffeas \soc_inst|m0_1|u_logic|Bge3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bge3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bge3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bge3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X16_Y17_N26
+dffeas \soc_inst|m0_1|u_logic|I463z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I463z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I463z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I463z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X16_Y17_N56
+dffeas \soc_inst|m0_1|u_logic|Ql33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ql33z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ql33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O51wx4~0 (
+// Location: LABCELL_X16_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O51wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ql33z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|I463z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ql33z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|I463z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ql33z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) 
+// )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|I463z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ql33z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O51wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O51wx4~0 .lut_mask = 64'h0F000F00F000F000;
-defparam \soc_inst|m0_1|u_logic|O51wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .lut_mask = 64'h0500000004000400;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4 (
+// Location: FF_X16_Y14_N11
+dffeas \soc_inst|m0_1|u_logic|Hc23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hc23z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hc23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S71wx4~combout  = ( \soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( \soc_inst|m0_1|u_logic|S71wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Oas2z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hc23z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hc23z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Oas2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S71wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S71wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S71wx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|S71wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .lut_mask = 64'h00008080A0000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M41wx4~0 (
+// Location: FF_X16_Y17_N31
+dffeas \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D432z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M41wx4~0_combout  = ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O51wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O51wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|D432z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M41wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D432z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M41wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M41wx4~0 .lut_mask = 64'hA8A8FCFC00000000;
-defparam \soc_inst|m0_1|u_logic|M41wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D432z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D432z4~0 .lut_mask = 64'h4000000000000000;
+defparam \soc_inst|m0_1|u_logic|D432z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~2 (
+// Location: FF_X16_Y14_N38
+dffeas \soc_inst|m0_1|u_logic|B613z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B613z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B613z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B613z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H903z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~2_combout  = ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & !\soc_inst|m0_1|u_logic|O7zvx4~combout )) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|O7zvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|O7zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|O7zvx4~combout ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|H903z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H903z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .lut_mask = 64'h3303310132023000;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H903z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H903z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|H903z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0uvx4 (
+// Location: FF_X17_Y17_N26
+dffeas \soc_inst|m0_1|u_logic|H903z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|H903z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H903z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H903z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H903z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z0uvx4~combout  = ( \soc_inst|m0_1|u_logic|N1uvx4~combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|B613z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H903z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B613z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H903z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z0uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z0uvx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Z0uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .lut_mask = 64'h0000000088C00000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y18_N49
-dffeas \soc_inst|m0_1|u_logic|Lhd3z4 (
+// Location: FF_X15_Y19_N56
+dffeas \soc_inst|m0_1|u_logic|Zu43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zu43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lhd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zu43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qwowx4 (
+// Location: FF_X18_Y16_N47
+dffeas \soc_inst|m0_1|u_logic|K7s2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K7s2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K7s2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K7s2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qwowx4~combout  = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Zu43z4~q )) # (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|K7s2z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zu43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K7s2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qwowx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qwowx4 .lut_mask = 64'h00000000000C000C;
-defparam \soc_inst|m0_1|u_logic|Qwowx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .lut_mask = 64'h0000000000AC0000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K7pwx4 (
+// Location: MLABCELL_X15_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K7pwx4~combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Kop2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rkd3z4~q  & ( (!\soc_inst|m0_1|u_logic|Z8s2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rkd3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|T1d3z4~q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Z8s2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z8s2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K7pwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K7pwx4 .lut_mask = 64'h0000000001000100;
-defparam \soc_inst|m0_1|u_logic|K7pwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .lut_mask = 64'hC200000002000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L0uvx4 (
+// Location: LABCELL_X16_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L0uvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|K7pwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Zh5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Zh5wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|D432z4~0_combout  & !\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zh5wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zh5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D432z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zh5wx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L0uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L0uvx4 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|L0uvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y18_N46
-dffeas \soc_inst|m0_1|u_logic|Q6l2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q6l2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q6l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0uvx4 (
+// Location: LABCELL_X16_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E0uvx4~combout  = ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|J6i2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E0uvx4 .lut_mask = 64'h0000000004000400;
-defparam \soc_inst|m0_1|u_logic|E0uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .lut_mask = 64'h00000F0F00000F0F;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K3uvx4~0 (
+// Location: LABCELL_X37_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wq5wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K3uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Kop2z4~q  & !\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Wq5wx4~combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .lut_mask = 64'h0000000004000400;
-defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wq5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wq5wx4 .lut_mask = 64'h0000000000005555;
+defparam \soc_inst|m0_1|u_logic|Wq5wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W2uvx4 (
+// Location: MLABCELL_X34_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[10]~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W2uvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
 	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W2uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W2uvx4 .lut_mask = 64'h00000F0F00000F0F;
-defparam \soc_inst|m0_1|u_logic|W2uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .lut_mask = 64'h33330F0F33330F0F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y17_N29
-dffeas \soc_inst|m0_1|u_logic|Aqp2z4 (
+// Location: FF_X34_Y20_N13
+dffeas \soc_inst|m0_1|u_logic|C9a3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|C9a3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aqp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aqp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C9a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C9a3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qztvx4 (
+// Location: LABCELL_X33_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qztvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|E0uvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Add0~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Aze3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~78  ))
+// \soc_inst|m0_1|u_logic|Add0~26  = CARRY(( !\soc_inst|m0_1|u_logic|Aze3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~78  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~78 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~25_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qztvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qztvx4 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Qztvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~25 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y20_N44
-dffeas \soc_inst|m0_1|u_logic|Jxs2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jxs2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zva3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~26  ))
+// \soc_inst|m0_1|u_logic|Add0~14  = CARRY(( !\soc_inst|m0_1|u_logic|Zva3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~26  ))
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~26 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~13_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~14 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jxs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jxs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add0~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~13 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add0~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2uvx4~0 (
+// Location: MLABCELL_X34_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mqmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I2uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & (\soc_inst|m0_1|u_logic|K3l2z4~q  & !\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Mqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zva3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Zva3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Zva3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~13_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|C9a3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zva3z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add0~13_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|C9a3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C9a3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Add0~13_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mqmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .lut_mask = 64'h0000000008000800;
-defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .lut_mask = 64'h3011FCDDFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y17_N38
-dffeas \soc_inst|m0_1|u_logic|B1a3z4 (
+// Location: FF_X34_Y21_N55
+dffeas \soc_inst|m0_1|u_logic|Zva3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mqmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B1a3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zva3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B1a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zva3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zva3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~0 (
+// Location: LABCELL_X33_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~49 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Repwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|B1a3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Lz93z4~q )))) # (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lz93z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Lz93z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|She3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~14  ))
+// \soc_inst|m0_1|u_logic|Add0~50  = CARRY(( !\soc_inst|m0_1|u_logic|She3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~14  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|She3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Repwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~49_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~50 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Repwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Repwx4~0 .lut_mask = 64'h0404000000001898;
-defparam \soc_inst|m0_1|u_logic|Repwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~49 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~49 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~1 (
+// Location: LABCELL_X33_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fqmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Repwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Repwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E0uvx4~combout  & ((!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Aqp2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|E0uvx4~combout  & (!\soc_inst|m0_1|u_logic|Jxs2z4~q  & ((!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Aqp2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Fqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|She3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~49_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|Bge3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|She3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~49_sumout  & ( ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Bge3z4~q  & \soc_inst|m0_1|u_logic|Tna3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|She3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~49_sumout  & ( (!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Bge3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|She3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~49_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Bge3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Repwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bge3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|She3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add0~49_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Repwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fqmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Repwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Repwx4~1 .lut_mask = 64'hFCA8FCA800000000;
-defparam \soc_inst|m0_1|u_logic|Repwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .lut_mask = 64'h0FBFFFBF0F1FFF1F;
+defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lns2z4~feeder (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Lns2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~2_combout  )
+// Location: FF_X33_Y15_N43
+dffeas \soc_inst|m0_1|u_logic|She3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fqmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|She3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|She3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|She3z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lns2z4~feeder_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X34_Y20_N46
+dffeas \soc_inst|m0_1|u_logic|Lee3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lee3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lns2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lns2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Lns2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lee3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lee3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vytvx4 (
+// Location: MLABCELL_X34_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lee3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vytvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|Qwowx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Lee3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( \soc_inst|m0_1|u_logic|Lee3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Lee3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vytvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vytvx4 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|Vytvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .lut_mask = 64'h0AFA0AFA00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N28
-dffeas \soc_inst|m0_1|u_logic|Lns2z4 (
+// Location: FF_X34_Y20_N47
+dffeas \soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lns2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lns2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lns2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lns2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Repwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lns2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qwowx4~combout  & (\soc_inst|m0_1|u_logic|Repwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Q6l2z4~q )))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Lns2z4~q  & ( (\soc_inst|m0_1|u_logic|Repwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Q6l2z4~q ))) ) )
+// Location: FF_X36_Y21_N8
+dffeas \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Repwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Repwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X36_Y21_N32
+dffeas \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Repwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Repwx4~2 .lut_mask = 64'h00FC00FC00A800A8;
-defparam \soc_inst|m0_1|u_logic|Repwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ncpwx4~0 (
+// Location: FF_X36_Y21_N38
+dffeas \soc_inst|m0_1|u_logic|Trq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Trq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Trq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9vvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ncpwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Repwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|N1uvx4~combout  & (\soc_inst|m0_1|u_logic|Lhd3z4~q  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Repwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|K9vvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Trq2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Repwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ncpwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .lut_mask = 64'h00FF00FF00030003;
-defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .lut_mask = 64'h0020000000000000;
+defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y14_N12
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[30]~29 (
+// Location: MLABCELL_X34_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uzhvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[30]~29_combout  = ( \soc_inst|ram_1|write_cycle~q  & ( \soc_inst|m0_1|u_logic|hwdata_o~2_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ) # (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) ) ) ) # ( 
-// \soc_inst|ram_1|write_cycle~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o~2_combout  & ( (!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ) ) ) )
+// \soc_inst|m0_1|u_logic|Uzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (\soc_inst|m0_1|u_logic|Ble3z4~q  & !\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( \soc_inst|m0_1|u_logic|Ble3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ble3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( ((\soc_inst|m0_1|u_logic|Ble3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|write_cycle~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[30]~29_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[30]~29 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[30]~29 .lut_mask = 64'h00000C0C00003F3F;
-defparam \soc_inst|ram_1|data_to_memory[30]~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .lut_mask = 64'h7373730055555500;
+defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y13_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[30]~29_combout ,\soc_inst|ram_1|data_to_memory[14]~30_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X34_Y20_N2
+dffeas \soc_inst|m0_1|u_logic|Ble3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Ble3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_bit_number = 14;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_bit_number = 14;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002B820C240F5C8C48B0C8C3618003FFFFFFFFFFFFC3FA14000000000000000000000001";
+defparam \soc_inst|m0_1|u_logic|Ble3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ble3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bq5wx4~0 (
+// Location: MLABCELL_X34_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Wq5wx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Whlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Ble3z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE_q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ble3z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .lut_mask = 64'h0000F0F00F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .lut_mask = 64'h000F000F333F333F;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y13_N27
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[14]~30 (
+// Location: LABCELL_X33_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[14]~30_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (!\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( 
-// !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|write_cycle~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Whlwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bge3z4~q ) # ((\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[11]~24_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[11]~24_combout ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [1]),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bge3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[14]~30_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whlwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[14]~30 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[14]~30 .lut_mask = 64'h05050F0F00000A0A;
-defparam \soc_inst|ram_1|data_to_memory[14]~30 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .lut_mask = 64'h05050505FF05FF05;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N21
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[30]~34 (
+// Location: LABCELL_X33_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~2 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[30]~34_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Whlwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Whlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Whlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|She3z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|She3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Whlwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ),
+	.dataf(!\soc_inst|m0_1|u_logic|Whlwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whlwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[30]~34 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[30]~34 .lut_mask = 64'hF000F000FF0FFF0F;
-defparam \soc_inst|interconnect_1|HRDATA[30]~34 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .lut_mask = 64'hFFC4FFC400000000;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kepwx4~1 (
+// Location: LABCELL_X31_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kepwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jiowx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Jiowx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Whlwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Whlwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|X0ewx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vzdwx4~1_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Whlwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .lut_mask = 64'h0C0C0C0C3F3F3F3F;
-defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .lut_mask = 64'h00000000CEDFCEDF;
+defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmdwx4~1 (
+// Location: LABCELL_X31_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xmdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xmdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Qmdwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|U0vvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Rilwx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Omyvx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U0vvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .lut_mask = 64'h3300330033FF33FF;
-defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .lut_mask = 64'hF3F33333F0F00000;
+defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7ewx4~0 (
+// Location: MLABCELL_X28_Y22_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J7ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (((\soc_inst|m0_1|u_logic|Xmdwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout 
-//  & ((\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Xuxwx4~combout  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Xuxwx4~combout )))) # (\soc_inst|m0_1|u_logic|Kepwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Kepwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  $ (\soc_inst|m0_1|u_logic|Xuxwx4~combout ))))) ) )
+// \soc_inst|m0_1|u_logic|U0vvx4~2_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout  & !\soc_inst|m0_1|u_logic|U0vvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|U0vvx4~0_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|U0vvx4~0_combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|U0vvx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U0vvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U0vvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .lut_mask = 64'h0F0F0F2E0FAA0F8B;
-defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .lut_mask = 64'h808080808080A0A0;
+defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9iwx4~0 (
+// Location: LABCELL_X36_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L8mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A9iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|m0_1|u_logic|J7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout  & !\soc_inst|interconnect_1|HRDATA[30]~34_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|m0_1|u_logic|J7ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ncpwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|J7ewx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & !\soc_inst|interconnect_1|HRDATA[30]~34_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|J7ewx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|L8mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout 
+// )))) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .lut_mask = 64'hC0C0C000CCCCCC00;
-defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .lut_mask = 64'h88F8BBFB00F033F3;
+defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0ewx4~0 (
+// Location: FF_X36_Y21_N7
+dffeas \soc_inst|m0_1|u_logic|Cam2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cam2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cam2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iuuvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C0ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|H2wwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & (\soc_inst|m0_1|u_logic|G0w2z4~q  & 
+// \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .lut_mask = 64'h3333333300FF00FF;
-defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .lut_mask = 64'h0004000000000000;
+defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sndwx4~1 (
+// Location: LABCELL_X35_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K1ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sndwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C0ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Sndwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|C0ewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|K1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|m0_1|u_logic|N7c3z4~q  & ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|m0_1|u_logic|N7c3z4~q  & ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & (((\soc_inst|m0_1|u_logic|N7c3z4~q ) # (\soc_inst|m0_1|u_logic|D9ovx4~combout )))) # (\soc_inst|m0_1|u_logic|Iuuvx4~0_combout 
+//  & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((\soc_inst|m0_1|u_logic|N7c3z4~q ) # (\soc_inst|m0_1|u_logic|D9ovx4~combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .lut_mask = 64'h0EEE0E0E00EE00EE;
+defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tkdwx4~1 (
+// Location: FF_X35_Y17_N2
+dffeas \soc_inst|m0_1|u_logic|N7c3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N7c3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N7c3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tkdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tkdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Godwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tkdwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Godwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Cymwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|N7c3z4~q )) # (\soc_inst|m0_1|u_logic|Uic3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|N7c3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cymwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .lut_mask = 64'h00AA00AA55FF55FF;
-defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .lut_mask = 64'h003300330F3F0F3F;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~4 (
+// Location: LABCELL_X33_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~4_combout  = ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Cymwx4~1_combout  = ( \soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mka3z4~q ) # (\soc_inst|m0_1|u_logic|Cymwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cymwx4~0_combout  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Cymwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mka3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cymwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .lut_mask = 64'h3333333300000000;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y18_N13
-dffeas \soc_inst|m0_1|u_logic|J9d3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J9d3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J9d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J9d3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y18_N20
-dffeas \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .lut_mask = 64'h0055005500F500F5;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7b3z4~0 (
+// Location: LABCELL_X33_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J7b3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  )
+// \soc_inst|m0_1|u_logic|Cymwx4~2_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[5]~28_combout  & ( (\soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cymwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|B7owx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[5]~28_combout  & ( (!\soc_inst|m0_1|u_logic|Cymwx4~1_combout  & !\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[5]~28_combout  & ( (\soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cymwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( 
+// !\soc_inst|interconnect_1|HRDATA[5]~28_combout  & ( !\soc_inst|m0_1|u_logic|Cymwx4~1_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cymwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cymwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y16_N34
-dffeas \soc_inst|m0_1|u_logic|J7b3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J7b3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J7b3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .lut_mask = 64'hCCCC4444C0C04040;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~89 (
+// Location: LABCELL_X24_Y22_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Z8b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~66  ))
-// \soc_inst|m0_1|u_logic|Add0~90  = CARRY(( !\soc_inst|m0_1|u_logic|Z8b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~66  ))
+// \soc_inst|m0_1|u_logic|Fkdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fkdwx4~0_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~66 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~89_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~90 ),
+	.combout(\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~89 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~89 .lut_mask = 64'h000000000000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add0~89 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .lut_mask = 64'h0F0F0F0F55555555;
+defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ormvx4~0 (
+// Location: LABCELL_X30_Y22_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ormvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z8b3z4~q  & ( \soc_inst|m0_1|u_logic|J7b3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~89_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z8b3z4~q  & ( \soc_inst|m0_1|u_logic|J7b3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~89_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Z8b3z4~q  & ( !\soc_inst|m0_1|u_logic|J7b3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~89_sumout )) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z8b3z4~q  & ( !\soc_inst|m0_1|u_logic|J7b3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~89_sumout ))) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Cymwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cymwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cymwx4~2_combout  & (\soc_inst|m0_1|u_logic|Fkdwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cymwx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cymwx4~2_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~89_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J7b3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cymwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .lut_mask = 64'h7333FBBB7737FFBF;
-defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .lut_mask = 64'h5555555500115511;
+defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y16_N14
-dffeas \soc_inst|m0_1|u_logic|Z8b3z4 (
+// Location: FF_X24_Y18_N29
+dffeas \soc_inst|m0_1|u_logic|Nz83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nz83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z8b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z8b3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nz83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nz83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkc3z4~0 (
+// Location: LABCELL_X24_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jkc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Jkc3z4~q  & ((!\soc_inst|m0_1|u_logic|Zyovx4~combout ) # (!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & 
-// ( ((\soc_inst|m0_1|u_logic|Zyovx4~combout  & \soc_inst|m0_1|u_logic|hwdata_o~4_combout )) # (\soc_inst|m0_1|u_logic|Jkc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~5_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Nz83z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Po63z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nz83z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Po63z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jkc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .lut_mask = 64'h333F333F33303330;
-defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .lut_mask = 64'h00000C0000000202;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N10
-dffeas \soc_inst|m0_1|u_logic|Jkc3z4 (
+// Location: FF_X24_Y18_N55
+dffeas \soc_inst|m0_1|u_logic|Yx73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Jkc3z4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jkc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Yx73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jkc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jkc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yx73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N17
-dffeas \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE (
+// Location: FF_X21_Y20_N35
+dffeas \soc_inst|m0_1|u_logic|O5k2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|O5k2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O5k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O5k2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jruvx4~0 (
+// Location: FF_X24_Y18_N20
+dffeas \soc_inst|m0_1|u_logic|Pst2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pst2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pst2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pst2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X30_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|Y1v2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y1v2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1v2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jruvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cam2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Y1v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pst2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Y1v2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Pst2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pst2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y1v2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .lut_mask = 64'h0000004000000000;
-defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .lut_mask = 64'h0000203000002000;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1ivx4~0 (
+// Location: LABCELL_X24_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & 
-// \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~7_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Djzvx4~5_combout  & (\soc_inst|m0_1|u_logic|Yx73z4~q  & (\soc_inst|m0_1|u_logic|O5k2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Djzvx4~6_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Djzvx4~5_combout  & (\soc_inst|m0_1|u_logic|Yx73z4~q  & 
+// !\soc_inst|m0_1|u_logic|Djzvx4~6_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Djzvx4~5_combout  & (\soc_inst|m0_1|u_logic|O5k2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Djzvx4~6_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Djzvx4~5_combout  & !\soc_inst|m0_1|u_logic|Djzvx4~6_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Djzvx4~5_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yx73z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5k2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Djzvx4~6_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .lut_mask = 64'h00FF0FAF00CC0C8C;
-defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .lut_mask = 64'hAA000A0022000200;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N16
-dffeas \soc_inst|m0_1|u_logic|F4c3z4 (
+// Location: FF_X25_Y19_N40
+dffeas \soc_inst|m0_1|u_logic|Gf53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F4c3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gf53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F4c3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F4c3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gf53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~0 (
+// Location: FF_X27_Y21_N23
+dffeas \soc_inst|m0_1|u_logic|Ow23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ow23z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ow23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkpwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Jkc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|F4c3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|Jkc3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ow23z4~q  & ( (\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Gf53z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ow23z4~q  & ( (\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Gf53z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ow23z4~q  ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ow23z4~q  & ( (\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Gf53z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gf53z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ow23z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .lut_mask = 64'h005500550F5F0F5F;
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .lut_mask = 64'h5050FFFF50505050;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y17_N4
-dffeas \soc_inst|m0_1|u_logic|Gcb3z4 (
+// Location: FF_X24_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Nqz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gcb3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nqz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gcb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gcb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nqz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nqz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y16_N29
-dffeas \soc_inst|m0_1|u_logic|Pab3z4 (
+// Location: FF_X24_Y19_N19
+dffeas \soc_inst|m0_1|u_logic|Hn03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hn03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pab3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pab3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hn03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hn03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~1 (
+// Location: FF_X24_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|D7k2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|D7k2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|D7k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D7k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkpwx4~1_combout  = ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wkpwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gcb3z4~q  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Pab3z4~q )))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|E0uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wkpwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Pab3z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~4_combout  = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hn03z4~q  & (\soc_inst|m0_1|u_logic|D7k2z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Nqz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D7k2z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nqz2z4~q 
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hn03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nqz2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nqz2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wkpwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hn03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D7k2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .lut_mask = 64'hAA88AA88A080A080;
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .lut_mask = 64'hF5F5313100F50031;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wkpwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wkpwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J7b3z4~q  & (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z8b3z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|J7b3z4~q  & (((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Z8b3z4~q ))) ) )
+// Location: FF_X25_Y19_N11
+dffeas \soc_inst|m0_1|u_logic|X543z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X543z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X543z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X543z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|J7b3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y19_N26
+dffeas \soc_inst|m0_1|u_logic|V0k2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V0k2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .lut_mask = 64'h00000000F531F531;
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V0k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V0k2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~3 (
+// Location: MLABCELL_X25_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkpwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wkpwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|J9d3z4~q  & (((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|J9d3z4~q  & (!\soc_inst|m0_1|u_logic|N1uvx4~combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|V0k2z4~q  & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|X543z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|V0k2z4~q  & ( ((\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|X543z4~q )) # (\soc_inst|m0_1|u_logic|V41xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J9d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X543z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V0k2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .lut_mask = 64'h00000000EEE0EEE0;
-defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .lut_mask = 64'h3F333F330F000F00;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y15_N23
-dffeas \soc_inst|switches_1|switch_store[0][6] (
+// Location: FF_X25_Y20_N29
+dffeas \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[6]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][6]~q ),
+	.q(\soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][6] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][6] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N21
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[6]~36 (
-// Equation(s):
-// \soc_inst|interconnect_1|HRDATA[6]~36_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
-// (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # ((\soc_inst|switches_1|switch_store[0][6]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[0][6]~q )))) ) 
-// )
-
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[0][6]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y20_N29
+dffeas \soc_inst|m0_1|u_logic|Fn13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fn13z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[6]~36 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[6]~36 .lut_mask = 64'hC0C5C0C5CACFCACF;
-defparam \soc_inst|interconnect_1|HRDATA[6]~36 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fn13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9iwx4~0 (
+// Location: MLABCELL_X25_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O9iwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( ((\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & !\soc_inst|m0_1|u_logic|Wkpwx4~3_combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & !\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Fn13z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fn13z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE_q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fn13z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O9iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .lut_mask = 64'h330033003F0F3F0F;
-defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .lut_mask = 64'h0000AAAAFF00FFAA;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9iwx4~1 (
+// Location: FF_X19_Y21_N17
+dffeas \soc_inst|m0_1|u_logic|K2k2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K2k2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K2k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K2k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kepwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O9iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|O9iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Sndwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Tkdwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Kepwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Saqwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O9iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .lut_mask = 64'hFF53FF5300000000;
-defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .lut_mask = 64'h3333333300FF00FF;
+defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ba0wx4~0 (
+// Location: LABCELL_X24_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jiowx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ba0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|Jiowx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Duuwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cawwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Duuwx4~combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ba0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .lut_mask = 64'hC0C0C0C0FFC0FFC0;
-defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .lut_mask = 64'h00550055AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Jiowx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ba0wx4 (
+// Location: LABCELL_X29_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kepwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ba0wx4~combout  = ( \soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ba0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D7iwx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ba0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D7iwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Kepwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jiowx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ba0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ba0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ba0wx4 .lut_mask = 64'h30103010F050F050;
-defparam \soc_inst|m0_1|u_logic|Ba0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Kepwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y26_N53
-dffeas \soc_inst|m0_1|u_logic|Pw03z4 (
+// Location: FF_X25_Y19_N34
+dffeas \soc_inst|m0_1|u_logic|Fio2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pw03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fio2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pw03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fio2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fio2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y23_N59
-dffeas \soc_inst|m0_1|u_logic|Vzz2z4 (
+// Location: FF_X25_Y18_N38
+dffeas \soc_inst|m0_1|u_logic|Jw83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vzz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jw83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vzz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vzz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jw83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~4 (
+// Location: MLABCELL_X25_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Vzz2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Pw03z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Vzz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Pw03z4~q ) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Eruwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Jw83z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Jw83z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fio2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jw83z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fio2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pw03z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vzz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fio2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jw83z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eruwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .lut_mask = 64'h3100000020000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .lut_mask = 64'h0002000200030000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y25_N17
-dffeas \soc_inst|m0_1|u_logic|N3n2z4 (
+// Location: FF_X25_Y18_N50
+dffeas \soc_inst|m0_1|u_logic|Lpt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N3n2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lpt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N3n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lpt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y26_N17
-dffeas \soc_inst|m0_1|u_logic|Cy13z4 (
+// Location: FF_X25_Y20_N44
+dffeas \soc_inst|m0_1|u_logic|Uu73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cy13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uu73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cy13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cy13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uu73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uu73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|N3n2z4~q  & ( \soc_inst|m0_1|u_logic|Cy13z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N3n2z4~q  & ( !\soc_inst|m0_1|u_logic|Cy13z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N3n2z4~q  & ( !\soc_inst|m0_1|u_logic|Cy13z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  $ 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|N3n2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cy13z4~q ),
+// Location: MLABCELL_X25_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eruwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Uu73z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Lpt2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uu73z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Lpt2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lpt2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uu73z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eruwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .lut_mask = 64'h4800080040000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .lut_mask = 64'h0000000050104000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y20_N8
-dffeas \soc_inst|m0_1|u_logic|Y1n2z4 (
+// Location: FF_X25_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|Ll63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y1n2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y1n2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y15_N35
-dffeas \soc_inst|m0_1|u_logic|Gha3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gha3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gha3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ll63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gha3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gha3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ll63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N35
-dffeas \soc_inst|m0_1|u_logic|Bec3z4 (
+// Location: FF_X25_Y20_N35
+dffeas \soc_inst|m0_1|u_logic|Jlo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bec3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jlo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bec3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bec3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jlo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jlo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bec3z4~0 (
+// Location: MLABCELL_X25_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bec3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Bec3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( \soc_inst|m0_1|u_logic|Bec3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Eruwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ll63z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Jlo2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.dataa(!\soc_inst|m0_1|u_logic|Ll63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jlo2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eruwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .lut_mask = 64'h00FF00FF50FA50FA;
-defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .lut_mask = 64'h3000000020200000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N34
-dffeas \soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE (
+// Location: FF_X19_Y21_N26
+dffeas \soc_inst|m0_1|u_logic|Ujo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ujo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ujo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ujo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y21_N14
-dffeas \soc_inst|m0_1|u_logic|Trq2z4 (
+// Location: FF_X25_Y21_N2
+dffeas \soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Trq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Trq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ckuvx4~0 (
+// Location: LABCELL_X19_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ckuvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|G0w2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Eruwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ujo2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ujo2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eruwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .lut_mask = 64'h0000000020000000;
-defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .lut_mask = 64'h000000000000A0C0;
+defparam \soc_inst|m0_1|u_logic|Eruwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F2ivx4~0 (
+// Location: MLABCELL_X25_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eruwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|m0_1|u_logic|Pxb3z4~q  & (\soc_inst|m0_1|u_logic|D9ovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pxb3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( (\soc_inst|m0_1|u_logic|Pxb3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( (\soc_inst|m0_1|u_logic|Pxb3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Eruwx4~combout  = ( !\soc_inst|m0_1|u_logic|Eruwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Eruwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Eruwx4~2_combout  & !\soc_inst|m0_1|u_logic|Eruwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Eruwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eruwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eruwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Eruwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eruwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .lut_mask = 64'h5454545454FC00FC;
-defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eruwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Eruwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y20_N5
-dffeas \soc_inst|m0_1|u_logic|Pxb3z4 (
+// Location: MLABCELL_X25_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Beowx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Beowx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Eruwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Beowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Beowx4~0 .lut_mask = 64'hFF00FF000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Beowx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y22_N59
+dffeas \soc_inst|m0_1|u_logic|Jw73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pxb3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jw73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pxb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pxb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jw73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y14_N13
+dffeas \soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbt2z4~feeder (
+// Location: LABCELL_X24_Y23_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yx83z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mbt2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [2] )
+// \soc_inst|m0_1|u_logic|Yx83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.dataf(!\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mbt2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yx83z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mbt2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mbt2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Mbt2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yx83z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yx83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Yx83z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y15_N2
-dffeas \soc_inst|m0_1|u_logic|Mbt2z4 (
+// Location: FF_X24_Y23_N49
+dffeas \soc_inst|m0_1|u_logic|Yx83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mbt2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Yx83z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mbt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Yx83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mbt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mbt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yx83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yrqwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yrqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mbt2z4~q  & ((!\soc_inst|m0_1|u_logic|Pxb3z4~q ) # (!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pxb3z4~q ) # (!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mbt2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y18_N32
+dffeas \soc_inst|m0_1|u_logic|An63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|An63z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .lut_mask = 64'hC8C8C8C8C800C800;
-defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|An63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~0 (
+// Location: MLABCELL_X25_Y22_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yrqwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Gha3z4~q  & 
-// \soc_inst|m0_1|u_logic|H6tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yrqwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gha3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|H6tvx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yrqwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yrqwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~7_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|An63z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yx83z4~q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|An63z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yx83z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gha3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yx83z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|An63z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .lut_mask = 64'h0F0F0F0F000A030B;
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: IOIBUF_X8_Y0_N35
-cyclonev_io_ibuf \SW[2]~input (
-	.i(SW[2]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[2]~input_o ));
-// synopsys translate_off
-defparam \SW[2]~input .bus_hold = "false";
-defparam \SW[2]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .lut_mask = 64'h0000441000000010;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y15_N53
-dffeas \soc_inst|switches_1|switch_store[0][2] (
+// Location: FF_X19_Y14_N43
+dffeas \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[2]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][2]~q ),
+	.q(\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][2] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][2] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y14_N24
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[2]~7 (
+// Location: MLABCELL_X25_Y22_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~8 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[2]~7_combout  = ( \soc_inst|ram_1|write_cycle~q  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ) # (\soc_inst|ram_1|byte_select [0]) ) ) ) # ( 
-// \soc_inst|ram_1|write_cycle~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ) ) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~8_combout  = ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~7_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~7_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~7_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|byte_select [0]),
+	.dataa(!\soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
-	.datae(!\soc_inst|ram_1|write_cycle~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
+	.datad(!\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[2]~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[2]~7 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[2]~7 .lut_mask = 64'h000000CC000033FF;
-defparam \soc_inst|ram_1|data_to_memory[2]~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .lut_mask = 64'hDD000000DD00DD00;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y11_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[26]~8_combout ,\soc_inst|ram_1|data_to_memory[2]~7_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X25_Y23_N52
+dffeas \soc_inst|m0_1|u_logic|Zu23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_bit_number = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_bit_number = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003820C001A01C000058042004007FFFFFFFFFFFFD70014110404444400000041001110";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ld1xx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+	.q(\soc_inst|m0_1|u_logic|Zu23z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .lut_mask = 64'h0000000030003000;
-defparam \soc_inst|m0_1|u_logic|Ld1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zu23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F7qwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|F7qwx4~combout  = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Xuxwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Xuxwx4~combout ))) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F7qwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y23_N43
+dffeas \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F7qwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F7qwx4 .lut_mask = 64'h030C030C0F000F00;
-defparam \soc_inst|m0_1|u_logic|F7qwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y26_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M7qwx4~0 (
+// Location: MLABCELL_X25_Y22_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M7qwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Qxc2z4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qxc2z4~combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Zu23z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zu23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .lut_mask = 64'h0000000055FF05FF;
-defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .lut_mask = 64'h0000000031200000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S5b3z4~feeder (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|S5b3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [1] )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S5b3z4~feeder_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y22_N47
+dffeas \soc_inst|m0_1|u_logic|Vgq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vgq2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S5b3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S5b3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|S5b3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vgq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y14_N4
-dffeas \soc_inst|m0_1|u_logic|S5b3z4 (
+// Location: FF_X23_Y14_N56
+dffeas \soc_inst|m0_1|u_logic|Hak2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|S5b3z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S5b3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hak2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S5b3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S5b3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hak2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hak2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3uvx4~0 (
+// Location: LABCELL_X24_Y24_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djh3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R3uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oytvx4~combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Djh3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djh3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djh3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djh3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Djh3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ynvvx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ynvvx4~combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (!\soc_inst|m0_1|u_logic|K3l2z4~q  & (\soc_inst|m0_1|u_logic|S5b3z4~q  & ((\soc_inst|m0_1|u_logic|R3uvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|K3l2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|S5b3z4~q  & \soc_inst|m0_1|u_logic|R3uvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wfuwx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (\soc_inst|m0_1|u_logic|S5b3z4~q  & 
-// \soc_inst|m0_1|u_logic|R3uvx4~0_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|S5b3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y24_N8
+dffeas \soc_inst|m0_1|u_logic|Djh3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Djh3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Djh3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ynvvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ynvvx4 .lut_mask = 64'h0033003305370537;
-defparam \soc_inst|m0_1|u_logic|Ynvvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Djh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y16_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C1lvx4~0 (
+// Location: LABCELL_X24_Y23_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skh3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C1lvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lgi3z4~q  & ( \soc_inst|m0_1|u_logic|Rnovx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # 
-// (\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lgi3z4~q  & ( \soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lgi3z4~q  & ( !\soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lgi3z4~q  & ( !\soc_inst|m0_1|u_logic|Rnovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Skh3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C1lvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Skh3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .lut_mask = 64'h00C4CCC400F5FFF5;
-defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Skh3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Skh3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Skh3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y16_N55
-dffeas \soc_inst|m0_1|u_logic|Lgi3z4 (
+// Location: FF_X24_Y23_N25
+dffeas \soc_inst|m0_1|u_logic|Skh3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|C1lvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Skh3z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Skh3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lgi3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lgi3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Skh3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skh3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y21_N14
-dffeas \soc_inst|m0_1|u_logic|Pbl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pbl2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y24_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fm72z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Djh3z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Skh3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Djh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Skh3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fm72z4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pbl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pbl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .lut_mask = 64'h00A0000000880000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y21_N44
-dffeas \soc_inst|m0_1|u_logic|C193z4 (
+// Location: FF_X19_Y14_N44
+dffeas \soc_inst|m0_1|u_logic|Wnh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C193z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wnh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C193z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C193z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wnh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y21_N26
-dffeas \soc_inst|m0_1|u_logic|N3v2z4 (
+// Location: FF_X19_Y14_N14
+dffeas \soc_inst|m0_1|u_logic|Hmh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N3v2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hmh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N3v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hmh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hmh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y18_N43
-dffeas \soc_inst|m0_1|u_logic|Edl2z4 (
+// Location: LABCELL_X19_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Co72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Co72z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Hmh3z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hmh3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Co72z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Co72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Co72z4~0 .lut_mask = 64'h0000400000000000;
+defparam \soc_inst|m0_1|u_logic|Co72z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y23_N44
+dffeas \soc_inst|m0_1|u_logic|Rd53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Edl2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rd53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Edl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Edl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rd53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rd53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4~0 (
+// Location: LABCELL_X24_Y23_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I443z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U7uwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Edl2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|N3v2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|C193z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Edl2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|N3v2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|C193z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Edl2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Pbl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Edl2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Pbl2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|I443z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pbl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C193z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|N3v2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Edl2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U7uwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I443z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .lut_mask = 64'h0505F5F503F303F3;
-defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I443z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I443z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|I443z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y17_N29
-dffeas \soc_inst|m0_1|u_logic|Nz73z4 (
+// Location: FF_X24_Y23_N4
+dffeas \soc_inst|m0_1|u_logic|I443z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|I443z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nz73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I443z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nz73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nz73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I443z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I443z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y17_N44
-dffeas \soc_inst|m0_1|u_logic|Eq63z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eq63z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y23_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fm72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|I443z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rd53z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rd53z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I443z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fm72z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eq63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eq63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .lut_mask = 64'h0000000054100000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y17_N2
-dffeas \soc_inst|m0_1|u_logic|Eut2z4 (
+// Location: FF_X25_Y23_N53
+dffeas \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eut2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eut2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eut2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y18_N49
-dffeas \soc_inst|m0_1|u_logic|Tel2z4 (
+// Location: FF_X25_Y23_N41
+dffeas \soc_inst|m0_1|u_logic|Ql13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tel2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ql13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tel2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tel2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ql13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4~1 (
+// Location: MLABCELL_X25_Y23_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U7uwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tel2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Eq63z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Nz73z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tel2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Eq63z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Nz73z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Tel2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Eut2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tel2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Eut2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Fm72z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Ql13z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nz73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Eq63z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eut2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tel2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ql13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U7uwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fm72z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .lut_mask = 64'h000FF0FF35353535;
-defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .lut_mask = 64'h0C0A000000000000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4 (
+// Location: LABCELL_X19_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U7uwx4~combout  = ( !\soc_inst|m0_1|u_logic|U7uwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U7uwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|U7uwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U7uwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U7uwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|U7uwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Fm72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fm72z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fm72z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fm72z4~2_combout  & (!\soc_inst|m0_1|u_logic|Co72z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wnh3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|U7uwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U7uwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fm72z4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wnh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Co72z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fm72z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fm72z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fm72z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U7uwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U7uwx4 .lut_mask = 64'h0F0F0F00000F0000;
-defparam \soc_inst|m0_1|u_logic|U7uwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N19
-dffeas \soc_inst|m0_1|u_logic|Xhl2z4 (
+// Location: LABCELL_X23_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( \soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Hak2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( \soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) # (\soc_inst|m0_1|u_logic|Hak2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( !\soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Hak2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( !\soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Hak2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fm72z4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .lut_mask = 64'h35303530353F3530;
+defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y16_N13
+dffeas \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xhl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y17_N56
-dffeas \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE (
+// Location: FF_X31_Y16_N38
+dffeas \soc_inst|m0_1|u_logic|Zpx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Zpx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zpx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zpx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M082z4~0 (
+// Location: LABCELL_X27_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vjnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M082z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vjnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Xyk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q 
+//  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M082z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vjnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M082z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M082z4~0 .lut_mask = 64'h0020000000000000;
-defparam \soc_inst|m0_1|u_logic|M082z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .lut_mask = 64'hAAAAAAAA30303030;
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y19_N34
-dffeas \soc_inst|m0_1|u_logic|Uo13z4 (
+// Location: FF_X13_Y17_N13
+dffeas \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uo13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uo13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uo13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y19_N14
-dffeas \soc_inst|m0_1|u_logic|Dy23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dy23z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X19_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~85 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~90  ))
+// \soc_inst|m0_1|u_logic|Add3~86  = CARRY(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~90  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~90 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~85_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~86 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dy23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dy23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~85 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~85 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~1 (
+// Location: LABCELL_X19_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~69 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Py72z4~1_combout  = ( \soc_inst|m0_1|u_logic|Dy23z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Uo13z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dy23z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Uo13z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~86  ))
+// \soc_inst|m0_1|u_logic|Add3~70  = CARRY(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~86  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uo13z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dy23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~86 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Py72z4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~69_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~70 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Py72z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Py72z4~1 .lut_mask = 64'h00B0008000000000;
-defparam \soc_inst|m0_1|u_logic|Py72z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~69 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~69 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N5
-dffeas \soc_inst|m0_1|u_logic|Wo03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wo03z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X19_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~65 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~70  ))
+// \soc_inst|m0_1|u_logic|Add3~66  = CARRY(( !\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~70  ))
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~70 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~65_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~66 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wo03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wo03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~65 .lut_mask = 64'h0000FFFF0000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add3~65 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~2 (
+// Location: LABCELL_X19_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~61 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Py72z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wo03z4~q  & ( \soc_inst|m0_1|u_logic|Csz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wo03z4~q  & ( !\soc_inst|m0_1|u_logic|Csz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wo03z4~q  & ( !\soc_inst|m0_1|u_logic|Csz2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~66  ))
+// \soc_inst|m0_1|u_logic|Add3~62  = CARRY(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~66  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wo03z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Csz2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~66 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Py72z4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~61_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~62 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Py72z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Py72z4~2 .lut_mask = 64'h0808000808000000;
-defparam \soc_inst|m0_1|u_logic|Py72z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~61 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~61 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y25_N17
-dffeas \soc_inst|m0_1|u_logic|Vg53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vg53z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vg53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vg53z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X19_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~57 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~62  ))
+// \soc_inst|m0_1|u_logic|Add3~58  = CARRY(( !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~62  ))
 
-// Location: FF_X29_Y25_N41
-dffeas \soc_inst|m0_1|u_logic|M743z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M743z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~62 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~57_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~58 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M743z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M743z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~57 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~57 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y25_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~0 (
+// Location: LABCELL_X19_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~101 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Py72z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|M743z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Vg53z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~58  ))
+// \soc_inst|m0_1|u_logic|Add3~102  = CARRY(( !\soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~58  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vg53z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M743z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~58 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Py72z4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~101_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~102 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Py72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Py72z4~0 .lut_mask = 64'h0000321000000000;
-defparam \soc_inst|m0_1|u_logic|Py72z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~101 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~101 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~101 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~3 (
+// Location: LABCELL_X19_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~113 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Py72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Py72z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Py72z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M082z4~0_combout  & (!\soc_inst|m0_1|u_logic|Py72z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xhl2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~102  ))
+// \soc_inst|m0_1|u_logic|Add3~114  = CARRY(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~102  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xhl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M082z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Py72z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Py72z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Py72z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~102 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Py72z4~3_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~113_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~114 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Py72z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Py72z4~3 .lut_mask = 64'hB000000000000000;
-defparam \soc_inst|m0_1|u_logic|Py72z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~113 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~113 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~113 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4 (
+// Location: LABCELL_X19_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~109 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oa3wx4~combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oa3wx4~1_combout  & (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oa3wx4~1_combout  & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Add3~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~114  ))
+// \soc_inst|m0_1|u_logic|Add3~110  = CARRY(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~114  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~114 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~109_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~110 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oa3wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oa3wx4 .lut_mask = 64'h1313131313331333;
-defparam \soc_inst|m0_1|u_logic|Oa3wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~109 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~109 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~109 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7cwx4~0 (
+// Location: LABCELL_X23_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1pvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T7cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  $ 
-// (!\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & (!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Y1pvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~109_sumout  & ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~109_sumout  & ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~109_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~109_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~109_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .lut_mask = 64'hF0006000F0F06060;
-defparam \soc_inst|m0_1|u_logic|T7cwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y1pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y1pvx4 .lut_mask = 64'hFF0FAA0ACC0C8808;
+defparam \soc_inst|m0_1|u_logic|Y1pvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bf9wx4~0 (
+// Location: MLABCELL_X21_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vjnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bf9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Vjnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z7i2z4~q  & (!\soc_inst|m0_1|u_logic|Vjnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Y1pvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vjnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y1pvx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vjnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .lut_mask = 64'h0000000040400000;
-defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .lut_mask = 64'hC0CCC0CC40444044;
+defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N8
-dffeas \soc_inst|m0_1|u_logic|M4j2z4 (
+// Location: FF_X21_Y20_N38
+dffeas \soc_inst|m0_1|u_logic|Q7j2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M4j2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Q7j2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M4j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M4j2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q7j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q7j2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y23_N29
-dffeas \soc_inst|m0_1|u_logic|Pgf3z4 (
+// Location: FF_X22_Y25_N1
+dffeas \soc_inst|m0_1|u_logic|C183z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|C183z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pgf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pgf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pgf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C183z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C183z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y23_N32
-dffeas \soc_inst|m0_1|u_logic|Eif3z4 (
+// Location: FF_X22_Y19_N26
+dffeas \soc_inst|m0_1|u_logic|Tvt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eif3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tvt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eif3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eif3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tvt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~0 (
+// Location: LABCELL_X22_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bc82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pgf3z4~q  & ( \soc_inst|m0_1|u_logic|Eif3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pgf3z4~q  & ( !\soc_inst|m0_1|u_logic|Eif3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pgf3z4~q  & ( !\soc_inst|m0_1|u_logic|Eif3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mnvwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tvt2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+//  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tvt2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tvt2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pgf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eif3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tvt2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bc82z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .lut_mask = 64'h0050004000100000;
-defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .lut_mask = 64'h0022002000020000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y19_N47
+dffeas \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uuf3z4~feeder (
+// Location: LABCELL_X24_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9j2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uuf3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fa2wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|F9j2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uuf3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F9j2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uuf3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uuf3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Uuf3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F9j2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F9j2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|F9j2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y17_N50
-dffeas \soc_inst|m0_1|u_logic|Uuf3z4 (
+// Location: FF_X24_Y21_N13
+dffeas \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Uuf3z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|F9j2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uuf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uuf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N5
-dffeas \soc_inst|m0_1|u_logic|Tjf3z4 (
+// Location: LABCELL_X22_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mnvwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .lut_mask = 64'h0088008000080000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y21_N56
+dffeas \soc_inst|m0_1|u_logic|Vmj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tjf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vmj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tjf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tjf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vmj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vmj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N11
-dffeas \soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE (
+// Location: FF_X22_Y21_N14
+dffeas \soc_inst|m0_1|u_logic|C5v2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|C5v2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C5v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C5v2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~1 (
+// Location: LABCELL_X22_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bc82z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Tjf3z4~q  & ( \soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tjf3z4~q  & ( !\soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tjf3z4~q  & ( !\soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mnvwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( \soc_inst|m0_1|u_logic|C5v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|C5v2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|C5v2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tjf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vmj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C5v2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bc82z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .lut_mask = 64'h0C00080004000000;
-defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .lut_mask = 64'h0300010002000000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N53
-dffeas \soc_inst|m0_1|u_logic|Qrf3z4 (
+// Location: FF_X25_Y21_N7
+dffeas \soc_inst|m0_1|u_logic|R293z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|R293z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qrf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qrf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R293z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R293z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y23_N38
-dffeas \soc_inst|m0_1|u_logic|Ftf3z4 (
+// Location: FF_X21_Y21_N41
+dffeas \soc_inst|m0_1|u_logic|Zpj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ftf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zpj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ftf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ftf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zpj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zpj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~2 (
+// Location: MLABCELL_X21_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bc82z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qrf3z4~q  & ( \soc_inst|m0_1|u_logic|Ftf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qrf3z4~q  & ( !\soc_inst|m0_1|u_logic|Ftf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qrf3z4~q  & ( !\soc_inst|m0_1|u_logic|Ftf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mnvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|R293z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zpj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qrf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ftf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R293z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zpj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bc82z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .lut_mask = 64'h2020200000200000;
-defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .lut_mask = 64'h00000000000C000A;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y17_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~3 (
+// Location: LABCELL_X22_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bc82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Bc82z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bc82z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uuf3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Mnvwx4~combout  = ( !\soc_inst|m0_1|u_logic|Mnvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mnvwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Mnvwx4~0_combout  & !\soc_inst|m0_1|u_logic|Mnvwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mnvwx4~2_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mnvwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mnvwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mnvwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mnvwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnvwx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Mnvwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y23_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sz23z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sz23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
+
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bc82z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bc82z4~2_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bc82z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sz23z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .lut_mask = 64'hFF55000000000000;
-defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sz23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sz23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Sz23z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y20_N40
-dffeas \soc_inst|m0_1|u_logic|Aff3z4 (
+// Location: FF_X21_Y23_N14
+dffeas \soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Sz23z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aff3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aff3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aff3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y20_N16
-dffeas \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE (
+// Location: LABCELL_X22_Y25_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq13z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jq13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jq13z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jq13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jq13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Jq13z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X22_Y25_N55
+dffeas \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jq13z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~0 (
+// Location: MLABCELL_X21_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icxwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aff3z4~q  & ( \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aff3z4~q  & ( !\soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aff3z4~q  & ( !\soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|P582z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aff3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P582z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .lut_mask = 64'h4040400000400000;
-defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~1 .lut_mask = 64'h3000200000002000;
+defparam \soc_inst|m0_1|u_logic|P582z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N13
-dffeas \soc_inst|m0_1|u_logic|Orj2z4 (
+// Location: FF_X21_Y21_N14
+dffeas \soc_inst|m0_1|u_logic|Joi3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Orj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Joi3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Orj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Orj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Joi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Joi3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y20_N34
-dffeas \soc_inst|m0_1|u_logic|Wbf3z4 (
+// Location: FF_X21_Y23_N56
+dffeas \soc_inst|m0_1|u_logic|Fli3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wbf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fli3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wbf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wbf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fli3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fli3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~1 (
+// Location: MLABCELL_X21_Y23_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qji3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wbf3z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Orj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wbf3z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Orj2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qji3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wbf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icxwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qji3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .lut_mask = 64'h0000000003010200;
-defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qji3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qji3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Qji3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N5
-dffeas \soc_inst|m0_1|u_logic|Bqf3z4 (
+// Location: FF_X21_Y23_N26
+dffeas \soc_inst|m0_1|u_logic|Qji3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qji3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bqf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qji3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bqf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bqf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qji3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qji3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~2 (
+// Location: MLABCELL_X21_Y23_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icxwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Bqf3z4~q  & ( \soc_inst|m0_1|u_logic|Ldf3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bqf3z4~q  & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bqf3z4~q  & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|P582z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Qji3z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fli3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bqf3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ldf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fli3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qji3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icxwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P582z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .lut_mask = 64'h0500010004000000;
-defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y20_N59
-dffeas \soc_inst|m0_1|u_logic|Mof3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mof3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mof3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mof3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|P582z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~2 .lut_mask = 64'h2200000030000000;
+defparam \soc_inst|m0_1|u_logic|P582z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y21_N10
-dffeas \soc_inst|m0_1|u_logic|Xmf3z4 (
+// Location: FF_X25_Y21_N53
+dffeas \soc_inst|m0_1|u_logic|Ki53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xmf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ki53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xmf3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Icxwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Mof3z4~q  & ( \soc_inst|m0_1|u_logic|Xmf3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mof3z4~q  & ( !\soc_inst|m0_1|u_logic|Xmf3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mof3z4~q  & ( !\soc_inst|m0_1|u_logic|Xmf3z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mof3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xmf3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icxwx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .lut_mask = 64'h0044000400400000;
-defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ki53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ki53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4 (
+// Location: LABCELL_X22_Y25_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B943z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Icxwx4~combout  = ( !\soc_inst|m0_1|u_logic|Icxwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Icxwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Icxwx4~1_combout  & !\soc_inst|m0_1|u_logic|Icxwx4~2_combout )) ) )
+// \soc_inst|m0_1|u_logic|B943z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Icxwx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Icxwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Icxwx4~2_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Icxwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|B943z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Icxwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Icxwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Icxwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B943z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B943z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|B943z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bc82z4~4_combout  = ( \soc_inst|m0_1|u_logic|Bc82z4~3_combout  & ( \soc_inst|m0_1|u_logic|Icxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bc82z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|M4j2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M4j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bc82z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bc82z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bc82z4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y25_N22
+dffeas \soc_inst|m0_1|u_logic|B943z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|B943z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B943z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .lut_mask = 64'h000000000000AF00;
-defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B943z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B943z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntnvx4~0 (
+// Location: MLABCELL_X25_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bc82z4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|B6j2z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bc82z4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|B6j2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|P582z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|B943z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ki53z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|B943z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ki53z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bc82z4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ki53z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B943z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P582z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .lut_mask = 64'hB8BBB8BBB888B888;
-defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~0 .lut_mask = 64'h0000302000001000;
+defparam \soc_inst|m0_1|u_logic|P582z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbmvx4~0 (
+// Location: MLABCELL_X21_Y25_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Umi3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rbmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R3uvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|R3uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & (\soc_inst|m0_1|u_logic|V3o2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|K3l2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Umi3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V3o2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rbmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Umi3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .lut_mask = 64'h00B000B0FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Umi3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Umi3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Umi3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y14_N31
-dffeas \soc_inst|m0_1|u_logic|V3o2z4 (
+// Location: FF_X21_Y25_N25
+dffeas \soc_inst|m0_1|u_logic|Umi3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rbmvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Umi3z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V3o2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Umi3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V3o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V3o2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Umi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Umi3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N28
-dffeas \soc_inst|m0_1|u_logic|Bk23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bk23z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y25_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M782z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M782z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Umi3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Umi3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|M782z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bk23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M782z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M782z4~0 .lut_mask = 64'h0040000000000000;
+defparam \soc_inst|m0_1|u_logic|M782z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y23_N22
-dffeas \soc_inst|m0_1|u_logic|T253z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T253z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P582z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M782z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P582z4~1_combout  & (\soc_inst|m0_1|u_logic|Joi3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|P582z4~2_combout  & !\soc_inst|m0_1|u_logic|P582z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M782z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P582z4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|P582z4~2_combout  & !\soc_inst|m0_1|u_logic|P582z4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|P582z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Joi3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|P582z4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P582z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M782z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P582z4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T253z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T253z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|P582z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P582z4~3 .lut_mask = 64'hA000200000000000;
+defparam \soc_inst|m0_1|u_logic|P582z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~3 (
+// Location: LABCELL_X22_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T253z4~q ) # ((\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Bk23z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Bk23z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( \soc_inst|m0_1|u_logic|P582z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|B6j2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) # (\soc_inst|m0_1|u_logic|Q7j2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( \soc_inst|m0_1|u_logic|P582z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|B6j2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Q7j2z4~q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( !\soc_inst|m0_1|u_logic|P582z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|B6j2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Q7j2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( !\soc_inst|m0_1|u_logic|P582z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|B6j2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Q7j2z4~q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bk23z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T253z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P582z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .lut_mask = 64'h50505050FF50FF50;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .lut_mask = 64'h04F404F404F407F7;
+defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jc1xx4~0 (
+// Location: LABCELL_X23_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9cwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Q9cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|Gtnvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Rih2z4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) # (\soc_inst|m0_1|u_logic|Rih2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q9cwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .lut_mask = 64'h0A000A0000000000;
-defparam \soc_inst|m0_1|u_logic|Jc1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .lut_mask = 64'hD8F5CCF000F500F0;
+defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y20_N53
-dffeas \soc_inst|m0_1|u_logic|Sa13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sa13z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yqzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q9cwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q9cwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Q9cwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sa13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sa13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .lut_mask = 64'h0000F03000005010;
+defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y20_N32
-dffeas \soc_inst|m0_1|u_logic|Isi2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Isi2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y21_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rqzvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yqzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Isi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Isi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .lut_mask = 64'h000000000000777F;
+defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~0 (
+// Location: LABCELL_X22_Y25_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C183z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Isi2z4~q  & ( (\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & !\soc_inst|m0_1|u_logic|Sa13z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Isi2z4~q  & ( ((\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Sa13z4~q )) # (\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|C183z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sa13z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Isi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C183z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .lut_mask = 64'h3F333F330F000F00;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C183z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C183z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|C183z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N5
-dffeas \soc_inst|m0_1|u_logic|X2j2z4 (
+// Location: FF_X22_Y25_N2
+dffeas \soc_inst|m0_1|u_logic|C183z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|C183z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X2j2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|C183z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X2j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X2j2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C183z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C183z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N7
-dffeas \soc_inst|m0_1|u_logic|Xti2z4 (
+// Location: FF_X22_Y25_N56
+dffeas \soc_inst|m0_1|u_logic|Jq13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jq13z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xti2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jq13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xti2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xti2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jq13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jq13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N37
-dffeas \soc_inst|m0_1|u_logic|Cc63z4 (
+// Location: FF_X24_Y21_N14
+dffeas \soc_inst|m0_1|u_logic|F9j2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|F9j2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cc63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F9j2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cc63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F9j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F9j2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~5 (
+// Location: LABCELL_X22_Y25_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Cc63z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|Xti2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cc63z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Xti2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cc63z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jq13z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|F9j2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xti2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cc63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jq13z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|F9j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .lut_mask = 64'h0404000001000100;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y24_N25
-dffeas \soc_inst|m0_1|u_logic|Lpu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lpu2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lpu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lpu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .lut_mask = 64'h0000C000A0000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~6 (
+// Location: MLABCELL_X21_Y23_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Lpu2z4~q  & ( \soc_inst|m0_1|u_logic|Cgt2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lpu2z4~q  & ( !\soc_inst|m0_1|u_logic|Cgt2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lpu2z4~q  & ( !\soc_inst|m0_1|u_logic|Cgt2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qji3z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fli3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lpu2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cgt2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fli3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qji3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .lut_mask = 64'h1100100001000000;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .lut_mask = 64'h080800000C000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y20_N4
-dffeas \soc_inst|m0_1|u_logic|Ll73z4 (
+// Location: FF_X22_Y25_N23
+dffeas \soc_inst|m0_1|u_logic|B943z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|B943z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ll73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B943z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ll73z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~7 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Ll73z4~q  & ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nd3wx4~5_combout  & (!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X2j2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll73z4~q  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nd3wx4~5_combout  & 
-// (!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X2j2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll73z4~q  & ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Nd3wx4~5_combout  & (!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X2j2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|X2j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nd3wx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ll73z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .lut_mask = 64'hC040C0400000C040;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B943z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B943z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y22_N32
-dffeas \soc_inst|m0_1|u_logic|Glj2z4 (
+// Location: FF_X21_Y21_N40
+dffeas \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Glj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Glj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U71xx4~0 (
+// Location: LABCELL_X22_Y25_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U71xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~2_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B943z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B943z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U71xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U71xx4~0 .lut_mask = 64'h0000000044004400;
-defparam \soc_inst|m0_1|u_logic|U71xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .lut_mask = 64'h0000000008080C00;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ta1xx4~0 (
+// Location: MLABCELL_X21_Y23_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~4_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vmj2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Q7j2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vmj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Ta1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .lut_mask = 64'hC00000000000A000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y17_N37
-dffeas \soc_inst|m0_1|u_logic|V1l2z4 (
+// Location: FF_X21_Y23_N13
+dffeas \soc_inst|m0_1|u_logic|Sz23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Sz23z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V1l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sz23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V1l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V1l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sz23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sz23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phh2z4~0 (
+// Location: LABCELL_X22_Y25_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Phh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ki53z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Sz23z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ki53z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sz23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .lut_mask = 64'hAFAFAFAFFFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|Phh2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .lut_mask = 64'h0030000000220000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eb72z4~0 (
+// Location: LABCELL_X22_Y25_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eb72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|X2j2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Eacwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Eacwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Eacwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Eacwx4~5_combout  & 
+// !\soc_inst|m0_1|u_logic|Eacwx4~2_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|X2j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Eacwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eacwx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eacwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Eacwx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eb72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .lut_mask = 64'h0040000000000000;
-defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .lut_mask = 64'hC000000000000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N44
-dffeas \soc_inst|m0_1|u_logic|Pfz2z4 (
+// Location: FF_X21_Y21_N13
+dffeas \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -39024,643 +38208,669 @@ dffeas \soc_inst|m0_1|u_logic|Pfz2z4 (
 	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pfz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pfz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pfz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y25_N49
-dffeas \soc_inst|m0_1|u_logic|Kt33z4 (
+// Location: FF_X25_Y21_N8
+dffeas \soc_inst|m0_1|u_logic|R293z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kt33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|R293z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kt33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kt33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R293z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R293z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~0 (
+// Location: FF_X22_Y19_N46
+dffeas \soc_inst|m0_1|u_logic|Tr63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tr63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tr63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tr63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y22_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H972z4~0_combout  = ( !\soc_inst|m0_1|u_logic|T253z4~q  & ( \soc_inst|m0_1|u_logic|Kt33z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T253z4~q  & ( !\soc_inst|m0_1|u_logic|Kt33z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T253z4~q  & ( !\soc_inst|m0_1|u_logic|Kt33z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~7_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Tr63z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R293z4~q  & ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T253z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kt33z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R293z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tr63z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~7_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .lut_mask = 64'h000000000000C022;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y25_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eacwx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Eacwx4~7_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Umi3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eacwx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Umi3z4~q ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Umi3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Eacwx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H972z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H972z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H972z4~0 .lut_mask = 64'h0500040001000000;
-defparam \soc_inst|m0_1|u_logic|H972z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .lut_mask = 64'hF3F3000000F30000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yd03z4~feeder (
+// Location: MLABCELL_X21_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T31xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yd03z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J3qvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|T31xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yd03z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yd03z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yd03z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Yd03z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y17_N17
-dffeas \soc_inst|m0_1|u_logic|Yd03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yd03z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yd03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yd03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yd03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T31xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T31xx4~0 .lut_mask = 64'h000000F000000000;
+defparam \soc_inst|m0_1|u_logic|T31xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N19
-dffeas \soc_inst|m0_1|u_logic|Ehz2z4 (
+// Location: FF_X22_Y19_N25
+dffeas \soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ehz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ehz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~2 (
+// Location: LABCELL_X22_Y23_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R91xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H972z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Ehz2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yd03z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Ehz2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Yd03z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|R91xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yd03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H972z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H972z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H972z4~2 .lut_mask = 64'h4500000040000000;
-defparam \soc_inst|m0_1|u_logic|H972z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R91xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R91xx4~0 .lut_mask = 64'h0000000000000A0A;
+defparam \soc_inst|m0_1|u_logic|R91xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~1 (
+// Location: LABCELL_X22_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H972z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Bk23z4~q  & ( \soc_inst|m0_1|u_logic|Sa13z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bk23z4~q  & ( !\soc_inst|m0_1|u_logic|Sa13z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bk23z4~q  & ( !\soc_inst|m0_1|u_logic|Sa13z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~0_combout  = ( \soc_inst|m0_1|u_logic|R91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C5v2z4~q ) # ((\soc_inst|m0_1|u_logic|T31xx4~0_combout  & !\soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|R91xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T31xx4~0_combout  & !\soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bk23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sa13z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|C5v2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H972z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H972z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H972z4~1 .lut_mask = 64'h3000200010000000;
-defparam \soc_inst|m0_1|u_logic|H972z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .lut_mask = 64'h30303030FF30FF30;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~3 (
+// Location: LABCELL_X22_Y25_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H972z4~3_combout  = ( !\soc_inst|m0_1|u_logic|H972z4~2_combout  & ( !\soc_inst|m0_1|u_logic|H972z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Eb72z4~0_combout  & (!\soc_inst|m0_1|u_logic|H972z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pfz2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Eacwx4~9_combout  = ( \soc_inst|m0_1|u_logic|Eacwx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Eacwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Eacwx4~6_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|C183z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Eb72z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pfz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H972z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H972z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|H972z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C183z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eacwx4~6_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Eacwx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H972z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H972z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H972z4~3 .lut_mask = 64'h8C00000000000000;
-defparam \soc_inst|m0_1|u_logic|H972z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .lut_mask = 64'h00000D0D00000000;
+defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A67wx4~0 (
+// Location: LABCELL_X23_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rih2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A67wx4~0_combout  = ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( \soc_inst|m0_1|u_logic|H972z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) # (\soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( \soc_inst|m0_1|u_logic|H972z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( !\soc_inst|m0_1|u_logic|H972z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( !\soc_inst|m0_1|u_logic|H972z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Rhi2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Rih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Eacwx4~9_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Eacwx4~9_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Eacwx4~9_combout  & ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Eacwx4~9_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rhi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|H972z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A67wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A67wx4~0 .lut_mask = 64'h335033503350335F;
-defparam \soc_inst|m0_1|u_logic|A67wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .lut_mask = 64'hFFFFAAAAF0F0FFFF;
+defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zwcvx4 (
+// Location: LABCELL_X23_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ancvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zwcvx4~combout  = ( !\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Ancvx4~combout  = ( \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ancvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zwcvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zwcvx4 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Zwcvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ancvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ancvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ancvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~2 (
+// Location: LABCELL_X23_Y22_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tkdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ec62z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|J5i3z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y6i3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Tkdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bywwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Svqwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y6i3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|J5i3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ec62z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .lut_mask = 64'h000000008080C000;
-defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y17_N43
-dffeas \soc_inst|m0_1|u_logic|Vr23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vr23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vr23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vr23z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X30_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Godwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Godwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pybwx4~combout  & ( (\soc_inst|m0_1|u_logic|Lr9wx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pybwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Lr9wx4~combout ) ) )
 
-// Location: FF_X30_Y23_N49
-dffeas \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Godwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Godwx4~0 .lut_mask = 64'h00AA00AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|Godwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y17_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~1 (
+// Location: LABCELL_X29_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tkdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ec62z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vr23z4~q  & ( \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vr23z4~q  & ( !\soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vr23z4~q  & ( !\soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Tkdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Godwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Godwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Tkdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vr23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ec62z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .lut_mask = 64'h0088008000080000;
-defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y17_N22
-dffeas \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Tkdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y17_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Be62z4~0 (
+// Location: LABCELL_X30_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sndwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Be62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|N8i3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Sndwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjqwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Pjqwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|N8i3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Be62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Be62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Be62z4~0 .lut_mask = 64'h0040000000000000;
-defparam \soc_inst|m0_1|u_logic|Be62z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y25_N29
-dffeas \soc_inst|m0_1|u_logic|Na53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Na53z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Na53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Sndwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y25_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~0 (
+// Location: LABCELL_X31_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ec62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Na53z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|E143z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|C0ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|H2wwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|H2wwx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Na53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|E143z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ec62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .lut_mask = 64'h00000C0000000808;
-defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .lut_mask = 64'h0F0F0F0F0000FFFF;
+defparam \soc_inst|m0_1|u_logic|C0ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y17_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~3 (
+// Location: LABCELL_X30_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sndwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ec62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Be62z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ec62z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ec62z4~2_combout  & (!\soc_inst|m0_1|u_logic|Ec62z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Sndwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sndwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ec62z4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ec62z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Be62z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ec62z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ec62z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .lut_mask = 64'h80C0000000000000;
-defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Sndwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8zvx4~0 (
+// Location: MLABCELL_X34_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Cqo2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) # (\soc_inst|m0_1|u_logic|Rhi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Cqo2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Rhi2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Cqo2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Rhi2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Cqo2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Rhi2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~4_combout  = ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rhi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ec62z4~3_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .lut_mask = 64'h335033503350335F;
-defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ovcvx4 (
+// Location: LABCELL_X30_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ovcvx4~combout  = ( \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Z0uvx4~combout  = ( \soc_inst|m0_1|u_logic|N1uvx4~combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ovcvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ovcvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ovcvx4 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ovcvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z0uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z0uvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Z0uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dih2z4~0 (
+// Location: FF_X36_Y19_N26
+dffeas \soc_inst|m0_1|u_logic|J9d3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J9d3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J9d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J9d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K7pwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|O7zvx4~combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|O7zvx4~combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|W19wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|O7zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|O7zvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  ) )
+// \soc_inst|m0_1|u_logic|K7pwx4~combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Kop2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K7pwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .lut_mask = 64'hFFFFAAAACCCCFFFF;
-defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K7pwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K7pwx4 .lut_mask = 64'h0000000001000100;
+defparam \soc_inst|m0_1|u_logic|K7pwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~117 (
+// Location: LABCELL_X37_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L0uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~117_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ducvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~86  ))
-// \soc_inst|m0_1|u_logic|Add5~118  = CARRY(( !\soc_inst|m0_1|u_logic|Ducvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~86  ))
+// \soc_inst|m0_1|u_logic|L0uvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|K7pwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ducvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~86 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~117_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~118 ),
+	.combout(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~117 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~117 .lut_mask = 64'h000000D30000FF00;
-defparam \soc_inst|m0_1|u_logic|Add5~117 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L0uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L0uvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|L0uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~9 (
+// Location: FF_X37_Y19_N10
+dffeas \soc_inst|m0_1|u_logic|Xdb3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xdb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xdb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7b3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ovcvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~118  ))
-// \soc_inst|m0_1|u_logic|Add5~10  = CARRY(( !\soc_inst|m0_1|u_logic|Ovcvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~118  ))
+// \soc_inst|m0_1|u_logic|J7b3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ovcvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~118 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~9_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~10 ),
+	.combout(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~9 .lut_mask = 64'h000000D30000FF00;
-defparam \soc_inst|m0_1|u_logic|Add5~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|J7b3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~77 (
+// Location: FF_X37_Y18_N49
+dffeas \soc_inst|m0_1|u_logic|J7b3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J7b3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J7b3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J7b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J7b3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X37_Y18_N56
+dffeas \soc_inst|m0_1|u_logic|Z8b3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z8b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z8b3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~89 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~77_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & \soc_inst|m0_1|u_logic|Ijcwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout )))) ) + ( \soc_inst|m0_1|u_logic|Zwcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~10  ))
-// \soc_inst|m0_1|u_logic|Add5~78  = CARRY(( (!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & \soc_inst|m0_1|u_logic|Ijcwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout )))) ) + ( \soc_inst|m0_1|u_logic|Zwcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~10  ))
+// \soc_inst|m0_1|u_logic|Add0~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Z8b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~66  ))
+// \soc_inst|m0_1|u_logic|Add0~90  = CARRY(( !\soc_inst|m0_1|u_logic|Z8b3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~66  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~10 ),
+	.cin(\soc_inst|m0_1|u_logic|Add0~66 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~77_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~78 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~89_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~90 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~77 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~77 .lut_mask = 64'h0000FF000000FF38;
-defparam \soc_inst|m0_1|u_logic|Add5~77 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~89 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~89 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|R5zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R5zvx4~1_combout  & (((\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R5zvx4~1_combout  & ((\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+// Location: LABCELL_X37_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ormvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ormvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z8b3z4~q  & ( \soc_inst|m0_1|u_logic|J7b3z4~q  & ( (!\soc_inst|m0_1|u_logic|Add0~89_sumout ) # ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z8b3z4~q  & ( \soc_inst|m0_1|u_logic|J7b3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~89_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Z8b3z4~q  & ( !\soc_inst|m0_1|u_logic|J7b3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~89_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout )) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z8b3z4~q  & ( !\soc_inst|m0_1|u_logic|J7b3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Add0~89_sumout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Add0~89_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J7b3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .lut_mask = 64'h003F003F007F007F;
-defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .lut_mask = 64'h2F0FEFCF2F3FEFFF;
+defparam \soc_inst|m0_1|u_logic|Ormvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y25_N55
-dffeas \soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE (
+// Location: FF_X37_Y18_N55
+dffeas \soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ormvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -39669,142 +38879,176 @@ dffeas \soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~105 (
+// Location: LABCELL_X24_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~105_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~62  ))
-// \soc_inst|m0_1|u_logic|Add2~106  = CARRY(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~62  ))
+// \soc_inst|m0_1|u_logic|E0uvx4~combout  = ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|Kop2z4~q  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~62 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~105_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~106 ),
+	.combout(\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~105 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~105 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~105 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E0uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0uvx4 .lut_mask = 64'h0100010000000000;
+defparam \soc_inst|m0_1|u_logic|E0uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~117 (
+// Location: LABCELL_X33_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qztvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~117_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~106  ))
-// \soc_inst|m0_1|u_logic|Add2~118  = CARRY(( !\soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~106  ))
+// \soc_inst|m0_1|u_logic|Qztvx4~combout  = ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~106 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~117_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~118 ),
+	.combout(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~117 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~117 .lut_mask = 64'h0000FFFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add2~117 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qztvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qztvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Qztvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~113 (
+// Location: FF_X34_Y21_N4
+dffeas \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qwowx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~118  ))
-// \soc_inst|m0_1|u_logic|Add2~114  = CARRY(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~118  ))
+// \soc_inst|m0_1|u_logic|Qwowx4~combout  = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mjl2z4~q  & (\soc_inst|m0_1|u_logic|Lz93z4~q  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~118 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~113_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~114 ),
+	.combout(\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~113 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~113 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~113 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qwowx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qwowx4 .lut_mask = 64'h0000000011001100;
+defparam \soc_inst|m0_1|u_logic|Qwowx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~77 (
+// Location: MLABCELL_X39_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vytvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~114  ))
-// \soc_inst|m0_1|u_logic|Add2~78  = CARRY(( !\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~114  ))
+// \soc_inst|m0_1|u_logic|Vytvx4~combout  = ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datad(gnd),
-	.datae(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~114 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~77_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~78 ),
+	.combout(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~77 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~77 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~77 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vytvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vytvx4 .lut_mask = 64'h00000F0F00000F0F;
+defparam \soc_inst|m0_1|u_logic|Vytvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~29 (
+// Location: FF_X35_Y18_N22
+dffeas \soc_inst|m0_1|u_logic|Pab3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pab3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pab3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~29_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~78  ))
-// \soc_inst|m0_1|u_logic|Add2~30  = CARRY(( !\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~78  ))
+// \soc_inst|m0_1|u_logic|Jkc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ((\soc_inst|m0_1|u_logic|Jkc3z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q 
+// )) ) ) # ( !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Jkc3z4~q  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~78 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~29_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~30 ),
+	.combout(\soc_inst|m0_1|u_logic|Jkc3z4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~29 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~29 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .lut_mask = 64'h00FF00FF50FA50FA;
+defparam \soc_inst|m0_1|u_logic|Jkc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y21_N2
-dffeas \soc_inst|m0_1|u_logic|Lrx2z4 (
+// Location: FF_X34_Y19_N46
+dffeas \soc_inst|m0_1|u_logic|Jkc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jkc3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -39813,396 +39057,393 @@ dffeas \soc_inst|m0_1|u_logic|Lrx2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jkc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lrx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lrx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jkc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jkc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~65 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zjq2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~70  ))
-// \soc_inst|m0_1|u_logic|Add3~66  = CARRY(( !\soc_inst|m0_1|u_logic|Zjq2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~70  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zjq2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~70 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~65_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~66 ),
-	.shareout());
+// Location: FF_X37_Y18_N58
+dffeas \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~65 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~65 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~65 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~61 (
+// Location: LABCELL_X36_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jruvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~66  ))
-// \soc_inst|m0_1|u_logic|Add3~62  = CARRY(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~66  ))
+// \soc_inst|m0_1|u_logic|Jruvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~66 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~61_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~62 ),
+	.combout(\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~61 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~61 .lut_mask = 64'h0000FFFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add3~61 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .lut_mask = 64'h0000020000000000;
+defparam \soc_inst|m0_1|u_logic|Jruvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~57 (
+// Location: LABCELL_X37_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D1ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Foe3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~62  ))
-// \soc_inst|m0_1|u_logic|Add3~58  = CARRY(( !\soc_inst|m0_1|u_logic|Foe3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~62  ))
+// \soc_inst|m0_1|u_logic|D1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (!\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & (((\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( ((\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Jruvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~62 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~57_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~58 ),
+	.combout(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~57 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~57 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~57 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .lut_mask = 64'h5555444450FF40CC;
+defparam \soc_inst|m0_1|u_logic|D1ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~101 (
+// Location: FF_X37_Y18_N59
+dffeas \soc_inst|m0_1|u_logic|F4c3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F4c3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F4c3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F4c3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~58  ))
-// \soc_inst|m0_1|u_logic|Add3~102  = CARRY(( !\soc_inst|m0_1|u_logic|Nox2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~58  ))
+// \soc_inst|m0_1|u_logic|Wkpwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|F4c3z4~q )) # (\soc_inst|m0_1|u_logic|Jkc3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|F4c3z4~q ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~58 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~101_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~102 ),
+	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~101 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~101 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~101 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .lut_mask = 64'h000F000F555F555F;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~113 (
+// Location: LABCELL_X37_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~102  ))
-// \soc_inst|m0_1|u_logic|Add3~114  = CARRY(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~102  ))
+// \soc_inst|m0_1|u_logic|Wkpwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wkpwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pab3z4~q  & ((!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|E0uvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkpwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|E0uvx4~combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wkpwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~102 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~113_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~114 ),
+	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~113 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~113 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~113 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .lut_mask = 64'hFCFC0000FC000000;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~109 (
+// Location: LABCELL_X37_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~114  ))
-// \soc_inst|m0_1|u_logic|Add3~110  = CARRY(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~114  ))
+// \soc_inst|m0_1|u_logic|Wkpwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wkpwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J7b3z4~q  & (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|J7b3z4~q  & (((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|J7b3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wkpwx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~114 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~109_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~110 ),
+	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~109 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~109 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~109 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .lut_mask = 64'h00000000DD0DDD0D;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~73 (
+// Location: LABCELL_X36_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkpwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~110  ))
-// \soc_inst|m0_1|u_logic|Add3~74  = CARRY(( !\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~110  ))
+// \soc_inst|m0_1|u_logic|Wkpwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wkpwx4~2_combout  & ( \soc_inst|m0_1|u_logic|K7pwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xdb3z4~q  & ((!\soc_inst|m0_1|u_logic|J9d3z4~q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout ))) ) 
+// ) ) # ( \soc_inst|m0_1|u_logic|Wkpwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K7pwx4~combout  & ( (!\soc_inst|m0_1|u_logic|J9d3z4~q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|J9d3z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wkpwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~110 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~73_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~74 ),
+	.combout(\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~73 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~73 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add3~73 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .lut_mask = 64'h0000FFAA0000F0A0;
+defparam \soc_inst|m0_1|u_logic|Wkpwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~21 (
+// Location: FF_X31_Y22_N26
+dffeas \soc_inst|switches_1|switch_store[0][6] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[6]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][6]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][6] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][6] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y22_N24
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[6]~36 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~74  ))
-// \soc_inst|m0_1|u_logic|Add3~22  = CARRY(( !\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~74  ))
+// \soc_inst|interconnect_1|HRDATA[6]~36_combout  = ( \soc_inst|switches_1|switch_store[0][6]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
+// (\soc_inst|interconnect_1|HRDATA[6]~10_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][6]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][6]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
+// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][6]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datae(!\soc_inst|switches_1|switch_store[0][6]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~74 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~21_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~22 ),
+	.combout(\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~21 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add3~21 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[6]~36 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[6]~36 .lut_mask = 64'hC0C0C0F3F3C0F3F3;
+defparam \soc_inst|interconnect_1|HRDATA[6]~36 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y15_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nhzvx4 (
+// Location: LABCELL_X31_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nhzvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~21_sumout  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~21_sumout  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~21_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~21_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|O9iwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( ((!\soc_inst|m0_1|u_logic|Wkpwx4~3_combout  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( (!\soc_inst|m0_1|u_logic|Wkpwx4~3_combout  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~21_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wkpwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|O9iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nhzvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nhzvx4 .lut_mask = 64'hBBBBBB00B0B0B000;
-defparam \soc_inst|m0_1|u_logic|Nhzvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .lut_mask = 64'h0C0C0C0C0CFF0CFF;
+defparam \soc_inst|m0_1|u_logic|O9iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y15_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5lvx4~0 (
+// Location: LABCELL_X31_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O9iwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R5lvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nhzvx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (\soc_inst|m0_1|u_logic|Nhzvx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|S8k2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|O9iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|O9iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Sndwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O9iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R5lvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .lut_mask = 64'h0B0BFBFB000B00FB;
-defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y15_N56
-dffeas \soc_inst|m0_1|u_logic|S8k2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|R5lvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S8k2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S8k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S8k2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X29_Y24_N20
-dffeas \soc_inst|m0_1|u_logic|Nz83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nz83z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nz83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nz83z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X29_Y24_N44
-dffeas \soc_inst|m0_1|u_logic|V0k2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V0k2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V0k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V0k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .lut_mask = 64'hCDEFCDEF00000000;
+defparam \soc_inst|m0_1|u_logic|O9iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y21_N16
-dffeas \soc_inst|m0_1|u_logic|Y1v2z4 (
+// Location: FF_X25_Y19_N32
+dffeas \soc_inst|m0_1|u_logic|Orj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y1v2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Orj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y1v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Orj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Orj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y21_N41
-dffeas \soc_inst|m0_1|u_logic|K2k2z4 (
+// Location: LABCELL_X18_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wbf3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wbf3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fa2wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wbf3z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wbf3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wbf3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wbf3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y19_N47
+dffeas \soc_inst|m0_1|u_logic|Wbf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wbf3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K2k2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wbf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K2k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K2k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wbf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wbf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4~0 (
+// Location: LABCELL_X18_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Feqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|K2k2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|V0k2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Nz83z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|K2k2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # (\soc_inst|m0_1|u_logic|Y1v2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-//  & ( !\soc_inst|m0_1|u_logic|K2k2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|V0k2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Nz83z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|K2k2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Y1v2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Icxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Wbf3z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Orj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nz83z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|V0k2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y1v2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|K2k2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Orj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wbf3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Feqwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Icxwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .lut_mask = 64'h00331D1DCCFF1D1D;
-defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .lut_mask = 64'h0000000000220030;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y24_N2
-dffeas \soc_inst|m0_1|u_logic|Po63z4 (
+// Location: FF_X22_Y19_N34
+dffeas \soc_inst|m0_1|u_logic|Aff3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -40210,37 +39451,64 @@ dffeas \soc_inst|m0_1|u_logic|Po63z4 (
 	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Aff3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aff3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aff3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N25
-dffeas \soc_inst|m0_1|u_logic|Pst2z4 (
+// Location: FF_X25_Y20_N7
+dffeas \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pst2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pst2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pst2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y20_N2
-dffeas \soc_inst|m0_1|u_logic|Yx73z4 (
+// Location: LABCELL_X22_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Icxwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aff3z4~q  & ( \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Aff3z4~q  & ( !\soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aff3z4~q  & ( !\soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aff3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Icxwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .lut_mask = 64'h0808080000080000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y20_N40
+dffeas \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -40248,1357 +39516,1575 @@ dffeas \soc_inst|m0_1|u_logic|Yx73z4 (
 	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yx73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yx73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yx73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y20_N11
-dffeas \soc_inst|m0_1|u_logic|Z3k2z4 (
+// Location: FF_X22_Y19_N17
+dffeas \soc_inst|m0_1|u_logic|Bqf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z3k2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bqf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z3k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z3k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bqf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bqf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4~1 (
+// Location: LABCELL_X22_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Feqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Z3k2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Po63z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Yx73z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Z3k2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # (\soc_inst|m0_1|u_logic|Pst2z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Z3k2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Po63z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Yx73z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Z3k2z4~q  & ( (\soc_inst|m0_1|u_logic|Pst2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Icxwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bqf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Bqf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Bqf3z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Po63z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pst2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yx73z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z3k2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bqf3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Feqwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Icxwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .lut_mask = 64'h0303505FF3F3505F;
-defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .lut_mask = 64'h000A000800020000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4 (
+// Location: LABCELL_X16_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mof3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Feqwx4~combout  = ( \soc_inst|m0_1|u_logic|Feqwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Feqwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~1_combout  & 
-// ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|Feqwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Mof3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fa2wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Feqwx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Feqwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mof3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Feqwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Feqwx4 .lut_mask = 64'h5550555005000500;
-defparam \soc_inst|m0_1|u_logic|Feqwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mof3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mof3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Mof3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y18_N50
-dffeas \soc_inst|m0_1|u_logic|D7k2z4 (
+// Location: FF_X16_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Mof3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X29_Y19_N31
+dffeas \soc_inst|m0_1|u_logic|Xmf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D7k2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xmf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D7k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xmf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xmf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5k2z4~feeder (
+// Location: LABCELL_X16_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O5k2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Uhzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Icxwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Xmf3z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Xmf3z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xmf3z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xmf3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O5k2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Icxwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5k2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O5k2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|O5k2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y17_N41
-dffeas \soc_inst|m0_1|u_logic|O5k2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O5k2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O5k2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5k2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O5k2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .lut_mask = 64'h00080008000C0000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Au72z4~0 (
+// Location: LABCELL_X22_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Icxwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Au72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|O5k2z4~q  & 
-// (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Icxwx4~combout  = ( !\soc_inst|m0_1|u_logic|Icxwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Icxwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Icxwx4~0_combout  & !\soc_inst|m0_1|u_logic|Icxwx4~2_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5k2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Icxwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Icxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Icxwx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Icxwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Au72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Icxwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Au72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Au72z4~0 .lut_mask = 64'h0008000000000000;
-defparam \soc_inst|m0_1|u_logic|Au72z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Icxwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Icxwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N38
-dffeas \soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE (
+// Location: FF_X16_Y21_N53
+dffeas \soc_inst|m0_1|u_logic|J0n2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|J0n2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J0n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J0n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N44
-dffeas \soc_inst|m0_1|u_logic|Fn13z4 (
+// Location: FF_X16_Y21_N14
+dffeas \soc_inst|m0_1|u_logic|Md93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fn13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Md93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fn13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fn13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Md93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Md93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~1 (
+// Location: LABCELL_X16_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ds72z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fn13z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fn13z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fn13z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|G4qwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J0n2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Md93z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J0n2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Md93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fn13z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ds72z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G4qwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .lut_mask = 64'h00C0008000400000;
-defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .lut_mask = 64'h00000000000000AC;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N38
-dffeas \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE (
+// Location: FF_X17_Y20_N32
+dffeas \soc_inst|m0_1|u_logic|N3n2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|N3n2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N3n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N3n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N46
-dffeas \soc_inst|m0_1|u_logic|Nqz2z4 (
+// Location: FF_X16_Y21_N25
+dffeas \soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nqz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nqz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nqz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~2 (
+// Location: LABCELL_X17_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ds72z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nqz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nqz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nqz2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|G4qwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|N3n2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|N3n2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|N3n2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ds72z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G4qwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .lut_mask = 64'h0088000800800000;
-defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .lut_mask = 64'h0D00080000000000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y25_N44
-dffeas \soc_inst|m0_1|u_logic|X543z4 (
+// Location: FF_X15_Y20_N25
+dffeas \soc_inst|m0_1|u_logic|V883z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X543z4~q ),
+	.q(\soc_inst|m0_1|u_logic|V883z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X543z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X543z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V883z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V883z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y19_N22
+dffeas \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gf53z4~feeder (
+// Location: LABCELL_X22_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gf53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Uhzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|G4qwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|V883z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|V883z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V883z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|V883z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gf53z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G4qwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf53z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gf53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Gf53z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .lut_mask = 64'h000A000800020000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y25_N8
-dffeas \soc_inst|m0_1|u_logic|Gf53z4 (
+// Location: FF_X16_Y19_N58
+dffeas \soc_inst|m0_1|u_logic|Vcv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gf53z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vcv2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vcv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vcv2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y25_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ds72z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Gf53z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|X543z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|X543z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gf53z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ds72z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X15_Y19_N25
+dffeas \soc_inst|m0_1|u_logic|Y1n2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y1n2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .lut_mask = 64'h0000080800000C00;
-defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y1n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~3 (
+// Location: MLABCELL_X15_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ds72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ds72z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ds72z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Au72z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ds72z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|D7k2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|G4qwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Y1n2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vcv2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D7k2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Au72z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ds72z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ds72z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ds72z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vcv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y1n2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ds72z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G4qwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .lut_mask = 64'hD000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .lut_mask = 64'h000000000000C0A0;
+defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hlzvx4~0 (
+// Location: LABCELL_X22_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|S8k2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|S8k2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|S8k2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|G4qwx4~combout  = ( !\soc_inst|m0_1|u_logic|G4qwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|G4qwx4~1_combout  & (!\soc_inst|m0_1|u_logic|G4qwx4~0_combout  & !\soc_inst|m0_1|u_logic|G4qwx4~2_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ds72z4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|G4qwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G4qwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G4qwx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G4qwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .lut_mask = 64'h303A303A353F303A;
-defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G4qwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|G4qwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpcvx4 (
+// Location: LABCELL_X30_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wpcvx4~combout  = ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Asdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Icxwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Icxwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wpcvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wpcvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wpcvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Wpcvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3awx4~0 (
+// Location: FF_X25_Y19_N49
+dffeas \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y18_N1
+dffeas \soc_inst|m0_1|u_logic|Dy23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dy23z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dy23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dy23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Djzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Dy23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dy23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dy23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3awx4~0 .lut_mask = 64'hFFCCFFCCF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|H3awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .lut_mask = 64'h00F000F0AAFAAAFA;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X25_Y19_N5
+dffeas \soc_inst|m0_1|u_logic|Pbl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pbl2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pbl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pbl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y19_N17
+dffeas \soc_inst|m0_1|u_logic|M743z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|M743z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M743z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M743z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Locvx4 (
+// Location: MLABCELL_X25_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Locvx4~combout  = ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|M743z4~q  & ( (\soc_inst|m0_1|u_logic|V41xx4~0_combout  & !\soc_inst|m0_1|u_logic|Pbl2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M743z4~q  & ( ((\soc_inst|m0_1|u_logic|V41xx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Pbl2z4~q )) # (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pbl2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M743z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Locvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Locvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Locvx4 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Locvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .lut_mask = 64'h7575757530303030;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4awx4~0 (
+// Location: FF_X27_Y20_N8
+dffeas \soc_inst|m0_1|u_logic|Tel2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tel2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tel2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tel2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y20_N29
+dffeas \soc_inst|m0_1|u_logic|Uo13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uo13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uo13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uo13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J4awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Kqzvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uo13z4~q  & ( !\soc_inst|m0_1|u_logic|Tel2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uo13z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Tel2z4~q ) # (\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uo13z4~q  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tel2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uo13z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J4awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J4awx4~0 .lut_mask = 64'hFFFFFF00F0F0FFFF;
-defparam \soc_inst|m0_1|u_logic|J4awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .lut_mask = 64'h0F0FCFCF0000CCCC;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ancvx4 (
+// Location: FF_X27_Y18_N32
+dffeas \soc_inst|m0_1|u_logic|Edl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Edl2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Edl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Edl2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C1lvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ancvx4~combout  = ( \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|C1lvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lgi3z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Rnovx4~combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Rnovx4~combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lgi3z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Rnovx4~combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Rnovx4~combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lgi3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rnovx4~combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ancvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|C1lvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ancvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ancvx4 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ancvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .lut_mask = 64'h0000F5F5F531F531;
+defparam \soc_inst|m0_1|u_logic|C1lvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~125 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~125_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) + ( 
-// \soc_inst|m0_1|u_logic|Add5~2  ))
-// \soc_inst|m0_1|u_logic|Add5~126  = CARRY(( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) + ( 
-// \soc_inst|m0_1|u_logic|Add5~2  ))
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~2 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~125_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~126 ),
-	.shareout());
+// Location: FF_X23_Y12_N37
+dffeas \soc_inst|m0_1|u_logic|Lgi3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|C1lvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~125 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~125 .lut_mask = 64'h0000FF0F000033CC;
-defparam \soc_inst|m0_1|u_logic|Add5~125 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lgi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lgi3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~121 (
+// Location: LABCELL_X27_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~121_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & \soc_inst|m0_1|u_logic|Ijcwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout )))) ) + ( !\soc_inst|m0_1|u_logic|Ancvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~126  ))
-// \soc_inst|m0_1|u_logic|Add5~122  = CARRY(( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & \soc_inst|m0_1|u_logic|Ijcwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout )))) ) + ( !\soc_inst|m0_1|u_logic|Ancvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~126  ))
+// \soc_inst|m0_1|u_logic|Kqzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Edl2z4~q ) # ((!\soc_inst|m0_1|u_logic|Lgi3z4~q  & \soc_inst|m0_1|u_logic|Ta1xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lgi3z4~q  & \soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Edl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ancvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~126 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~121_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~122 ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~121 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~121 .lut_mask = 64'h000000FF0000FF38;
-defparam \soc_inst|m0_1|u_logic|Add5~121 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .lut_mask = 64'h00F000F0CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~57 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Locvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~122  ))
-// \soc_inst|m0_1|u_logic|Add5~58  = CARRY(( !\soc_inst|m0_1|u_logic|Locvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~122  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Locvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~122 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~57_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~58 ),
-	.shareout());
+// Location: FF_X22_Y18_N8
+dffeas \soc_inst|m0_1|u_logic|Xhl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~57 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~57 .lut_mask = 64'h000000D30000FF00;
-defparam \soc_inst|m0_1|u_logic|Add5~57 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xhl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Wpcvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~58  ))
-// \soc_inst|m0_1|u_logic|Add5~6  = CARRY(( !\soc_inst|m0_1|u_logic|Wpcvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~58  ))
+// Location: FF_X24_Y19_N8
+dffeas \soc_inst|m0_1|u_logic|Wo03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wo03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wo03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wo03z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wpcvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~58 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~5_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~6 ),
-	.shareout());
+// Location: FF_X24_Y19_N53
+dffeas \soc_inst|m0_1|u_logic|Csz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Csz2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~5 .lut_mask = 64'h000000D30000FF00;
-defparam \soc_inst|m0_1|u_logic|Add5~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Csz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Csz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~1 (
+// Location: LABCELL_X24_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lrx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~29_sumout )) 
-// # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lrx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~29_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lrx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add2~29_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lrx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~29_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~4_combout  = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xhl2z4~q  & (\soc_inst|m0_1|u_logic|Wo03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Csz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xhl2z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q 
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wo03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~29_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wo03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Csz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hihvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .lut_mask = 64'hA8A8FDFDA800FD00;
-defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .lut_mask = 64'hF0FF303350551011;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|H4nwx4~combout  & ( \soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|H4nwx4~combout  & ( !\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  ) )
+// Location: FF_X27_Y18_N23
+dffeas \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hihvx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y18_N19
+dffeas \soc_inst|m0_1|u_logic|Igl2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Igl2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .lut_mask = 64'h0000FFFF00008888;
-defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Igl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Igl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~0 (
+// Location: FF_X27_Y18_N26
+dffeas \soc_inst|m0_1|u_logic|C193z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|C193z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C193z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C193z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X27_Y20_N55
+dffeas \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hihvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Hihvx4~1_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hihvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hihvx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hihvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hihvx4~1_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Kqzvx4~5_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|C193z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hihvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hihvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C193z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .lut_mask = 64'h0F000F0000000100;
-defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .lut_mask = 64'h0030000000000022;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y21_N1
-dffeas \soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE (
+// Location: FF_X21_Y22_N23
+dffeas \soc_inst|m0_1|u_logic|Eut2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Eut2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eut2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eut2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~21 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~30  ))
-// \soc_inst|m0_1|u_logic|Add2~22  = CARRY(( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~30  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~30 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~21_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~22 ),
-	.shareout());
+// Location: FF_X27_Y20_N19
+dffeas \soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~21 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~9 (
+// Location: MLABCELL_X21_Y22_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~22  ))
-// \soc_inst|m0_1|u_logic|Add2~10  = CARRY(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~22  ))
+// \soc_inst|m0_1|u_logic|Kqzvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Eut2z4~q  & ( \soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eut2z4~q  & ( !\soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eut2z4~q  & ( !\soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Eut2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~22 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~9_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~10 ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~6_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~9 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .lut_mask = 64'h000A000200080000;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~13 (
+// Location: LABCELL_X27_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~10  ))
-// \soc_inst|m0_1|u_logic|Add2~14  = CARRY(( !\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~10  ))
+// \soc_inst|m0_1|u_logic|Kqzvx4~7_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kqzvx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kqzvx4~5_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kqzvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Kqzvx4~5_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igl2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Igl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kqzvx4~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~6_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~10 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~13_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~14 ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~7_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~13 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .lut_mask = 64'hCF00450000000000;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~1 (
+// Location: LABCELL_X27_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~14  ))
-// \soc_inst|m0_1|u_logic|Add2~2  = CARRY(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~14  ))
+// \soc_inst|m0_1|u_logic|Kqzvx4~combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Kqzvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Kqzvx4~3_combout  & (!\soc_inst|m0_1|u_logic|Kqzvx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kqzvx4~0_combout  & !\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kqzvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kqzvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~7_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~14 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~1_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~2 ),
+	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~1 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqzvx4 .lut_mask = 64'h0000000000008000;
+defparam \soc_inst|m0_1|u_logic|Kqzvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~5 (
+// Location: LABCELL_X23_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J0l2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~2  ))
+// \soc_inst|m0_1|u_logic|J4awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~2 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~5_sumout ),
+	.combout(\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~5 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J4awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J4awx4~0 .lut_mask = 64'hFCFCFCFCFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|J4awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wthvx4~0 (
+// Location: FF_X25_Y19_N50
+dffeas \soc_inst|m0_1|u_logic|Vg53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vg53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vg53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vg53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wthvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~5_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|J0l2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Py72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vg53z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|M743z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~5_sumout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vg53z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M743z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wthvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Py72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .lut_mask = 64'hAF8DAF8D00000000;
-defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~0 .lut_mask = 64'h000C0000000A0000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wthvx4~1 (
+// Location: LABCELL_X22_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M082z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wthvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wthvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~77_sumout  & (((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|R5zvx4~2_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Add5~77_sumout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|R5zvx4~2_combout )))) ) )
+// \soc_inst|m0_1|u_logic|M082z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Igl2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wthvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Igl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wthvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M082z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .lut_mask = 64'h00000000EE0EEE0E;
-defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M082z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M082z4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|M082z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y25_N37
-dffeas \soc_inst|m0_1|u_logic|J0l2z4 (
+// Location: FF_X28_Y18_N2
+dffeas \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wthvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J0l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J0l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y16_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3ivx4~0 (
+// Location: MLABCELL_X28_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|J0l2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|V1l2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|V1l2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Py72z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uo13z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uo13z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uo13z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uo13z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Py72z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .lut_mask = 64'hCCCCCCCC0000FF00;
-defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~1 .lut_mask = 64'h00A0008000200000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~0 (
+// Location: LABCELL_X24_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y5zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rmawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nd3wx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rmawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Rmawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Py72z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Csz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wo03z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Csz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wo03z4~q ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wo03z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Csz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Py72z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .lut_mask = 64'h0000AAAA3333BBBB;
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~2 .lut_mask = 64'h0000880800008000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Phh2z4~1 (
+// Location: LABCELL_X22_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Py72z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Phh2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Phh2z4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Py72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Py72z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Py72z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Py72z4~0_combout  & (!\soc_inst|m0_1|u_logic|M082z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xhl2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Py72z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M082z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Py72z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Py72z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Py72z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .lut_mask = 64'h00000000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Phh2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Py72z4~3 .lut_mask = 64'h8C00000000000000;
+defparam \soc_inst|m0_1|u_logic|Py72z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~1 (
+// Location: LABCELL_X22_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nozvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y5zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Phh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|A67wx4~0_combout  & !\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (\soc_inst|m0_1|u_logic|A67wx4~0_combout  & !\soc_inst|m0_1|u_logic|Y5zvx4~0_combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Phh2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|A67wx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Nozvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( \soc_inst|m0_1|u_logic|Py72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Q7j2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( \soc_inst|m0_1|u_logic|Py72z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Q7j2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Lgi3z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( !\soc_inst|m0_1|u_logic|Py72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Q7j2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( !\soc_inst|m0_1|u_logic|Py72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Q7j2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Lgi3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y5zvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Py72z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .lut_mask = 64'hCA00AF000A000F00;
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .lut_mask = 64'h0A4E0A4E1B5F0A4E;
+defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~2 (
+// Location: MLABCELL_X21_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Znzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Y5zvx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Znzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .lut_mask = 64'h00F000F000300030;
-defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .lut_mask = 64'h00000000FFFF3333;
+defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvdwx4~0 (
+// Location: LABCELL_X17_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Xmzvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Znzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Kqzvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Znzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Kqzvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Znzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Kqzvx4~combout ))) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xmzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .lut_mask = 64'hF0F0F0F0FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .lut_mask = 64'hF300F300F3000000;
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y20_N29
-dffeas \soc_inst|m0_1|u_logic|Vmj2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vmj2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vmj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vmj2z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X21_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uozvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uozvx4~1_combout  = ( \soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  ) )
 
-// Location: FF_X31_Y22_N58
-dffeas \soc_inst|m0_1|u_logic|C5v2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|C5v2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C5v2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Uozvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C5v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .lut_mask = 64'h0F0F550F0F0F550F;
+defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~3 (
+// Location: MLABCELL_X21_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uozvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnvwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( \soc_inst|m0_1|u_logic|C5v2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|C5v2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|C5v2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Uozvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uozvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Uozvx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Uozvx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Uozvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Pdi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vmj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C5v2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uozvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .lut_mask = 64'h0404000404000000;
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .lut_mask = 64'hC0E0F0F000A0F0F0;
+defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpj2z4~feeder (
+// Location: LABCELL_X22_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Locvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zpj2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Locvx4~combout  = ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zpj2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Locvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpj2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zpj2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Zpj2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Locvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Locvx4 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Locvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y24_N5
-dffeas \soc_inst|m0_1|u_logic|Zpj2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zpj2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zpj2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~121 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~121_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & \soc_inst|m0_1|u_logic|Ijcwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout )))) ) + ( !\soc_inst|m0_1|u_logic|Ancvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~126  ))
+// \soc_inst|m0_1|u_logic|Add5~122  = CARRY(( (!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & \soc_inst|m0_1|u_logic|Ijcwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout )))) ) + ( !\soc_inst|m0_1|u_logic|Ancvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~126  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ancvx4~combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~126 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~122 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zpj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~121 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~121 .lut_mask = 64'h000000FF0000FF58;
+defparam \soc_inst|m0_1|u_logic|Add5~121 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y24_N14
-dffeas \soc_inst|m0_1|u_logic|R293z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R293z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~57 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~57_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Locvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~122  ))
+// \soc_inst|m0_1|u_logic|Add5~58  = CARRY(( (!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Locvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~122  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Locvx4~combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~122 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~58 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R293z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R293z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~57 .lut_mask = 64'h000000FF0000FF4A;
+defparam \soc_inst|m0_1|u_logic|Add5~57 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~1 (
+// Location: LABCELL_X27_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|R293z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zpj2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Xmzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xmzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uozvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|Ppzvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xmzvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Uozvx4~0_combout  & \soc_inst|m0_1|u_logic|Ppzvx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zpj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|R293z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xmzvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .lut_mask = 64'h0000000002020300;
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .lut_mask = 64'h0044000400000000;
+defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y20_N22
-dffeas \soc_inst|m0_1|u_logic|Tr63z4 (
+// Location: FF_X27_Y18_N31
+dffeas \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tr63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tr63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tr63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N58
-dffeas \soc_inst|m0_1|u_logic|F9j2z4 (
+// Location: FF_X27_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|N3v2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F9j2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|N3v2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F9j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F9j2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N3v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|N3v2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~0 (
+// Location: MLABCELL_X25_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnvwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tr63z4~q  & ( \soc_inst|m0_1|u_logic|F9j2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tr63z4~q  & ( !\soc_inst|m0_1|u_logic|F9j2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tr63z4~q  & ( !\soc_inst|m0_1|u_logic|F9j2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|U7uwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C193z4~q  & ( \soc_inst|m0_1|u_logic|N3v2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Pbl2z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|C193z4~q  & ( \soc_inst|m0_1|u_logic|N3v2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Pbl2z4~q ))))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|C193z4~q  & ( !\soc_inst|m0_1|u_logic|N3v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Pbl2z4~q ))))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (((\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C193z4~q  & ( !\soc_inst|m0_1|u_logic|N3v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Pbl2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tr63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|F9j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pbl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|C193z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|N3v2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U7uwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .lut_mask = 64'h4400400004000000;
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .lut_mask = 64'h5030503F5F305F3F;
+defparam \soc_inst|m0_1|u_logic|U7uwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y23_N40
-dffeas \soc_inst|m0_1|u_logic|C183z4~DUPLICATE (
+// Location: FF_X27_Y20_N56
+dffeas \soc_inst|m0_1|u_logic|Eq63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Eq63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C183z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C183z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eq63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eq63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y24_N37
-dffeas \soc_inst|m0_1|u_logic|Tvt2z4 (
+// Location: FF_X21_Y22_N22
+dffeas \soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -41606,894 +41092,1030 @@ dffeas \soc_inst|m0_1|u_logic|Tvt2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tvt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tvt2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mnvwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tvt2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  
-// & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tvt2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tvt2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|C183z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tvt2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .lut_mask = 64'h0500040001000000;
-defparam \soc_inst|m0_1|u_logic|Mnvwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnvwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mnvwx4~combout  = ( !\soc_inst|m0_1|u_logic|Mnvwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Mnvwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Mnvwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mnvwx4~0_combout )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Mnvwx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mnvwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mnvwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mnvwx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnvwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnvwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Mnvwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrdwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mrdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Icxwx4~combout  ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .lut_mask = 64'h00FF00FF33333333;
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvdwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Uvdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mrdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .lut_mask = 64'h0F000F000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fwtwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Fwtwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Saqwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Eruwx4~combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yih2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdbwx4~combout  ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y18_N22
+dffeas \soc_inst|m0_1|u_logic|Nz73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nz73z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .lut_mask = 64'hFFFFF0F0AFAFAFAF;
-defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nz73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nz73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y19_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zbbwx4~0 (
+// Location: LABCELL_X27_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zbbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|Lsnvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Yih2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Yih2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Yih2z4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|Yih2z4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|U7uwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nz73z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Eq63z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nz73z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tel2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nz73z4~q  & ( (\soc_inst|m0_1|u_logic|Eq63z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nz73z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tel2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Eq63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tel2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nz73z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zbbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U7uwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .lut_mask = 64'hEB2B2323EE222222;
-defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .lut_mask = 64'h0C3F44440C3F7777;
+defparam \soc_inst|m0_1|u_logic|U7uwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~89 (
+// Location: LABCELL_X22_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U7uwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Hrcvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~6  ))
-// \soc_inst|m0_1|u_logic|Add5~90  = CARRY(( !\soc_inst|m0_1|u_logic|Hrcvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~6  ))
+// \soc_inst|m0_1|u_logic|U7uwx4~combout  = ( \soc_inst|m0_1|u_logic|U7uwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|U7uwx4~0_combout  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|U7uwx4~1_combout  & 
+// ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|U7uwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hrcvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U7uwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U7uwx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~6 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~89_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~90 ),
+	.combout(\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~89 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~89 .lut_mask = 64'h000000D30000FF00;
-defparam \soc_inst|m0_1|u_logic|Add5~89 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U7uwx4 .lut_mask = 64'h00FA00FA00500050;
+defparam \soc_inst|m0_1|u_logic|U7uwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cfzvx4~0 (
+// Location: MLABCELL_X28_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nvdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cfzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( \soc_inst|m0_1|u_logic|Zbbwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( \soc_inst|m0_1|u_logic|Zbbwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( \soc_inst|m0_1|u_logic|Zbbwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Mnvwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Mnvwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zbbwx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .lut_mask = 64'h3333333300003333;
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .lut_mask = 64'h0FFF0FFF00F000F0;
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cfzvx4~1 (
+// Location: LABCELL_X31_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Cfzvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdbwx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Asdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Asdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Asdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .lut_mask = 64'h0000008A00000000;
-defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y19_N11
-dffeas \soc_inst|m0_1|u_logic|Gfq2z4 (
+// Location: FF_X21_Y20_N4
+dffeas \soc_inst|m0_1|u_logic|C5n2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gfq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|C5n2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gfq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gfq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C5n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C5n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y19_N50
-dffeas \soc_inst|m0_1|u_logic|Vgq2z4 (
+// Location: FF_X22_Y19_N23
+dffeas \soc_inst|m0_1|u_logic|M3u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vgq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M3u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vgq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vgq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M3u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M3u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y19_N44
-dffeas \soc_inst|m0_1|u_logic|Yx83z4 (
+// Location: MLABCELL_X15_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~7 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|M3u2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Vcv2z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|M3u2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Vcv2z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vcv2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M3u2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~7_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .lut_mask = 64'h0032000000100000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X15_Y20_N26
+dffeas \soc_inst|m0_1|u_logic|V883z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yx83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|V883z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yx83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yx83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V883z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V883z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y22_N50
-dffeas \soc_inst|m0_1|u_logic|J0v2z4 (
+// Location: FF_X16_Y21_N26
+dffeas \soc_inst|m0_1|u_logic|Mz63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J0v2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mz63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J0v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J0v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mz63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mz63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4~0 (
+// Location: LABCELL_X16_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fexwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yx83z4~q  & ( \soc_inst|m0_1|u_logic|J0v2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Vgq2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Gfq2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yx83z4~q  & ( \soc_inst|m0_1|u_logic|J0v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Vgq2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Gfq2z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Yx83z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|J0v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Vgq2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Gfq2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yx83z4~q  & ( !\soc_inst|m0_1|u_logic|J0v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Vgq2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Gfq2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Md93z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Mz63z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gfq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vgq2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yx83z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J0v2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mz63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Md93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fexwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .lut_mask = 64'h028A139B46CE57DF;
-defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .lut_mask = 64'h0000220000000030;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y22_N49
-dffeas \soc_inst|m0_1|u_logic|Art2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Art2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X15_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~8 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~6_combout  & ( (\soc_inst|m0_1|u_logic|C5n2z4~q  & (!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|V883z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|V883z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|C5n2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V883z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~6_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Art2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Art2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .lut_mask = 64'hC0CC404400000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y22_N20
-dffeas \soc_inst|m0_1|u_logic|Kiq2z4 (
+// Location: LABCELL_X16_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~combout  = ( \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[22]~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  = ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Uvzvx4~combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .lut_mask = 64'hFFFFDDDD22220000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y20_N8
+dffeas \soc_inst|m0_1|u_logic|Fed3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kiq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fed3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kiq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kiq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fed3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fed3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y22_N38
-dffeas \soc_inst|m0_1|u_logic|An63z4 (
+// Location: FF_X36_Y18_N4
+dffeas \soc_inst|m0_1|u_logic|Dks2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|An63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dks2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|An63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|An63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dks2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dks2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y19_N7
-dffeas \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE (
+// Location: FF_X36_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|G8n2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|G8n2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G8n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G8n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4~1 (
+// Location: LABCELL_X30_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K3uvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fexwx4~1_combout  = ( \soc_inst|m0_1|u_logic|An63z4~q  & ( \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Kiq2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Art2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|An63z4~q  & ( \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Kiq2z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Art2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|An63z4~q  & ( !\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Kiq2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Art2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|An63z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Kiq2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Art2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|K3uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & (\soc_inst|m0_1|u_logic|Kop2z4~q  & \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Art2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kiq2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|An63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fexwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .lut_mask = 64'h10B01ABA15B51FBF;
-defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .lut_mask = 64'h0004000400000000;
+defparam \soc_inst|m0_1|u_logic|K3uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4 (
+// Location: LABCELL_X30_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W2uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fexwx4~combout  = ( \soc_inst|m0_1|u_logic|Fexwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fexwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~1_combout  & 
-// ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fexwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|W2uvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fexwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fexwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fexwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fexwx4 .lut_mask = 64'h00FC00FC000C000C;
-defparam \soc_inst|m0_1|u_logic|Fexwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W2uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W2uvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|W2uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y18_N26
-dffeas \soc_inst|m0_1|u_logic|Zkk2z4 (
+// Location: FF_X37_Y20_N49
+dffeas \soc_inst|m0_1|u_logic|X9n2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zkk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X9n2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zkk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X9n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X9n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y18_N32
-dffeas \soc_inst|m0_1|u_logic|Ggk2z4 (
+// Location: FF_X35_Y19_N11
+dffeas \soc_inst|m0_1|u_logic|Bus2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ggk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bus2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ggk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ggk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bus2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bus2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Avowx4~0_combout  = ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( ((\soc_inst|m0_1|u_logic|X9n2z4~q  & \soc_inst|m0_1|u_logic|K3uvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Bus2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|E0uvx4~combout  & 
+// ( (\soc_inst|m0_1|u_logic|X9n2z4~q  & \soc_inst|m0_1|u_logic|K3uvx4~0_combout ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Avowx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Avowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~0 .lut_mask = 64'h003300330F3F0F3F;
+defparam \soc_inst|m0_1|u_logic|Avowx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Avowx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Avowx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qwowx4~combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # ((!\soc_inst|m0_1|u_logic|G8n2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Qwowx4~combout  & (!\soc_inst|m0_1|u_logic|Dks2z4~q  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|G8n2z4~q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Avowx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Avowx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Avowx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~1 .lut_mask = 64'hFAC8FAC800000000;
+defparam \soc_inst|m0_1|u_logic|Avowx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Avowx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Avowx4~1_combout ) # ((\soc_inst|m0_1|u_logic|N1uvx4~combout  & \soc_inst|m0_1|u_logic|Fed3z4~q )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Avowx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Avowx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Avowx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avowx4~2 .lut_mask = 64'h00000000FF05FF05;
+defparam \soc_inst|m0_1|u_logic|Avowx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aru2z4~feeder (
+// Location: LABCELL_X33_Y21_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cma3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aru2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Cma3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aru2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aru2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aru2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Aru2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y18_N56
-dffeas \soc_inst|m0_1|u_logic|Aru2z4 (
+// Location: FF_X33_Y21_N11
+dffeas \soc_inst|m0_1|u_logic|Cma3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Aru2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aru2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cma3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aru2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aru2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cma3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cma3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N1
-dffeas \soc_inst|m0_1|u_logic|Kjk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kjk2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y7iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ddi3z4~q ) # ((!\soc_inst|m0_1|u_logic|Cma3z4~q  & \soc_inst|m0_1|u_logic|G6owx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & 
+// ( (!\soc_inst|m0_1|u_logic|Cma3z4~q  & \soc_inst|m0_1|u_logic|G6owx4~combout ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cma3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .lut_mask = 64'h00F000F0CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y7iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Y7iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Avowx4~2_combout  & ((!\soc_inst|interconnect_1|HRDATA[22]~35_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Avowx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .lut_mask = 64'hF0C0F0C000000000;
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Y7iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Zudwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Asdwx4~1_combout )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .lut_mask = 64'h00000000DDCFDDCF;
+defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ba0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ba0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ba0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .lut_mask = 64'hAAFAAAFA00F000F0;
+defparam \soc_inst|m0_1|u_logic|Ba0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bq5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|S71wx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|S71wx4~combout  & ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kjk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kjk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .lut_mask = 64'h0000FFFF33333333;
+defparam \soc_inst|m0_1|u_logic|Bq5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4~0 (
+// Location: LABCELL_X37_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Axm2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F8wwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kjk2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Aru2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zkk2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kjk2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Aru2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zkk2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kjk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ggk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kjk2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ggk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Axm2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zkk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ggk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aru2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kjk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F8wwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .lut_mask = 64'h330033FF0F550F55;
-defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y22_N32
-dffeas \soc_inst|m0_1|u_logic|Rd63z4 (
+// Location: FF_X37_Y19_N35
+dffeas \soc_inst|m0_1|u_logic|Axm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rd63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Axm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rd63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rd63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Axm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Axm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y22_N55
-dffeas \soc_inst|m0_1|u_logic|Rht2z4 (
+// Location: LABCELL_X35_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pcd3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pcd3z4~0_combout  = !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout 
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .lut_mask = 64'hF0F0F0F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X35_Y20_N46
+dffeas \soc_inst|m0_1|u_logic|Pcd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rht2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pcd3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rht2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rht2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y18_N44
-dffeas \soc_inst|m0_1|u_logic|An73z4 (
+// Location: FF_X17_Y19_N1
+dffeas \soc_inst|m0_1|u_logic|Sa23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|An73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sa23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|An73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|An73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sa23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sa23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhk2z4~feeder (
+// Location: LABCELL_X18_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vhk2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Ze1wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Sa23z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kt43z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sa23z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kt43z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sa23z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kt43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sa23z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vhk2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vhk2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vhk2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Vhk2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y18_N37
-dffeas \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vhk2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .lut_mask = 64'h00C0000000800080;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4~1 (
+// Location: LABCELL_X18_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F8wwx4~1_combout  = ( \soc_inst|m0_1|u_logic|An73z4~q  & ( \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Rht2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Rd63z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|An73z4~q  & ( \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Rht2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rd63z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|An73z4~q  
-// & ( !\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((\soc_inst|m0_1|u_logic|Rht2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Rd63z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|An73z4~q  & ( !\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (((\soc_inst|m0_1|u_logic|Rht2z4~q  
-// & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rd63z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T263z4~q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T263z4~q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rd63z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rht2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|An73z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T263z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F8wwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .lut_mask = 64'h110A115FBB0ABB5F;
-defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .lut_mask = 64'h8800100000001000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4 (
+// Location: LABCELL_X18_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F8wwx4~combout  = ( \soc_inst|m0_1|u_logic|F8wwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|F8wwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|F8wwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|F8wwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Zgr2z4~q  & (!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cc73z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cc73z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|F8wwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zgr2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cc73z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8wwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F8wwx4 .lut_mask = 64'h3330333003000300;
-defparam \soc_inst|m0_1|u_logic|F8wwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .lut_mask = 64'hF300510000000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y26_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yvtwx4~0 (
+// Location: LABCELL_X17_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yvtwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|F8wwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~combout  = ( \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .lut_mask = 64'hF0F0FFFFF0F00000;
-defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xs7wx4~0 (
+// Location: LABCELL_X35_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[12]~19 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xs7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yvtwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yvtwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Fwtwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[12]~19 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xs7wx4~1 (
+// Location: FF_X35_Y18_N41
+dffeas \soc_inst|m0_1|u_logic|L7a3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|L7a3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L7a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L7a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xs7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xs7wx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add0~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Iua3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~50  ))
+// \soc_inst|m0_1|u_logic|Add0~38  = CARRY(( !\soc_inst|m0_1|u_logic|Iua3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~50  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~50 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~37_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~38 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~37 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U72wx4~0 (
+// Location: LABCELL_X37_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U72wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Walwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Walwx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Walwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Walwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ypmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Iua3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~37_sumout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|L7a3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iua3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~37_sumout  & ( ((\soc_inst|m0_1|u_logic|L7a3z4~q  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Iua3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~37_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|L7a3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iua3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~37_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|L7a3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L7a3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add0~37_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ypmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U72wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U72wx4~0 .lut_mask = 64'h22330203AAFF0A0F;
-defparam \soc_inst|m0_1|u_logic|U72wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .lut_mask = 64'h3F1FFFDF0F1FCFDF;
+defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y25_N20
-dffeas \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE (
+// Location: FF_X37_Y17_N38
+dffeas \soc_inst|m0_1|u_logic|Iua3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ypmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -42502,693 +42124,775 @@ dffeas \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Iua3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Iua3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Iua3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~109 (
+// Location: LABCELL_X33_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~61 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~82  ))
-// \soc_inst|m0_1|u_logic|Add2~110  = CARRY(( !\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~82  ))
+// \soc_inst|m0_1|u_logic|Add0~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|K7g3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~38  ))
+// \soc_inst|m0_1|u_logic|Add0~62  = CARRY(( !\soc_inst|m0_1|u_logic|K7g3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~38  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~82 ),
+	.cin(\soc_inst|m0_1|u_logic|Add0~38 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~109_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~110 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~61_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~62 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~109 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~109 .lut_mask = 64'h0000FFFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add2~109 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~61 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~61 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~101 (
+// Location: FF_X35_Y18_N47
+dffeas \soc_inst|m0_1|u_logic|T5g3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T5g3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T5g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T5g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rpmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~110  ))
-// \soc_inst|m0_1|u_logic|Add2~102  = CARRY(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~110  ))
+// \soc_inst|m0_1|u_logic|Rpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K7g3z4~q  & ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~61_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7g3z4~q  & ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~61_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|K7g3z4~q  & ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~61_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7g3z4~q  & ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~61_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Add0~61_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T5g3z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~110 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~101_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~102 ),
+	.combout(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~101 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~101 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~101 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .lut_mask = 64'h20FFECFF31FFFDFF;
+defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~97 (
+// Location: FF_X34_Y18_N40
+dffeas \soc_inst|m0_1|u_logic|K7g3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K7g3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K7g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K7g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~81 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jwf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~102  ))
-// \soc_inst|m0_1|u_logic|Add2~98  = CARRY(( !\soc_inst|m0_1|u_logic|Jwf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~102  ))
+// \soc_inst|m0_1|u_logic|Add0~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rsa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~62  ))
+// \soc_inst|m0_1|u_logic|Add0~82  = CARRY(( !\soc_inst|m0_1|u_logic|Rsa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~62  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~102 ),
+	.cin(\soc_inst|m0_1|u_logic|Add0~62 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~97_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~98 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~81_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~82 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~97 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~97 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~97 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~81 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~81 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ns9wx4~0 (
+// Location: FF_X37_Y18_N28
+dffeas \soc_inst|m0_1|u_logic|U5a3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U5a3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U5a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kpmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ns9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout  & !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) 
-// ) )
+// \soc_inst|m0_1|u_logic|Kpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|U5a3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~81_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|U5a3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~81_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( !\soc_inst|m0_1|u_logic|U5a3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~81_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rsa3z4~q  & ( !\soc_inst|m0_1|u_logic|U5a3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (!\soc_inst|m0_1|u_logic|Add0~81_sumout  & !\soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Add0~81_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U5a3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ns9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .lut_mask = 64'hAA00AA00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .lut_mask = 64'h7555FDDD7577FDFF;
+defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y18_N59
-dffeas \soc_inst|m0_1|u_logic|Mi23z4 (
+// Location: FF_X37_Y18_N14
+dffeas \soc_inst|m0_1|u_logic|Rsa3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mi23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rsa3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mi23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mi23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rsa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rsa3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y17_N52
-dffeas \soc_inst|m0_1|u_logic|Psh3z4 (
+// Location: LABCELL_X36_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mis2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mis2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y18_N31
+dffeas \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y18_N14
-dffeas \soc_inst|m0_1|u_logic|Ft83z4 (
+// Location: LABCELL_X37_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tqc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tqc3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Tqc3z4~q 
+// ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .lut_mask = 64'h0AFA0AFA00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X37_Y18_N47
+dffeas \soc_inst|m0_1|u_logic|Tqc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ft83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tqc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ft83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ft83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tqc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tqc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y21_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txa2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Txa2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  
+// & !\soc_inst|m0_1|u_logic|Tdp2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .lut_mask = 64'h0000000001000000;
+defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zyhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Zyhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|D9ovx4~combout )) # (\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rym2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & (\soc_inst|m0_1|u_logic|D9ovx4~combout )) # (\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rym2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout  & (((\soc_inst|m0_1|u_logic|D9ovx4~combout  & !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rym2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( ((\soc_inst|m0_1|u_logic|D9ovx4~combout  & !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rym2z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .lut_mask = 64'h5F0F4C0C550F440C;
+defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y18_N44
-dffeas \soc_inst|m0_1|u_logic|Vr33z4 (
+// Location: FF_X37_Y18_N17
+dffeas \soc_inst|m0_1|u_logic|Rym2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vr33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rym2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vr33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vr33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rym2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rym2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y18_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~7 (
+// Location: LABCELL_X37_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Vr33z4~q ))) # (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ft83z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|M1pwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rym2z4~q  & ( ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Tqc3z4~q )) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rym2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Tqc3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ft83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vr33z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1pwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .lut_mask = 64'h0000000050440000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .lut_mask = 64'h000F000F333F333F;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Naq2z4~feeder (
+// Location: MLABCELL_X34_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kss2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Naq2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Q52wx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Kss2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Naq2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Naq2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Naq2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y25_N2
-dffeas \soc_inst|m0_1|u_logic|Naq2z4 (
+// Location: FF_X34_Y21_N47
+dffeas \soc_inst|m0_1|u_logic|Kss2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Naq2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Naq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Naq2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X30_Y24_N16
-dffeas \soc_inst|m0_1|u_logic|Wj73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wj73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kss2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wj73z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y25_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~6 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Naq2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wj73z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Naq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wj73z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~6_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .lut_mask = 64'h0000000000C00088;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kss2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kss2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~8 (
+// Location: LABCELL_X36_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Z62wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Psh3z4~q )))) # (\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & (\soc_inst|m0_1|u_logic|Mi23z4~q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Psh3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|M1pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Kss2z4~q  & ((\soc_inst|m0_1|u_logic|E0uvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|J6i2z4~q ) # ((\soc_inst|m0_1|u_logic|Kss2z4~q  & \soc_inst|m0_1|u_logic|E0uvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kss2z4~q  & 
+// \soc_inst|m0_1|u_logic|E0uvx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mi23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Psh3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Z62wx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kss2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1pwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .lut_mask = 64'hB0BB000000000000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .lut_mask = 64'h0033003350735073;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ns9wx4~1 (
+// Location: LABCELL_X37_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ns9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Z62wx4~8_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Z62wx4~8_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Ns9wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Ns9wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|M1pwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|M1pwx4~1_combout  & !\soc_inst|m0_1|u_logic|M1pwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|M1pwx4~1_combout  & !\soc_inst|m0_1|u_logic|M1pwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ns9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|M1pwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M1pwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1pwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .lut_mask = 64'h03030B0B030F0B0F;
-defparam \soc_inst|m0_1|u_logic|Ns9wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~61 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~61_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~18  ))
-// \soc_inst|m0_1|u_logic|Add5~62  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~18  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~18 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~61_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~62 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~61 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~61 .lut_mask = 64'h0000A05F000000CC;
-defparam \soc_inst|m0_1|u_logic|Add5~61 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~65 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~65_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~62  ))
-// \soc_inst|m0_1|u_logic|Add5~66  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~62  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~62 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~65_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~66 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~65 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~65 .lut_mask = 64'h0000A05F000000CC;
-defparam \soc_inst|m0_1|u_logic|Add5~65 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .lut_mask = 64'hF000F000A000A000;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~1 (
+// Location: LABCELL_X37_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sdhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Add2~97_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jwf3z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add2~97_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jwf3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|M1pwx4~3_combout  = ( \soc_inst|m0_1|u_logic|U5a3z4~q  & ( \soc_inst|m0_1|u_logic|M1pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rsa3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U5a3z4~q  & ( 
+// \soc_inst|m0_1|u_logic|M1pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rsa3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add2~97_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|U5a3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1pwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1pwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .lut_mask = 64'hF0FFA0AFC0CC808C;
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .lut_mask = 64'h00000000B0B0BBBB;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~2 (
+// Location: MLABCELL_X34_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Sdhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Sdhvx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|M1pwx4~4_combout  = ( \soc_inst|m0_1|u_logic|M1pwx4~3_combout  & ( \soc_inst|m0_1|u_logic|N1uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pcd3z4~q  & ((!\soc_inst|m0_1|u_logic|Axm2z4~q ) # (!\soc_inst|m0_1|u_logic|K7pwx4~combout ))) ) 
+// ) ) # ( \soc_inst|m0_1|u_logic|M1pwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|N1uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Axm2z4~q ) # (!\soc_inst|m0_1|u_logic|K7pwx4~combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sdhvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M1pwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1pwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .lut_mask = 64'h0F0F00000C0F0000;
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .lut_mask = 64'h0000FFAA0000CC88;
+defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~0 (
+// Location: LABCELL_X31_Y22_N21
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[14]~30 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sdhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|U72wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|U72wx4~0_combout  & !\soc_inst|m0_1|u_logic|Glnwx4~1_combout )) ) ) )
+// \soc_inst|ram_1|data_to_memory[14]~30_combout  = ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( (!\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ) # (\soc_inst|ram_1|byte_select [1]) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sdhvx4~2_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select [1]),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[14]~30_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .lut_mask = 64'h00000000FF50FF51;
-defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[14]~30 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[14]~30 .lut_mask = 64'h0000000077772222;
+defparam \soc_inst|ram_1|data_to_memory[14]~30 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y21_N56
-dffeas \soc_inst|m0_1|u_logic|Jwf3z4 (
+// Location: FF_X31_Y16_N52
+dffeas \soc_inst|ram_1|byte_select[3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|ram_1|byte3~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.q(\soc_inst|ram_1|byte_select [3]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jwf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jwf3z4 .power_up = "low";
+defparam \soc_inst|ram_1|byte_select[3] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~97 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~106  ))
-// \soc_inst|m0_1|u_logic|Add3~98  = CARRY(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~106  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~106 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~97_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~98 ),
-	.shareout());
+// Location: M10K_X26_Y19_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[30]~29_combout ,\soc_inst|ram_1|data_to_memory[14]~30_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~97 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~97 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~97 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_bit_number = 14;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_bit_number = 14;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A3E181849090C024090204020402040900003D723122C323316040804080408003618003FFFFFFFFFFFFC3FA14000000000000000000000001";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~93 (
+// Location: LABCELL_X27_Y17_N45
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[30]~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jwf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~98  ))
-// \soc_inst|m0_1|u_logic|Add3~94  = CARRY(( !\soc_inst|m0_1|u_logic|Jwf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~98  ))
+// \soc_inst|ram_1|data_to_memory[30]~29_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~2_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ) # (\soc_inst|ram_1|byte_select [3]))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o~2_combout  & ( (!\soc_inst|ram_1|byte_select [3] & (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.dataa(!\soc_inst|ram_1|byte_select [3]),
+	.datab(!\soc_inst|ram_1|write_cycle~q ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~98 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~93_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~94 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~93 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~93 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~93 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o~3_combout  = ( \soc_inst|m0_1|u_logic|Add3~93_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~65_sumout )) # 
-// (\soc_inst|m0_1|u_logic|P82wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~93_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~65_sumout )) # (\soc_inst|m0_1|u_logic|P82wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~93_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~65_sumout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~93_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~65_sumout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~93_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[30]~29_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o~3 .lut_mask = 64'h005533770F5F3F7F;
-defparam \soc_inst|m0_1|u_logic|haddr_o~3 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[30]~29 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[30]~29 .lut_mask = 64'h0202020213131313;
+defparam \soc_inst|ram_1|data_to_memory[30]~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zcivx4~0 (
+// Location: LABCELL_X31_Y22_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qapwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zcivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qapwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ( \soc_inst|interconnect_1|HRDATA[11]~3_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zcivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qapwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .lut_mask = 64'h2323EFEF2300EF00;
-defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .lut_mask = 64'h0000000000003333;
+defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y16_N19
-dffeas \soc_inst|m0_1|u_logic|Y8q2z4 (
+// Location: FF_X15_Y15_N32
+dffeas \soc_inst|m0_1|u_logic|Rdg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zcivx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rdg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y8q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y8q2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rdg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rdg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X36_Y16_N50
-dffeas \soc_inst|m0_1|u_logic|Ym93z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ym93z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X12_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwg3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pwg3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Bh0wx4~1_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pwg3z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ym93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ym93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Pwg3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y24_N23
-dffeas \soc_inst|m0_1|u_logic|Cao2z4 (
+// Location: FF_X12_Y19_N49
+dffeas \soc_inst|m0_1|u_logic|Pwg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pwg3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cao2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pwg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cao2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cao2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y23_N13
-dffeas \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE (
+// Location: FF_X18_Y18_N22
+dffeas \soc_inst|m0_1|u_logic|Gfg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Gfg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gfg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gfg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N20
-dffeas \soc_inst|m0_1|u_logic|Jl93z4 (
+// Location: FF_X15_Y15_N14
+dffeas \soc_inst|m0_1|u_logic|Nag3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -43196,3561 +42900,3455 @@ dffeas \soc_inst|m0_1|u_logic|Jl93z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jl93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nag3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jl93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jl93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nag3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nag3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y24_N59
-dffeas \soc_inst|m0_1|u_logic|J773z4 (
+// Location: MLABCELL_X15_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nag3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Gfg3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Gfg3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nag3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~6_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .lut_mask = 64'h000A00000000000C;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X13_Y18_N55
+dffeas \soc_inst|m0_1|u_logic|Dng3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J773z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dng3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J773z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J773z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~7 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~7_combout  = ( \soc_inst|m0_1|u_logic|J773z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Jl93z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J773z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Jl93z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jl93z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|J773z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~7_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~7 .lut_mask = 64'h0000000009080100;
-defparam \soc_inst|m0_1|u_logic|W21wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dng3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dng3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y22_N13
-dffeas \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE (
+// Location: FF_X21_Y19_N8
+dffeas \soc_inst|m0_1|u_logic|Hqg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Hqg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hqg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hqg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z52xx4~0 (
+// Location: MLABCELL_X15_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z52xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Hqg3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Dng3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dng3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hqg3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z52xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .lut_mask = 64'h0000000010001000;
-defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .lut_mask = 64'h0000302200000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~8 (
+// Location: MLABCELL_X15_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|W21wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Z52xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Cao2z4~q )))) # (\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & (\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cao2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Hk0wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|S61xx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Rdg3z4~q ))) # (\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (\soc_inst|m0_1|u_logic|Pwg3z4~q  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rdg3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cao2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|W21wx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z52xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rdg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pwg3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~8 .lut_mask = 64'h8ACF000000000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .lut_mask = 64'hA2F3000000000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfawx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Kfawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & \soc_inst|m0_1|u_logic|I6z2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfawx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X15_Y16_N17
+dffeas \soc_inst|m0_1|u_logic|Zjg3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zjg3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .lut_mask = 64'hF0F0F0F000F000F0;
-defparam \soc_inst|m0_1|u_logic|Kfawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zjg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y24_N8
-dffeas \soc_inst|m0_1|u_logic|N8o2z4 (
+// Location: FF_X16_Y18_N55
+dffeas \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N8o2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N8o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N8o2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X13_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Zjg3z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Zjg3z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zjg3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .lut_mask = 64'h0000000000A20080;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y26_N20
-dffeas \soc_inst|m0_1|u_logic|Z523z4~DUPLICATE (
+// Location: FF_X15_Y16_N20
+dffeas \soc_inst|m0_1|u_logic|Eyg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z523z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Eyg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z523z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z523z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eyg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eyg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~1 (
+// Location: LABCELL_X13_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xi2xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|N8o2z4~q  & ( \soc_inst|m0_1|u_logic|Z523z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|N8o2z4~q  & ( !\soc_inst|m0_1|u_logic|Z523z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N8o2z4~q  & ( !\soc_inst|m0_1|u_logic|Z523z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  $ 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xi2xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Eyg3z4~q  & (!\soc_inst|m0_1|u_logic|M1j2z4~q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|N8o2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z523z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Eyg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~1 .lut_mask = 64'h4080008040000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .lut_mask = 64'h0080000000000000;
+defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y26_N44
-dffeas \soc_inst|m0_1|u_logic|I113z4 (
+// Location: FF_X16_Y18_N8
+dffeas \soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I113z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I113z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I113z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y23_N44
-dffeas \soc_inst|m0_1|u_logic|O403z4~DUPLICATE (
+// Location: FF_X13_Y18_N11
+dffeas \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O403z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O403z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~5 (
+// Location: LABCELL_X13_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|I113z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I113z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O403z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~5 .lut_mask = 64'h2020000022000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .lut_mask = 64'h00A00000C0000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y26_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jbu2z4~feeder (
+// Location: LABCELL_X13_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ltg3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jbu2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Ltg3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Bh0wx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jbu2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ltg3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jbu2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jbu2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Jbu2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ltg3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ltg3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ltg3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y26_N49
-dffeas \soc_inst|m0_1|u_logic|Jbu2z4 (
+// Location: FF_X13_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Ltg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jbu2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ltg3z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ltg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jbu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jbu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ltg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ltg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y26_N26
-dffeas \soc_inst|m0_1|u_logic|Skv2z4 (
+// Location: LABCELL_X13_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avg3z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Avg3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Bh0wx4~1_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Avg3z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Avg3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Avg3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Avg3z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X13_Y19_N19
+dffeas \soc_inst|m0_1|u_logic|Avg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Avg3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Skv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Avg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Skv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Avg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Avg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~0 (
+// Location: LABCELL_X13_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Skv2z4~q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Jbu2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Avg3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Ltg3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jbu2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Skv2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ltg3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Avg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~0 .lut_mask = 64'h1010110000000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .lut_mask = 64'h0000CA0000000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X16_Y18_N40
+dffeas \soc_inst|m0_1|u_logic|Kig3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kig3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kig3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kig3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y26_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|If33z4~feeder (
+// Location: LABCELL_X13_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ccg3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|If33z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Ccg3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Bh0wx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|If33z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ccg3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|If33z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|If33z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|If33z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ccg3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ccg3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ccg3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y26_N23
-dffeas \soc_inst|m0_1|u_logic|If33z4 (
+// Location: FF_X13_Y20_N25
+dffeas \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|If33z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ccg3z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|If33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|If33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|If33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N43
-dffeas \soc_inst|m0_1|u_logic|Ay53z4 (
+// Location: LABCELL_X16_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hk0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Kig3z4~q  & ( \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kig3z4~q  & ( !\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kig3z4~q  & ( !\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kig3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .lut_mask = 64'h0300010002000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y19_N43
+dffeas \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ay53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ay53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ay53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~3 (
+// Location: LABCELL_X22_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|If33z4~q  & ( \soc_inst|m0_1|u_logic|Ay53z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|If33z4~q  & ( !\soc_inst|m0_1|u_logic|Ay53z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|If33z4~q  & ( !\soc_inst|m0_1|u_logic|Ay53z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~74  ))
+// \soc_inst|m0_1|u_logic|Add5~22  = CARRY(( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~74  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|If33z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ay53z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~74 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~22 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~21 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~49 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~49_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~22  ))
+// \soc_inst|m0_1|u_logic|Add5~50  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~22  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~22 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~50 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add5~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~49 .lut_mask = 64'h00008877000000F0;
+defparam \soc_inst|m0_1|u_logic|Add5~49 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ql0wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ql0wx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add3~65_sumout  & ( (((\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~49_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add3~65_sumout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~49_sumout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add3~65_sumout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~49_sumout )) # (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add3~65_sumout  & ( (\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~49_sumout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add3~65_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~3 .lut_mask = 64'h0022000200200000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ql0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ql0wx4 .lut_mask = 64'h003355770F3F5F7F;
+defparam \soc_inst|m0_1|u_logic|Ql0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N53
-dffeas \soc_inst|m0_1|u_logic|Ro43z4 (
+// Location: MLABCELL_X21_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xvjvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xvjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( \soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( \soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .lut_mask = 64'h4545EFEF4500EF00;
+defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X21_Y12_N32
+dffeas \soc_inst|m0_1|u_logic|L7p2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ro43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|L7p2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ro43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ro43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L7p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L7p2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N37
-dffeas \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE (
+// Location: FF_X13_Y18_N10
+dffeas \soc_inst|m0_1|u_logic|Olg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Olg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Olg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Olg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~2 (
+// Location: MLABCELL_X15_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ro43z4~q  & ( \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ro43z4~q  & ( !\soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ro43z4~q  & ( !\soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Xu82z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Olg3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Zjg3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ro43z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zjg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Olg3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu82z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~2 .lut_mask = 64'h0404000404000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .lut_mask = 64'h00000000A8080000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y22_N1
-dffeas \soc_inst|m0_1|u_logic|Y6o2z4 (
+// Location: FF_X12_Y19_N50
+dffeas \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pwg3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y6o2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y6o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y6o2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~4 (
+// Location: LABCELL_X12_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uw82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Y6o2z4~q  & ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y6o2z4~q  & ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y6o2z4~q  & ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  $ 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Uw82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Y6o2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uw82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~4 .lut_mask = 64'h8008800000080000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~6 (
+// Location: FF_X16_Y18_N56
+dffeas \soc_inst|m0_1|u_logic|Vgg3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vgg3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vgg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgg3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|W21wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|W21wx4~1_combout  & (!\soc_inst|m0_1|u_logic|W21wx4~5_combout  & 
-// (!\soc_inst|m0_1|u_logic|W21wx4~0_combout  & !\soc_inst|m0_1|u_logic|W21wx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xu82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Kig3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vgg3z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Kig3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Vgg3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W21wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W21wx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W21wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W21wx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W21wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vgg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kig3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4~6 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|W21wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .lut_mask = 64'h0504000000040000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfawx4~1 (
+// Location: LABCELL_X13_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kfawx4~0_combout  & ( \soc_inst|m0_1|u_logic|W21wx4~6_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|W21wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Kfawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~6_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Xu82z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ltg3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Avg3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kfawx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ltg3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Avg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu82z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .lut_mask = 64'h00002F2F00002FFF;
-defparam \soc_inst|m0_1|u_logic|Kfawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .lut_mask = 64'h0C000A0000000000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~69 (
+// Location: MLABCELL_X15_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~66  ))
-// \soc_inst|m0_1|u_logic|Add5~70  = CARRY(( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~66  ))
+// \soc_inst|m0_1|u_logic|Xu82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Xu82z4~2_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Eyg3z4~q  & (!\soc_inst|m0_1|u_logic|Xu82z4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Uw82z4~0_combout  & !\soc_inst|m0_1|u_logic|Xu82z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xu82z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xu82z4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Uw82z4~0_combout  & !\soc_inst|m0_1|u_logic|Xu82z4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Eyg3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xu82z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uw82z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xu82z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xu82z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~66 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~69_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~70 ),
+	.combout(\soc_inst|m0_1|u_logic|Xu82z4~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~69 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~69 .lut_mask = 64'h0000FF3300005FA0;
-defparam \soc_inst|m0_1|u_logic|Add5~69 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .lut_mask = 64'hC000000040000000;
+defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~89 (
+// Location: MLABCELL_X21_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fj0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~94  ))
-// \soc_inst|m0_1|u_logic|Add3~90  = CARRY(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~94  ))
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Tzg3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Dmvwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Tzg3z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xu82z4~3_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~94 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~89_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~90 ),
+	.combout(\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~89 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~89 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~89 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .lut_mask = 64'hAAAACCFFAAAACC0F;
+defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vpovx4 (
+// Location: LABCELL_X17_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vpovx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~89_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~69_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~89_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~69_sumout )) # (\soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~89_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~69_sumout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~89_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~69_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|M9awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  
+// ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~89_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|M9awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vpovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vpovx4 .lut_mask = 64'h030303FF575757FF;
-defparam \soc_inst|m0_1|u_logic|Vpovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M9awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M9awx4~0 .lut_mask = 64'hAAAAFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|M9awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eijvx4~0 (
+// Location: LABCELL_X16_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9awx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eijvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( \soc_inst|m0_1|u_logic|Vpovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( \soc_inst|m0_1|u_logic|Vpovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ym93z4~q  & ( !\soc_inst|m0_1|u_logic|Vpovx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ym93z4~q  & ( !\soc_inst|m0_1|u_logic|Vpovx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dkx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|M9awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|M9awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( 
+// \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M9awx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .lut_mask = 64'h2323EFEF2300EF00;
-defparam \soc_inst|m0_1|u_logic|Eijvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M9awx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M9awx4~1 .lut_mask = 64'h00730073007300FF;
+defparam \soc_inst|m0_1|u_logic|M9awx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y16_N49
-dffeas \soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Eijvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X22_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~53 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~50  ))
+// \soc_inst|m0_1|u_logic|Add5~54  = CARRY(( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~50  ))
 
-// Location: FF_X33_Y23_N14
-dffeas \soc_inst|m0_1|u_logic|Rbo2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rbo2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~50 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~54 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rbo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~53 .lut_mask = 64'h0000FF0F00007788;
+defparam \soc_inst|m0_1|u_logic|Add5~53 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hs92z4~0 (
+// Location: MLABCELL_X21_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ug0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hs92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cao2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ug0wx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add3~61_sumout  & ( (((\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~53_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add3~61_sumout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~53_sumout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add3~61_sumout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~53_sumout )) # (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add3~61_sumout  & ( (\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~53_sumout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cao2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add3~61_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hs92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .lut_mask = 64'h0200000000000000;
-defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y26_N19
-dffeas \soc_inst|m0_1|u_logic|Z523z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z523z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z523z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z523z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ug0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ug0wx4 .lut_mask = 64'h000F333F555F777F;
+defparam \soc_inst|m0_1|u_logic|Ug0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y26_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~1 (
+// Location: MLABCELL_X21_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M0kvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kq92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Z523z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|If33z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|M0kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( \soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( \soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|If33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z523z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kq92z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M0kvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .lut_mask = 64'h00000000CA000000;
-defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y23_N43
-dffeas \soc_inst|m0_1|u_logic|O403z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O403z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O403z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O403z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .lut_mask = 64'h4545EFEF4500EF00;
+defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y26_N43
-dffeas \soc_inst|m0_1|u_logic|I113z4~DUPLICATE (
+// Location: FF_X21_Y12_N37
+dffeas \soc_inst|m0_1|u_logic|Tzg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|M0kvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I113z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Tzg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I113z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I113z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tzg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tzg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~2 (
+// Location: LABCELL_X13_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kq92z4~2_combout  = ( !\soc_inst|m0_1|u_logic|O403z4~q  & ( \soc_inst|m0_1|u_logic|I113z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O403z4~q  & ( !\soc_inst|m0_1|u_logic|I113z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O403z4~q  & ( !\soc_inst|m0_1|u_logic|I113z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q )) 
+// # (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|O403z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I113z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kq92z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .lut_mask = 64'h5000400010000000;
-defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .lut_mask = 64'h9080000010000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~0 (
+// Location: LABCELL_X13_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kq92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ay53z4~q  & ( \soc_inst|m0_1|u_logic|Ro43z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-//  & \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ay53z4~q  & ( !\soc_inst|m0_1|u_logic|Ro43z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ay53z4~q  & ( !\soc_inst|m0_1|u_logic|Ro43z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Hk0wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Xi2xx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Hk0wx4~0_combout  & !\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ay53z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ro43z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hk0wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hk0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kq92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .lut_mask = 64'h0404040000040000;
-defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~3 (
+// Location: LABCELL_X16_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kq92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Kq92z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Kq92z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hs92z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kq92z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rbo2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hk0wx4~combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rbo2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hs92z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kq92z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kq92z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kq92z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kq92z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .lut_mask = 64'hD000000000000000;
-defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hk0wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Hk0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U11wx4~0 (
+// Location: LABCELL_X13_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wh0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U11wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( \soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( \soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kq92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wh0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & !\soc_inst|m0_1|u_logic|M9awx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|M9awx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kq92z4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U11wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U11wx4~0 .lut_mask = 64'hCFC5CFC5CFC5CAC0;
-defparam \soc_inst|m0_1|u_logic|U11wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .lut_mask = 64'h0303000030300000;
+defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G11wx4~1 (
+// Location: LABCELL_X18_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ri0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G11wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|M9awx4~1_combout ) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~1_combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|M9awx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|M9awx4~1_combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G11wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ri0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G11wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G11wx4~1 .lut_mask = 64'h0A050A055FAF5FAF;
-defparam \soc_inst|m0_1|u_logic|G11wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .lut_mask = 64'h00AA55FF0055AAFF;
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G11wx4~0 (
+// Location: LABCELL_X18_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ri0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G11wx4~0_combout  = ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( \soc_inst|m0_1|u_logic|G11wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G11wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ri0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Pdi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G11wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ri0wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G11wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G11wx4~0 .lut_mask = 64'h00008F880000FFFF;
-defparam \soc_inst|m0_1|u_logic|G11wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .lut_mask = 64'h2232003033333333;
+defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4 (
+// Location: LABCELL_X13_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bh0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W21wx4~combout  = ( \soc_inst|m0_1|u_logic|W21wx4~8_combout  & ( \soc_inst|m0_1|u_logic|W21wx4~6_combout  ) )
+// \soc_inst|m0_1|u_logic|Bh0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ri0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hk0wx4~combout  & !\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ri0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wh0wx4~0_combout  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W21wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bh0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W21wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W21wx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|W21wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .lut_mask = 64'hFF00550000000000;
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~1 (
+// Location: MLABCELL_X28_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nvdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qz0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W21wx4~combout  & \soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W21wx4~combout  & (((!\soc_inst|m0_1|u_logic|U11wx4~0_combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|W21wx4~combout  & (!\soc_inst|m0_1|u_logic|U11wx4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W21wx4~combout  & (((!\soc_inst|m0_1|u_logic|U11wx4~0_combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|W21wx4~combout  & (!\soc_inst|m0_1|u_logic|U11wx4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W21wx4~combout  & \soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Nvdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zudwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .lut_mask = 64'h00AA0CAE0CAE00AA;
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~2 (
+// Location: MLABCELL_X25_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qz0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qz0wx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qz0wx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qz0wx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Xtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Asdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xtdwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Asdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xtdwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Asdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xtdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .lut_mask = 64'hC000C0000000C000;
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .lut_mask = 64'h0000F0F00F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~0 (
+// Location: LABCELL_X36_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[20]~16 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~2_combout  & ( \soc_inst|m0_1|u_logic|I21wx4~combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hk0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qz0wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I21wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .lut_mask = 64'h0000000000005F7F;
-defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .lut_mask = 64'h0F030F030FCF0FCF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y22_N14
-dffeas \soc_inst|m0_1|u_logic|Sg83z4 (
+// Location: FF_X36_Y17_N58
+dffeas \soc_inst|m0_1|u_logic|I1h3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sg83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I1h3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sg83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sg83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I1h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I1h3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~2 (
+// Location: MLABCELL_X15_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nrvwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Jbu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sg83z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Jbu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sg83z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Jbu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|St0wx4~combout  = ( \soc_inst|m0_1|u_logic|St0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|St0wx4~5_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sg83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jbu2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|St0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .lut_mask = 64'h000A000800000008;
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|St0wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|St0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y22_N2
-dffeas \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE (
+// Location: LABCELL_X36_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[18]~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  = ( \soc_inst|m0_1|u_logic|St0wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|St0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .lut_mask = 64'h0B0B0B0B4F4F4F4F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y17_N22
+dffeas \soc_inst|m0_1|u_logic|Xyn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Xyn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xyn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xyn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~3 (
+// Location: LABCELL_X37_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[17]~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nrvwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Skv2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Skv2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Skv2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Yw0wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Yw0wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Skv2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .lut_mask = 64'h0044000400400000;
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .lut_mask = 64'h0000AAFF5500FFFF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N38
-dffeas \soc_inst|m0_1|u_logic|J5o2z4 (
+// Location: FF_X36_Y17_N52
+dffeas \soc_inst|m0_1|u_logic|B2i3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J5o2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B2i3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J5o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J5o2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nrvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jl93z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|J5o2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Jl93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|J5o2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .lut_mask = 64'h0000030000000202;
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B2i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B2i3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4~0 (
+// Location: LABCELL_X35_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[15]~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nrvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J773z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|N8o2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J773z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|N8o2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|N8o2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|J773z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .lut_mask = 64'h0000000080A08000;
-defparam \soc_inst|m0_1|u_logic|Nrvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .lut_mask = 64'hFF00FF00F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nrvwx4 (
+// Location: LABCELL_X37_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4a3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nrvwx4~combout  = ( !\soc_inst|m0_1|u_logic|Nrvwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nrvwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nrvwx4~3_combout  & !\soc_inst|m0_1|u_logic|Nrvwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|D4a3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nrvwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nrvwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nrvwx4~1_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nrvwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nrvwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nrvwx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Nrvwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y18_N14
-dffeas \soc_inst|m0_1|u_logic|Rdq2z4 (
+// Location: FF_X37_Y17_N20
+dffeas \soc_inst|m0_1|u_logic|D4a3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|D4a3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rdq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rdq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D4a3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D4a3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~0 (
+// Location: LABCELL_X33_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wj73z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rdq2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wj73z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Rdq2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ara3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~82  ))
+// \soc_inst|m0_1|u_logic|Add0~2  = CARRY(( !\soc_inst|m0_1|u_logic|Ara3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~82  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rdq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wj73z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~82 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~1_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~2 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~1 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dpmvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ara3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~1_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|D4a3z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ara3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add0~1_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|D4a3z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ara3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Ara3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D4a3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~1_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .lut_mask = 64'h080A080000000000;
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .lut_mask = 64'h5555FFFFF757F757;
+defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y22_N31
-dffeas \soc_inst|m0_1|u_logic|Fxv2z4 (
+// Location: FF_X33_Y15_N49
+dffeas \soc_inst|m0_1|u_logic|Ara3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fxv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ara3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fxv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fxv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ara3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ara3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y22_N52
-dffeas \soc_inst|m0_1|u_logic|Ccq2z4 (
+// Location: LABCELL_X33_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~73 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~2  ))
+// \soc_inst|m0_1|u_logic|Add0~74  = CARRY(( !\soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~2  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~2 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~73_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~74 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~73 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~73 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y21_N50
+dffeas \soc_inst|m0_1|u_logic|Xeo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ccq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xeo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ccq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ccq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xeo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xeo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~3 (
+// Location: LABCELL_X33_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Womvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey9wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ccq2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Fxv2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ccq2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Fxv2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Womvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xeo2z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Xeo2z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Xeo2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~73_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Gdo2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xeo2z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Add0~73_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((\soc_inst|m0_1|u_logic|Gdo2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fxv2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ccq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add0~73_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gdo2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .lut_mask = 64'h0000000050401000;
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Womvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Womvx4~0 .lut_mask = 64'h008DFF8DFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Womvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y24_N32
-dffeas \soc_inst|m0_1|u_logic|Wnu2z4 (
+// Location: FF_X33_Y21_N49
+dffeas \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wnu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wnu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wnu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~2 (
+// Location: LABCELL_X33_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey9wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wnu2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Ft83z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wnu2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Ft83z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wnu2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~29_sumout  = SUM(( !\soc_inst|m0_1|u_logic|S3i3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~74  ))
+// \soc_inst|m0_1|u_logic|Add0~30  = CARRY(( !\soc_inst|m0_1|u_logic|S3i3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~74  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ft83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wnu2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~74 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~29_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .lut_mask = 64'h000A000000080008;
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~29 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y18_N59
-dffeas \soc_inst|m0_1|u_logic|E0d3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E0d3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pomvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S3i3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~29_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|B2i3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S3i3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~29_sumout ))) 
+// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|B2i3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|S3i3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|S3i3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B2i3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Add0~29_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E0d3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .lut_mask = 64'h00FFFFFFB1FFB1FF;
+defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y25_N1
-dffeas \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE (
+// Location: FF_X33_Y15_N40
+dffeas \soc_inst|m0_1|u_logic|S3i3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Naq2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|S3i3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S3i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S3i3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~1 (
+// Location: LABCELL_X33_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|E0d3z4~q  & ( \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|E0d3z4~q  & ( !\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E0d3z4~q  & ( !\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|O0o2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~30  ))
+// \soc_inst|m0_1|u_logic|Add0~18  = CARRY(( !\soc_inst|m0_1|u_logic|O0o2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~30  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|E0d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~30 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~17_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~18 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .lut_mask = 64'h0003000200010000;
-defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~17 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4 (
+// Location: LABCELL_X33_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iomvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ey9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ey9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ey9wx4~3_combout  & !\soc_inst|m0_1|u_logic|Ey9wx4~2_combout )) ) )
+// \soc_inst|m0_1|u_logic|Iomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O0o2z4~q  & ( \soc_inst|m0_1|u_logic|Add0~17_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|Xyn2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O0o2z4~q  & ( \soc_inst|m0_1|u_logic|Add0~17_sumout  & ( ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Xyn2z4~q  & \soc_inst|m0_1|u_logic|Tna3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|O0o2z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~17_sumout  & ( (!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Xyn2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|O0o2z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~17_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Xyn2z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ey9wx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xyn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add0~17_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iomvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey9wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey9wx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Ey9wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .lut_mask = 64'h0FBFFFBF0F1FFF1F;
+defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxdwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y15_N32
+dffeas \soc_inst|m0_1|u_logic|O0o2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Iomvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|O0o2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O0o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O0o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~69 (
+// Location: LABCELL_X33_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~53 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~86  ))
-// \soc_inst|m0_1|u_logic|Add3~70  = CARRY(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~86  ))
+// \soc_inst|m0_1|u_logic|Add0~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jpa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~18  ))
+// \soc_inst|m0_1|u_logic|Add0~54  = CARRY(( !\soc_inst|m0_1|u_logic|Jpa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~18  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~86 ),
+	.cin(\soc_inst|m0_1|u_logic|Add0~18 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~69_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~70 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~53_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~54 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~69 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~69 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~69 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~53 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~53 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N16
-dffeas \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X39_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bomvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~53_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|L8m2z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~53_sumout ))) 
+// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|L8m2z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|L8m2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Add0~53_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Bomvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .lut_mask = 64'h00FFFFFFC5FFC5FF;
+defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y20_N14
-dffeas \soc_inst|m0_1|u_logic|F8u2z4 (
+// Location: FF_X39_Y20_N8
+dffeas \soc_inst|m0_1|u_logic|Jpa3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Bomvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F8u2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jpa3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F8u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jpa3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jpa3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y20_N59
-dffeas \soc_inst|m0_1|u_logic|Ohv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ohv2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~45 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Z2h3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~54  ))
+// \soc_inst|m0_1|u_logic|Add0~46  = CARRY(( !\soc_inst|m0_1|u_logic|Z2h3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~54  ))
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~54 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~45_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~46 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ohv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add0~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~45 .lut_mask = 64'h000000000000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add0~45 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~7 (
+// Location: LABCELL_X33_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|F8u2z4~q  & ( \soc_inst|m0_1|u_logic|Ohv2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|F8u2z4~q  & ( !\soc_inst|m0_1|u_logic|Ohv2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8u2z4~q  & ( !\soc_inst|m0_1|u_logic|Ohv2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Unmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~45_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|I1h3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z2h3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~45_sumout  & ( ((\soc_inst|m0_1|u_logic|I1h3z4~q  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~45_sumout  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # (\soc_inst|m0_1|u_logic|I1h3z4~q )) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z2h3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~45_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|I1h3z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|F8u2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ohv2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I1h3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add0~45_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~7 .lut_mask = 64'h0404000404000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .lut_mask = 64'h5F57FFF75557F5F7;
+defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y22_N5
-dffeas \soc_inst|m0_1|u_logic|Od83z4 (
+// Location: FF_X33_Y16_N55
+dffeas \soc_inst|m0_1|u_logic|Z2h3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Od83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z2h3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Od83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Od83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z2h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z2h3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N28
-dffeas \soc_inst|m0_1|u_logic|F473z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F473z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sjvwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sjvwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[16]~7_combout  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 )) # 
+// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][4]~q ))) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
+	.datad(!\soc_inst|switches_1|switch_store[1][4]~q ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Sjvwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F473z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F473z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .lut_mask = 64'h0000000000000C3F;
+defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y22_N8
-dffeas \soc_inst|m0_1|u_logic|Fi93z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fi93z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Sjvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I1h3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Z2h3z4~q ))) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Sjvwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Z2h3z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|I1h3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjvwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ntmwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fi93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fi93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .lut_mask = 64'hCFCF454500000000;
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~6 (
+// Location: MLABCELL_X28_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|F473z4~q  & ( \soc_inst|m0_1|u_logic|Fi93z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|F473z4~q  & ( !\soc_inst|m0_1|u_logic|Fi93z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F473z4~q  & ( !\soc_inst|m0_1|u_logic|Fi93z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Nvdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|F473z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fi93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ntmwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~6 .lut_mask = 64'h0201000102000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .lut_mask = 64'h00000000FFFF505F;
+defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~8 (
+// Location: LABCELL_X30_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Godwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Od83z4~q  & ( !\soc_inst|m0_1|u_logic|St0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|St0wx4~7_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Od83z4~q  & ( !\soc_inst|m0_1|u_logic|St0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & (!\soc_inst|m0_1|u_logic|St0wx4~7_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Godwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Godwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sndwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Godwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Sndwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|St0wx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Od83z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~6_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sndwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Godwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~8 .lut_mask = 64'hB000BB0000000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Godwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Godwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Godwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecawx4~0 (
+// Location: LABCELL_X24_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qmdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ecawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Qmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bdwwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Bdwwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ecawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .lut_mask = 64'hFF0FFF0F00000000;
-defparam \soc_inst|m0_1|u_logic|Ecawx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y23_N38
-dffeas \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .lut_mask = 64'h3300330033FF33FF;
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jq1xx4~0 (
+// Location: LABCELL_X24_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qmdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jq1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|M1j2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tkdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tkdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Qmdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tkdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .lut_mask = 64'h2000000000000000;
-defparam \soc_inst|m0_1|u_logic|Jq1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Qmdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y23_N10
-dffeas \soc_inst|m0_1|u_logic|Wu53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wu53z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X37_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fhc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fhc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Fhc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( \soc_inst|m0_1|u_logic|Fhc3z4~q  ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fhc3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wu53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wu53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .lut_mask = 64'h00FF00FF0CFC0CFC;
+defparam \soc_inst|m0_1|u_logic|Fhc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N16
-dffeas \soc_inst|m0_1|u_logic|Ec33z4~DUPLICATE (
+// Location: FF_X37_Y18_N40
+dffeas \soc_inst|m0_1|u_logic|Fhc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Fhc3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ec33z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Fhc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ec33z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fhc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fhc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~3 (
+// Location: LABCELL_X36_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxuvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ec33z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wu53z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q 
-//  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ec33z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Wu53z4~q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|G0w2z4~q  & \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wu53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ec33z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~3 .lut_mask = 64'h0000302000000020;
-defparam \soc_inst|m0_1|u_logic|St0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .lut_mask = 64'h0000000400000000;
+defparam \soc_inst|m0_1|u_logic|Oxuvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y23_N17
-dffeas \soc_inst|m0_1|u_logic|Nl43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nl43z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X35_Y21_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Ipb3z4~q )) 
+// # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Ipb3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( (\soc_inst|m0_1|u_logic|Ipb3z4~q  & !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( \soc_inst|m0_1|u_logic|Ipb3z4~q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nl43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nl43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .lut_mask = 64'h3333303022FF20F0;
+defparam \soc_inst|m0_1|u_logic|R1ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N4
-dffeas \soc_inst|m0_1|u_logic|Arn2z4 (
+// Location: FF_X35_Y21_N40
+dffeas \soc_inst|m0_1|u_logic|Ipb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Arn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ipb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Arn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ipb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~2 (
+// Location: LABCELL_X37_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dewwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Nl43z4~q  & ( \soc_inst|m0_1|u_logic|Arn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nl43z4~q  & ( !\soc_inst|m0_1|u_logic|Arn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nl43z4~q  & ( !\soc_inst|m0_1|u_logic|Arn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Dewwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ipb3z4~q  & ( (!\soc_inst|m0_1|u_logic|Kop2z4~q  & ((\soc_inst|m0_1|u_logic|Mjl2z4~q ) # (\soc_inst|m0_1|u_logic|Fhc3z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ipb3z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Fhc3z4~q  & (!\soc_inst|m0_1|u_logic|Kop2z4~q  & !\soc_inst|m0_1|u_logic|Mjl2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nl43z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Arn2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dewwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~2 .lut_mask = 64'h000A000200080000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .lut_mask = 64'h5000500050F050F0;
+defparam \soc_inst|m0_1|u_logic|Dewwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y26_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey03z4~feeder (
+// Location: MLABCELL_X34_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B2uvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ey03z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|B2uvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|J6i2z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ey03z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey03z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ey03z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ey03z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y26_N5
-dffeas \soc_inst|m0_1|u_logic|Ey03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ey03z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ey03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ey03z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X29_Y23_N34
-dffeas \soc_inst|m0_1|u_logic|K103z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K103z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K103z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K103z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|B2uvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y26_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~4 (
+// Location: LABCELL_X35_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U1uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~4_combout  = ( \soc_inst|m0_1|u_logic|K103z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ey03z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K103z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Ey03z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|U1uvx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ey03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|K103z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~4 .lut_mask = 64'h080C080000000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y20_N35
-dffeas \soc_inst|m0_1|u_logic|V223z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V223z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V223z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V223z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U1uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U1uvx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|U1uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N20
-dffeas \soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE (
+// Location: FF_X39_Y17_N41
+dffeas \soc_inst|m0_1|u_logic|Adt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [4]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Adt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Adt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Adt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~0 (
+// Location: LABCELL_X37_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dewwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|V223z4~q  & ( \soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|V223z4~q  & ( !\soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V223z4~q  & ( !\soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  $ (!\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Dewwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lz93z4~q  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Dewwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Adt2z4~q ) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Lz93z4~q  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Lz93z4~q  & ( !\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Dewwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|V223z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dewwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Adt2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dewwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~0 .lut_mask = 64'h6000200040000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .lut_mask = 64'h000044440F0F4F4F;
+defparam \soc_inst|m0_1|u_logic|Dewwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~1 (
+// Location: LABCELL_X37_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Psn2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Psn2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Gtmwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[4]~23_combout  & ( ((\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|Dewwx4~1_combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[4]~23_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|Dewwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Psn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dewwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~1 .lut_mask = 64'hA008000000080000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .lut_mask = 64'h0505050505FF05FF;
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4~5 (
+// Location: FF_X37_Y17_N2
+dffeas \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Csmvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|St0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jq1xx4~0_combout  & (!\soc_inst|m0_1|u_logic|St0wx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|St0wx4~2_combout  & !\soc_inst|m0_1|u_logic|St0wx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Gtmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|Taa3z4~q  & (!\soc_inst|m0_1|u_logic|Gtmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gtmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jq1xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|St0wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|St0wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|St0wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|St0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Taa3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gtmwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|St0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .lut_mask = 64'hCC0CCC0C44044404;
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecawx4~1 (
+// Location: MLABCELL_X28_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtmwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ecawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ecawx4~0_combout  & ( \soc_inst|m0_1|u_logic|St0wx4~5_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|St0wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ecawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|St0wx4~5_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Gtmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Godwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Qmdwx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ecawx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .lut_mask = 64'h00003B3B00003BFF;
-defparam \soc_inst|m0_1|u_logic|Ecawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .lut_mask = 64'h00000000BABFBABF;
+defparam \soc_inst|m0_1|u_logic|Gtmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gdawx4~0 (
+// Location: MLABCELL_X28_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tj0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gdawx4~0_combout  = ( \soc_inst|m0_1|u_logic|W7z2z4~q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|W7z2z4~q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  
-// ) ) )
+// \soc_inst|m0_1|u_logic|Tj0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|W6iwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gdawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tj0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .lut_mask = 64'hF0F0FFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Gdawx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~73 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~70  ))
-// \soc_inst|m0_1|u_logic|Add5~74  = CARRY(( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~70  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~70 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~73_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~74 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~73 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~73 .lut_mask = 64'h0000FF3300005FA0;
-defparam \soc_inst|m0_1|u_logic|Add5~73 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .lut_mask = 64'hFF0F0F0FFF000000;
+defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~85 (
+// Location: MLABCELL_X28_Y21_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tj0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~90  ))
-// \soc_inst|m0_1|u_logic|Add3~86  = CARRY(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~90  ))
+// \soc_inst|m0_1|u_logic|Tj0wx4~combout  = ( !\soc_inst|m0_1|u_logic|Tj0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
 	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~90 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~85_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~86 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~85 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~85 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~85 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y15_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bv0wx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bv0wx4~combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add3~85_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~73_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add3~85_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add3~85_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Add5~73_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add3~85_sumout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add3~85_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tj0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bv0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bv0wx4 .lut_mask = 64'h11111F1F11FF1FFF;
-defparam \soc_inst|m0_1|u_logic|Bv0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tj0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tj0wx4 .lut_mask = 64'h7077707700000000;
+defparam \soc_inst|m0_1|u_logic|Tj0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tmjvx4~0 (
+// Location: LABCELL_X13_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ia0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tmjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( \soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( \soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( !\soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( !\soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ia0wx4~combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tmjvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ia0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .lut_mask = 64'h2323EFEF2300EF00;
-defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y15_N38
-dffeas \soc_inst|m0_1|u_logic|H4p2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tmjvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H4p2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H4p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H4p2z4 .power_up = "low";
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ia0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ia0wx4 .lut_mask = 64'h707070707070F0F0;
+defparam \soc_inst|m0_1|u_logic|Ia0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U573z4~feeder (
+// Location: LABCELL_X13_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bh0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U573z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Bh0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tj0wx4~combout  & ( \soc_inst|m0_1|u_logic|Ia0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Bh0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~53_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bh0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ia0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U573z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U573z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U573z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|U573z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y19_N40
-dffeas \soc_inst|m0_1|u_logic|U573z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|U573z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U573z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U573z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U573z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .lut_mask = 64'h0000000000003033;
+defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y19_N17
-dffeas \soc_inst|m0_1|u_logic|Ozo2z4 (
+// Location: FF_X21_Y19_N44
+dffeas \soc_inst|m0_1|u_logic|Sog3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ozo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sog3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ozo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ozo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sog3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sog3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y20_N2
-dffeas \soc_inst|m0_1|u_logic|U9u2z4 (
+// Location: FF_X13_Y20_N26
+dffeas \soc_inst|m0_1|u_logic|Ccg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ccg3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U9u2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ccg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U9u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ccg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ccg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y18_N25
-dffeas \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE (
+// Location: FF_X15_Y15_N13
+dffeas \soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4~1 (
+// Location: MLABCELL_X21_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xcuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U9u2z4~q  & ( \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Ozo2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|U573z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9u2z4~q  & ( \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Ozo2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|U573z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|U9u2z4~q  & ( !\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Ozo2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|U573z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U9u2z4~q  & ( !\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Ozo2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|U573z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Dmvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ccg3z4~q  & ( \soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Sog3z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Dng3z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ccg3z4~q  & ( \soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Sog3z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Dng3z4~q ))))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ccg3z4~q  & ( !\soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Sog3z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Dng3z4~q ))))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ccg3z4~q  & ( !\soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Sog3z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Dng3z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U573z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ozo2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|U9u2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df83z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sog3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dng3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ccg3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .lut_mask = 64'h0C443F440C773F77;
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y20_N31
-dffeas \soc_inst|m0_1|u_logic|Zxo2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zxo2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zxo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zxo2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X31_Y20_N44
-dffeas \soc_inst|m0_1|u_logic|Djv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Djv2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Djv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .lut_mask = 64'h202A707A252F757F;
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y25_N26
-dffeas \soc_inst|m0_1|u_logic|Uj93z4 (
+// Location: FF_X15_Y15_N31
+dffeas \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uj93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uj93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uj93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y25_N20
-dffeas \soc_inst|m0_1|u_logic|Kwo2z4 (
+// Location: FF_X16_Y18_N7
+dffeas \soc_inst|m0_1|u_logic|Wrg3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kwo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wrg3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kwo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kwo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wrg3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wrg3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4~0 (
+// Location: MLABCELL_X21_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xcuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uj93z4~q  & ( \soc_inst|m0_1|u_logic|Kwo2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zxo2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Djv2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uj93z4~q  & ( \soc_inst|m0_1|u_logic|Kwo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Zxo2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Djv2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Uj93z4~q  & ( !\soc_inst|m0_1|u_logic|Kwo2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zxo2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~q ) # (\soc_inst|m0_1|u_logic|Djv2z4~q )))) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Uj93z4~q  & ( !\soc_inst|m0_1|u_logic|Kwo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zxo2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Djv2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Dmvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wrg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # ((\soc_inst|m0_1|u_logic|Hqg3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Gfg3z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wrg3z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # ((\soc_inst|m0_1|u_logic|Hqg3z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Gfg3z4~q )))) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wrg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Hqg3z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  
+// & (((\soc_inst|m0_1|u_logic|Gfg3z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wrg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  
+// & (\soc_inst|m0_1|u_logic|Hqg3z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Gfg3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zxo2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Djv2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uj93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kwo2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hqg3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gfg3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wrg3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .lut_mask = 64'h4700473347CC47FF;
-defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .lut_mask = 64'h024613578ACE9BDF;
+defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4 (
+// Location: MLABCELL_X21_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xcuwx4~combout  = ( \soc_inst|m0_1|u_logic|Xcuwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Xcuwx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~0_combout  
-// & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Dmvwx4~combout  = ( \soc_inst|m0_1|u_logic|Dmvwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Dmvwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dmvwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xcuwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xcuwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xcuwx4 .lut_mask = 64'h5151515140404040;
-defparam \soc_inst|m0_1|u_logic|Xcuwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y22_N8
-dffeas \soc_inst|m0_1|u_logic|S2p2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S2p2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S2p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S2p2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmvwx4 .lut_mask = 64'h3330333003000300;
+defparam \soc_inst|m0_1|u_logic|Dmvwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y21_N28
-dffeas \soc_inst|m0_1|u_logic|Td33z4 (
+// Location: FF_X16_Y19_N44
+dffeas \soc_inst|m0_1|u_logic|Poq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Td33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Poq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Td33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Td33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Poq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Poq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y23_N34
-dffeas \soc_inst|m0_1|u_logic|K423z4 (
+// Location: FF_X16_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Kev2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K423z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kev2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K423z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K423z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kev2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kev2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~1 (
+// Location: LABCELL_X16_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yj92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|K423z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Td33z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|K423z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Td33z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|D9uwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Kev2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Poq2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Td33z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Poq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kev2z4~q ),
 	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|K423z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yj92z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9uwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .lut_mask = 64'h5040000000400000;
-defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .lut_mask = 64'h0000404000005000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y18_N17
-dffeas \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE (
+// Location: FF_X17_Y22_N26
+dffeas \soc_inst|m0_1|u_logic|Anq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Anq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Anq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Anq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vl92z4~0 (
+// Location: LABCELL_X18_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vl92z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|D9uwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Anq2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bf93z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bf93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Anq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vl92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9uwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .lut_mask = 64'h0000000000008000;
-defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .lut_mask = 64'h00000000000000E2;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y20_N20
-dffeas \soc_inst|m0_1|u_logic|Z203z4 (
+// Location: FF_X18_Y21_N1
+dffeas \soc_inst|m0_1|u_logic|B173z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z203z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B173z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z203z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z203z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B173z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B173z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y20_N14
-dffeas \soc_inst|m0_1|u_logic|Tz03z4 (
+// Location: FF_X18_Y19_N14
+dffeas \soc_inst|m0_1|u_logic|Eqq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tz03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Eqq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tz03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tz03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eqq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eqq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~2 (
+// Location: LABCELL_X18_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yj92z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Z203z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tz03z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|D9uwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B173z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Eqq2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z203z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tz03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B173z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Eqq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yj92z4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .lut_mask = 64'h00C000A000000000;
-defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y25_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lw53z4~feeder (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Lw53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lw53z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9uwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lw53z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lw53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Lw53z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .lut_mask = 64'h00000000C000A000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y25_N53
-dffeas \soc_inst|m0_1|u_logic|Lw53z4 (
+// Location: FF_X18_Y22_N53
+dffeas \soc_inst|m0_1|u_logic|Ka83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lw53z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lw53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ka83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lw53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lw53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ka83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ka83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y25_N38
-dffeas \soc_inst|m0_1|u_logic|Cn43z4 (
+// Location: FF_X18_Y22_N59
+dffeas \soc_inst|m0_1|u_logic|B5u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cn43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B5u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cn43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cn43z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y25_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yj92z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lw53z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cn43z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Lw53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cn43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yj92z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .lut_mask = 64'h000000C0000000A0;
-defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B5u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B5u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~3 (
+// Location: LABCELL_X18_Y22_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yj92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Yj92z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Yj92z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yj92z4~1_combout  & (!\soc_inst|m0_1|u_logic|Vl92z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|S2p2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|D9uwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ka83z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|B5u2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S2p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yj92z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vl92z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yj92z4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yj92z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ka83z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B5u2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yj92z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9uwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .lut_mask = 64'hB000000000000000;
-defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .lut_mask = 64'h000C000A00000000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hy0wx4~0 (
+// Location: LABCELL_X22_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( \soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( \soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4p2z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|H4p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|D9uwx4~combout  = ( !\soc_inst|m0_1|u_logic|D9uwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D9uwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|D9uwx4~3_combout  & !\soc_inst|m0_1|u_logic|D9uwx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yj92z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D9uwx4~3_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D9uwx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|D9uwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9uwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .lut_mask = 64'hD8DDD8DDD888D8DD;
-defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9uwx4 .lut_mask = 64'hA0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|D9uwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y16_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fx0wx4~0 (
+// Location: MLABCELL_X28_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fx0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Gdawx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Xtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dmvwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|Dmvwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fx0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .lut_mask = 64'hFFC3EB28FFC30000;
-defparam \soc_inst|m0_1|u_logic|Fx0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .lut_mask = 64'hAA00AA00FF55FF55;
+defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M92xx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|M92xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|S2p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S2p2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M92xx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X21_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M92xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M92xx4~0 .lut_mask = 64'h0080000000000000;
-defparam \soc_inst|m0_1|u_logic|M92xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~3 (
+// Location: LABCELL_X16_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9p2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Lw53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Td33z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Lw53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Td33z4~q ) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|A9p2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Td33z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lw53z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A9p2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .lut_mask = 64'h0405000004000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A9p2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A9p2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|A9p2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zxo2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zxo2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) 
-// ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zxo2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X16_Y21_N4
+dffeas \soc_inst|m0_1|u_logic|A9p2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|A9p2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|A9p2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .lut_mask = 64'h8800200000002000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A9p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A9p2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Z203z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tz03z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Z203z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Tz03z4~q ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tz03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z203z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X18_Y14_N37
+dffeas \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .lut_mask = 64'h008A000000800000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y25_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~2 (
+// Location: MLABCELL_X21_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Kwo2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cn43z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Bjxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zfv2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|A9p2z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|A9p2z4~q ))))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|A9p2z4~q ))))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|A9p2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kwo2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cn43z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|A9p2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zfv2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .lut_mask = 64'h0000300000002200;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .lut_mask = 64'h5030503F5F305F3F;
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y23_N35
-dffeas \soc_inst|m0_1|u_logic|K423z4~DUPLICATE (
+// Location: FF_X17_Y14_N55
+dffeas \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zb83z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K423z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K423z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~0 (
+// Location: FF_X17_Y14_N49
+dffeas \soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ecp2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ozo2z4~q  & ( \soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ozo2z4~q  & ( !\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozo2z4~q  & ( !\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Bjxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Q273z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Q6u2z4~q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ozo2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|K423z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q273z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6u2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .lut_mask = 64'h6000400020000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .lut_mask = 64'h0F0F00FF33335555;
+defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~5 (
+// Location: MLABCELL_X21_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Yw0wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M92xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yw0wx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|Yw0wx4~1_combout  & !\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bjxwx4~combout  = ( \soc_inst|m0_1|u_logic|Bjxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bjxwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Bjxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M92xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yw0wx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yw0wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yw0wx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjxwx4 .lut_mask = 64'h3232323210101010;
+defparam \soc_inst|m0_1|u_logic|Bjxwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4 (
+// Location: MLABCELL_X28_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eudwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~combout  = ( \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|Eudwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|H1qwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|H1qwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .lut_mask = 64'hFF0FFF0FF000F000;
+defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iv0wx4~1 (
+// Location: MLABCELL_X28_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eudwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iv0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~73_sumout  & ( (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( 
-// (\soc_inst|m0_1|u_logic|Fx0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Eudwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Eudwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Eudwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Xtdwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fx0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iv0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .lut_mask = 64'h2030203000002030;
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .lut_mask = 64'h00AA00AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzdwx4~0 (
+// Location: MLABCELL_X28_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|E1ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
-	.datad(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .lut_mask = 64'h0F0F0F0F33333333;
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .lut_mask = 64'h00FF00FFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxdwx4~1 (
+// Location: LABCELL_X31_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mydwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yxdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Mydwx4~1_combout  = ( \soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mydwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Mydwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .lut_mask = 64'h3333333300FF00FF;
-defparam \soc_inst|m0_1|u_logic|Yxdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[9]~6 (
+// Location: LABCELL_X31_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & !\soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|D7iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mydwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qapwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eudwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Mydwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qapwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Eudwx4~1_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qapwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .lut_mask = 64'h0F000F000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .lut_mask = 64'hC0E0C0E0D0F0D0F0;
+defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y17_N46
-dffeas \soc_inst|m0_1|u_logic|Kxe3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kxe3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sx3wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sx3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( \soc_inst|m0_1|u_logic|Izpvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( \soc_inst|m0_1|u_logic|Izpvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( !\soc_inst|m0_1|u_logic|Izpvx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ze1wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Izpvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kxe3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kxe3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .lut_mask = 64'h00FE00AE00540004;
+defparam \soc_inst|m0_1|u_logic|Sx3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[8]~7 (
+// Location: LABCELL_X30_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imvvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|P12wx4~combout  & ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|P12wx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~combout  & ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Imvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|Wfuwx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.datac(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .lut_mask = 64'h00003333FFFF3333;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y16_N1
-dffeas \soc_inst|m0_1|u_logic|W3f3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W3f3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W3f3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W3f3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .lut_mask = 64'h0000000003030303;
+defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~9 (
+// Location: LABCELL_X36_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dhb3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~90  ))
-// \soc_inst|m0_1|u_logic|Add0~10  = CARRY(( !\soc_inst|m0_1|u_logic|Dhb3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~90  ))
+// \soc_inst|m0_1|u_logic|Ny3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Pdbwx4~combout )))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|R40wx4~combout  & ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Pdbwx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|R40wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~90 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~9_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~10 ),
+	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~9 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .lut_mask = 64'hCCFACC0ACCFACC0A;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nfb3z4~0 (
+// Location: LABCELL_X36_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Knvvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nfb3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o [7] )
+// \soc_inst|m0_1|u_logic|Knvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ny3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y16_N22
-dffeas \soc_inst|m0_1|u_logic|Nfb3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nfb3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nfb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nfb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hrmvx4~0 (
+// Location: LABCELL_X37_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sta2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hrmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dhb3z4~q  & ( \soc_inst|m0_1|u_logic|Nfb3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~9_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dhb3z4~q  & ( \soc_inst|m0_1|u_logic|Nfb3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~9_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dhb3z4~q  & ( !\soc_inst|m0_1|u_logic|Nfb3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~9_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dhb3z4~q  & ( !\soc_inst|m0_1|u_logic|Nfb3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~9_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Sta2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G0w2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~9_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nfb3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .lut_mask = 64'h7333FBBB7737FFBF;
-defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y16_N2
-dffeas \soc_inst|m0_1|u_logic|Dhb3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dhb3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dhb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dhb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .lut_mask = 64'h00000000F0000000;
+defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~77 (
+// Location: LABCELL_X37_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M5f3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~10  ))
-// \soc_inst|m0_1|u_logic|Add0~78  = CARRY(( !\soc_inst|m0_1|u_logic|M5f3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~10  ))
+// \soc_inst|m0_1|u_logic|T5mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wbk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|R1w2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~10 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~77_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~78 ),
+	.combout(\soc_inst|m0_1|u_logic|T5mvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~77 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~77 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~77 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .lut_mask = 64'h00000000FFFEFFFE;
+defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Armvx4~0 (
+// Location: LABCELL_X37_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Armvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5f3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|W3f3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M5f3z4~q  & ( \soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((\soc_inst|m0_1|u_logic|W3f3z4~q  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|M5f3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~77_sumout ) # (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M5f3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Add0~77_sumout  & \soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|T5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|T5mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # ((!\soc_inst|m0_1|u_logic|K3l2z4~q ) # ((!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Imvvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|T5mvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W3f3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Add0~77_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T5mvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Armvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Armvx4~0 .lut_mask = 64'h55F5FFF55577FF77;
-defparam \soc_inst|m0_1|u_logic|Armvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .lut_mask = 64'h0F0F0F0FFFEFFFEF;
+defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y13_N26
-dffeas \soc_inst|m0_1|u_logic|M5f3z4 (
+// Location: FF_X37_Y20_N58
+dffeas \soc_inst|m0_1|u_logic|Wbk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -46759,69 +46357,86 @@ dffeas \soc_inst|m0_1|u_logic|M5f3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M5f3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wbk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5f3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M5f3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wbk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wbk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~25 (
+// Location: FF_X39_Y18_N11
+dffeas \soc_inst|m0_1|u_logic|Uyv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uyv2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uyv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uyv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zx3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Aze3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~78  ))
-// \soc_inst|m0_1|u_logic|Add0~26  = CARRY(( !\soc_inst|m0_1|u_logic|Aze3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~78  ))
+// \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cr0xx4~1_combout  & ( \soc_inst|m0_1|u_logic|C34wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Cr0xx4~1_combout  & ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Kofwx4~0_combout  ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~78 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~25_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~26 ),
+	.combout(\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~25 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~25 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .lut_mask = 64'h000000000F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqmvx4~0 (
+// Location: MLABCELL_X39_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aze3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Aze3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Aze3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~25_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Kxe3z4~q ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Aze3z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~25_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Kxe3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|H6mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uyv2z4~q  & ( \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Uyv2z4~q  & ( \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Uyv2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Zx3wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (\soc_inst|m0_1|u_logic|R1w2z4~q ))) # (\soc_inst|m0_1|u_logic|Uaj2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kxe3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~25_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .lut_mask = 64'h3101FDCDFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .lut_mask = 64'h0000FFDFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y13_N19
-dffeas \soc_inst|m0_1|u_logic|Aze3z4 (
+// Location: FF_X39_Y18_N10
+dffeas \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -46830,237 +46445,300 @@ dffeas \soc_inst|m0_1|u_logic|Aze3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aze3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aze3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X42_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2twx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|I2twx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q  & (\soc_inst|m0_1|u_logic|B2uvx4~0_combout  & \soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I2twx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I2twx4~0 .lut_mask = 64'h00000000000A000A;
-defparam \soc_inst|m0_1|u_logic|I2twx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecowx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ecowx4~combout  = ( \soc_inst|m0_1|u_logic|Lz93z4~q  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (\soc_inst|m0_1|u_logic|B2uvx4~0_combout  & !\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ecowx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X37_Y20_N44
+dffeas \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ecowx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ecowx4 .lut_mask = 64'h0000000005000500;
-defparam \soc_inst|m0_1|u_logic|Ecowx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N15
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[9]~5 (
-// Equation(s):
-// \soc_inst|interconnect_1|HRDATA[9]~5_combout  = (\soc_inst|switches_1|read_enable~q  & !\soc_inst|switches_1|half_word_address [1])
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|switches_1|read_enable~q ),
-	.datad(!\soc_inst|switches_1|half_word_address [1]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[9]~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X37_Y20_N50
+dffeas \soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[9]~5 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[9]~5 .lut_mask = 64'h0F000F000F000F00;
-defparam \soc_inst|interconnect_1|HRDATA[9]~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N3
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[6]~9 (
+// Location: LABCELL_X30_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I2uvx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[6]~9_combout  = ( \soc_inst|interconnect_1|HRDATA[9]~5_combout  & ( (!\soc_inst|interconnect_1|mux_sel [2] & ((!\soc_inst|interconnect_1|mux_sel [1]) # ((!\soc_inst|interconnect_1|mux_sel [0] & 
-// !\soc_inst|switches_1|half_word_address [0])))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[9]~5_combout  & ( (!\soc_inst|interconnect_1|mux_sel [1] & !\soc_inst|interconnect_1|mux_sel [2]) ) )
+// \soc_inst|m0_1|u_logic|I2uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|K3l2z4~q  & (\soc_inst|m0_1|u_logic|T2owx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q 
+// ))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|switches_1|half_word_address [0]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [2]),
+	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[9]~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[6]~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[6]~9 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[6]~9 .lut_mask = 64'hCC00CC00EC00EC00;
-defparam \soc_inst|interconnect_1|HRDATA[6]~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .lut_mask = 64'h0200020000000000;
+defparam \soc_inst|m0_1|u_logic|I2uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N51
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[9]~15 (
+// Location: FF_X36_Y17_N37
+dffeas \soc_inst|m0_1|u_logic|B1a3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B1a3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B1a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B1a3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y18_N25
+dffeas \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4pwx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[9]~15_combout  = ( \soc_inst|ram_1|byte_select [1] & ( (\soc_inst|interconnect_1|HRDATA[6]~9_combout  & (((\soc_inst|interconnect_1|mux_sel [0] & \soc_inst|ram_1|read_cycle~q )) # (\soc_inst|interconnect_1|mux_sel [1]))) ) 
-// ) # ( !\soc_inst|ram_1|byte_select [1] & ( (\soc_inst|interconnect_1|HRDATA[6]~9_combout  & \soc_inst|interconnect_1|mux_sel [1]) ) )
+// \soc_inst|m0_1|u_logic|S4pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B1a3z4~q  & ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wbk2z4~q ) # 
+// ((\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1a3z4~q  & ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Wbk2z4~q ) # (\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B1a3z4~q  & ( !\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Wbk2z4~q ) # ((\soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1a3z4~q  & ( !\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[6]~9_combout ),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datad(!\soc_inst|ram_1|read_cycle~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|byte_select [1]),
+	.dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[9]~15_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[9]~15 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[9]~15 .lut_mask = 64'h1111111111151115;
-defparam \soc_inst|interconnect_1|HRDATA[9]~15 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .lut_mask = 64'h3333233323232223;
+defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y16_N2
-dffeas \soc_inst|switches_1|switch_store[0][9] (
+// Location: FF_X37_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|Qrp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[9]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][9]~q ),
+	.q(\soc_inst|m0_1|u_logic|Qrp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][9] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][9] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qrp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qrp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N0
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[9]~16 (
+// Location: FF_X37_Y20_N11
+dffeas \soc_inst|m0_1|u_logic|Aqp2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aqp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aqp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y19_N41
+dffeas \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bec3z4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[9]~16_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[9]~15_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[9]~15_combout  & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[0][9]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[9]~15_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[9]~15_combout  & (((\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|switches_1|switch_store[0][9]~q )))) ) )
+// \soc_inst|m0_1|u_logic|Bec3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Bec3z4~q  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q ) # (!\soc_inst|m0_1|u_logic|Zyovx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bec3z4~q  & ( 
+// \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Zyovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Bec3z4~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[9]~15_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[0][9]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[9]~16 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[9]~16 .lut_mask = 64'hA0A3A0A3ACAFACAF;
-defparam \soc_inst|interconnect_1|HRDATA[9]~16 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .lut_mask = 64'h0000FFFF0C0CFCFC;
+defparam \soc_inst|m0_1|u_logic|Bec3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mxa2z4~0 (
+// Location: FF_X39_Y19_N46
+dffeas \soc_inst|m0_1|u_logic|Bec3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bec3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bec3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bec3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bec3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ckuvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Cam2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ckuvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G0w2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
 	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .lut_mask = 64'h0000002000000000;
-defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Ckuvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0ivx4~0 (
+// Location: MLABCELL_X34_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F2ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & \soc_inst|m0_1|u_logic|Y9l2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Y9l2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9l2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Y9l2z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|F2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Pxb3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) 
+// # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( ((\soc_inst|m0_1|u_logic|Pxb3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( (\soc_inst|m0_1|u_logic|Pxb3z4~q  & !\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( \soc_inst|m0_1|u_logic|Pxb3z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
 	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
 	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .lut_mask = 64'h0CFF0F0F08AA0A0A;
-defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .lut_mask = 64'h5555505044FF40F0;
+defparam \soc_inst|m0_1|u_logic|F2ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y17_N53
-dffeas \soc_inst|m0_1|u_logic|Y9l2z4 (
+// Location: FF_X34_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|Pxb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -47068,1906 +46746,1765 @@ dffeas \soc_inst|m0_1|u_logic|Y9l2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pxb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y9l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y9l2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vve3z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Vve3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( \soc_inst|m0_1|u_logic|Vve3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Vve3z4~q )) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((!\soc_inst|m0_1|u_logic|J6i2z4~q ))) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .lut_mask = 64'h33F033F033333333;
-defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pxb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pxb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y17_N44
-dffeas \soc_inst|m0_1|u_logic|Vve3z4 (
+// Location: FF_X35_Y20_N1
+dffeas \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vve3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vve3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vve3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~0 (
+// Location: MLABCELL_X34_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D0wwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9l2z4~q  & (\soc_inst|m0_1|u_logic|Vve3z4~q  & (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Y9l2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Vve3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|D0wwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhd3z4~q  & ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhd3z4~q  & ( \soc_inst|m0_1|u_logic|Hub3z4~q  & ( (\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fed3z4~q  & (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fed3z4~q  & ((!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D0wwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .lut_mask = 64'h0000000003570357;
-defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .lut_mask = 64'h0000000007010300;
+defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~1 (
+// Location: MLABCELL_X34_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D0wwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khfwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Khfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[9]~16_combout )))) ) )
+// \soc_inst|m0_1|u_logic|D0wwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|D0wwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bec3z4~q  & \soc_inst|m0_1|u_logic|Pxb3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .lut_mask = 64'hA080A08000000000;
-defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~2 (
+// Location: MLABCELL_X34_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Khfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # ((\soc_inst|m0_1|u_logic|Kxe3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|I7owx4~combout  & (\soc_inst|m0_1|u_logic|Aze3z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Kxe3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|I90xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Hub3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kxe3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khfwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .lut_mask = 64'h000000008ACF8ACF;
-defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~0 .lut_mask = 64'hFCFCFCFC00000000;
+defparam \soc_inst|m0_1|u_logic|I90xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~3 (
+// Location: MLABCELL_X34_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B90xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khfwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Khfwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Yxdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Zndwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|B90xx4~0_combout  = ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .lut_mask = 64'h00000000CEDFCEDF;
-defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B90xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B90xx4~0 .lut_mask = 64'h00FF00FF33333333;
+defparam \soc_inst|m0_1|u_logic|B90xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mx0wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mx0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Khfwx4~3_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( 
-// \soc_inst|m0_1|u_logic|W6iwx4~combout  ) ) )
+// Location: FF_X36_Y19_N14
+dffeas \soc_inst|m0_1|u_logic|Zad3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zad3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zad3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zad3z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X36_Y19_N19
+dffeas \soc_inst|m0_1|u_logic|T7d3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T7d3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .lut_mask = 64'h3333BBBB0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T7d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T7d3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdtwx4 (
+// Location: FF_X36_Y19_N47
+dffeas \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y19_N20
+dffeas \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ruvvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qdtwx4~combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Zetwx4~combout  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  
-// & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Zetwx4~combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|G0w2z4~q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zetwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdtwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qdtwx4 .lut_mask = 64'h5055505505000500;
-defparam \soc_inst|m0_1|u_logic|Qdtwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvdwx4~0 (
+// Location: LABCELL_X36_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M2ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Yvtwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|M2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Vac3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) 
+// # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( ((\soc_inst|m0_1|u_logic|Vac3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & \soc_inst|m0_1|u_logic|Vac3z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( \soc_inst|m0_1|u_logic|Vac3z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .lut_mask = 64'h505050505F5F5F5F;
-defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .lut_mask = 64'h0F0F0A0A3F332A22;
+defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gftwx4~0 (
+// Location: FF_X36_Y19_N8
+dffeas \soc_inst|m0_1|u_logic|Vac3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vac3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vac3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mcc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gftwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cawwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Mcc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Mcc3z4~q  & ((!\soc_inst|m0_1|u_logic|Zyovx4~combout ) # (!\soc_inst|m0_1|u_logic|hwdata_o [1]))) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( 
+// ((\soc_inst|m0_1|u_logic|Zyovx4~combout  & \soc_inst|m0_1|u_logic|hwdata_o [1])) # (\soc_inst|m0_1|u_logic|Mcc3z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.datad(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Gftwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .lut_mask = 64'h03FF03FF00FC00FC;
+defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gftwx4~1 (
+// Location: FF_X36_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|Mcc3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mcc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mcc3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G10xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gftwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Gftwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Gftwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|G10xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mcc3z4~q  & ( \soc_inst|m0_1|u_logic|J9d3z4~q  & ( (\soc_inst|m0_1|u_logic|Vac3z4~q  & ((!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Pcd3z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Zad3z4~q ))) # (\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zad3z4~q  & !\soc_inst|m0_1|u_logic|Pcd3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mcc3z4~q  & ( !\soc_inst|m0_1|u_logic|J9d3z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zad3z4~q  & \soc_inst|m0_1|u_logic|Vac3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J9d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G10xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .lut_mask = 64'h0A0A0A0A5F5F5F5F;
-defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G10xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G10xx4~0 .lut_mask = 64'h0000020200000B02;
+defparam \soc_inst|m0_1|u_logic|G10xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5ewx4~0 (
+// Location: LABCELL_X36_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G10xx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M5ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qdtwx4~combout  & ( \soc_inst|m0_1|u_logic|Gftwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qdtwx4~combout  & ( !\soc_inst|m0_1|u_logic|Gftwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|G10xx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G10xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Gxk2z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .lut_mask = 64'hFFF0000000F00000;
-defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G10xx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G10xx4~1 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|G10xx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgfwx4~0 (
+// Location: LABCELL_X36_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tb0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pgfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5ewx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & \soc_inst|m0_1|u_logic|Qdtwx4~combout )) # (\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M5ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & \soc_inst|m0_1|u_logic|Qdtwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Tb0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zad3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|T7d3z4~q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T7d3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pgfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .lut_mask = 64'h003300330F3F0F3F;
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgfwx4~1 (
+// Location: MLABCELL_X34_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S00xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pgfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~18_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|S00xx4~0_combout  = ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fed3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lhd3z4~q  ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S00xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S00xx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|S00xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrdwx4~1 (
+// Location: LABCELL_X36_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fb0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Mrdwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Fb0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|J9d3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pcd3z4~q  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J9d3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .lut_mask = 64'h0F000F000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .lut_mask = 64'h555555550F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9awx4~0 (
+// Location: LABCELL_X36_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M9awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout  & 
-// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|I90xx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vac3z4~q ) # (!\soc_inst|m0_1|u_logic|Mcc3z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M9awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M9awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M9awx4~0 .lut_mask = 64'hF000F000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|M9awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~1 .lut_mask = 64'hFFCCFFCC00000000;
+defparam \soc_inst|m0_1|u_logic|I90xx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y20_N26
-dffeas \soc_inst|m0_1|u_logic|Olg3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Olg3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjuwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Cjuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fb0xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|B90xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|S00xx4~0_combout )) # (\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) # (\soc_inst|m0_1|u_logic|I90xx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fb0xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) # (\soc_inst|m0_1|u_logic|I90xx4~0_combout )) # (\soc_inst|m0_1|u_logic|B90xx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Olg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Olg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .lut_mask = 64'hF7F773F700000000;
+defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y21_N49
-dffeas \soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE (
+// Location: FF_X37_Y19_N53
+dffeas \soc_inst|m0_1|u_logic|Usl2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Usl2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Olg3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Olg3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Olg3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .lut_mask = 64'h3800000008000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Usl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Usl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y22_N43
-dffeas \soc_inst|m0_1|u_logic|Ltg3z4 (
+// Location: FF_X37_Y19_N11
+dffeas \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ltg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ltg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ltg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y22_N38
-dffeas \soc_inst|m0_1|u_logic|Avg3z4 (
+// Location: FF_X37_Y19_N14
+dffeas \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Avg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Avg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Avg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~4 (
+// Location: LABCELL_X37_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Avg3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ltg3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Avg3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Ltg3z4~q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Wzvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~q ) # ((\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Axm2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~q  & (\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Axm2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ltg3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Avg3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .lut_mask = 64'h00A8000800000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .lut_mask = 64'h20202020BABABABA;
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y20_N32
-dffeas \soc_inst|m0_1|u_logic|Kig3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kig3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kig3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kig3z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X37_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzvwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wzvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ipb3z4~q  & ( (\soc_inst|m0_1|u_logic|Fhc3z4~q  & ((!\soc_inst|m0_1|u_logic|N7c3z4~q ) # ((!\soc_inst|m0_1|u_logic|Uic3z4~q ) # (!\soc_inst|m0_1|u_logic|Wzvwx4~0_combout )))) ) )
 
-// Location: FF_X29_Y24_N26
-dffeas \soc_inst|m0_1|u_logic|Ccg3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ccg3z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ccg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ccg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .lut_mask = 64'h0000000000FE00FE;
+defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~2 (
+// Location: LABCELL_X37_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ccg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kig3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ccg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Kig3z4~q ) # (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Jjuwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|N7c3z4~q ) # (!\soc_inst|m0_1|u_logic|Uic3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kig3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ccg3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uic3z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .lut_mask = 64'h0000080A00000800;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y22_N56
-dffeas \soc_inst|m0_1|u_logic|Eyg3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eyg3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eyg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .lut_mask = 64'hEEEEEEEE00000000;
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xi2xx4~0 (
+// Location: LABCELL_X35_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Douvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xi2xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Eyg3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Douvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|G0w2z4~q  & 
+// \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Eyg3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .lut_mask = 64'h0000800000000000;
-defparam \soc_inst|m0_1|u_logic|Xi2xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y21_N19
-dffeas \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Douvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Douvx4~0 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Douvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y21_N8
-dffeas \soc_inst|m0_1|u_logic|Vgg3z4 (
+// Location: FF_X35_Y21_N8
+dffeas \soc_inst|m0_1|u_logic|X0c3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vgg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X0c3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vgg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vgg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X0c3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X0c3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~3 (
+// Location: LABCELL_X35_Y21_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W0ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Vgg3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Vgg3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Vgg3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|W0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Douvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Douvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|D9ovx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|X0c3z4~q )))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ((\soc_inst|m0_1|u_logic|D9ovx4~combout ) # (\soc_inst|m0_1|u_logic|X0c3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o 
+// [7] & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Douvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vgg3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .lut_mask = 64'h0202000202000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .lut_mask = 64'h0E0E0EEE0E0E00EE;
+defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y20_N7
-dffeas \soc_inst|m0_1|u_logic|Sog3z4 (
+// Location: FF_X35_Y21_N7
+dffeas \soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sog3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sog3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sog3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Sog3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Sog3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sog3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .lut_mask = 64'hC000008000000080;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~5 (
+// Location: LABCELL_X36_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Hk0wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hk0wx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Hk0wx4~2_combout  & !\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ylc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o [7] & ((\soc_inst|m0_1|u_logic|Ylc3z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o [7] & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Ylc3z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hk0wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hk0wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hk0wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xi2xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y21_N14
-dffeas \soc_inst|m0_1|u_logic|Dng3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dng3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dng3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dng3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .lut_mask = 64'h00FF00FF44EE44EE;
+defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y21_N19
-dffeas \soc_inst|m0_1|u_logic|Hqg3z4 (
+// Location: FF_X36_Y20_N38
+dffeas \soc_inst|m0_1|u_logic|Ylc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hqg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ylc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hqg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hqg3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~7 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hqg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Dng3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-//  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hqg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Dng3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Dng3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hqg3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~7_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .lut_mask = 64'h000000E000000020;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ylc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y21_N49
-dffeas \soc_inst|m0_1|u_logic|Pwg3z4 (
+// Location: FF_X36_Y20_N52
+dffeas \soc_inst|m0_1|u_logic|Q6l2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pwg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Q6l2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pwg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pwg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q6l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6l2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N40
-dffeas \soc_inst|m0_1|u_logic|Gfg3z4 (
+// Location: FF_X36_Y20_N8
+dffeas \soc_inst|m0_1|u_logic|H8l2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gfg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|H8l2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gfg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gfg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H8l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H8l2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y23_N5
-dffeas \soc_inst|m0_1|u_logic|Nag3z4 (
+// Location: FF_X36_Y20_N56
+dffeas \soc_inst|m0_1|u_logic|Z4l2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nag3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Z4l2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nag3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nag3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z4l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z4l2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~6 (
+// Location: LABCELL_X36_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A50xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Gfg3z4~q  & ( \soc_inst|m0_1|u_logic|Nag3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gfg3z4~q  & ( !\soc_inst|m0_1|u_logic|Nag3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gfg3z4~q  & ( !\soc_inst|m0_1|u_logic|Nag3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  $ 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|A50xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ylc3z4~q  & ( \soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H8l2z4~q  & (((\soc_inst|m0_1|u_logic|G8n2z4~q  & !\soc_inst|m0_1|u_logic|Q6l2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Z4l2z4~q ))) # (\soc_inst|m0_1|u_logic|H8l2z4~q  & (\soc_inst|m0_1|u_logic|G8n2z4~q  & (!\soc_inst|m0_1|u_logic|Q6l2z4~q  & \soc_inst|m0_1|u_logic|Z4l2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Gfg3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nag3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A50xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .lut_mask = 64'h0201000102000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A50xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A50xx4~0 .lut_mask = 64'h00000000000040F4;
+defparam \soc_inst|m0_1|u_logic|A50xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4~8 (
+// Location: LABCELL_X36_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ayzwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Rdg3z4~q  & (!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwg3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwg3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ayzwx4~combout  = ( \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Jkc3z4~q  & !\soc_inst|m0_1|u_logic|A50xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rdg3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hk0wx4~7_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pwg3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~6_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jkc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|A50xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .lut_mask = 64'hA0F0203000000000;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ayzwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ayzwx4 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Ayzwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M9awx4~1 (
+// Location: LABCELL_X36_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M9awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|M9awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( 
-// \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|M9awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ylc3z4~q  & ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( !\soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylc3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Ayzwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M9awx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M9awx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M9awx4~1 .lut_mask = 64'h0455045504555555;
-defparam \soc_inst|m0_1|u_logic|M9awx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .lut_mask = 64'hFFFFF0F000000000;
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y21_N5
-dffeas \soc_inst|m0_1|u_logic|Xyh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xyh3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xyh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xyh3z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X34_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvzwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wvzwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|I90xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout  & \soc_inst|m0_1|u_logic|Jjuwx4~0_combout )) ) )
 
-// Location: FF_X30_Y20_N1
-dffeas \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N10
-dffeas \soc_inst|m0_1|u_logic|Zfv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zfv2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X37_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kwa2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|R1w2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  
+// & \soc_inst|m0_1|u_logic|G0w2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zfv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zfv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .lut_mask = 64'h0000000000010000;
+defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~7 (
+// Location: LABCELL_X35_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nzhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Nzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (\soc_inst|m0_1|u_logic|Oar2z4~q  & !\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( \soc_inst|m0_1|u_logic|Oar2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Oar2z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( ((\soc_inst|m0_1|u_logic|Oar2z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zfv2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .lut_mask = 64'h1100010010000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .lut_mask = 64'h7755705033333030;
+defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y21_N26
-dffeas \soc_inst|m0_1|u_logic|Zb83z4 (
+// Location: FF_X35_Y18_N8
+dffeas \soc_inst|m0_1|u_logic|Oar2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zb83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Oar2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zb83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zb83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oar2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oar2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N44
-dffeas \soc_inst|m0_1|u_logic|Qg93z4 (
+// Location: FF_X35_Y18_N2
+dffeas \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qg93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qg93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qg93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N22
-dffeas \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE (
+// Location: FF_X35_Y18_N28
+dffeas \soc_inst|m0_1|u_logic|D4g3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|D4g3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~6 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qg93z4~q  
-// & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Qg93z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qg93z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q273z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~6_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .lut_mask = 64'h0044001000000010;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D4g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D4g3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~8 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~7_combout  & (\soc_inst|m0_1|u_logic|Zb83z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xyh3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~7_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xyh3z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Xyh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nn0wx4~7_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zb83z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~6_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X35_Y18_N56
+dffeas \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .lut_mask = 64'hD0D000D000000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4 (
+// Location: LABCELL_X36_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yauvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|Yauvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~q 
+//  & \soc_inst|m0_1|u_logic|Trq2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .lut_mask = 64'h0000000000100000;
+defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X892z4~0 (
+// Location: LABCELL_X35_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X892z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Xyh3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Gzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & 
+// ((\soc_inst|m0_1|u_logic|D9ovx4~combout ))) # (\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & \soc_inst|m0_1|u_logic|D9ovx4~combout )) # (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ((\soc_inst|m0_1|u_logic|D9ovx4~combout ))) # (\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & \soc_inst|m0_1|u_logic|D9ovx4~combout )) # (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xyh3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X892z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X892z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X892z4~0 .lut_mask = 64'h0000000020000000;
-defparam \soc_inst|m0_1|u_logic|X892z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .lut_mask = 64'h55F505F544C404C4;
+defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y20_N40
-dffeas \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE (
+// Location: FF_X35_Y18_N55
+dffeas \soc_inst|m0_1|u_logic|Wuq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Wuq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wuq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wuq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y20_N41
-dffeas \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE (
+// Location: FF_X36_Y18_N32
+dffeas \soc_inst|m0_1|u_logic|Mis2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ht53z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X25_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|A792z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ))))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A792z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A792z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A792z4~0 .lut_mask = 64'h000000000000AC00;
-defparam \soc_inst|m0_1|u_logic|A792z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y17_N35
-dffeas \soc_inst|m0_1|u_logic|M0i3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M0i3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mis2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M0i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M0i3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mis2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mis2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N32
-dffeas \soc_inst|m0_1|u_logic|G123z4 (
+// Location: FF_X35_Y18_N23
+dffeas \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G123z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G123z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G123z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y18_N35
-dffeas \soc_inst|m0_1|u_logic|Pa33z4 (
+// Location: FF_X35_Y19_N17
+dffeas \soc_inst|m0_1|u_logic|Vgs2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pa33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vgs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pa33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pa33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vgs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vgs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~1 (
+// Location: LABCELL_X35_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A792z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|G123z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Pa33z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Zxvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Vgs2z4~q  & ( (\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|D4g3z4~q  & (\soc_inst|m0_1|u_logic|Wuq2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Mis2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Vgs2z4~q  & ( (\soc_inst|m0_1|u_logic|D4g3z4~q  & (\soc_inst|m0_1|u_logic|Wuq2z4~q  & ((!\soc_inst|m0_1|u_logic|Mis2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Vgs2z4~q  & ( (\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|D4g3z4~q  & 
+// \soc_inst|m0_1|u_logic|Wuq2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G123z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pa33z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wuq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A792z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zxvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A792z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A792z4~1 .lut_mask = 64'h00000000B8000000;
-defparam \soc_inst|m0_1|u_logic|A792z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y20_N29
-dffeas \soc_inst|m0_1|u_logic|Tvh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tvh3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tvh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .lut_mask = 64'h0101030100000100;
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y20_N11
-dffeas \soc_inst|m0_1|u_logic|Ixh3z4 (
+// Location: FF_X35_Y18_N49
+dffeas \soc_inst|m0_1|u_logic|Dpc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ixh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dpc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ixh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~2 (
+// Location: LABCELL_X35_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dpc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A792z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tvh3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ixh3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Dpc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) # (\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & 
+// ((\soc_inst|m0_1|u_logic|Dpc3z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Dpc3z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tvh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ixh3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A792z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A792z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A792z4~2 .lut_mask = 64'h00000000C000A000;
-defparam \soc_inst|m0_1|u_logic|A792z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .lut_mask = 64'h00FF00FFA0AFA0AF;
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~3 (
+// Location: FF_X35_Y18_N50
+dffeas \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A792z4~3_combout  = ( !\soc_inst|m0_1|u_logic|A792z4~1_combout  & ( !\soc_inst|m0_1|u_logic|A792z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|X892z4~0_combout  & (!\soc_inst|m0_1|u_logic|A792z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|M0i3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zxvwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Zxvwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Oar2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X892z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A792z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|M0i3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A792z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A792z4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zxvwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A792z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A792z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A792z4~3 .lut_mask = 64'h8808000000000000;
-defparam \soc_inst|m0_1|u_logic|A792z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .lut_mask = 64'h0000000033330000;
+defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y22_N44
-dffeas \soc_inst|m0_1|u_logic|A9p2z4 (
+// Location: FF_X36_Y18_N41
+dffeas \soc_inst|m0_1|u_logic|Lns2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|A9p2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lns2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A9p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|A9p2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lns2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lns2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y22_N41
-dffeas \soc_inst|m0_1|u_logic|Pap2z4 (
+// Location: FF_X36_Y18_N5
+dffeas \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pap2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pap2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pap2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N43
-dffeas \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X35_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsa2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Cam2z4~q  & (\soc_inst|m0_1|u_logic|Uaj2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|R1w2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .lut_mask = 64'h0100000000000000;
+defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4~0 (
+// Location: LABCELL_X36_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Syhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bjxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q ) # (\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((\soc_inst|m0_1|u_logic|Pap2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|A9p2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Zfv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Pap2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|A9p2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Syhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|D9ovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A9p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pap2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zfv2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .lut_mask = 64'h1B1B00551B1BAAFF;
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .lut_mask = 64'h5454545454FC00FC;
+defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N2
-dffeas \soc_inst|m0_1|u_logic|Q6u2z4 (
+// Location: FF_X36_Y18_N56
+dffeas \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q6u2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q6u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y19_N22
-dffeas \soc_inst|m0_1|u_logic|Ecp2z4 (
+// Location: FF_X36_Y18_N11
+dffeas \soc_inst|m0_1|u_logic|Uls2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ecp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uls2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ecp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ecp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uls2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uls2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N23
-dffeas \soc_inst|m0_1|u_logic|Q273z4 (
+// Location: LABCELL_X36_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsc3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jsc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Jsc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q 
+// )) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( \soc_inst|m0_1|u_logic|Jsc3z4~q  ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .lut_mask = 64'h00FF00FF30FC30FC;
+defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X36_Y18_N50
+dffeas \soc_inst|m0_1|u_logic|Jsc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q273z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jsc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q273z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q273z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jsc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jsc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y21_N25
-dffeas \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE (
+// Location: FF_X35_Y19_N52
+dffeas \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4~1 (
+// Location: LABCELL_X36_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bjxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q273z4~q  & ( \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ecp2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Q6u2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q273z4~q  & ( \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ecp2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Q6u2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q273z4~q  & ( !\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ecp2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Q6u2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q273z4~q  & ( !\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Ecp2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Q6u2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xwvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Uls2z4~q  & (\soc_inst|m0_1|u_logic|Jsc3z4~q  
+// & !\soc_inst|m0_1|u_logic|Lns2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Jsc3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Lns2z4~q ) # (\soc_inst|m0_1|u_logic|Uls2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Uls2z4~q  & \soc_inst|m0_1|u_logic|Jsc3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q6u2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ecp2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Q273z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .lut_mask = 64'h0C443F440C773F77;
-defparam \soc_inst|m0_1|u_logic|Bjxwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .lut_mask = 64'h0101050100000100;
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjxwx4 (
+// Location: LABCELL_X36_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwvwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bjxwx4~combout  = ( \soc_inst|m0_1|u_logic|Bjxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Bjxwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Bjxwx4~1_combout  & 
-// ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q ) # (!\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tqc3z4~q  & ( (\soc_inst|m0_1|u_logic|Rym2z4~q  & !\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bjxwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjxwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bjxwx4 .lut_mask = 64'h5550555005000500;
-defparam \soc_inst|m0_1|u_logic|Bjxwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .lut_mask = 64'h0000000055005500;
+defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wo0wx4~0 (
+// Location: LABCELL_X36_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iazwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|A792z4~3_combout  & ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|L7p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A792z4~3_combout  & ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|L7p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|A792z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|L7p2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A792z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|L7p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Iazwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lns2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A792z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .lut_mask = 64'hAACFAAC0AACFAACF;
-defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .lut_mask = 64'h3333333300FF00FF;
+defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~21 (
+// Location: LABCELL_X35_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dizwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~74  ))
-// \soc_inst|m0_1|u_logic|Add5~22  = CARRY(( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~74  ))
+// \soc_inst|m0_1|u_logic|Dizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Vgs2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~74 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~21_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~22 ),
+	.combout(\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~21 .lut_mask = 64'h0000FF3300005FA0;
-defparam \soc_inst|m0_1|u_logic|Add5~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~49 (
+// Location: LABCELL_X35_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~22  ))
-// \soc_inst|m0_1|u_logic|Add5~50  = CARRY(( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~22  ))
+// \soc_inst|m0_1|u_logic|Tqzwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~22 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~49_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~50 ),
+	.combout(\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~49 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~49 .lut_mask = 64'h0000FF0F00007788;
-defparam \soc_inst|m0_1|u_logic|Add5~49 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .lut_mask = 64'hFFAAFFAA00000000;
+defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Un0wx4~0 (
+// Location: FF_X35_Y19_N53
+dffeas \soc_inst|m0_1|u_logic|Cps2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cps2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cps2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cps2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X36_Y18_N10
+dffeas \soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kizwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Un0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ ((\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Cps2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Un0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .lut_mask = 64'hFFED9684CCCC8484;
-defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .lut_mask = 64'h5555555500FF00FF;
+defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xl0wx4~1 (
+// Location: LABCELL_X36_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xl0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( \soc_inst|m0_1|u_logic|Un0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( \soc_inst|m0_1|u_logic|Un0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Arzwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jsc3z4~q ) # (!\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Un0wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xl0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .lut_mask = 64'h00000000AA220A02;
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .lut_mask = 64'hFFF0FFF000000000;
+defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzdwx4~1 (
+// Location: LABCELL_X35_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vzdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zndwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Zndwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Arzwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zxvwx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Mis2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mis2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .lut_mask = 64'h00550055FF55FF55;
-defparam \soc_inst|m0_1|u_logic|Vzdwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y21_N38
-dffeas \soc_inst|m0_1|u_logic|R1w2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R1w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R1w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .lut_mask = 64'hFF00FF00FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9vvx4~0 (
+// Location: LABCELL_X35_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pazwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K9vvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( (!\soc_inst|m0_1|u_logic|G0w2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+// \soc_inst|m0_1|u_logic|Pazwx4~combout  = ( \soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Arzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Arzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kizwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Arzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Arzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Kizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Iazwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & (\soc_inst|m0_1|u_logic|Iazwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Kizwx4~0_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pazwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .lut_mask = 64'h0000000020000000;
-defparam \soc_inst|m0_1|u_logic|K9vvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pazwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pazwx4 .lut_mask = 64'h088CCCCC88CCCCCC;
+defparam \soc_inst|m0_1|u_logic|Pazwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uzhvx4~0 (
+// Location: LABCELL_X35_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (\soc_inst|m0_1|u_logic|Ble3z4~q  & !\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( \soc_inst|m0_1|u_logic|Ble3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ble3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( ((\soc_inst|m0_1|u_logic|Ble3z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|J7zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pazwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Pab3z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pazwx4~combout  & ( !\soc_inst|m0_1|u_logic|Iazwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .lut_mask = 64'h7733703055555050;
-defparam \soc_inst|m0_1|u_logic|Uzhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .lut_mask = 64'hF0F0F0F0EE22EE22;
+defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y20_N50
-dffeas \soc_inst|m0_1|u_logic|Ble3z4 (
+// Location: FF_X34_Y20_N1
+dffeas \soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
 	.asdata(\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
@@ -48978,42 +48515,42 @@ dffeas \soc_inst|m0_1|u_logic|Ble3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ble3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ble3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ble3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lee3z4~0 (
+// Location: LABCELL_X36_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nnc3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lee3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( \soc_inst|m0_1|u_logic|Lee3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Lee3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Nnc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) # (\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & 
+// ((\soc_inst|m0_1|u_logic|Nnc3z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Nnc3z4~q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nnc3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .lut_mask = 64'h30FC30FC00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Lee3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .lut_mask = 64'h00FF00FFC0CFC0CF;
+defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y20_N56
-dffeas \soc_inst|m0_1|u_logic|Lee3z4 (
+// Location: FF_X36_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Nnc3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lee3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nnc3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -49022,2498 +48559,2694 @@ dffeas \soc_inst|m0_1|u_logic|Lee3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lee3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nnc3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lee3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lee3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nnc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nnc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~0 (
+// Location: FF_X34_Y20_N56
+dffeas \soc_inst|m0_1|u_logic|Ipn2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ipn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wva2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lee3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lee3z4~q  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  
-// & \soc_inst|m0_1|u_logic|Ble3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lee3z4~q  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Ble3z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lee3z4~q  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Ble3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Wva2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q 
+//  & !\soc_inst|m0_1|u_logic|Tdp2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .lut_mask = 64'h003300330033FFFF;
-defparam \soc_inst|m0_1|u_logic|Whlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .lut_mask = 64'h0000000002000000;
+defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N54
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[11]~17 (
+// Location: MLABCELL_X34_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B0ivx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[11]~17_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & (\soc_inst|ram_1|write_cycle~q  & !\soc_inst|ram_1|byte_select [1])) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ))) ) )
+// \soc_inst|m0_1|u_logic|B0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (\soc_inst|m0_1|u_logic|Ipn2z4~q  & !\soc_inst|m0_1|u_logic|Wva2z4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( \soc_inst|m0_1|u_logic|Ipn2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Ipn2z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( ((\soc_inst|m0_1|u_logic|Ipn2z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(!\soc_inst|ram_1|byte_select [1]),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[11]~17_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[11]~17 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[11]~17 .lut_mask = 64'h050F050F05000500;
-defparam \soc_inst|ram_1|data_to_memory[11]~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .lut_mask = 64'h7373730055555500;
+defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y16_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[19]~18_combout ,\soc_inst|ram_1|data_to_memory[11]~17_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X34_Y20_N55
+dffeas \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_bit_number = 11;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_bit_number = 11;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000C512600070210CB00FC0311A40000000000000000644000000000000000000000000";
+defparam \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y15_N56
-dffeas \soc_inst|ram_1|byte_select[2]~DUPLICATE (
+// Location: FF_X35_Y19_N35
+dffeas \soc_inst|m0_1|u_logic|Azs2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte2~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Azs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[2]~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[2]~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Azs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Azs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[19]~14 (
+// Location: FF_X36_Y20_N25
+dffeas \soc_inst|m0_1|u_logic|Svs2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Svs2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Svs2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y21_N37
+dffeas \soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gyvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~combout  & ( \soc_inst|m0_1|u_logic|R40wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~combout  & ( \soc_inst|m0_1|u_logic|R40wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nn0wx4~combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout 
-// ) ) ) )
+// \soc_inst|m0_1|u_logic|Gyvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Azs2z4~q  & \soc_inst|m0_1|u_logic|Svs2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Azs2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Bus2z4~q ) # (\soc_inst|m0_1|u_logic|Svs2z4~q ))) # (\soc_inst|m0_1|u_logic|Azs2z4~q  & (\soc_inst|m0_1|u_logic|Svs2z4~q  & \soc_inst|m0_1|u_logic|Bus2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gyvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .lut_mask = 64'h00005050AFAFFFFF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .lut_mask = 64'h0AAF0AAF0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N21
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[19]~18 (
+// Location: LABCELL_X35_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gyvwx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[19]~18_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & (\soc_inst|ram_1|write_cycle~q  & !\soc_inst|ram_1|byte_select[2]~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ))) ) )
+// \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gyvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nnc3z4~q  & (\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Lee3z4~q 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Gyvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nnc3z4~q  & \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ),
-	.datab(!\soc_inst|ram_1|write_cycle~q ),
-	.datac(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[19]~18_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[19]~18 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[19]~18 .lut_mask = 64'h1313131310101010;
-defparam \soc_inst|ram_1|data_to_memory[19]~18 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .lut_mask = 64'h0303030303020302;
+defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N33
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[11]~24 (
+// Location: LABCELL_X35_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[11]~24_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ) ) )
+// \soc_inst|m0_1|u_logic|B6pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lee3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Lee3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[11]~24 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[11]~24 .lut_mask = 64'hF0FFF0FF000F000F;
-defparam \soc_inst|interconnect_1|HRDATA[11]~24 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .lut_mask = 64'hFF00FF00F000F000;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~1 (
+// Location: LABCELL_X36_Y21_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mxa2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whlwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bge3z4~q  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[11]~24_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Bge3z4~q  & ( 
-// \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (\soc_inst|interconnect_1|HRDATA[11]~24_combout ) # (\soc_inst|m0_1|u_logic|G6owx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bge3z4~q  & ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|G6owx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & \soc_inst|m0_1|u_logic|Trq2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bge3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whlwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .lut_mask = 64'h5555000055FF00FF;
-defparam \soc_inst|m0_1|u_logic|Whlwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .lut_mask = 64'h0000000000200000;
+defparam \soc_inst|m0_1|u_logic|Mxa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~2 (
+// Location: FF_X35_Y21_N25
+dffeas \soc_inst|m0_1|u_logic|Y9l2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y9l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y9l2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[9]~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whlwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Whlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Whlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|She3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Whlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|She3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Whlwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whlwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .lut_mask = 64'hECFCECFC00000000;
-defparam \soc_inst|m0_1|u_logic|Whlwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .lut_mask = 64'h3333333300FF00FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[9]~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whlwx4~3 (
+// Location: LABCELL_X35_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whlwx4~3_combout  = ( \soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Whlwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Vzdwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Whlwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Vzdwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|I0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( (!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & \soc_inst|m0_1|u_logic|Y9l2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( \soc_inst|m0_1|u_logic|Y9l2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Y9l2z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Y9l2z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Whlwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .lut_mask = 64'h00CD00CD00EF00EF;
-defparam \soc_inst|m0_1|u_logic|Whlwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .lut_mask = 64'h0CFF08AA0F0F0A0A;
+defparam \soc_inst|m0_1|u_logic|I0ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bo0wx4~0 (
+// Location: FF_X35_Y21_N26
+dffeas \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X35_Y21_N43
+dffeas \soc_inst|m0_1|u_logic|Vve3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vve3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vve3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vve3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y21_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vve3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bo0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vve3z4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Vve3z4~q  & ((!\soc_inst|m0_1|u_logic|Zyovx4~combout ) # (\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  
+// & ( ((\soc_inst|m0_1|u_logic|Zyovx4~combout  & !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout )) # (\soc_inst|m0_1|u_logic|Vve3z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bo0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .lut_mask = 64'h0F00FFFF0F000F00;
-defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .lut_mask = 64'h30FF30FF00CF00CF;
+defparam \soc_inst|m0_1|u_logic|Vve3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N45
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[27]~19 (
+// Location: FF_X35_Y21_N44
+dffeas \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vve3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2f3z4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[27]~19_combout  = ( \soc_inst|m0_1|u_logic|Knvvx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Knvvx4~0_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & (!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|ram_1|write_cycle~q )) ) )
+// \soc_inst|m0_1|u_logic|H2f3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( \soc_inst|m0_1|u_logic|H2f3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
+// (\soc_inst|m0_1|u_logic|H2f3z4~q )) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((!\soc_inst|m0_1|u_logic|J6i2z4~q ))) ) )
 
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
-	.datab(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|write_cycle~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[27]~19_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[27]~19 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[27]~19 .lut_mask = 64'h0044004400770077;
-defparam \soc_inst|ram_1|data_to_memory[27]~19 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .lut_mask = 64'h55F055F055555555;
+defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y15_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[27]~19_combout ,\soc_inst|ram_1|data_to_memory[3]~20_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X35_Y21_N5
+dffeas \soc_inst|m0_1|u_logic|H2f3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|H2f3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_bit_number = 3;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_bit_number = 3;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000A28C8001D81602F018840FA701555555555555559860140500505000000050001410";
+defparam \soc_inst|m0_1|u_logic|H2f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H2f3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N54
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[3]~20 (
+// Location: LABCELL_X36_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhvvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[3]~20_combout  = ( \soc_inst|ram_1|write_cycle~q  & ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & !\soc_inst|ram_1|byte_select [0]) ) ) ) # ( 
-// \soc_inst|ram_1|write_cycle~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (\soc_inst|ram_1|byte_select [0]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ) ) ) )
+// \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q 
+//  & \soc_inst|m0_1|u_logic|G0w2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
-	.datac(!\soc_inst|ram_1|byte_select [0]),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|write_cycle~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[3]~20_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[3]~20 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[3]~20 .lut_mask = 64'h00003F3F00003030;
-defparam \soc_inst|ram_1|data_to_memory[3]~20 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .lut_mask = 64'h0000000400000000;
+defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mjlwx4~0 (
+// Location: LABCELL_X35_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mjlwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & 
-// \soc_inst|interconnect_1|HRDATA[25]~1_combout )) ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & 
-// ((\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout ))) ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|P0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & (((\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( ((\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mjlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .lut_mask = 64'hAAAAAAAA22AA0088;
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .lut_mask = 64'h50FF40CC55554444;
+defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kvtwx4 (
+// Location: FF_X35_Y21_N56
+dffeas \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X35_Y21_N20
+dffeas \soc_inst|m0_1|u_logic|Kkb3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kkb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X35_Y21_N14
+dffeas \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y21_N46
+dffeas \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kvtwx4~combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Whzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Kkb3z4~q  & (!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Kkb3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kkb3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Kkb3z4~q  & (!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kvtwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kvtwx4 .lut_mask = 64'h0333033330003000;
-defparam \soc_inst|m0_1|u_logic|Kvtwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .lut_mask = 64'h0004000D00040004;
+defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kw7wx4~0 (
+// Location: LABCELL_X35_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whzwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Duuwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Duuwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Whzwx4~1_combout  = ( \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Whzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|H2f3z4~q  ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .lut_mask = 64'h0F0F0F0FFFFF0000;
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .lut_mask = 64'h00000F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kw7wx4~1 (
+// Location: LABCELL_X35_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kw7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gftwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gftwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Kw7wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Fjzwx4~0_combout  = (!\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q )))
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Kw7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .lut_mask = 64'hFA00FA00FA00FA00;
+defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iutwx4~0 (
+// Location: LABCELL_X35_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yizwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iutwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xs7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kvtwx4~combout  & !\soc_inst|m0_1|u_logic|Kw7wx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xs7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kvtwx4~combout  & ((!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Yizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Azs2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Svs2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Azs2z4~q  & ( (\soc_inst|m0_1|u_logic|Svs2z4~q  & 
+// \soc_inst|m0_1|u_logic|Gyvwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .lut_mask = 64'hF050F050A000A000;
-defparam \soc_inst|m0_1|u_logic|Iutwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mjlwx4~1 (
+// Location: LABCELL_X35_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qlzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kvtwx4~combout  & ( (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & (\soc_inst|m0_1|u_logic|Mjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Iutwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Kvtwx4~combout  & ( (\soc_inst|m0_1|u_logic|Mjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Kkb3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Kkb3z4~q  & \soc_inst|m0_1|u_logic|Whzwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mjlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kvtwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .lut_mask = 64'h0F0A0F0A0C080C08;
-defparam \soc_inst|m0_1|u_logic|Mjlwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .lut_mask = 64'h00550055FF55FF55;
+defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bo0wx4 (
+// Location: LABCELL_X35_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mczwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bo0wx4~combout  = ( !\soc_inst|m0_1|u_logic|Bo0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bo0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rilwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Mczwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Yizwx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & \soc_inst|m0_1|u_logic|Yizwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bo0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bo0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bo0wx4 .lut_mask = 64'h005F00005F5F0000;
-defparam \soc_inst|m0_1|u_logic|Bo0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .lut_mask = 64'h000F000F50FF50FF;
+defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xl0wx4~0 (
+// Location: LABCELL_X35_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fczwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( \soc_inst|m0_1|u_logic|Xl0wx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Xl0wx4~1_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fczwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & (\soc_inst|m0_1|u_logic|Dizwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Kizwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Dizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xl0wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .lut_mask = 64'h0000000003070F0F;
-defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .lut_mask = 64'h003F003F0C3F0C3F;
+defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht53z4~feeder (
+// Location: LABCELL_X36_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ht53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|B6pwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Tqzwx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ht53z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht53z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ht53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ht53z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y20_N40
-dffeas \soc_inst|m0_1|u_logic|Ht53z4 (
+// Location: FF_X34_Y21_N5
+dffeas \soc_inst|m0_1|u_logic|Gcb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ht53z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ht53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gcb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ht53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ht53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gcb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gcb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Clzwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Clzwx4~0_combout  = (!\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Kss2z4~q ))) # (\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & (\soc_inst|m0_1|u_logic|Gcb3z4~q ))
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kss2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .lut_mask = 64'h03CF03CF03CF03CF;
+defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y18_N34
-dffeas \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE (
+// Location: FF_X34_Y21_N38
+dffeas \soc_inst|m0_1|u_logic|Jxs2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Jxs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jxs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jxs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~3 (
+// Location: MLABCELL_X34_Y21_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ht53z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ht53z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ihzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bus2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jxs2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ht53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5zwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T5zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ihzwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Yizwx4~0_combout  & (!\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & \soc_inst|m0_1|u_logic|Qlzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Yizwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .lut_mask = 64'h0000730008FFFFFF;
+defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|B6pwx4~2_combout  = ( \soc_inst|m0_1|u_logic|T5zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mczwx4~0_combout ))) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .lut_mask = 64'h0000320000000200;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .lut_mask = 64'h00000000F300F300;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~0 (
+// Location: LABCELL_X35_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G123z4~q  & ( \soc_inst|m0_1|u_logic|Ecp2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G123z4~q  & ( !\soc_inst|m0_1|u_logic|Ecp2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G123z4~q  & ( !\soc_inst|m0_1|u_logic|Ecp2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~q  $ (!\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|B6pwx4~3_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & \soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Mczwx4~0_combout  & !\soc_inst|m0_1|u_logic|Fczwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Mczwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Fczwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|G123z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ecp2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .lut_mask = 64'h6000200040000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .lut_mask = 64'h1F111F1111111111;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~4 (
+// Location: LABCELL_X35_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Ixh3z4~q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tvh3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|G2zwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pazwx4~combout  & ( (\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & (((\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & \soc_inst|m0_1|u_logic|B6pwx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|B6pwx4~3_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tvh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ixh3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .lut_mask = 64'h0C0A000000000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y20_N41
-dffeas \soc_inst|m0_1|u_logic|Yj43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yj43z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yj43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yj43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .lut_mask = 64'h010F010F00000000;
+defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~2 (
+// Location: MLABCELL_X34_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2zwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|A9p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q 
-//  & !\soc_inst|m0_1|u_logic|Yj43z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|A9p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Yj43z4~q ) # (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|G2zwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wvzwx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yj43z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|A9p2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .lut_mask = 64'h0000220200002000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y17_N34
-dffeas \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE (
+// Location: FF_X36_Y20_N53
+dffeas \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nr2xx4~0 (
+// Location: LABCELL_X36_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qzzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nr2xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G8n2z4~q  & ( (\soc_inst|m0_1|u_logic|Ayzwx4~combout ) # (\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|G8n2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ayzwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .lut_mask = 64'h2000000000000000;
-defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .lut_mask = 64'h505050505F5F5F5F;
+defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~1 (
+// Location: LABCELL_X37_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N10xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pap2z4~q  & ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pap2z4~q  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pap2z4~q  & ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|N10xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Usl2z4~q ) # (\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & \soc_inst|m0_1|u_logic|Usl2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pap2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .lut_mask = 64'h9000800010000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N10xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N10xx4~0 .lut_mask = 64'h0A0A0A0A5F5F5F5F;
+defparam \soc_inst|m0_1|u_logic|N10xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~5 (
+// Location: LABCELL_X37_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jzzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Nr2xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Nn0wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Nn0wx4~4_combout  & !\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jzzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Axm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Axm2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzvwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nn0wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nn0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nn0wx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oaawx4~0 (
+// Location: LABCELL_X36_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F40xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oaawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|I2t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|F40xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|Z4l2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|H8l2z4~q  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oaawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .lut_mask = 64'hFF0FFF0F00000000;
-defparam \soc_inst|m0_1|u_logic|Oaawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F40xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F40xx4~0 .lut_mask = 64'h3333333300FF00FF;
+defparam \soc_inst|m0_1|u_logic|F40xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oaawx4~1 (
+// Location: LABCELL_X37_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Czzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oaawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Oaawx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Nn0wx4~5_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nn0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Oaawx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Czzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N10xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|N10xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oaawx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .lut_mask = 64'h000000005D5D5DFF;
-defparam \soc_inst|m0_1|u_logic|Oaawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .lut_mask = 64'h133311BB11B311BB;
+defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~53 (
+// Location: LABCELL_X37_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kbzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~50  ))
-// \soc_inst|m0_1|u_logic|Add5~54  = CARRY(( !\soc_inst|m0_1|u_logic|M9awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~50  ))
+// \soc_inst|m0_1|u_logic|Kbzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( \soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( \soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & !\soc_inst|m0_1|u_logic|B90xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|I90xx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & \soc_inst|m0_1|u_logic|Fb0xx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|B90xx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~50 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~53_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~54 ),
+	.combout(\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~53 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~53 .lut_mask = 64'h0000FF0F00007788;
-defparam \soc_inst|m0_1|u_logic|Add5~53 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .lut_mask = 64'h002022227F777777;
+defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dpc3z4~0 (
+// Location: LABCELL_X37_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dpc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dpc3z4~q  & ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  ) ) # ( \soc_inst|m0_1|u_logic|Dpc3z4~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Zyovx4~combout ) # (!\soc_inst|m0_1|u_logic|J6i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dpc3z4~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (\soc_inst|m0_1|u_logic|Zyovx4~combout  & !\soc_inst|m0_1|u_logic|J6i2z4~q 
-// ) ) ) )
+// \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jjuwx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .lut_mask = 64'h0F00FFF00000FFFF;
-defparam \soc_inst|m0_1|u_logic|Dpc3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y16_N17
-dffeas \soc_inst|m0_1|u_logic|Dpc3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dpc3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dpc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dpc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kwa2z4~0 (
+// Location: LABCELL_X37_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Adzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|G0w2z4~q  & (\soc_inst|m0_1|u_logic|Cam2z4~q  
-// & \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Adzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|N10xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|N10xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|F40xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & \soc_inst|m0_1|u_logic|N10xx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .lut_mask = 64'h0000000100000000;
-defparam \soc_inst|m0_1|u_logic|Kwa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .lut_mask = 64'h000000AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nzhvx4~0 (
+// Location: LABCELL_X37_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdzwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & \soc_inst|m0_1|u_logic|Oar2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( \soc_inst|m0_1|u_logic|Oar2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Oar2z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout  & ( ((\soc_inst|m0_1|u_logic|Oar2z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hdzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~1_combout  & ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|I90xx4~0_combout ) # (\soc_inst|m0_1|u_logic|B90xx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .lut_mask = 64'h5F554C440F0F0C0C;
-defparam \soc_inst|m0_1|u_logic|Nzhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y16_N44
-dffeas \soc_inst|m0_1|u_logic|Oar2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Oar2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oar2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Oar2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .lut_mask = 64'h055505550F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bsvwx4~0 (
+// Location: LABCELL_X37_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bsvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oar2z4~q  & ( ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Dpc3z4~q )) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Oar2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Dpc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|I90xx4~2_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~1_combout  & ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .lut_mask = 64'h0505050537373737;
-defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I90xx4~2 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|I90xx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eudwx4~0 (
+// Location: LABCELL_X37_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R4zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eudwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H1qwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|Bjxwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|H1qwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bjxwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|R4zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kbzwx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Adzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wvzwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Czzwx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .lut_mask = 64'hFFF0FFF00F000F00;
-defparam \soc_inst|m0_1|u_logic|Eudwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .lut_mask = 64'h1333531355555555;
+defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1ewx4~0 (
+// Location: LABCELL_X37_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A6zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E1ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Xcuwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|Xcuwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|A6zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( \soc_inst|m0_1|u_logic|Adzwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .lut_mask = 64'h0F000F00FFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|E1ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .lut_mask = 64'h003F003F33333333;
+defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1ewx4~1 (
+// Location: LABCELL_X35_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E1ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eudwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Eudwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|H6zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Fczwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & (\soc_inst|m0_1|u_logic|Mczwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Fczwx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & (\soc_inst|m0_1|u_logic|Mczwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & 
+// ((\soc_inst|m0_1|u_logic|Fczwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & (\soc_inst|m0_1|u_logic|Mczwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Fczwx4~0_combout ))) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .lut_mask = 64'h0F000F000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y14_N22
-dffeas \soc_inst|m0_1|u_logic|L7a3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L7a3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L7a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .lut_mask = 64'h330F330F330F0F0F;
+defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[10]~9 (
+// Location: MLABCELL_X34_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  ) )
+// \soc_inst|m0_1|u_logic|Vzywx4~0_combout  = ( \soc_inst|m0_1|u_logic|T5zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & !\soc_inst|m0_1|u_logic|B6pwx4~2_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T5zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & !\soc_inst|m0_1|u_logic|J7zwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[10]~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .lut_mask = 64'h33003300FFC0FFC0;
+defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y16_N49
-dffeas \soc_inst|m0_1|u_logic|C9a3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C9a3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzywx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vzywx4~1_combout  = ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & !\soc_inst|m0_1|u_logic|G2zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R4zwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|R4zwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|G2zwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vzywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|R4zwx4~0_combout  & \soc_inst|m0_1|u_logic|G2zwx4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C9a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .lut_mask = 64'h002220227F777777;
+defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~13 (
+// Location: MLABCELL_X34_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J0zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zva3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~26  ))
-// \soc_inst|m0_1|u_logic|Add0~14  = CARRY(( !\soc_inst|m0_1|u_logic|Zva3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~26  ))
+// \soc_inst|m0_1|u_logic|J0zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|H6zwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ((\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~26 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~13_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~14 ),
+	.combout(\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~13 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .lut_mask = 64'h005F005F0A5F0A5F;
+defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mqmvx4~0 (
+// Location: LABCELL_X33_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0zwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zva3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~13_sumout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((\soc_inst|m0_1|u_logic|C9a3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zva3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~13_sumout  & ( ((\soc_inst|m0_1|u_logic|C9a3z4~q  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Zva3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~13_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|C9a3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zva3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~13_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|C9a3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|C0zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hzj2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # ((!\soc_inst|m0_1|u_logic|Aqp2z4~q ) # (\soc_inst|m0_1|u_logic|G2zwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  
+// & ( !\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # (\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & (((!\soc_inst|m0_1|u_logic|Qrp2z4~q  & !\soc_inst|m0_1|u_logic|Aqp2z4~q )) # (\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C9a3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add0~13_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mqmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .lut_mask = 64'h3F1FFFDF0F1FCFDF;
-defparam \soc_inst|m0_1|u_logic|Mqmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y13_N14
-dffeas \soc_inst|m0_1|u_logic|Zva3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mqmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zva3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zva3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zva3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .lut_mask = 64'h008F00AF00EF00FF;
+defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~49 (
+// Location: LABCELL_X37_Y21_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5pwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|She3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~14  ))
-// \soc_inst|m0_1|u_logic|Add0~50  = CARRY(( !\soc_inst|m0_1|u_logic|She3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~14  ))
+// \soc_inst|m0_1|u_logic|U5pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Adzwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Czzwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ( (((!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Wvzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Czzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|She3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~14 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~49_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~50 ),
+	.combout(\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~49 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~49 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~49 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .lut_mask = 64'hF7FF51FF00000000;
+defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~37 (
+// Location: LABCELL_X33_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6pwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Iua3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~50  ))
-// \soc_inst|m0_1|u_logic|Add0~38  = CARRY(( !\soc_inst|m0_1|u_logic|Iua3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~50  ))
+// \soc_inst|m0_1|u_logic|I6pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (!\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~50 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~37_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~38 ),
+	.combout(\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~37 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~37 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~37 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .lut_mask = 64'h80C0C8CCCCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypmvx4~0 (
+// Location: LABCELL_X35_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ypmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Iua3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~37_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
-// (\soc_inst|m0_1|u_logic|L7a3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iua3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~37_sumout ))) 
-// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|L7a3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Iua3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Iua3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|B6pwx4~4_combout  = (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|B6pwx4~2_combout )))
 
-	.dataa(!\soc_inst|m0_1|u_logic|L7a3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~37_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ypmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .lut_mask = 64'h3333FFFFF737F737;
-defparam \soc_inst|m0_1|u_logic|Ypmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y12_N40
-dffeas \soc_inst|m0_1|u_logic|Iua3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ypmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Iua3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iua3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Iua3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .lut_mask = 64'hFA00FA00FA00FA00;
+defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N57
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[12]~22 (
+// Location: LABCELL_X33_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~1 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[12]~22_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & !\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|X2rvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & (\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & !\soc_inst|m0_1|u_logic|G2zwx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X2rvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[12]~22 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[12]~22 .lut_mask = 64'hF000F000F0FFF0FF;
-defparam \soc_inst|interconnect_1|HRDATA[12]~22 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .lut_mask = 64'hFA00FA000A000A00;
+defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y14_N23
-dffeas \soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE (
+// Location: FF_X37_Y20_N43
+dffeas \soc_inst|m0_1|u_logic|Uqi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Uqi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uqi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uqi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~0 (
+// Location: LABCELL_X33_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hzywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (\soc_inst|m0_1|u_logic|Iua3z4~q  & (!\soc_inst|interconnect_1|HRDATA[12]~22_combout  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|interconnect_1|HRDATA[12]~22_combout  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( (\soc_inst|m0_1|u_logic|Iua3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Hzywx4~0_combout  = ( \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uqi2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Uqi2z4~q  & !\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .lut_mask = 64'hF0FF5055C0CC4044;
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y25_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0ewx4~1 (
+// Location: MLABCELL_X39_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C0ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Wwywx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wbk2z4~q  & ( !\soc_inst|m0_1|u_logic|Uyv2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .lut_mask = 64'h0000F0F00F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .lut_mask = 64'hFFFF000000000000;
+defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y25_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~1 (
+// Location: LABCELL_X37_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tyywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xrmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0ewx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|E1ewx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|E1ewx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Tyywx4~0_combout  = ( \soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B1a3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|B1a3z4~q  & \soc_inst|m0_1|u_logic|S4pwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xrmwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .lut_mask = 64'h0000F0FC0000F3FF;
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .lut_mask = 64'h00330033FF33FF33;
+defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sta2z4~0 (
+// Location: MLABCELL_X34_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ozywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sta2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|G0w2z4~q  & \soc_inst|m0_1|u_logic|Cam2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Ozywx4~0_combout  = ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qrp2z4~q  & (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qrp2z4~q  & (((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hzj2z4~q ) # (\soc_inst|m0_1|u_logic|Qrp2z4~q )))) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  
+// & (\soc_inst|m0_1|u_logic|Qrp2z4~q  & ((\soc_inst|m0_1|u_logic|Hzj2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qrp2z4~q  & (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qrp2z4~q  & (((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .lut_mask = 64'h00C000C000000000;
-defparam \soc_inst|m0_1|u_logic|Sta2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .lut_mask = 64'h00003F1530153F15;
+defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y17_N7
-dffeas \soc_inst|m0_1|u_logic|Uyv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uyv2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gvywx4~0_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((\soc_inst|m0_1|u_logic|Vzywx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Hzj2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Aqp2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & (((\soc_inst|m0_1|u_logic|Vzywx4~1_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Hzj2z4~q  & (\soc_inst|m0_1|u_logic|Aqp2z4~q  & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # (\soc_inst|m0_1|u_logic|Vzywx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & 
+// ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((\soc_inst|m0_1|u_logic|Vzywx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Hzj2z4~q  & (\soc_inst|m0_1|u_logic|Aqp2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|J0zwx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Hzj2z4~q ) # (\soc_inst|m0_1|u_logic|Aqp2z4~q )) # (\soc_inst|m0_1|u_logic|Qrp2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uyv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uyv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .lut_mask = 64'h0F070F330F230F33;
+defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kofwx4~0 (
+// Location: LABCELL_X33_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5owx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kofwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|E5owx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wwywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwywx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pwywx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout  & !\soc_inst|m0_1|u_logic|Tyywx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pwywx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .lut_mask = 64'h0000000008080808;
-defparam \soc_inst|m0_1|u_logic|Kofwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E5owx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E5owx4~0 .lut_mask = 64'h8C0CCC8C8C8CCCCC;
+defparam \soc_inst|m0_1|u_logic|E5owx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr0xx4~1 (
+// Location: LABCELL_X33_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cr0xx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Cr0xx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|X2rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & !\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ((\soc_inst|m0_1|u_logic|X2rvx4~1_combout ) # (\soc_inst|m0_1|u_logic|C0zwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X2rvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .lut_mask = 64'h0030003000000000;
-defparam \soc_inst|m0_1|u_logic|Cr0xx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .lut_mask = 64'h0555055544444444;
+defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zx3wx4~0 (
+// Location: LABCELL_X31_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7iwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  = (\soc_inst|m0_1|u_logic|C34wx4~combout  & ((\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ) # (\soc_inst|m0_1|u_logic|Kofwx4~0_combout )))
+// \soc_inst|m0_1|u_logic|D7iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D7iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout  & 
+// \soc_inst|m0_1|u_logic|M1pwx4~4_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|D7iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (\soc_inst|m0_1|u_logic|M1pwx4~4_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M1pwx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|D7iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .lut_mask = 64'h0555055505550555;
-defparam \soc_inst|m0_1|u_logic|Zx3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .lut_mask = 64'h0000F0FF0000F0FA;
+defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6mvx4~0 (
+// Location: LABCELL_X33_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ba0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H6mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uyv2z4~q  & ( \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Uyv2z4~q  & ( \soc_inst|m0_1|u_logic|Zx3wx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Uyv2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Zx3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # ((\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ba0wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ba0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ba0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ba0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .lut_mask = 64'h0000EFFFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|H6mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ba0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ba0wx4 .lut_mask = 64'h0AAA00000FFF0000;
+defparam \soc_inst|m0_1|u_logic|Ba0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y17_N8
-dffeas \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H6mvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X12_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J70wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|N90wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wa0wx4~combout ) # ((\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|J70wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J70wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~1 .lut_mask = 64'h0066F0F60000F0F0;
+defparam \soc_inst|m0_1|u_logic|J70wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwywx4~0 (
+// Location: LABCELL_X19_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z80wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wwywx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Z80wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z80wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Wwywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .lut_mask = 64'h550055FF0055FF55;
+defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y17_N2
-dffeas \soc_inst|m0_1|u_logic|Qrp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qrp2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X18_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z80wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z80wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Z80wx4~1_combout  & ( \soc_inst|m0_1|u_logic|N90wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Z80wx4~1_combout  & ( \soc_inst|m0_1|u_logic|N90wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z80wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z80wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z80wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qrp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qrp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .lut_mask = 64'h4055404055555555;
+defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Douvx4~0 (
+// Location: LABCELL_X16_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Douvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (!\soc_inst|m0_1|u_logic|Cam2z4~q  & 
-// !\soc_inst|m0_1|u_logic|R1w2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|J70wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( !\soc_inst|m0_1|u_logic|Z80wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|J70wx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( !\soc_inst|m0_1|u_logic|Z80wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|J70wx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J70wx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J70wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Douvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Douvx4~0 .lut_mask = 64'h0000000020000000;
-defparam \soc_inst|m0_1|u_logic|Douvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~2 .lut_mask = 64'hC0C0404000000000;
+defparam \soc_inst|m0_1|u_logic|J70wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W0ivx4~0 (
+// Location: LABCELL_X16_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((\soc_inst|m0_1|u_logic|hwdata_o [7]) # (\soc_inst|m0_1|u_logic|X0c3z4~q ))) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o [7]) # (\soc_inst|m0_1|u_logic|X0c3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o [7]) # (!\soc_inst|m0_1|u_logic|Yz4wx4~combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & ((!\soc_inst|m0_1|u_logic|hwdata_o [7]) # (!\soc_inst|m0_1|u_logic|Yz4wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|J70wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ba0wx4~combout  & ( \soc_inst|m0_1|u_logic|J70wx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J70wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .lut_mask = 64'h555044405F5F4C4C;
-defparam \soc_inst|m0_1|u_logic|W0ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J70wx4~0 .lut_mask = 64'h000000000000777F;
+defparam \soc_inst|m0_1|u_logic|J70wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N26
-dffeas \soc_inst|m0_1|u_logic|X0c3z4 (
+// Location: FF_X19_Y16_N2
+dffeas \soc_inst|m0_1|u_logic|Pw03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X0c3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pw03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X0c3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X0c3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pw03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pw03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N22
-dffeas \soc_inst|m0_1|u_logic|Ylc3z4 (
+// Location: FF_X15_Y16_N37
+dffeas \soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ylc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylc3z4~0 (
+// Location: LABCELL_X19_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ylc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o [7] & ((\soc_inst|m0_1|u_logic|Ylc3z4~q ))) # (\soc_inst|m0_1|u_logic|hwdata_o [7] & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|Ylc3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Pw03z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pw03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .lut_mask = 64'h00FF00FF30FC30FC;
-defparam \soc_inst|m0_1|u_logic|Ylc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .lut_mask = 64'h00000000B0800000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N23
-dffeas \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE (
+// Location: FF_X19_Y16_N17
+dffeas \soc_inst|m0_1|u_logic|Ug43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ylc3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ug43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ug43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N5
-dffeas \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE (
+// Location: FF_X16_Y21_N52
+dffeas \soc_inst|m0_1|u_logic|J0n2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|J0n2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J0n2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J0n2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N47
-dffeas \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE (
+// Location: LABCELL_X19_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|J0n2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Ug43z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Ug43z4~q ) # (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ug43z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J0n2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .lut_mask = 64'h0000310000002000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y16_N26
+dffeas \soc_inst|m0_1|u_logic|Cy13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cy13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cy13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y18_N23
-dffeas \soc_inst|m0_1|u_logic|G8n2z4 (
+// Location: LABCELL_X19_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|N3n2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Cy13z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|N3n2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Cy13z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|N3n2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cy13z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|N3n2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .lut_mask = 64'h2020800000008000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X15_Y16_N44
+dffeas \soc_inst|m0_1|u_logic|R6n2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G8n2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|R6n2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G8n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G8n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R6n2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R6n2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y17_N11
-dffeas \soc_inst|m0_1|u_logic|H8l2z4 (
+// Location: LABCELL_X17_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T83xx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T83xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R6n2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R6n2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|T83xx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T83xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T83xx4~0 .lut_mask = 64'h2000000000000000;
+defparam \soc_inst|m0_1|u_logic|T83xx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X15_Y16_N50
+dffeas \soc_inst|m0_1|u_logic|L733z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|L733z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L733z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L733z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X12_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dq53z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dq53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J70wx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Dq53z4~feeder_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Dq53z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dq53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Dq53z4~feeder .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X12_Y19_N25
+dffeas \soc_inst|m0_1|u_logic|Dq53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dq53z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dq53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H8l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H8l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dq53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A50xx4~0 (
+// Location: LABCELL_X12_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A50xx4~0_combout  = ( \soc_inst|m0_1|u_logic|G8n2z4~q  & ( \soc_inst|m0_1|u_logic|H8l2z4~q  & ( (\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|X0c3z4~q  & 
-// \soc_inst|m0_1|u_logic|Ylc3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G8n2z4~q  & ( !\soc_inst|m0_1|u_logic|H8l2z4~q  & ( (\soc_inst|m0_1|u_logic|X0c3z4~q  & (\soc_inst|m0_1|u_logic|Ylc3z4~q  & ((!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G8n2z4~q  & ( !\soc_inst|m0_1|u_logic|H8l2z4~q  & ( (\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|X0c3z4~q  & \soc_inst|m0_1|u_logic|Ylc3z4~q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Wa0wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L733z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dq53z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|L733z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dq53z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A50xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A50xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A50xx4~0 .lut_mask = 64'h0005000D00000004;
-defparam \soc_inst|m0_1|u_logic|A50xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .lut_mask = 64'h0000000044500000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N11
-dffeas \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Jkc3z4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X19_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wa0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zfh3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Y1n2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Y1n2z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y1n2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .lut_mask = 64'h8280020000000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ayzwx4 (
+// Location: LABCELL_X19_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ayzwx4~combout  = ( \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|A50xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Wa0wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wa0wx4~4_combout  & (!\soc_inst|m0_1|u_logic|Wa0wx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wa0wx4~0_combout  & !\soc_inst|m0_1|u_logic|T83xx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|A50xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wa0wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wa0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T83xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ayzwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ayzwx4 .lut_mask = 64'h0000000033003300;
-defparam \soc_inst|m0_1|u_logic|Ayzwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~1 (
+// Location: MLABCELL_X25_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( (!\soc_inst|m0_1|u_logic|X0c3z4~q ) # (!\soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|E5awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|C3z2z4~q  $ (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E5awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .lut_mask = 64'hFFAAFFAA00000000;
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E5awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E5awx4~0 .lut_mask = 64'hF0F0F0F050A050A0;
+defparam \soc_inst|m0_1|u_logic|E5awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvzwx4~0 (
+// Location: LABCELL_X19_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5awx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jjuwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|E5awx4~1_combout  = ( \soc_inst|m0_1|u_logic|E5awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wa0wx4~5_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|E5awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~8_combout  & ( ((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|E5awx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E5awx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E5awx4~1 .lut_mask = 64'h0000773300007F3F;
+defparam \soc_inst|m0_1|u_logic|E5awx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F40xx4~0 (
+// Location: FF_X28_Y14_N34
+dffeas \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F40xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|H8l2z4~q  ) )
+// \soc_inst|m0_1|u_logic|U6awx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F40xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F40xx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|F40xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6awx4~0 .lut_mask = 64'hF0FFF0FF00000000;
+defparam \soc_inst|m0_1|u_logic|U6awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y18_N11
-dffeas \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE (
+// Location: FF_X17_Y22_N46
+dffeas \soc_inst|m0_1|u_logic|A933z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|A933z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|A933z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A933z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X50_Y18_N50
-dffeas \soc_inst|m0_1|u_logic|Bmb3z4 (
+// Location: FF_X17_Y19_N40
+dffeas \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bmb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bmb3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Axm2z4~0 (
+// Location: LABCELL_X18_Y22_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Axm2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Ce0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|A933z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|A933z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A933z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Axm2z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y18_N20
-dffeas \soc_inst|m0_1|u_logic|Axm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Axm2z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Axm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Axm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Axm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .lut_mask = 64'h000000B000000080;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y18_N49
-dffeas \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE (
+// Location: FF_X17_Y22_N59
+dffeas \soc_inst|m0_1|u_logic|Ji43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ji43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ji43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ji43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzvwx4~0 (
+// Location: LABCELL_X17_Y22_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Axm2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Axm2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Anq2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ji43z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Anq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ji43z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .lut_mask = 64'h50005000F5F0F5F0;
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .lut_mask = 64'h000C000A00000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y16_N28
-dffeas \soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE (
+// Location: FF_X18_Y22_N37
+dffeas \soc_inst|m0_1|u_logic|Rz13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Uic3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Rz13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rz13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rz13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y16_N28
-dffeas \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE (
+// Location: FF_X18_Y19_N13
+dffeas \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzvwx4~1 (
+// Location: LABCELL_X18_Y22_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fhc3z4~q  & ((!\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|N7c3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Rz13z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Rz13z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzvwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fhc3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rz13z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .lut_mask = 64'h000000000F0E0F0E;
-defparam \soc_inst|m0_1|u_logic|Wzvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .lut_mask = 64'h2200800000008000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N10xx4~0 (
+// Location: LABCELL_X18_Y23_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A8h3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N10xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bmb3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|A8h3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mc0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A8h3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N10xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N10xx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|N10xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A8h3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A8h3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|A8h3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Adzwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Adzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|F40xx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|N10xx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ) # (\soc_inst|m0_1|u_logic|F40xx4~0_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X18_Y23_N35
+dffeas \soc_inst|m0_1|u_logic|A8h3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|A8h3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|A8h3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .lut_mask = 64'h0707070755555555;
-defparam \soc_inst|m0_1|u_logic|Adzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A8h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A8h3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mcc3z4~0 (
+// Location: LABCELL_X18_Y23_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P9h3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mcc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Mcc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( \soc_inst|m0_1|u_logic|Mcc3z4~q  ) )
+// \soc_inst|m0_1|u_logic|P9h3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mc0wx4~0_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P9h3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .lut_mask = 64'h00FF00FF0CFC0CFC;
-defparam \soc_inst|m0_1|u_logic|Mcc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P9h3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P9h3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|P9h3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N38
-dffeas \soc_inst|m0_1|u_logic|Mcc3z4 (
+// Location: FF_X18_Y23_N17
+dffeas \soc_inst|m0_1|u_logic|P9h3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mcc3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|P9h3z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|P9h3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mcc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mcc3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X48_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9ovx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|K9ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q  & (\soc_inst|m0_1|u_logic|G0w2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .lut_mask = 64'h0000020000000000;
-defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P9h3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|P9h3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2ivx4~0 (
+// Location: LABCELL_X18_Y23_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|P9h3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|A8h3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A8h3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|P9h3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .lut_mask = 64'h554450405544FFCC;
-defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .lut_mask = 64'h0C0A000000000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y20_N7
-dffeas \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE (
+// Location: FF_X16_Y19_N43
+dffeas \soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y18_N1
-dffeas \soc_inst|m0_1|u_logic|Ztc3z4 (
+// Location: FF_X27_Y17_N19
+dffeas \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -51522,659 +51255,599 @@ dffeas \soc_inst|m0_1|u_logic|Ztc3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ztc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ztc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ztc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ztc3z4~0 (
+// Location: LABCELL_X17_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ztc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Ztc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( \soc_inst|m0_1|u_logic|Ztc3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .lut_mask = 64'h00FF00FF22EE22EE;
-defparam \soc_inst|m0_1|u_logic|Ztc3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y18_N2
-dffeas \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ztc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y18_N14
-dffeas \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y18_N43
-dffeas \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y18_N50
-dffeas \soc_inst|m0_1|u_logic|Zad3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zad3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zad3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zad3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .lut_mask = 64'hA000080000000800;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pcd3z4~0 (
+// Location: LABCELL_X12_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tch3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pcd3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Tch3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mc0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tch3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Pcd3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tch3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tch3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Tch3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y18_N58
-dffeas \soc_inst|m0_1|u_logic|Pcd3z4 (
+// Location: FF_X12_Y18_N53
+dffeas \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Tch3z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pcd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pcd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pcd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ruvvx4~0 (
+// Location: LABCELL_X12_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D03xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (!\soc_inst|m0_1|u_logic|R1w2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Cam2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|D03xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D03xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .lut_mask = 64'h0000000020000000;
-defparam \soc_inst|m0_1|u_logic|Ruvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D03xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D03xx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|D03xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M2ivx4~0 (
+// Location: LABCELL_X18_Y22_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M2ivx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o [1] & (((\soc_inst|m0_1|u_logic|Vac3z4~q )))) # (\soc_inst|m0_1|u_logic|hwdata_o [1] 
-// & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Vac3z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|hwdata_o [1] & (((\soc_inst|m0_1|u_logic|Vac3z4~q )))) # (\soc_inst|m0_1|u_logic|hwdata_o [1] & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Vac3z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o [1] & (((\soc_inst|m0_1|u_logic|Vac3z4~q )))) # (\soc_inst|m0_1|u_logic|hwdata_o [1] & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  
-// & \soc_inst|m0_1|u_logic|Vac3z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Ce0wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|D03xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Ce0wx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ce0wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
-	.datae(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ce0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D03xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .lut_mask = 64'h0F3B0F3B0F3B0000;
-defparam \soc_inst|m0_1|u_logic|M2ivx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y17_N19
-dffeas \soc_inst|m0_1|u_logic|Vac3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vac3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vac3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vac3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G10xx4~0 (
+// Location: LABCELL_X19_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6awx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G10xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcd3z4~q  & ( \soc_inst|m0_1|u_logic|Vac3z4~q  & ( (\soc_inst|m0_1|u_logic|Mcc3z4~q  & (!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zad3z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pcd3z4~q  & ( \soc_inst|m0_1|u_logic|Vac3z4~q  & ( (\soc_inst|m0_1|u_logic|Mcc3z4~q  & ((!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zad3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zad3z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|U6awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( 
+// \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U6awx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G10xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G10xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G10xx4~0 .lut_mask = 64'h0000000010510050;
-defparam \soc_inst|m0_1|u_logic|G10xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6awx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6awx4~1 .lut_mask = 64'h004F004F004F00FF;
+defparam \soc_inst|m0_1|u_logic|U6awx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G10xx4~1 (
+// Location: LABCELL_X22_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G10xx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G10xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Add5~25_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~54  ))
+// \soc_inst|m0_1|u_logic|Add5~26  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~54  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~54 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G10xx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G10xx4~1 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|G10xx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~25 .lut_mask = 64'h00008877000000F0;
+defparam \soc_inst|m0_1|u_logic|Add5~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~1 (
+// Location: LABCELL_X23_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I90xx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vac3z4~q  & ( (!\soc_inst|m0_1|u_logic|Mcc3z4~q  & !\soc_inst|m0_1|u_logic|G10xx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vac3z4~q  & ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Fc0wx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~57_sumout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~57_sumout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~57_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~57_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~57_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I90xx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I90xx4~1 .lut_mask = 64'hFF00FF00F000F000;
-defparam \soc_inst|m0_1|u_logic|I90xx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fc0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fc0wx4 .lut_mask = 64'hFFF0AAA0CCC08880;
+defparam \soc_inst|m0_1|u_logic|Fc0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tb0xx4~0 (
+// Location: LABCELL_X27_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B5kvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tb0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zad3z4~q  & ( (\soc_inst|m0_1|u_logic|G10xx4~1_combout ) # (\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Zad3z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G10xx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|B5kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Llq2z4~q  & ( \soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # 
+// (\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( \soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Llq2z4~q  & ( !\soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( !\soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .lut_mask = 64'h3300330033FF33FF;
-defparam \soc_inst|m0_1|u_logic|Tb0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .lut_mask = 64'h00D0F0D000DDFFDD;
+defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y18_N20
-dffeas \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE (
+// Location: FF_X27_Y17_N20
+dffeas \soc_inst|m0_1|u_logic|Llq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Llq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Llq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Llq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y18_N2
-dffeas \soc_inst|m0_1|u_logic|Bjd3z4 (
+// Location: FF_X12_Y18_N52
+dffeas \soc_inst|m0_1|u_logic|Tch3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Tch3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bjd3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tch3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bjd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tch3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tch3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y20_N4
-dffeas \soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE (
+// Location: FF_X21_Y20_N23
+dffeas \soc_inst|m0_1|u_logic|Ebh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ebh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ebh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ebh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iq82z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Iq82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ebh3z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ebh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Iq82z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y18_N14
-dffeas \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE (
+// Location: FF_X17_Y19_N41
+dffeas \soc_inst|m0_1|u_logic|Sr53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Sr53z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sr53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sr53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfc3z4~0 (
+// Location: LABCELL_X17_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qfc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (\soc_inst|m0_1|u_logic|Qfc3z4~q  & ((!\soc_inst|m0_1|u_logic|Zyovx4~combout ) # (\soc_inst|m0_1|u_logic|hwdata_o~20_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & 
-// ( ((\soc_inst|m0_1|u_logic|Zyovx4~combout  & !\soc_inst|m0_1|u_logic|hwdata_o~20_combout )) # (\soc_inst|m0_1|u_logic|Qfc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Lo82z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ji43z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sr53z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ji43z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sr53z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sr53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ji43z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lo82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .lut_mask = 64'h30FF30FF00CF00CF;
-defparam \soc_inst|m0_1|u_logic|Qfc3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y18_N8
-dffeas \soc_inst|m0_1|u_logic|Qfc3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qfc3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qfc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .lut_mask = 64'h000000000A080008;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y18_N50
-dffeas \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE (
+// Location: FF_X17_Y22_N47
+dffeas \soc_inst|m0_1|u_logic|A933z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|A933z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|A933z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A933z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D0wwx4~0 (
+// Location: LABCELL_X17_Y22_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D0wwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bjd3z4~q  & ( \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qfc3z4~q  & \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Bjd3z4~q  & ( !\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qfc3z4~q  & 
-// \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bjd3z4~q  & ( !\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qfc3z4~q  & (\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Lo82z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|A933z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rz13z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qfc3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rz13z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|A933z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D0wwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lo82z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .lut_mask = 64'h0007000100050000;
-defparam \soc_inst|m0_1|u_logic|D0wwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .lut_mask = 64'h000000008080C000;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D0wwx4~1 (
+// Location: LABCELL_X18_Y23_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D0wwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bec3z4~q  & ( (\soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|D0wwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Lo82z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|A8h3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|P9h3z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|D0wwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|A8h3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|P9h3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lo82z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|D0wwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .lut_mask = 64'h3000202000000000;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B90xx4~0 (
+// Location: LABCELL_X18_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B90xx4~0_combout  = ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bjd3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Lo82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Lo82z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lo82z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Iq82z4~0_combout  & (!\soc_inst|m0_1|u_logic|Lo82z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tch3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tch3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Iq82z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lo82z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lo82z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lo82z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lo82z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B90xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B90xx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|B90xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .lut_mask = 64'hB000000000000000;
+defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hdzwx4~0 (
+// Location: MLABCELL_X21_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lf0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hdzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|I90xx4~0_combout  & (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & \soc_inst|m0_1|u_logic|Tb0xx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( \soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Llq2z4~q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( \soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Llq2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( !\soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Llq2z4~q 
+// ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( !\soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Llq2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lo82z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .lut_mask = 64'h005000500FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Hdzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .lut_mask = 64'hEF45EF45EF45EA40;
+defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A6zwx4~0 (
+// Location: LABCELL_X22_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A6zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & !\soc_inst|m0_1|u_logic|I90xx4~2_combout )) # (\soc_inst|m0_1|u_logic|Adzwx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Adzwx4~0_combout  & \soc_inst|m0_1|u_logic|I90xx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add5~1_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~26  ))
+// \soc_inst|m0_1|u_logic|Add5~2  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~26  ))
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~2 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .lut_mask = 64'h000F000F3F0F3F0F;
-defparam \soc_inst|m0_1|u_logic|A6zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~1 .lut_mask = 64'h00008877000000F0;
+defparam \soc_inst|m0_1|u_logic|Add5~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N5
-dffeas \soc_inst|m0_1|u_logic|Uls2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uls2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C70wx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C70wx4~combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~101_sumout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|N90wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|N90wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~101_sumout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|N90wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Add3~101_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|C70wx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uls2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uls2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C70wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C70wx4 .lut_mask = 64'hFFF0AAA0CCC08880;
+defparam \soc_inst|m0_1|u_logic|C70wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N2
-dffeas \soc_inst|m0_1|u_logic|Cps2z4 (
+// Location: FF_X13_Y17_N23
+dffeas \soc_inst|m0_1|u_logic|Nox2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cps2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nox2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cps2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cps2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nox2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nox2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqc3z4~0 (
+// Location: LABCELL_X23_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9kvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tqc3z4~0_combout  = (!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Tqc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tqc3z4~q ))))
+// \soc_inst|m0_1|u_logic|Q9kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zfh3z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C70wx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Nox2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C70wx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nox2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zfh3z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Nox2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nox2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|C70wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .lut_mask = 64'h08FD08FD08FD08FD;
-defparam \soc_inst|m0_1|u_logic|Tqc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .lut_mask = 64'h00CFFFCF00455545;
+defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N56
-dffeas \soc_inst|m0_1|u_logic|Tqc3z4 (
+// Location: FF_X23_Y17_N50
+dffeas \soc_inst|m0_1|u_logic|Zfh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tqc3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -52183,320 +51856,339 @@ dffeas \soc_inst|m0_1|u_logic|Tqc3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zfh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tqc3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Txa2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Txa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (\soc_inst|m0_1|u_logic|Cam2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .lut_mask = 64'h0000010000000000;
-defparam \soc_inst|m0_1|u_logic|Txa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zfh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zfh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zyhvx4~0 (
+// Location: MLABCELL_X15_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zyhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout  & \soc_inst|m0_1|u_logic|Rym2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rym2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Txa2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Rym2z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & \soc_inst|m0_1|u_logic|Rym2z4~q )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Zh82z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Cy13z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|L733z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L733z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cy13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh82z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .lut_mask = 64'h0FCF0A8A00FF00AA;
-defparam \soc_inst|m0_1|u_logic|Zyhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .lut_mask = 64'h00000000C0A00000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N38
-dffeas \soc_inst|m0_1|u_logic|Rym2z4 (
+// Location: FF_X19_Y16_N1
+dffeas \soc_inst|m0_1|u_logic|Pw03z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rym2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pw03z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rym2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rym2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pw03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pw03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N20
-dffeas \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE (
+// Location: FF_X15_Y16_N38
+dffeas \soc_inst|m0_1|u_logic|Vzz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Vzz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vzz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vzz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsc3z4~0 (
+// Location: MLABCELL_X15_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jsc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & ((\soc_inst|m0_1|u_logic|Jsc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q 
-// )) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( \soc_inst|m0_1|u_logic|Jsc3z4~q  ) )
+// \soc_inst|m0_1|u_logic|Zh82z4~2_combout  = ( \soc_inst|m0_1|u_logic|Vzz2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Pw03z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzz2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Pw03z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pw03z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vzz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh82z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .lut_mask = 64'h00FF00FF50FA50FA;
-defparam \soc_inst|m0_1|u_logic|Jsc3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .lut_mask = 64'h5100400000000000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N11
-dffeas \soc_inst|m0_1|u_logic|Jsc3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jsc3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj82z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wj82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|C5n2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|C5n2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wj82z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jsc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jsc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jsa2z4~0 (
+// Location: LABCELL_X12_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|G0w2z4~q  & \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zh82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Ug43z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Dq53z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dq53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ug43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .lut_mask = 64'h0000000000000080;
-defparam \soc_inst|m0_1|u_logic|Jsa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .lut_mask = 64'h000000000E040000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Syhvx4~0 (
+// Location: MLABCELL_X15_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Syhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( ((\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Zh82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Zh82z4~0_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh82z4~1_combout  & (\soc_inst|m0_1|u_logic|R6n2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Zh82z4~2_combout  & !\soc_inst|m0_1|u_logic|Wj82z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh82z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh82z4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Zh82z4~2_combout  & !\soc_inst|m0_1|u_logic|Wj82z4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zh82z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R6n2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zh82z4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wj82z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zh82z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh82z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .lut_mask = 64'h5555505077337030;
-defparam \soc_inst|m0_1|u_logic|Syhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .lut_mask = 64'hA000000020000000;
+defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N50
-dffeas \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N90wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N90wx4~0_combout  = ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( \soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Zfh3z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( \soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( !\soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zfh3z4~q 
+// ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( !\soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zh82z4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N90wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N90wx4~0 .lut_mask = 64'hCCAFCCAFCCAFCCA0;
+defparam \soc_inst|m0_1|u_logic|N90wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~125 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~125_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) + ( 
+// \soc_inst|m0_1|u_logic|Add5~2  ))
+// \soc_inst|m0_1|u_logic|Add5~126  = CARRY(( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) + ( 
+// \soc_inst|m0_1|u_logic|Add5~2  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~2 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~126 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~125 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~125 .lut_mask = 64'h0000FF0F000055AA;
+defparam \soc_inst|m0_1|u_logic|Add5~125 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwvwx4~0 (
+// Location: MLABCELL_X39_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~117 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xwvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uls2z4~q  & ( \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Jsc3z4~q  & ((!\soc_inst|m0_1|u_logic|Cps2z4~q ) # ((\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Lns2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uls2z4~q  & ( \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lns2z4~q  & (\soc_inst|m0_1|u_logic|Jsc3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Cps2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~117_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~106  ))
+// \soc_inst|m0_1|u_logic|Add2~118  = CARRY(( !\soc_inst|m0_1|u_logic|Kaf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~106  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~106 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~117_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~118 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .lut_mask = 64'h0000000004000F04;
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~117 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~117 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~117 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xwvwx4~1 (
+// Location: MLABCELL_X39_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~113 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xwvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tqc3z4~q  & \soc_inst|m0_1|u_logic|Rym2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Add2~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~118  ))
+// \soc_inst|m0_1|u_logic|Add2~114  = CARRY(( !\soc_inst|m0_1|u_logic|Xyk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~118  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
-	.datab(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~118 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~113_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~114 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .lut_mask = 64'h0055005500000000;
-defparam \soc_inst|m0_1|u_logic|Xwvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~113 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~113 .lut_mask = 64'h0000FFFF0000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add2~113 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kizwx4~0 (
+// Location: LABCELL_X19_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uls2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Cps2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Duhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~113_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xyk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~113_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Xyk2z4~q ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~113_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Kizwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .lut_mask = 64'h550055005F0A5F0A;
+defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~1 (
+// Location: LABCELL_X29_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Arzwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jsc3z4~q ) # (!\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Duhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add5~121_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O3pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~121_sumout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duhvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .lut_mask = 64'hFCFCFCFC00000000;
-defparam \soc_inst|m0_1|u_logic|Arzwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .lut_mask = 64'hA8000000FC000000;
+defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y16_N19
-dffeas \soc_inst|m0_1|u_logic|D4g3z4 (
+// Location: FF_X29_Y16_N1
+dffeas \soc_inst|m0_1|u_logic|Xyk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Duhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -52505,750 +52197,675 @@ dffeas \soc_inst|m0_1|u_logic|D4g3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D4g3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xyk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D4g3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xyk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xyk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[13]~11 (
+// Location: MLABCELL_X39_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~77 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Add2~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zpx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~114  ))
+// \soc_inst|m0_1|u_logic|Add2~78  = CARRY(( !\soc_inst|m0_1|u_logic|Zpx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~114  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~114 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~77_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~78 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .lut_mask = 64'h0000FFFF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~77 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~77 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4g3z4~0 (
+// Location: MLABCELL_X39_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D4g3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( \soc_inst|m0_1|u_logic|D4g3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|D4g3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Add2~29_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~78  ))
+// \soc_inst|m0_1|u_logic|Add2~30  = CARRY(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~78  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~78 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~29_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .lut_mask = 64'h30FC30FC00FF00FF;
-defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~29 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y16_N20
-dffeas \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X39_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~21 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~30  ))
+// \soc_inst|m0_1|u_logic|Add2~22  = CARRY(( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~30  ))
 
-// Location: FF_X48_Y16_N43
-dffeas \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~30 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~21_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~22 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~21 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y16_N16
-dffeas \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dpc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X22_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yih2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
 
-// Location: FF_X47_Y16_N14
-dffeas \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .lut_mask = 64'hFFCCFFCCAAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Yih2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mis2z4~0 (
+// Location: LABCELL_X23_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hrcvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mis2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Hrcvx4~combout  = ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hrcvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Mis2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hrcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hrcvx4 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Hrcvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y16_N35
-dffeas \soc_inst|m0_1|u_logic|Mis2z4 (
+// Location: FF_X24_Y19_N20
+dffeas \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mis2z4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mis2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mis2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mis2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y16_N20
-dffeas \soc_inst|m0_1|u_logic|Wuq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wuq2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ds72z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqz2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Nqz2z4~q ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Nqz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ds72z4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wuq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wuq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .lut_mask = 64'h0000E00000002000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yauvx4~0 (
+// Location: MLABCELL_X21_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Au72z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yauvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & 
-// \soc_inst|m0_1|u_logic|Cam2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Au72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5k2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5k2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Au72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .lut_mask = 64'h0000001000000000;
-defparam \soc_inst|m0_1|u_logic|Yauvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Au72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Au72z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Au72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzhvx4~0 (
+// Location: LABCELL_X27_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gzhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( (\soc_inst|m0_1|u_logic|Wuq2z4~q  & ((!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( (\soc_inst|m0_1|u_logic|Wuq2z4~q  & ((!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( (!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( (\soc_inst|m0_1|u_logic|Wuq2z4~q  & (!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ((!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ds72z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Fn13z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ow23z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wuq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ow23z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fn13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ds72z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .lut_mask = 64'h5400FCFC54545454;
-defparam \soc_inst|m0_1|u_logic|Gzhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .lut_mask = 64'h0000C0A000000000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y16_N19
-dffeas \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X25_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ds72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Gf53z4~q  & ( \soc_inst|m0_1|u_logic|X543z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gf53z4~q  & ( !\soc_inst|m0_1|u_logic|X543z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gf53z4~q  & ( !\soc_inst|m0_1|u_logic|X543z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-// Location: FF_X48_Y19_N26
-dffeas \soc_inst|m0_1|u_logic|Vgs2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vgs2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gf53z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X543z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ds72z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vgs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vgs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .lut_mask = 64'h0500040001000000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxvwx4~0 (
+// Location: LABCELL_X24_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ds72z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zxvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Vgs2z4~q  & ( (\soc_inst|m0_1|u_logic|Pab3z4~q  & (\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|Mis2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Vgs2z4~q  & ( (\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Pab3z4~q  & !\soc_inst|m0_1|u_logic|Mis2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ds72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ds72z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ds72z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ds72z4~2_combout  & (!\soc_inst|m0_1|u_logic|Au72z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|D7k2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|D7k2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ds72z4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Au72z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ds72z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ds72z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zxvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ds72z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .lut_mask = 64'h0000070300000100;
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .lut_mask = 64'hC040000000000000;
+defparam \soc_inst|m0_1|u_logic|Ds72z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxvwx4~1 (
+// Location: LABCELL_X22_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hlzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zxvwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Zxvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lgi3z4~q  & ( \soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|S8k2z4~q )) 
+// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Feqwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lgi3z4~q  & ( \soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (\soc_inst|m0_1|u_logic|S8k2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Feqwx4~combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lgi3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((\soc_inst|m0_1|u_logic|S8k2z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lgi3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Ds72z4~3_combout  & ( (\soc_inst|m0_1|u_logic|S8k2z4~q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & \soc_inst|m0_1|u_logic|Duc2z4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zxvwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ds72z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Zxvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .lut_mask = 64'h0404F4F40704F7F4;
+defparam \soc_inst|m0_1|u_logic|Hlzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqzwx4~0 (
+// Location: LABCELL_X22_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpcvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tqzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Wpcvx4~combout  = ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wpcvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .lut_mask = 64'hFF00FF00F000F000;
-defparam \soc_inst|m0_1|u_logic|Tqzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wpcvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wpcvx4 .lut_mask = 64'h55555555FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Wpcvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y16_N13
-dffeas \soc_inst|m0_1|u_logic|Tib3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tib3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~5_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Wpcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~58  ))
+// \soc_inst|m0_1|u_logic|Add5~6  = CARRY(( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( !\soc_inst|m0_1|u_logic|Wpcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~58  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wpcvx4~combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~58 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~6 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tib3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tib3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~5 .lut_mask = 64'h000000FF0000FF4A;
+defparam \soc_inst|m0_1|u_logic|Add5~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dizwx4~0 (
+// Location: LABCELL_X22_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~89 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tib3z4~q  & ( (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Vgs2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Tib3z4~q  & ( (\soc_inst|m0_1|u_logic|Vgs2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add5~89_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Hrcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~6  ))
+// \soc_inst|m0_1|u_logic|Add5~90  = CARRY(( (!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Hrcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~6  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hrcvx4~combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~6 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~90 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .lut_mask = 64'h5500550055FF55FF;
-defparam \soc_inst|m0_1|u_logic|Dizwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~89 .lut_mask = 64'h000000FF0000FF64;
+defparam \soc_inst|m0_1|u_logic|Add5~89 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fczwx4~0 (
+// Location: LABCELL_X31_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fczwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & !\soc_inst|m0_1|u_logic|Tqzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kizwx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & \soc_inst|m0_1|u_logic|Tqzwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Aihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add2~21_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aihvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .lut_mask = 64'h005500555F555F55;
-defparam \soc_inst|m0_1|u_logic|Fczwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .lut_mask = 64'hA8A8A800FDFDFD00;
+defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nnc3z4~0 (
+// Location: MLABCELL_X25_Y23_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nnc3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( \soc_inst|m0_1|u_logic|Nnc3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Nnc3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Qfzvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ( \soc_inst|m0_1|u_logic|W6iwx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Rilwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Qfzvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .lut_mask = 64'h5F5F0F0F55550000;
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y23_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qfzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qfzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nnc3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .lut_mask = 64'h0AFA0AFA00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Nnc3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y20_N22
-dffeas \soc_inst|m0_1|u_logic|Nnc3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nnc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nnc3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nnc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nnc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .lut_mask = 64'h3131F5F500000000;
+defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wva2z4~0 (
+// Location: LABCELL_X31_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wva2z4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~q  & (\soc_inst|m0_1|u_logic|Cam2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Aihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & (\soc_inst|m0_1|u_logic|H4nwx4~combout  & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aihvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .lut_mask = 64'h0000020000000000;
-defparam \soc_inst|m0_1|u_logic|Wva2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .lut_mask = 64'h0F0F0F0F0C000C00;
+defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B0ivx4~0 (
+// Location: LABCELL_X31_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (\soc_inst|m0_1|u_logic|Ipn2z4~q  & !\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( \soc_inst|m0_1|u_logic|Ipn2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ipn2z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( ((\soc_inst|m0_1|u_logic|Ipn2z4~q  & !\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # (\soc_inst|m0_1|u_logic|D9ovx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Aihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aihvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Aihvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aihvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Aihvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aihvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & \soc_inst|m0_1|u_logic|Aihvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aihvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Aihvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .lut_mask = 64'h7373730055555500;
-defparam \soc_inst|m0_1|u_logic|B0ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .lut_mask = 64'h00AA000000AA0002;
+defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y18_N26
-dffeas \soc_inst|m0_1|u_logic|Ipn2z4 (
+// Location: FF_X31_Y16_N14
+dffeas \soc_inst|m0_1|u_logic|Xsx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ipn2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ipn2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y18_N37
-dffeas \soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Xsx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xsx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xsx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y20_N29
-dffeas \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X19_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~73 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add3~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~110  ))
+// \soc_inst|m0_1|u_logic|Add3~74  = CARRY(( !\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~110  ))
 
-// Location: FF_X47_Y20_N41
-dffeas \soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~110 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~73_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~74 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~73 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~73 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gyvwx4~0 (
+// Location: LABCELL_X19_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gyvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jxs2z4~q  & ((!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Jxs2z4~q  & (\soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Add3~21_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~74  ))
+// \soc_inst|m0_1|u_logic|Add3~22  = CARRY(( !\soc_inst|m0_1|u_logic|Lrx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~74  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE_q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~74 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gyvwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~21_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~22 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .lut_mask = 64'h0F000F00CF0CCF0C;
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~21 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gyvwx4~1 (
+// Location: LABCELL_X19_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gyvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nnc3z4~q  & (\soc_inst|m0_1|u_logic|Ipn2z4~q  & ((!\soc_inst|m0_1|u_logic|Lee3z4~q ) # (!\soc_inst|m0_1|u_logic|Ble3z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gyvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nnc3z4~q  & \soc_inst|m0_1|u_logic|Ipn2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Add3~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xsx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~22  ))
+// \soc_inst|m0_1|u_logic|Add3~18  = CARRY(( !\soc_inst|m0_1|u_logic|Xsx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~22  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~22 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~17_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~18 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .lut_mask = 64'h0033003300320032;
-defparam \soc_inst|m0_1|u_logic|Gyvwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~17 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~0 (
+// Location: LABCELL_X23_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vezvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B6pwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ble3z4~q ) # (!\soc_inst|m0_1|u_logic|Lee3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Vezvx4~combout  = ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Lee3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add3~17_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vezvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .lut_mask = 64'hFFAAFFAA00000000;
-defparam \soc_inst|m0_1|u_logic|B6pwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y17_N11
-dffeas \soc_inst|m0_1|u_logic|Kkb3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kkb3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kkb3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X47_Y17_N40
-dffeas \soc_inst|m0_1|u_logic|Tqs2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tqs2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tqs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vezvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vezvx4 .lut_mask = 64'hDDD0DDD0DDD00000;
+defparam \soc_inst|m0_1|u_logic|Vezvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2f3z4~0 (
+// Location: LABCELL_X23_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Galvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2f3z4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( \soc_inst|m0_1|u_logic|H2f3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (!\soc_inst|m0_1|u_logic|Zyovx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|H2f3z4~q ))) # (\soc_inst|m0_1|u_logic|Zyovx4~combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Galvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Vezvx4~combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xsx2z4~q )))) # (\soc_inst|m0_1|u_logic|Vezvx4~combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Xsx2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Vezvx4~combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xsx2z4~q )))) 
+// # (\soc_inst|m0_1|u_logic|Vezvx4~combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Xsx2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vezvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vezvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .lut_mask = 64'h50FA50FA00FF00FF;
-defparam \soc_inst|m0_1|u_logic|H2f3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Galvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Galvx4~0 .lut_mask = 64'h0000F5F5F531F531;
+defparam \soc_inst|m0_1|u_logic|Galvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y17_N29
-dffeas \soc_inst|m0_1|u_logic|H2f3z4 (
+// Location: FF_X23_Y14_N55
+dffeas \soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H2f3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -53257,1725 +52874,1747 @@ dffeas \soc_inst|m0_1|u_logic|H2f3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H2f3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2f3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H2f3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X50_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhvvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|G0w2z4~q  & (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .lut_mask = 64'h0000000001000000;
-defparam \soc_inst|m0_1|u_logic|Mhvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0ivx4~0 (
+// Location: MLABCELL_X25_Y22_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (!\soc_inst|m0_1|u_logic|Yz4wx4~combout  & (((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Yz4wx4~combout  & (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~4_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vgq2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vgq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .lut_mask = 64'h3330BBB00000FFF0;
-defparam \soc_inst|m0_1|u_logic|P0ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .lut_mask = 64'hC000008800000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y17_N23
-dffeas \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE (
+// Location: FF_X24_Y23_N5
+dffeas \soc_inst|m0_1|u_logic|I443z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|I443z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|I443z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I443z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I443z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kss2z4~0 (
+// Location: LABCELL_X23_Y25_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gfq2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kss2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Gfq2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gfq2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Kss2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gfq2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gfq2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Gfq2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y17_N35
-dffeas \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE (
+// Location: FF_X23_Y25_N1
+dffeas \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Gfq2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X47_Y17_N41
-dffeas \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y23_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pdbwx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|I443z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|I443z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .lut_mask = 64'h000000A0000000C0;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y17_N5
-dffeas \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE (
+// Location: FF_X25_Y20_N16
+dffeas \soc_inst|m0_1|u_logic|Kiq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Kiq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whzwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Whzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kkb3z4~q  & ( (\soc_inst|m0_1|u_logic|Y9l2z4~q  & (\soc_inst|m0_1|u_logic|Vve3z4~q  & ((!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kkb3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Y9l2z4~q  & 
-// \soc_inst|m0_1|u_logic|Vve3z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kkb3z4~q  & ( (!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Y9l2z4~q  & \soc_inst|m0_1|u_logic|Vve3z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whzwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .lut_mask = 64'h00000008000C000E;
-defparam \soc_inst|m0_1|u_logic|Whzwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whzwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Whzwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Whzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H2f3z4~q  & \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Whzwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kiq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kiq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qlzwx4~0 (
+// Location: MLABCELL_X25_Y23_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kkb3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Tqs2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Kiq2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Kiq2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ql13z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kiq2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ql13z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ql13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kiq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Qlzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .lut_mask = 64'h40004000A0000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjzwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Fjzwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Vve3z4~q ) # (!\soc_inst|m0_1|u_logic|Y9l2z4~q ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y23_N26
+dffeas \soc_inst|m0_1|u_logic|Skh3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Skh3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Skh3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .lut_mask = 64'hFCFCFCFC00000000;
-defparam \soc_inst|m0_1|u_logic|Fjzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Skh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Skh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yizwx4~0 (
+// Location: LABCELL_X24_Y23_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yizwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~5_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Djh3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Skh3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Djh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Skh3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .lut_mask = 64'h00FF00FF55555555;
-defparam \soc_inst|m0_1|u_logic|Yizwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .lut_mask = 64'h0C00080800000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mczwx4~0 (
+// Location: MLABCELL_X25_Y22_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mczwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & (\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Pdbwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~4_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdbwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdbwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .lut_mask = 64'h050005000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Mczwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y20_N40
-dffeas \soc_inst|m0_1|u_logic|Bus2z4 (
+// Location: FF_X25_Y22_N32
+dffeas \soc_inst|m0_1|u_logic|J0v2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J0v2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bus2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bus2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J0v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J0v2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihzwx4~0 (
+// Location: MLABCELL_X25_Y22_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ihzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bus2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jxs2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|T31xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Art2z4~q ) # ((\soc_inst|m0_1|u_logic|R91xx4~0_combout  & !\soc_inst|m0_1|u_logic|J0v2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T31xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R91xx4~0_combout  & !\soc_inst|m0_1|u_logic|J0v2z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Art2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J0v2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Ihzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .lut_mask = 64'h0F000F00CFCCCFCC;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Clzwx4~0 (
+// Location: MLABCELL_X25_Y22_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Clzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Pdbwx4~combout  = ( \soc_inst|m0_1|u_logic|Pdbwx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Pdbwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pdbwx4~8_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Jw73z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jw73z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Pdbwx4~8_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pdbwx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Clzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdbwx4 .lut_mask = 64'h000000BB00000000;
+defparam \soc_inst|m0_1|u_logic|Pdbwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5zwx4~0 (
+// Location: LABCELL_X23_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zbbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T5zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & (\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ihzwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Clzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Clzwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & (\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ihzwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zbbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yih2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yih2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zbbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .lut_mask = 64'h073327330F330733;
-defparam \soc_inst|m0_1|u_logic|T5zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .lut_mask = 64'hF000AAAAB080EEEE;
+defparam \soc_inst|m0_1|u_logic|Zbbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~1 (
+// Location: MLABCELL_X21_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cfzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B6pwx4~1_combout  = (\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & \soc_inst|m0_1|u_logic|Tqzwx4~0_combout )
+// \soc_inst|m0_1|u_logic|Cfzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|Zbbwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( 
+// \soc_inst|m0_1|u_logic|Zbbwx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zbbwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .lut_mask = 64'h000F000F000F000F;
-defparam \soc_inst|m0_1|u_logic|B6pwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .lut_mask = 64'h00FF00FF000F000F;
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~2 (
+// Location: LABCELL_X24_Y23_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cfzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B6pwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mczwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T5zwx4~0_combout  & !\soc_inst|m0_1|u_logic|B6pwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Mczwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|T5zwx4~0_combout  & (!\soc_inst|m0_1|u_logic|B6pwx4~1_combout  & !\soc_inst|m0_1|u_logic|Fczwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Cfzvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Cfzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdbwx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .lut_mask = 64'h5000500050505050;
-defparam \soc_inst|m0_1|u_logic|B6pwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .lut_mask = 64'h000000000B000000;
+defparam \soc_inst|m0_1|u_logic|Cfzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y15_N29
-dffeas \soc_inst|m0_1|u_logic|Lns2z4~DUPLICATE (
+// Location: FF_X30_Y18_N5
+dffeas \soc_inst|m0_1|u_logic|Art2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lns2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lns2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Art2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lns2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lns2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Art2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Art2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iazwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Iazwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lns2z4~DUPLICATE_q  ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Lns2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y22_N58
+dffeas \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .lut_mask = 64'h00FF00FF55555555;
-defparam \soc_inst|m0_1|u_logic|Iazwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~0 (
+// Location: LABCELL_X30_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Arzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pab3z4~q  & ( (!\soc_inst|m0_1|u_logic|Mis2z4~q  & !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pab3z4~q  & ( (!\soc_inst|m0_1|u_logic|Mis2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Fexwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Art2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|An63z4~q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kiq2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Art2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|An63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kiq2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fexwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .lut_mask = 64'hF0FFF0FFF000F000;
-defparam \soc_inst|m0_1|u_logic|Arzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .lut_mask = 64'h0F0F3333555500FF;
+defparam \soc_inst|m0_1|u_logic|Fexwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pazwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pazwx4~combout  = ( !\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Arzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Arzwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Kizwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tqzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Arzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Iazwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Iazwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Arzwx4~1_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tqzwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pazwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y25_N2
+dffeas \soc_inst|m0_1|u_logic|Gfq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Gfq2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gfq2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pazwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pazwx4 .lut_mask = 64'h73F70000F7F70000;
-defparam \soc_inst|m0_1|u_logic|Pazwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gfq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gfq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7zwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|J7zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pazwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Mis2z4~q )) # (\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pab3z4~q ))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Pazwx4~combout  & ( !\soc_inst|m0_1|u_logic|Iazwx4~0_combout  ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y23_N50
+dffeas \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Yx83z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .lut_mask = 64'hFF00FF00D8D8D8D8;
-defparam \soc_inst|m0_1|u_logic|J7zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~3 (
+// Location: LABCELL_X23_Y25_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B6pwx4~3_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & \soc_inst|m0_1|u_logic|Fjzwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fczwx4~0_combout  & (((\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & \soc_inst|m0_1|u_logic|Fjzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mczwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Fczwx4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & \soc_inst|m0_1|u_logic|Fjzwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Fexwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gfq2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|J0v2z4~q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Vgq2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gfq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J0v2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vgq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fexwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .lut_mask = 64'h222F222F000F000F;
-defparam \soc_inst|m0_1|u_logic|B6pwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .lut_mask = 64'h00FF333355550F0F;
+defparam \soc_inst|m0_1|u_logic|Fexwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H6zwx4~0 (
+// Location: LABCELL_X22_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fexwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H6zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fczwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & 
-// (((\soc_inst|m0_1|u_logic|Mczwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Mczwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|J7zwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Fczwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Fexwx4~combout  = ( \soc_inst|m0_1|u_logic|Fexwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Fexwx4~1_combout  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~0_combout  
+// & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fexwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fczwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mczwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fexwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fexwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fexwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .lut_mask = 64'h3335333555555555;
-defparam \soc_inst|m0_1|u_logic|H6zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fexwx4 .lut_mask = 64'h00F500F500A000A0;
+defparam \soc_inst|m0_1|u_logic|Fexwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2zwx4~0 (
+// Location: MLABCELL_X28_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zudwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G2zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Pazwx4~combout  & \soc_inst|m0_1|u_logic|Arzwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pazwx4~combout  & (\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & (\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & \soc_inst|m0_1|u_logic|J7zwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Zudwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Feqwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Feqwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .lut_mask = 64'h0002000222222222;
-defparam \soc_inst|m0_1|u_logic|G2zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .lut_mask = 64'hF0FFF0FFF000F000;
+defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J0zwx4~0 (
+// Location: MLABCELL_X28_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zudwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J0zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|H6zwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Zudwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zudwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Beowx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .lut_mask = 64'h050F050F550F550F;
-defparam \soc_inst|m0_1|u_logic|J0zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .lut_mask = 64'h0F0F0F0F00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzywx4~0 (
+// Location: LABCELL_X29_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F7qwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vzywx4~0_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|J7zwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|T5zwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ) # (!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|F7qwx4~combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T5zwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F7qwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .lut_mask = 64'h55505550FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Vzywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F7qwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F7qwx4 .lut_mask = 64'h003F003F00C000C0;
+defparam \soc_inst|m0_1|u_logic|F7qwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vzywx4~1 (
+// Location: LABCELL_X29_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A6ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vzywx4~1_combout  = ( \soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|R4zwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Vzywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|R4zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Vzywx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Vzywx4~0_combout  & (((!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|R4zwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|R4zwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|H6zwx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (((\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|A6ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|F7qwx4~combout  & ( !\soc_inst|m0_1|u_logic|Zudwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|F7qwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kepwx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F7qwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .lut_mask = 64'h047700F744774477;
-defparam \soc_inst|m0_1|u_logic|Vzywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .lut_mask = 64'hCCCCF0F000000000;
+defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0zwx4~0 (
+// Location: LABCELL_X24_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C0zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hzj2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # (\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((!\soc_inst|m0_1|u_logic|Aqp2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # (\soc_inst|m0_1|u_logic|G2zwx4~1_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & (((!\soc_inst|m0_1|u_logic|Aqp2z4~q  & !\soc_inst|m0_1|u_logic|Qrp2z4~q )) # (\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~10_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Djzvx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Djzvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .lut_mask = 64'h2033323330333333;
-defparam \soc_inst|m0_1|u_logic|C0zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .lut_mask = 64'h5500545455000404;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Viuwx4~0 (
+// Location: LABCELL_X35_Y13_N45
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[26]~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Viuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B6pwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|B6pwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Yizwx4~0_combout  & (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qlzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Clzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B6pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Yizwx4~0_combout ))) ) ) )
+// \soc_inst|ram_1|data_to_memory[26]~8_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|byte_select [3]) ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (\soc_inst|ram_1|write_cycle~q  & !\soc_inst|ram_1|byte_select [3]) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|ram_1|byte_select [3]),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[26]~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .lut_mask = 64'hF0507010F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[26]~8 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[26]~8 .lut_mask = 64'h0000550000555555;
+defparam \soc_inst|ram_1|data_to_memory[26]~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~1 (
+// Location: M10K_X26_Y17_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 (
+	.portawe(\soc_inst|ram_1|write_cycle~q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[26]~8_combout ,\soc_inst|ram_1|data_to_memory[2]~7_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_bit_number = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_bit_number = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000690509400228108C2300100511041041450280300001201201500010001000006004007FFFFFFFFFFFFC30014110404444400000041001110";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y18_N48
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[2]~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Viuwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Whzwx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Gyvwx4~1_combout  & !\soc_inst|m0_1|u_logic|Viuwx4~0_combout ) ) )
+// \soc_inst|ram_1|data_to_memory[2]~7_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o [2] & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [2] & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+	.datab(!\soc_inst|ram_1|byte_select [0]),
+	.datac(!\soc_inst|ram_1|write_cycle~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[2]~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .lut_mask = 64'h0F000F000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[2]~7 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[2]~7 .lut_mask = 64'h00000C0C03030F0F;
+defparam \soc_inst|ram_1|data_to_memory[2]~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~2 (
+// Location: LABCELL_X30_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7qwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Arzwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Arzwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Iazwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Arzwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Iazwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|T7qwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout ))) ) 
+// ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & (\soc_inst|m0_1|u_logic|B7owx4~combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Arzwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T7qwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .lut_mask = 64'h80008000C888C888;
-defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .lut_mask = 64'h0C000C000F030F03;
+defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~0 (
+// Location: LABCELL_X30_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Arzwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Arzwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Jkmwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T7qwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Hzj2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Arzwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T7qwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jkmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .lut_mask = 64'hF100F100F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .lut_mask = 64'hFFFAFFFA00000000;
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fb0xx4~0 (
+// Location: LABCELL_X29_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fb0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|G10xx4~1_combout ) # (\soc_inst|m0_1|u_logic|Pcd3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Pcd3z4~q  & !\soc_inst|m0_1|u_logic|G10xx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|F7qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jkmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|A6ewx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|F7qwx4~combout  & ( (\soc_inst|m0_1|u_logic|Jkmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jkmwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|F7qwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .lut_mask = 64'h303030303F3F3F3F;
-defparam \soc_inst|m0_1|u_logic|Fb0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .lut_mask = 64'h00FC00FC00A800A8;
+defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S00xx4~0 (
+// Location: LABCELL_X36_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S00xx4~0_combout  = ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Qkmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nnc3z4~q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S00xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S00xx4~0 .lut_mask = 64'h555555550F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|S00xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .lut_mask = 64'h0505050505FF05FF;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kbzwx4~0 (
+// Location: LABCELL_X31_Y22_N39
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[10]~12 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kbzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ((\soc_inst|m0_1|u_logic|S00xx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( \soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) # (\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (((\soc_inst|m0_1|u_logic|S00xx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout )) # (\soc_inst|m0_1|u_logic|I90xx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|S00xx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B90xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|S00xx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|I90xx4~1_combout )) # (\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
+// \soc_inst|interconnect_1|HRDATA[10]~12_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .lut_mask = 64'h070F474747074747;
-defparam \soc_inst|m0_1|u_logic|Kbzwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y18_N19
-dffeas \soc_inst|m0_1|u_logic|Xdb3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xdb3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xdb3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xdb3z4 .power_up = "low";
+defparam \soc_inst|interconnect_1|HRDATA[10]~12 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[10]~12 .lut_mask = 64'hCCFFCCFF00330033;
+defparam \soc_inst|interconnect_1|HRDATA[10]~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jzzwx4~0 (
+// Location: LABCELL_X30_Y23_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jzzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Axm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xdb3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Axm2z4~q  & ( (\soc_inst|m0_1|u_logic|Xdb3z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzvwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qkmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[10]~12_combout  & ( (!\soc_inst|m0_1|u_logic|C9a3z4~q ) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[10]~12_combout  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[10]~12_combout  & ( 
+// !\soc_inst|m0_1|u_logic|C9a3z4~q  ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9a3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Jzzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .lut_mask = 64'h0000F0F03333F3F3;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qzzwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|G8n2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Ayzwx4~combout  & ( \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q  ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
+// Location: LABCELL_X30_Y23_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qkmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zva3z4~q  & ( !\soc_inst|m0_1|u_logic|Qkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zva3z4~q  & ( !\soc_inst|m0_1|u_logic|Qkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & !\soc_inst|m0_1|u_logic|Qkmwx4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qkmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .lut_mask = 64'h00FF00FF55555555;
-defparam \soc_inst|m0_1|u_logic|Qzzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .lut_mask = 64'hECECFCFC00000000;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Czzwx4~0 (
+// Location: LABCELL_X30_Y23_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Czzwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & !\soc_inst|m0_1|u_logic|F40xx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & \soc_inst|m0_1|u_logic|Jzzwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (\soc_inst|m0_1|u_logic|Jzzwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|F40xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qkmwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qkmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Mydwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Sndwx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qkmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Mydwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sndwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qkmwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .lut_mask = 64'h002A55FF0022D5FF;
-defparam \soc_inst|m0_1|u_logic|Czzwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .lut_mask = 64'h0000CCCF0000FFCF;
+defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5pwx4~0 (
+// Location: LABCELL_X30_Y21_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecowx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U5pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Adzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Adzwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Adzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Czzwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Adzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & (!\soc_inst|m0_1|u_logic|I90xx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Czzwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ecowx4~combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|B2uvx4~0_combout  & !\soc_inst|m0_1|u_logic|J6i2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ecowx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .lut_mask = 64'h8C00EF00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|U5pwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ecowx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ecowx4 .lut_mask = 64'h0000000003000300;
+defparam \soc_inst|m0_1|u_logic|Ecowx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~2 (
+// Location: LABCELL_X30_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jjuwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|F40xx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (((\soc_inst|m0_1|u_logic|F40xx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Jzzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N10xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jjuwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|F40xx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ajmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & (\soc_inst|m0_1|u_logic|Xyn2z4~q  & !\soc_inst|m0_1|u_logic|Ecowx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & !\soc_inst|m0_1|u_logic|Ecowx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xyn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .lut_mask = 64'hD0F0F0F040F050F0;
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .lut_mask = 64'hAA00AA000A000A00;
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjuwx4~0 (
+// Location: LABCELL_X30_Y23_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cjuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( \soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ) # (\soc_inst|m0_1|u_logic|B90xx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I90xx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|I90xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S00xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ) # (\soc_inst|m0_1|u_logic|B90xx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Tb0xx4~0_combout  & (\soc_inst|m0_1|u_logic|B90xx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Fb0xx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ajmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ajmwx4~0_combout  & ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( (\soc_inst|m0_1|u_logic|O0o2z4~q  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # 
+// (!\soc_inst|interconnect_1|HRDATA[18]~13_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ajmwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[18]~13_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tb0xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B90xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fb0xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S00xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ajmwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .lut_mask = 64'h8C08CCCC8C8CCCCC;
-defparam \soc_inst|m0_1|u_logic|Cjuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .lut_mask = 64'h0000FCFC00005454;
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~2 (
+// Location: LABCELL_X29_Y23_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Cjuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G10xx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|D0wwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Ajmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Eudwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Asdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ajmwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Eudwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Asdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ajmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eudwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Asdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ajmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eudwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Asdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ajmwx4~1_combout  & !\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ajmwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .lut_mask = 64'h3333333300FF00FF;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .lut_mask = 64'h5050505555505555;
+defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~3 (
+// Location: LABCELL_X29_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yjzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & (\soc_inst|m0_1|u_logic|Ayzwx4~combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & 
-// ((\soc_inst|m0_1|u_logic|Wzvwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|U5pwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & 
-// (\soc_inst|m0_1|u_logic|Ayzwx4~combout )) # (\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Yjzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & ( 
+// ((\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .lut_mask = 64'h202A202A757F757F;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .lut_mask = 64'h30FF30FF30303030;
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B6pwx4~4 (
+// Location: LABCELL_X24_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B6pwx4~4_combout  = ( \soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~3_combout  & !\soc_inst|m0_1|u_logic|J7zwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B6pwx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|B6pwx4~3_combout  ) )
+// \soc_inst|m0_1|u_logic|Xmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ylbwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Ylbwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7zwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B6pwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .lut_mask = 64'hF0F0F0F0F000F000;
-defparam \soc_inst|m0_1|u_logic|B6pwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .lut_mask = 64'hF000F000F0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~4 (
+// Location: LABCELL_X24_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  = ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & (\soc_inst|m0_1|u_logic|Kkrvx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Xmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qmdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qmdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Xmdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kkrvx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qmdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .lut_mask = 64'hCC55CC550F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .lut_mask = 64'h00330033FF33FF33;
+defparam \soc_inst|m0_1|u_logic|Xmdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y18_N19
-dffeas \soc_inst|m0_1|u_logic|P2a3z4 (
+// Location: FF_X39_Y17_N32
+dffeas \soc_inst|m0_1|u_logic|Mbt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [2]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|P2a3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mbt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P2a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|P2a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mbt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mbt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y17_N41
-dffeas \soc_inst|m0_1|u_logic|Uqi2z4 (
+// Location: FF_X34_Y20_N19
+dffeas \soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uqi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uqi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hzywx4~0 (
+// Location: MLABCELL_X39_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yrqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hzywx4~0_combout  = ( \soc_inst|m0_1|u_logic|S4pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|P2a3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|S4pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uqi2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Yrqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mbt2z4~q  & ((!\soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Mbt2z4~q  & (!\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mbt2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Hzywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .lut_mask = 64'hFCA8FCA800000000;
+defparam \soc_inst|m0_1|u_logic|Yrqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y17_N34
-dffeas \soc_inst|m0_1|u_logic|X9n2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|W2uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X9n2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X39_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ojmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yrqwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bec3z4~q  & (((!\soc_inst|m0_1|u_logic|Gha3z4~q  & \soc_inst|m0_1|u_logic|H6tvx4~0_combout )))) 
+// # (\soc_inst|m0_1|u_logic|Bec3z4~q  & (((!\soc_inst|m0_1|u_logic|Gha3z4~q  & \soc_inst|m0_1|u_logic|H6tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Yrqwx4~0_combout  ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Bec3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gha3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yrqwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X9n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X9n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .lut_mask = 64'h0000FFFF000011F1;
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tyywx4~0 (
+// Location: LABCELL_X31_Y22_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tyywx4~0_combout  = ( \soc_inst|m0_1|u_logic|S4pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B1a3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|S4pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X9n2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ojmwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ojmwx4~0_combout  & ( \soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|M2b3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ojmwx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M2b3z4~q ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ojmwx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .lut_mask = 64'h00FF00FF0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Tyywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .lut_mask = 64'hF5F50000F5000000;
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ozywx4~0 (
+// Location: LABCELL_X30_Y23_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ozywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qrp2z4~q  & ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qrp2z4~q  & ( \soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A6zwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qrp2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & (\soc_inst|m0_1|u_logic|A6zwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|Hzj2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qrp2z4~q  & ( !\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & (\soc_inst|m0_1|u_logic|G2zwx4~0_combout 
-//  & !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ojmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Tkdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ojmwx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tkdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ojmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Xmdwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .lut_mask = 64'h0400050344CC55FF;
-defparam \soc_inst|m0_1|u_logic|Ozywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .lut_mask = 64'h00000000FF03FFF3;
+defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwywx4~0 (
+// Location: LABCELL_X29_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yjzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yjzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout  & ((\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout  & ((\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Jkmwx4~1_combout )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .lut_mask = 64'h20A020A030F030F0;
+defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pwywx4~0_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & !\soc_inst|m0_1|u_logic|Hzj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Hihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & (\soc_inst|m0_1|u_logic|H4nwx4~combout  & !\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hihvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .lut_mask = 64'h0F0F0F0F0C000C00;
+defparam \soc_inst|m0_1|u_logic|Hihvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvywx4~0 (
+// Location: LABCELL_X31_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gvywx4~0_combout  = ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q ) # (\soc_inst|m0_1|u_logic|Aqp2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q ) # (((\soc_inst|m0_1|u_logic|Qrp2z4~q  & !\soc_inst|m0_1|u_logic|G2zwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Aqp2z4~q )) ) ) ) 
-// # ( \soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & (\soc_inst|m0_1|u_logic|Aqp2z4~q  & ((!\soc_inst|m0_1|u_logic|Qrp2z4~q ) # (\soc_inst|m0_1|u_logic|G2zwx4~1_combout )))) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|J0zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vzywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & (\soc_inst|m0_1|u_logic|Aqp2z4~q  & \soc_inst|m0_1|u_logic|G2zwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Hihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lrx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~29_sumout ) 
+// # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lrx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~29_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lrx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Add2~29_sumout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lrx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~29_sumout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|J0zwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vzywx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add2~29_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hihvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .lut_mask = 64'h00030203DFCFCFCF;
-defparam \soc_inst|m0_1|u_logic|Gvywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .lut_mask = 64'hE0E0EFEFE000EF00;
+defparam \soc_inst|m0_1|u_logic|Hihvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5owx4~0 (
+// Location: LABCELL_X31_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hihvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E5owx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wwywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ozywx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wwywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gvywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Hzywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ozywx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Hzywx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tyywx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Ozywx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hihvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hihvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & \soc_inst|m0_1|u_logic|Yjzvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hihvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hihvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hihvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hihvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E5owx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E5owx4~0 .lut_mask = 64'h80A8AAAA88AAAAAA;
-defparam \soc_inst|m0_1|u_logic|E5owx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .lut_mask = 64'h00000000F0F00010;
+defparam \soc_inst|m0_1|u_logic|Hihvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~5 (
+// Location: FF_X31_Y16_N56
+dffeas \soc_inst|m0_1|u_logic|Lrx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hihvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lrx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lrx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nhzvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & \soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & \soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wwywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & \soc_inst|m0_1|u_logic|G2zwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Nhzvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~21_sumout  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~21_sumout  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~21_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~21_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kkrvx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~21_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .lut_mask = 64'h0050F050CCDCCCDC;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nhzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nhzvx4 .lut_mask = 64'hDDDDD0D0DD00D000;
+defparam \soc_inst|m0_1|u_logic|Nhzvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~6 (
+// Location: LABCELL_X23_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5lvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R5lvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Lrx2z4~q ) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lrx2z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|S8k2z4~q  & ( !\soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Lrx2z4~q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( !\soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Lrx2z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Lrx2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|R5lvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .lut_mask = 64'h00D0F0D000DDFFDD;
+defparam \soc_inst|m0_1|u_logic|R5lvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y12_N55
+dffeas \soc_inst|m0_1|u_logic|S8k2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|R5lvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|S8k2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S8k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S8k2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( (\soc_inst|m0_1|u_logic|U7w2z4~q  & !\soc_inst|m0_1|u_logic|Ywi2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ywi2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K2k2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|K2k2z4~q ) # (\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( !\soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K2k2z4~q ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .lut_mask = 64'hFF00FF0033003300;
-defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .lut_mask = 64'h00FF0000CCFFCCCC;
+defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~2 (
+// Location: LABCELL_X24_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout  & 
-// !\soc_inst|m0_1|u_logic|Bsvwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Djzvx4~combout  = ( !\soc_inst|m0_1|u_logic|Djzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Djzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Djzvx4~7_combout  & (!\soc_inst|m0_1|u_logic|Djzvx4~3_combout  & 
+// (\soc_inst|m0_1|u_logic|Djzvx4~4_combout  & !\soc_inst|m0_1|u_logic|Djzvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xrmwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Djzvx4~7_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Djzvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Djzvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Djzvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Djzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djzvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .lut_mask = 64'h0000FCFC0000F8F8;
-defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djzvx4 .lut_mask = 64'h0400000000000000;
+defparam \soc_inst|m0_1|u_logic|Djzvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtdwx4~0 (
+// Location: LABCELL_X23_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3awx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dmvwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Dmvwx4~combout  & !\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|H3awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Djzvx4~combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Djzvx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .lut_mask = 64'hF000F000F0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3awx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3awx4~0 .lut_mask = 64'hFAFAFAFAFFFF0F0F;
+defparam \soc_inst|m0_1|u_logic|H3awx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y25_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M3u2z4~feeder (
+// Location: MLABCELL_X21_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M3u2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J70wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H3awx4~0_combout  & !\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # ((\soc_inst|m0_1|u_logic|H3awx4~0_combout  & !\soc_inst|m0_1|u_logic|O3awx4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M3u2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rjzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M3u2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M3u2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|M3u2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .lut_mask = 64'hD0C080C0FFFF5500;
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y25_N31
-dffeas \soc_inst|m0_1|u_logic|M3u2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M3u2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M3u2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uhzvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (\soc_inst|m0_1|u_logic|Rjzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Djzvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( (\soc_inst|m0_1|u_logic|Rjzvx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Djzvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( 
+// (\soc_inst|m0_1|u_logic|Rjzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Djzvx4~combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rjzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Uhzvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M3u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M3u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .lut_mask = 64'h2300230000002300;
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~2 (
+// Location: LABCELL_X30_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uhzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G4qwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|V883z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|M3u2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Uhzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V883z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M3u2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uhzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G4qwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .lut_mask = 64'h00000C0000000808;
-defparam \soc_inst|m0_1|u_logic|G4qwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .lut_mask = 64'h000000000000777F;
+defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N19
-dffeas \soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE (
+// Location: FF_X25_Y20_N2
+dffeas \soc_inst|m0_1|u_logic|Po63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Po63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po63z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y20_N28
+dffeas \soc_inst|m0_1|u_logic|Z3k2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Z3k2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y25_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|G4qwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|N3n2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|N3n2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G4qwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .lut_mask = 64'h4040500000000000;
-defparam \soc_inst|m0_1|u_logic|G4qwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcv2z4~feeder (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Vcv2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|J70wx4~0_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vcv2z4~feeder_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vcv2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vcv2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Vcv2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z3k2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z3k2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y24_N43
-dffeas \soc_inst|m0_1|u_logic|Vcv2z4 (
+// Location: FF_X24_Y18_N19
+dffeas \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vcv2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vcv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vcv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vcv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~3 (
+// Location: MLABCELL_X25_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G4qwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Y1n2z4~q  & ( \soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y1n2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y1n2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcv2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Feqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yx73z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Po63z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Z3k2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Y1n2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vcv2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Po63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z3k2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yx73z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G4qwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Feqwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .lut_mask = 64'h0300010002000000;
-defparam \soc_inst|m0_1|u_logic|G4qwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .lut_mask = 64'h333300FF55550F0F;
+defparam \soc_inst|m0_1|u_logic|Feqwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y20_N53
-dffeas \soc_inst|m0_1|u_logic|Md93z4 (
+// Location: FF_X24_Y18_N28
+dffeas \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -54983,692 +54622,689 @@ dffeas \soc_inst|m0_1|u_logic|Md93z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Md93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Md93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y26_N49
-dffeas \soc_inst|m0_1|u_logic|J0n2z4 (
+// Location: FF_X19_Y21_N16
+dffeas \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J0n2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J0n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J0n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4~1 (
+// Location: MLABCELL_X25_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G4qwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Md93z4~q  & ( \soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Md93z4~q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Md93z4~q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Feqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|V0k2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Y1v2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V0k2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Y1v2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|V0k2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|V0k2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y1v2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE_q ),
 	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Md93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J0n2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|V0k2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G4qwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Feqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .lut_mask = 64'h0101010000010000;
-defparam \soc_inst|m0_1|u_logic|G4qwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .lut_mask = 64'h00F00FFF53535353;
+defparam \soc_inst|m0_1|u_logic|Feqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G4qwx4 (
+// Location: LABCELL_X22_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Feqwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G4qwx4~combout  = ( !\soc_inst|m0_1|u_logic|G4qwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|G4qwx4~2_combout  & (!\soc_inst|m0_1|u_logic|G4qwx4~0_combout  & !\soc_inst|m0_1|u_logic|G4qwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Feqwx4~combout  = ( \soc_inst|m0_1|u_logic|Feqwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Feqwx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~0_combout  
+// & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Feqwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|G4qwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G4qwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G4qwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Feqwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Feqwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Feqwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G4qwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G4qwx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|G4qwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Feqwx4 .lut_mask = 64'h0F030F030C000C00;
+defparam \soc_inst|m0_1|u_logic|Feqwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asdwx4~0 (
+// Location: LABCELL_X29_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Asdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Icxwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|G4qwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Uvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Feqwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Feqwx4~combout ) # (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .lut_mask = 64'h00FF00FF33333333;
-defparam \soc_inst|m0_1|u_logic|Asdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .lut_mask = 64'hFFCCFFCC00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtdwx4~1 (
+// Location: LABCELL_X29_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Asdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Asdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Xtdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Gvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Xtdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .lut_mask = 64'h00CC00CC33FF33FF;
+defparam \soc_inst|m0_1|u_logic|Gvdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y16_N56
-dffeas \soc_inst|switches_1|switch_store[1][4] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[4]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][4]~q ),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mrdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Icxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mnvwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Icxwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|Mnvwx4~combout ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][4] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][4] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hk0wx4 (
+// Location: LABCELL_X29_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hk0wx4~combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Hk0wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|G4qwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|G4qwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hk0wx4~5_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~8_combout ),
-	.dataf(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hk0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hk0wx4 .lut_mask = 64'h0000333300003333;
-defparam \soc_inst|m0_1|u_logic|Hk0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[20]~16 (
+// Location: LABCELL_X29_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  = ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hk0wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hk0wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hk0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Mrdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .lut_mask = 64'h0000F5F50A0AFFFF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[20]~16 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .lut_mask = 64'h00AA00AA55FF55FF;
+defparam \soc_inst|m0_1|u_logic|Mrdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N30
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[20]~16 (
+// Location: LABCELL_X33_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jymwx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[20]~16_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (\soc_inst|ram_1|write_cycle~q  & ((!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ))) ) ) 
-// # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout )) ) )
+// \soc_inst|m0_1|u_logic|Jymwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout  & (((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|G6owx4~combout  & (\soc_inst|m0_1|u_logic|Ieh3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout  & (((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|G6owx4~combout  & (\soc_inst|m0_1|u_logic|Ieh3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( 
+// !\soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout  & (((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|G6owx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Ieh3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
+	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ieh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[20]~16_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jymwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[20]~16 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[20]~16 .lut_mask = 64'h1100110055445544;
-defparam \soc_inst|ram_1|data_to_memory[20]~16 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .lut_mask = 64'hB0BBB0BBB0BB0000;
+defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y16_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[20]~16_combout ,\soc_inst|ram_1|data_to_memory[4]~15_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+// Location: LABCELL_X30_Y22_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jymwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jymwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jymwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jymwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gvdwx4~0_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jymwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_bit_number = 4;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_bit_number = 4;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init0 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000206040550BC58A05E812D2F81555555555555413240400505005555555500001540";
+defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .lut_mask = 64'h00000000AAFAAFFF;
+defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sjvwx4~0 (
+// Location: LABCELL_X30_Y22_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcuvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sjvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ))) # 
-// (\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|switches_1|switch_store[1][4]~q )))) ) )
+// \soc_inst|m0_1|u_logic|Vcuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout )))) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Cymwx4~3_combout )))) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Hxmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Cymwx4~3_combout ))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datac(!\soc_inst|switches_1|switch_store[1][4]~q ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sjvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vcuvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .lut_mask = 64'h0000000001230123;
-defparam \soc_inst|m0_1|u_logic|Sjvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .lut_mask = 64'h0000135F135F135F;
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y16_N52
-dffeas \soc_inst|m0_1|u_logic|I1h3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I1h3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y22_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcuvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vcuvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I1h3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I1h3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .lut_mask = 64'h008A008A008A00CF;
+defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O24wx4~0 (
+// Location: LABCELL_X36_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wamvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O24wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W21wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q )) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|W21wx4~combout  & ( (\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Wamvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Tdp2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q  & (((!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) # (\soc_inst|m0_1|u_logic|H1rvx4~0_combout 
+// ))) # (\soc_inst|m0_1|u_logic|F0y2z4~q  & (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O24wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O24wx4~0 .lut_mask = 64'h0F050F050FAF0FAF;
-defparam \soc_inst|m0_1|u_logic|O24wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .lut_mask = 64'hC0EAF3FB00AA33BB;
+defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y16_N5
-dffeas \soc_inst|m0_1|u_logic|Gdo2z4 (
+// Location: FF_X36_Y21_N13
+dffeas \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gdo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gdo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gdo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5a3z4~feeder (
+// Location: LABCELL_X36_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9ovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U5a3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Bq5wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|K9ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bq5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U5a3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5a3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U5a3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|U5a3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .lut_mask = 64'h0000002000000000;
+defparam \soc_inst|m0_1|u_logic|K9ovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y17_N49
-dffeas \soc_inst|m0_1|u_logic|U5a3z4 (
+// Location: MLABCELL_X34_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T2ivx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T2ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gxk2z4~q  & ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Yz4wx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|D9ovx4~combout ))) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Yz4wx4~combout ) # (\soc_inst|m0_1|u_logic|D9ovx4~combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Gxk2z4~q  & ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Gxk2z4~q  & ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .lut_mask = 64'h0000FFAA3322F3A2;
+defparam \soc_inst|m0_1|u_logic|T2ivx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y20_N37
+dffeas \soc_inst|m0_1|u_logic|Gxk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|U5a3z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.sload(vcc),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U5a3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gxk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U5a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gxk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gxk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~61 (
+// Location: LABCELL_X33_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahowx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|K7g3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~38  ))
-// \soc_inst|m0_1|u_logic|Add0~62  = CARRY(( !\soc_inst|m0_1|u_logic|K7g3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~38  ))
+// \soc_inst|m0_1|u_logic|Ahowx4~0_combout  = (!\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Gxk2z4~q )))) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Gxk2z4~q )) # (\soc_inst|m0_1|u_logic|Ztc3z4~q )))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~38 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~61_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~62 ),
+	.combout(\soc_inst|m0_1|u_logic|Ahowx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~61 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~61 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~61 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .lut_mask = 64'h111F111F111F111F;
+defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y16_N23
-dffeas \soc_inst|m0_1|u_logic|T5g3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T5g3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T5g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T5g3z4 .power_up = "low";
+// Location: LABCELL_X33_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tgowx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tgowx4~0_combout  = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ahowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|Ahowx4~0_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ahowx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Tgowx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .lut_mask = 64'h000F000F050F050F;
+defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rpmvx4~0 (
+// Location: LABCELL_X33_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tlyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K7g3z4~q  & ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Add0~61_sumout ) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7g3z4~q  & ( \soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~61_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|K7g3z4~q  & ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~61_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|K7g3z4~q  & ( !\soc_inst|m0_1|u_logic|T5g3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~61_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Tlyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tgowx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aea3z4~q  & (!\soc_inst|m0_1|u_logic|G6owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|F2o2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Aea3z4~q  & (((!\soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|F2o2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~61_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T5g3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aea3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tgowx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tlyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .lut_mask = 64'h2F0FEFCF3F1FFFDF;
-defparam \soc_inst|m0_1|u_logic|Rpmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y16_N20
-dffeas \soc_inst|m0_1|u_logic|K7g3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rpmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K7g3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K7g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K7g3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .lut_mask = 64'hF531F53100000000;
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~81 (
+// Location: LABCELL_X24_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jiowx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rsa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~62  ))
-// \soc_inst|m0_1|u_logic|Add0~82  = CARRY(( !\soc_inst|m0_1|u_logic|Rsa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~62  ))
+// \soc_inst|m0_1|u_logic|Jiowx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xmdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jiowx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xmdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Jiowx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jiowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xmdwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~62 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~81_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~82 ),
+	.combout(\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~81 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~81 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~81 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Jiowx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kpmvx4~0 (
+// Location: LABCELL_X24_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B28wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~81_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|U5a3z4~q ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Rsa3z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~81_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|U5a3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|B28wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jiowx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jiowx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Qmdwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U5a3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~81_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .lut_mask = 64'h0B01FBF1FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Kpmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y16_N38
-dffeas \soc_inst|m0_1|u_logic|Rsa3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kpmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rsa3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rsa3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rsa3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B28wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B28wx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|B28wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~1 (
+// Location: LABCELL_X31_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tlyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ara3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~82  ))
-// \soc_inst|m0_1|u_logic|Add0~2  = CARRY(( !\soc_inst|m0_1|u_logic|Ara3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~82  ))
+// \soc_inst|m0_1|u_logic|Tlyvx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[0]~32_combout  & ( \soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|m0_1|u_logic|Tlyvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[0]~32_combout  & ( \soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tlyvx4~0_combout  ) ) ) # ( \soc_inst|interconnect_1|HRDATA[0]~32_combout  & ( !\soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & \soc_inst|m0_1|u_logic|Tlyvx4~0_combout )) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[0]~32_combout  & ( !\soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & \soc_inst|m0_1|u_logic|Tlyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tlyvx4~0_combout ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~82 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~1_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~2 ),
+	.combout(\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~1 .lut_mask = 64'h000000000000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add0~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .lut_mask = 64'h00F000A000FF00AA;
+defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4a3z4~0 (
+// Location: LABCELL_X30_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S08wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D4a3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  )
+// \soc_inst|m0_1|u_logic|S08wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Godwx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0ewx4~1_combout  ) )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|D4a3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S08wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S08wx4~0 .lut_mask = 64'h00FF00FF33333333;
+defparam \soc_inst|m0_1|u_logic|S08wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y16_N59
-dffeas \soc_inst|m0_1|u_logic|D4a3z4 (
+// Location: FF_X33_Y21_N16
+dffeas \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D4a3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D4a3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D4a3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dpmvx4~0 (
+// Location: LABCELL_X35_Y21_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dpmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ara3z4~q  & ( \soc_inst|m0_1|u_logic|D4a3z4~q  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~1_sumout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ara3z4~q  & ( \soc_inst|m0_1|u_logic|D4a3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~1_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ara3z4~q  & ( !\soc_inst|m0_1|u_logic|D4a3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~1_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ara3z4~q  & ( !\soc_inst|m0_1|u_logic|D4a3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~1_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hmyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|H2f3z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & (\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~1_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|D4a3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .lut_mask = 64'h3B33FBF33F37FFF7;
-defparam \soc_inst|m0_1|u_logic|Dpmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .lut_mask = 64'h0003000300570057;
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y16_N26
-dffeas \soc_inst|m0_1|u_logic|Ara3z4 (
+// Location: LABCELL_X33_Y21_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hmyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Hmyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W3f3z4~q  & (!\soc_inst|m0_1|u_logic|G6owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|W3f3z4~q  & (((!\soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|W3f3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hmyvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .lut_mask = 64'hF351F35100000000;
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y17_N7
+dffeas \soc_inst|switches_1|half_word_address[1]~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dpmvx4~0_combout ),
+	.d(\soc_inst|switches_1|half_word_address~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -55677,70 +55313,41 @@ dffeas \soc_inst|m0_1|u_logic|Ara3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ara3z4~q ),
+	.q(\soc_inst|switches_1|half_word_address[1]~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ara3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ara3z4 .power_up = "low";
+defparam \soc_inst|switches_1|half_word_address[1]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|half_word_address[1]~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~73 (
+// Location: MLABCELL_X25_Y17_N45
+cyclonev_lcell_comb \soc_inst|switches_1|read_enable~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xeo2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~2  ))
-// \soc_inst|m0_1|u_logic|Add0~74  = CARRY(( !\soc_inst|m0_1|u_logic|Xeo2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~2  ))
+// \soc_inst|switches_1|read_enable~0_combout  = ( \soc_inst|switches_1|half_word_address~1_combout  & ( !\soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~2 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~73_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~74 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~73 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~73 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~73 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y16_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Womvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Womvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xeo2z4~q  & ( \soc_inst|m0_1|u_logic|Add0~73_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Gdo2z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xeo2z4~q  & ( \soc_inst|m0_1|u_logic|Add0~73_sumout  & ( ((\soc_inst|m0_1|u_logic|Gdo2z4~q  & (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|Tna3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xeo2z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~73_sumout  & ( (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (!\soc_inst|m0_1|u_logic|Tna3z4~q )) # (\soc_inst|m0_1|u_logic|Gdo2z4~q )) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xeo2z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~73_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Gdo2z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gdo2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add0~73_sumout ),
+	.dataf(!\soc_inst|switches_1|half_word_address~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
+	.combout(\soc_inst|switches_1|read_enable~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Womvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Womvx4~0 .lut_mask = 64'h55F7FFF75557FF57;
-defparam \soc_inst|m0_1|u_logic|Womvx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|read_enable~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|read_enable~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|switches_1|read_enable~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y16_N55
-dffeas \soc_inst|m0_1|u_logic|Xeo2z4 (
+// Location: FF_X25_Y17_N47
+dffeas \soc_inst|switches_1|read_enable (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
+	.d(\soc_inst|switches_1|read_enable~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -55749,878 +55356,1025 @@ dffeas \soc_inst|m0_1|u_logic|Xeo2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.q(\soc_inst|switches_1|read_enable~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xeo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xeo2z4 .power_up = "low";
+defparam \soc_inst|switches_1|read_enable .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|read_enable .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~29 (
+// Location: LABCELL_X31_Y17_N39
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[9]~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~29_sumout  = SUM(( !\soc_inst|m0_1|u_logic|S3i3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~74  ))
-// \soc_inst|m0_1|u_logic|Add0~30  = CARRY(( !\soc_inst|m0_1|u_logic|S3i3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~74  ))
+// \soc_inst|interconnect_1|HRDATA[9]~5_combout  = ( \soc_inst|switches_1|read_enable~q  & ( !\soc_inst|switches_1|half_word_address[1]~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|switches_1|half_word_address[1]~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|switches_1|read_enable~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~74 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~29_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~30 ),
+	.combout(\soc_inst|interconnect_1|HRDATA[9]~5_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~29 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~29 .lut_mask = 64'h000000000000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add0~29 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[9]~5 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[9]~5 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|interconnect_1|HRDATA[9]~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[17]~17 (
+// Location: MLABCELL_X28_Y17_N3
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Yw0wx4~combout )) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & \soc_inst|m0_1|u_logic|Yw0wx4~combout )) ) )
+// \soc_inst|switches_1|half_word_address~3_combout  = ( \soc_inst|switches_1|half_word_address~1_combout  & ( \soc_inst|switches_1|half_word_address~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+	.datac(!\soc_inst|switches_1|half_word_address~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataf(!\soc_inst|switches_1|half_word_address~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+	.combout(\soc_inst|switches_1|half_word_address~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .lut_mask = 64'h000A000AF5FFF5FF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[17]~17 .shared_arith = "off";
+defparam \soc_inst|switches_1|half_word_address~3 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~3 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|switches_1|half_word_address~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y17_N52
-dffeas \soc_inst|m0_1|u_logic|B2i3z4 (
+// Location: FF_X28_Y17_N4
+dffeas \soc_inst|switches_1|half_word_address[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+	.d(\soc_inst|switches_1|half_word_address~3_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B2i3z4~q ),
+	.q(\soc_inst|switches_1|half_word_address [0]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B2i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B2i3z4 .power_up = "low";
+defparam \soc_inst|switches_1|half_word_address[0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|half_word_address[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pomvx4~0 (
+// Location: LABCELL_X31_Y17_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[6]~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S3i3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|S3i3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|S3i3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~29_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((\soc_inst|m0_1|u_logic|B2i3z4~q )))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|S3i3z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~29_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout 
-//  & ((\soc_inst|m0_1|u_logic|B2i3z4~q ))))) ) ) )
+// \soc_inst|interconnect_1|HRDATA[6]~9_combout  = ( !\soc_inst|interconnect_1|mux_sel [2] & ( (!\soc_inst|interconnect_1|mux_sel [1]) # ((!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q  & (\soc_inst|interconnect_1|HRDATA[9]~5_combout  & 
+// !\soc_inst|switches_1|half_word_address [0]))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add0~29_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|B2i3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(!\soc_inst|interconnect_1|HRDATA[9]~5_combout ),
+	.datad(!\soc_inst|switches_1|half_word_address [0]),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[6]~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .lut_mask = 64'h0A03FAF3FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Pomvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y16_N37
-dffeas \soc_inst|m0_1|u_logic|S3i3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S3i3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S3i3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S3i3z4 .power_up = "low";
+defparam \soc_inst|interconnect_1|HRDATA[6]~9 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[6]~9 .lut_mask = 64'hCECCCECC00000000;
+defparam \soc_inst|interconnect_1|HRDATA[6]~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~17 (
+// Location: LABCELL_X31_Y17_N30
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[9]~15 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|O0o2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~30  ))
-// \soc_inst|m0_1|u_logic|Add0~18  = CARRY(( !\soc_inst|m0_1|u_logic|O0o2z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~30  ))
+// \soc_inst|interconnect_1|HRDATA[9]~15_combout  = ( \soc_inst|interconnect_1|HRDATA[6]~9_combout  & ( ((\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q  & (\soc_inst|ram_1|read_cycle~q  & \soc_inst|ram_1|byte_select [1]))) # 
+// (\soc_inst|interconnect_1|mux_sel [1]) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(!\soc_inst|ram_1|read_cycle~q ),
+	.datad(!\soc_inst|ram_1|byte_select [1]),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[6]~9_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~30 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~17_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~18 ),
+	.combout(\soc_inst|interconnect_1|HRDATA[9]~15_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~17 .lut_mask = 64'h000000000000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add0~17 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[9]~15 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[9]~15 .lut_mask = 64'h0000000033373337;
+defparam \soc_inst|interconnect_1|HRDATA[9]~15 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~53 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jpa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~18  ))
-// \soc_inst|m0_1|u_logic|Add0~54  = CARRY(( !\soc_inst|m0_1|u_logic|Jpa3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~18  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~18 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~53_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~54 ),
-	.shareout());
+// Location: IOIBUF_X4_Y0_N18
+cyclonev_io_ibuf \SW[8]~input (
+	.i(SW[8]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[8]~input_o ));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~53 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~53 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~53 .shared_arith = "off";
+defparam \SW[8]~input .bus_hold = "false";
+defparam \SW[8]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: FF_X40_Y16_N28
-dffeas \soc_inst|m0_1|u_logic|L8m2z4 (
+// Location: FF_X31_Y21_N5
+dffeas \soc_inst|switches_1|switch_store[0][8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.asdata(\SW[8]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L8m2z4~q ),
+	.q(\soc_inst|switches_1|switch_store[0][8]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L8m2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L8m2z4 .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[0][8] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][8] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bomvx4~0 (
+// Location: LABCELL_X31_Y22_N51
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[8]~28 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( \soc_inst|m0_1|u_logic|L8m2z4~q  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Add0~53_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q  & ( \soc_inst|m0_1|u_logic|L8m2z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~53_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( !\soc_inst|m0_1|u_logic|L8m2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~53_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jpa3z4~q  & ( !\soc_inst|m0_1|u_logic|L8m2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & !\soc_inst|m0_1|u_logic|Add0~53_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|ram_1|data_to_memory[8]~28_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|ram_1|byte_select [1]) ) ) ) # ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|byte_select [1]) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~53_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8m2z4~q ),
+	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|ram_1|byte_select [1]),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bomvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[8]~28_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .lut_mask = 64'h5D55FDF55F57FFF7;
-defparam \soc_inst|m0_1|u_logic|Bomvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[8]~28 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[8]~28 .lut_mask = 64'h0055555500005500;
+defparam \soc_inst|ram_1|data_to_memory[8]~28 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N1
-dffeas \soc_inst|m0_1|u_logic|Jpa3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bomvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+// Location: M10K_X26_Y15_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 (
+	.portawe(\soc_inst|ram_1|write_cycle~q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[8]~28_combout ,\soc_inst|ram_1|data_to_memory[0]~27_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jpa3z4~q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jpa3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jpa3z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_bit_number = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_bit_number = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000067ECD369972115C9735394539453948AAAAA548497ECA1E20FBF63EF72BF62E8A14FD22AAAAAAAAAAAAAA048EFF3F0FFFFFFFFFFFF3C01554";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~45 (
+// Location: LABCELL_X36_Y15_N6
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[0]~27 (
+// Equation(s):
+// \soc_inst|ram_1|data_to_memory[0]~27_combout  = ( \soc_inst|ram_1|write_cycle~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|ram_1|byte_select [0]) # (\soc_inst|m0_1|u_logic|hwdata_o~5_combout ) ) ) ) # ( 
+// \soc_inst|ram_1|write_cycle~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|m0_1|u_logic|hwdata_o~5_combout ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|byte_select [0]),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.datae(!\soc_inst|ram_1|write_cycle~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|ram_1|data_to_memory[0]~27_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|data_to_memory[0]~27 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[0]~27 .lut_mask = 64'h000000330000CCFF;
+defparam \soc_inst|ram_1|data_to_memory[0]~27 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y21_N33
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~33 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Z2h3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~54  ))
-// \soc_inst|m0_1|u_logic|Add0~46  = CARRY(( !\soc_inst|m0_1|u_logic|Z2h3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~54  ))
+// \soc_inst|interconnect_1|HRDATA[8]~33_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( (\soc_inst|interconnect_1|HRDATA[9]~15_combout  & \soc_inst|switches_1|switch_store[0][8]~q ) ) 
+// ) ) # ( !\soc_inst|interconnect_1|Equal1~0_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( \soc_inst|interconnect_1|HRDATA[9]~15_combout  ) ) ) # ( \soc_inst|interconnect_1|Equal1~0_combout  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( (\soc_inst|interconnect_1|HRDATA[9]~15_combout  & \soc_inst|switches_1|switch_store[0][8]~q ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[9]~15_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|switches_1|switch_store[0][8]~q ),
+	.datae(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~54 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~45_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~46 ),
+	.combout(\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~45 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~45 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~45 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~33 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[8]~33 .lut_mask = 64'h0000005555550055;
+defparam \soc_inst|interconnect_1|HRDATA[8]~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unmvx4~0 (
+// Location: LABCELL_X31_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Unmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~45_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & \soc_inst|m0_1|u_logic|I1h3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z2h3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~45_sumout  & ( ((\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|I1h3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (\soc_inst|m0_1|u_logic|I1h3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z2h3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~45_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|I1h3z4~q )))) 
-// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  = ( \soc_inst|interconnect_1|HRDATA[8]~33_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (\soc_inst|m0_1|u_logic|Hmyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|S08wx4~0_combout )))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[8]~33_combout  & ( (\soc_inst|m0_1|u_logic|Hmyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|S08wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|I1h3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add0~45_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hmyvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .lut_mask = 64'h3B3FFBFF3337F3F7;
-defparam \soc_inst|m0_1|u_logic|Unmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y16_N2
-dffeas \soc_inst|m0_1|u_logic|Z2h3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Unmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z2h3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z2h3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z2h3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .lut_mask = 64'h00CF00CF008A008A;
+defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntmwx4~0 (
+// Location: MLABCELL_X25_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Beowx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I1h3z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjvwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Z2h3z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|I1h3z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|G6owx4~combout  & (!\soc_inst|m0_1|u_logic|Sjvwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Z2h3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Beowx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Beowx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kepwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Beowx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjvwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I1h3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ntmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .lut_mask = 64'h80C080C0A0F0A0F0;
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Beowx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Beowx4~1 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Beowx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zudwx4~0 (
+// Location: MLABCELL_X25_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zudwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Beowx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Beowx4~1_combout  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .lut_mask = 64'hFFFF0000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Zudwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .lut_mask = 64'h5500550055FF55FF;
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nvdwx4~0 (
+// Location: LABCELL_X24_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7ewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Q7ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .lut_mask = 64'h33333333F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .lut_mask = 64'h3030FCFC0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nvdwx4~1 (
+// Location: LABCELL_X30_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rkyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nvdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zudwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Zudwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ecowx4~combout  & ( \soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[24]~31_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ecowx4~combout  & ( !\soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[24]~31_combout ))) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Nvdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .lut_mask = 64'hFA000000FAFA0000;
+defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntmwx4~1 (
+// Location: LABCELL_X31_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K22wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Xtdwx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ntmwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Xtdwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|K22wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ntmwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K22wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .lut_mask = 64'h0000F0F30000FCFF;
-defparam \soc_inst|m0_1|u_logic|Ntmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K22wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K22wx4~1 .lut_mask = 64'h004500CF4545CFCF;
+defparam \soc_inst|m0_1|u_logic|K22wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tj0wx4~0 (
+// Location: LABCELL_X31_Y21_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K22wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tj0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|K22wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K22wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tj0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .lut_mask = 64'hC0C0FFFFC0C0C0C0;
-defparam \soc_inst|m0_1|u_logic|Tj0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K22wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K22wx4~0 .lut_mask = 64'h000000005554FFFC;
+defparam \soc_inst|m0_1|u_logic|K22wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tj0wx4 (
+// Location: MLABCELL_X25_Y21_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tj0wx4~combout  = ( \soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tj0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tj0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zz1wx4~2_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zz1wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tj0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zz1wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zz1wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tj0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tj0wx4 .lut_mask = 64'h2323AFAF00000000;
-defparam \soc_inst|m0_1|u_logic|Tj0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .lut_mask = 64'h0000000000003301;
+defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wh0wx4~0 (
+// Location: FF_X22_Y23_N20
+dffeas \soc_inst|m0_1|u_logic|Hq33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hq33z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hq33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hq33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y23_N2
+dffeas \soc_inst|m0_1|u_logic|Ii73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ii73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ii73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ii73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y23_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wh0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M9awx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & \soc_inst|m0_1|u_logic|Wzawx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Z863z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Szr2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z863z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .lut_mask = 64'h0030003030003000;
-defparam \soc_inst|m0_1|u_logic|Wh0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~2 .lut_mask = 64'hC000020200000000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ri0wx4~1 (
+// Location: LABCELL_X22_Y24_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|M9awx4~1_combout )) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|M9awx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qz43z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yg23z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qz43z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yg23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ri0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .lut_mask = 64'h0A050A055FAF5FAF;
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~1 .lut_mask = 64'h5000440000000000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ri0wx4~0 (
+// Location: LABCELL_X22_Y23_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ri0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ri0wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ri0wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~3_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qwr2z4~q  & (!\soc_inst|m0_1|u_logic|P12wx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ii73z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ii73z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ri0wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ii73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qwr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P12wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .lut_mask = 64'h000088F80000FFFF;
-defparam \soc_inst|m0_1|u_logic|Ri0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~3 .lut_mask = 64'hF500310000000000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bh0wx4~0 (
+// Location: FF_X21_Y23_N37
+dffeas \soc_inst|m0_1|u_logic|Kc03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kc03z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kc03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kc03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kc03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y21_N40
+dffeas \soc_inst|m0_1|u_logic|Rvv2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rvv2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rvv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rvv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y23_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bh0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~combout  & ( !\soc_inst|m0_1|u_logic|Ri0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wh0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hk0wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ri0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Qyc3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rvv2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qyc3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Rvv2z4~q ) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qyc3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kc03z4~q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qyc3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kc03z4~q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Wh0wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kc03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rvv2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qyc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bh0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .lut_mask = 64'hAA00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~6 .lut_mask = 64'hCC88CC8800F300C0;
+defparam \soc_inst|m0_1|u_logic|P12wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ia0wx4 (
+// Location: LABCELL_X22_Y22_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ia0wx4~combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Imu2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cvr2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Imu2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Cvr2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ia0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ia0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ia0wx4 .lut_mask = 64'h0CCC0CCC0CCCCCCC;
-defparam \soc_inst|m0_1|u_logic|Ia0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~4 .lut_mask = 64'hFF00AAAA00000000;
+defparam \soc_inst|m0_1|u_logic|P12wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bh0wx4~1 (
+// Location: FF_X19_Y19_N35
+dffeas \soc_inst|m0_1|u_logic|E913z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|E913z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E913z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E913z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bh0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ia0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Tj0wx4~combout  & (\soc_inst|m0_1|u_logic|Bh0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~53_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|T1d3z4~q ) # 
+// (\soc_inst|m0_1|u_logic|E913z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|T1d3z4~q ) # (\soc_inst|m0_1|u_logic|E913z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bh0wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ia0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E913z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .lut_mask = 64'h00000000000D000D;
-defparam \soc_inst|m0_1|u_logic|Bh0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~7 .lut_mask = 64'hFF005F00FFF05F00;
+defparam \soc_inst|m0_1|u_logic|P12wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y22_N1
-dffeas \soc_inst|m0_1|u_logic|Rdg3z4 (
+// Location: FF_X21_Y21_N44
+dffeas \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rdg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rdg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rdg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y21_N50
-dffeas \soc_inst|m0_1|u_logic|Wrg3z4 (
+// Location: FF_X21_Y21_N32
+dffeas \soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wrg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wrg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wrg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4~1 (
+// Location: MLABCELL_X21_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dmvwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rdg3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hqg3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Gfg3z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wrg3z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~5_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Eyr2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rdg3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hqg3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gfg3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wrg3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Eyr2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .lut_mask = 64'h00FF0F0F33335555;
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y20_N8
-dffeas \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|P12wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~5 .lut_mask = 64'hAA00AA00CCF0CCF0;
+defparam \soc_inst|m0_1|u_logic|P12wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4~0 (
+// Location: LABCELL_X22_Y23_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dmvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nag3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ccg3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dng3z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~0_combout  = ( \soc_inst|m0_1|u_logic|P12wx4~7_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (((\soc_inst|m0_1|u_logic|P12wx4~4_combout  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q )))) # (\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~7_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~5_combout  
+// & ( ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((\soc_inst|m0_1|u_logic|P12wx4~4_combout ))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q ))) # (\soc_inst|m0_1|u_logic|P12wx4~6_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|P12wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (((\soc_inst|m0_1|u_logic|P12wx4~4_combout  & !\soc_inst|m0_1|u_logic|H3d3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (((\soc_inst|m0_1|u_logic|P12wx4~4_combout  & !\soc_inst|m0_1|u_logic|H3d3z4~q )))) # (\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (((!\soc_inst|m0_1|u_logic|H3d3z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nag3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ccg3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dng3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|P12wx4~6_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P12wx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|P12wx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .lut_mask = 64'h333300FF0F0F5555;
-defparam \soc_inst|m0_1|u_logic|Dmvwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4~0 .lut_mask = 64'h3F110C113FBB0C11;
+defparam \soc_inst|m0_1|u_logic|P12wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmvwx4 (
+// Location: LABCELL_X22_Y23_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dmvwx4~combout  = ( \soc_inst|m0_1|u_logic|Dmvwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Dmvwx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Dmvwx4~0_combout  
-// & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|P12wx4~combout  = ( \soc_inst|m0_1|u_logic|P12wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hq33z4~q  & (!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rr83z4~q )))) # (\soc_inst|m0_1|u_logic|Hq33z4~q  & (((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rr83z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dmvwx4~1_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dmvwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hq33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rr83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|P12wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|P12wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dmvwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dmvwx4 .lut_mask = 64'h5151515140404040;
-defparam \soc_inst|m0_1|u_logic|Dmvwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P12wx4 .lut_mask = 64'h0000D0DD00000000;
+defparam \soc_inst|m0_1|u_logic|P12wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jtdwx4~0 (
+// Location: LABCELL_X35_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[8]~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|Dmvwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Dmvwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|P12wx4~combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .lut_mask = 64'hFFF0FFF00F000F00;
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[8]~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jtdwx4~1 (
+// Location: FF_X33_Y21_N5
+dffeas \soc_inst|m0_1|u_logic|W3f3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|W3f3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W3f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W3f3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nfb3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|X0ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X0ewx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Jtdwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nfb3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o [7] )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y16_N29
-dffeas \soc_inst|switches_1|switch_store[1][1] (
+// Location: FF_X39_Y20_N23
+dffeas \soc_inst|m0_1|u_logic|Nfb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[1]~input_o ),
+	.d(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][1]~q ),
+	.q(\soc_inst|m0_1|u_logic|Nfb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][1] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~9 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dhb3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~90  ))
+// \soc_inst|m0_1|u_logic|Add0~10  = CARRY(( !\soc_inst|m0_1|u_logic|Dhb3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~90  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~90 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~9_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~10 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add0~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~9 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbtwx4~0 (
+// Location: MLABCELL_X39_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hrmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mbtwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
-// (\soc_inst|switches_1|switch_store[1][1]~q ))) ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (\soc_inst|switches_1|switch_store[1][1]~q  & 
-// (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & \soc_inst|interconnect_1|Equal1~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Hrmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dhb3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~9_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Nfb3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dhb3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~9_sumout ))) 
+// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Nfb3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dhb3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Dhb3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|switches_1|switch_store[1][1]~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nfb3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Add0~9_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mbtwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .lut_mask = 64'h0000000000050F05;
-defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .lut_mask = 64'h00FFFFFFC5FFC5FF;
+defparam \soc_inst|m0_1|u_logic|Hrmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y16_N38
-dffeas \soc_inst|m0_1|u_logic|S3i3z4~DUPLICATE (
+// Location: FF_X39_Y20_N14
+dffeas \soc_inst|m0_1|u_logic|Dhb3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pomvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hrmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -56629,1818 +56383,1914 @@ dffeas \soc_inst|m0_1|u_logic|S3i3z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S3i3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Dhb3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S3i3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S3i3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dhb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dhb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bgfwx4~0 (
+// Location: LABCELL_X33_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~77 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bgfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mbtwx4~0_combout  & (\soc_inst|m0_1|u_logic|S3i3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|B2i3z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mbtwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|B2i3z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Add0~77_sumout  = SUM(( !\soc_inst|m0_1|u_logic|M5f3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~10  ))
+// \soc_inst|m0_1|u_logic|Add0~78  = CARRY(( !\soc_inst|m0_1|u_logic|M5f3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~10  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mbtwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B2i3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|S3i3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bgfwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~77_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~78 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .lut_mask = 64'h8C8C8C8C008C008C;
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~77 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~77 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bgfwx4~1 (
+// Location: LABCELL_X33_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Armvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bgfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Mrdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jtdwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Armvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5f3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~77_sumout ))) # 
+// (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|W3f3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M5f3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ( 
+// ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~77_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|W3f3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|M5f3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|M5f3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bgfwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W3f3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add0~77_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .lut_mask = 64'h00000000CEDFCEDF;
-defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Armvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Armvx4~0 .lut_mask = 64'h3333FFFFF377F377;
+defparam \soc_inst|m0_1|u_logic|Armvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mx0wx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mx0wx4~combout  = ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mx0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout  & \soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & !\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout  & \soc_inst|m0_1|u_logic|Fjlwx4~0_combout )) ) ) )
+// Location: FF_X33_Y21_N17
+dffeas \soc_inst|m0_1|u_logic|M5f3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Armvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|M5f3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M5f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M5f3z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X35_Y21_N50
+dffeas \soc_inst|m0_1|u_logic|Kxe3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kxe3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mx0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mx0wx4 .lut_mask = 64'h0050505000F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Mx0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kxe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kxe3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iv0wx4~0 (
+// Location: LABCELL_X33_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tqmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mx0wx4~combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Tqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aze3z4~q  & ( \soc_inst|m0_1|u_logic|Kxe3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Add0~25_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aze3z4~q  & ( \soc_inst|m0_1|u_logic|Kxe3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Add0~25_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aze3z4~q  & ( !\soc_inst|m0_1|u_logic|Kxe3z4~q  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~25_sumout )) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aze3z4~q  & ( !\soc_inst|m0_1|u_logic|Kxe3z4~q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & (!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~25_sumout ))) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Iv0wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add0~25_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kxe3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .lut_mask = 64'h0000000000003F7F;
-defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .lut_mask = 64'h7333FBBB7737FFBF;
+defparam \soc_inst|m0_1|u_logic|Tqmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y18_N26
-dffeas \soc_inst|m0_1|u_logic|Df83z4 (
+// Location: FF_X33_Y17_N14
+dffeas \soc_inst|m0_1|u_logic|Aze3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Tqmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Df83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Aze3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Df83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aze3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aze3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y18_N16
-dffeas \soc_inst|m0_1|u_logic|D1p2z4 (
+// Location: FF_X31_Y17_N47
+dffeas \soc_inst|switches_1|switch_store[0][9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.asdata(\SW[9]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D1p2z4~q ),
+	.q(\soc_inst|switches_1|switch_store[0][9]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D1p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D1p2z4 .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[0][9] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][9] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y25_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~6 (
+// Location: LABCELL_X33_Y21_N0
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[9]~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|U573z4~q  & ( (!\soc_inst|m0_1|u_logic|Uj93z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U573z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Uj93z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|ram_1|data_to_memory[9]~9_combout  = (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select [1] & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ))) # (\soc_inst|ram_1|byte_select [1] & 
+// (!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ))))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uj93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U573z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|byte_select [1]),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~6_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[9]~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .lut_mask = 64'h0000300200000002;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~6 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[9]~9 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[9]~9 .lut_mask = 64'h030A030A030A030A;
+defparam \soc_inst|ram_1|data_to_memory[9]~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y20_N1
-dffeas \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE (
+// Location: FF_X31_Y17_N19
+dffeas \soc_inst|ram_1|byte_select[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.d(\soc_inst|ram_1|byte2~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ),
+	.q(\soc_inst|ram_1|byte_select [2]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|ram_1|byte_select[2] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~7 (
+// Location: M10K_X26_Y23_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[17]~10_combout ,\soc_inst|ram_1|data_to_memory[9]~9_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_bit_number = 9;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_bit_number = 9;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000574D59145FD617FFFFBBFF3BF73BF7C7D7E5014763FC5AF103FCCCDCCCDCCCD25F87AC9555555555555553706000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y15_N30
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[17]~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Djv2z4~q )))) ) ) )
+// \soc_inst|ram_1|data_to_memory[17]~10_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & ( (!\soc_inst|ram_1|byte_select [2] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( !\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & ( (\soc_inst|ram_1|byte_select [2] & \soc_inst|ram_1|write_cycle~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Djv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|ram_1|byte_select [2]),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|write_cycle~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~7_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[17]~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .lut_mask = 64'h0000320200000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~7 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[17]~10 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[17]~10 .lut_mask = 64'h05050F0F00000A0A;
+defparam \soc_inst|ram_1|data_to_memory[17]~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yw0wx4~8 (
+// Location: LABCELL_X31_Y17_N45
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[9]~16 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Yw0wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Df83z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|D1p2z4~q )))) # (\soc_inst|m0_1|u_logic|Df83z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout )) # (\soc_inst|m0_1|u_logic|D1p2z4~q ))) ) ) )
+// \soc_inst|interconnect_1|HRDATA[9]~16_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[9]~15_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
+// (\soc_inst|interconnect_1|HRDATA[9]~15_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # ((\soc_inst|switches_1|switch_store[0][9]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & ( 
+// (!\soc_inst|interconnect_1|HRDATA[9]~15_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[9]~15_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[0][9]~q )))) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df83z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|D1p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~7_combout ),
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[9]~15_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[0][9]~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .lut_mask = 64'hF531000000000000;
-defparam \soc_inst|m0_1|u_logic|Yw0wx4~8 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[9]~16 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[9]~16 .lut_mask = 64'hC0C5C0C5CACFCACF;
+defparam \soc_inst|interconnect_1|HRDATA[9]~16 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gdawx4~1 (
+// Location: LABCELL_X36_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gdawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Gdawx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( 
-// \soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yw0wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Yw0wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Gdawx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Khfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Vve3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Y9l2z4~q ) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vve3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gdawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yw0wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vve3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .lut_mask = 64'h0705070507050F0F;
-defparam \soc_inst|m0_1|u_logic|Gdawx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .lut_mask = 64'h0000000000550F5F;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fq0wx4 (
+// Location: LABCELL_X33_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fq0wx4~combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|Add5~21_sumout  & \soc_inst|m0_1|u_logic|K1wvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Add3~69_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Add5~21_sumout  & 
-// \soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|Add5~21_sumout  & 
-// \soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Add3~69_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Add5~21_sumout  & 
-// \soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Khfwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ecowx4~combout  & ( (!\soc_inst|m0_1|u_logic|I2twx4~0_combout  & (!\soc_inst|m0_1|u_logic|Khfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # 
+// (!\soc_inst|interconnect_1|HRDATA[9]~16_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~69_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Khfwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fq0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fq0wx4 .lut_mask = 64'h0303575703FF57FF;
-defparam \soc_inst|m0_1|u_logic|Fq0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .lut_mask = 64'hC800C80000000000;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irjvx4~0 (
+// Location: LABCELL_X33_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Irjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fq0wx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|Fq0wx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Khfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Khfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Aze3z4~q  & (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Kxe3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Aze3z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # ((\soc_inst|m0_1|u_logic|Kxe3z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kxe3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Irjvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khfwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .lut_mask = 64'h2323EFEF2300EF00;
-defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y17_N40
-dffeas \soc_inst|m0_1|u_logic|W5p2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Irjvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W5p2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W5p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W5p2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X29_Y23_N17
-dffeas \soc_inst|m0_1|u_logic|Tvn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tvn2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tvn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .lut_mask = 64'h00000000CF45CF45;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jf92z4~0 (
+// Location: LABCELL_X27_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khfwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jf92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Tvn2z4~q  & \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Khfwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yxdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Khfwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Zndwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yxdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Khfwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Zndwx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tvn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jf92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .lut_mask = 64'h0040000000000000;
-defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .lut_mask = 64'h00000000ABABEFEF;
+defparam \soc_inst|m0_1|u_logic|Khfwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N37
-dffeas \soc_inst|m0_1|u_logic|Ixn2z4 (
+// Location: FF_X39_Y20_N2
+dffeas \soc_inst|m0_1|u_logic|S5b3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [1]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|T5tvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ixn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|S5b3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ixn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ixn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S5b3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S5b3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~0 (
+// Location: LABCELL_X36_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6twx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Md92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wu53z4~q  & ( \soc_inst|m0_1|u_logic|Nl43z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wu53z4~q  & ( !\soc_inst|m0_1|u_logic|Nl43z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wu53z4~q  & ( !\soc_inst|m0_1|u_logic|Nl43z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Q6twx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Mcc3z4~q )) # (\soc_inst|m0_1|u_logic|Vac3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Mcc3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wu53z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nl43z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Md92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6twx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Md92z4~0 .lut_mask = 64'h1100100001000000;
-defparam \soc_inst|m0_1|u_logic|Md92z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y20_N17
-dffeas \soc_inst|m0_1|u_logic|Ec33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ec33z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ec33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .lut_mask = 64'h005500550F5F0F5F;
+defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~1 (
+// Location: MLABCELL_X34_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6twx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Md92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ec33z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|V223z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Q6twx4~1_combout  = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R0t2z4~q  & (!\soc_inst|m0_1|u_logic|S5b3z4~q  & !\soc_inst|m0_1|u_logic|Q6twx4~0_combout )) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R0t2z4~q  & !\soc_inst|m0_1|u_logic|Q6twx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|S5b3z4~q  & !\soc_inst|m0_1|u_logic|Q6twx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B2uvx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Q6twx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V223z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ec33z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|R0t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|S5b3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6twx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Md92z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6twx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md92z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Md92z4~1 .lut_mask = 64'h0A0000000C000000;
-defparam \soc_inst|m0_1|u_logic|Md92z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .lut_mask = 64'hFF00F000CC00C000;
+defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y26_N4
-dffeas \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE (
+// Location: FF_X33_Y21_N38
+dffeas \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ey03z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~2 (
+// Location: LABCELL_X33_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Md92z4~2_combout  = ( !\soc_inst|m0_1|u_logic|K103z4~q  & ( \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K103z4~q  & ( !\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K103z4~q  & ( !\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Rhfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qfa3z4~q ) # ((!\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|I7owx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|I7owx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|K103z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qfa3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Md92z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md92z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Md92z4~2 .lut_mask = 64'h00C0008000400000;
-defparam \soc_inst|m0_1|u_logic|Md92z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~3 (
+// Location: LABCELL_X33_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Md92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Md92z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Md92z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Jf92z4~0_combout  & (!\soc_inst|m0_1|u_logic|Md92z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ixn2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Rhfwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rhfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q6twx4~1_combout )))) # 
+// (\soc_inst|m0_1|u_logic|B7owx4~combout  & (!\soc_inst|interconnect_1|HRDATA[1]~21_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q6twx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jf92z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ixn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Md92z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Md92z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Md92z4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6twx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Md92z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Md92z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Md92z4~3 .lut_mask = 64'hA020000000000000;
-defparam \soc_inst|m0_1|u_logic|Md92z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .lut_mask = 64'hE0EEE0EE00000000;
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs0wx4~0 (
+// Location: LABCELL_X27_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|H4p2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|H1qwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4p2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|H4p2z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4p2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Jmdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rhfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fkdwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jmdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rhfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Fkdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Md92z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .lut_mask = 64'hE4E4F5F5E4E4A0F5;
-defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .lut_mask = 64'h00000000AFAAAFFF;
+defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|St0wx4 (
+// Location: LABCELL_X27_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mx0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|St0wx4~combout  = ( \soc_inst|m0_1|u_logic|St0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|St0wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|Mx0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Khfwx4~3_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( 
+// \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|W6iwx4~combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|St0wx4~8_combout ),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|St0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|St0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|St0wx4 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|St0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .lut_mask = 64'h55550000F5F5F0F0;
+defparam \soc_inst|m0_1|u_logic|Mx0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~1 (
+// Location: LABCELL_X27_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mx0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mq0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|St0wx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|St0wx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|St0wx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|St0wx4~combout )) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|St0wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|St0wx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Mx0wx4~combout  = ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mx0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mx0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mx0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .lut_mask = 64'h303030BA30BA3030;
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mx0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mx0wx4 .lut_mask = 64'h005F5F5F00000000;
+defparam \soc_inst|m0_1|u_logic|Mx0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cs0wx4~1 (
+// Location: LABCELL_X17_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iv0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cs0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mx0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Iv0wx4~1_combout  & (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mx0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Iv0wx4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Iv0wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .lut_mask = 64'h05AF05AF0A5F0A5F;
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .lut_mask = 64'h0000000015151555;
+defparam \soc_inst|m0_1|u_logic|Iv0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cs0wx4~0 (
+// Location: MLABCELL_X15_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df83z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cs0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cs0wx4~1_combout  & \soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Cs0wx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Df83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iv0wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df83z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .lut_mask = 64'h0F030F0B03030B0B;
-defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df83z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Df83z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mq0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Mq0wx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Mq0wx4~1_combout  & !\soc_inst|m0_1|u_logic|Cs0wx4~0_combout )) ) )
+// Location: FF_X15_Y15_N38
+dffeas \soc_inst|m0_1|u_logic|Df83z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Df83z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Df83z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Df83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Df83z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mq0wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X21_Y19_N55
+dffeas \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .lut_mask = 64'hA000A00020002000;
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~0 (
+// Location: FF_X16_Y16_N13
+dffeas \soc_inst|m0_1|u_logic|U573z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iv0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U573z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U573z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mq0wx4~2_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Et0wx4~combout  & (((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mq0wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Et0wx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xcuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ozo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Df83z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ozo2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Df83z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ozo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// (((\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Df83z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ozo2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Df83z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Et0wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mq0wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Df83z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|U573z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ozo2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .lut_mask = 64'h0000115500001555;
-defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .lut_mask = 64'h031103DDCF11CFDD;
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y20_N20
-dffeas \soc_inst|m0_1|u_logic|Psn2z4 (
+// Location: FF_X15_Y15_N4
+dffeas \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kwo2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4~0 (
+// Location: LABCELL_X16_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H1qwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fi93z4~q  & ( \soc_inst|m0_1|u_logic|Arn2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Psn2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Ohv2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fi93z4~q  & ( \soc_inst|m0_1|u_logic|Arn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Psn2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Ohv2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fi93z4~q  & ( !\soc_inst|m0_1|u_logic|Arn2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Psn2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~q ) # (\soc_inst|m0_1|u_logic|Ohv2z4~q )))) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Fi93z4~q  & ( !\soc_inst|m0_1|u_logic|Arn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Psn2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Ohv2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Xcuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uj93z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Djv2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zxo2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Psn2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ohv2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fi93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Arn2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uj93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zxo2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Djv2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H1qwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .lut_mask = 64'h4700473347CC47FF;
-defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .lut_mask = 64'h333300FF0F0F5555;
+defparam \soc_inst|m0_1|u_logic|Xcuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N19
-dffeas \soc_inst|m0_1|u_logic|Eun2z4 (
+// Location: MLABCELL_X21_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xcuwx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Xcuwx4~combout  = ( \soc_inst|m0_1|u_logic|Xcuwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Xcuwx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xcuwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xcuwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xcuwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xcuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xcuwx4 .lut_mask = 64'h0F050F050A000A00;
+defparam \soc_inst|m0_1|u_logic|Xcuwx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vl92z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Vl92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|D1p2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|D1p2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Vl92z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .lut_mask = 64'h1000000000000000;
+defparam \soc_inst|m0_1|u_logic|Vl92z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X15_Y14_N43
+dffeas \soc_inst|m0_1|u_logic|K423z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|K423z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eun2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K423z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eun2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eun2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K423z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K423z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4~1 (
+// Location: LABCELL_X18_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H1qwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Eun2z4~q  & ( \soc_inst|m0_1|u_logic|Od83z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Wzy2z4~q )) # (\soc_inst|m0_1|u_logic|F473z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~q ) # (\soc_inst|m0_1|u_logic|F8u2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eun2z4~q  & ( \soc_inst|m0_1|u_logic|Od83z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|F473z4~q  & ((\soc_inst|m0_1|u_logic|Wzy2z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~q ) # (\soc_inst|m0_1|u_logic|F8u2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eun2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Od83z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Wzy2z4~q )) # (\soc_inst|m0_1|u_logic|F473z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|F8u2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eun2z4~q  & ( !\soc_inst|m0_1|u_logic|Od83z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|F473z4~q  & ((\soc_inst|m0_1|u_logic|Wzy2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|F8u2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Yj92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Td33z4~q  & ( \soc_inst|m0_1|u_logic|K423z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Td33z4~q  & ( !\soc_inst|m0_1|u_logic|K423z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Td33z4~q  & ( !\soc_inst|m0_1|u_logic|K423z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F473z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|F8u2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Eun2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Od83z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Td33z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|K423z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H1qwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yj92z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .lut_mask = 64'h0344CF440377CF77;
-defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .lut_mask = 64'h0C00080004000000;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4 (
+// Location: LABCELL_X16_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H1qwx4~combout  = ( !\soc_inst|m0_1|u_logic|H1qwx4~0_combout  & ( \soc_inst|m0_1|u_logic|H1qwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|H1qwx4~0_combout  
-// & ( !\soc_inst|m0_1|u_logic|H1qwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H1qwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H1qwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  
-// ) ) )
+// \soc_inst|m0_1|u_logic|Yj92z4~0_combout  = ( \soc_inst|m0_1|u_logic|Cn43z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lw53z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cn43z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Lw53z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|H1qwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|H1qwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lw53z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cn43z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yj92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H1qwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H1qwx4 .lut_mask = 64'h5555444411110000;
-defparam \soc_inst|m0_1|u_logic|H1qwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .lut_mask = 64'h000000000E000200;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X0ewx4~0 (
+// Location: LABCELL_X13_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X0ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H1qwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Yj92z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Z203z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tz03z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tz03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z203z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yj92z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .lut_mask = 64'hFF00FF00F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .lut_mask = 64'h000088000000C000;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X0ewx4~1 (
+// Location: LABCELL_X18_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yj92z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X0ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yxdwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|X0ewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Yj92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Yj92z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yj92z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vl92z4~0_combout  & (!\soc_inst|m0_1|u_logic|Yj92z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|S2p2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yxdwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vl92z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S2p2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yj92z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yj92z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yj92z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yj92z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .lut_mask = 64'h0F0F0F0F33333333;
-defparam \soc_inst|m0_1|u_logic|X0ewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|Yj92z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tq7wx4~0 (
+// Location: LABCELL_X19_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hy0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Qtdwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( \soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( \soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & !\soc_inst|m0_1|u_logic|H4p2z4~q )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4p2z4~q ) 
+// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Yj92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ym93z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|H4p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yj92z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .lut_mask = 64'hBB8BBB8BB888BB8B;
+defparam \soc_inst|m0_1|u_logic|Hy0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fq7wx4~0 (
+// Location: LABCELL_X22_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bv0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vzdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nodwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Vzdwx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vzdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nodwx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Bv0wx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~85_sumout  & ( \soc_inst|m0_1|u_logic|Add5~73_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~85_sumout  & ( \soc_inst|m0_1|u_logic|Add5~73_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~85_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~85_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~85_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .lut_mask = 64'h00000F0FFFFF0F0F;
-defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bv0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bv0wx4 .lut_mask = 64'h00550F5F33773F7F;
+defparam \soc_inst|m0_1|u_logic|Bv0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Po7wx4~0 (
+// Location: MLABCELL_X21_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tmjvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Po7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Tmjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( \soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( \soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|H4p2z4~q  & ( !\soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4p2z4~q  & ( !\soc_inst|m0_1|u_logic|Bv0wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Plx2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Po7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tmjvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .lut_mask = 64'h6420642000000000;
-defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .lut_mask = 64'h0C0FFCFF080AA8AA;
+defparam \soc_inst|m0_1|u_logic|Tmjvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vr7wx4~0 (
+// Location: FF_X21_Y12_N14
+dffeas \soc_inst|m0_1|u_logic|H4p2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Tmjvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H4p2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H4p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H4p2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y17_N13
+dffeas \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vr7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & \soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Md92z4~2_combout  = ( \soc_inst|m0_1|u_logic|K103z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K103z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|K103z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Md92z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .lut_mask = 64'hAAAFAAAF00000000;
-defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~2 .lut_mask = 64'h0A02080000000000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X15_Y17_N34
+dffeas \soc_inst|m0_1|u_logic|V223z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V223z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V223z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V223z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Md92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|V223z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ec33z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|V223z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Ec33z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ec33z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|V223z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Md92z4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Md92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~1 .lut_mask = 64'h0A08000000080000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jmdwx4~0 (
+// Location: LABCELL_X13_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jmdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bdwwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Md92z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Wu53z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nl43z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nl43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wu53z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Md92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .lut_mask = 64'h00FF00FF55555555;
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~0 .lut_mask = 64'h0000000022003000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rw7wx4~1 (
+// Location: FF_X18_Y15_N52
+dffeas \soc_inst|m0_1|u_logic|Tvn2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tvn2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tvn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvn2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jf92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rw7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rw7wx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Jmdwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Jf92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tvn2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tvn2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jf92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .lut_mask = 64'h00330033FF33FF33;
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .lut_mask = 64'h0200000000000000;
+defparam \soc_inst|m0_1|u_logic|Jf92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuxwx4~0 (
+// Location: LABCELL_X17_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md92z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kw7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rw7wx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Kw7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rw7wx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Kw7wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rw7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Md92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Jf92z4~0_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Md92z4~2_combout  & (\soc_inst|m0_1|u_logic|Ixn2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Md92z4~1_combout  & !\soc_inst|m0_1|u_logic|Md92z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jf92z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Md92z4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Md92z4~1_combout  & !\soc_inst|m0_1|u_logic|Md92z4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Md92z4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ixn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Md92z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Md92z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jf92z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Md92z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .lut_mask = 64'h00000F0FF0F0FFFF;
-defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md92z4~3 .lut_mask = 64'hA000000020000000;
+defparam \soc_inst|m0_1|u_logic|Md92z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hr7wx4~0 (
+// Location: LABCELL_X18_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qs0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Xuxwx4~combout  $ 
-// (((\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Xuxwx4~combout  $ (((!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|H1qwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( !\soc_inst|m0_1|u_logic|H4p2z4~q  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|W5p2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Md92z4~3_combout  & ( !\soc_inst|m0_1|u_logic|H4p2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4p2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Md92z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .lut_mask = 64'h001E0000FFFFFFE1;
-defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .lut_mask = 64'hAAAAF3F3AAAAC0F3;
+defparam \soc_inst|m0_1|u_logic|Qs0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc7wx4~0 (
+// Location: LABCELL_X16_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fc7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & !\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( 
-// ((\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & !\soc_inst|m0_1|u_logic|Vr7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|S8ewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Mq0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|St0wx4~combout  & ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|St0wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|St0wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Ecawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fc7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .lut_mask = 64'h5F0F5F0F55005500;
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .lut_mask = 64'h3773055033330000;
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc7wx4~1 (
+// Location: MLABCELL_X15_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cs0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fc7wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fc7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Po7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Cs0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Po7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fc7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .lut_mask = 64'hF351F35100000000;
-defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .lut_mask = 64'h0A5F0A5F05AF05AF;
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cb3wx4~0 (
+// Location: LABCELL_X16_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cs0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cb3wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wai2z4~q  & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Nd3wx4~combout  & (((\soc_inst|m0_1|u_logic|R5zvx4~2_combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout 
-// ))))) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (((!\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((\soc_inst|m0_1|u_logic|R5zvx4~2_combout ))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ))))) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wai2z4~q  & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Nd3wx4~combout  & (((\soc_inst|m0_1|u_logic|R5zvx4~2_combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout ))))) # (\soc_inst|m0_1|u_logic|K0qvx4~combout 
-//  & (((!\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((\soc_inst|m0_1|u_logic|R5zvx4~2_combout ))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Cs0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Cs0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Cs0wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cs0wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cs0wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & \soc_inst|m0_1|u_logic|Qs0wx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cs0wx4~1_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .lut_mask = 64'h008B008BBB8BBB8B;
-defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .lut_mask = 64'h008800F800FF00FF;
+defparam \soc_inst|m0_1|u_logic|Cs0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R38wx4~0 (
+// Location: LABCELL_X16_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R38wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Mq0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Cs0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Mq0wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Add5~21_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mq0wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R38wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R38wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R38wx4~0 .lut_mask = 64'hF0F07070F0F0B0B0;
-defparam \soc_inst|m0_1|u_logic|R38wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .lut_mask = 64'hC400C40000000000;
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R38wx4~1 (
+// Location: LABCELL_X29_Y21_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R38wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|R38wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # ((\soc_inst|m0_1|u_logic|X77wx4~combout  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|R38wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X77wx4~combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|X77wx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Et0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R38wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R38wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Et0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R38wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R38wx4~1 .lut_mask = 64'hE400E400F100F100;
-defparam \soc_inst|m0_1|u_logic|R38wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .lut_mask = 64'hFF50FF5050505050;
+defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qb3wx4 (
+// Location: LABCELL_X29_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qb3wx4~combout  = ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Op2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ucqvx4~combout  & \soc_inst|m0_1|u_logic|R38wx4~1_combout 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Op2wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|R38wx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Et0wx4~combout  = ( !\soc_inst|m0_1|u_logic|Et0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Et0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R38wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Et0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Et0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qb3wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qb3wx4 .lut_mask = 64'hA0AAA0AAA0A8A0A8;
-defparam \soc_inst|m0_1|u_logic|Qb3wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Et0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Et0wx4 .lut_mask = 64'h5F0000005F5F0000;
+defparam \soc_inst|m0_1|u_logic|Et0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z9zvx4~0 (
+// Location: LABCELL_X16_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mq0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z9zvx4~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout ) # (!\soc_inst|m0_1|u_logic|Wspvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Mq0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|D31wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Et0wx4~combout  & ( \soc_inst|m0_1|u_logic|Mq0wx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|D31wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Et0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Mq0wx4~2_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mq0wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Et0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .lut_mask = 64'h00000000FFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .lut_mask = 64'h00000000003700FF;
+defparam \soc_inst|m0_1|u_logic|Mq0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y25_N49
-dffeas \soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE (
+// Location: FF_X21_Y19_N25
+dffeas \soc_inst|m0_1|u_logic|F8u2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|F8u2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F8u2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8u2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~17 (
+// Location: MLABCELL_X21_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~22  ))
-// \soc_inst|m0_1|u_logic|Add3~18  = CARRY(( !\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~22  ))
+// \soc_inst|m0_1|u_logic|H1qwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Eun2z4~q  & ( \soc_inst|m0_1|u_logic|Od83z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # ((\soc_inst|m0_1|u_logic|F8u2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|F473z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eun2z4~q  & ( \soc_inst|m0_1|u_logic|Od83z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|F8u2z4~q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|F473z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eun2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Od83z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q ) # ((\soc_inst|m0_1|u_logic|F8u2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|F473z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eun2z4~q  & ( !\soc_inst|m0_1|u_logic|Od83z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|F8u2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|F473z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|F8u2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|F473z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Eun2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Od83z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~22 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~17_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~18 ),
+	.combout(\soc_inst|m0_1|u_logic|H1qwx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~17 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .lut_mask = 64'h02468ACE13579BDF;
+defparam \soc_inst|m0_1|u_logic|H1qwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~13 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~18  ))
-// \soc_inst|m0_1|u_logic|Add3~14  = CARRY(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~18  ))
-
-	.dataa(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~18 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~13_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~14 ),
-	.shareout());
+// Location: FF_X18_Y13_N49
+dffeas \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mq0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~13 .lut_mask = 64'h0000FFFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add3~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~9 (
+// Location: MLABCELL_X21_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~14  ))
-// \soc_inst|m0_1|u_logic|Add3~10  = CARRY(( !\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~14  ))
+// \soc_inst|m0_1|u_logic|H1qwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ohv2z4~q  & ( \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Psn2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Arn2z4~q )))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ohv2z4~q  & ( \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Psn2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Arn2z4~q ))))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (((\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ohv2z4~q  & ( !\soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Psn2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Arn2z4~q ))))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ohv2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Psn2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Arn2z4~q 
+// ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Psn2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Arn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ohv2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~14 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~9_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~10 ),
+	.combout(\soc_inst|m0_1|u_logic|H1qwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~9 .lut_mask = 64'h0000FFFF0000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add3~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .lut_mask = 64'h50305F30503F5F3F;
+defparam \soc_inst|m0_1|u_logic|H1qwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~5 (
+// Location: MLABCELL_X21_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H1qwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~10  ))
-// \soc_inst|m0_1|u_logic|Add3~6  = CARRY(( !\soc_inst|m0_1|u_logic|Omk2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~10  ))
+// \soc_inst|m0_1|u_logic|H1qwx4~combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H1qwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H1qwx4~1_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H1qwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H1qwx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~10 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~5_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add3~6 ),
+	.combout(\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~5 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H1qwx4 .lut_mask = 64'h3030303033003300;
+defparam \soc_inst|m0_1|u_logic|H1qwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~1 (
+// Location: LABCELL_X30_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X0ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add3~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J0l2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~6  ))
+// \soc_inst|m0_1|u_logic|X0ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|H1qwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (!\soc_inst|m0_1|u_logic|H1qwx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
 	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add3~6 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add3~1_sumout ),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add3~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add3~1 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add3~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y15_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o~0_combout  = ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
-// ((\soc_inst|m0_1|u_logic|A67wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Add3~1_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # ((\soc_inst|m0_1|u_logic|A67wx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Add3~1_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # ((\soc_inst|m0_1|u_logic|A67wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Add3~1_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o~0 .lut_mask = 64'hCF8ACF8ACF8A0000;
-defparam \soc_inst|m0_1|u_logic|haddr_o~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .lut_mask = 64'hFFCCFFCC33003300;
+defparam \soc_inst|m0_1|u_logic|X0ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3ivx4~1 (
+// Location: LABCELL_X30_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jtdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3ivx4~1_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3ivx4~0_combout  & \soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( !\soc_inst|m0_1|u_logic|O3ivx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|O3ivx4~0_combout  & (\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|R1pvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|O3ivx4~0_combout  & !\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Jtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dmvwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Dmvwx4~combout ) # (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O3ivx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .lut_mask = 64'hAA002200AAAA2222;
-defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y17_N38
-dffeas \soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .lut_mask = 64'hFFF0FFF000F000F0;
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~1 (
+// Location: LABCELL_X30_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jtdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Glj2z4~q  & \soc_inst|m0_1|u_logic|U71xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE_q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Glj2z4~q  & \soc_inst|m0_1|u_logic|U71xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Jtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|X0ewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jtdwx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Glj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X0ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .lut_mask = 64'h0CFF0CFF0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y17_N16
-dffeas \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yd03z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .lut_mask = 64'h00FF00FF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Jtdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N20
-dffeas \soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: IOIBUF_X16_Y0_N1
+cyclonev_io_ibuf \SW[1]~input (
+	.i(SW[1]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[1]~input_o ));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE .power_up = "low";
+defparam \SW[1]~input .bus_hold = "false";
+defparam \SW[1]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N43
-dffeas \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE (
+// Location: FF_X33_Y15_N29
+dffeas \soc_inst|switches_1|switch_store[1][1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\SW[1]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q ),
+	.q(\soc_inst|switches_1|switch_store[1][1]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE_q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .lut_mask = 64'hAF002300AFAF2323;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~4 .shared_arith = "off";
+defparam \soc_inst|switches_1|switch_store[1][1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][1] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V41xx4~0 (
+// Location: LABCELL_X33_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbtwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V41xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Mbtwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[16]~7_combout  & ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) # 
+// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][1]~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|switches_1|switch_store[1][1]~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mbtwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V41xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V41xx4~0 .lut_mask = 64'h0005000500000000;
-defparam \soc_inst|m0_1|u_logic|V41xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y24_N29
-dffeas \soc_inst|m0_1|u_logic|Koj2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Koj2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Koj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Koj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .lut_mask = 64'h0000000000004747;
+defparam \soc_inst|m0_1|u_logic|Mbtwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ab1xx4~0 (
+// Location: MLABCELL_X34_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bgfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Bgfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Mbtwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B2i3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|S3i3z4~q ))) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Mbtwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|S3i3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B2i3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mbtwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bgfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .lut_mask = 64'h0500050000000000;
-defparam \soc_inst|m0_1|u_logic|Ab1xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .lut_mask = 64'hDDDD0D0D00000000;
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~2 (
+// Location: MLABCELL_X28_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bgfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kt33z4~q ) # ((\soc_inst|m0_1|u_logic|V41xx4~0_combout  & !\soc_inst|m0_1|u_logic|Koj2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V41xx4~0_combout  & !\soc_inst|m0_1|u_logic|Koj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bgfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Jtdwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bgfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Jtdwx4~1_combout )) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kt33z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Koj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bgfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .lut_mask = 64'h33003300F3F0F3F0;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .lut_mask = 64'h00000000F0F3FCFF;
+defparam \soc_inst|m0_1|u_logic|Bgfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4 (
+// Location: MLABCELL_X28_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nd3wx4~combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~4_combout  & ( \soc_inst|m0_1|u_logic|Nd3wx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~4_combout  & ( \soc_inst|m0_1|u_logic|Nd3wx4~2_combout  ) ) # ( 
-// \soc_inst|m0_1|u_logic|Nd3wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~2_combout  & ( (((!\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ) # (\soc_inst|m0_1|u_logic|Nd3wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Nd3wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Vq1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Khfwx4~3_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Pmnwx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nd3wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nd3wx4 .lut_mask = 64'hFFFFF7FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Nd3wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .lut_mask = 64'hFFF0FF00F0F00000;
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~0 (
+// Location: MLABCELL_X28_Y20_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~0_combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Vq1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Vq1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Vq1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .lut_mask = 64'h0504555400045054;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .lut_mask = 64'h00F3F3F300000000;
+defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ux4wx4~0 (
+// Location: LABCELL_X31_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Vq1wx4~combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vq1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vq1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Glnwx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vq1wx4 .lut_mask = 64'h00000000AAAAAFAF;
+defparam \soc_inst|m0_1|u_logic|Vq1wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Owgvx4~0 (
+// Location: MLABCELL_X25_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d3z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Owgvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ywi2z4~q  & ( \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ywi2z4~q  & ( \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wfuwx4~combout  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) # (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ywi2z4~q  & ( !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) # (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|G6d3z4~1_combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & (((\soc_inst|m0_1|u_logic|G6d3z4~q )))) # (\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mtqvx4~combout ) # ((\soc_inst|m0_1|u_logic|Qrnvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & (((\soc_inst|m0_1|u_logic|G6d3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|G6d3z4~0_combout  & (\soc_inst|m0_1|u_logic|Mtqvx4~combout  & (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G6d3z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .lut_mask = 64'h0000FFFA3332FFFA;
-defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .lut_mask = 64'h01AB01AB45EF45EF;
+defparam \soc_inst|m0_1|u_logic|G6d3z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y17_N44
-dffeas \soc_inst|m0_1|u_logic|Ywi2z4 (
+// Location: FF_X25_Y11_N37
+dffeas \soc_inst|m0_1|u_logic|G6d3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|G6d3z4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -58449,2187 +58299,2251 @@ dffeas \soc_inst|m0_1|u_logic|Ywi2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|G6d3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ywi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ywi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G6d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G6d3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6mwx4~0 (
+// Location: FF_X15_Y14_N40
+dffeas \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ywi2z4~q  & ( !\soc_inst|m0_1|u_logic|U7w2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Dmivx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|G6d3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|G6d3z4~q ) # (!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( 
+// !\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dmivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .lut_mask = 64'hF0F0FAFA0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~0 (
+// Location: MLABCELL_X15_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmivx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X2rvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Dmivx4~1_combout  = ( \soc_inst|m0_1|u_logic|W0pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Dmivx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V4d3z4~q  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Xxovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Dmivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Xxovx4~combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dmivx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .lut_mask = 64'hFFCC554400000000;
+defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & (((\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|V3o2z4~q )) # (\soc_inst|m0_1|u_logic|Wfuwx4~combout ))) # (\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & (((\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & \soc_inst|m0_1|u_logic|V3o2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & \soc_inst|m0_1|u_logic|V3o2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & \soc_inst|m0_1|u_logic|V3o2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & \soc_inst|m0_1|u_logic|V3o2z4~q ) ) ) )
+// Location: FF_X15_Y14_N41
+dffeas \soc_inst|m0_1|u_logic|G1s2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G1s2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G1s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G1s2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V3o2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X16_Y15_N11
+dffeas \soc_inst|m0_1|u_logic|Rpe3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rpe3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .lut_mask = 64'h000F000F000F222F;
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rpe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rpe3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N48
-cyclonev_lcell_comb \soc_inst|switches_1|DataValid~1 (
+// Location: FF_X15_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|Fre3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fre3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fre3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fre3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~2 (
 // Equation(s):
-// \soc_inst|switches_1|DataValid~1_combout  = ( \soc_inst|switches_1|DataValid [0] & ( \KEY[0]~input_o  & ( ((!\soc_inst|switches_1|read_enable~q ) # (\soc_inst|switches_1|half_word_address [1])) # (\soc_inst|switches_1|half_word_address [0]) ) ) ) # ( 
-// \soc_inst|switches_1|DataValid [0] & ( !\KEY[0]~input_o  & ( (((!\soc_inst|switches_1|read_enable~q ) # (!\soc_inst|switches_1|last_buttons [0])) # (\soc_inst|switches_1|half_word_address [1])) # (\soc_inst|switches_1|half_word_address [0]) ) ) ) # ( 
-// !\soc_inst|switches_1|DataValid [0] & ( !\KEY[0]~input_o  & ( !\soc_inst|switches_1|last_buttons [0] ) ) )
+// \soc_inst|m0_1|u_logic|Oubwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fre3z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rpe3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fre3z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rpe3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fre3z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|switches_1|half_word_address [0]),
-	.datab(!\soc_inst|switches_1|half_word_address [1]),
-	.datac(!\soc_inst|switches_1|read_enable~q ),
-	.datad(!\soc_inst|switches_1|last_buttons [0]),
-	.datae(!\soc_inst|switches_1|DataValid [0]),
-	.dataf(!\KEY[0]~input_o ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rpe3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fre3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|DataValid~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oubwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|DataValid~1 .extended_lut = "off";
-defparam \soc_inst|switches_1|DataValid~1 .lut_mask = 64'hFF00FFF70000F7F7;
-defparam \soc_inst|switches_1|DataValid~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .lut_mask = 64'h5000000040004000;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y15_N50
-dffeas \soc_inst|switches_1|DataValid[0] (
+// Location: FF_X16_Y15_N32
+dffeas \soc_inst|m0_1|u_logic|Hue3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|DataValid~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|DataValid [0]),
+	.q(\soc_inst|m0_1|u_logic|Hue3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|DataValid[0] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|DataValid[0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hue3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hue3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N45
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[0]~27 (
+// Location: FF_X16_Y15_N23
+dffeas \soc_inst|m0_1|u_logic|To33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|To33z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|To33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|To33z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y20_N38
+dffeas \soc_inst|m0_1|u_logic|Kf23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kf23z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kf23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kf23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[0]~27_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|byte_select[0]~DUPLICATE_q ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o~5_combout  & ( (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & !\soc_inst|ram_1|byte_select[0]~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Oubwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|To33z4~q  & ( \soc_inst|m0_1|u_logic|Kf23z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|To33z4~q  & ( !\soc_inst|m0_1|u_logic|Kf23z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|To33z4~q  & ( !\soc_inst|m0_1|u_logic|Kf23z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
-	.datad(!\soc_inst|ram_1|byte_select[0]~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|To33z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kf23z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[0]~27_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oubwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[0]~27 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[0]~27 .lut_mask = 64'h0500050005550555;
-defparam \soc_inst|ram_1|data_to_memory[0]~27 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .lut_mask = 64'h4040400000400000;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y19_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[8]~28_combout ,\soc_inst|ram_1|data_to_memory[0]~27_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X15_Y19_N22
+dffeas \soc_inst|m0_1|u_logic|Cy43z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Cy43z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_first_bit_number = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_first_bit_number = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002BEADA68950125FB0878214FD22AAAAAAAAAAAA82048EFF3F0FFFFFFFFFFFF3C01554";
+defparam \soc_inst|m0_1|u_logic|Cy43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy43z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N45
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[8]~28 (
+// Location: FF_X16_Y19_N14
+dffeas \soc_inst|m0_1|u_logic|L763z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|L763z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L763z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L763z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[8]~28_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & !\soc_inst|ram_1|byte_select [1])) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ))) ) )
+// \soc_inst|m0_1|u_logic|Oubwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cy43z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|L763z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ),
-	.datac(!\soc_inst|ram_1|byte_select [1]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[8]~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cy43z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L763z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[8]~28_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oubwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[8]~28 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[8]~28 .lut_mask = 64'h1515151510101010;
-defparam \soc_inst|ram_1|data_to_memory[8]~28 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: IOIBUF_X12_Y0_N18
-cyclonev_io_ibuf \SW[0]~input (
-	.i(SW[0]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[0]~input_o ));
-// synopsys translate_off
-defparam \SW[0]~input .bus_hold = "false";
-defparam \SW[0]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .lut_mask = 64'h0000000022300000;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y15_N56
-dffeas \soc_inst|switches_1|switch_store[0][0] (
+// Location: FF_X21_Y20_N26
+dffeas \soc_inst|m0_1|u_logic|Tse3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[0]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][0]~q ),
+	.q(\soc_inst|m0_1|u_logic|Tse3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][0] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tse3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tse3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N54
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[0]~32 (
+// Location: MLABCELL_X21_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwbwx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[0]~32_combout  = ( \soc_inst|switches_1|switch_store[0][0]~q  & ( \soc_inst|interconnect_1|HRDATA[1]~19_combout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & (\soc_inst|switches_1|DataValid [0])) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][0]~q  & ( \soc_inst|interconnect_1|HRDATA[1]~19_combout  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & (\soc_inst|switches_1|DataValid [0])) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ))) ) ) ) # ( 
-// \soc_inst|switches_1|switch_store[0][0]~q  & ( !\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][0]~q  & 
-// ( !\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Lwbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tse3z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|switches_1|DataValid [0]),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
-	.datae(!\soc_inst|switches_1|switch_store[0][0]~q ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tse3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[0]~32 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[0]~32 .lut_mask = 64'h8888DDDD0A5F0A5F;
-defparam \soc_inst|interconnect_1|HRDATA[0]~32 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Lwbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B28wx4~0 (
+// Location: LABCELL_X16_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oubwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B28wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jiowx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jiowx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Qmdwx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Oubwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Lwbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oubwx4~2_combout  & (\soc_inst|m0_1|u_logic|Hue3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Oubwx4~1_combout  & !\soc_inst|m0_1|u_logic|Oubwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lwbwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oubwx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|Oubwx4~1_combout  & !\soc_inst|m0_1|u_logic|Oubwx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oubwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hue3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Oubwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oubwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lwbwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oubwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B28wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B28wx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|B28wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .lut_mask = 64'hA000000020000000;
+defparam \soc_inst|m0_1|u_logic|Oubwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahowx4~0 (
+// Location: LABCELL_X16_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Konvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ahowx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ztc3z4~q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Konvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pybwx4~combout  & ( \soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Szr2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|G1s2z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pybwx4~combout  & ( \soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Szr2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|G1s2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Pybwx4~combout  & ( !\soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Szr2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|G1s2z4~q ) 
+// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pybwx4~combout  & ( !\soc_inst|m0_1|u_logic|Oubwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Szr2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|G1s2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ztc3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oubwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ahowx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Konvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Konvx4~0 .lut_mask = 64'hB8BBB8BBB8BBB888;
+defparam \soc_inst|m0_1|u_logic|Konvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~113 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~113_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Konvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~42  ))
+// \soc_inst|m0_1|u_logic|Add5~114  = CARRY(( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Evcwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Konvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~42  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~42 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~113_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~114 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .lut_mask = 64'h0303030303FF03FF;
-defparam \soc_inst|m0_1|u_logic|Ahowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~113 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~113 .lut_mask = 64'h0000FF330000A05F;
+defparam \soc_inst|m0_1|u_logic|Add5~113 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tgowx4~0 (
+// Location: MLABCELL_X21_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ox1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tgowx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ahowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ahowx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|A5uvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ox1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ahowx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tgowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .lut_mask = 64'h000300030F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Tgowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tlyvx4~0 (
+// Location: LABCELL_X16_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ox1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tlyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|Aea3z4~q  & (!\soc_inst|m0_1|u_logic|Tgowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tgowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Ox1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aea3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tgowx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tlyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .lut_mask = 64'hF500F50031003100;
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .lut_mask = 64'hC0C0C0C0CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Ox1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tlyvx4~1 (
+// Location: LABCELL_X16_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ksbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tlyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tlyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[0]~32_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tlyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[0]~32_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ksbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzbwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kzbwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Konvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kzbwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Konvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tlyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .lut_mask = 64'h00000000F0C0FFCC;
-defparam \soc_inst|m0_1|u_logic|Tlyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .lut_mask = 64'hE2FCFCE2C0CCCCC0;
+defparam \soc_inst|m0_1|u_logic|Ksbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~1 (
+// Location: MLABCELL_X15_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iu1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # ((\soc_inst|m0_1|u_logic|Gdo2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|I7owx4~combout  & (\soc_inst|m0_1|u_logic|Xeo2z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Gdo2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout  & (\soc_inst|m0_1|u_logic|Ox1wx4~1_combout  & \soc_inst|m0_1|u_logic|Ksbwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gdo2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .lut_mask = 64'h8ACF8ACF00000000;
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Iu1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U18wx4~0 (
+// Location: LABCELL_X17_Y21_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I4s2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U18wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xtdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|E1ewx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xtdwx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|E1ewx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|I4s2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Iu1wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I4s2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U18wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U18wx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|U18wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I4s2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I4s2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|I4s2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~2 (
+// Location: FF_X17_Y21_N41
+dffeas \soc_inst|m0_1|u_logic|I4s2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|I4s2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I4s2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I4s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I4s2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pjyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pjyvx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[16]~30_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pjyvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[16]~30_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|G1s2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I4s2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G1s2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I4s2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G1s2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) 
+// ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pjyvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|I4s2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .lut_mask = 64'h0E000E000E0E0E0E;
-defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .lut_mask = 64'hA000000008000800;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y17_N22
-dffeas \soc_inst|m0_1|u_logic|T8f3z4 (
+// Location: FF_X17_Y21_N34
+dffeas \soc_inst|m0_1|u_logic|W5s2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T8f3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|W5s2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T8f3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T8f3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W5s2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W5s2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~0 (
+// Location: MLABCELL_X15_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H2f3z4~q  & (\soc_inst|m0_1|u_logic|T8f3z4~q  & (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|H2f3z4~q  & 
-// (((\soc_inst|m0_1|u_logic|T8f3z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kf23z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|W5s2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kf23z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|W5s2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kf23z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H2f3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W5s2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kf23z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .lut_mask = 64'h0000000003570357;
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .lut_mask = 64'h3000000080008000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~1 (
+// Location: FF_X16_Y15_N22
+dffeas \soc_inst|m0_1|u_logic|To33z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|To33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|To33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Hmyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|W3f3z4~q  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M5f3z4~q ))) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Hmyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|M5f3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L763z4~q  & 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|L763z4~q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W3f3z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hmyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|L763z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|To33z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .lut_mask = 64'hBBBB00000B0B0000;
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .lut_mask = 64'h0000540000000400;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: IOIBUF_X4_Y0_N18
-cyclonev_io_ibuf \SW[8]~input (
-	.i(SW[8]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[8]~input_o ));
+// Location: FF_X15_Y19_N23
+dffeas \soc_inst|m0_1|u_logic|Cy43z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cy43z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \SW[8]~input .bus_hold = "false";
-defparam \SW[8]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|Cy43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y16_N41
-dffeas \soc_inst|switches_1|switch_store[0][8] (
+// Location: FF_X16_Y21_N46
+dffeas \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[8]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][8]~q ),
+	.q(\soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][8] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][8] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N39
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[8]~33 (
+// Location: MLABCELL_X15_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~2 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[8]~33_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( (\soc_inst|interconnect_1|HRDATA[9]~15_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[0][8]~q 
-// ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8  & ( (\soc_inst|interconnect_1|HRDATA[9]~15_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|switches_1|switch_store[0][8]~q )) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Cy43z4~q )) # (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE_q ))))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[9]~15_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[0][8]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a8 ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cy43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[8]~33 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[8]~33 .lut_mask = 64'h0005000550555055;
-defparam \soc_inst|interconnect_1|HRDATA[8]~33 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .lut_mask = 64'h000000000B080000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S08wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|S08wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Godwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|C0ewx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Godwx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|C0ewx4~1_combout  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) )
+// Location: FF_X16_Y15_N10
+dffeas \soc_inst|m0_1|u_logic|Rpe3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rpe3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rpe3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rpe3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X16_Y15_N31
+dffeas \soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S08wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S08wx4~0 .lut_mask = 64'h0F000F000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|S08wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmyvx4~2 (
+// Location: MLABCELL_X15_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  = ( \soc_inst|interconnect_1|HRDATA[8]~33_combout  & ( \soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hmyvx4~1_combout  & !\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[8]~33_combout  & ( \soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hmyvx4~1_combout  ) ) ) # ( \soc_inst|interconnect_1|HRDATA[8]~33_combout  & ( !\soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Hmyvx4~1_combout  & !\soc_inst|m0_1|u_logic|B7owx4~combout )) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[8]~33_combout  & ( !\soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & \soc_inst|m0_1|u_logic|Hmyvx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~4_combout  = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fre3z4~q  & (\soc_inst|m0_1|u_logic|Rpe3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rpe3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fre3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hmyvx4~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datae(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fre3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rpe3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .lut_mask = 64'h2222220033333300;
-defparam \soc_inst|m0_1|u_logic|Hmyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .lut_mask = 64'hFF0F550533031101;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I21wx4~0 (
+// Location: MLABCELL_X15_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I21wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Duv2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Uku2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Uku2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I21wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I21wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I21wx4~0 .lut_mask = 64'h2030A0F02233AAFF;
-defparam \soc_inst|m0_1|u_logic|I21wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .lut_mask = 64'h000C000A00000000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7ewx4~0 (
+// Location: FF_X16_Y21_N41
+dffeas \soc_inst|m0_1|u_logic|Ug73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Iu1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ug73z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ug73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ug73z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nvdwx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Beowx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Beowx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cxc3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ug73z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cxc3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ug73z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .lut_mask = 64'h00FF000000FFFFFF;
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .lut_mask = 64'h000000000C00000A;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7ewx4~1 (
+// Location: MLABCELL_X15_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q7ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Xuxwx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Xuxwx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~7_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Dq83z4~q  & (!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tse3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tse3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tse3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dq83z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vf5wx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .lut_mask = 64'h0A000A00FAFFFAFF;
-defparam \soc_inst|m0_1|u_logic|Q7ewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .lut_mask = 64'hF050301000000000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rkyvx4~0 (
+// Location: MLABCELL_X15_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vf5wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~31_combout  & ( \soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & !\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[24]~31_combout  & ( \soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ecowx4~combout  ) ) ) # ( \soc_inst|interconnect_1|HRDATA[24]~31_combout  & ( !\soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & (!\soc_inst|m0_1|u_logic|B7owx4~combout  & !\soc_inst|m0_1|u_logic|Lcowx4~0_combout )) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[24]~31_combout  & ( !\soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & !\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Vf5wx4~4_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Vf5wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Vf5wx4~3_combout  & !\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vf5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vf5wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vf5wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vf5wx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .lut_mask = 64'hA0A08080AAAA8888;
-defparam \soc_inst|m0_1|u_logic|Rkyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .lut_mask = 64'h0000000000008000;
+defparam \soc_inst|m0_1|u_logic|Vf5wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I21wx4 (
+// Location: LABCELL_X16_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzbwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I21wx4~combout  = ( \soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I21wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I21wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|I21wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kzbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kzbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Kzbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D1awx4~0_combout  & !\soc_inst|m0_1|u_logic|K9z2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Kzbwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Kzbwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( ((\soc_inst|m0_1|u_logic|D1awx4~0_combout  & !\soc_inst|m0_1|u_logic|K9z2z4~q )) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I21wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kzbwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I21wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I21wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I21wx4 .lut_mask = 64'h000000FB00FB00FB;
-defparam \soc_inst|m0_1|u_logic|I21wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .lut_mask = 64'h4F4FFFFF4444FFFF;
+defparam \soc_inst|m0_1|u_logic|Kzbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~93 (
+// Location: LABCELL_X22_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~105 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~98  ))
-// \soc_inst|m0_1|u_logic|Add2~94  = CARRY(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~98  ))
+// \soc_inst|m0_1|u_logic|Add5~105_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~114  ))
+// \soc_inst|m0_1|u_logic|Add5~106  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~114  ))
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~98 ),
+	.cin(\soc_inst|m0_1|u_logic|Add5~114 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~93_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~94 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~106 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~93 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~93 .lut_mask = 64'h0000FFFF0000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add2~93 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~105 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~105 .lut_mask = 64'h0000A05F000000CC;
+defparam \soc_inst|m0_1|u_logic|Add5~105 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qjhvx4~0 (
+// Location: LABCELL_X16_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Add2~93_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Dkx2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Dkx2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Do1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|S3cwx4~1_combout  $ 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~93_sumout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qjhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .lut_mask = 64'h444444444E4E4E4E;
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .lut_mask = 64'hEEBBB8E200000000;
+defparam \soc_inst|m0_1|u_logic|Do1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tjlwx4~0 (
+// Location: LABCELL_X17_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Do1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Fuawx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~9_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .lut_mask = 64'hDFDFDFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .lut_mask = 64'h0000AA00F0F0FAF0;
+defparam \soc_inst|m0_1|u_logic|Do1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qjhvx4~1 (
+// Location: LABCELL_X16_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|I21wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|I21wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Do1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Do1wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Do1wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Do1wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Do1wx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I21wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Do1wx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Do1wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qjhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .lut_mask = 64'h0000CC440000C040;
-defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y21_N20
-dffeas \soc_inst|m0_1|u_logic|Dkx2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qjhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dkx2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dkx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dkx2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y26_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~89 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~94  ))
-// \soc_inst|m0_1|u_logic|Add2~90  = CARRY(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~94  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~94 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~89_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~90 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~89 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~89 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~89 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .lut_mask = 64'h3333331100000000;
+defparam \soc_inst|m0_1|u_logic|Do1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Plx2z4~q 
-// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~89_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Plx2z4~q ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add2~89_sumout ),
+// Location: LABCELL_X17_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glnwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jjhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .lut_mask = 64'h3300330077447744;
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .lut_mask = 64'h0F0F0F0F0F0F0000;
+defparam \soc_inst|m0_1|u_logic|Glnwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjhvx4~1 (
+// Location: LABCELL_X30_Y23_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wn1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~73_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Mx0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Mx0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wn1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Imnwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Imnwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wn1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .lut_mask = 64'h00000000A0F080C0;
-defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y20_N49
-dffeas \soc_inst|m0_1|u_logic|Plx2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Plx2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Plx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Plx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .lut_mask = 64'hFFF0F0F0FF000000;
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ql0wx4 (
+// Location: LABCELL_X29_Y23_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wn1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ql0wx4~combout  = ( \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Add3~65_sumout  & (\soc_inst|m0_1|u_logic|Add5~49_sumout  & (\soc_inst|m0_1|u_logic|K1wvx4~combout ))) # (\soc_inst|m0_1|u_logic|Add3~65_sumout  & (((\soc_inst|m0_1|u_logic|Add5~49_sumout  & \soc_inst|m0_1|u_logic|K1wvx4~combout 
-// )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add3~65_sumout  & (\soc_inst|m0_1|u_logic|Add5~49_sumout  & 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout ))) # (\soc_inst|m0_1|u_logic|Add3~65_sumout  & (((\soc_inst|m0_1|u_logic|Add5~49_sumout  & \soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add3~65_sumout  & (\soc_inst|m0_1|u_logic|Add5~49_sumout  & (\soc_inst|m0_1|u_logic|K1wvx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Add3~65_sumout  & (((\soc_inst|m0_1|u_logic|Add5~49_sumout  & \soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wn1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wn1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~65_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wn1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ql0wx4 .lut_mask = 64'h035703570357FFFF;
-defparam \soc_inst|m0_1|u_logic|Ql0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .lut_mask = 64'h00AF0000AFAF0000;
+defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xvjvx4~0 (
+// Location: LABCELL_X17_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pn1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xvjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( \soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Zjq2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( \soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Zjq2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zjq2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout  & !\soc_inst|m0_1|u_logic|Glnwx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~105_sumout  & (\soc_inst|m0_1|u_logic|Do1wx4~0_combout  & !\soc_inst|m0_1|u_logic|Glnwx4~2_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zjq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .lut_mask = 64'h0F05FFF50C04CCC4;
-defparam \soc_inst|m0_1|u_logic|Xvjvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .lut_mask = 64'h000000000A000F00;
+defparam \soc_inst|m0_1|u_logic|Pn1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y17_N11
-dffeas \soc_inst|m0_1|u_logic|L7p2z4 (
+// Location: FF_X15_Y19_N44
+dffeas \soc_inst|m0_1|u_logic|Arv2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Arv2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Arv2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Arv2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X17_Y17_N49
+dffeas \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rhu2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L7p2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7p2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L7p2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~0 (
+// Location: LABCELL_X16_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu82z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kig3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vgg3z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  
+// & !\soc_inst|m0_1|u_logic|Arv2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Arv2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kig3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vgg3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Arv2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu82z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .lut_mask = 64'h000000000000A0C0;
-defparam \soc_inst|m0_1|u_logic|Xu82z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .lut_mask = 64'h1110010000000000;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~2 (
+// Location: LABCELL_X19_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcs2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu82z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ltg3z4~q  & ( \soc_inst|m0_1|u_logic|Avg3z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ltg3z4~q  & ( !\soc_inst|m0_1|u_logic|Avg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ltg3z4~q  & ( !\soc_inst|m0_1|u_logic|Avg3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Dcs2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Pn1wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ltg3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Avg3z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu82z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcs2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .lut_mask = 64'h00C0008000400000;
-defparam \soc_inst|m0_1|u_logic|Xu82z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Dcs2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y21_N50
-dffeas \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE (
+// Location: FF_X19_Y14_N17
+dffeas \soc_inst|m0_1|u_logic|Dcs2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dcs2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Dcs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X27_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uw82z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Uw82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uw82z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .lut_mask = 64'h0000000000800000;
-defparam \soc_inst|m0_1|u_logic|Uw82z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y21_N20
-dffeas \soc_inst|m0_1|u_logic|Zjg3z4 (
+// Location: FF_X16_Y14_N32
+dffeas \soc_inst|m0_1|u_logic|An83z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zjg3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|An83z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zjg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zjg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|An83z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An83z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y20_N25
-dffeas \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE (
+// Location: FF_X17_Y20_N55
+dffeas \soc_inst|m0_1|u_logic|Gt93z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bh0wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Gt93z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gt93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gt93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~1 (
+// Location: LABCELL_X17_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu82z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zjg3z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) 
-// # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Rd73z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Gt93z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  
+// & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rd73z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Gt93z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rd73z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zjg3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Gt93z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rd73z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu82z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .lut_mask = 64'h0000C00000008080;
-defparam \soc_inst|m0_1|u_logic|Xu82z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .lut_mask = 64'h0050000000040004;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu82z4~3 (
+// Location: LABCELL_X16_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh5wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu82z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xu82z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Eyg3z4~q  & (!\soc_inst|m0_1|u_logic|Xu82z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Xu82z4~2_combout  & !\soc_inst|m0_1|u_logic|Uw82z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xu82z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xu82z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Xu82z4~2_combout  & !\soc_inst|m0_1|u_logic|Uw82z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Zh5wx4~8_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & (\soc_inst|m0_1|u_logic|Dcs2z4~q  & (\soc_inst|m0_1|u_logic|An83z4~q  & 
+// !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & (\soc_inst|m0_1|u_logic|Dcs2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & (\soc_inst|m0_1|u_logic|An83z4~q  & 
+// !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout  & !\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eyg3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xu82z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xu82z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uw82z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xu82z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zh5wx4~7_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dcs2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|An83z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zh5wx4~6_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu82z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .lut_mask = 64'hC000400000000000;
-defparam \soc_inst|m0_1|u_logic|Xu82z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .lut_mask = 64'hAA000A0022000200;
+defparam \soc_inst|m0_1|u_logic|Zh5wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fj0wx4~0 (
+// Location: LABCELL_X17_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3cwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dmvwx4~combout  & ( \soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|L7p2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dmvwx4~combout  & ( \soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|L7p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Dmvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|L7p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q ) 
-// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dmvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xu82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|L7p2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|S3cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & !\soc_inst|m0_1|u_logic|K1z2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Y29wx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & !\soc_inst|m0_1|u_logic|K1z2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|Pm9wx4~0_combout  & !\soc_inst|m0_1|u_logic|K1z2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xu82z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pm9wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S3cwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .lut_mask = 64'hD8DDD8DDD888D8DD;
-defparam \soc_inst|m0_1|u_logic|Fj0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .lut_mask = 64'h50505050FFFF5050;
+defparam \soc_inst|m0_1|u_logic|S3cwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ug0wx4 (
+// Location: LABCELL_X16_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3cwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ug0wx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~61_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~53_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~61_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~53_sumout )) # (\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~61_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~53_sumout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~61_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~53_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|S3cwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|S3cwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zh5wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// !\soc_inst|m0_1|u_logic|S3cwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~61_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zh5wx4~8_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S3cwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zh5wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|S3cwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ug0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ug0wx4 .lut_mask = 64'h000F333F555F777F;
-defparam \soc_inst|m0_1|u_logic|Ug0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .lut_mask = 64'h3300F3007700F700;
+defparam \soc_inst|m0_1|u_logic|S3cwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M0kvx4~0 (
+// Location: LABCELL_X22_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~45 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M0kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( \soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( \soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tzg3z4~q  & ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzg3z4~q  & ( !\soc_inst|m0_1|u_logic|Ug0wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|B9g3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~106  ))
+// \soc_inst|m0_1|u_logic|Add5~46  = CARRY(( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~106  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~106 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M0kvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~46 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .lut_mask = 64'h2233EEFF2030E0F0;
-defparam \soc_inst|m0_1|u_logic|M0kvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~45 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~45 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y16_N34
-dffeas \soc_inst|m0_1|u_logic|Tzg3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M0kvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tzg3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~13 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~46  ))
+// \soc_inst|m0_1|u_logic|Add5~14  = CARRY(( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~46  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~46 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~14 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tzg3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tzg3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~13 .lut_mask = 64'h0000FF3300005FA0;
+defparam \soc_inst|m0_1|u_logic|Add5~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ebh3z4~feeder (
+// Location: LABCELL_X23_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ebh3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mc0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|haddr_o~5_combout  = ( \soc_inst|m0_1|u_logic|Add3~105_sumout  & ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Ra1wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~105_sumout  & ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~105_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~105_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~105_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ebh3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebh3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ebh3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ebh3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~5 .lut_mask = 64'h005533770F5F3F7F;
+defparam \soc_inst|m0_1|u_logic|haddr_o~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y25_N38
-dffeas \soc_inst|m0_1|u_logic|Ebh3z4 (
+// Location: FF_X23_Y18_N13
+dffeas \soc_inst|ram_1|saved_word_address[11] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ebh3z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ebh3z4~q ),
+	.q(\soc_inst|ram_1|saved_word_address [11]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ebh3z4 .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[11] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[11] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iq82z4~0 (
+// Location: MLABCELL_X25_Y18_N54
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[11]~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iq82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ebh3z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[11]~11_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q ) # (\soc_inst|ram_1|saved_word_address [11]) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( \soc_inst|ram_1|always1~0_combout  & ( (\soc_inst|ram_1|saved_word_address [11] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( 
+// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [11] ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [11] ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ebh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|ram_1|saved_word_address [11]),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iq82z4~0_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[11]~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .lut_mask = 64'h0020000000000000;
-defparam \soc_inst|m0_1|u_logic|Iq82z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y24_N56
-dffeas \soc_inst|m0_1|u_logic|Rz13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rz13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rz13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rz13z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X33_Y23_N41
-dffeas \soc_inst|m0_1|u_logic|A933z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|A933z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A933z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|A933z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .lut_mask = 64'h555555550505F5F5;
+defparam \soc_inst|ram_1|memory.raddr_a[11]~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~1 (
+// Location: LABCELL_X31_Y16_N18
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[28]~14 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lo82z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rz13z4~q  & ( \soc_inst|m0_1|u_logic|A933z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rz13z4~q  & ( !\soc_inst|m0_1|u_logic|A933z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rz13z4~q  & ( !\soc_inst|m0_1|u_logic|A933z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|ram_1|data_to_memory[28]~14_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28  & ( (\soc_inst|ram_1|write_cycle~q  & ((!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ))) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28  & ( (\soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|ram_1|write_cycle~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rz13z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|A933z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
+	.datac(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|write_cycle~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lo82z4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[28]~14_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .lut_mask = 64'h4040004040000000;
-defparam \soc_inst|m0_1|u_logic|Lo82z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y24_N31
-dffeas \soc_inst|m0_1|u_logic|Tch3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tch3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tch3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tch3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X28_Y24_N11
-dffeas \soc_inst|m0_1|u_logic|Sr53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sr53z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sr53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sr53z4 .power_up = "low";
+defparam \soc_inst|ram_1|data_to_memory[28]~14 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[28]~14 .lut_mask = 64'h0003000300F300F3;
+defparam \soc_inst|ram_1|data_to_memory[28]~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y24_N37
-dffeas \soc_inst|m0_1|u_logic|Ji43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+// Location: M10K_X38_Y17_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[28]~14_combout ,\soc_inst|ram_1|data_to_memory[12]~13_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ji43z4~q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ji43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ji43z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_first_bit_number = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_first_bit_number = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000809F5F9DB74EB7D374DDFBFDFBFDFBF4AAAB04814E1D3094C85FBF7FBF7FBF7FF09A727C00000000000000E4EB000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~0 (
+// Location: LABCELL_X37_Y17_N6
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[12]~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lo82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sr53z4~q  & ( \soc_inst|m0_1|u_logic|Ji43z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sr53z4~q  & ( !\soc_inst|m0_1|u_logic|Ji43z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sr53z4~q  & ( !\soc_inst|m0_1|u_logic|Ji43z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|ram_1|data_to_memory[12]~13_combout  = ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( (!\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout )) # (\soc_inst|ram_1|byte_select [1] & 
+// ((!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sr53z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ji43z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|byte_select [1]),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[12]~19_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lo82z4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[12]~13_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .lut_mask = 64'h0030002000100000;
-defparam \soc_inst|m0_1|u_logic|Lo82z4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[12]~13 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[12]~13 .lut_mask = 64'h000000003F0C3F0C;
+defparam \soc_inst|ram_1|data_to_memory[12]~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y22_N32
-dffeas \soc_inst|m0_1|u_logic|P9h3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|P9h3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P9h3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|P9h3z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X30_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsmwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # ((\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[26]~0_combout )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # 
+// ((\soc_inst|interconnect_1|HRDATA[26]~0_combout ) # (\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) ) )
 
-// Location: FF_X27_Y22_N8
-dffeas \soc_inst|m0_1|u_logic|A8h3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|A8h3z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lsmwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A8h3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|A8h3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .lut_mask = 64'hBF00BF00BA00BA00;
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~2 (
+// Location: LABCELL_X29_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lo82z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|A8h3z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|P9h3z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|X7ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( \soc_inst|m0_1|u_logic|Beowx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Jiowx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Beowx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( \soc_inst|m0_1|u_logic|Jiowx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|P9h3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|A8h3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lo82z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .lut_mask = 64'h008800A000000000;
-defparam \soc_inst|m0_1|u_logic|Lo82z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .lut_mask = 64'h00FF2E2E22EE0F0F;
+defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lo82z4~3 (
+// Location: LABCELL_X29_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lo82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Lo82z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lo82z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Iq82z4~0_combout  & (!\soc_inst|m0_1|u_logic|Lo82z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tch3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Lsmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wbk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Wbk2z4~q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Iq82z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lo82z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tch3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lo82z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lo82z4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lsmwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lo82z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .lut_mask = 64'h8088000000000000;
-defparam \soc_inst|m0_1|u_logic|Lo82z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .lut_mask = 64'h3030302033333322;
+defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lf0wx4~0 (
+// Location: MLABCELL_X28_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Llq2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( \soc_inst|m0_1|u_logic|D9uwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Tzg3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Llq2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lo82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|D9uwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Tzg3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Llq2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wzpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tzg3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lo82z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wzpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .lut_mask = 64'hFD0DFD0DFD0DF808;
-defparam \soc_inst|m0_1|u_logic|Lf0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .lut_mask = 64'h0F00CFCC0F00CFCC;
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6awx4~0 (
+// Location: LABCELL_X31_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6awx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|K1z2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wzpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6awx4~0 .lut_mask = 64'hAFAFAFAF00000000;
-defparam \soc_inst|m0_1|u_logic|U6awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .lut_mask = 64'h0CCC00000FFF0000;
+defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~3 (
+// Location: LABCELL_X23_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Sr53z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|A933z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Rhnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rhnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|X4pvx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rhnvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Izpvx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & ((\soc_inst|m0_1|u_logic|X4pvx4~combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rhnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # (!\soc_inst|m0_1|u_logic|X4pvx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rhnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # (!\soc_inst|m0_1|u_logic|X4pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|K0qvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A933z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sr53z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rhnvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .lut_mask = 64'h0202030000000000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .lut_mask = 64'hFD00FD008D00FD00;
+defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y24_N35
-dffeas \soc_inst|m0_1|u_logic|Eqq2z4 (
+// Location: FF_X23_Y13_N55
+dffeas \soc_inst|m0_1|u_logic|Idk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eqq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Idk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eqq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eqq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Idk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Idk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~0 (
+// Location: LABCELL_X27_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qh72z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Eqq2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rz13z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Qh72z4~0_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rek2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rz13z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eqq2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rek2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qh72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .lut_mask = 64'h00008080C0000000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .lut_mask = 64'h0000080000000000;
+defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D03xx4~0 (
+// Location: MLABCELL_X25_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D03xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Tch3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Tf72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|I453z4~q  & ( \soc_inst|m0_1|u_logic|Zu33z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I453z4~q  & ( !\soc_inst|m0_1|u_logic|Zu33z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I453z4~q  & ( !\soc_inst|m0_1|u_logic|Zu33z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tch3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|I453z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zu33z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D03xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tf72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D03xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D03xx4~0 .lut_mask = 64'h0000800000000000;
-defparam \soc_inst|m0_1|u_logic|D03xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y24_N38
-dffeas \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .lut_mask = 64'h0202020000020000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y24_N17
-dffeas \soc_inst|m0_1|u_logic|Anq2z4 (
+// Location: FF_X27_Y17_N52
+dffeas \soc_inst|m0_1|u_logic|Ql23z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Anq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ql23z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Anq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Anq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ql23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ql23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y24_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~2 (
+// Location: LABCELL_X27_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Anq2z4~q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Tf72z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hc13z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ql23z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hc13z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ql23z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hc13z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Anq2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ql23z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hc13z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tf72z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .lut_mask = 64'h0000080800000C00;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .lut_mask = 64'h5000400000004000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~4 (
+// Location: MLABCELL_X25_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~4_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|A8h3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|P9h3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Tf72z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Nf03z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tiz2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Nf03z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Tiz2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|P9h3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|A8h3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tiz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nf03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tf72z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .lut_mask = 64'h008800A000000000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y20_N5
-dffeas \soc_inst|m0_1|u_logic|Poq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Poq2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Poq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Poq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .lut_mask = 64'h2220000000200000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~1 (
+// Location: LABCELL_X24_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Llq2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Poq2z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Poq2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Tf72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Tf72z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Tf72z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qh72z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tf72z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Aez2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Poq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qh72z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Aez2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tf72z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tf72z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tf72z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tf72z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .lut_mask = 64'h8840000000400000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~5 (
+// Location: LABCELL_X23_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Esnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Ce0wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Ce0wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|D03xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Esnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Hak2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & \soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Hak2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & \soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Hak2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Hak2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & \soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ce0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D03xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ce0wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tf72z4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .lut_mask = 64'h505C535F505C505C;
+defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y25_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ka83z4~feeder (
+// Location: LABCELL_X22_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whh2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ka83z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mc0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Whh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Izpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Izpvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ka83z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ka83z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ka83z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ka83z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .lut_mask = 64'hFFAAFFAAF5F5F5F5;
+defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y25_N53
-dffeas \soc_inst|m0_1|u_logic|Ka83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ka83z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ka83z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ka83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ka83z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X23_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnawx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mnawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|Fuawx4~1_combout ) ) ) )
 
-// Location: FF_X33_Y25_N37
-dffeas \soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ebh3z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mnawx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .lut_mask = 64'hF000AAAAB800EEEE;
+defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y24_N16
-dffeas \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X23_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C3qvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C3qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mnawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Izpvx4~combout  & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Idk2z4~q )))) # (\soc_inst|m0_1|u_logic|Izpvx4~combout  & (((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Idk2z4~q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mnawx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .lut_mask = 64'h00000000DDD0DDD0;
+defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y25_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B5u2z4~feeder (
+// Location: LABCELL_X23_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sscvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B5u2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Mc0wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Sscvx4~combout  = ( \soc_inst|m0_1|u_logic|Esnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B5u2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sscvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B5u2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B5u2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|B5u2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sscvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sscvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Sscvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y25_N41
-dffeas \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B5u2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~85 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add5~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Sscvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|W19wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~90  ))
+// \soc_inst|m0_1|u_logic|Add5~86  = CARRY(( !\soc_inst|m0_1|u_logic|Sscvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|W19wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~90  ))
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sscvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~90 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~86 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~85 .lut_mask = 64'h0000009B0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add5~85 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y25_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~7 (
+// Location: LABCELL_X29_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C3qvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|C3qvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|C3qvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & \soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|C3qvx4~0_combout  & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .lut_mask = 64'h000000000000CA00;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .lut_mask = 64'h0000202000000020;
+defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y25_N11
-dffeas \soc_inst|m0_1|u_logic|B173z4 (
+// Location: FF_X21_Y22_N50
+dffeas \soc_inst|m0_1|u_logic|An73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B173z4~q ),
+	.q(\soc_inst|m0_1|u_logic|An73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B173z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B173z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|An73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|An73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X33_Y20_N32
-dffeas \soc_inst|m0_1|u_logic|Bf93z4 (
+// Location: MLABCELL_X21_Y22_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|F8wwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rht2z4~q  & ( \soc_inst|m0_1|u_logic|Rd63z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Vhk2z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sjj2z4~q )) # (\soc_inst|m0_1|u_logic|An73z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rht2z4~q  & ( \soc_inst|m0_1|u_logic|Rd63z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Vhk2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sjj2z4~q )) # (\soc_inst|m0_1|u_logic|An73z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rht2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Rd63z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Vhk2z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|An73z4~q  & 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rht2z4~q  & ( !\soc_inst|m0_1|u_logic|Rd63z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Vhk2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|An73z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|An73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vhk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rht2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rd63z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|F8wwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .lut_mask = 64'h01C10DCD31F13DFD;
+defparam \soc_inst|m0_1|u_logic|F8wwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y21_N56
+dffeas \soc_inst|m0_1|u_logic|Zkk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -60637,3505 +60551,3162 @@ dffeas \soc_inst|m0_1|u_logic|Bf93z4 (
 	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bf93z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zkk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bf93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bf93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zkk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zkk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~6 (
+// Location: LABCELL_X19_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Bf93z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Bf93z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|B173z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bf93z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|B173z4~q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|F8wwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kjk2z4~q  & ( \soc_inst|m0_1|u_logic|Aru2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ggk2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zkk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kjk2z4~q  & ( \soc_inst|m0_1|u_logic|Aru2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ggk2z4~q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zkk2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kjk2z4~q  & ( !\soc_inst|m0_1|u_logic|Aru2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Ggk2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zkk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kjk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Aru2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Ggk2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zkk2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|B173z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bf93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zkk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ggk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kjk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aru2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F8wwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .lut_mask = 64'h0400040000050000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .lut_mask = 64'h30053F0530F53FF5;
+defparam \soc_inst|m0_1|u_logic|F8wwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~8 (
+// Location: LABCELL_X22_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F8wwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Ce0wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Ka83z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ka83z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|F8wwx4~combout  = ( !\soc_inst|m0_1|u_logic|F8wwx4~1_combout  & ( \soc_inst|m0_1|u_logic|F8wwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|F8wwx4~1_combout  
+// & ( !\soc_inst|m0_1|u_logic|F8wwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8wwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  
+// ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ka83z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|F8wwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F8wwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .lut_mask = 64'hF531000000000000;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F8wwx4 .lut_mask = 64'h00FF005500AA0000;
+defparam \soc_inst|m0_1|u_logic|F8wwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6awx4~1 (
+// Location: MLABCELL_X28_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yvtwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( 
-// \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ce0wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|U6awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Kcdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Yvtwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & !\soc_inst|m0_1|u_logic|F8wwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (!\soc_inst|m0_1|u_logic|F8wwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U6awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6awx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6awx4~1 .lut_mask = 64'h050D050D050D0F0F;
-defparam \soc_inst|m0_1|u_logic|U6awx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .lut_mask = 64'hFFF0FFF00F000F00;
+defparam \soc_inst|m0_1|u_logic|Yvtwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~25 (
+// Location: MLABCELL_X28_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xs7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~25_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~54  ))
-// \soc_inst|m0_1|u_logic|Add5~26  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~54  ))
+// \soc_inst|m0_1|u_logic|Xs7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Yvtwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yvtwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~54 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~25_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~26 ),
+	.combout(\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~25 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~25 .lut_mask = 64'h00008877000000F0;
-defparam \soc_inst|m0_1|u_logic|Add5~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc0wx4 (
+// Location: LABCELL_X29_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fc0wx4~combout  = ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Add3~57_sumout  & ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Add3~57_sumout  & ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Add3~57_sumout  & ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Uvdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Mrdwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add3~57_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Mrdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fc0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fc0wx4 .lut_mask = 64'hFCA8FCA8FCA80000;
-defparam \soc_inst|m0_1|u_logic|Fc0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .lut_mask = 64'h00550055AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Uvdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B5kvx4~0 (
+// Location: MLABCELL_X28_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xs7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B5kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Llq2z4~q  & ( \soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q )) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( \soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Llq2z4~q  & ( !\soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Foe3z4~q 
-// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Llq2z4~q  & ( !\soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Foe3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Xs7wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xs7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .lut_mask = 64'h008AAA8A00CFFFCF;
-defparam \soc_inst|m0_1|u_logic|B5kvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y16_N32
-dffeas \soc_inst|m0_1|u_logic|Llq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B5kvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Llq2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Llq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Llq2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X34_Y16_N22
-dffeas \soc_inst|m0_1|u_logic|Zfh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zfh3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zfh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zfh3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X33_Y23_N35
-dffeas \soc_inst|m0_1|u_logic|L733z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L733z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L733z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L733z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Xs7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~1 (
+// Location: LABCELL_X29_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh82z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Cy13z4~q  & ( \soc_inst|m0_1|u_logic|L733z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cy13z4~q  & ( !\soc_inst|m0_1|u_logic|L733z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cy13z4~q  & ( !\soc_inst|m0_1|u_logic|L733z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rw7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rw7wx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Kw7wx4~1_combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cy13z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L733z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kw7wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh82z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .lut_mask = 64'h4400040040000000;
-defparam \soc_inst|m0_1|u_logic|Zh82z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Cuxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~2 (
+// Location: LABCELL_X29_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hr7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh82z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Vzz2z4~q  & ( \soc_inst|m0_1|u_logic|Pw03z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vzz2z4~q  & ( !\soc_inst|m0_1|u_logic|Pw03z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vzz2z4~q  & ( !\soc_inst|m0_1|u_logic|Pw03z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # 
+// ((\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vzz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pw03z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh82z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .lut_mask = 64'h5000400010000000;
-defparam \soc_inst|m0_1|u_logic|Zh82z4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y25_N35
-dffeas \soc_inst|m0_1|u_logic|C5n2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C5n2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C5n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .lut_mask = 64'h00040C08FFFEFCFD;
+defparam \soc_inst|m0_1|u_logic|Hr7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y25_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wj82z4~0 (
+// Location: MLABCELL_X28_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wj82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|C5n2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fc7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout  & \soc_inst|m0_1|u_logic|U2ewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout  & \soc_inst|m0_1|u_logic|U2ewx4~0_combout )) # (\soc_inst|m0_1|u_logic|S8ewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C5n2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wj82z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fc7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .lut_mask = 64'h0000000020000000;
-defparam \soc_inst|m0_1|u_logic|Wj82z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y23_N2
-dffeas \soc_inst|m0_1|u_logic|R6n2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R6n2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6n2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R6n2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .lut_mask = 64'h55F555F500F000F0;
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N23
-dffeas \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X30_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtdwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jtdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Jtdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Jtdwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  ) ) )
 
-// Location: FF_X28_Y24_N41
-dffeas \soc_inst|m0_1|u_logic|Ug43z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ug43z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ug43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ug43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .lut_mask = 64'h0F0F0F0F0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~0 (
+// Location: LABCELL_X30_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tq7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ug43z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ug43z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ug43z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X0ewx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Qtdwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qtdwx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ug43z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh82z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .lut_mask = 64'h0300020001000000;
-defparam \soc_inst|m0_1|u_logic|Zh82z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .lut_mask = 64'h00FF000000FFFFFF;
+defparam \soc_inst|m0_1|u_logic|Tq7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zh82z4~3 (
+// Location: LABCELL_X29_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fq7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zh82z4~3_combout  = ( \soc_inst|m0_1|u_logic|R6n2z4~q  & ( !\soc_inst|m0_1|u_logic|Zh82z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh82z4~1_combout  & (!\soc_inst|m0_1|u_logic|Zh82z4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Wj82z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|R6n2z4~q  & ( !\soc_inst|m0_1|u_logic|Zh82z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zh82z4~1_combout  & (!\soc_inst|m0_1|u_logic|Zh82z4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wj82z4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nodwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nodwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Vzdwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zh82z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zh82z4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wj82z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R6n2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zh82z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zh82z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .lut_mask = 64'h8000880000000000;
-defparam \soc_inst|m0_1|u_logic|Zh82z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Fq7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N90wx4~0 (
+// Location: MLABCELL_X28_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Po7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N90wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Llq2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Zfh3z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Llq2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Llq2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) 
-// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zh82z4~3_combout  & ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Llq2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Zfh3z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Po7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Llq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zh82z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Po7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N90wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N90wx4~0 .lut_mask = 64'hACAFACAFACAFACA0;
-defparam \soc_inst|m0_1|u_logic|N90wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .lut_mask = 64'h2808280820002000;
+defparam \soc_inst|m0_1|u_logic|Po7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~1 (
+// Location: MLABCELL_X28_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fc7wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~1_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~26  ))
-// \soc_inst|m0_1|u_logic|Add5~2  = CARRY(( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & \soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) + ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~26  ))
+// \soc_inst|m0_1|u_logic|Fc7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Po7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fc7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Po7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fc7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fc7wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Po7wx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~26 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~1_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~2 ),
+	.combout(\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~1 .lut_mask = 64'h00008877000000F0;
-defparam \soc_inst|m0_1|u_logic|Add5~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .lut_mask = 64'hF300F30051005100;
+defparam \soc_inst|m0_1|u_logic|Fc7wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdhvx4~0 (
+// Location: MLABCELL_X28_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zdhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~117_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Kaf3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Et7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cuxwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~117_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zdhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .lut_mask = 64'hC8FBC8FB00000000;
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .lut_mask = 64'h220522AF770577AF;
+defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdhvx4~1 (
+// Location: LABCELL_X22_Y21_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zdhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( \soc_inst|m0_1|u_logic|Zdhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Oa3wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( \soc_inst|m0_1|u_logic|Zdhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Oa3wx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Xowwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Grl2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Psu2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Spl2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|Qml2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oa3wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zdhvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Grl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Psu2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Spl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qml2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xowwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .lut_mask = 64'h00000000F0FFC0CC;
-defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .lut_mask = 64'hFF00F0F0CCCCAAAA;
+defparam \soc_inst|m0_1|u_logic|Xowwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y25_N56
-dffeas \soc_inst|m0_1|u_logic|Kaf3z4 (
+// Location: FF_X21_Y22_N14
+dffeas \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kaf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kaf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y92wx4 (
+// Location: MLABCELL_X21_Y22_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y92wx4~combout  = ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Add3~113_sumout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~113_sumout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Add3~113_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~113_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( 
-// !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Add3~113_sumout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~113_sumout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xowwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Eol2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Gjt2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Po73z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Eol2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Eol2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Gjt2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Po73z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Eol2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (!\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~113_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Po73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gjt2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eol2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y92wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xowwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y92wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y92wx4 .lut_mask = 64'hFCA8FCA8FCA80000;
-defparam \soc_inst|m0_1|u_logic|Y92wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .lut_mask = 64'hFCFCEE223030EE22;
+defparam \soc_inst|m0_1|u_logic|Xowwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8ivx4~0 (
+// Location: MLABCELL_X21_Y22_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xowwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K8ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|B6j2z4~q  & ( \soc_inst|m0_1|u_logic|Y92wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  & ( \soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|B6j2z4~q  & ( !\soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kaf3z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  & ( !\soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kaf3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xowwx4~combout  = ( \soc_inst|m0_1|u_logic|Xowwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Xowwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xowwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xowwx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y92wx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xowwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xowwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xowwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .lut_mask = 64'h0C04CCC40F05FFF5;
-defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y16_N10
-dffeas \soc_inst|m0_1|u_logic|B6j2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B6j2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B6j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B6j2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xowwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xowwx4 .lut_mask = 64'h0000000F0F000F0F;
+defparam \soc_inst|m0_1|u_logic|Xowwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N56
-dffeas \soc_inst|m0_1|u_logic|Joi3z4 (
+// Location: FF_X22_Y22_N23
+dffeas \soc_inst|m0_1|u_logic|Ksm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Joi3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ksm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Joi3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Joi3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ksm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ksm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N25
-dffeas \soc_inst|m0_1|u_logic|Sz23z4 (
+// Location: FF_X22_Y22_N11
+dffeas \soc_inst|m0_1|u_logic|Ixt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sz23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ixt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sz23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sz23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ixt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N53
-dffeas \soc_inst|m0_1|u_logic|Jq13z4 (
+// Location: FF_X22_Y22_N44
+dffeas \soc_inst|m0_1|u_logic|It63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jq13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|It63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jq13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jq13z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P582z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Sz23z4~q  & ( \soc_inst|m0_1|u_logic|Jq13z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sz23z4~q  & ( !\soc_inst|m0_1|u_logic|Jq13z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sz23z4~q  & ( !\soc_inst|m0_1|u_logic|Jq13z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sz23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jq13z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P582z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P582z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P582z4~1 .lut_mask = 64'h3000200010000000;
-defparam \soc_inst|m0_1|u_logic|P582z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|It63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|It63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N25
-dffeas \soc_inst|m0_1|u_logic|Umi3z4 (
+// Location: FF_X19_Y23_N52
+dffeas \soc_inst|m0_1|u_logic|R283z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Umi3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|R283z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Umi3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Umi3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R283z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R283z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M782z4~0 (
+// Location: LABCELL_X22_Y22_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M782z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Umi3z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qowwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R283z4~q  & ( (!\soc_inst|m0_1|u_logic|It63z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|R283z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ksm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ixt2z4~q ))) 
+// ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R283z4~q  & ( (!\soc_inst|m0_1|u_logic|It63z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|R283z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ksm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ixt2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Umi3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ksm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ixt2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|It63z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R283z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M782z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qowwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M782z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M782z4~0 .lut_mask = 64'h0400000000000000;
-defparam \soc_inst|m0_1|u_logic|M782z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .lut_mask = 64'hAACCF0FFAACCF000;
+defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y23_N5
-dffeas \soc_inst|m0_1|u_logic|Ki53z4 (
+// Location: FF_X22_Y21_N53
+dffeas \soc_inst|m0_1|u_logic|Wqm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ki53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wqm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ki53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ki53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wqm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wqm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y23_N35
-dffeas \soc_inst|m0_1|u_logic|B943z4 (
+// Location: FF_X23_Y22_N34
+dffeas \soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B943z4~q ),
+	.q(\soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B943z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B943z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P582z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ki53z4~q  & ( \soc_inst|m0_1|u_logic|B943z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-//  & \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ki53z4~q  & ( !\soc_inst|m0_1|u_logic|B943z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ki53z4~q  & ( !\soc_inst|m0_1|u_logic|B943z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ki53z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|B943z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P582z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P582z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P582z4~0 .lut_mask = 64'h1010100000100000;
-defparam \soc_inst|m0_1|u_logic|P582z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N32
-dffeas \soc_inst|m0_1|u_logic|Qji3z4 (
+// Location: FF_X22_Y21_N29
+dffeas \soc_inst|m0_1|u_logic|G493z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qji3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|G493z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qji3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qji3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G493z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G493z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y23_N16
-dffeas \soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE (
+// Location: FF_X25_Y19_N29
+dffeas \soc_inst|m0_1|u_logic|Ipm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ipm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P582z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qji3z4~q  & ( \soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q 
-//  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qji3z4~q  & ( !\soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qji3z4~q  & ( !\soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qji3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P582z4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P582z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P582z4~2 .lut_mask = 64'h0C00080004000000;
-defparam \soc_inst|m0_1|u_logic|P582z4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P582z4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P582z4~3_combout  = ( !\soc_inst|m0_1|u_logic|P582z4~0_combout  & ( !\soc_inst|m0_1|u_logic|P582z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|P582z4~1_combout  & (!\soc_inst|m0_1|u_logic|M782z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Joi3z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Joi3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P582z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M782z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|P582z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P582z4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P582z4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P582z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P582z4~3 .lut_mask = 64'hD000000000000000;
-defparam \soc_inst|m0_1|u_logic|P582z4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gtnvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Gtnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( \soc_inst|m0_1|u_logic|P582z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|B6j2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) # (\soc_inst|m0_1|u_logic|Q7j2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( \soc_inst|m0_1|u_logic|P582z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|B6j2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Q7j2z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( !\soc_inst|m0_1|u_logic|P582z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|B6j2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Q7j2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( !\soc_inst|m0_1|u_logic|P582z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|B6j2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Q7j2z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P582z4~3_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .lut_mask = 64'h553055305530553F;
-defparam \soc_inst|m0_1|u_logic|Gtnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ipm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ipm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9cwx4~0 (
+// Location: LABCELL_X22_Y21_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q9cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & !\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Rih2z4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rih2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rih2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) # (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Rih2z4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qowwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G493z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wqm2z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) 
+// ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|G493z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wqm2z4~q ) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wqm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G493z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ipm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q9cwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qowwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .lut_mask = 64'hBF83BB8833033300;
-defparam \soc_inst|m0_1|u_logic|Q9cwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .lut_mask = 64'hAFAFCFC0A0A0CFC0;
+defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yqzvx4~0 (
+// Location: LABCELL_X19_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q9cwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q9cwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eacwx4~9_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qowwx4~combout  = ( \soc_inst|m0_1|u_logic|Qowwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qowwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qowwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Qowwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qowwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qowwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Q9cwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qowwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qowwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qowwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .lut_mask = 64'h0000F03000005010;
-defparam \soc_inst|m0_1|u_logic|Yqzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qowwx4 .lut_mask = 64'h000000F0000F00FF;
+defparam \soc_inst|m0_1|u_logic|Qowwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4~0 (
+// Location: MLABCELL_X21_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ok7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qowwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xowwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xowwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qowwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .lut_mask = 64'h33110301FF550F05;
-defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4~1 (
+// Location: LABCELL_X27_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jl7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Jl7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mj7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Mj7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .lut_mask = 64'h00000000FFFF3330;
-defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .lut_mask = 64'hAAAAAAAA08000800;
+defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rqzvx4~0 (
+// Location: MLABCELL_X28_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1ewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Yqzvx4~0_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Yqzvx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|E1ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Eudwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|E1ewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Eudwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|E1ewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .lut_mask = 64'h000000000707070F;
-defparam \soc_inst|m0_1|u_logic|Rqzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .lut_mask = 64'h00550055AAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|E1ewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5v2z4~feeder (
+// Location: MLABCELL_X25_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U18wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C5v2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Rqzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|U18wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xtdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|E1ewx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Xtdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|E1ewx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Xtdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|E1ewx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C5v2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5v2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C5v2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|C5v2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y22_N59
-dffeas \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|C5v2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U18wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U18wx4~0 .lut_mask = 64'h0000F0F00F0FFFFF;
+defparam \soc_inst|m0_1|u_logic|U18wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~0 (
+// Location: LABCELL_X27_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nu7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tvt2z4~q  & ( (!\soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|R91xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tvt2z4~q  & ( 
-// ((!\soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|R91xx4~0_combout )) # (\soc_inst|m0_1|u_logic|T31xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nu7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( \soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|S08wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( \soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q7ewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|S08wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )) # (\soc_inst|m0_1|u_logic|S08wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|S08wx4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tvt2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .lut_mask = 64'h0CFF0CFF0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .lut_mask = 64'h3500350F35F035FF;
+defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~3 (
+// Location: LABCELL_X27_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sz23z4~q  & ( (!\soc_inst|m0_1|u_logic|Ki53z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sz23z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ki53z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Et7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ark2z4~q  
+// & (((!\soc_inst|m0_1|u_logic|Nu7wx4~0_combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ki53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sz23z4~q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .lut_mask = 64'h00000E0000000200;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y23_N17
-dffeas \soc_inst|m0_1|u_logic|Fli3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fli3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fli3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fli3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .lut_mask = 64'h8A8AAAA08080AAA0;
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~5 (
+// Location: LABCELL_X27_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fli3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qji3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Dtpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Et7wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Et7wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qji3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fli3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dtpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .lut_mask = 64'h0000C84000000000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .lut_mask = 64'h00000000FFFFFA88;
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~2 (
+// Location: LABCELL_X22_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~77 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|B943z4~q  & ( \soc_inst|m0_1|u_logic|Zpj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B943z4~q  & ( !\soc_inst|m0_1|u_logic|Zpj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B943z4~q  & ( !\soc_inst|m0_1|u_logic|Zpj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~77_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Zwcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~10  ))
+// \soc_inst|m0_1|u_logic|Add5~78  = CARRY(( (!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ))) ) + ( \soc_inst|m0_1|u_logic|Zwcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~10  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|B943z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zpj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Phh2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~78 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .lut_mask = 64'h000A000200080000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~77 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~77 .lut_mask = 64'h0000FF000000FF64;
+defparam \soc_inst|m0_1|u_logic|Add5~77 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~4 (
+// Location: LABCELL_X22_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~129 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( \soc_inst|m0_1|u_logic|Q7j2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vmj2z4~q  & ( !\soc_inst|m0_1|u_logic|Q7j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  $ 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~129_sumout  = SUM(( GND ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add5~78  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vmj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~78 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~4_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~129_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .lut_mask = 64'h8400800004000000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y20_N59
-dffeas \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~129 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~129 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Add5~129 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~1 (
+// Location: LABCELL_X24_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jq13z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Dtpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~129_sumout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~129_sumout  & ( ((!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Wai2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jq13z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~129_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .lut_mask = 64'h0C00A00000000000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .lut_mask = 64'hFB33FB33C800C800;
+defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~6 (
+// Location: LABCELL_X23_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zei2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Eacwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Eacwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Eacwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Eacwx4~5_combout  & 
-// !\soc_inst|m0_1|u_logic|Eacwx4~2_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Zei2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & !\soc_inst|m0_1|u_logic|Rtpvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Rtpvx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & ((\soc_inst|m0_1|u_logic|X4pvx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eacwx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Eacwx4~5_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Eacwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Eacwx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zei2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .lut_mask = 64'h8800000000000000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~6 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y23_N41
-dffeas \soc_inst|m0_1|u_logic|C183z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rqzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C183z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C183z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C183z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .lut_mask = 64'hA0F5A0F5A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~7 (
+// Location: LABCELL_X23_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zei2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Tr63z4~q  & ( \soc_inst|m0_1|u_logic|R293z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tr63z4~q  & ( !\soc_inst|m0_1|u_logic|R293z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tr63z4~q  & ( !\soc_inst|m0_1|u_logic|R293z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  $ 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zei2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Zei2z4~q  & ( \soc_inst|m0_1|u_logic|Zei2z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q  & ( \soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Lqpvx4~0_combout  
+// ) ) ) # ( \soc_inst|m0_1|u_logic|Zei2z4~q  & ( !\soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q  & ( !\soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|Lqpvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tr63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R293z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zei2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .lut_mask = 64'h0021000100200000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .lut_mask = 64'h008AFF8A00FFFFFF;
+defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~8 (
+// Location: FF_X23_Y13_N25
+dffeas \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mdzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Eacwx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Joi3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (\soc_inst|m0_1|u_logic|Umi3z4~q  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Joi3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Mdzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Rmawx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Umi3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Joi3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mdzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .lut_mask = 64'hBB0BBB0B00000000;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .lut_mask = 64'hC800C800C8C8C8C8;
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eacwx4~9 (
+// Location: MLABCELL_X25_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eacwx4~9_combout  = ( \soc_inst|m0_1|u_logic|Eacwx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Eacwx4~0_combout  & (\soc_inst|m0_1|u_logic|Eacwx4~6_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|C183z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ehcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & !\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kih2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eacwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Eacwx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C183z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ehcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .lut_mask = 64'h00000000080A080A;
-defparam \soc_inst|m0_1|u_logic|Eacwx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .lut_mask = 64'hCFC0EF4A0F000F0A;
+defparam \soc_inst|m0_1|u_logic|Ehcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rih2z4~0 (
+// Location: LABCELL_X22_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ducvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Eacwx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Eacwx4~9_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Ducvx4~combout  = ( \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Xrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rih2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ducvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .lut_mask = 64'hFFAAFFAAF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Rih2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ducvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ducvx4 .lut_mask = 64'h00FF00FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ducvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duhvx4~0 (
+// Location: LABCELL_X22_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~117 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Add2~113_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xyk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Xyk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Add5~117_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ducvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~86  ))
+// \soc_inst|m0_1|u_logic|Add5~118  = CARRY(( (!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ducvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~86  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~113_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ducvx4~combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~86 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duhvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~118 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .lut_mask = 64'h550055005F0A5F0A;
-defparam \soc_inst|m0_1|u_logic|Duhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~117 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~117 .lut_mask = 64'h000000FF0000FF64;
+defparam \soc_inst|m0_1|u_logic|Add5~117 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4 (
+// Location: MLABCELL_X21_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mdzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3pvx4~combout  = ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ehcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (\soc_inst|m0_1|u_logic|Mdzvx4~0_combout  & \soc_inst|m0_1|u_logic|Lhyvx4~2_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ehcwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( \soc_inst|m0_1|u_logic|Mdzvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Mdzvx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ehcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3pvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3pvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3pvx4 .lut_mask = 64'h000055FF000077FF;
-defparam \soc_inst|m0_1|u_logic|O3pvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .lut_mask = 64'h0000333300000033;
+defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duhvx4~1 (
+// Location: MLABCELL_X25_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fdzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Duhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|O3pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~121_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O3pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Duhvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add5~121_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Fdzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bspvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duhvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O3pvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Duhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .lut_mask = 64'hC800FA0000000000;
-defparam \soc_inst|m0_1|u_logic|Duhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .lut_mask = 64'h000000000000777F;
+defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y16_N7
-dffeas \soc_inst|m0_1|u_logic|Xyk2z4 (
+// Location: FF_X25_Y19_N8
+dffeas \soc_inst|m0_1|u_logic|T243z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Duhvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|T243z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xyk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xyk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T243z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T243z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y16_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vjnvx4~0 (
+// Location: MLABCELL_X25_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vjnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xyk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Q7j2z4~q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xyk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|Q7j2z4~q )) # (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((\soc_inst|m0_1|u_logic|Orewx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~2_combout  = (!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & (\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fio2z4~q )))) # (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T243z4~q ) 
+// # ((\soc_inst|m0_1|u_logic|V41xx4~0_combout  & !\soc_inst|m0_1|u_logic|Fio2z4~q ))))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T243z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fio2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xyk2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vjnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .lut_mask = 64'h8B8B8B8B88888888;
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .lut_mask = 64'h7350735073507350;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1pvx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Y1pvx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add3~109_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Gtnvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add3~109_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~121_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add3~109_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~121_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add3~109_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// Location: FF_X24_Y19_N14
+dffeas \soc_inst|m0_1|u_logic|Yoz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yoz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yoz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yoz2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add3~109_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gtnvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~121_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y19_N44
+dffeas \soc_inst|m0_1|u_logic|Sl03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sl03z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1pvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y1pvx4 .lut_mask = 64'hFCFCA8A800FC00A8;
-defparam \soc_inst|m0_1|u_logic|Y1pvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sl03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sl03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vjnvx4~1 (
+// Location: FF_X25_Y18_N32
+dffeas \soc_inst|m0_1|u_logic|Noo2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Noo2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Noo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Noo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vjnvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vjnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y1pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Vjnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y1pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sl03z4~q  & (\soc_inst|m0_1|u_logic|Noo2z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Yoz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Noo2z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q 
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sl03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Vjnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yoz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sl03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Noo2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .lut_mask = 64'hB0B00000BBBB0000;
-defparam \soc_inst|m0_1|u_logic|Vjnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .lut_mask = 64'hF5F5313100F50031;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y16_N26
-dffeas \soc_inst|m0_1|u_logic|Q7j2z4 (
+// Location: FF_X25_Y21_N19
+dffeas \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vjnvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q7j2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q7j2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q7j2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nozvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nozvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U7uwx4~combout  & \soc_inst|m0_1|u_logic|Py72z4~3_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Lgi3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Q7j2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Q7j2z4~q  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Py72z4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q7j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y21_N32
+dffeas \soc_inst|m0_1|u_logic|Kt23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kt23z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .lut_mask = 64'h00FF00FF55550C0C;
-defparam \soc_inst|m0_1|u_logic|Nozvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kt23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt23z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uozvx4~1 (
+// Location: LABCELL_X23_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uozvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|J4awx4~0_combout ) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout )) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (\soc_inst|m0_1|u_logic|J4awx4~0_combout  & !\soc_inst|m0_1|u_logic|O3awx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Kt23z4~q  & ( (\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kt23z4~q  & ( 
+// ((\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kt23z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uozvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .lut_mask = 64'h03000300F3FFF3FF;
-defparam \soc_inst|m0_1|u_logic|Uozvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .lut_mask = 64'h5F555F550F000F00;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uozvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Uozvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uozvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Uozvx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & !\soc_inst|m0_1|u_logic|Nozvx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Uozvx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Uozvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uozvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y21_N1
+dffeas \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .lut_mask = 64'hF200FF002200FF00;
-defparam \soc_inst|m0_1|u_logic|Uozvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Znzvx4~0 (
+// Location: MLABCELL_X25_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Znzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|J4awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nozvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Jlo2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jlo2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Jlo2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|J4awx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .lut_mask = 64'h00FF000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Znzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmzvx4~0 (
+// Location: FF_X25_Y18_N37
+dffeas \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xmzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Znzvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kqzvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kqzvx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~5_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Ll63z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ll63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xmzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .lut_mask = 64'hC4C4C400C4C4C400;
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .lut_mask = 64'h0000000022000030;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xmzvx4~1 (
+// Location: FF_X25_Y21_N1
+dffeas \soc_inst|m0_1|u_logic|Uyu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uyu2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uyu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uyu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xmzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Uozvx4~0_combout  & (\soc_inst|m0_1|u_logic|Xmzvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add5~57_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uyu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lpt2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uyu2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uyu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lpt2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xmzvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lpt2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uyu2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .lut_mask = 64'h0000220200000000;
-defparam \soc_inst|m0_1|u_logic|Xmzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .lut_mask = 64'h0200030002000000;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N26
-dffeas \soc_inst|m0_1|u_logic|Csz2z4 (
+// Location: FF_X22_Y13_N37
+dffeas \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Csz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Csz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Csz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~4 (
+// Location: MLABCELL_X25_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Wo03z4~q  & ( \soc_inst|m0_1|u_logic|Xhl2z4~q  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wo03z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Xhl2z4~q  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wo03z4~q  & ( !\soc_inst|m0_1|u_logic|Xhl2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wo03z4~q  & ( !\soc_inst|m0_1|u_logic|Xhl2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csz2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~7_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout  & (\soc_inst|m0_1|u_logic|Uu73z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rtpvx4~6_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout  & !\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout  & (\soc_inst|m0_1|u_logic|Uu73z4~q  & (!\soc_inst|m0_1|u_logic|Rtpvx4~6_combout  & 
+// !\soc_inst|m0_1|u_logic|C51xx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout  & (!\soc_inst|m0_1|u_logic|Rtpvx4~6_combout  & 
+// !\soc_inst|m0_1|u_logic|C51xx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Csz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wo03z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhl2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Uu73z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .lut_mask = 64'hC400C4C4F500F5F5;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .lut_mask = 64'hA0002000A0A02020;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y25_N16
-dffeas \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE (
+// Location: FF_X21_Y18_N28
+dffeas \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~3 (
+// Location: MLABCELL_X21_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yhnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Dy23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dy23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Yhnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Dy23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .lut_mask = 64'hFF03FF0303030303;
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o[29] (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|haddr_o [29] = ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Add3~9_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # ((\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Add3~9_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # ((\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Add3~9_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add3~9_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|haddr_o[29] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o[29] .lut_mask = 64'hC8FAC8FAC8FA0000;
+defparam \soc_inst|m0_1|u_logic|haddr_o[29] .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yhnvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Yhnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|haddr_o [29] & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yhnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .lut_mask = 64'hA020A020F030F030;
+defparam \soc_inst|m0_1|u_logic|Yhnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y18_N50
-dffeas \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE (
+// Location: FF_X21_Y18_N29
+dffeas \soc_inst|m0_1|u_logic|Cqo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Yhnvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Cqo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cqo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cqo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~0 (
+// Location: LABCELL_X19_Y21_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uo13z4~q  & ( (!\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uo13z4~q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cqo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ujo2z4~q  & \soc_inst|m0_1|u_logic|U71xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cqo2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Ujo2z4~q  & 
+// \soc_inst|m0_1|u_logic|U71xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uo13z4~q ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ujo2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .lut_mask = 64'h0AFF0A0A0AFF0A0A;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .lut_mask = 64'h3B3B3B3B0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~1 (
+// Location: LABCELL_X24_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Edl2z4~q  & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lgi3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Edl2z4~q  & ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Lgi3z4~q ) # (\soc_inst|m0_1|u_logic|U71xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Edl2z4~q  & ( !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Rtpvx4~combout  = ( \soc_inst|m0_1|u_logic|Rtpvx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Rtpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~2_combout  & (\soc_inst|m0_1|u_logic|Rtpvx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Rtpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lgi3z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Edl2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rtpvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rtpvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rtpvx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .lut_mask = 64'h00FF0000AAFFAAAA;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y17_N55
-dffeas \soc_inst|m0_1|u_logic|Igl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Igl2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Igl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Igl2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X30_Y17_N43
-dffeas \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Xmzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rtpvx4 .lut_mask = 64'h0000200000000000;
+defparam \soc_inst|m0_1|u_logic|Rtpvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~5 (
+// Location: LABCELL_X22_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kih2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|C193z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|C193z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Rtpvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C193z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kih2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .lut_mask = 64'h0000500400000004;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .lut_mask = 64'hFFCCFFCCAAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Kih2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~6 (
+// Location: LABCELL_X22_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|N3v2z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|N3v2z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Eut2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|N3v2z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Eut2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~9_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ovcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~118  ))
+// \soc_inst|m0_1|u_logic|Add5~10  = CARRY(( (!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & !\soc_inst|m0_1|u_logic|W19wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Ovcvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~118  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eut2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|N3v2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ovcvx4~combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~118 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~6_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~10 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .lut_mask = 64'h0020002000300000;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~9 .lut_mask = 64'h000000FF0000FF64;
+defparam \soc_inst|m0_1|u_logic|Add5~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~7 (
+// Location: LABCELL_X23_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y5zvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Kqzvx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Kqzvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Nz73z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igl2z4~q )))) # (\soc_inst|m0_1|u_logic|Nz73z4~q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Igl2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|Y5zvx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Y5zvx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nz73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Igl2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kqzvx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .lut_mask = 64'hC4F5000000000000;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .lut_mask = 64'h00AA00AA000A000A;
+defparam \soc_inst|m0_1|u_logic|Y5zvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y25_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4~2 (
+// Location: LABCELL_X29_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cb3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M743z4~q ) # ((\soc_inst|m0_1|u_logic|V41xx4~0_combout  & !\soc_inst|m0_1|u_logic|Pbl2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V41xx4~0_combout  & !\soc_inst|m0_1|u_logic|Pbl2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Cb3wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wai2z4~q  & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Nd3wx4~combout  & (((\soc_inst|m0_1|u_logic|R5zvx4~2_combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout 
+// ))))) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (((!\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((\soc_inst|m0_1|u_logic|R5zvx4~2_combout ))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ))))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wai2z4~q  & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Nd3wx4~combout  & (((\soc_inst|m0_1|u_logic|R5zvx4~2_combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout ))))) # (\soc_inst|m0_1|u_logic|K0qvx4~combout 
+//  & (((!\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((\soc_inst|m0_1|u_logic|R5zvx4~2_combout ))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ))))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M743z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pbl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .lut_mask = 64'h0F000F00CFCCCFCC;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .lut_mask = 64'h008B008BBB8BBB8B;
+defparam \soc_inst|m0_1|u_logic|Cb3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqzvx4 (
+// Location: LABCELL_X29_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R38wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqzvx4~combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Kqzvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Kqzvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Kqzvx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kqzvx4~0_combout  & !\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|R38wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~q  $ (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kqzvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kqzvx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kqzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kqzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kqzvx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqzvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|R38wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqzvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqzvx4 .lut_mask = 64'h0000400000000000;
-defparam \soc_inst|m0_1|u_logic|Kqzvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R38wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R38wx4~0 .lut_mask = 64'hBEFFBEFF00000000;
+defparam \soc_inst|m0_1|u_logic|R38wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~18 (
+// Location: LABCELL_X29_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R38wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~18_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kqzvx4~combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kqzvx4~combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|R38wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R38wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X77wx4~combout  & (((!\soc_inst|m0_1|u_logic|Ark2z4~q )))) # (\soc_inst|m0_1|u_logic|X77wx4~combout  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q  
+// & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|R38wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R38wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .lut_mask = 64'h0C0C0A0F0C0C0A00;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R38wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R38wx4~1 .lut_mask = 64'hF2D1F2D100000000;
+defparam \soc_inst|m0_1|u_logic|R38wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5mvx4~0 (
+// Location: LABCELL_X29_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qb3wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M5mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hzj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Qb3wx4~combout  = ( !\soc_inst|m0_1|u_logic|Op2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|R38wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R38wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Op2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M5mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .lut_mask = 64'h00000000FEFFFEFF;
-defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qb3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qb3wx4 .lut_mask = 64'hFF0EFF0E00000000;
+defparam \soc_inst|m0_1|u_logic|Qb3wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5mvx4~1 (
+// Location: LABCELL_X23_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z9zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|M5mvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ) # ((!\soc_inst|m0_1|u_logic|K3l2z4~q ) # (!\soc_inst|m0_1|u_logic|Wfuwx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ynvvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|M5mvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ynvvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Z9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wspvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & \soc_inst|interconnect_1|HREADY~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wspvx4~combout  & ( 
+// \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M5mvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .lut_mask = 64'h55555555FFFDFFFD;
-defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .lut_mask = 64'h00FF00FF00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Z9zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y17_N58
-dffeas \soc_inst|m0_1|u_logic|Hzj2z4 (
+// Location: FF_X29_Y15_N31
+dffeas \soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hzj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hzj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7qwx4~0 (
+// Location: LABCELL_X19_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T7qwx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout ))) ) 
-// ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & (\soc_inst|m0_1|u_logic|B7owx4~combout  & !\soc_inst|interconnect_1|HRDATA[26]~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|O3ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|J0l2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|V1l2z4~q 
+//  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T7qwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .lut_mask = 64'h0C000C000C0F0C0F;
-defparam \soc_inst|m0_1|u_logic|T7qwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .lut_mask = 64'hCCCCCCCC0F000F00;
+defparam \soc_inst|m0_1|u_logic|O3ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkmwx4~0 (
+// Location: MLABCELL_X21_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3ivx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jkmwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T7qwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Hzj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|O3ivx4~1_combout  = ( !\soc_inst|m0_1|u_logic|O3ivx4~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O3ivx4~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T7qwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O3ivx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jkmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .lut_mask = 64'hFFFAFFFA00000000;
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .lut_mask = 64'hB0B00000BBBB0000;
+defparam \soc_inst|m0_1|u_logic|O3ivx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Beowx4~0 (
+// Location: FF_X21_Y13_N35
+dffeas \soc_inst|m0_1|u_logic|V1l2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|O3ivx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V1l2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V1l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V1l2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y21_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Beowx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Eruwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glj2z4~q ) # (!\soc_inst|m0_1|u_logic|V1l2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Glj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U71xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|V1l2z4~q  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Glj2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Beowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Beowx4~0 .lut_mask = 64'hFF00FF000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Beowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .lut_mask = 64'h0000F0F0AAAAFAFA;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zudwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Zudwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Beowx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zudwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Beowx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Zudwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// Location: FF_X22_Y13_N26
+dffeas \soc_inst|m0_1|u_logic|X2j2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X2j2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X2j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X2j2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zudwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X21_Y22_N7
+dffeas \soc_inst|m0_1|u_logic|Ll73z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ll73z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|Zudwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ll73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ll73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A6ewx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|A6ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|F7qwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kepwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ))) ) )
+// Location: FF_X21_Y22_N56
+dffeas \soc_inst|m0_1|u_logic|Cc63z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cc63z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc63z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F7qwx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X18_Y19_N56
+dffeas \soc_inst|m0_1|u_logic|Xti2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xti2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .lut_mask = 64'hAAF0AAF000000000;
-defparam \soc_inst|m0_1|u_logic|A6ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xti2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xti2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jkmwx4~1 (
+// Location: MLABCELL_X21_Y22_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jkmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|A6ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Jkmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|F7qwx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|A6ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jkmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|F7qwx4~combout ) # (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Xti2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Cc63z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xti2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cc63z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~q )) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Svk2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F7qwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jkmwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cc63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xti2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .lut_mask = 64'h00EE00EE00E000E0;
-defparam \soc_inst|m0_1|u_logic|Jkmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .lut_mask = 64'h0000000000830080;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~0 (
+// Location: FF_X17_Y21_N19
+dffeas \soc_inst|m0_1|u_logic|Lpu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lpu2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lpu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpu2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y19_N25
+dffeas \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qkmwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nnc3z4~q  & ( ((\soc_inst|m0_1|u_logic|Ipn2z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout )) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nnc3z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Ipn2z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lpu2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ipn2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nnc3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lpu2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .lut_mask = 64'h0505050505FF05FF;
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .lut_mask = 64'h00000A0000000808;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~1 (
+// Location: MLABCELL_X21_Y22_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qkmwx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[10]~12_combout  & ( ((\soc_inst|m0_1|u_logic|G6owx4~combout  & !\soc_inst|m0_1|u_logic|C9a3z4~q )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[10]~12_combout  & ( (\soc_inst|m0_1|u_logic|G6owx4~combout  & !\soc_inst|m0_1|u_logic|C9a3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Nd3wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ll73z4~q )))) # (\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (\soc_inst|m0_1|u_logic|X2j2z4~q  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ll73z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C9a3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X2j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ll73z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nd3wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .lut_mask = 64'h550055005F0F5F0F;
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .lut_mask = 64'hB0BB000000000000;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~7 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Koj2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Koj2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Koj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Koj2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X25_Y19_N20
+dffeas \soc_inst|m0_1|u_logic|Kt33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kt33z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kt33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kt33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~2 (
+// Location: MLABCELL_X28_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qkmwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qkmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qkmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Zva3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Koj2z4~q ) # (!\soc_inst|m0_1|u_logic|Kt33z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Koj2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Kt33z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qkmwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qkmwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Koj2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kt33z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .lut_mask = 64'hFFC4FFC400000000;
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .lut_mask = 64'h0000F0F0AAAAFAFA;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qkmwx4~3 (
+// Location: LABCELL_X24_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nd3wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qkmwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qkmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Mydwx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Sndwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qkmwx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Nd3wx4~combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~7_combout  & ( \soc_inst|m0_1|u_logic|Nd3wx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~7_combout  & ( \soc_inst|m0_1|u_logic|Nd3wx4~2_combout  ) ) # ( 
+// \soc_inst|m0_1|u_logic|Nd3wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~2_combout  & ( (((!\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ) # (\soc_inst|m0_1|u_logic|Nd3wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Nd3wx4~3_combout )) # 
+// (\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Nd3wx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qkmwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nd3wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nd3wx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nd3wx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nd3wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nd3wx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nd3wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .lut_mask = 64'h00FF00FF00350035;
-defparam \soc_inst|m0_1|u_logic|Qkmwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nd3wx4 .lut_mask = 64'hFFFFF7FFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Nd3wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yjzvx4~0 (
+// Location: LABCELL_X35_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yjzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~0_combout  = ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & \soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nd3wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Z62wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nd3wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .lut_mask = 64'h00CC00CCAAEEAAEE;
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .lut_mask = 64'h0054555400105510;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yjzvx4~1 (
+// Location: LABCELL_X35_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ux4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yjzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yjzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .lut_mask = 64'h2A002A003F003F00;
-defparam \soc_inst|m0_1|u_logic|Yjzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Ux4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjzvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rjzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|H3awx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) # (\soc_inst|m0_1|u_logic|H3awx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rjzvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X36_Y18_N26
+dffeas \soc_inst|m0_1|u_logic|P2a3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|I2uvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|P2a3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .lut_mask = 64'hACCF00CFAACC00CC;
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P2a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|P2a3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uhzvx4~1 (
+// Location: LABCELL_X36_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~5_sumout  & ( \soc_inst|m0_1|u_logic|Rjzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Djzvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~5_sumout  & ( \soc_inst|m0_1|u_logic|Rjzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Djzvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H8l2z4~q  & (!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Usl2z4~q ) 
+// # (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H8l2z4~q  & ((!\soc_inst|m0_1|u_logic|Usl2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Usl2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~q ) # (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rjzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uhzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .lut_mask = 64'h00000000CF004500;
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .lut_mask = 64'hFCFCFC00A8A8A800;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uhzvx4~0 (
+// Location: LABCELL_X37_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uhzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uhzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Yjzvx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~4_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qrp2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yjzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uhzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .lut_mask = 64'h000000000077007F;
-defparam \soc_inst|m0_1|u_logic|Uhzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .lut_mask = 64'h000000003300550F;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N37
-dffeas \soc_inst|m0_1|u_logic|Ow23z4 (
+// Location: FF_X35_Y18_N1
+dffeas \soc_inst|m0_1|u_logic|Tib3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tib3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tib3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tib3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~3 (
+// Location: LABCELL_X37_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gf53z4~q ) # ((\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ow23z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ow23z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~2_combout  = ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Z4l2z4~q  & ((!\soc_inst|m0_1|u_logic|Tib3z4~q ) 
+// # (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z4l2z4~q  & ((!\soc_inst|m0_1|u_logic|Tib3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Tib3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tib3z4~q ) # (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ow23z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gf53z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .lut_mask = 64'h50505050FF50FF50;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .lut_mask = 64'hFAFAC8C8FA00C800;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y21_N17
-dffeas \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE (
+// Location: FF_X35_Y21_N13
+dffeas \soc_inst|m0_1|u_logic|Tqs2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Tqs2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tqs2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tqs2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N26
-dffeas \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE (
+// Location: FF_X35_Y19_N34
+dffeas \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y24_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~6 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~6_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .lut_mask = 64'h0000000022002020;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~6 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~5_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Nz83z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Po63z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Po63z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nz83z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .lut_mask = 64'h000000000A00000C;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~7 (
+// Location: LABCELL_X35_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Djzvx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Djzvx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Yx73z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5k2z4~q )))) # (\soc_inst|m0_1|u_logic|Yx73z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout )) # (\soc_inst|m0_1|u_logic|O5k2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~1_combout  = ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqs2z4~q  & (!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqs2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yx73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5k2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Djzvx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .lut_mask = 64'hF531000000000000;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .lut_mask = 64'hFFF0CCC0AAA08880;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y20_N43
-dffeas \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE (
+// Location: FF_X35_Y21_N19
+dffeas \soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~0 (
+// Location: LABCELL_X36_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Z3k2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z3k2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svs2z4~q  & ((!\soc_inst|m0_1|u_logic|Zad3z4~q ) 
+// # (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zad3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Svs2z4~q  & ((!\soc_inst|m0_1|u_logic|Zad3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zad3z4~q ) # (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Z3k2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .lut_mask = 64'h00CC00CCF0FCF0FC;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .lut_mask = 64'hFFF0CCC0AAA08880;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N37
-dffeas \soc_inst|m0_1|u_logic|Hn03z4 (
+// Location: FF_X35_Y20_N2
+dffeas \soc_inst|m0_1|u_logic|Bjd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hn03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bjd3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hn03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hn03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bjd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bjd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y18_N49
-dffeas \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE (
+// Location: FF_X34_Y19_N13
+dffeas \soc_inst|m0_1|u_logic|Vfd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Uhzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Vfd3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~4_combout  = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nqz2z4~q  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hn03z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hn03z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & (\soc_inst|m0_1|u_logic|Nqz2z4~q  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hn03z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hn03z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Hn03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .lut_mask = 64'hC4C400C4F5F500F5;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|S8k2z4~q  & ( (!\soc_inst|m0_1|u_logic|K2k2z4~q  & \soc_inst|m0_1|u_logic|U71xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|S8k2z4~q  & ( ((!\soc_inst|m0_1|u_logic|K2k2z4~q  & 
-// \soc_inst|m0_1|u_logic|U71xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K2k2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .lut_mask = 64'h33F333F300F000F0;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X29_Y25_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|V0k2z4~q  & ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X543z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|V0k2z4~q  & ( \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X543z4~q ) # (\soc_inst|m0_1|u_logic|V41xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|V0k2z4~q  & ( !\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|X543z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|V0k2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .lut_mask = 64'h00FF0000F0FFF0F0;
-defparam \soc_inst|m0_1|u_logic|Djzvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vfd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vfd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djzvx4 (
+// Location: LABCELL_X35_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djzvx4~combout  = ( !\soc_inst|m0_1|u_logic|Djzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Djzvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Djzvx4~3_combout  & (\soc_inst|m0_1|u_logic|Djzvx4~7_combout  & 
-// (!\soc_inst|m0_1|u_logic|Djzvx4~0_combout  & \soc_inst|m0_1|u_logic|Djzvx4~4_combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Djzvx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Djzvx4~7_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Djzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Djzvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Djzvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~2_combout ),
+// \soc_inst|m0_1|u_logic|Vsywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bjd3z4~q  & (!\soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vfd3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vfd3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bjd3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vfd3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Vfd3z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vfd3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djzvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djzvx4 .lut_mask = 64'h0020000000000000;
-defparam \soc_inst|m0_1|u_logic|Djzvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .lut_mask = 64'hFFCCAA88F0C0A080;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~10 (
+// Location: LABCELL_X36_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~10_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Djzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ))) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ))) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Djzvx4~combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~6_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~3_combout  & ( \soc_inst|m0_1|u_logic|Vsywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vsywx4~5_combout  & (!\soc_inst|m0_1|u_logic|Vsywx4~4_combout  & 
+// (\soc_inst|m0_1|u_logic|Vsywx4~2_combout  & \soc_inst|m0_1|u_logic|Vsywx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zh5wx4~9_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vsywx4~5_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vsywx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vsywx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vsywx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vsywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .lut_mask = 64'h5555541000005410;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .lut_mask = 64'h0000000000000004;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N18
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[26]~8 (
+// Location: LABCELL_X36_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8b2z4 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[26]~8_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ) # (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (\soc_inst|ram_1|write_cycle~q  & (!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 )) ) )
+// \soc_inst|m0_1|u_logic|N8b2z4~combout  = ( \soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Txa2z4~0_combout  )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[26]~8_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[26]~8 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[26]~8 .lut_mask = 64'h0050005005550555;
-defparam \soc_inst|ram_1|data_to_memory[26]~8 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X46_Y15_N51
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[2]~14 (
-// Equation(s):
-// \soc_inst|interconnect_1|HRDATA[2]~14_combout  = ( \soc_inst|switches_1|switch_store[0][2]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
-// (\soc_inst|interconnect_1|HRDATA[6]~10_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][2]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
-// ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (!\soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( \soc_inst|switches_1|switch_store[0][2]~q  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
-// (\soc_inst|interconnect_1|Equal1~0_combout )) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][2]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
-// !\soc_inst|interconnect_1|HRDATA[6]~10_combout ) ) ) )
-
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|switches_1|switch_store[0][2]~q ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N8b2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[2]~14 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[2]~14 .lut_mask = 64'hC0C0C5C5CACACFCF;
-defparam \soc_inst|interconnect_1|HRDATA[2]~14 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N8b2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N8b2z4 .lut_mask = 64'hFFFFFFFFAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|N8b2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y15_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~1 (
+// Location: LABCELL_X35_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Inb2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojmwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( (!\soc_inst|m0_1|u_logic|Ojmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|M2b3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( (!\soc_inst|m0_1|u_logic|Ojmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|M2b3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[2]~14_combout  & ( (!\soc_inst|m0_1|u_logic|Ojmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|M2b3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Inb2z4~combout  = ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vgs2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ojmwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Inb2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .lut_mask = 64'hC4C4C4C4C4C40000;
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Inb2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Inb2z4 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Inb2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojmwx4~2 (
+// Location: LABCELL_X37_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ojmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Tkdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Xmdwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~5_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Aqp2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|B1a3z4~q  & 
+// !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .lut_mask = 64'h00000000AEBFAEBF;
-defparam \soc_inst|m0_1|u_logic|Ojmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~5 .lut_mask = 64'h00000000303005F5;
+defparam \soc_inst|m0_1|u_logic|Luywx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et0wx4~0 (
+// Location: LABCELL_X36_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Et0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) # ((!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~4_combout  = ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G8n2z4~q  & (!\soc_inst|m0_1|u_logic|Xdb3z4~q  & ((!\soc_inst|m0_1|u_logic|Pab3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdb3z4~q  & ((!\soc_inst|m0_1|u_logic|Pab3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G8n2z4~q  & ((!\soc_inst|m0_1|u_logic|Pab3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Oxuvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pab3z4~q ) # (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Et0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .lut_mask = 64'hA0A0A0A0FFA0FFA0;
-defparam \soc_inst|m0_1|u_logic|Et0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~4 .lut_mask = 64'hFFCCAA88F0C0A080;
+defparam \soc_inst|m0_1|u_logic|Luywx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et0wx4 (
+// Location: LABCELL_X36_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Et0wx4~combout  = ( !\soc_inst|m0_1|u_logic|Et0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & (((\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jkmwx4~1_combout )))) # 
-// (\soc_inst|m0_1|u_logic|W6iwx4~combout  & (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jkmwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J9d3z4~q  & (!\soc_inst|m0_1|u_logic|Lns2z4~q  & ((!\soc_inst|m0_1|u_logic|Axm2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J9d3z4~q  & ((!\soc_inst|m0_1|u_logic|Axm2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lns2z4~q  & ((!\soc_inst|m0_1|u_logic|Axm2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Axm2z4~q ) # (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Et0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J9d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Et0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Et0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Et0wx4 .lut_mask = 64'h0BBB0BBB00000000;
-defparam \soc_inst|m0_1|u_logic|Et0wx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y26_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~73 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~90  ))
-// \soc_inst|m0_1|u_logic|Add2~74  = CARRY(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~90  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~90 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~73_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~74 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~73 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~73 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~73 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~0 .lut_mask = 64'hFFAAF0A0CC88C080;
+defparam \soc_inst|m0_1|u_logic|Luywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Cjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~73_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Bnx2z4~q 
-// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~73_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Bnx2z4~q ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add2~73_sumout ),
+// Location: LABCELL_X36_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Luywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .lut_mask = 64'h3030303074747474;
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~3 .lut_mask = 64'hFCFCFC00A8A8A800;
+defparam \soc_inst|m0_1|u_logic|Luywx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjhvx4~1 (
+// Location: LABCELL_X35_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Et0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Et0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bus2z4~q  & ((!\soc_inst|m0_1|u_logic|Fed3z4~q ) 
+// # (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fed3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bus2z4~q  & ((!\soc_inst|m0_1|u_logic|Fed3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fed3z4~q ) # (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Et0wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .lut_mask = 64'h0000F0500000C040;
-defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~2 .lut_mask = 64'hFCFCFC00A8A8A800;
+defparam \soc_inst|m0_1|u_logic|Luywx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y22_N49
-dffeas \soc_inst|m0_1|u_logic|Bnx2z4 (
+// Location: FF_X35_Y20_N47
+dffeas \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pcd3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bnx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bnx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~69 (
+// Location: LABCELL_X35_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zjq2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~74  ))
-// \soc_inst|m0_1|u_logic|Add2~70  = CARRY(( !\soc_inst|m0_1|u_logic|Zjq2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~74  ))
+// \soc_inst|m0_1|u_logic|Luywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lhd3z4~q  & (!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lhd3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Douvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zjq2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~74 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~69_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~70 ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~69 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~69 .lut_mask = 64'h0000FFFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add2~69 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~1 .lut_mask = 64'hFFCCAA88F0C0A080;
+defparam \soc_inst|m0_1|u_logic|Luywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ithvx4~0 (
+// Location: LABCELL_X36_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ithvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zjq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout  & \soc_inst|m0_1|u_logic|Add2~69_sumout )) ) ) # ( !\soc_inst|m0_1|u_logic|Zjq2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|S5pvx4~combout  & \soc_inst|m0_1|u_logic|Add2~69_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Luywx4~6_combout  = ( \soc_inst|m0_1|u_logic|Luywx4~2_combout  & ( \soc_inst|m0_1|u_logic|Luywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Luywx4~5_combout  & (\soc_inst|m0_1|u_logic|Luywx4~4_combout  & 
+// (\soc_inst|m0_1|u_logic|Luywx4~0_combout  & \soc_inst|m0_1|u_logic|Luywx4~3_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~69_sumout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zjq2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Luywx4~5_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Luywx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Luywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Luywx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Luywx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Luywx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ithvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .lut_mask = 64'h5577557700220022;
-defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luywx4~6 .lut_mask = 64'h0000000000000002;
+defparam \soc_inst|m0_1|u_logic|Luywx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ithvx4~1 (
+// Location: LABCELL_X36_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypa2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ithvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~49_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add5~49_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ypa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Inb2z4~combout  & ( \soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~q  & !\soc_inst|m0_1|u_logic|N8b2z4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Inb2z4~combout  & ( \soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~q  & (!\soc_inst|m0_1|u_logic|N8b2z4~combout  & ((!\soc_inst|m0_1|u_logic|P2a3z4~q ) # (!\soc_inst|m0_1|u_logic|Vsywx4~6_combout )))) 
+// ) ) ) # ( \soc_inst|m0_1|u_logic|Inb2z4~combout  & ( !\soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( !\soc_inst|m0_1|u_logic|B1a3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Inb2z4~combout  & ( !\soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|B1a3z4~q  & ((!\soc_inst|m0_1|u_logic|P2a3z4~q ) # (!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ithvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N8b2z4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .lut_mask = 64'h0000A8000000A8A8;
-defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y21_N49
-dffeas \soc_inst|m0_1|u_logic|Zjq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zjq2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zjq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zjq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .lut_mask = 64'hC8C8CCCCC800CC00;
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~65 (
+// Location: LABCELL_X37_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~70  ))
-// \soc_inst|m0_1|u_logic|Add2~66  = CARRY(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~70  ))
+// \soc_inst|m0_1|u_logic|Xtywx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( ((\soc_inst|m0_1|u_logic|Cam2z4~q  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~70 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~65_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~66 ),
+	.combout(\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~65 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~65 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add2~65 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .lut_mask = 64'h2F3F00000F0F0000;
+defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldhvx4~0 (
+// Location: LABCELL_X36_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypa2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ldhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B9g3z4~q  & ( \soc_inst|m0_1|u_logic|Add2~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & \soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B9g3z4~q  & 
-// ( \soc_inst|m0_1|u_logic|Add2~65_sumout  & ( (\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B9g3z4~q  & ( !\soc_inst|m0_1|u_logic|Add2~65_sumout  & ( 
-// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Inb2z4~combout ) # (\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add2~65_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ldhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .lut_mask = 64'h555500005F5F0A0A;
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .lut_mask = 64'h1111111155115511;
+defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldhvx4~1 (
+// Location: LABCELL_X23_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C34wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ldhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Tj0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~53_sumout  & ( (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Tj0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|C34wx4~combout  = ( \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|C34wx4~0_combout  & \soc_inst|m0_1|u_logic|Ypa2z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|C34wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ldhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .lut_mask = 64'h0000AA220000A020;
-defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y21_N31
-dffeas \soc_inst|m0_1|u_logic|B9g3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ldhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B9g3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B9g3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B9g3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C34wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C34wx4 .lut_mask = 64'h0F0F0F0F000F000F;
+defparam \soc_inst|m0_1|u_logic|C34wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~61 (
+// Location: MLABCELL_X25_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Foe3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~66  ))
-// \soc_inst|m0_1|u_logic|Add2~62  = CARRY(( !\soc_inst|m0_1|u_logic|Foe3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~66  ))
+// \soc_inst|m0_1|u_logic|Pd4wx4~2_combout  = ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( (!\soc_inst|m0_1|u_logic|S4w2z4~q  & ((!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( (!\soc_inst|m0_1|u_logic|S4w2z4~q  & ((!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Kofwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~66 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~61_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~62 ),
+	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~61 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~61 .lut_mask = 64'h0000FFFF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Add2~61 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .lut_mask = 64'hAA8AAA8AAA88AA88;
+defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gehvx4~0 (
+// Location: MLABCELL_X25_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5vvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Foe3z4~q  & ( \soc_inst|m0_1|u_logic|Add2~61_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & \soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Foe3z4~q  & 
-// ( \soc_inst|m0_1|u_logic|Add2~61_sumout  & ( (\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Foe3z4~q  & ( !\soc_inst|m0_1|u_logic|Add2~61_sumout  & ( 
-// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Q5vvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pd4wx4~2_combout  & ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( (!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pd4wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout  & ((!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add2~61_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pd4wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gehvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .lut_mask = 64'h333300003F3F0C0C;
-defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .lut_mask = 64'hD0D00000DDDD0000;
+defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gehvx4~1 (
+// Location: LABCELL_X35_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gehvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qe0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add5~25_sumout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qe0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~25_sumout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Q7mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q5vvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|U7w2z4~q  & (((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ye4wx4~combout )) # (\soc_inst|m0_1|u_logic|R1w2z4~q ))) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Q5vvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gehvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .lut_mask = 64'h0000C0800000F0A0;
-defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .lut_mask = 64'hFFFFFFFF00FD00FD;
+defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y19_N7
-dffeas \soc_inst|m0_1|u_logic|Foe3z4 (
+// Location: FF_X35_Y16_N31
+dffeas \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -64144,143 +63715,162 @@ dffeas \soc_inst|m0_1|u_logic|Foe3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Foe3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Foe3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Foe3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vihvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Vihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Add2~105_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Nox2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Nox2z4~q ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add2~105_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vihvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X35_Y16_N13
+dffeas \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .lut_mask = 64'h5050505072727272;
-defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vihvx4~1 (
+// Location: LABCELL_X35_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Owgvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Ba0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Ba0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Owgvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wfuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|R1w2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wfuwx4~combout  & ( (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|R1w2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wfuwx4~combout  & ( (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|R1w2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wfuwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|R1w2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vihvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .lut_mask = 64'h0000BB000000B000;
-defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .lut_mask = 64'h0F0E0F0E0F0EFFEE;
+defparam \soc_inst|m0_1|u_logic|Owgvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y21_N55
-dffeas \soc_inst|m0_1|u_logic|Nox2z4 (
+// Location: FF_X35_Y16_N14
+dffeas \soc_inst|m0_1|u_logic|Ywi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nox2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ywi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nox2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nox2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ywi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ywi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C70wx4 (
+// Location: LABCELL_X37_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C70wx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~101_sumout  & ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~101_sumout  & ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~101_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~101_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|N90wx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  = (!\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ywi2z4~q )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~101_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C70wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C70wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C70wx4 .lut_mask = 64'hFAFAFA00C8C8C800;
-defparam \soc_inst|m0_1|u_logic|C70wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .lut_mask = 64'hF000F000F000F000;
+defparam \soc_inst|m0_1|u_logic|Q6mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y16_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9kvx4~0 (
+// Location: LABCELL_X30_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N4rvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q9kvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zfh3z4~q  & ( \soc_inst|m0_1|u_logic|C70wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nox2z4~q ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q  & ( \soc_inst|m0_1|u_logic|C70wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nox2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Zfh3z4~q  & ( !\soc_inst|m0_1|u_logic|C70wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nox2z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~q  & ( !\soc_inst|m0_1|u_logic|C70wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Nox2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|N4rvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nox2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C70wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .lut_mask = 64'h0C04CCC40F05FFF5;
-defparam \soc_inst|m0_1|u_logic|Q9kvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .lut_mask = 64'h5400555554545555;
+defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[3]~26_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[3]~26_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[3]~26_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[3]~26_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) )
+
+	.dataa(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .lut_mask = 64'hC800FA00C8C8FAFA;
+defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y16_N23
-dffeas \soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE (
+// Location: FF_X31_Y14_N16
+dffeas \soc_inst|m0_1|u_logic|Gtp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Q9kvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -64289,4593 +63879,5031 @@ dffeas \soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Gtp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gtp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gtp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~1 (
+// Location: LABCELL_X27_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Y1n2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Y1n2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Irqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|G97wx4~0_combout  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y1n2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .lut_mask = 64'h8800000040004000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y24_N22
-dffeas \soc_inst|m0_1|u_logic|Dq53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dq53z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dq53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dq53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .lut_mask = 64'h50005000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Irqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~3 (
+// Location: LABCELL_X27_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irqvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|L733z4~q  & ( \soc_inst|m0_1|u_logic|Dq53z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L733z4~q  & ( !\soc_inst|m0_1|u_logic|Dq53z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L733z4~q  & ( !\soc_inst|m0_1|u_logic|Dq53z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Irqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nbm2z4~q  & ( \soc_inst|m0_1|u_logic|Irqvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|L733z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dq53z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .lut_mask = 64'h0202000202000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Irqvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T83xx4~0 (
+// Location: LABCELL_X36_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A1yvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T83xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|R6n2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|A1yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|H9i2z4~q )) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// (\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Hyy2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R6n2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T83xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T83xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T83xx4~0 .lut_mask = 64'h2000000000000000;
-defparam \soc_inst|m0_1|u_logic|T83xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .lut_mask = 64'h0000000080908090;
+defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~2 (
+// Location: LABCELL_X36_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gokwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ug43z4~q  & ( \soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ug43z4~q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ug43z4~q  & ( !\soc_inst|m0_1|u_logic|J0n2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Gokwx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ug43z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|J0n2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .lut_mask = 64'h0044000400400000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y26_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~5 (
+// Location: LABCELL_X36_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|T83xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wa0wx4~4_combout  & (!\soc_inst|m0_1|u_logic|Wa0wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wa0wx4~1_combout  & !\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Sbxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout )) # (\soc_inst|m0_1|u_logic|A1yvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pty2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & 
+// \soc_inst|m0_1|u_logic|Irqvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wa0wx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wa0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wa0wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wa0wx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|T83xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .lut_mask = 64'h22FF22222FFF2222;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5awx4~0 (
+// Location: LABCELL_X29_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E5awx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C3z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C3z2z4~q  & ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|C3z2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|C3z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & !\soc_inst|m0_1|u_logic|Y29wx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Sbxvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sbxvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Sbxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hnxvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Jky2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hnxvx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sbxvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E5awx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E5awx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E5awx4~0 .lut_mask = 64'hCC00CCCCCCCCCC00;
-defparam \soc_inst|m0_1|u_logic|E5awx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .lut_mask = 64'h000044CC00000000;
+defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E5awx4~1 (
+// Location: FF_X29_Y14_N11
+dffeas \soc_inst|m0_1|u_logic|Uup2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uup2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uup2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uup2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L4bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E5awx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|E5awx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wa0wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|E5awx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|L4bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// \soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|E5awx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L4bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E5awx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E5awx4~1 .lut_mask = 64'h0000000077337F3F;
-defparam \soc_inst|m0_1|u_logic|E5awx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .lut_mask = 64'h0010000000000000;
+defparam \soc_inst|m0_1|u_logic|L4bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~1 (
+// Location: MLABCELL_X25_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I4dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J70wx4~1_combout  = ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( \soc_inst|m0_1|u_logic|N90wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Wa0wx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( \soc_inst|m0_1|u_logic|N90wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Wa0wx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wa0wx4~combout ) # ((\soc_inst|m0_1|u_logic|X8zvx4~combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( !\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wa0wx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|I4dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|W4dwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ucqvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|W4dwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ucqvx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W4dwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y5dwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W4dwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J70wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J70wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J70wx4~1 .lut_mask = 64'h5703753055005500;
-defparam \soc_inst|m0_1|u_logic|J70wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .lut_mask = 64'hF0A0F0A030203020;
+defparam \soc_inst|m0_1|u_logic|I4dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y16_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z80wx4~1 (
+// Location: LABCELL_X27_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z80wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|E5awx4~1_combout ) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|E5awx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (\soc_inst|m0_1|u_logic|E5awx4~1_combout ) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout  & !\soc_inst|m0_1|u_logic|E5awx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Z4bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z80wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .lut_mask = 64'h550055FF0055FF55;
-defparam \soc_inst|m0_1|u_logic|Z80wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .lut_mask = 64'h88888888A0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z80wx4~0 (
+// Location: MLABCELL_X25_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z80wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Z80wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & \soc_inst|m0_1|u_logic|Z80wx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Z80wx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|N90wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Z80wx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))))) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z80wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .lut_mask = 64'h0A0F0E0F000F0C0F;
-defparam \soc_inst|m0_1|u_logic|Z80wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .lut_mask = 64'h5444050050000000;
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~2 (
+// Location: MLABCELL_X25_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J70wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( !\soc_inst|m0_1|u_logic|Z80wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J70wx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( !\soc_inst|m0_1|u_logic|Z80wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J70wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|S4bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z4bwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J70wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J70wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S4bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J70wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J70wx4~2 .lut_mask = 64'hA0A0202000000000;
-defparam \soc_inst|m0_1|u_logic|J70wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .lut_mask = 64'h8088808888888888;
+defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y24_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J70wx4~0 (
+// Location: LABCELL_X23_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J70wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ba0wx4~combout  & ( \soc_inst|m0_1|u_logic|J70wx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Q3bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|S4bwx4~0_combout  & ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R40wx4~combout  & (!\soc_inst|m0_1|u_logic|L4bwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uup2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L4bwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uup2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|J70wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L4bwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S4bwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J70wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J70wx4~0 .lut_mask = 64'h0000000000005F7F;
-defparam \soc_inst|m0_1|u_logic|J70wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .lut_mask = 64'hF030000050100000;
+defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y25_N26
-dffeas \soc_inst|m0_1|u_logic|V883z4 (
+// Location: FF_X33_Y18_N29
+dffeas \soc_inst|m0_1|u_logic|G7x2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V883z4~q ),
+	.q(\soc_inst|m0_1|u_logic|G7x2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V883z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V883z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G7x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G7x2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N20
-dffeas \soc_inst|m0_1|u_logic|Mz63z4 (
+// Location: FF_X23_Y24_N26
+dffeas \soc_inst|m0_1|u_logic|Xx93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J70wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mz63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Xx93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mz63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mz63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xx93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xx93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~6 (
+// Location: LABCELL_X23_Y24_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mekvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~6_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Md93z4~q  & ( (!\soc_inst|m0_1|u_logic|Mz63z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Md93z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Mz63z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Mekvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xx93z4~q  & ( (\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0pvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Xx93z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0pvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mz63z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Md93z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xx93z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mekvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .lut_mask = 64'h0000200300002000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~6 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y25_N32
-dffeas \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M3u2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
+defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y25_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~7 (
+// Location: LABCELL_X23_Y24_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mekvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Vcv2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vcv2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mekvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mekvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout  & ((!\soc_inst|m0_1|u_logic|Ekovx4~combout ) # ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|W0pvx4~combout  & (\soc_inst|m0_1|u_logic|G7x2z4~q  & ((!\soc_inst|m0_1|u_logic|Ekovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vcv2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mekvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .lut_mask = 64'h00000000080A0800;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .lut_mask = 64'hAF8CAF8C00000000;
+defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y25_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4~8 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Wa0wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Wa0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|V883z4~q  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|C5n2z4~q )))) # (\soc_inst|m0_1|u_logic|V883z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout )) # (\soc_inst|m0_1|u_logic|C5n2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|V883z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C5n2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wa0wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~7_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y24_N25
+dffeas \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .lut_mask = 64'hF351000000000000;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wa0wx4 (
+// Location: LABCELL_X17_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hyz2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wa0wx4~combout  = ( \soc_inst|m0_1|u_logic|Wa0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~8_combout  ) )
+// \soc_inst|m0_1|u_logic|Hyz2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|I30wx4~2_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wa0wx4~8_combout ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hyz2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wa0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wa0wx4 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Wa0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Hyz2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[22]~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  = ( \soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uvzvx4~combout ) # ((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) ) )
+// Location: FF_X17_Y18_N40
+dffeas \soc_inst|m0_1|u_logic|Hyz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hyz2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hyz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hyz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y22_N2
+dffeas \soc_inst|m0_1|u_logic|Bv03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bv03z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .lut_mask = 64'hAFAAAFAAA0AAA0AA;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[22]~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bv03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bv03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cma3z4~0 (
+// Location: LABCELL_X18_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cma3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  )
+// \soc_inst|m0_1|u_logic|D7bwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bv03z4~q  & ( (!\soc_inst|m0_1|u_logic|Hyz2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Bv03z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyz2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bv03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7bwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .lut_mask = 64'hFFFFFFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Cma3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .lut_mask = 64'h0000C80000000800;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y14_N46
-dffeas \soc_inst|m0_1|u_logic|Cma3z4 (
+// Location: FF_X24_Y20_N50
+dffeas \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cma3z4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cma3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cma3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cma3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y12_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~69 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~46  ))
-// \soc_inst|m0_1|u_logic|Add0~70  = CARRY(( !\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~46  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~46 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~69_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~70 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~69 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~69 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~69 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X43_Y14_N50
-dffeas \soc_inst|m0_1|u_logic|Ogo2z4 (
+// Location: FF_X23_Y21_N38
+dffeas \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ogo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ogo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4 (
+// Location: LABCELL_X24_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ce0wx4~combout  = ( \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|D7bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Po53z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ce0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ce0wx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Ce0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .lut_mask = 64'h00000088000000C0;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[21]~15 (
+// Location: FF_X17_Y22_N16
+dffeas \soc_inst|m0_1|u_logic|X533z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X533z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X533z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X533z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y22_N14
+dffeas \soc_inst|m0_1|u_logic|Ow13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ow13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ow13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y22_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  = ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Ce0wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Ce0wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|D7bwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|X533z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Ow13z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|X533z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ow13z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D7bwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .lut_mask = 64'h0000AFAF5050FFFF;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .lut_mask = 64'h5000440000000000;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ieh3z4~feeder (
+// Location: LABCELL_X19_Y22_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5m2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ieh3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  )
+// \soc_inst|m0_1|u_logic|J5m2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|I30wx4~2_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ieh3z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ieh3z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ieh3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ieh3z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|J5m2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y14_N20
-dffeas \soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE (
+// Location: FF_X19_Y22_N8
+dffeas \soc_inst|m0_1|u_logic|J5m2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ieh3z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|J5m2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J5m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5m2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nnmvx4~0 (
+// Location: LABCELL_X19_Y22_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nnmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ogo2z4~q  & ( \soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE_q  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Add0~69_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ogo2z4~q  & ( \soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Add0~69_sumout ) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ogo2z4~q  & ( !\soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE_q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & !\soc_inst|m0_1|u_logic|Add0~69_sumout ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ogo2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Add0~69_sumout ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|A9bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J5m2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~69_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|J5m2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A9bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .lut_mask = 64'h5D55FDF55F57FFF7;
-defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y14_N49
-dffeas \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|D7bwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|D7bwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|A9bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D7bwx4~2_combout  & (!\soc_inst|m0_1|u_logic|D7bwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|X6m2z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X6m2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|D7bwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D7bwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|D7bwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A9bwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|D7bwx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .lut_mask = 64'hB000000000000000;
+defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~85 (
+// Location: LABCELL_X23_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aqnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ddi3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~70  ))
-// \soc_inst|m0_1|u_logic|Add0~86  = CARRY(( !\soc_inst|m0_1|u_logic|Ddi3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~70  ))
+// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jw93z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jw93z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Jw93z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Jw93z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|D7bwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~70 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~85_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add0~86 ),
+	.combout(\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~85 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~85 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~85 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .lut_mask = 64'hCACFCACFCACFCAC0;
+defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y12_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gnmvx4~0 (
+// Location: LABCELL_X22_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asbvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gnmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ddi3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ddi3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ddi3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~85_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Cma3z4~q ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Ddi3z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~85_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Cma3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Asbvx4~combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Donvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cma3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~85_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Asbvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Asbvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Asbvx4 .lut_mask = 64'h0F8F0F0FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Asbvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dfd2z4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Dfd2z4~combout  = ( \soc_inst|m0_1|u_logic|Qfdwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qfdwx4~0_combout  )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dfd2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .lut_mask = 64'h4501EFABFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y12_N31
-dffeas \soc_inst|m0_1|u_logic|Ddi3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ddi3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ddi3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ddi3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dfd2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dfd2z4 .lut_mask = 64'hFFFFFFFFFFF3FFF3;
+defparam \soc_inst|m0_1|u_logic|Dfd2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~0 (
+// Location: LABCELL_X23_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfd2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y7iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cma3z4~q ) # ((!\soc_inst|m0_1|u_logic|Ddi3z4~q  & \soc_inst|m0_1|u_logic|I7owx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & 
-// ( (!\soc_inst|m0_1|u_logic|Ddi3z4~q  & \soc_inst|m0_1|u_logic|I7owx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Kfd2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Cma3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .lut_mask = 64'h00F000F0CCFCCCFC;
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y18_N13
-dffeas \soc_inst|m0_1|u_logic|Fed3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fed3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fed3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fed3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X50_Y18_N22
-dffeas \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .lut_mask = 64'h0000000002000200;
+defparam \soc_inst|m0_1|u_logic|Kfd2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~0 (
+// Location: MLABCELL_X28_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q77wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Avowx4~0_combout  = ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( ((\soc_inst|m0_1|u_logic|K3uvx4~0_combout  & \soc_inst|m0_1|u_logic|X9n2z4~q )) # (\soc_inst|m0_1|u_logic|Bus2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|E0uvx4~combout  & 
-// ( (\soc_inst|m0_1|u_logic|K3uvx4~0_combout  & \soc_inst|m0_1|u_logic|X9n2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Q77wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Avowx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Avowx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Avowx4~0 .lut_mask = 64'h000F000F555F555F;
-defparam \soc_inst|m0_1|u_logic|Avowx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|Q77wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~1 (
+// Location: MLABCELL_X28_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qobwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Avowx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Avowx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qwowx4~combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # ((!\soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Qwowx4~combout  & (!\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Qobwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Q77wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Avowx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Avowx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Avowx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Avowx4~1 .lut_mask = 64'hFAC8FAC800000000;
-defparam \soc_inst|m0_1|u_logic|Avowx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Qobwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Avowx4~2 (
+// Location: MLABCELL_X28_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R29wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Avowx4~2_combout  = ( \soc_inst|m0_1|u_logic|Avowx4~1_combout  & ( (\soc_inst|m0_1|u_logic|N1uvx4~combout  & (\soc_inst|m0_1|u_logic|Fed3z4~q  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Avowx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|R29wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qobwx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fed3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Avowx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Avowx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Avowx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Avowx4~2 .lut_mask = 64'h00FF00FF00030003;
-defparam \soc_inst|m0_1|u_logic|Avowx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R29wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R29wx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|R29wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~1 (
+// Location: LABCELL_X22_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E1bvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y7iwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Y7iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Avowx4~2_combout  & ( (!\soc_inst|interconnect_1|HRDATA[22]~35_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|E1bvx4~combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zhyvx4~combout  & \soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zhyvx4~combout  & \soc_inst|m0_1|u_logic|W19wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|R29wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Y7iwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Avowx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E1bvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .lut_mask = 64'hFCFC000000000000;
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E1bvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E1bvx4 .lut_mask = 64'h3131CECEF5F50A0A;
+defparam \soc_inst|m0_1|u_logic|E1bvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Asdwx4~1 (
+// Location: LABCELL_X23_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zznvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Asdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Asdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Asdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Nvdwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Zznvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~q )) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nvdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Asdwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zznvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .lut_mask = 64'h0F000F000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Asdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .lut_mask = 64'h0000000000030000;
+defparam \soc_inst|m0_1|u_logic|Zznvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7iwx4~2 (
+// Location: LABCELL_X24_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Asdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y7iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Zudwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Asdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y7iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Zudwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Vxnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fzcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T3ovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y7iwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T3ovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4ovx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fzcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vxnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .lut_mask = 64'h0A0E0A0E0B0F0B0F;
-defparam \soc_inst|m0_1|u_logic|Y7iwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .lut_mask = 64'hF050F05000000000;
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X61wx4~0 (
+// Location: LABCELL_X24_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qynvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) # (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) # (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qynvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X61wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qynvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X61wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X61wx4~0 .lut_mask = 64'h00000BBB0BBB0BBB;
-defparam \soc_inst|m0_1|u_logic|X61wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .lut_mask = 64'h0303000003030022;
+defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X61wx4~1 (
+// Location: LABCELL_X23_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qynvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X61wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X61wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & (((\soc_inst|m0_1|u_logic|D7iwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) # (\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ((\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X61wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ((\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qynvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qynvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Qynvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X61wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qynvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qynvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X61wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X61wx4~1 .lut_mask = 64'h000000002A2A2A3F;
-defparam \soc_inst|m0_1|u_logic|X61wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .lut_mask = 64'h0001000100FF00FF;
+defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M41wx4~1 (
+// Location: LABCELL_X23_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M41wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~61_sumout  & ( \soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|J61wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|M41wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~61_sumout  & ( \soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J61wx4~0_combout  & \soc_inst|m0_1|u_logic|M41wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vxnvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Qynvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vxnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zznvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M41wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zznvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vxnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qynvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M41wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M41wx4~1 .lut_mask = 64'h0000000000F00050;
-defparam \soc_inst|m0_1|u_logic|M41wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y22_N5
-dffeas \soc_inst|m0_1|u_logic|B1q2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B1q2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B1q2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .lut_mask = 64'h0E0C0E0C00000000;
+defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~3 (
+// Location: LABCELL_X22_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~134 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmqwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Hmv2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Hmv2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B1q2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hmv2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|B1q2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~134_cout  = CARRY(( !\soc_inst|m0_1|u_logic|Pdi2z4~q  ) + ( !\soc_inst|m0_1|u_logic|Vxnvx4~1_combout  ) + ( !VCC ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1q2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hmv2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ),
+	.combout(),
 	.sumout(),
-	.cout(),
+	.cout(\soc_inst|m0_1|u_logic|Add5~134_cout ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .lut_mask = 64'h0020002000300000;
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y18_N43
-dffeas \soc_inst|m0_1|u_logic|Mzp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mzp2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mzp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mzp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add5~134 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~134 .lut_mask = 64'h00000F0F0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add5~134 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~1 (
+// Location: LABCELL_X22_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mzp2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  
-// & !\soc_inst|m0_1|u_logic|No93z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mzp2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|No93z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mzp2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~29_sumout  = SUM(( \soc_inst|m0_1|u_logic|E1bvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & (\soc_inst|m0_1|u_logic|Dfd2z4~combout  & (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~134_cout  ))
+// \soc_inst|m0_1|u_logic|Add5~30  = CARRY(( \soc_inst|m0_1|u_logic|E1bvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & (\soc_inst|m0_1|u_logic|Dfd2z4~combout  & (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~134_cout  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|No93z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mzp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dfd2z4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E1bvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~134_cout ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .lut_mask = 64'h0101000001000100;
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~29 .lut_mask = 64'h0000FFDF000000FF;
+defparam \soc_inst|m0_1|u_logic|Add5~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~0 (
+// Location: LABCELL_X22_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~93 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y873z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Q2q2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~30  ))
+// \soc_inst|m0_1|u_logic|Add5~94  = CARRY(( !\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Punvx4~4_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~30  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q2q2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y873z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~30 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~94 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .lut_mask = 64'h0000A0000000C000;
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~93 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~93 .lut_mask = 64'h0000FF0F00008877;
+defparam \soc_inst|m0_1|u_logic|Add5~93 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4~2 (
+// Location: LABCELL_X22_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~101 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmqwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hi83z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ycu2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Add5~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Asbvx4~combout  ) + ( 
+// \soc_inst|m0_1|u_logic|Add5~94  ))
+// \soc_inst|m0_1|u_logic|Add5~102  = CARRY(( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  $ (((\soc_inst|m0_1|u_logic|Pdi2z4~q ) # (\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( !\soc_inst|m0_1|u_logic|Asbvx4~combout  ) + ( \soc_inst|m0_1|u_logic|Add5~94  
+// ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ycu2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hi83z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Asbvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~94 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~102 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .lut_mask = 64'h00000088000000A0;
-defparam \soc_inst|m0_1|u_logic|Hmqwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~101 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~101 .lut_mask = 64'h00000F0F00008877;
+defparam \soc_inst|m0_1|u_logic|Add5~101 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hmqwx4 (
+// Location: LABCELL_X22_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~33 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hmqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Hmqwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hmqwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Hmqwx4~1_combout  & !\soc_inst|m0_1|u_logic|Hmqwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Add5~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~102  ))
+// \soc_inst|m0_1|u_logic|Add5~34  = CARRY(( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~102  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hmqwx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hmqwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hmqwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~102 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~34 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmqwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hmqwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|Hmqwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~33 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y25_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mydwx4~0 (
+// Location: LABCELL_X33_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bmhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mydwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Hmqwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Bmhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H4nwx4~combout  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Bmhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add5~33_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Bmhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add5~33_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  & ( !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Bmhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add5~33_sumout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bmhvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .lut_mask = 64'h0F0F00000F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .lut_mask = 64'h5454000054545454;
+defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y25_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mydwx4~1 (
+// Location: FF_X33_Y18_N28
+dffeas \soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~33 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mydwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( \soc_inst|m0_1|u_logic|E1ewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( \soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Mydwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E1ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Add2~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~18  ))
+// \soc_inst|m0_1|u_logic|Add2~34  = CARRY(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~18  ))
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|E1ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~18 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~33_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~34 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .lut_mask = 64'h00000F0FF0F0FFFF;
-defparam \soc_inst|m0_1|u_logic|Mydwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~33 .lut_mask = 64'h0000FFFF0000CCCC;
+defparam \soc_inst|m0_1|u_logic|Add2~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eudwx4~1 (
+// Location: MLABCELL_X39_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eudwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Eudwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Eudwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Xtdwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add2~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~34  ))
+// \soc_inst|m0_1|u_logic|Add2~38  = CARRY(( !\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~34  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xtdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Eudwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~34 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~37_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~38 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .lut_mask = 64'h0F000F000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Eudwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~37 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qapwx4~0 (
+// Location: FF_X33_Y18_N16
+dffeas \soc_inst|m0_1|u_logic|Cax2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cax2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cax2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cax2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qapwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & \soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nlhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cax2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Add2~37_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Cax2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~37_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~37_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qapwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Qapwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .lut_mask = 64'h88808880AAA2AAA2;
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7iwx4~0 (
+// Location: LABCELL_X33_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qapwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Eudwx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Mydwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Nlhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (\soc_inst|m0_1|u_logic|Nlhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Vcuvx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (\soc_inst|m0_1|u_logic|Nlhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nlhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qapwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .lut_mask = 64'hABFBABFB00000000;
-defparam \soc_inst|m0_1|u_logic|D7iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .lut_mask = 64'h0A0F0A0F080C080C;
+defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y17_N34
-dffeas \soc_inst|m0_1|u_logic|Kss2z4 (
+// Location: FF_X33_Y18_N17
+dffeas \soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kss2z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kss2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kss2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kss2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~0 (
+// Location: LABCELL_X19_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bnnvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Lz93z4~q )) # (\soc_inst|m0_1|u_logic|Kss2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|E0uvx4~combout  & ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Lz93z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( !\soc_inst|m0_1|u_logic|B2uvx4~0_combout  
-// & ( \soc_inst|m0_1|u_logic|Kss2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Bnnvx4~combout  = ( \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kss2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1pwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bnnvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .lut_mask = 64'h00000F0F22222F2F;
-defparam \soc_inst|m0_1|u_logic|M1pwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bnnvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bnnvx4 .lut_mask = 64'hEBFFFFFFC3FFFFFF;
+defparam \soc_inst|m0_1|u_logic|Bnnvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y15_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~1 (
+// Location: LABCELL_X19_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1pwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Tqc3z4~q )) # (\soc_inst|m0_1|u_logic|Rym2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Tqc3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Add3~29_sumout  = SUM(( (!\soc_inst|m0_1|u_logic|Bnnvx4~combout ) # ((!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) + ( 
+// !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|Add3~30  = CARRY(( (!\soc_inst|m0_1|u_logic|Bnnvx4~combout ) # ((!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) ) + ( 
+// !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( !VCC ))
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tqc3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bnnvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1pwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~29_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .lut_mask = 64'h003300330F3F0F3F;
-defparam \soc_inst|m0_1|u_logic|M1pwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~29 .lut_mask = 64'h000000FF0000FF08;
+defparam \soc_inst|m0_1|u_logic|Add3~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~2 (
+// Location: LABCELL_X19_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1pwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|M1pwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|M1pwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Mis2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Add3~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~30  ))
+// \soc_inst|m0_1|u_logic|Add3~26  = CARRY(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~30  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1pwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M1pwx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~30 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1pwx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~25_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .lut_mask = 64'hFC00FC0000000000;
-defparam \soc_inst|m0_1|u_logic|M1pwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~25 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~3 (
+// Location: LABCELL_X19_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~33 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1pwx4~3_combout  = ( \soc_inst|m0_1|u_logic|T4uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|M1pwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Rsa3z4~q  & ((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5a3z4~q ))) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|M1pwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5a3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~26  ))
+// \soc_inst|m0_1|u_logic|Add3~34  = CARRY(( !\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~26  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U5a3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1pwx4~2_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1pwx4~3_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~33_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~34 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .lut_mask = 64'h00000000F3F35151;
-defparam \soc_inst|m0_1|u_logic|M1pwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~33 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~33 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1pwx4~4 (
+// Location: LABCELL_X19_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~53 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1pwx4~4_combout  = ( \soc_inst|m0_1|u_logic|K7pwx4~combout  & ( \soc_inst|m0_1|u_logic|M1pwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Axm2z4~q  & ((!\soc_inst|m0_1|u_logic|Pcd3z4~q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|K7pwx4~combout  & ( \soc_inst|m0_1|u_logic|M1pwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Pcd3z4~q ) # (!\soc_inst|m0_1|u_logic|N1uvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nbx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~34  ))
+// \soc_inst|m0_1|u_logic|Add3~54  = CARRY(( !\soc_inst|m0_1|u_logic|Nbx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~34  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1pwx4~3_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~34 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1pwx4~4_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~53_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~54 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .lut_mask = 64'h00000000FFF0AAA0;
-defparam \soc_inst|m0_1|u_logic|M1pwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~53 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add3~53 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7iwx4~1 (
+// Location: LABCELL_X19_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~49 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|M1pwx4~4_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|D7iwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Wfuwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M1pwx4~4_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|D7iwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|M1pwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~2_combout  & ( \soc_inst|m0_1|u_logic|D7iwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|M1pwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|D7iwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~54  ))
+// \soc_inst|m0_1|u_logic|Add3~50  = CARRY(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~54  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D7iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M1pwx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~54 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~49_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~50 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .lut_mask = 64'h0A0A0F0F0A0A0F0A;
-defparam \soc_inst|m0_1|u_logic|D7iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~49 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~49 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E9zvx4~0 (
+// Location: LABCELL_X19_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~45 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|O9iwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|O9iwx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|O9iwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~50  ))
+// \soc_inst|m0_1|u_logic|Add3~46  = CARRY(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~50  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~50 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E9zvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~45_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~46 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .lut_mask = 64'h0F00FFFF0F000F00;
-defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~45 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~45 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~45 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E9zvx4~1 (
+// Location: LABCELL_X19_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~41 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E9zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (\soc_inst|m0_1|u_logic|D7iwx4~1_combout  & (!\soc_inst|m0_1|u_logic|E9zvx4~0_combout  & ((\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|A9iwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (!\soc_inst|m0_1|u_logic|E9zvx4~0_combout  & ((\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Add3~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~46  ))
+// \soc_inst|m0_1|u_logic|Add3~42  = CARRY(( !\soc_inst|m0_1|u_logic|V4d3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~46  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E9zvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~46 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~41_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~42 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .lut_mask = 64'h30F030F010501050;
-defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~41 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~41 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y26_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jmdwx4~1 (
+// Location: LABCELL_X19_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jmdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jmdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Jmdwx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jmdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kw7wx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Add3~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ufx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~42  ))
+// \soc_inst|m0_1|u_logic|Add3~38  = CARRY(( !\soc_inst|m0_1|u_logic|Ufx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~42  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kw7wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jmdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~42 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~37_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~38 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .lut_mask = 64'h00000F0FFFFF0F0F;
-defparam \soc_inst|m0_1|u_logic|Jmdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~37 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~37 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5ewx4 (
+// Location: LABCELL_X23_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Owovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F5ewx4~combout  = ( !\soc_inst|m0_1|u_logic|Mouwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Owovx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~81_sumout  & ( \soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Qk1wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~81_sumout  & ( \soc_inst|m0_1|u_logic|Add5~45_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~81_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~81_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~81_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F5ewx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Owovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F5ewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F5ewx4 .lut_mask = 64'hCCF0CCF000000000;
-defparam \soc_inst|m0_1|u_logic|F5ewx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Owovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Owovx4 .lut_mask = 64'h050505FF373737FF;
+defparam \soc_inst|m0_1|u_logic|Owovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3ewx4~0 (
+// Location: LABCELL_X27_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W3ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|F5ewx4~combout  & ( (!\soc_inst|m0_1|u_logic|M5ewx4~0_combout  & (!\soc_inst|m0_1|u_logic|A6ewx4~0_combout  & (\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|X7ewx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Wzivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Owovx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wce3z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Owovx4~combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Owovx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F5ewx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W3ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .lut_mask = 64'h0008000800000000;
-defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .lut_mask = 64'h0000FFAACF8ACF8A;
+defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3ewx4~1 (
+// Location: FF_X27_Y17_N2
+dffeas \soc_inst|m0_1|u_logic|Wce3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wce3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wce3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wce3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X16_Y20_N44
+dffeas \soc_inst|m0_1|u_logic|Pvd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pvd3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pvd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pvd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X12_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aud3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W3ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|W3ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & (!\soc_inst|m0_1|u_logic|Iutwx4~0_combout  & \soc_inst|m0_1|u_logic|J7ewx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Aud3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W3ewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W3ewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aud3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .lut_mask = 64'h0000000000300030;
-defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aud3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aud3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Aud3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~1 (
+// Location: FF_X12_Y17_N13
+dffeas \soc_inst|m0_1|u_logic|Aud3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Aud3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Aud3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Aud3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aud3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Asdwx4~1_combout  & (\soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & \soc_inst|m0_1|u_logic|Xs7wx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Cc9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aud3z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pvd3z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aud3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Pvd3z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pvd3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aud3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .lut_mask = 64'h0000000000050005;
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .lut_mask = 64'h00000D0000000800;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~2 (
+// Location: FF_X16_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|Tyd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tyd3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tyd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tyd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zudwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & (\soc_inst|m0_1|u_logic|Gvdwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Nvdwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Cc9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Exd3z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tyd3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Exd3z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Tyd3z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tyd3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Exd3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .lut_mask = 64'h0000000000020002;
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .lut_mask = 64'h0C04000008000000;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dqdwx4~0 (
+// Location: FF_X13_Y20_N41
+dffeas \soc_inst|m0_1|u_logic|U9e3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U9e3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X13_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dqdwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ge9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|U9e3z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|U9e3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dqdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ge9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .lut_mask = 64'hE4CCE4CC00000000;
-defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~0 (
+// Location: FF_X13_Y20_N55
+dffeas \soc_inst|m0_1|u_logic|Q6e3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Q6e3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Q6e3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q6e3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X12_Y20_N49
+dffeas \soc_inst|m0_1|u_logic|F8e3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|F8e3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F8e3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F8e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F8e3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X13_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jtdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Eudwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Cc9wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Q6e3z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|F8e3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q6e3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|F8e3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .lut_mask = 64'h0000A00000008080;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~3 (
+// Location: LABCELL_X16_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kqdwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qtdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kqdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xtdwx4~1_combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Cc9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ge9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cc9wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Cc9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Cc9wx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ibe3z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ibe3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cc9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cc9wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ge9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cc9wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .lut_mask = 64'h0000000000000303;
-defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .lut_mask = 64'hC400000000000000;
+defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~2 (
+// Location: LABCELL_X16_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qk1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Kqdwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kqdwx4~1_combout  & \soc_inst|m0_1|u_logic|Dqdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqdwx4~3_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Dqdwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( \soc_inst|m0_1|u_logic|Cc9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Rkd3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Ai9wx4~combout  & \soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wce3z4~q  & ( \soc_inst|m0_1|u_logic|Cc9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Rkd3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Ai9wx4~combout ) # (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Cc9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Rkd3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wce3z4~q  & ( !\soc_inst|m0_1|u_logic|Cc9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Rkd3z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dqdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqdwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .lut_mask = 64'h00FC00FC00CC00CC;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .lut_mask = 64'hAFAFA0AFAFACA0AC;
+defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~4 (
+// Location: LABCELL_X16_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Aj1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~combout ) # ((\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|R99wx4~1_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .lut_mask = 64'hA0A0A0A080888088;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .lut_mask = 64'h11440000F1F4F0F0;
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Widwx4~0 (
+// Location: MLABCELL_X15_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Widwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+// \soc_inst|m0_1|u_logic|Aj1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Aj1wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Widwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Widwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Widwx4~0 .lut_mask = 64'hA0A0A0A0A088A088;
-defparam \soc_inst|m0_1|u_logic|Widwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .lut_mask = 64'hCC00CC000000CC00;
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~0 (
+// Location: MLABCELL_X21_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xk1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Sndwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Xk1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|R99wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|R99wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xk1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .lut_mask = 64'h505F505F05F505F5;
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y26_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~2 (
+// Location: MLABCELL_X21_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xk1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Djdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nodwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Godwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Xk1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xk1wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xk1wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pdi2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xk1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djdwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .lut_mask = 64'h0000000000000C0C;
-defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .lut_mask = 64'h0000CE0A0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Xk1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y26_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~3 (
+// Location: LABCELL_X30_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djdwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qmdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rw7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Jmdwx4~1_combout  & (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Xmdwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ll1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Pmnwx4~combout  & !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Pmnwx4~combout  & !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djdwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ll1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .lut_mask = 64'h0000000000000011;
-defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .lut_mask = 64'hFCF0FCF0CC00CC00;
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~1 (
+// Location: LABCELL_X30_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Djdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|B28wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fkdwx4~1_combout  & (\soc_inst|m0_1|u_logic|Tkdwx4~1_combout  & \soc_inst|m0_1|u_logic|Fq7wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rilwx4~2_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & (!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rilwx4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Djdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .lut_mask = 64'h0000000000050005;
-defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .lut_mask = 64'h45004500CF00CF00;
+defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~3 (
+// Location: LABCELL_X12_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Djdwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Djdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Widwx4~0_combout  & !\soc_inst|m0_1|u_logic|Djdwx4~2_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Djdwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Djdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Widwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Djdwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Djdwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Widwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Aj1wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Aj1wx4~2_combout  & !\soc_inst|m0_1|u_logic|Xk1wx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Widwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Djdwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Djdwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Djdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Aj1wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .lut_mask = 64'h3333333330300000;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .lut_mask = 64'h0000000022002300;
+defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~5 (
+// Location: FF_X16_Y20_N19
+dffeas \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Z78wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Z78wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z78wx4~4_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Pvd3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Pvd3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Pvd3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z78wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z78wx4~4_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z78wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pvd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .lut_mask = 64'hA0F0A0F000000000;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .lut_mask = 64'h0080008000A00000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~0 (
+// Location: FF_X13_Y20_N40
+dffeas \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X17_Y20_N14
+dffeas \soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & !\soc_inst|m0_1|u_logic|Manwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aud3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aud3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aud3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .lut_mask = 64'hFA00FA0050005000;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .lut_mask = 64'hA000004000000040;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~2 (
+// Location: LABCELL_X16_Y20_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wwdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|C0ewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Djdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Vzdwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Gm1wx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout  & (\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gm1wx4~6_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .lut_mask = 64'h0000000000000505;
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .lut_mask = 64'hAA0A220200000000;
+defparam \soc_inst|m0_1|u_logic|Gm1wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~1 (
+// Location: LABCELL_X16_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R99wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wwdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kqdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E1ewx4~1_combout  & (\soc_inst|m0_1|u_logic|X0ewx4~1_combout  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|R99wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Gm1wx4~8_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|R99wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// \soc_inst|m0_1|u_logic|R99wx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R99wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .lut_mask = 64'h0000000003000300;
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R99wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R99wx4~1 .lut_mask = 64'h05050D0D050F0D0F;
+defparam \soc_inst|m0_1|u_logic|R99wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~0 (
+// Location: LABCELL_X29_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uehvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wwdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S08wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mydwx4~1_combout  & \soc_inst|m0_1|u_logic|Yxdwx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Uehvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~45_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Gmd3z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add2~85_sumout ) # ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Gmd3z4~q )))))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~85_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uehvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .lut_mask = 64'h0000000000000303;
-defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .lut_mask = 64'h80808880C4C4CCC4;
+defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~1 (
+// Location: LABCELL_X29_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uehvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wwdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wwdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z78wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wwdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wwdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z78wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wwdwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wwdwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Z78wx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Uehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uehvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Uehvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Z78wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uehvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .lut_mask = 64'h3333333330300000;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .lut_mask = 64'h0000AAAA0000FAFB;
+defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~6 (
+// Location: FF_X29_Y16_N34
+dffeas \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~81 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Z78wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Z78wx4~5_combout  & ((\soc_inst|m0_1|u_logic|W3ewx4~1_combout ) # (\soc_inst|m0_1|u_logic|Manwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Add2~81_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~86  ))
+// \soc_inst|m0_1|u_logic|Add2~82  = CARRY(( !\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~86  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W3ewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z78wx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z78wx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~86 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~81_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~82 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .lut_mask = 64'h005F005F00000000;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~81 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~81 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~81 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~0 (
+// Location: MLABCELL_X39_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~109 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  ) ) )
+// \soc_inst|m0_1|u_logic|Add2~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~82  ))
+// \soc_inst|m0_1|u_logic|Add2~110  = CARRY(( !\soc_inst|m0_1|u_logic|Tme3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~82  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~82 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~109_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~110 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~0 .lut_mask = 64'hAAAA000000000000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~109 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~109 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~109 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~29 (
+// Location: MLABCELL_X39_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~101 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~29_sumout  = SUM(( \soc_inst|m0_1|u_logic|E1bvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & (\soc_inst|m0_1|u_logic|Dfd2z4~combout  & (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~134_cout  ))
-// \soc_inst|m0_1|u_logic|Add5~30  = CARRY(( \soc_inst|m0_1|u_logic|E1bvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & (\soc_inst|m0_1|u_logic|Dfd2z4~combout  & (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~134_cout  ))
+// \soc_inst|m0_1|u_logic|Add2~101_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~110  ))
+// \soc_inst|m0_1|u_logic|Add2~102  = CARRY(( !\soc_inst|m0_1|u_logic|Rix2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~110  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dfd2z4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E1bvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~134_cout ),
+	.cin(\soc_inst|m0_1|u_logic|Add2~110 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~29_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~30 ),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~101_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~102 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~29 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~29 .lut_mask = 64'h0000FFDF000000FF;
-defparam \soc_inst|m0_1|u_logic|Add5~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~101 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~101 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~101 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~0 (
+// Location: LABCELL_X33_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xjhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do8wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~37_sumout  & (!\soc_inst|m0_1|u_logic|Add5~33_sumout  & 
-// !\soc_inst|m0_1|u_logic|Add5~29_sumout )) ) ) )
+// \soc_inst|m0_1|u_logic|Xjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rix2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rix2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~101_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do8wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xjhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .lut_mask = 64'h8080000000000000;
-defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .lut_mask = 64'hCF00CF008B008B00;
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~1 (
+// Location: LABCELL_X31_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X61wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do8wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (\soc_inst|m0_1|u_logic|Do8wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~13_sumout  & 
-// !\soc_inst|m0_1|u_logic|Add5~17_sumout )) ) ) )
+// \soc_inst|m0_1|u_logic|X61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & (\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|A9iwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Do8wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do8wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X61wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .lut_mask = 64'h4040000000000000;
-defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X61wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X61wx4~0 .lut_mask = 64'h030F010533FF1155;
+defparam \soc_inst|m0_1|u_logic|X61wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~2 (
+// Location: LABCELL_X31_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X61wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do8wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~61_sumout  & !\soc_inst|m0_1|u_logic|Add5~65_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|X61wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & ((\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & ((\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & (\soc_inst|m0_1|u_logic|X61wx4~0_combout  & ((\soc_inst|m0_1|u_logic|D7iwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X61wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do8wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .lut_mask = 64'hC0C0000000000000;
-defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X61wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X61wx4~1 .lut_mask = 64'h040C040C040C050F;
+defparam \soc_inst|m0_1|u_logic|X61wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y18_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~3 (
+// Location: LABCELL_X33_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xjhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Do8wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~53_sumout  & \soc_inst|m0_1|u_logic|Do8wx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Xjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xjhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~61_sumout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (\soc_inst|m0_1|u_logic|Xjhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~61_sumout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Do8wx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xjhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do8wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .lut_mask = 64'h00F0000000000000;
-defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .lut_mask = 64'h0A080A080F0C0F0C;
+defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Do8wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( \soc_inst|m0_1|u_logic|Do8wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Do8wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Add5~5_sumout  & 
-// !\soc_inst|m0_1|u_logic|Add5~9_sumout )) ) ) )
+// Location: FF_X33_Y18_N14
+dffeas \soc_inst|m0_1|u_logic|Rix2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rix2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rix2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rix2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Do8wx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Do8wx4~3_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Do8wx4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y15_N31
+dffeas \soc_inst|m0_1|u_logic|J7q2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J7q2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .lut_mask = 64'h0000000050000000;
-defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J7q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J7q2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fyzvx4~0 (
+// Location: LABCELL_X23_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fyzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ))) ) )
+// \soc_inst|m0_1|u_logic|haddr_o~4_combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~61_sumout  ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~61_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|C61wx4~0_combout  & (\soc_inst|m0_1|u_logic|Add3~97_sumout  & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) # (\soc_inst|m0_1|u_logic|C61wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~97_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~61_sumout  & ( (!\soc_inst|m0_1|u_logic|C61wx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Add3~97_sumout  & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) # (\soc_inst|m0_1|u_logic|C61wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~97_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~61_sumout  & ( (!\soc_inst|m0_1|u_logic|C61wx4~0_combout  & (\soc_inst|m0_1|u_logic|Add3~97_sumout  & 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ))) # (\soc_inst|m0_1|u_logic|C61wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add3~97_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add3~97_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .lut_mask = 64'h88CC88CC80C080C0;
-defparam \soc_inst|m0_1|u_logic|Fyzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~4 .lut_mask = 64'h035703570357FFFF;
+defparam \soc_inst|m0_1|u_logic|haddr_o~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~1 (
+// Location: LABCELL_X19_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdjvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~105_sumout  & ( \soc_inst|m0_1|u_logic|Do1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Wccwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~105_sumout  & ( \soc_inst|m0_1|u_logic|Do1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add5~109_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Pdjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J7q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~4_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rix2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~4_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rix2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|J7q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~4_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rix2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~4_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rix2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~1 .lut_mask = 64'h0000000000310011;
-defparam \soc_inst|m0_1|u_logic|N88wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .lut_mask = 64'h0F05FFF50C04CCC4;
+defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y15_N32
+dffeas \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~0 (
+// Location: LABCELL_X27_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aw9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Igi2z4~q  & \soc_inst|m0_1|u_logic|Rmawx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Igi2z4~q  & \soc_inst|m0_1|u_logic|Rmawx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Aw9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Psh3z4~q  & 
+// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Psh3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L9zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .lut_mask = 64'hCCFCCCFC00F000F0;
-defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .lut_mask = 64'h0000008000000000;
+defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~2 (
+// Location: FF_X15_Y17_N2
+dffeas \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L9zvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igi2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Du9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vr33z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Vr33z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vr33z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L9zvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Du9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .lut_mask = 64'hF3F3F3F300000000;
-defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .lut_mask = 64'h00000000E0004000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~1 (
+// Location: LABCELL_X16_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L9zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Du9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E153z4~q  & ( \soc_inst|m0_1|u_logic|Na63z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|E153z4~q  & ( !\soc_inst|m0_1|u_logic|Na63z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E153z4~q  & ( !\soc_inst|m0_1|u_logic|Na63z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|E153z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Na63z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L9zvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Du9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .lut_mask = 64'hA0A0A0A088A088A0;
-defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .lut_mask = 64'h0050001000400000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|L9zvx4~combout  = ( \soc_inst|m0_1|u_logic|L9zvx4~2_combout  & ( \soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|L9zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|L9zvx4~2_combout  & ( \soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|L9zvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|L9zvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) ) )
+// Location: FF_X17_Y16_N31
+dffeas \soc_inst|m0_1|u_logic|Lph3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lph3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lph3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lph3z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L9zvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L9zvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L9zvx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L9zvx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y19_N11
+dffeas \soc_inst|m0_1|u_logic|Arh3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Arh3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L9zvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L9zvx4 .lut_mask = 64'h000000FFD000D0FF;
-defparam \soc_inst|m0_1|u_logic|L9zvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Arh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Arh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luzvx4~1 (
+// Location: LABCELL_X18_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Du9wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Arh3z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Lph3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Arh3z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Lph3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Arh3z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lph3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Arh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Du9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .lut_mask = 64'h550F0F55550F0F55;
-defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .lut_mask = 64'h4040000040004000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luzvx4~0 (
+// Location: LABCELL_X19_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Euzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Luzvx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Euzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Luzvx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Du9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Du9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Du9wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Aw9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Du9wx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Euh3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Luzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Euh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Du9wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Du9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Du9wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Du9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .lut_mask = 64'h00008F880000FFFF;
-defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~13 (
+// Location: LABCELL_X19_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P82wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~13_combout  = ( !\soc_inst|m0_1|u_logic|J61wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xk1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L9zvx4~combout  & (!\soc_inst|m0_1|u_logic|Luzvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Uozvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|P82wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Y8q2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Y8q2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L9zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Du9wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~13_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~13 .lut_mask = 64'h4000000000000000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P82wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P82wx4~0 .lut_mask = 64'hCCF5CCF5CCF5CCA0;
+defparam \soc_inst|m0_1|u_logic|P82wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~0 (
+// Location: LABCELL_X17_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N72wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G5qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Thm2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|N72wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((\soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N72wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .lut_mask = 64'h0000000044004E0A;
-defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N72wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N72wx4~0 .lut_mask = 64'hFAACACFAF0A0A0F0;
+defparam \soc_inst|m0_1|u_logic|N72wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nyawx4~0 (
+// Location: LABCELL_X17_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q52wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nyawx4~0_combout  = ( \soc_inst|m0_1|u_logic|E1bvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Oxnvx4~3_combout )) # 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|E1bvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Oxnvx4~3_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|E1bvx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & ((\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & (\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E1bvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|Oxnvx4~3_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Q52wx4~0_combout  = ( \soc_inst|m0_1|u_logic|N72wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|N72wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E1bvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N72wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q52wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .lut_mask = 64'h00050F1B00550F5F;
-defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .lut_mask = 64'h000088AA0000080A;
+defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~19 (
+// Location: LABCELL_X17_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q52wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~19_combout  = ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & \soc_inst|m0_1|u_logic|H3awx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Q52wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Glnwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|U72wx4~0_combout  & (\soc_inst|m0_1|u_logic|Q52wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q52wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~19_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~19 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~19 .lut_mask = 64'h00F000F000000000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~19 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .lut_mask = 64'h0031003100000000;
+defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~21 (
+// Location: FF_X18_Y21_N55
+dffeas \soc_inst|m0_1|u_logic|Naq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Naq2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Naq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Naq2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~21_combout  = ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Ey9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Naq2z4~q  & ( \soc_inst|m0_1|u_logic|E0d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Naq2z4~q  & ( !\soc_inst|m0_1|u_logic|E0d3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+//  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Naq2z4~q  & ( !\soc_inst|m0_1|u_logic|E0d3z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Naq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|E0d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~21_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~21 .lut_mask = 64'h0F0F0000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .lut_mask = 64'h0003000100020000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~18 (
+// Location: LABCELL_X18_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~18_combout  = ( \soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ey9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fxv2z4~q  & ( \soc_inst|m0_1|u_logic|Ccq2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fxv2z4~q  & ( !\soc_inst|m0_1|u_logic|Ccq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fxv2z4~q  & ( !\soc_inst|m0_1|u_logic|Ccq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fxv2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ccq2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~18_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~18 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~18 .lut_mask = 64'h00000000CC33CC33;
-defparam \soc_inst|m0_1|u_logic|N88wx4~18 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .lut_mask = 64'h0030002000100000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~8 (
+// Location: FF_X19_Y21_N50
+dffeas \soc_inst|m0_1|u_logic|Rdq2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rdq2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rdq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rdq2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ) # ((\soc_inst|m0_1|u_logic|P82wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|P82wx4~0_combout  & \soc_inst|m0_1|u_logic|Ns9wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Gdawx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ey9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wj73z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rdq2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wj73z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rdq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~8 .lut_mask = 64'h41414141CD73CD73;
-defparam \soc_inst|m0_1|u_logic|N88wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .lut_mask = 64'h5000000040400000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~7 (
+// Location: LABCELL_X18_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ey9wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ft83z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wnu2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wnu2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ft83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~7 .lut_mask = 64'h5F000F55550F005F;
-defparam \soc_inst|m0_1|u_logic|N88wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .lut_mask = 64'h0000000020203000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~20 (
+// Location: LABCELL_X18_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ey9wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~20_combout  = ( !\soc_inst|m0_1|u_logic|N88wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ey9wx4~combout  = ( !\soc_inst|m0_1|u_logic|Ey9wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ey9wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Ey9wx4~3_combout  & !\soc_inst|m0_1|u_logic|Ey9wx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N88wx4~8_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ey9wx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ey9wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ey9wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~20_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~20 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~20 .lut_mask = 64'hCFFC000000000000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~20 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ey9wx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Ey9wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~9 (
+// Location: LABCELL_X31_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mydwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( ((!\soc_inst|m0_1|u_logic|N88wx4~19_combout  & !\soc_inst|m0_1|u_logic|N88wx4~18_combout )) # 
-// (\soc_inst|m0_1|u_logic|N88wx4~21_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( (!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|N88wx4~19_combout  & 
-// !\soc_inst|m0_1|u_logic|N88wx4~18_combout )) # (\soc_inst|m0_1|u_logic|N88wx4~21_combout ))) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & (!\soc_inst|m0_1|u_logic|N88wx4~19_combout  & ((!\soc_inst|m0_1|u_logic|N88wx4~18_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~21_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & \soc_inst|m0_1|u_logic|N88wx4~21_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Mydwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N88wx4~19_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N88wx4~21_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N88wx4~18_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~20_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~9 .lut_mask = 64'h0A0A0F0FCE0ACF0F;
-defparam \soc_inst|m0_1|u_logic|N88wx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .lut_mask = 64'h00000F0FF0F0FFFF;
+defparam \soc_inst|m0_1|u_logic|Mydwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~10 (
+// Location: LABCELL_X31_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C0ewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~10_combout  = ( \soc_inst|m0_1|u_logic|Pdbwx4~combout  & ( (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & \soc_inst|m0_1|u_logic|Htyvx4~3_combout ) ) )
+// \soc_inst|m0_1|u_logic|C0ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|C0ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mydwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|C0ewx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Mydwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mydwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C0ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~10 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~10 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|N88wx4~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|C0ewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~3 (
+// Location: MLABCELL_X39_Y18_N42
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[12]~22 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ee8wx4~3_combout  = ( \soc_inst|m0_1|u_logic|R40wx4~combout  & ( (\soc_inst|m0_1|u_logic|Kqzvx4~combout  & (\soc_inst|m0_1|u_logic|Uvzvx4~combout  & \soc_inst|m0_1|u_logic|Wa0wx4~combout )) ) )
+// \soc_inst|interconnect_1|HRDATA[12]~22_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout  & ( \soc_inst|interconnect_1|HRDATA[11]~3_combout  ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout 
+//  & ( !\soc_inst|interconnect_1|HRDATA[11]~3_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~3_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .lut_mask = 64'h0000000000050005;
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[12]~22 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[12]~22 .lut_mask = 64'hF0F00000FFFF0F0F;
+defparam \soc_inst|interconnect_1|HRDATA[12]~22 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~2 (
+// Location: LABCELL_X31_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ee8wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nn0wx4~combout  & (\soc_inst|m0_1|u_logic|Ce0wx4~combout  & (\soc_inst|m0_1|u_logic|Hc1wx4~combout  
-// & \soc_inst|m0_1|u_logic|Ze1wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|L7a3z4~q  & (!\soc_inst|m0_1|u_logic|B7owx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Iua3z4~q )))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|L7a3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Iua3z4~q ))) ) ) ) # ( \soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Iua3z4~q ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[12]~22_combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Iua3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|L7a3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .lut_mask = 64'h0000000000000001;
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .lut_mask = 64'hFF55F05033113010;
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~0 (
+// Location: LABCELL_X31_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ee8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yw0wx4~combout  & ( \soc_inst|m0_1|u_logic|St0wx4~combout  & ( (\soc_inst|m0_1|u_logic|O7zvx4~combout  & (\soc_inst|m0_1|u_logic|Hk0wx4~combout  & (\soc_inst|m0_1|u_logic|W21wx4~combout  
-// & \soc_inst|m0_1|u_logic|S71wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xrmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  & ( \soc_inst|m0_1|u_logic|E1ewx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|C0ewx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Xrmwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E1ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|C0ewx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xrmwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .lut_mask = 64'h0000000000000001;
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .lut_mask = 64'h0000F0F50000FFF5;
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~1 (
+// Location: LABCELL_X36_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bsvwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ee8wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ee8wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Ee8wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ee8wx4~3_combout  & (\soc_inst|m0_1|u_logic|P12wx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Zhyvx4~combout  & \soc_inst|m0_1|u_logic|Djzvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bsvwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dpc3z4~q  & ( ((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Oar2z4~q )) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Dpc3z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Oar2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ee8wx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ee8wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ee8wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dpc3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .lut_mask = 64'h0000000000000001;
-defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .lut_mask = 64'h111111111F1F1F1F;
+defparam \soc_inst|m0_1|u_logic|Bsvwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~0 (
+// Location: MLABCELL_X34_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Arzwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~0_combout  = ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Arzwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Iazwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & \soc_inst|m0_1|u_logic|Dizwx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Iazwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & (\soc_inst|m0_1|u_logic|Dizwx4~0_combout  & !\soc_inst|m0_1|u_logic|Arzwx4~0_combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kizwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Iazwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dizwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dizwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Arzwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kizwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iazwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Arzwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~0 .lut_mask = 64'h00EECCAAAACCEE00;
-defparam \soc_inst|m0_1|u_logic|G79wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .lut_mask = 64'hCC0C0C000C0C0000;
+defparam \soc_inst|m0_1|u_logic|Arzwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~1 (
+// Location: MLABCELL_X34_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & \soc_inst|m0_1|u_logic|Ns9wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Gdawx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Arzwx4~2_combout  ) ) # ( \soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Arzwx4~2_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xwvwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Arzwx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Zxvwx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zxvwx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Xwvwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Arzwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~1 .lut_mask = 64'h76E676E650A050A0;
-defparam \soc_inst|m0_1|u_logic|G79wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .lut_mask = 64'hF0F01010FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C8zvx4~0 (
+// Location: MLABCELL_X34_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Viuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C8zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & \soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Viuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B6pwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yizwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjzwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ihzwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|B6pwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qlzwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Clzwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ihzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yizwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjzwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .lut_mask = 64'h0F0F0F0F000F000F;
-defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .lut_mask = 64'h8AFFEFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Viuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~2 (
+// Location: MLABCELL_X34_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|F32wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & (!\soc_inst|m0_1|u_logic|F32wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & (!\soc_inst|m0_1|u_logic|F32wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & !\soc_inst|m0_1|u_logic|F32wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Viuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Whzwx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Viuwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gyvwx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gyvwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Whzwx4~1_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~2 .lut_mask = 64'h75607560EA60EA60;
-defparam \soc_inst|m0_1|u_logic|G79wx4~2 .shared_arith = "off";
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .lut_mask = 64'h5555555533333333;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dv8wx4~0 (
+// Location: LABCELL_X33_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dv8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Hlzvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~2_combout  = ( \soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D0wwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G10xx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G10xx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .lut_mask = 64'h0A0A0A0A0F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .lut_mask = 64'h0F000F000FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~3 (
+// Location: LABCELL_X33_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|G79wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Dv8wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G79wx4~0_combout  & (!\soc_inst|m0_1|u_logic|G79wx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Znzvx4~0_combout  & !\soc_inst|m0_1|u_logic|C8zvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jjuwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jzzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Jzzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N10xx4~0_combout  & ((\soc_inst|m0_1|u_logic|F40xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|N10xx4~0_combout  & (\soc_inst|m0_1|u_logic|Qzzwx4~0_combout  & \soc_inst|m0_1|u_logic|F40xx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Jzzwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Jjuwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Jzzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N10xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|F40xx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G79wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G79wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|G79wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|N10xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qzzwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F40xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jzzwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~3 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|G79wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .lut_mask = 64'h88CCCCCC088CCCCC;
+defparam \soc_inst|m0_1|u_logic|Jjuwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~6 (
+// Location: LABCELL_X33_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|R99wx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|R99wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|R99wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|R99wx4~1_combout  & !\soc_inst|m0_1|u_logic|Qk1wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~3_combout  = ( \soc_inst|m0_1|u_logic|U5pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & 
+// ((\soc_inst|m0_1|u_logic|Ayzwx4~combout ))) # (\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  & (\soc_inst|m0_1|u_logic|Wzvwx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kkrvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ayzwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~6 .lut_mask = 64'h73607360EC60EC60;
-defparam \soc_inst|m0_1|u_logic|G79wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .lut_mask = 64'h05F505F533333333;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~5 (
+// Location: LABCELL_X33_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~5_combout  = ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|M9awx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & !\soc_inst|m0_1|u_logic|M9awx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & \soc_inst|m0_1|u_logic|M9awx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & !\soc_inst|m0_1|u_logic|M9awx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  = ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kkrvx4~0_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & ((\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kkrvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kkrvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kkrvx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~5 .lut_mask = 64'h54E454E4D8A8D8A8;
-defparam \soc_inst|m0_1|u_logic|G79wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .lut_mask = 64'hA3A3A3A300FF00FF;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~4 (
+// Location: LABCELL_X33_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & !\soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & !\soc_inst|m0_1|u_logic|U11wx4~0_combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & !\soc_inst|m0_1|u_logic|U11wx4~0_combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & !\soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & (\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wwywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & (\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kkrvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~4 .lut_mask = 64'h4444FF88FF448888;
-defparam \soc_inst|m0_1|u_logic|G79wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .lut_mask = 64'h1010B0B0FF10FF10;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~7 (
+// Location: LABCELL_X33_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkrvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G79wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|G79wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|G79wx4~6_combout  & (!\soc_inst|m0_1|u_logic|O51wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|G79wx4~5_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G79wx4~6_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G79wx4~5_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G79wx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G79wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G79wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G79wx4~7 .lut_mask = 64'h8000800000000000;
-defparam \soc_inst|m0_1|u_logic|G79wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .lut_mask = 64'hF0F0F0F000F000F0;
+defparam \soc_inst|m0_1|u_logic|Kkrvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~11 (
+// Location: LABCELL_X31_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrmwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~11_combout  = ( \soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( \soc_inst|m0_1|u_logic|G79wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|N88wx4~10_combout  & 
-// \soc_inst|m0_1|u_logic|Ee8wx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( \soc_inst|m0_1|u_logic|G79wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|N88wx4~10_combout  & \soc_inst|m0_1|u_logic|Ee8wx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|G79wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|N88wx4~10_combout  & \soc_inst|m0_1|u_logic|Ee8wx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|G79wx4~7_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|N88wx4~10_combout  & \soc_inst|m0_1|u_logic|Ee8wx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wfuwx4~combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & !\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wfuwx4~combout  & ( \soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wfuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wfuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kkrvx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Xrmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N88wx4~10_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ee8wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|G79wx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G79wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xrmwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsvwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~11_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~11 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~11 .lut_mask = 64'hC0D0C0D0C0D0CCDD;
-defparam \soc_inst|m0_1|u_logic|N88wx4~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .lut_mask = 64'h5454545454544444;
+defparam \soc_inst|m0_1|u_logic|Xrmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~12 (
+// Location: LABCELL_X29_Y23_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uf1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~12_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~11_combout  & ( !\soc_inst|m0_1|u_logic|G11wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z80wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout  & \soc_inst|m0_1|u_logic|N88wx4~9_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Uf1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N88wx4~9_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N88wx4~11_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~12_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uf1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~12 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~12 .lut_mask = 64'h0000008000000000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~12 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .lut_mask = 64'h110133035505FF0F;
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~17 (
+// Location: LABCELL_X17_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uf1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~17_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~12_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~13_combout  & (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|J00wx4~1_combout  & !\soc_inst|m0_1|u_logic|Nyawx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Uf1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Uf1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N88wx4~13_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~12_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uf1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~17_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~17 .lut_mask = 64'h0000000000000400;
-defparam \soc_inst|m0_1|u_logic|N88wx4~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .lut_mask = 64'h000000004445CCCF;
+defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~2 (
+// Location: LABCELL_X17_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nf1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nf1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ ((\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nf1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~2 .lut_mask = 64'h050F05F5505F50F0;
-defparam \soc_inst|m0_1|u_logic|N88wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .lut_mask = 64'hFFF99960FF009900;
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjzvx4~0 (
+// Location: LABCELL_X17_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qd1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rjzvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qd1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nf1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ze1wx4~combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nf1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rjzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qd1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .lut_mask = 64'hFF0FFF0F00000000;
-defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .lut_mask = 64'h00000000AFAF0000;
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nf1wx4~0 (
+// Location: LABCELL_X17_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qd1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nf1wx4~0_combout  = (\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout )))
+// \soc_inst|m0_1|u_logic|Qd1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qd1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~13_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qd1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .lut_mask = 64'h050A050A050A050A;
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .lut_mask = 64'h000000000000AFAF;
+defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~3 (
+// Location: FF_X17_Y19_N8
+dffeas \soc_inst|m0_1|u_logic|Oir2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Oir2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Oir2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oir2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dy4xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|P82wx4~0_combout  & \soc_inst|m0_1|u_logic|Ns9wx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Gdawx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ) # ((\soc_inst|m0_1|u_logic|P82wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hy0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Dy4xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Oir2z4~q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Oir2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dy4xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~3 .lut_mask = 64'h050A050A676E676E;
-defparam \soc_inst|m0_1|u_logic|N88wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .lut_mask = 64'h0080000000000000;
+defparam \soc_inst|m0_1|u_logic|Dy4xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~4 (
+// Location: FF_X18_Y20_N20
+dffeas \soc_inst|m0_1|u_logic|Gcr2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gcr2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gcr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gcr2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y17_N13
+dffeas \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|N88wx4~3_combout  & ( \soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Nf1wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|Lk9wx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Gcr2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N88wx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gcr2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~4 .lut_mask = 64'h8888000080080000;
-defparam \soc_inst|m0_1|u_logic|N88wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .lut_mask = 64'h00000000000A000C;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~5 (
+// Location: LABCELL_X17_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~5_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|Fuawx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|N88wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|Fuawx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lpv2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Vdr2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N88wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lpv2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vdr2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~5 .lut_mask = 64'hA0A0A0A0ECECECEC;
-defparam \soc_inst|m0_1|u_logic|N88wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .lut_mask = 64'h0030000000220000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~6 (
+// Location: LABCELL_X17_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Wsawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y5zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ksbwx4~0_combout  & (\soc_inst|m0_1|u_logic|Ox1wx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout  & \soc_inst|m0_1|u_logic|N88wx4~5_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Bk33z4~q )) # 
+// (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Ll83z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N88wx4~5_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bk33z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ll83z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~6 .lut_mask = 64'h0000000000000010;
-defparam \soc_inst|m0_1|u_logic|N88wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .lut_mask = 64'h0000000044500000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~14 (
+// Location: LABCELL_X18_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~14_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~17_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Qppvx4~1_combout  & (\soc_inst|m0_1|u_logic|Mdzvx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|N88wx4~1_combout  & \soc_inst|m0_1|u_logic|Cfzvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Kfr2z4~q  & ( \soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kfr2z4~q  & ( !\soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kfr2z4~q  & ( !\soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N88wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N88wx4~17_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kfr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cgu2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~14_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~14 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~14 .lut_mask = 64'h0000000000000001;
-defparam \soc_inst|m0_1|u_logic|N88wx4~14 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .lut_mask = 64'h0808000808000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6cwx4~0 (
+// Location: FF_X15_Y20_N59
+dffeas \soc_inst|m0_1|u_logic|M413z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|M413z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M413z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M413z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X15_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D6cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|T7cwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|T7cwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|S703z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|M413z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M413z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|S703z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D6cwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .lut_mask = 64'hFEC2EF2CCCC0CC0C;
-defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .lut_mask = 64'h08080A0000000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Va3wx4~0 (
+// Location: LABCELL_X17_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Va3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|D6cwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|R6cwx4~5_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|D6cwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|R6cwx4~5_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|D6cwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|R6cwx4~5_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Ze1wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Dy4xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ze1wx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ze1wx4~1_combout  & !\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D6cwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dy4xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ze1wx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ze1wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ze1wx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .lut_mask = 64'h00C400C4000000C4;
-defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y21_N7
-dffeas \soc_inst|m0_1|u_logic|Idk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Idk2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Idk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Idk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ze1wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D47wx4~0 (
+// Location: LABCELL_X23_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D47wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & \soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Ejawx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ab9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y29wx4~combout ) # (\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ab9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D47wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ejawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D47wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D47wx4~0 .lut_mask = 64'h0000000000010001;
-defparam \soc_inst|m0_1|u_logic|D47wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .lut_mask = 64'hF5F5F5F500000000;
+defparam \soc_inst|m0_1|u_logic|Ejawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zxpvx4~0 (
+// Location: LABCELL_X17_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejawx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zxpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|P37wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D47wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|P37wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D47wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ejawx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ejawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( (((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Ze1wx4~5_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ejawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( ((\soc_inst|m0_1|u_logic|Kcdwx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Mddwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D47wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|P37wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kcdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mddwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ejawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .lut_mask = 64'h00000000A8AAAAAA;
-defparam \soc_inst|m0_1|u_logic|Zxpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .lut_mask = 64'h0000773300007F3F;
+defparam \soc_inst|m0_1|u_logic|Ejawx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S17wx4~0 (
+// Location: FF_X33_Y18_N56
+dffeas \soc_inst|m0_1|u_logic|Fhx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fhx2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fhx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fhx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S17wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & !\soc_inst|m0_1|u_logic|Zwcvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|Phh2z4~1_combout  & \soc_inst|m0_1|u_logic|Zwcvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Ekhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~81_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Fhx2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~81_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fhx2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Phh2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zwcvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fhx2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~81_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ekhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S17wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S17wx4~0 .lut_mask = 64'h00F000F00F000F00;
-defparam \soc_inst|m0_1|u_logic|S17wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .lut_mask = 64'h88AA88AA80A280A2;
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhnvx4~0 (
+// Location: LABCELL_X33_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rhnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q  & (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & \soc_inst|m0_1|u_logic|Wspvx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wspvx4~combout  & ((!\soc_inst|m0_1|u_logic|Idk2z4~q ) # (!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ekhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~13_sumout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~13_sumout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wspvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ekhvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rhnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .lut_mask = 64'h00FC00FC000C000C;
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .lut_mask = 64'h00A800A800FC00FC;
+defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhnvx4~1 (
+// Location: FF_X33_Y18_N55
+dffeas \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L4jvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rhnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rhnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # ((!\soc_inst|m0_1|u_logic|X4pvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|K0qvx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rhnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & ((!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|X4pvx4~combout  & !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (((!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|L4jvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dkr2z4~q  & ( \soc_inst|m0_1|u_logic|Cqovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( \soc_inst|m0_1|u_logic|Cqovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dkr2z4~q  & ( !\soc_inst|m0_1|u_logic|Cqovx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( !\soc_inst|m0_1|u_logic|Cqovx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rhnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .lut_mask = 64'hFB8BFBFB00000000;
-defparam \soc_inst|m0_1|u_logic|Rhnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .lut_mask = 64'h00CFFFCF008AAA8A;
+defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y21_N8
-dffeas \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE (
+// Location: FF_X23_Y12_N32
+dffeas \soc_inst|m0_1|u_logic|Dkr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rhnvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Dkr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dkr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dkr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnawx4~0 (
+// Location: LABCELL_X19_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ra1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & !\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Whh2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dkr2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|I3a2z4~3_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Dkr2z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dkr2z4~q 
+// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dkr2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|I3a2z4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mnawx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .lut_mask = 64'hF5A05500FD645544;
-defparam \soc_inst|m0_1|u_logic|Mnawx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .lut_mask = 64'hEE44FF55EE44FA50;
+defparam \soc_inst|m0_1|u_logic|Ra1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y17_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C3qvx4~0 (
+// Location: LABCELL_X16_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ya1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C3qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mnawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Izpvx4~combout  & ((!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mnawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ya1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ciawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mnawx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ya1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .lut_mask = 64'h00000000EEEE0E0E;
-defparam \soc_inst|m0_1|u_logic|C3qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .lut_mask = 64'h003C003CC3FFC3FF;
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~15 (
+// Location: MLABCELL_X21_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ya1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~15_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Va3wx4~0_combout  & (\soc_inst|m0_1|u_logic|Yqzvx4~0_combout  & \soc_inst|m0_1|u_logic|I30wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ya1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ya1wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ya1wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pdi2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ya1wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~15_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~15 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~15 .lut_mask = 64'h0000000000050005;
-defparam \soc_inst|m0_1|u_logic|N88wx4~15 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .lut_mask = 64'h000088F80000FFFF;
+defparam \soc_inst|m0_1|u_logic|Ya1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~16 (
+// Location: LABCELL_X17_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N88wx4~16_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~15_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~14_combout  & (((\soc_inst|m0_1|u_logic|N88wx4~0_combout  & \soc_inst|m0_1|u_logic|Do8wx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) )
+// \soc_inst|m0_1|u_logic|B91wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hc1wx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # ((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hc1wx4~combout ))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Hc1wx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N88wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Do8wx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N88wx4~14_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~15_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B91wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N88wx4~16 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N88wx4~16 .lut_mask = 64'h0000000000370037;
-defparam \soc_inst|m0_1|u_logic|N88wx4~16 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~1 .lut_mask = 64'h3075303075303030;
+defparam \soc_inst|m0_1|u_logic|B91wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~7 (
+// Location: LABCELL_X27_Y21_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z78wx4~7_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Z78wx4~6_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ) # (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|B91wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|B91wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|B91wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Add5~17_sumout  & ( (!\soc_inst|m0_1|u_logic|B91wx4~1_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B91wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z78wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B91wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .lut_mask = 64'hDDDDDDDD88888888;
-defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~2 .lut_mask = 64'h8888888800008888;
+defparam \soc_inst|m0_1|u_logic|B91wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9zvx4~0 (
+// Location: LABCELL_X27_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B91wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((\soc_inst|m0_1|u_logic|K0qvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|O7zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & 
-// ((\soc_inst|m0_1|u_logic|K0qvx4~combout ) # (\soc_inst|m0_1|u_logic|O7zvx4~combout )))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (((\soc_inst|m0_1|u_logic|K0qvx4~combout )) # (\soc_inst|m0_1|u_logic|O7zvx4~combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|O7zvx4~combout  & !\soc_inst|m0_1|u_logic|K0qvx4~combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & ((\soc_inst|m0_1|u_logic|K0qvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|O7zvx4~combout )))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|O7zvx4~combout  & (!\soc_inst|m0_1|u_logic|K0qvx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|B91wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ( \soc_inst|m0_1|u_logic|B91wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout  & (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & ( \soc_inst|m0_1|u_logic|B91wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Mb1wx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z78wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B91wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .lut_mask = 64'h103A1010153F1515;
-defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B91wx4~0 .lut_mask = 64'h000000000A0A0002;
+defparam \soc_inst|m0_1|u_logic|B91wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y21_N26
-dffeas \soc_inst|m0_1|u_logic|Igi2z4 (
+// Location: FF_X18_Y18_N25
+dffeas \soc_inst|m0_1|u_logic|Lqr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Igi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lqr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Igi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Igi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lqr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lqr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Velvx4~1 (
+// Location: LABCELL_X18_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Velvx4~1_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( (!\soc_inst|m0_1|u_logic|Velvx4~0_combout  & (\soc_inst|m0_1|u_logic|Igi2z4~q  & 
-// !\soc_inst|m0_1|u_logic|R1pvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( (!\soc_inst|m0_1|u_logic|Velvx4~0_combout  & !\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( (!\soc_inst|m0_1|u_logic|Velvx4~0_combout  & \soc_inst|m0_1|u_logic|Igi2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( !\soc_inst|m0_1|u_logic|Velvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Lqr2z4~q  & ( \soc_inst|m0_1|u_logic|Neu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lqr2z4~q  & ( !\soc_inst|m0_1|u_logic|Neu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lqr2z4~q  & ( !\soc_inst|m0_1|u_logic|Neu2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Velvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Lqr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Neu2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Velvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Velvx4~1 .lut_mask = 64'hAAAA2222A0A02020;
-defparam \soc_inst|m0_1|u_logic|Velvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .lut_mask = 64'h0088000800800000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y16_N43
-dffeas \soc_inst|m0_1|u_logic|Rhi2z4 (
+// Location: LABCELL_X16_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Hc1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|E163z4~q  & ( \soc_inst|m0_1|u_logic|Cq93z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|E163z4~q  & ( !\soc_inst|m0_1|u_logic|Cq93z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E163z4~q  & ( !\soc_inst|m0_1|u_logic|Cq93z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|E163z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cq93z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .lut_mask = 64'h0003000100020000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X19_Y14_N26
+dffeas \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rhi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rhi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~4 (
+// Location: LABCELL_X12_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~4_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Gto2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rhi2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wnv2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wnv2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Gto2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rhi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wnv2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .lut_mask = 64'hA000080800000000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .lut_mask = 64'h4040040000000400;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y19_N59
-dffeas \soc_inst|m0_1|u_logic|Vuo2z4 (
+// Location: FF_X13_Y18_N40
+dffeas \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vuo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vuo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vuo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X30_Y23_N50
-dffeas \soc_inst|m0_1|u_logic|Mi13z4 (
+// Location: FF_X23_Y18_N8
+dffeas \soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mi13z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mi13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mi13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~1 (
+// Location: LABCELL_X17_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vuo2z4~q  & ( \soc_inst|m0_1|u_logic|Mi13z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vuo2z4~q  & ( !\soc_inst|m0_1|u_logic|Mi13z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vuo2z4~q  & ( !\soc_inst|m0_1|u_logic|Mi13z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  $ 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vuo2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mi13z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .lut_mask = 64'h6000400020000000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .lut_mask = 64'h8800008000000080;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y25_N28
-dffeas \soc_inst|m0_1|u_logic|Na53z4~DUPLICATE (
+// Location: FF_X19_Y14_N7
+dffeas \soc_inst|m0_1|u_logic|O2g3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Na53z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|O2g3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Na53z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|O2g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O2g3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~3 (
+// Location: LABCELL_X18_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X94xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Vr23z4~q  & ( \soc_inst|m0_1|u_logic|Na53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Vr23z4~q  & ( !\soc_inst|m0_1|u_logic|Na53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vr23z4~q  & ( !\soc_inst|m0_1|u_logic|Na53z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|X94xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|O2g3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vr23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Na53z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O2g3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X94xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .lut_mask = 64'h0022000200200000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X94xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X94xx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|X94xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~6 (
+// Location: FF_X16_Y18_N49
+dffeas \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|B91wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|O7zvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|O7zvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~2_combout  & (!\soc_inst|m0_1|u_logic|O7zvx4~5_combout  & 
-// !\soc_inst|m0_1|u_logic|O7zvx4~4_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Vxf3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vxf3z4~q  & 
+// \soc_inst|m0_1|u_logic|Svk2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O7zvx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O7zvx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O7zvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O7zvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vxf3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .lut_mask = 64'hA000000000000000;
-defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .lut_mask = 64'h0540004000000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4 (
+// Location: LABCELL_X17_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O7zvx4~combout  = ( \soc_inst|m0_1|u_logic|O7zvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~0_combout  & (\soc_inst|m0_1|u_logic|O7zvx4~8_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|X94xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hc1wx4~4_combout  & (!\soc_inst|m0_1|u_logic|Hc1wx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Hc1wx4~3_combout  & !\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O7zvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O7zvx4~8_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hc1wx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hc1wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hc1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X94xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O7zvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O7zvx4 .lut_mask = 64'h0000000000A200A2;
-defparam \soc_inst|m0_1|u_logic|O7zvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F6zvx4~0 (
+// Location: LABCELL_X18_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hc1wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F6zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C8zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|L9zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|O7zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C8zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|L9zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O7zvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hc1wx4~combout  = ( \soc_inst|m0_1|u_logic|Hc1wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~5_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~5_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L9zvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F6zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .lut_mask = 64'h00000000BBBBB0B0;
-defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hc1wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Hc1wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F6zvx4~1 (
+// Location: LABCELL_X35_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[13]~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F6zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (\soc_inst|m0_1|u_logic|F6zvx4~0_combout  & (\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|R7iwx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (\soc_inst|m0_1|u_logic|F6zvx4~0_combout  & (\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  = ( \soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|F6zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .lut_mask = 64'h0300030001000100;
-defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y22_N2
-dffeas \soc_inst|m0_1|u_logic|Fxu2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fxu2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fxu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fxu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .lut_mask = 64'h3333333300FF00FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[13]~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~3 (
+// Location: LABCELL_X35_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4g3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Saqwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Gto2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fxu2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|D4g3z4~0_combout  = ( \soc_inst|m0_1|u_logic|Zyovx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & (!\soc_inst|m0_1|u_logic|J6i2z4~q )) # (\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & 
+// ((\soc_inst|m0_1|u_logic|D4g3z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Zyovx4~combout  & ( \soc_inst|m0_1|u_logic|D4g3z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fxu2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gto2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zyovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Saqwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .lut_mask = 64'h0000000032020000;
-defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .lut_mask = 64'h00FF00FFA0AFA0AF;
+defparam \soc_inst|m0_1|u_logic|D4g3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y21_N38
-dffeas \soc_inst|m0_1|u_logic|Uu83z4 (
+// Location: FF_X35_Y18_N29
+dffeas \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|D4g3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uu83z4~q ),
+	.q(\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uu83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uu83z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~1 (
+// Location: MLABCELL_X34_Y22_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Geuwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Saqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Uu83z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Rro2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Geuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rro2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uu83z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Saqwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Geuwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .lut_mask = 64'h0000101000001100;
-defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y19_N8
-dffeas \soc_inst|m0_1|u_logic|Wj63z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wj63z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wj63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wj63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .lut_mask = 64'h030303030303FFFF;
+defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~0 (
+// Location: LABCELL_X31_Y22_N36
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[13]~27 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Saqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wj63z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vuo2z4~q )) ) ) )
+// \soc_inst|interconnect_1|HRDATA[13]~27_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & !\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wj63z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vuo2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Saqwx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .lut_mask = 64'h5000000040400000;
-defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y19_N19
-dffeas \soc_inst|m0_1|u_logic|Ft73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ft73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ft73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ft73z4 .power_up = "low";
+defparam \soc_inst|interconnect_1|HRDATA[13]~27 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[13]~27 .lut_mask = 64'h88888888BBBBBBBB;
+defparam \soc_inst|interconnect_1|HRDATA[13]~27 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~2 (
+// Location: LABCELL_X30_Y22_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Saqwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wnt2z4~q  & ( \soc_inst|m0_1|u_logic|Ft73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wnt2z4~q  & ( !\soc_inst|m0_1|u_logic|Ft73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wnt2z4~q  & ( !\soc_inst|m0_1|u_logic|Ft73z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Twmwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|T5g3z4~q  & (!\soc_inst|m0_1|u_logic|B7owx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~q )))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|T5g3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~q ))) ) ) ) # ( \soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~q ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|K7g3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wnt2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ft73z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T5g3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Saqwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Twmwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .lut_mask = 64'h000A000200080000;
-defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .lut_mask = 64'hFF55F05033113010;
+defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4 (
+// Location: LABCELL_X30_Y22_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Saqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Saqwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Saqwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Saqwx4~1_combout  & !\soc_inst|m0_1|u_logic|Saqwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Twmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yxdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yxdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Jtdwx4~1_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Saqwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Saqwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Saqwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Saqwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Twmwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Twmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Saqwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Saqwx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Saqwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .lut_mask = 64'h00000000AAEEBBFF;
+defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kepwx4~0 (
+// Location: LABCELL_X33_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kepwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Saqwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Kzqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U5pwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jjuwx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzqvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .lut_mask = 64'h5555555500FF00FF;
-defparam \soc_inst|m0_1|u_logic|Kepwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .lut_mask = 64'hFF00FF00F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Beowx4~1 (
+// Location: LABCELL_X35_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Beowx4~1_combout  = ( \soc_inst|m0_1|u_logic|Beowx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kepwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Beowx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & \soc_inst|m0_1|u_logic|Kepwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kzqvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Viuwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pazwx4~combout  & (!\soc_inst|m0_1|u_logic|Arzwx4~1_combout  & !\soc_inst|m0_1|u_logic|B6pwx4~4_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Viuwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Pazwx4~combout  & !\soc_inst|m0_1|u_logic|Arzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~4_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kepwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Beowx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Beowx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Beowx4~1 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Beowx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .lut_mask = 64'hC0FFC0FFC000C000;
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7ewx4~0 (
+// Location: LABCELL_X33_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X7ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( \soc_inst|m0_1|u_logic|Beowx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Jiowx4~1_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( \soc_inst|m0_1|u_logic|Beowx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Jiowx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Beowx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Jiowx4~1_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout 
-// ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Beowx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Jiowx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kzqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzqvx4~2_combout  & ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & !\soc_inst|m0_1|u_logic|E5owx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kzqvx4~2_combout  & ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout  & (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & !\soc_inst|m0_1|u_logic|E5owx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kzqvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & !\soc_inst|m0_1|u_logic|E5owx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jiowx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Beowx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .lut_mask = 64'h1B0A2A085F4E7F5D;
-defparam \soc_inst|m0_1|u_logic|X7ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .lut_mask = 64'h0A00000008000800;
+defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsmwx4~1 (
+// Location: LABCELL_X30_Y22_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lsmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wbk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Lsmwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wbk2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Twmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Twmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Geuwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Twmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Geuwx4~0_combout  & !\soc_inst|m0_1|u_logic|Wfuwx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Geuwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Twmwx4~1_combout ),
 	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lsmwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .lut_mask = 64'h0000FE000000FEFE;
-defparam \soc_inst|m0_1|u_logic|Lsmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .lut_mask = 64'h3230323032323232;
+defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uf1wx4~0 (
+// Location: LABCELL_X27_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mb1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uf1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Imnwx4~combout  & ( \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pmnwx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Imnwx4~combout  & ( \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pmnwx4~combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Imnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Pmnwx4~combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Imnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pmnwx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mb1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ) # 
+// (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uf1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mb1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .lut_mask = 64'h002A2A2A003F3F3F;
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .lut_mask = 64'hFF555555FF000000;
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uf1wx4~1 (
+// Location: LABCELL_X27_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mb1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uf1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Uf1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mb1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Mb1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Mb1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Imnwx4~combout ) # (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uf1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mb1wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .lut_mask = 64'h000050510000F0F3;
-defparam \soc_inst|m0_1|u_logic|Uf1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .lut_mask = 64'h113355FF00000000;
+defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekhvx4~1 (
+// Location: LABCELL_X29_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nehvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ekhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Uf1wx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( (\soc_inst|m0_1|u_logic|Ekhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Nehvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~17_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tme3z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add2~109_sumout ) # ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tme3z4~q )))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ekhvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~109_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nehvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .lut_mask = 64'h80808880C4C4CCC4;
+defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nehvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nehvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nehvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nehvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .lut_mask = 64'h0C0F0C0F080A080A;
-defparam \soc_inst|m0_1|u_logic|Ekhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .lut_mask = 64'h00000000FF00FFF1;
+defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y21_N25
-dffeas \soc_inst|m0_1|u_logic|Fhx2z4 (
+// Location: FF_X29_Y16_N28
+dffeas \soc_inst|m0_1|u_logic|Tme3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ekhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -68884,45 +68912,45 @@ dffeas \soc_inst|m0_1|u_logic|Fhx2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fhx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tme3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fhx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fhx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tme3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tme3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y14_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L4jvx4~0 (
+// Location: LABCELL_X23_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9jvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L4jvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dkr2z4~q  & ( \soc_inst|m0_1|u_logic|Cqovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( \soc_inst|m0_1|u_logic|Cqovx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dkr2z4~q  & ( !\soc_inst|m0_1|u_logic|Cqovx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( !\soc_inst|m0_1|u_logic|Cqovx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fhx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|A9jvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q ))) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fhx2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .lut_mask = 64'h2323EFEF2300EF00;
-defparam \soc_inst|m0_1|u_logic|L4jvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .lut_mask = 64'h00BBFFBB00B0F0B0;
+defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y14_N49
-dffeas \soc_inst|m0_1|u_logic|Dkr2z4 (
+// Location: FF_X23_Y18_N7
+dffeas \soc_inst|m0_1|u_logic|Slr2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|L4jvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -68931,4724 +68959,4560 @@ dffeas \soc_inst|m0_1|u_logic|Dkr2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Slr2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dkr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dkr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Slr2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Slr2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~7 (
+// Location: LABCELL_X18_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ty92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|T263z4~q  & ( \soc_inst|m0_1|u_logic|Dkr2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T263z4~q  & ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T263z4~q  & ( !\soc_inst|m0_1|u_logic|Dkr2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ty92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|F4q2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T263z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dkr2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|F4q2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ty92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .lut_mask = 64'h8004800000040000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .lut_mask = 64'h1000000000000000;
+defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4~8 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Ze1wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Ze1wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Cc73z4~q ))) # (\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cc73z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cc73z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ze1wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~7_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X18_Y15_N32
+dffeas \soc_inst|m0_1|u_logic|U5q2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U5q2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .lut_mask = 64'hAF23000000000000;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U5q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5q2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ze1wx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ze1wx4~combout  = ( \soc_inst|m0_1|u_logic|Ze1wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ze1wx4~5_combout  ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ze1wx4~5_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ze1wx4~8_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X15_Y18_N26
+dffeas \soc_inst|m0_1|u_logic|Xg33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xg33z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ze1wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ze1wx4 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|Ze1wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xg33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xg33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nf1wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nf1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ 
-// (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nf1wx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X15_Y18_N44
+dffeas \soc_inst|m0_1|u_logic|O723z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|O723z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .lut_mask = 64'hEBEBBE82EBEB0000;
-defparam \soc_inst|m0_1|u_logic|Nf1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O723z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O723z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qd1wx4~0 (
+// Location: MLABCELL_X15_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qd1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nf1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ze1wx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ww92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|O723z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Xg33z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nf1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xg33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O723z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qd1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ww92z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .lut_mask = 64'h0000AAFF00000000;
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .lut_mask = 64'h00000000C0A00000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qd1wx4~1 (
+// Location: LABCELL_X16_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qd1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~13_sumout  & ( \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & \soc_inst|m0_1|u_logic|Qd1wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~13_sumout  & ( \soc_inst|m0_1|u_logic|Uf1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qd1wx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ww92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Gq43z4~q  & ( \soc_inst|m0_1|u_logic|Pz53z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Gq43z4~q  & ( !\soc_inst|m0_1|u_logic|Pz53z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gq43z4~q  & ( !\soc_inst|m0_1|u_logic|Pz53z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qd1wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uf1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Gq43z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pz53z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ww92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .lut_mask = 64'h0000000000FF000F;
-defparam \soc_inst|m0_1|u_logic|Qd1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .lut_mask = 64'h0500010004000000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y24_N35
-dffeas \soc_inst|m0_1|u_logic|Lpv2z4 (
+// Location: FF_X12_Y18_N43
+dffeas \soc_inst|m0_1|u_logic|X213z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lpv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lpv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lpv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X213z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X213z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y22_N52
-dffeas \soc_inst|m0_1|u_logic|Vdr2z4 (
+// Location: FF_X15_Y16_N8
+dffeas \soc_inst|m0_1|u_logic|D603z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vdr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|D603z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vdr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vdr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D603z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D603z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~3 (
+// Location: MLABCELL_X15_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2wwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Vdr2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Lpv2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ww92z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|D603z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lpv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vdr2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|D603z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2wwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ww92z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .lut_mask = 64'h0000000032020000;
-defparam \soc_inst|m0_1|u_logic|H2wwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .lut_mask = 64'h00AC000000000000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~2 (
+// Location: LABCELL_X18_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2wwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ll83z4~q  & ( \soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q 
-//  & \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll83z4~q  & ( !\soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll83z4~q  & ( !\soc_inst|m0_1|u_logic|Cgu2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ww92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ww92z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ww92z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ty92z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ww92z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5q2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ll83z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cgu2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ty92z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U5q2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ww92z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ww92z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ww92z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2wwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ww92z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .lut_mask = 64'h0050004000100000;
-defparam \soc_inst|m0_1|u_logic|H2wwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y18_N55
-dffeas \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .lut_mask = 64'h8C00000000000000;
+defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~1 (
+// Location: LABCELL_X18_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C61wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2wwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rr93z4~q  & ( \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  
-// & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rr93z4~q  & ( !\soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rr93z4~q  & ( !\soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|C61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|J7q2z4~q  & !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|J7q2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|J7q2z4~q ) 
+// # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Slr2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|J7q2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rr93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ww92z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2wwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .lut_mask = 64'h0003000200010000;
-defparam \soc_inst|m0_1|u_logic|H2wwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y24_N44
-dffeas \soc_inst|m0_1|u_logic|Kfr2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qd1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kfr2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kfr2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X25_Y22_N28
-dffeas \soc_inst|m0_1|u_logic|Cc73z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cc73z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cc73z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cc73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C61wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C61wx4~0 .lut_mask = 64'hACAFACAFACAFACA0;
+defparam \soc_inst|m0_1|u_logic|C61wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y24_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4~0 (
+// Location: LABCELL_X12_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J61wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2wwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cc73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Kfr2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cc73z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Kfr2z4~q ) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|J61wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|Mgawx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( (\soc_inst|m0_1|u_logic|Mgawx4~1_combout ) # (\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout  & !\soc_inst|m0_1|u_logic|Mgawx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kfr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cc73z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2wwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J61wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .lut_mask = 64'h000080A000008000;
-defparam \soc_inst|m0_1|u_logic|H2wwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J61wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J61wx4~1 .lut_mask = 64'h50505F5F0505F5F5;
+defparam \soc_inst|m0_1|u_logic|J61wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H2wwx4 (
+// Location: MLABCELL_X21_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J61wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H2wwx4~combout  = ( !\soc_inst|m0_1|u_logic|H2wwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H2wwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H2wwx4~3_combout  & !\soc_inst|m0_1|u_logic|H2wwx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|J61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|C61wx4~0_combout  & ( \soc_inst|m0_1|u_logic|J61wx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|C61wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|J61wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & !\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pdi2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H2wwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H2wwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|H2wwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|H2wwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J61wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H2wwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H2wwx4 .lut_mask = 64'hC0C0000000000000;
-defparam \soc_inst|m0_1|u_logic|H2wwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J61wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J61wx4~0 .lut_mask = 64'h0000C0EA0000FFFF;
+defparam \soc_inst|m0_1|u_logic|J61wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zndwx4~0 (
+// Location: MLABCELL_X15_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O51wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zndwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|H2wwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|H2wwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|O51wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgawx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .lut_mask = 64'h000F000FF0FFF0FF;
-defparam \soc_inst|m0_1|u_logic|Zndwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O51wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O51wx4~0 .lut_mask = 64'h50505050A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|O51wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nodwx4~0 (
+// Location: LABCELL_X18_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M41wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nodwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pybwx4~combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+// \soc_inst|m0_1|u_logic|M41wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|S71wx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|O51wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|O51wx4~0_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M41wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Nodwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M41wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M41wx4~0 .lut_mask = 64'hE0E0E0E000E000E0;
+defparam \soc_inst|m0_1|u_logic|M41wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zndwx4~1 (
+// Location: LABCELL_X16_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M41wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zndwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zndwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nodwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Zndwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|M41wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J61wx4~0_combout  & (\soc_inst|m0_1|u_logic|M41wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~61_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zndwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|M41wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .lut_mask = 64'h4444444477777777;
-defparam \soc_inst|m0_1|u_logic|Zndwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M41wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M41wx4~1 .lut_mask = 64'h0000000020222022;
+defparam \soc_inst|m0_1|u_logic|M41wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cymwx4~3 (
+// Location: FF_X13_Y18_N19
+dffeas \soc_inst|m0_1|u_logic|B1q2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B1q2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B1q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B1q2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y17_N31
+dffeas \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X13_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cymwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cymwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cymwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cymwx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Zndwx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & \soc_inst|m0_1|u_logic|Cymwx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|B1q2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cymwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|B1q2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .lut_mask = 64'h00AA00FF00AF00AF;
-defparam \soc_inst|m0_1|u_logic|Cymwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~1 .lut_mask = 64'h0044005000000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y14_N19
-dffeas \soc_inst|m0_1|u_logic|Ieh3z4 (
+// Location: FF_X12_Y18_N44
+dffeas \soc_inst|m0_1|u_logic|X213z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ieh3z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ieh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|X213z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ieh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ieh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X213z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X213z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: IOIBUF_X16_Y0_N18
-cyclonev_io_ibuf \SW[5]~input (
-	.i(SW[5]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[5]~input_o ));
+// Location: LABCELL_X12_Y18_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S71wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|D603z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|X213z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|D603z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|X213z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \SW[5]~input .bus_hold = "false";
-defparam \SW[5]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|S71wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~2 .lut_mask = 64'h0000C0000000A000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y15_N43
-dffeas \soc_inst|switches_1|switch_store[1][5] (
+// Location: FF_X18_Y17_N40
+dffeas \soc_inst|m0_1|u_logic|No93z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\SW[5]~input_o ),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][5]~q ),
+	.q(\soc_inst|m0_1|u_logic|No93z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][5] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][5] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|No93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|No93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N33
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[21]~24 (
+// Location: LABCELL_X13_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~3 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[21]~24_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( (\soc_inst|ram_1|write_cycle~q  & ((!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ))) ) ) 
-// # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout )) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~3_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Mzp2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|No93z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ),
+	.dataa(!\soc_inst|m0_1|u_logic|No93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mzp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[21]~24_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[21]~24 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[21]~24 .lut_mask = 64'h1100110055445544;
-defparam \soc_inst|ram_1|data_to_memory[21]~24 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~3 .lut_mask = 64'h00000000000000E2;
+defparam \soc_inst|m0_1|u_logic|S71wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y18_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[21]~24_combout ,\soc_inst|ram_1|data_to_memory[5]~23_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X17_Y20_N7
+dffeas \soc_inst|m0_1|u_logic|Q2q2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Q2q2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_bit_number = 5;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_bit_number = 5;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001C30C0015018000014005000001555555555555552000000505550000000000001550";
+defparam \soc_inst|m0_1|u_logic|Q2q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Q2q2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N33
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[5]~23 (
+// Location: LABCELL_X13_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~4 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[5]~23_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ycu2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Q2q2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [0]),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|write_cycle~q ),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ycu2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q2q2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[5]~23_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[5]~23 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[5]~23 .lut_mask = 64'h0055000000FF00AA;
-defparam \soc_inst|ram_1|data_to_memory[5]~23 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~4 .lut_mask = 64'h3000202000000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N36
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[21]~29 (
+// Location: LABCELL_X13_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R21xx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[21]~29_combout  = ( \soc_inst|interconnect_1|HRDATA[16]~7_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ))) # 
-// (\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|switches_1|switch_store[1][5]~q )) ) ) # ( !\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) )
+// \soc_inst|m0_1|u_logic|R21xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|U5q2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|switches_1|switch_store[1][5]~q ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|U5q2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R21xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[21]~29 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[21]~29 .lut_mask = 64'hCCCCCCCC05F505F5;
-defparam \soc_inst|interconnect_1|HRDATA[21]~29 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R21xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R21xx4~0 .lut_mask = 64'h4000000000000000;
+defparam \soc_inst|m0_1|u_logic|R21xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jymwx4~0 (
+// Location: MLABCELL_X15_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jymwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (\soc_inst|m0_1|u_logic|Ogo2z4~q  & (!\soc_inst|m0_1|u_logic|B7owx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (\soc_inst|m0_1|u_logic|Ogo2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Ieh3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hi83z4~q  & ( \soc_inst|m0_1|u_logic|Xg33z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hi83z4~q  & ( !\soc_inst|m0_1|u_logic|Xg33z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hi83z4~q  & ( !\soc_inst|m0_1|u_logic|Xg33z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ieh3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hi83z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xg33z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jymwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .lut_mask = 64'hAAFF2233A0F02030;
-defparam \soc_inst|m0_1|u_logic|Jymwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~0 .lut_mask = 64'h0202020000020000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jymwx4~1 (
+// Location: LABCELL_X13_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jymwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jymwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Gvdwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Jymwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Gvdwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|R21xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S71wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S71wx4~1_combout  & (!\soc_inst|m0_1|u_logic|S71wx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|S71wx4~3_combout  & !\soc_inst|m0_1|u_logic|S71wx4~4_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jymwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S71wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S71wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S71wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S71wx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R21xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .lut_mask = 64'h00000000CFCCCFFF;
-defparam \soc_inst|m0_1|u_logic|Jymwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|S71wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qe0wx4~0 (
+// Location: LABCELL_X13_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S71wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qe0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( \soc_inst|m0_1|u_logic|W6iwx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|S71wx4~combout  = ( \soc_inst|m0_1|u_logic|S71wx4~8_combout  & ( \soc_inst|m0_1|u_logic|S71wx4~5_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S71wx4~5_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S71wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S71wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .lut_mask = 64'hCCFFCCCC00FF0000;
-defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S71wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|S71wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qe0wx4 (
+// Location: LABCELL_X36_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qe0wx4~combout  = ( \soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Qe0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Qe0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~2_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|S71wx4~combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~combout  & \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|S71wx4~combout ) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~combout  & \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qe0wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qe0wx4 .lut_mask = 64'h3F003F3F00000000;
-defparam \soc_inst|m0_1|u_logic|Qe0wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .lut_mask = 64'h0A0A0C0F0A0A0C00;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Je0wx4~0 (
+// Location: FF_X35_Y20_N26
+dffeas \soc_inst|m0_1|u_logic|Lhd3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lhd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lhd3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Je0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|U6awx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Repwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kop2z4~q  & ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & ((\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|B1a3z4~q )))) # (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Mjl2z4~q  & ((!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kop2z4~q  & ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & 
+// ( (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mjl2z4~q  & \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Je0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Repwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .lut_mask = 64'hFFC3EB28FFC30000;
-defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~0 .lut_mask = 64'h0044000000001988;
+defparam \soc_inst|m0_1|u_logic|Repwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mc0wx4~1 (
+// Location: LABCELL_X30_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mc0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Je0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ce0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Je0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ce0wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Repwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Repwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E0uvx4~combout  & ((!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Aqp2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|E0uvx4~combout  & (!\soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Aqp2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Je0wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Repwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mc0wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Repwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .lut_mask = 64'h0000CC4400000C04;
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~1 .lut_mask = 64'hFAC8FAC800000000;
+defparam \soc_inst|m0_1|u_logic|Repwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mc0wx4~0 (
+// Location: LABCELL_X31_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Repwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mc0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qe0wx4~combout  & ( \soc_inst|m0_1|u_logic|Mc0wx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Repwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Repwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qwowx4~combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Qwowx4~combout  & (!\soc_inst|m0_1|u_logic|Lns2z4~q  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Repwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Repwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .lut_mask = 64'h000000000000777F;
-defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y20_N31
-dffeas \soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Repwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Repwx4~2 .lut_mask = 64'h00000000FCA8FCA8;
+defparam \soc_inst|m0_1|u_logic|Repwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~1 (
+// Location: LABCELL_X30_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ncpwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9uwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Anq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  
-// & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Anq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Anq2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ncpwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Repwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|N1uvx4~combout  & (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|Lhd3z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Repwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Anq2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhd3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Repwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9uwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ncpwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .lut_mask = 64'h0011001000010000;
-defparam \soc_inst|m0_1|u_logic|D9uwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y25_N40
-dffeas \soc_inst|m0_1|u_logic|B5u2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B5u2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B5u2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B5u2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B5u2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .lut_mask = 64'h3333333301010101;
+defparam \soc_inst|m0_1|u_logic|Ncpwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y25_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~2 (
+// Location: LABCELL_X30_Y14_N45
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[30]~34 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9uwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ka83z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|B5u2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|interconnect_1|HRDATA[30]~34_combout  = ( \soc_inst|interconnect_1|HRDATA[26]~0_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  ) ) # ( !\soc_inst|interconnect_1|HRDATA[26]~0_combout  & ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[26]~0_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30  & ( 
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ka83z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|B5u2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a30 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9uwx4~2_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .lut_mask = 64'h0000300000002200;
-defparam \soc_inst|m0_1|u_logic|D9uwx4~2 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[30]~34 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[30]~34 .lut_mask = 64'hF0F00000F0F0FFFF;
+defparam \soc_inst|interconnect_1|HRDATA[30]~34 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y24_N17
-dffeas \soc_inst|m0_1|u_logic|Kev2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kev2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X29_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J7ewx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|J7ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Xmdwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ((\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Xuxwx4~combout  & (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & (((\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Xuxwx4~combout )))) # (\soc_inst|m0_1|u_logic|Kepwx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & (\soc_inst|m0_1|u_logic|Kepwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout  $ (\soc_inst|m0_1|u_logic|Xuxwx4~combout ))))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kepwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kev2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kev2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .lut_mask = 64'h0F0F0F2E0FAA0F8B;
+defparam \soc_inst|m0_1|u_logic|J7ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~3 (
+// Location: LABCELL_X30_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9uwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Poq2z4~q  & ( \soc_inst|m0_1|u_logic|Kev2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Poq2z4~q  & ( !\soc_inst|m0_1|u_logic|Kev2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Poq2z4~q  & ( !\soc_inst|m0_1|u_logic|Kev2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|A9iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[30]~34_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|J7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[30]~34_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Poq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kev2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ncpwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9uwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .lut_mask = 64'h0030001000200000;
-defparam \soc_inst|m0_1|u_logic|D9uwx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y25_N10
-dffeas \soc_inst|m0_1|u_logic|B173z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B173z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B173z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B173z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .lut_mask = 64'hA080A080AA88AA88;
+defparam \soc_inst|m0_1|u_logic|A9iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y24_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4~0 (
+// Location: LABCELL_X31_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E9zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9uwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Eqq2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|B173z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|E9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & \soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & \soc_inst|m0_1|u_logic|V9iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eqq2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|B173z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9uwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E9zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .lut_mask = 64'h2230000000000000;
-defparam \soc_inst|m0_1|u_logic|D9uwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .lut_mask = 64'h0FAF0FAF00AA00AA;
+defparam \soc_inst|m0_1|u_logic|E9zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9uwx4 (
+// Location: LABCELL_X29_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E9zvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9uwx4~combout  = ( !\soc_inst|m0_1|u_logic|D9uwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D9uwx4~1_combout  & (!\soc_inst|m0_1|u_logic|D9uwx4~2_combout  & !\soc_inst|m0_1|u_logic|D9uwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|E9zvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|E9zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|E9zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D9uwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|D9uwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D9uwx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D9uwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|E9zvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9uwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9uwx4 .lut_mask = 64'hA000A00000000000;
-defparam \soc_inst|m0_1|u_logic|D9uwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .lut_mask = 64'h0AAA00000FFF0000;
+defparam \soc_inst|m0_1|u_logic|E9zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtdwx4~0 (
+// Location: MLABCELL_X39_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qtdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( (\soc_inst|m0_1|u_logic|D9uwx4~combout ) # (\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & \soc_inst|m0_1|u_logic|D9uwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Add2~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~22  ))
+// \soc_inst|m0_1|u_logic|Add2~10  = CARRY(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~22  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~22 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~9_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~10 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~9 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Thhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add2~9_sumout  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~9_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Thhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .lut_mask = 64'h00F000F00FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .lut_mask = 64'h00005555CCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtdwx4~1 (
+// Location: LABCELL_X23_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qtdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jtdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jtdwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Qtdwx4~0_combout  & !\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Thhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Thhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~85_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qtdwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Thhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jtdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Thhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .lut_mask = 64'h0F000F000FFF0FFF;
-defparam \soc_inst|m0_1|u_logic|Qtdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .lut_mask = 64'hCCC0CCC000000000;
+defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: IOIBUF_X4_Y0_N52
-cyclonev_io_ibuf \SW[3]~input (
-	.i(SW[3]),
-	.ibar(gnd),
-	.dynamicterminationcontrol(gnd),
-	.o(\SW[3]~input_o ));
+// Location: LABCELL_X23_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Thhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Thhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Thhvx4~1_combout  & !\soc_inst|m0_1|u_logic|H4nwx4~combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Thhvx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \SW[3]~input .bus_hold = "false";
-defparam \SW[3]~input .simulate_z_as = "z";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .lut_mask = 64'h5050505055505550;
+defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y16_N47
-dffeas \soc_inst|switches_1|switch_store[1][3] (
+// Location: FF_X23_Y13_N52
+dffeas \soc_inst|m0_1|u_logic|Jux2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[3]~input_o ),
+	.d(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][3]~q ),
+	.q(\soc_inst|m0_1|u_logic|Jux2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][3] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][3] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jux2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jux2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N45
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[19]~25 (
+// Location: MLABCELL_X39_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~13 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[19]~25_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[1][3]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (((\soc_inst|interconnect_1|Equal1~0_combout  & \soc_inst|switches_1|switch_store[1][3]~q )))) ) )
+// \soc_inst|m0_1|u_logic|Add2~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~10  ))
+// \soc_inst|m0_1|u_logic|Add2~14  = CARRY(( !\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~10  ))
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[1][3]~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~13_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~14 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[19]~25 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[19]~25 .lut_mask = 64'hA0A3A0A3ACAFACAF;
-defparam \soc_inst|interconnect_1|HRDATA[19]~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~13 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~0 (
+// Location: MLABCELL_X39_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rilwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ecowx4~combout  & ( (!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|L8m2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Add2~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~14  ))
+// \soc_inst|m0_1|u_logic|Add2~2  = CARRY(( !\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~14  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L8m2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rilwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~1_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~2 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .lut_mask = 64'hF0FFF0FF00000000;
-defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~1 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~1 (
+// Location: MLABCELL_X39_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rilwx4~1_combout  = ( \soc_inst|interconnect_1|HRDATA[19]~25_combout  & ( \soc_inst|m0_1|u_logic|Rilwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Jpa3z4~q ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[19]~25_combout  & ( \soc_inst|m0_1|u_logic|Rilwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|Jpa3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Tvhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~1_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datae(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rilwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~1_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rilwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .lut_mask = 64'h00000000F5F5F500;
-defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .lut_mask = 64'h5050505072727272;
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~2 (
+// Location: LABCELL_X30_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rilwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rilwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Rilwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Qtdwx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Tvhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Tvhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( !\soc_inst|m0_1|u_logic|Tvhvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rilwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .lut_mask = 64'h0000CDCD0000FDFD;
-defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .lut_mask = 64'hCCCC0000C0C00000;
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll1wx4~0 (
+// Location: LABCELL_X30_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ll1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & !\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & !\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & !\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout  ) )
+// \soc_inst|m0_1|u_logic|Tvhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Tvhvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Tvhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|E9zvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tvhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ll1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .lut_mask = 64'hFFFFA0A0A0A0A0A0;
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .lut_mask = 64'h00000000F5F5F0F0;
+defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ll1wx4~1 (
+// Location: FF_X30_Y13_N13
+dffeas \soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X21_Y18_N14
+dffeas \soc_inst|m0_1|u_logic|Rhi2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rhi2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rhi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Velvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Imnwx4~combout  & ( \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rilwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Imnwx4~combout  & ( \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rilwx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Imnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rilwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Velvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rhi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & \soc_inst|m0_1|u_logic|Df3wx4~9_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rhi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ll1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rhi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Velvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .lut_mask = 64'h0000F030F030F030;
-defparam \soc_inst|m0_1|u_logic|Ll1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Velvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Velvx4~0 .lut_mask = 64'hFF0CFF0C000C000C;
+defparam \soc_inst|m0_1|u_logic|Velvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj1wx4~0 (
+// Location: LABCELL_X30_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aj1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Aj1wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Aj1wx4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout  & !\soc_inst|m0_1|u_logic|Glnwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Djdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sndwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Zndwx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Aj1wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zndwx4~1_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sndwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .lut_mask = 64'h0000000030003010;
-defparam \soc_inst|m0_1|u_logic|Aj1wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y18_N31
-dffeas \soc_inst|m0_1|u_logic|Ibe3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ibe3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ibe3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ibe3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uo5xx4~0 (
+// Location: LABCELL_X29_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uo5xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Ibe3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wwdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Djdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C0ewx4~1_combout  & (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & \soc_inst|m0_1|u_logic|Vzdwx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ibe3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|C0ewx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vzdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .lut_mask = 64'h4000000000000000;
-defparam \soc_inst|m0_1|u_logic|Uo5xx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y24_N40
-dffeas \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~4 (
+// Location: LABCELL_X29_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|M3e3z4~q  & ( \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|M3e3z4~q  & ( !\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M3e3z4~q  & ( !\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|M3e3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .lut_mask = 64'h4040400000400000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .lut_mask = 64'hF0CCF0CC00000000;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y22_N5
-dffeas \soc_inst|m0_1|u_logic|F8e3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F8e3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F8e3z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X28_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kqdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jtdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Eudwx4~1_combout  ) )
 
-// Location: FF_X30_Y18_N14
-dffeas \soc_inst|m0_1|u_logic|Q6e3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Q6e3z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Q6e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~2 (
+// Location: MLABCELL_X28_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Q6e3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|F8e3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Q6e3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Q6e3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|F8e3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wwdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kqdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|X0ewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|E1ewx4~1_combout  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|F8e3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q6e3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|E1ewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X0ewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .lut_mask = 64'h0080008800800000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .lut_mask = 64'h0000000000003030;
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~3 (
+// Location: LABCELL_X30_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wwdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Snd3z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  
-// & !\soc_inst|m0_1|u_logic|Hpd3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Snd3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Hpd3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Wwdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yxdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|S08wx4~0_combout  & (\soc_inst|m0_1|u_logic|Mydwx4~1_combout  & \soc_inst|m0_1|u_logic|Tq7wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hpd3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Snd3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mydwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .lut_mask = 64'h0000030100000200;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Wwdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~1 (
+// Location: LABCELL_X29_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|I0e3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|X1e3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I0e3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|X1e3z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wwdwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wwdwx4~2_combout  & (\soc_inst|m0_1|u_logic|Z78wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wwdwx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wwdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z78wx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X1e3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|I0e3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wwdwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z78wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wwdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wwdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .lut_mask = 64'h000B000800000000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .lut_mask = 64'h0F0F0F0F0C000C00;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y21_N32
-dffeas \soc_inst|m0_1|u_logic|Exd3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Exd3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X29_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z78wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Exd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Exd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .lut_mask = 64'hAA8CAA8C00000000;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~0 (
+// Location: LABCELL_X29_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dqdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wqd3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Exd3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Dqdwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Exd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wqd3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dqdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .lut_mask = 64'h0000440000005000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .lut_mask = 64'hE4CCE4CC00000000;
+defparam \soc_inst|m0_1|u_logic|Dqdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4~5 (
+// Location: MLABCELL_X28_Y21_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Gm1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Gm1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uo5xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gm1wx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Gm1wx4~2_combout  & !\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kqdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Gvdwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nvdwx4~1_combout  & (\soc_inst|m0_1|u_logic|Uvdwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Zudwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uo5xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gm1wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gm1wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gm1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nvdwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zudwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .lut_mask = 64'h0000000000100010;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gm1wx4 (
+// Location: LABCELL_X29_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gm1wx4~combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Gm1wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|Kqdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Mrdwx4~1_combout  & (\soc_inst|m0_1|u_logic|U18wx4~0_combout  & \soc_inst|m0_1|u_logic|Asdwx4~1_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~5_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gm1wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gm1wx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Gm1wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[11]~8 (
+// Location: MLABCELL_X28_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kqdwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|R40wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|R40wx4~combout  & \soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Kqdwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Xtdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Kqdwx4~0_combout  & \soc_inst|m0_1|u_logic|Qtdwx4~1_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kqdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xtdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kqdwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .lut_mask = 64'h000F000FFF0FFF0F;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y16_N46
-dffeas \soc_inst|m0_1|u_logic|Bge3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bge3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bge3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bge3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Kqdwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fqmvx4~0 (
+// Location: LABCELL_X29_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fqmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|She3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~49_sumout ))) # 
-// (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Bge3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|She3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~49_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Bge3z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|She3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|She3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Kqdwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Dqdwx4~0_combout  & !\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Kqdwx4~3_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Dqdwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bge3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~49_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|She3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dqdwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kqdwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kqdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kqdwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fqmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .lut_mask = 64'h5555FFFFF757F757;
-defparam \soc_inst|m0_1|u_logic|Fqmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y14_N2
-dffeas \soc_inst|m0_1|u_logic|She3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fqmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|She3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|She3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|She3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .lut_mask = 64'h5550555055005500;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~1 (
+// Location: LABCELL_X29_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dhb3z4~q  & ( \soc_inst|m0_1|u_logic|Z8b3z4~q  & ( (\soc_inst|m0_1|u_logic|C4b3z4~q  & \soc_inst|m0_1|u_logic|She3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Djdwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Nodwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Godwx4~1_combout  & (\soc_inst|m0_1|u_logic|Djdwx4~0_combout  & !\soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|She3z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z8b3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Godwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Djdwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oytvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djdwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .lut_mask = 64'h0000000000000303;
-defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~5 (
+// Location: LABCELL_X31_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Widwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add0~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Uei3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~86  ))
+// \soc_inst|m0_1|u_logic|Widwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add0~86 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add0~5_sumout ),
+	.combout(\soc_inst|m0_1|u_logic|Widwx4~0_combout ),
+	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add0~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add0~5 .lut_mask = 64'h000000000000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add0~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Widwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Widwx4~0 .lut_mask = 64'hF0E4F0E400000000;
+defparam \soc_inst|m0_1|u_logic|Widwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zmmvx4~0 (
+// Location: LABCELL_X24_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zmmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uei3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~5_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Jca3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uei3z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~5_sumout )) 
-// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((\soc_inst|m0_1|u_logic|Jca3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uei3z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Uei3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Djdwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Jmdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Qmdwx4~1_combout  & (\soc_inst|m0_1|u_logic|Xmdwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Rw7wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add0~5_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jca3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qmdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xmdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zmmvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djdwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .lut_mask = 64'h5555FFFFD5DFD5DF;
-defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y12_N44
-dffeas \soc_inst|m0_1|u_logic|Uei3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zmmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uei3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uei3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uei3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~0 (
+// Location: LABCELL_X29_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Djdwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z2h3z4~q  & ( \soc_inst|m0_1|u_logic|Uei3z4~q  & ( (\soc_inst|m0_1|u_logic|Ddi3z4~q  & (\soc_inst|m0_1|u_logic|K7g3z4~q  & \soc_inst|m0_1|u_logic|S3i3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Djdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fkdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Tkdwx4~1_combout  & (\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & \soc_inst|m0_1|u_logic|B28wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tkdwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oytvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Djdwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .lut_mask = 64'h0000000000000101;
-defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Djdwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~3 (
+// Location: LABCELL_X29_Y18_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qxa3z4~q  & ( \soc_inst|m0_1|u_logic|Gza3z4~q  & ( (\soc_inst|m0_1|u_logic|Iua3z4~q  & \soc_inst|m0_1|u_logic|Zva3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Djdwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Djdwx4~2_combout  & (\soc_inst|m0_1|u_logic|Widwx4~0_combout  & !\soc_inst|m0_1|u_logic|Djdwx4~3_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Djdwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Widwx4~0_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gza3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Djdwx4~2_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Widwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Djdwx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Djdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oytvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .lut_mask = 64'h0000000000000303;
-defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y16_N56
-dffeas \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Womvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .lut_mask = 64'h0F0F0F0F0A000A00;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y13_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~2 (
+// Location: LABCELL_X29_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ara3z4~q  & ( (\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Jpa3z4~q  & \soc_inst|m0_1|u_logic|O0o2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Z78wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Z78wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z78wx4~4_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Z78wx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z78wx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Z78wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oytvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .lut_mask = 64'h0000000000000101;
-defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .lut_mask = 64'hF300F30000000000;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~4 (
+// Location: LABCELL_X27_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zetwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Rsa3z4~q  & ( \soc_inst|m0_1|u_logic|Oytvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|M2b3z4~q  & (\soc_inst|m0_1|u_logic|W0b3z4~q  & \soc_inst|m0_1|u_logic|Oytvx4~3_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Zetwx4~combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  $ (!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oytvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oytvx4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oytvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zetwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .lut_mask = 64'h0000000000000101;
-defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zetwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zetwx4 .lut_mask = 64'h0000000066666666;
+defparam \soc_inst|m0_1|u_logic|Zetwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y13_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4 (
+// Location: MLABCELL_X28_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdtwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oytvx4~combout  = ( \soc_inst|m0_1|u_logic|Oytvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oytvx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Oytvx4~1_combout  & (\soc_inst|m0_1|u_logic|Aze3z4~q  & \soc_inst|m0_1|u_logic|M5f3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Qdtwx4~combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Zetwx4~combout  & \soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Xuxwx4~combout  
+// & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Zetwx4~combout ) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oytvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Oytvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oytvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zetwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oytvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oytvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oytvx4 .lut_mask = 64'h0000000000000003;
-defparam \soc_inst|m0_1|u_logic|Oytvx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y14_N28
-dffeas \soc_inst|m0_1|u_logic|F2o2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Etmvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F2o2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F2o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F2o2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qdtwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qdtwx4 .lut_mask = 64'h00F300F3000C000C;
+defparam \soc_inst|m0_1|u_logic|Qdtwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y14_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mxtvx4 (
+// Location: LABCELL_X29_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mxtvx4~combout  = ( \soc_inst|m0_1|u_logic|F2o2z4~q  & ( \soc_inst|m0_1|u_logic|Oytvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|M5ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qdtwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gftwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gvdwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mxtvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mxtvx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Mxtvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .lut_mask = 64'hAFA0AFA000000000;
+defparam \soc_inst|m0_1|u_logic|M5ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[18]~13 (
+// Location: LABCELL_X29_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  = ( \soc_inst|m0_1|u_logic|St0wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Y9t2z4~q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|St0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|W3ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|X7ewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A6ewx4~0_combout  & (!\soc_inst|m0_1|u_logic|M5ewx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|F5ewx4~combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A6ewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|F5ewx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|X7ewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W3ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .lut_mask = 64'h0C0F0C0F3F0F3F0F;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[18]~13 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y16_N55
-dffeas \soc_inst|m0_1|u_logic|Xyn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xyn2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xyn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xyn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .lut_mask = 64'h0000000000008080;
+defparam \soc_inst|m0_1|u_logic|W3ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y12_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iomvx4~0 (
+// Location: LABCELL_X29_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3ewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iomvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O0o2z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~17_sumout ))) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
-// (\soc_inst|m0_1|u_logic|Xyn2z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O0o2z4~q  & ( \soc_inst|m0_1|u_logic|Tna3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((!\soc_inst|m0_1|u_logic|Add0~17_sumout ))) 
-// # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (\soc_inst|m0_1|u_logic|Xyn2z4~q ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|O0o2z4~q  & ( !\soc_inst|m0_1|u_logic|Tna3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|O0o2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Tna3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|W3ewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q7ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Iutwx4~0_combout  & (\soc_inst|m0_1|u_logic|W3ewx4~0_combout  & \soc_inst|m0_1|u_logic|J7ewx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xyn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add0~17_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Iutwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W3ewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J7ewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iomvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W3ewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .lut_mask = 64'h0F0FFFFFBF1FBF1F;
-defparam \soc_inst|m0_1|u_logic|Iomvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y12_N49
-dffeas \soc_inst|m0_1|u_logic|O0o2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Iomvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O0o2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O0o2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O0o2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X45_Y16_N53
-dffeas \soc_inst|switches_1|switch_store[1][2] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[2]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][2]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][2] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][2] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|W3ewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N39
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[18]~6 (
+// Location: LABCELL_X29_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~6 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[18]~6_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (\soc_inst|ram_1|write_cycle~q  & ((!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ))) ) ) # 
-// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout )) ) )
+// \soc_inst|m0_1|u_logic|Z78wx4~6_combout  = ( \soc_inst|m0_1|u_logic|W3ewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Z78wx4~1_combout  & \soc_inst|m0_1|u_logic|Z78wx4~5_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|W3ewx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Manwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Z78wx4~1_combout  & \soc_inst|m0_1|u_logic|Z78wx4~5_combout )) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z78wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z78wx4~5_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ),
+	.dataf(!\soc_inst|m0_1|u_logic|W3ewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[18]~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[18]~6 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[18]~6 .lut_mask = 64'h0500050055505550;
-defparam \soc_inst|ram_1|data_to_memory[18]~6 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X41_Y15_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[18]~6_combout ,\soc_inst|ram_1|data_to_memory[10]~5_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_bit_number = 10;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_bit_number = 10;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000C00440C0000004001C2800155555555555541A841000000000000000000000000";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .lut_mask = 64'h0050005000F000F0;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N42
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[10]~5 (
+// Location: LABCELL_X22_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~2 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[10]~5_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( (\soc_inst|ram_1|write_cycle~q  & ((!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ) # (!\soc_inst|ram_1|byte_select [1]))) ) ) # 
-// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( (\soc_inst|ram_1|write_cycle~q  & (!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & \soc_inst|ram_1|byte_select [1])) ) )
+// \soc_inst|m0_1|u_logic|Do8wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Add5~73_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~61_sumout  & !\soc_inst|m0_1|u_logic|Add5~69_sumout ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
-	.datad(!\soc_inst|ram_1|byte_select [1]),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[10]~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do8wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[10]~5 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[10]~5 .lut_mask = 64'h0050005055505550;
-defparam \soc_inst|ram_1|data_to_memory[10]~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .lut_mask = 64'hC0C0000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N51
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[18]~13 (
+// Location: LABCELL_X22_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~3 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[18]~13_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
-// (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # ((\soc_inst|switches_1|switch_store[1][2]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][2]~q )))) ) 
-// )
+// \soc_inst|m0_1|u_logic|Do8wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Add5~53_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~49_sumout  & \soc_inst|m0_1|u_logic|Do8wx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[1][2]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Do8wx4~2_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do8wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[18]~13 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[18]~13 .lut_mask = 64'hC0D1C0D1E2F3E2F3;
-defparam \soc_inst|interconnect_1|HRDATA[18]~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .lut_mask = 64'h0A0A000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~0 (
+// Location: MLABCELL_X21_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajmwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ecowx4~combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Xyn2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Do8wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Add5~45_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~29_sumout  & (!\soc_inst|m0_1|u_logic|Add5~41_sumout  & (!\soc_inst|m0_1|u_logic|Add5~33_sumout  & 
+// !\soc_inst|m0_1|u_logic|Add5~37_sumout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xyn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do8wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .lut_mask = 64'hAF00AF0000000000;
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~1 (
+// Location: MLABCELL_X21_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|m0_1|u_logic|Ajmwx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[18]~13_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|O0o2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|m0_1|u_logic|Ajmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|O0o2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Do8wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (\soc_inst|m0_1|u_logic|Do8wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~13_sumout  & 
+// !\soc_inst|m0_1|u_logic|Add5~17_sumout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Do8wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~13_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ajmwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do8wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .lut_mask = 64'h00000000BBBBB0B0;
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .lut_mask = 64'h4040000000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajmwx4~2 (
+// Location: LABCELL_X22_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Do8wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Asdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ajmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Eudwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Asdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ajmwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Eudwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Do8wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Do8wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~1_sumout  & (\soc_inst|m0_1|u_logic|Do8wx4~3_combout  & 
+// !\soc_inst|m0_1|u_logic|Add5~5_sumout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ajmwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eudwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Asdwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Do8wx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~5_sumout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Do8wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Do8wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .lut_mask = 64'h0A0B0A0B0E0F0E0F;
-defparam \soc_inst|m0_1|u_logic|Ajmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .lut_mask = 64'h0000202000000000;
+defparam \soc_inst|m0_1|u_logic|Do8wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wn1wx4~0 (
+// Location: LABCELL_X23_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wn1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Imnwx4~combout  & !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) # ((!\soc_inst|m0_1|u_logic|Imnwx4~combout  & !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Add5~81_sumout  & !\soc_inst|m0_1|u_logic|Add5~77_sumout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wn1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .lut_mask = 64'hFCCCFCCCF000F000;
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~0 .lut_mask = 64'hC0C0C0C000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wn1wx4~1 (
+// Location: LABCELL_X23_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O2bwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Wn1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Wn1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|O2bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((\soc_inst|m0_1|u_logic|Q3bwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wn1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O2bwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .lut_mask = 64'h00CFCFCF00000000;
-defparam \soc_inst|m0_1|u_logic|Wn1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .lut_mask = 64'hFAACACFAF0A0A0F0;
+defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~45 (
+// Location: LABCELL_X23_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~45_sumout  = SUM(( !\soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~50  ))
-// \soc_inst|m0_1|u_logic|Add2~46  = CARRY(( !\soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~50  ))
+// \soc_inst|m0_1|u_logic|I30wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( \soc_inst|m0_1|u_logic|O2bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Zz8wx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|O2bwx4~0_combout  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O2bwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~50 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~45_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~46 ),
+	.combout(\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~45 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~45 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~45 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~0 .lut_mask = 64'h00000000FFFFAAAA;
+defparam \soc_inst|m0_1|u_logic|I30wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~41 (
+// Location: LABCELL_X23_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~15 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~41_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ufx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~46  ))
-// \soc_inst|m0_1|u_logic|Add2~42  = CARRY(( !\soc_inst|m0_1|u_logic|Ufx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~46  ))
+// \soc_inst|m0_1|u_logic|N88wx4~15_combout  = ( \soc_inst|m0_1|u_logic|Yqzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I30wx4~0_combout  & (\soc_inst|m0_1|u_logic|C3qvx4~0_combout  & \soc_inst|m0_1|u_logic|Va3wx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yqzvx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~46 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~41_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~42 ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~15_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~41 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~41 .lut_mask = 64'h0000FFFF0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add2~41 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~15 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~15 .lut_mask = 64'h0000000000110011;
+defparam \soc_inst|m0_1|u_logic|N88wx4~15 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lkhvx4~1 (
+// Location: MLABCELL_X21_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~105_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ufx2z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~41_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ufx2z4~q )))))) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wccwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout  & (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wccwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (\soc_inst|m0_1|u_logic|Do1wx4~0_combout  & (\soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add5~105_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~41_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Do1wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lkhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .lut_mask = 64'hA000A800A0AAA8AA;
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~1 .lut_mask = 64'h0000101100000011;
+defparam \soc_inst|m0_1|u_logic|N88wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lkhvx4~0 (
+// Location: MLABCELL_X28_Y22_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lkhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|G5qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Thm2z4~q  & ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (\soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & !\soc_inst|m0_1|u_logic|R1w2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Thm2z4~q  & ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (\soc_inst|m0_1|u_logic|Ez8wx4~0_combout  & !\soc_inst|m0_1|u_logic|R1w2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Thm2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ez8wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lkhvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ez8wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .lut_mask = 64'h00000000CCCCFCFD;
-defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .lut_mask = 64'h000005050C000C00;
+defparam \soc_inst|m0_1|u_logic|G5qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y25_N22
-dffeas \soc_inst|m0_1|u_logic|Ufx2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ufx2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X18_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G11wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G11wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G11wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ufx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ufx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G11wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G11wx4~1 .lut_mask = 64'h505F505F05F505F5;
+defparam \soc_inst|m0_1|u_logic|G11wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uehvx4~1 (
+// Location: LABCELL_X18_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G11wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uehvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~45_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Gmd3z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add2~85_sumout ) # ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Gmd3z4~q )))))) ) )
+// \soc_inst|m0_1|u_logic|G11wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|U11wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|G11wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|U11wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~q )) # (\soc_inst|m0_1|u_logic|G11wx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|G11wx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|U11wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pdi2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|G11wx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~85_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gmd3z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G11wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uehvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .lut_mask = 64'h80808880A2A2AAA2;
-defparam \soc_inst|m0_1|u_logic|Uehvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G11wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G11wx4~0 .lut_mask = 64'h00F5005500FD00DD;
+defparam \soc_inst|m0_1|u_logic|G11wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uehvx4~0 (
+// Location: LABCELL_X16_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uehvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Uehvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ll1wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ee8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hk0wx4~combout  & ( \soc_inst|m0_1|u_logic|O7zvx4~combout  & ( (\soc_inst|m0_1|u_logic|Yw0wx4~combout  & (\soc_inst|m0_1|u_logic|S71wx4~combout  & (\soc_inst|m0_1|u_logic|St0wx4~combout  
+// & \soc_inst|m0_1|u_logic|W21wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uehvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ll1wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yw0wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S71wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|St0wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hk0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .lut_mask = 64'h0000AAAA0000FAFB;
-defparam \soc_inst|m0_1|u_logic|Uehvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y20_N43
-dffeas \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Uehvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X17_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ee8wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z62wx4~combout  & ( \soc_inst|m0_1|u_logic|Ce0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nn0wx4~combout  & (\soc_inst|m0_1|u_logic|Ze1wx4~combout  & (\soc_inst|m0_1|u_logic|Hc1wx4~combout  
+// & \soc_inst|m0_1|u_logic|Gm1wx4~combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ze1wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y15_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzivx4~0 (
+// Location: LABCELL_X17_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wce3z4~q  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wce3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Owovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ee8wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Kqzvx4~combout  & ( \soc_inst|m0_1|u_logic|Wa0wx4~combout  & ( (\soc_inst|m0_1|u_logic|R40wx4~combout  & \soc_inst|m0_1|u_logic|Uvzvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wa0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .lut_mask = 64'h0000FFF0BBB0BBB0;
-defparam \soc_inst|m0_1|u_logic|Wzivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .lut_mask = 64'h0000000000000303;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y15_N44
-dffeas \soc_inst|m0_1|u_logic|Wce3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wzivx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wce3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wce3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wce3z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X18_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ee8wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ee8wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ee8wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Ee8wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Djzvx4~combout  & (\soc_inst|m0_1|u_logic|Zhyvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|P12wx4~combout  & \soc_inst|m0_1|u_logic|Ee8wx4~0_combout ))) ) ) )
 
-// Location: FF_X30_Y18_N32
-dffeas \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Djzvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ee8wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ee8wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ee8wx4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ee8wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|Ee8wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y17_N41
-dffeas \soc_inst|m0_1|u_logic|U9e3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U9e3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X19_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|M9awx4~1_combout  & ((!\soc_inst|m0_1|u_logic|N90wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|M9awx4~1_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// !\soc_inst|m0_1|u_logic|N90wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fj0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E5awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|M9awx4~1_combout  & (\soc_inst|m0_1|u_logic|Wzawx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|M9awx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|N90wx4~0_combout ))) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|M9awx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N90wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fj0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E5awx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9e3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U9e3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G79wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~5 .lut_mask = 64'h3F3C0F00FC3CF000;
+defparam \soc_inst|m0_1|u_logic|G79wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ge9wx4~0 (
+// Location: MLABCELL_X15_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ge9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|U9e3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|G79wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # ((!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|R99wx4~1_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (!\soc_inst|m0_1|u_logic|R99wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ra1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ciawx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout  & \soc_inst|m0_1|u_logic|R99wx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U9e3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R99wx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ra1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ciawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ge9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .lut_mask = 64'h0000000040000000;
-defparam \soc_inst|m0_1|u_logic|Ge9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~6 .lut_mask = 64'h5D5D4848EAEA4848;
+defparam \soc_inst|m0_1|u_logic|G79wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y21_N31
-dffeas \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|G79wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|U11wx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|U11wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|U11wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ecawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|U11wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ecawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G79wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~4 .lut_mask = 64'h5550FA50F5A0AAA0;
+defparam \soc_inst|m0_1|u_logic|G79wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~1 (
+// Location: MLABCELL_X21_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cc9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tyd3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Tyd3z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|G79wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|G79wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|G79wx4~5_combout  & (!\soc_inst|m0_1|u_logic|O51wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|G79wx4~6_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tyd3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G79wx4~5_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O51wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G79wx4~6_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G79wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .lut_mask = 64'h5010000040000000;
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~7 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|G79wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y21_N44
-dffeas \soc_inst|m0_1|u_logic|Pvd3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pvd3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pvd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pvd3z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X25_Y22_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~10 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~10_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Pdbwx4~combout  & \soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) ) )
 
-// Location: FF_X34_Y21_N14
-dffeas \soc_inst|m0_1|u_logic|Aud3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Aj1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aud3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aud3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aud3z4 .power_up = "low";
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~10_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|N88wx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~10 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|N88wx4~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~0 (
+// Location: LABCELL_X19_Y23_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cc9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Pvd3z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aud3z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|G79wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # ((!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|F32wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  $ 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pg1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & !\soc_inst|m0_1|u_logic|F32wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pvd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aud3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .lut_mask = 64'h00000000000088A0;
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~2 .lut_mask = 64'h3F0F3C00FCF03C00;
+defparam \soc_inst|m0_1|u_logic|G79wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~2 (
+// Location: LABCELL_X18_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cc9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|F8e3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Q6e3z4~q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|F8e3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Q6e3z4~q ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|G79wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & !\soc_inst|m0_1|u_logic|Oaawx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & \soc_inst|m0_1|u_logic|Oaawx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U6awx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & !\soc_inst|m0_1|u_logic|Oaawx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & \soc_inst|m0_1|u_logic|Oaawx4~1_combout )) # (\soc_inst|m0_1|u_logic|U6awx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Q6e3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|F8e3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .lut_mask = 64'h0A08000000080000;
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~0 .lut_mask = 64'h5D5DEAEA0C0CC0C0;
+defparam \soc_inst|m0_1|u_logic|G79wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cc9wx4~3 (
+// Location: MLABCELL_X21_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C8zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cc9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Cc9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cc9wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ge9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Cc9wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|C8zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & \soc_inst|m0_1|u_logic|Q8zvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ge9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cc9wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cc9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cc9wx4~2_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .lut_mask = 64'hB000000000000000;
-defparam \soc_inst|m0_1|u_logic|Cc9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .lut_mask = 64'h00FF00FF000F000F;
+defparam \soc_inst|m0_1|u_logic|C8zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qk1wx4~0 (
+// Location: MLABCELL_X21_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dv8wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qk1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Rkd3z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Wce3z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rkd3z4~q 
-// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ai9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Wce3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Dv8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & \soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|H3awx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Hlzvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wce3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cc9wx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .lut_mask = 64'hCCAACCFFCCAACCF0;
-defparam \soc_inst|m0_1|u_logic|Qk1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .lut_mask = 64'h0F0F0F0F000F000F;
+defparam \soc_inst|m0_1|u_logic|Dv8wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y15_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Owovx4 (
+// Location: MLABCELL_X21_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Owovx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~81_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Add5~45_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~81_sumout )) # (\soc_inst|m0_1|u_logic|Add5~45_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~81_sumout )) # (\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~81_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|G79wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~45_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qk1wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add3~81_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Owovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Owovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Owovx4 .lut_mask = 64'h00330F3F55775F7F;
-defparam \soc_inst|m0_1|u_logic|Owovx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y15_N2
-dffeas \soc_inst|ram_1|saved_word_address[9] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Owovx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [9]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[9] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[9] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G79wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~1 .lut_mask = 64'h3B283B28EC28EC28;
+defparam \soc_inst|m0_1|u_logic|G79wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N21
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[9]~9 (
+// Location: LABCELL_X19_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G79wx4~3 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[9]~9_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|Owovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [9])) ) ) # ( 
-// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [9] ) )
+// \soc_inst|m0_1|u_logic|G79wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|G79wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Znzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G79wx4~2_combout  & (!\soc_inst|m0_1|u_logic|G79wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|C8zvx4~0_combout  & !\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|saved_word_address [9]),
-	.datad(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G79wx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|G79wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dv8wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G79wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Znzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[9]~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G79wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .lut_mask = 64'h0F0F0F0F05AF05AF;
-defparam \soc_inst|ram_1|memory.raddr_a[9]~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G79wx4~3 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|G79wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y12_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[23]~3_combout ,\soc_inst|ram_1|data_to_memory[7]~4_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+// Location: MLABCELL_X21_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~11 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N88wx4~11_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|G79wx4~7_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & \soc_inst|m0_1|u_logic|N88wx4~10_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & \soc_inst|m0_1|u_logic|N88wx4~10_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|G79wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Ee8wx4~1_combout  & \soc_inst|m0_1|u_logic|N88wx4~10_combout )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ee8wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|G79wx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N88wx4~10_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G79wx4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~11_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_bit_number = 7;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_bit_number = 7;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003820C008B0410000486124C2707FFFFFFFFFFFFC3B002000000000000000000001554";
+defparam \soc_inst|m0_1|u_logic|N88wx4~11 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~11 .lut_mask = 64'hF0F50000F0F53031;
+defparam \soc_inst|m0_1|u_logic|N88wx4~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y14_N45
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[23]~3 (
+// Location: LABCELL_X22_Y23_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~18 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[23]~3_combout  = ( \soc_inst|ram_1|write_cycle~q  & ( \soc_inst|ram_1|data_to_memory[23]~0_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ) # (\soc_inst|ram_1|byte_select [2]) ) ) ) # ( 
-// \soc_inst|ram_1|write_cycle~q  & ( !\soc_inst|ram_1|data_to_memory[23]~0_combout  & ( (!\soc_inst|ram_1|byte_select [2] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~18_combout  = ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( \soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [2]),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|write_cycle~q ),
-	.dataf(!\soc_inst|ram_1|data_to_memory[23]~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[23]~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~18_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[23]~3 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[23]~3 .lut_mask = 64'h00000A0A00005F5F;
-defparam \soc_inst|ram_1|data_to_memory[23]~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~18 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~18 .lut_mask = 64'h00000000FF0000FF;
+defparam \soc_inst|m0_1|u_logic|N88wx4~18 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N9
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~11 (
+// Location: LABCELL_X18_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~21 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[7]~11_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # 
-// (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # ((\soc_inst|switches_1|switch_store[0][7]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (((!\soc_inst|interconnect_1|HRDATA[25]~1_combout )))) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[0][7]~q )))) ) 
+// \soc_inst|m0_1|u_logic|N88wx4~21_combout  = ( \soc_inst|m0_1|u_logic|Pdi2z4~q  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & \soc_inst|m0_1|u_logic|Fuawx4~0_combout ) ) 
 // )
 
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[0][7]~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~21_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[7]~11 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[7]~11 .lut_mask = 64'hC0C5C0C5CACFCACF;
-defparam \soc_inst|interconnect_1|HRDATA[7]~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~21 .lut_mask = 64'h00F000F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|N88wx4~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~0 (
+// Location: MLABCELL_X21_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~19 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wywwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ylc3z4~q  & ( ((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|X0c3z4~q )) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylc3z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|X0c3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~19_combout  = ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H3awx4~0_combout  & !\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wywwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~19_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .lut_mask = 64'h0303030303FF03FF;
-defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~19 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~19 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~19 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~1 (
+// Location: LABCELL_X18_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wywwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wywwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkb3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|E0uvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wywwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkb3z4~q ) # (!\soc_inst|m0_1|u_logic|E0uvx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|P82wx4~0_combout  & \soc_inst|m0_1|u_logic|Ns9wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|P82wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ns9wx4~1_combout )) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wywwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wywwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .lut_mask = 64'hEE00EE00E000E000;
-defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~8 .lut_mask = 64'h21AB21AB21752175;
+defparam \soc_inst|m0_1|u_logic|N88wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~2 (
+// Location: LABCELL_X18_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wywwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Nfb3z4~q  & ( (\soc_inst|m0_1|u_logic|Wywwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dhb3z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Nfb3z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wywwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dhb3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & \soc_inst|m0_1|u_logic|Wo0wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|U6awx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U6awx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wywwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nfb3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wywwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .lut_mask = 64'h00D000D000DD00DD;
-defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~7 .lut_mask = 64'h0A0A0505FF0A05FF;
+defparam \soc_inst|m0_1|u_logic|N88wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~3 (
+// Location: LABCELL_X18_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~20 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wywwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wywwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Zad3z4~q  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Zad3z4~q  & (!\soc_inst|m0_1|u_logic|N1uvx4~combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~20_combout  = ( !\soc_inst|m0_1|u_logic|N88wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|N88wx4~8_combout  & ((!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (!\soc_inst|m0_1|u_logic|Ejawx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N88wx4~8_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wywwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wywwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~20_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .lut_mask = 64'h00000000FAC8FAC8;
-defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~20 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~20 .lut_mask = 64'hC4C8C4C800000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~20 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G9lwx4~0 (
+// Location: MLABCELL_X21_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G9lwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[7]~11_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[7]~11_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[7]~11_combout ) # 
-// (!\soc_inst|m0_1|u_logic|B7owx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|N88wx4~18_combout  & 
+// ((!\soc_inst|m0_1|u_logic|N88wx4~19_combout )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|N88wx4~18_combout  & !\soc_inst|m0_1|u_logic|N88wx4~19_combout )) # (\soc_inst|m0_1|u_logic|N88wx4~21_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( ((!\soc_inst|m0_1|u_logic|N88wx4~18_combout  & !\soc_inst|m0_1|u_logic|N88wx4~19_combout )) # (\soc_inst|m0_1|u_logic|N88wx4~21_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|N88wx4~21_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|N88wx4~20_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~21_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wywwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N88wx4~18_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N88wx4~21_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N88wx4~19_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~20_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .lut_mask = 64'hA800FC00A8A8FCFC;
-defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~9 .lut_mask = 64'h0F0F0505CF0FCD05;
+defparam \soc_inst|m0_1|u_logic|N88wx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4~0 (
+// Location: MLABCELL_X21_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~12 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oa3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Walwx4~1_combout  & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Walwx4~1_combout  & !\soc_inst|m0_1|u_logic|Yilwx4~0_combout )) # (\soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~12_combout  = ( !\soc_inst|m0_1|u_logic|Z80wx4~0_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout  & \soc_inst|m0_1|u_logic|N88wx4~11_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cs0wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ri0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N88wx4~11_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z80wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~12_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .lut_mask = 64'hA0FFA0FFA0A0A0A0;
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~12 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~12 .lut_mask = 64'h0000000000800000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oa3wx4~1 (
+// Location: MLABCELL_X21_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oa3wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Oa3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Palwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Phlwx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Palwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Phlwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|L9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rmawx4~0_combout  & !\soc_inst|m0_1|u_logic|Igi2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~q ) # ((\soc_inst|m0_1|u_logic|Rmawx4~0_combout  & !\soc_inst|m0_1|u_logic|Igi2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oa3wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L9zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .lut_mask = 64'hA8FCA8FC00000000;
-defparam \soc_inst|m0_1|u_logic|Oa3wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .lut_mask = 64'hDCDCDCDC50505050;
+defparam \soc_inst|m0_1|u_logic|L9zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fa2wx4~0 (
+// Location: LABCELL_X19_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fa2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oa3wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Va3wx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|L9zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rmawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Igi2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Rmawx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rmawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L9zvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .lut_mask = 64'h000000000000777F;
-defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y23_N59
-dffeas \soc_inst|m0_1|u_logic|Ldf3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ldf3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ldf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ldf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .lut_mask = 64'hCCCCCCCC0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|L9zvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I852z4~0 (
+// Location: MLABCELL_X21_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I852z4~0_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q  ) )
+// \soc_inst|m0_1|u_logic|L9zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O3awx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|O3awx4~0_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dih2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ldf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I852z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L9zvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I852z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I852z4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|I852z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .lut_mask = 64'hA0A0A0A0E020E020;
+defparam \soc_inst|m0_1|u_logic|L9zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~2 (
+// Location: MLABCELL_X21_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L9zvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~2_combout  = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Orj2z4~q ) # ((\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Eif3z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Eif3z4~q ) ) )
+// \soc_inst|m0_1|u_logic|L9zvx4~combout  = ( \soc_inst|m0_1|u_logic|L9zvx4~2_combout  & ( \soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|L9zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|L9zvx4~2_combout  & ( \soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|L9zvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|L9zvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|L9zvx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orj2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eif3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|L9zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L9zvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|L9zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L9zvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .lut_mask = 64'h0F00AFAA0F00AFAA;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y20_N17
-dffeas \soc_inst|m0_1|u_logic|Fpi2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fpi2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fpi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fpi2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X28_Y20_N10
-dffeas \soc_inst|m0_1|u_logic|Ilf3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ilf3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ilf3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ilf3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L9zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L9zvx4 .lut_mask = 64'h000000FFC400C4FF;
+defparam \soc_inst|m0_1|u_logic|L9zvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~0 (
+// Location: LABCELL_X19_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ilf3z4~q ) # ((!\soc_inst|m0_1|u_logic|Fpi2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fpi2z4~q  & \soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Luzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fpi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ilf3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .lut_mask = 64'h00CC00CCF0FCF0FC;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .lut_mask = 64'h303F303F03F303F3;
+defparam \soc_inst|m0_1|u_logic|Luzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~1 (
+// Location: MLABCELL_X21_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~1_combout  = ( \soc_inst|m0_1|u_logic|B6j2z4~q  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Mof3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  & ( ((\soc_inst|m0_1|u_logic|U71xx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Mof3z4~q )) # (\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Luzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Euzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Luzvx4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Euzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Luzvx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & ((!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pdi2z4~q  & (((\soc_inst|m0_1|u_logic|Mgd2z4~0_combout 
+//  & !\soc_inst|m0_1|u_logic|Duc2z4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mof3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuawx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Luzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
 	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .lut_mask = 64'h5F0F5F0F55005500;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y20_N41
-dffeas \soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE_q ),
-	.prn(vcc));
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .lut_mask = 64'h00008F880000FFFF;
+defparam \soc_inst|m0_1|u_logic|Luzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P852z4~0 (
+// Location: MLABCELL_X21_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P852z4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q 
-// )) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~13_combout  = ( !\soc_inst|m0_1|u_logic|Uozvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Luzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|J61wx4~0_combout  & \soc_inst|m0_1|u_logic|L9zvx4~combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xk1wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ya1wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J61wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L9zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uozvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P852z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~13_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P852z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P852z4~0 .lut_mask = 64'h000000C000000000;
-defparam \soc_inst|m0_1|u_logic|P852z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~13 .lut_mask = 64'h0080000000000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W852z4~0 (
+// Location: LABCELL_X22_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nyawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W852z4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wbf3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Nyawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|E1bvx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|E1bvx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|E1bvx4~combout  & (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|E1bvx4~combout  & ((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|E1bvx4~combout  & \soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wbf3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E1bvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W852z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W852z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W852z4~0 .lut_mask = 64'h0000000300000000;
-defparam \soc_inst|m0_1|u_logic|W852z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .lut_mask = 64'h0505061705053737;
+defparam \soc_inst|m0_1|u_logic|Nyawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S652z4~0 (
+// Location: LABCELL_X22_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S652z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bqf3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~17_combout  = ( \soc_inst|m0_1|u_logic|J00wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Nyawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & (\soc_inst|m0_1|u_logic|Cr1wx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|N88wx4~12_combout  & \soc_inst|m0_1|u_logic|N88wx4~13_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bqf3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N88wx4~12_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N88wx4~13_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S652z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~17_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S652z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S652z4~0 .lut_mask = 64'h0200020000000000;
-defparam \soc_inst|m0_1|u_logic|S652z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~17 .lut_mask = 64'h0000000200000000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G752z4~0 (
+// Location: MLABCELL_X21_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rjzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G752z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xmf3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Rjzvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hlzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H3awx4~0_combout ) # (\soc_inst|m0_1|u_logic|O3awx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3awx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O3awx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xmf3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hlzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G752z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rjzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G752z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G752z4~0 .lut_mask = 64'h0100010000000000;
-defparam \soc_inst|m0_1|u_logic|G752z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .lut_mask = 64'hF0FFF0FF00000000;
+defparam \soc_inst|m0_1|u_logic|Rjzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~4 (
+// Location: LABCELL_X17_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nf1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~4_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G752z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P852z4~0_combout  & (\soc_inst|m0_1|u_logic|M4j2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|W852z4~0_combout  & !\soc_inst|m0_1|u_logic|S652z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G752z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P852z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|W852z4~0_combout  & !\soc_inst|m0_1|u_logic|S652z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Nf1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Ejawx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Pg1wx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P852z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|M4j2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W852z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S652z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G752z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pg1wx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ejawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .lut_mask = 64'hA000200000000000;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .lut_mask = 64'h0000333333330000;
+defparam \soc_inst|m0_1|u_logic|Nf1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M352z4~0 (
+// Location: MLABCELL_X21_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M352z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qrf3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & \soc_inst|m0_1|u_logic|P82wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & (\soc_inst|m0_1|u_logic|P82wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Gdawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & (\soc_inst|m0_1|u_logic|P82wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|P82wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hy0wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gdawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M352z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M352z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M352z4~0 .lut_mask = 64'h1000100000000000;
-defparam \soc_inst|m0_1|u_logic|M352z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~3 .lut_mask = 64'h0637063706CE06CE;
+defparam \soc_inst|m0_1|u_logic|N88wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T352z4~0 (
+// Location: MLABCELL_X21_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T352z4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ftf3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|N88wx4~3_combout  & ( \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Nf1wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|F32wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Lk9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Nf1wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|F32wx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ftf3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rjzvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nf1wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N88wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T352z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T352z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T352z4~0 .lut_mask = 64'h0080008000000000;
-defparam \soc_inst|m0_1|u_logic|T352z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~4 .lut_mask = 64'hA0800000A0200000;
+defparam \soc_inst|m0_1|u_logic|N88wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C552z4~0 (
+// Location: LABCELL_X18_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C552z4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pgf3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U6awx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & \soc_inst|m0_1|u_logic|Wo0wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|U6awx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oaawx4~1_combout  & \soc_inst|m0_1|u_logic|Wo0wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pgf3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C552z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C552z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C552z4~0 .lut_mask = 64'h0010001000000000;
-defparam \soc_inst|m0_1|u_logic|C552z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~2 .lut_mask = 64'h005500AA0F5FF0FA;
+defparam \soc_inst|m0_1|u_logic|N88wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O452z4~0 (
+// Location: MLABCELL_X21_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O452z4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Tjf3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|N88wx4~4_combout  & !\soc_inst|m0_1|u_logic|N88wx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # ((\soc_inst|m0_1|u_logic|N88wx4~4_combout  & !\soc_inst|m0_1|u_logic|N88wx4~2_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tjf3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|N88wx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N88wx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O452z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O452z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O452z4~0 .lut_mask = 64'h0020002000000000;
-defparam \soc_inst|m0_1|u_logic|O452z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~5 .lut_mask = 64'hF4F4F4F444444444;
+defparam \soc_inst|m0_1|u_logic|N88wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~3 (
+// Location: LABCELL_X19_Y22_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wsawx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|C552z4~0_combout  & ( !\soc_inst|m0_1|u_logic|O452z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M352z4~0_combout  & (!\soc_inst|m0_1|u_logic|T352z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uuf3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Wsawx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Yonvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Yonvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Uuf3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M352z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T352z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C552z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O452z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tuawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .lut_mask = 64'hB000000000000000;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .lut_mask = 64'hEEB8BBE2EE00BB00;
+defparam \soc_inst|m0_1|u_logic|Wsawx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~5 (
+// Location: MLABCELL_X21_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6cwx4~5_combout  = ( \soc_inst|m0_1|u_logic|R6cwx4~4_combout  & ( \soc_inst|m0_1|u_logic|R6cwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|I852z4~0_combout  & (!\soc_inst|m0_1|u_logic|R6cwx4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|R6cwx4~0_combout  & !\soc_inst|m0_1|u_logic|R6cwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Y5zvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wsawx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ox1wx4~1_combout  & (\soc_inst|m0_1|u_logic|N88wx4~5_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout  & \soc_inst|m0_1|u_logic|Ksbwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I852z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R6cwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R6cwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R6cwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R6cwx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ox1wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N88wx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ox1wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ksbwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y5zvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .lut_mask = 64'h0000000000008000;
-defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~6 .lut_mask = 64'h0000000000000010;
+defparam \soc_inst|m0_1|u_logic|N88wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N6
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[23]~0 (
+// Location: MLABCELL_X21_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~14 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[23]~0_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y9t2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Y9t2z4~q  & (!\soc_inst|m0_1|u_logic|R6cwx4~5_combout )) ) )
+// \soc_inst|m0_1|u_logic|N88wx4~14_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~17_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Qppvx4~1_combout  & (\soc_inst|m0_1|u_logic|Cfzvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|N88wx4~1_combout  & \soc_inst|m0_1|u_logic|Mdzvx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cfzvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|N88wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N88wx4~17_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[23]~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~14_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[23]~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[23]~0 .lut_mask = 64'hEE44FF00EE44FF00;
-defparam \soc_inst|ram_1|data_to_memory[23]~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~14 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~14 .lut_mask = 64'h0000000000000001;
+defparam \soc_inst|m0_1|u_logic|N88wx4~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V4ovx4~0 (
+// Location: LABCELL_X22_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N88wx4~16 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V4ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( \soc_inst|ram_1|data_to_memory[23]~0_combout  ) )
+// \soc_inst|m0_1|u_logic|N88wx4~16_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~15_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~14_combout  & ( ((\soc_inst|m0_1|u_logic|Do8wx4~4_combout  & \soc_inst|m0_1|u_logic|N88wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|data_to_memory[23]~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Do8wx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N88wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N88wx4~15_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~14_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~16 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N88wx4~16 .lut_mask = 64'h000000000000333F;
+defparam \soc_inst|m0_1|u_logic|N88wx4~16 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jca3z4~0 (
+// Location: LABCELL_X23_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z78wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jca3z4~0_combout  = ( !\soc_inst|m0_1|u_logic|V4ovx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Z78wx4~7_combout  = ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( (!\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & !\soc_inst|m0_1|u_logic|Wai2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ) # (\soc_inst|m0_1|u_logic|Wai2z4~q ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
-	.dataf(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z78wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .lut_mask = 64'hFFFF0000FFFF0000;
-defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .lut_mask = 64'hAAFFAAFFAA00AA00;
+defparam \soc_inst|m0_1|u_logic|Z78wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y15_N47
-dffeas \soc_inst|m0_1|u_logic|Jca3z4 (
+// Location: LABCELL_X23_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9zvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S9zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((\soc_inst|m0_1|u_logic|O7zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|K0qvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (\soc_inst|m0_1|u_logic|O7zvx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|X4pvx4~combout ) # (\soc_inst|m0_1|u_logic|E9zvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (((\soc_inst|m0_1|u_logic|X4pvx4~combout )) # (\soc_inst|m0_1|u_logic|E9zvx4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (\soc_inst|m0_1|u_logic|X4pvx4~combout  & \soc_inst|m0_1|u_logic|O7zvx4~combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z78wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (\soc_inst|m0_1|u_logic|O7zvx4~combout  & ((\soc_inst|m0_1|u_logic|X4pvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|E9zvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & (\soc_inst|m0_1|u_logic|E9zvx4~1_combout  & (!\soc_inst|m0_1|u_logic|X4pvx4~combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z78wx4~7_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .lut_mask = 64'h103A000A153F050F;
+defparam \soc_inst|m0_1|u_logic|S9zvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y13_N44
+dffeas \soc_inst|m0_1|u_logic|Igi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|S9zvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jca3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Igi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jca3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jca3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Igi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Igi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X46_Y18_N19
-dffeas \soc_inst|m0_1|u_logic|Vfd3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vfd3z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y18_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Velvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Velvx4~1_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Velvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Igi2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( (!\soc_inst|m0_1|u_logic|Velvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Velvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vfd3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vfd3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Velvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Velvx4~1 .lut_mask = 64'hC0F0C0F080A080A0;
+defparam \soc_inst|m0_1|u_logic|Velvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y18_N4
-dffeas \soc_inst|m0_1|u_logic|Z4l2z4 (
+// Location: FF_X21_Y18_N13
+dffeas \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Velvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4l2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z4l2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~0 (
+// Location: LABCELL_X22_Y24_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6xwx4~0_combout  = ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( (\soc_inst|m0_1|u_logic|Uqi2z4~q ) # (\soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|K3uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( \soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E0uvx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Uqi2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6xwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .lut_mask = 64'h00000F0F33333F3F;
-defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .lut_mask = 64'h8800000020002000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~1 (
+// Location: MLABCELL_X21_Y23_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5i3z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6xwx4~1_combout  = ( \soc_inst|m0_1|u_logic|K7pwx4~combout  & ( !\soc_inst|m0_1|u_logic|R6xwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z4l2z4~q  & ((!\soc_inst|m0_1|u_logic|Uls2z4~q ) # (!\soc_inst|m0_1|u_logic|Qwowx4~combout ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|K7pwx4~combout  & ( !\soc_inst|m0_1|u_logic|R6xwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uls2z4~q ) # (!\soc_inst|m0_1|u_logic|Qwowx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|J5i3z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R6xwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6xwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J5i3z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .lut_mask = 64'hFFCCF0C000000000;
-defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J5i3z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J5i3z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|J5i3z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|R6xwx4~2_combout  = ( \soc_inst|m0_1|u_logic|N1uvx4~combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|R6xwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Vfd3z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|N1uvx4~combout  & ( (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & !\soc_inst|m0_1|u_logic|R6xwx4~1_combout ) ) )
+// Location: FF_X21_Y23_N1
+dffeas \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J5i3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vfd3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R6xwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6xwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y23_N7
+dffeas \soc_inst|m0_1|u_logic|Y6i3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y6i3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .lut_mask = 64'h5500550055055505;
-defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y6i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6i3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Walwx4~0 (
+// Location: LABCELL_X22_Y24_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Walwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[23]~8_combout  & ( ((!\soc_inst|m0_1|u_logic|Uei3z4~q  & \soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[23]~8_combout  & ( (!\soc_inst|m0_1|u_logic|Uei3z4~q  & \soc_inst|m0_1|u_logic|I7owx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~5_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Y6i3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y6i3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Walwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Walwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Walwx4~0 .lut_mask = 64'h00AA00AA0FAF0FAF;
-defparam \soc_inst|m0_1|u_logic|Walwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .lut_mask = 64'h00C0008800000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Walwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Walwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Walwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Jca3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Walwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Jca3z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Jca3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R6xwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Walwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y24_N25
+dffeas \soc_inst|m0_1|u_logic|E143z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|E143z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Walwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Walwx4~1 .lut_mask = 64'hD0000000DD000000;
-defparam \soc_inst|m0_1|u_logic|Walwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E143z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|E143z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y17_N8
-dffeas \soc_inst|m0_1|u_logic|C3w2z4 (
+// Location: FF_X18_Y21_N31
+dffeas \soc_inst|m0_1|u_logic|Rro2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rro2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C3w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C3w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rro2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rro2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Omyvx4~0 (
+// Location: LABCELL_X23_Y24_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Omyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|C3w2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// \soc_inst|m0_1|u_logic|C3w2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rro2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|E143z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|E143z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rro2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Omyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .lut_mask = 64'h555F5555000A0000;
-defparam \soc_inst|m0_1|u_logic|Omyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .lut_mask = 64'h0000440000005000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Omyvx4~1 (
+// Location: MLABCELL_X21_Y24_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vr23z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Omyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Omyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Omyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (((\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Omyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Omyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hw2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C8rwx4~0_combout  & !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vr23z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|F6zvx4~1_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Omyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hw2wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vr23z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .lut_mask = 64'h3300BBAA3B0ABBAA;
-defparam \soc_inst|m0_1|u_logic|Omyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vr23z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vr23z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Vr23z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L6nwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|L6nwx4~combout  = ( !\soc_inst|m0_1|u_logic|C3w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Wxp2z4~q ))) ) )
+// Location: FF_X21_Y24_N55
+dffeas \soc_inst|m0_1|u_logic|Vr23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vr23z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vr23z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vr23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vr23z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L6nwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y21_N14
+dffeas \soc_inst|m0_1|u_logic|Na53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Na53z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L6nwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L6nwx4 .lut_mask = 64'h0008000800000000;
-defparam \soc_inst|m0_1|u_logic|L6nwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Na53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Na53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjyvx4~0 (
+// Location: LABCELL_X22_Y24_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & (!\soc_inst|m0_1|u_logic|L6nwx4~combout  & ((!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S6nwx4~combout  & !\soc_inst|m0_1|u_logic|L6nwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Na53z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Vr23z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S6nwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L6nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vr23z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Na53z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .lut_mask = 64'hA0A0A0A0A020A020;
-defparam \soc_inst|m0_1|u_logic|Wjyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .lut_mask = 64'h0202030000000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~1 (
+// Location: LABCELL_X22_Y24_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|O7zvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|O7zvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|O7zvx4~1_combout  & (!\soc_inst|m0_1|u_logic|O7zvx4~4_combout  & 
+// !\soc_inst|m0_1|u_logic|O7zvx4~5_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O7zvx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O7zvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O7zvx4~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O7zvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .lut_mask = 64'h3333333322202220;
-defparam \soc_inst|m0_1|u_logic|Amyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .lut_mask = 64'hA000000000000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y26_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Amyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( (!\soc_inst|m0_1|u_logic|C3w2z4~q  & !\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( (!\soc_inst|m0_1|u_logic|C3w2z4~q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (!\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) )
+// Location: FF_X18_Y21_N17
+dffeas \soc_inst|m0_1|u_logic|Wnt2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wnt2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wnt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wnt2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amyvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X22_Y21_N16
+dffeas \soc_inst|m0_1|u_logic|Fxu2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fxu2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .lut_mask = 64'hA8A8A0A000000000;
-defparam \soc_inst|m0_1|u_logic|Amyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fxu2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fxu2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amyvx4~2 (
+// Location: LABCELL_X22_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Amyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & \soc_inst|m0_1|u_logic|E6nwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Amyvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fxu2z4~q ) # ((\soc_inst|m0_1|u_logic|T31xx4~0_combout  & !\soc_inst|m0_1|u_logic|Wnt2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|R91xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T31xx4~0_combout  & !\soc_inst|m0_1|u_logic|Wnt2z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Amyvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wnt2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fxu2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Amyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .lut_mask = 64'h0333033303030303;
-defparam \soc_inst|m0_1|u_logic|Amyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .lut_mask = 64'h30303030FF30FF30;
+defparam \soc_inst|m0_1|u_logic|O7zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ykyvx4~0 (
+// Location: LABCELL_X22_Y24_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O7zvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X77wx4~combout  & (((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # (!\soc_inst|m0_1|u_logic|C3w2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) # ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|O7zvx4~combout  = ( \soc_inst|m0_1|u_logic|O7zvx4~6_combout  & ( !\soc_inst|m0_1|u_logic|O7zvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O7zvx4~8_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ft73z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qs7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ft73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O7zvx4~8_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|O7zvx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O7zvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .lut_mask = 64'hF0F0F0F0F0D0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ykyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O7zvx4 .lut_mask = 64'h00000D0D00000000;
+defparam \soc_inst|m0_1|u_logic|O7zvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4zvx4~0 (
+// Location: LABCELL_X23_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dih2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W4zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & !\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & !\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Palwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Dih2z4~0_combout  = ( \soc_inst|m0_1|u_logic|O7zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|O7zvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W4zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dih2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .lut_mask = 64'hAF0FAF0FAA00AA00;
-defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .lut_mask = 64'hFCFCFCFCFF33FF33;
+defparam \soc_inst|m0_1|u_logic|Dih2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4zvx4~1 (
+// Location: MLABCELL_X21_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F6zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W4zvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|W4zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Walwx4~1_combout  & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Walwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|F6zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|L9zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|C8zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|O7zvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|L9zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O7zvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4zvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|C8zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O7zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|L9zvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F6zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .lut_mask = 64'h54FC54FC00000000;
-defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .lut_mask = 64'h00000000FF0FCC0C;
+defparam \soc_inst|m0_1|u_logic|F6zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4qvx4 (
+// Location: MLABCELL_X25_Y21_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F6zvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4qvx4~combout  = ( \soc_inst|m0_1|u_logic|Z4qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|W4zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wsawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|F6zvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|E9zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|F6zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~9_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z4qvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F6zvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4qvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4qvx4 .lut_mask = 64'h00000000000000CD;
-defparam \soc_inst|m0_1|u_logic|Z4qvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .lut_mask = 64'h0000000000AF0000;
+defparam \soc_inst|m0_1|u_logic|F6zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y21_N7
-dffeas \soc_inst|m0_1|u_logic|Eol2z4 (
+// Location: FF_X19_Y21_N35
+dffeas \soc_inst|m0_1|u_logic|Gto2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eol2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gto2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eol2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eol2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gto2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gto2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y23_N43
-dffeas \soc_inst|m0_1|u_logic|Gf63z4 (
+// Location: LABCELL_X18_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Saqwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Fxu2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Gto2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Gto2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fxu2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Saqwx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .lut_mask = 64'h0000220000003000;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y21_N32
+dffeas \soc_inst|m0_1|u_logic|Rro2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rro2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rro2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rro2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~0 (
+// Location: LABCELL_X18_Y21_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bywwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Eol2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Gf63z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Saqwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rro2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Uu83z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eol2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gf63z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rro2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uu83z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bywwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Saqwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .lut_mask = 64'h2230000000000000;
-defparam \soc_inst|m0_1|u_logic|Bywwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .lut_mask = 64'h0000000000003120;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y21_N50
-dffeas \soc_inst|m0_1|u_logic|Gjt2z4 (
+// Location: LABCELL_X18_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Saqwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Wnt2z4~q )) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ft73z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wnt2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ft73z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Saqwx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .lut_mask = 64'h0000454000000000;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y21_N38
+dffeas \soc_inst|m0_1|u_logic|Wj63z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gjt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wj63z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gjt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gjt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wj63z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wj63z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X23_Y23_N32
-dffeas \soc_inst|m0_1|u_logic|Po73z4~DUPLICATE (
+// Location: FF_X21_Y24_N26
+dffeas \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Vuo2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po73z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po73z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~2 (
+// Location: LABCELL_X18_Y21_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bywwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Gjt2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Po73z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Saqwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wj63z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gjt2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Po73z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wj63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bywwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Saqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .lut_mask = 64'h0000232000000000;
-defparam \soc_inst|m0_1|u_logic|Bywwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .lut_mask = 64'h0000E20000000000;
+defparam \soc_inst|m0_1|u_logic|Saqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~1 (
+// Location: LABCELL_X18_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Saqwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bywwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Grl2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Spl2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Saqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Saqwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Saqwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Saqwx4~3_combout  & !\soc_inst|m0_1|u_logic|Saqwx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Grl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Spl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Saqwx4~3_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Saqwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Saqwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Saqwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bywwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Saqwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .lut_mask = 64'h0000003000000022;
-defparam \soc_inst|m0_1|u_logic|Bywwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Saqwx4 .lut_mask = 64'hAA00000000000000;
+defparam \soc_inst|m0_1|u_logic|Saqwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4~3 (
+// Location: MLABCELL_X28_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fwtwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bywwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Psu2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qml2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Fwtwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eruwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Saqwx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Saqwx4~combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qml2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Psu2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bywwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .lut_mask = 64'h0022000000300000;
-defparam \soc_inst|m0_1|u_logic|Bywwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|Fwtwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bywwx4 (
+// Location: MLABCELL_X28_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gftwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Gftwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gftwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gftwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Fwtwx4~0_combout  & \soc_inst|m0_1|u_logic|D5ywx4~0_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fwtwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gftwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .lut_mask = 64'h00550055FF55FF55;
+defparam \soc_inst|m0_1|u_logic|Gftwx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mouwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bywwx4~combout  = ( !\soc_inst|m0_1|u_logic|Bywwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Bywwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bywwx4~2_combout  & !\soc_inst|m0_1|u_logic|Bywwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Mouwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zetwx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zetwx4~combout  & \soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bywwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bywwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bywwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zetwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bywwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bywwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bywwx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Bywwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .lut_mask = 64'h0030003000CF00CF;
+defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkdwx4~0 (
+// Location: LABCELL_X29_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5ewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fkdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bywwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|F5ewx4~combout  = ( !\soc_inst|m0_1|u_logic|Mouwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gftwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F5ewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .lut_mask = 64'h0F0F0F0F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F5ewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5ewx4 .lut_mask = 64'hF3C0F3C000000000;
+defparam \soc_inst|m0_1|u_logic|F5ewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nodwx4~1 (
+// Location: LABCELL_X29_Y20_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxmwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nodwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fkdwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nodwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mouwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & (\soc_inst|m0_1|u_logic|Hxmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|F5ewx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Mouwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hxmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (!\soc_inst|m0_1|u_logic|F5ewx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nodwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hxmwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F5ewx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .lut_mask = 64'h00FF00FF55555555;
-defparam \soc_inst|m0_1|u_logic|Nodwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .lut_mask = 64'h0F0C0F0C0A080A08;
+defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y18_N7
-dffeas \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qfc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y22_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qe0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qe0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Yilwx4~0_combout  ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .lut_mask = 64'hF0F00000FCFCCCCC;
+defparam \soc_inst|m0_1|u_logic|Qe0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~0 (
+// Location: LABCELL_X30_Y22_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qe0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ihlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Qe0wx4~combout  = ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qe0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qe0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qe0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ))) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qe0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .lut_mask = 64'h0303030303FF03FF;
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qe0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qe0wx4 .lut_mask = 64'h3F0000003F003F00;
+defparam \soc_inst|m0_1|u_logic|Qe0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~1 (
+// Location: LABCELL_X17_Y18_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Je0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ihlwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|I2twx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # ((!\soc_inst|interconnect_1|HRDATA[3]~26_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[3]~26_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Je0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|U6awx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Lf0wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ihlwx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I2twx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lf0wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U6awx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Je0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .lut_mask = 64'hEBE8E0E0BEB2B0B0;
+defparam \soc_inst|m0_1|u_logic|Je0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mc0wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mc0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Je0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ce0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Je0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ce0wx4~combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Je0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mc0wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .lut_mask = 64'h0000CC4400000C04;
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mc0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mc0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qe0wx4~combout  & ( \soc_inst|m0_1|u_logic|Mc0wx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mc0wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .lut_mask = 64'hFAC8FAC800000000;
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .lut_mask = 64'h00000000000037FF;
+defparam \soc_inst|m0_1|u_logic|Mc0wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y19_N35
+dffeas \soc_inst|m0_1|u_logic|Bf93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bf93z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bf93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bf93z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~2 (
+// Location: LABCELL_X18_Y22_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ihlwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ihlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # ((\soc_inst|m0_1|u_logic|Wia3z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|I7owx4~combout  & (\soc_inst|m0_1|u_logic|W0b3z4~q  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Wia3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Bf93z4~q  & ( \soc_inst|m0_1|u_logic|B173z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bf93z4~q  & ( !\soc_inst|m0_1|u_logic|B173z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bf93z4~q  & ( !\soc_inst|m0_1|u_logic|B173z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wia3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ihlwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bf93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B173z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .lut_mask = 64'h000000008CAF8CAF;
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .lut_mask = 64'h1001100000010000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ihlwx4~3 (
+// Location: FF_X16_Y19_N37
+dffeas \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y22_N58
+dffeas \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mc0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y22_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ihlwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rw7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ihlwx4~2_combout  & (((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nodwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Rw7wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ihlwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Nodwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~7_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) ) # 
+// ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nodwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ihlwx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rw7wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .lut_mask = 64'h00CE00CE00DF00DF;
-defparam \soc_inst|m0_1|u_logic|Ihlwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .lut_mask = 64'h0000500000004400;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfzvx4~0 (
+// Location: LABCELL_X18_Y22_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qfzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|W6iwx4~combout  & ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rilwx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|W6iwx4~combout  & ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout  & (\soc_inst|m0_1|u_logic|Ebh3z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ka83z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ce0wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ka83z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ce0wx4~6_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ebh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ka83z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qfzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .lut_mask = 64'h0000AAAAFF00FFAA;
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .lut_mask = 64'hAA0A220200000000;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qfzvx4~1 (
+// Location: LABCELL_X17_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ce0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qfzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qfzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ce0wx4~combout  = ( \soc_inst|m0_1|u_logic|Ce0wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Ce0wx4~5_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qfzvx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ce0wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .lut_mask = 64'h0C0FCCFF00000000;
-defparam \soc_inst|m0_1|u_logic|Qfzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ce0wx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Ce0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~2 (
+// Location: LABCELL_X36_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[21]~15 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aihvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|R7iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & \soc_inst|m0_1|u_logic|H4nwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  = ( \soc_inst|m0_1|u_logic|Ce0wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ce0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ce0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aihvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .lut_mask = 64'h00FF00AA00FF0000;
-defparam \soc_inst|m0_1|u_logic|Aihvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .lut_mask = 64'h0B0B0B0B4F4F4F4F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[21]~15 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y25_N2
-dffeas \soc_inst|m0_1|u_logic|Xsx2z4 (
+// Location: FF_X36_Y17_N34
+dffeas \soc_inst|m0_1|u_logic|Ieh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ieh3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ieh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ieh3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X33_Y16_N49
+dffeas \soc_inst|m0_1|u_logic|Ogo2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -73657,70 +73521,70 @@ dffeas \soc_inst|m0_1|u_logic|Xsx2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xsx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ogo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xsx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xsx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ogo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ogo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~1 (
+// Location: LABCELL_X33_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~69 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xsx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) 
-// # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xsx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~21_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xsx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Add2~21_sumout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xsx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~21_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~46  ))
+// \soc_inst|m0_1|u_logic|Add0~70  = CARRY(( !\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~46  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~21_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xsx2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~46 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aihvx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~69_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~70 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .lut_mask = 64'hFA00FAFFC800C8CC;
-defparam \soc_inst|m0_1|u_logic|Aihvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~69 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add0~69 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aihvx4~0 (
+// Location: LABCELL_X33_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nnmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aihvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Aihvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qfzvx4~1_combout  & (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aihvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Aihvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Nnmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ogo2z4~q  & ( \soc_inst|m0_1|u_logic|Add0~69_sumout  & ( ((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # ((\soc_inst|m0_1|u_logic|Ieh3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ogo2z4~q  & ( \soc_inst|m0_1|u_logic|Add0~69_sumout  & ( ((\soc_inst|m0_1|u_logic|Ieh3z4~q  & (\soc_inst|m0_1|u_logic|Tna3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ogo2z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~69_sumout  & ( (((!\soc_inst|m0_1|u_logic|Tna3z4~q ) # (!\soc_inst|m0_1|u_logic|Mxtvx4~combout )) # (\soc_inst|m0_1|u_logic|Ieh3z4~q )) 
+// # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ogo2z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~69_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Ieh3z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qfzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Aihvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aihvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ieh3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add0~69_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .lut_mask = 64'h00000000F0F00010;
-defparam \soc_inst|m0_1|u_logic|Aihvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .lut_mask = 64'h5F57FFF75557F5F7;
+defparam \soc_inst|m0_1|u_logic|Nnmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y25_N1
-dffeas \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE (
+// Location: FF_X33_Y16_N50
+dffeas \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Aihvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nnmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -73729,74 +73593,69 @@ dffeas \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y15_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vezvx4 (
+// Location: LABCELL_X33_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~85 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vezvx4~combout  = ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~89_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// (\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add3~17_sumout ) # (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add0~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ddi3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~70  ))
+// \soc_inst|m0_1|u_logic|Add0~86  = CARRY(( !\soc_inst|m0_1|u_logic|Ddi3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~70  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~17_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~89_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~70 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vezvx4~combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~85_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add0~86 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vezvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vezvx4 .lut_mask = 64'hBBB0BBB0BBB00000;
-defparam \soc_inst|m0_1|u_logic|Vezvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~85 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~85 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~85 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y15_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Galvx4~0 (
+// Location: LABCELL_X33_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gnmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Galvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( \soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// (\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( \soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( !\soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( !\soc_inst|m0_1|u_logic|Vezvx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
-// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Gnmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ddi3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ddi3z4~q  & ( \soc_inst|m0_1|u_logic|Txtvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ddi3z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & (!\soc_inst|m0_1|u_logic|Add0~85_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Cma3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ddi3z4~q  & ( !\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|Add0~85_sumout )) # (\soc_inst|m0_1|u_logic|Mxtvx4~combout  & ((\soc_inst|m0_1|u_logic|Cma3z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vezvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add0~85_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cma3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Galvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Galvx4~0 .lut_mask = 64'h0B00FB000B0BFBFB;
-defparam \soc_inst|m0_1|u_logic|Galvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .lut_mask = 64'h00A3FFA3FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Gnmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y15_N13
-dffeas \soc_inst|m0_1|u_logic|Hak2z4 (
+// Location: FF_X33_Y21_N55
+dffeas \soc_inst|m0_1|u_logic|Ddi3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Galvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Gnmvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -73805,1033 +73664,942 @@ dffeas \soc_inst|m0_1|u_logic|Hak2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ddi3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hak2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hak2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ddi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ddi3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X34_Y19_N56
-dffeas \soc_inst|m0_1|u_logic|Wnh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wnh3z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jca3z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jca3z4~0_combout  = !\soc_inst|m0_1|u_logic|V4ovx4~0_combout 
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wnh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wnh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .lut_mask = 64'hFF00FF00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Jca3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y19_N35
-dffeas \soc_inst|m0_1|u_logic|Rd53z4 (
+// Location: FF_X33_Y21_N20
+dffeas \soc_inst|m0_1|u_logic|Jca3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Jca3z4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rd53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Jca3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rd53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rd53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jca3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jca3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y25_N13
-dffeas \soc_inst|m0_1|u_logic|I443z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I443z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add0~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add0~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Uei3z4~q  ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add0~86  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add0~86 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add0~5_sumout ),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I443z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I443z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add0~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add0~5 .lut_mask = 64'h000000000000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add0~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~0 (
+// Location: LABCELL_X33_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zmmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fm72z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|I443z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rd53z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q 
-//  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I443z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Rd53z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zmmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uei3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # (((\soc_inst|m0_1|u_logic|Jca3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uei3z4~q  & ( \soc_inst|m0_1|u_logic|Add0~5_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Jca3z4~q  & \soc_inst|m0_1|u_logic|Mxtvx4~combout 
+// ))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uei3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~5_sumout  & ( (!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ) # (((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Jca3z4~q )) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uei3z4~q  & ( !\soc_inst|m0_1|u_logic|Add0~5_sumout  & ( ((\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Mxtvx4~combout ) # (\soc_inst|m0_1|u_logic|Jca3z4~q )))) # (\soc_inst|m0_1|u_logic|Txtvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rd53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I443z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jca3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mxtvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add0~5_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fm72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zmmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .lut_mask = 64'h000000C800000008;
-defparam \soc_inst|m0_1|u_logic|Fm72z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .lut_mask = 64'h7737FFBF3337BBBF;
+defparam \soc_inst|m0_1|u_logic|Zmmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y18_N40
-dffeas \soc_inst|m0_1|u_logic|Hmh3z4 (
+// Location: FF_X33_Y20_N11
+dffeas \soc_inst|m0_1|u_logic|Uei3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zmmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hmh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Uei3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hmh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hmh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uei3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uei3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Co72z4~0 (
+// Location: LABCELL_X33_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Co72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hmh3z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Oytvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K7g3z4~q  & ( \soc_inst|m0_1|u_logic|Uei3z4~q  & ( (\soc_inst|m0_1|u_logic|Ddi3z4~q  & (\soc_inst|m0_1|u_logic|S3i3z4~q  & \soc_inst|m0_1|u_logic|Z2h3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hmh3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ddi3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|S3i3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z2h3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Co72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oytvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Co72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Co72z4~0 .lut_mask = 64'h0000000008000000;
-defparam \soc_inst|m0_1|u_logic|Co72z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y18_N38
-dffeas \soc_inst|m0_1|u_logic|Zu23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zu23z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zu23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zu23z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X28_Y23_N8
-dffeas \soc_inst|m0_1|u_logic|Ql13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ql13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ql13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .lut_mask = 64'h0000000000000101;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~1 (
+// Location: MLABCELL_X39_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fm72z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ql13z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zu23z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Oytvx4~1_combout  = ( \soc_inst|m0_1|u_logic|She3z4~q  & ( (\soc_inst|m0_1|u_logic|Dhb3z4~q  & (\soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|C4b3z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zu23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ql13z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|C4b3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|She3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fm72z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oytvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .lut_mask = 64'h0000C08800000000;
-defparam \soc_inst|m0_1|u_logic|Fm72z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y22_N11
-dffeas \soc_inst|m0_1|u_logic|Djh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Djh3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Djh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Djh3z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X37_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oytvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Zva3z4~q  & ( (\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qxa3z4~q  & \soc_inst|m0_1|u_logic|Iua3z4~q )) ) )
 
-// Location: FF_X27_Y22_N17
-dffeas \soc_inst|m0_1|u_logic|Skh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Skh3z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qxa3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Iua3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zva3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Oytvx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Skh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~2 (
+// Location: LABCELL_X36_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fm72z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Djh3z4~q  & ( \soc_inst|m0_1|u_logic|Skh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Djh3z4~q  & ( !\soc_inst|m0_1|u_logic|Skh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Djh3z4~q  & ( !\soc_inst|m0_1|u_logic|Skh3z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Oytvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ogo2z4~q  & ( \soc_inst|m0_1|u_logic|Jpa3z4~q  & ( (\soc_inst|m0_1|u_logic|Ara3z4~q  & (\soc_inst|m0_1|u_logic|O0o2z4~q  & \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Djh3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Skh3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O0o2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ogo2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fm72z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oytvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .lut_mask = 64'h2020200000200000;
-defparam \soc_inst|m0_1|u_logic|Fm72z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .lut_mask = 64'h0000000000000101;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fm72z4~3 (
+// Location: LABCELL_X37_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fm72z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fm72z4~2_combout  & ( (\soc_inst|m0_1|u_logic|Wnh3z4~q  & (!\soc_inst|m0_1|u_logic|Fm72z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Co72z4~0_combout  & !\soc_inst|m0_1|u_logic|Fm72z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fm72z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Fm72z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Co72z4~0_combout  & !\soc_inst|m0_1|u_logic|Fm72z4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Oytvx4~4_combout  = ( \soc_inst|m0_1|u_logic|M2b3z4~q  & ( \soc_inst|m0_1|u_logic|Oytvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Oytvx4~3_combout  & (\soc_inst|m0_1|u_logic|W0b3z4~q  & \soc_inst|m0_1|u_logic|Rsa3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wnh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fm72z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Co72z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fm72z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fm72z4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Oytvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W0b3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rsa3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M2b3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oytvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fm72z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oytvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .lut_mask = 64'hC000400000000000;
-defparam \soc_inst|m0_1|u_logic|Fm72z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .lut_mask = 64'h0000000000000003;
+defparam \soc_inst|m0_1|u_logic|Oytvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsnvx4~0 (
+// Location: LABCELL_X33_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oytvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Hak2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Hak2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) # (\soc_inst|m0_1|u_logic|Hak2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fm72z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|S8k2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Hak2z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Oytvx4~combout  = ( \soc_inst|m0_1|u_logic|M5f3z4~q  & ( (\soc_inst|m0_1|u_logic|Oytvx4~0_combout  & (\soc_inst|m0_1|u_logic|Aze3z4~q  & (\soc_inst|m0_1|u_logic|Oytvx4~1_combout  & \soc_inst|m0_1|u_logic|Oytvx4~4_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|S8k2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fm72z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oytvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Aze3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Oytvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oytvx4~4_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M5f3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oytvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .lut_mask = 64'h3530353F35303530;
-defparam \soc_inst|m0_1|u_logic|Lsnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oytvx4 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Oytvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hrcvx4 (
+// Location: LABCELL_X33_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3uvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hrcvx4~combout  = ( \soc_inst|m0_1|u_logic|Lsnvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Lsnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Donvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|R3uvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|F2o2z4~q  & ( (\soc_inst|m0_1|u_logic|Oytvx4~combout  & \soc_inst|m0_1|u_logic|Tna3z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oytvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tna3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lsnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F2o2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hrcvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hrcvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hrcvx4 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Hrcvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|R3uvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~85 (
+// Location: MLABCELL_X39_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbmvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~85_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Sscvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~90  ))
-// \soc_inst|m0_1|u_logic|Add5~86  = CARRY(( !\soc_inst|m0_1|u_logic|Sscvx4~combout  ) + ( (!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ijcwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) + ( \soc_inst|m0_1|u_logic|Add5~90  ))
+// \soc_inst|m0_1|u_logic|Rbmvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|K3l2z4~q  & (!\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & \soc_inst|m0_1|u_logic|V3o2z4~q ))) # (\soc_inst|m0_1|u_logic|R3uvx4~0_combout ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Txtvx4~0_combout  & \soc_inst|m0_1|u_logic|V3o2z4~q )) # (\soc_inst|m0_1|u_logic|R3uvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sscvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Txtvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V3o2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~90 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~85_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add5~86 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~85 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~85 .lut_mask = 64'h000000D30000FF00;
-defparam \soc_inst|m0_1|u_logic|Add5~85 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C3qvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|C3qvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|C3qvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add5~85_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C3qvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rbmvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .lut_mask = 64'h00000000008A0000;
-defparam \soc_inst|m0_1|u_logic|C3qvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X27_Y20_N22
-dffeas \soc_inst|m0_1|u_logic|Zu33z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zu33z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zu33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zu33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .lut_mask = 64'h55F555F555755575;
+defparam \soc_inst|m0_1|u_logic|Rbmvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y22_N2
-dffeas \soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE (
+// Location: FF_X39_Y20_N25
+dffeas \soc_inst|m0_1|u_logic|V3o2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rbmvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|V3o2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V3o2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V3o2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~2 (
+// Location: LABCELL_X31_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zu33z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zu33z4~q  & 
-// \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zu33z4~q  & \soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|X2rvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zu33z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .lut_mask = 64'h0C0C0C0CFFFF0C0C;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|X2rvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y25_N58
-dffeas \soc_inst|m0_1|u_logic|Hc13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hc13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hc13z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X31_Y22_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Wfuwx4~combout ))) # (\soc_inst|m0_1|u_logic|V3o2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & \soc_inst|m0_1|u_logic|Wfuwx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( \soc_inst|m0_1|u_logic|V3o2z4~q  ) ) )
 
-// Location: FF_X31_Y18_N38
-dffeas \soc_inst|m0_1|u_logic|Vhk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vhk2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vhk2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|V3o2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vhk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vhk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .lut_mask = 64'h0000555500305575;
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~0 (
+// Location: LABCELL_X31_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I21wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vhk2z4~q  & ( (\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & !\soc_inst|m0_1|u_logic|Hc13z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Vhk2z4~q  & ( ((\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Hc13z4~q )) # (\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|I21wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Phlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Yilwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hc13z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vhk2z4~q ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I21wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .lut_mask = 64'h5F0F55005F0F5500;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I21wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I21wx4~0 .lut_mask = 64'h33031101FF0F5505;
+defparam \soc_inst|m0_1|u_logic|I21wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~1 (
+// Location: LABCELL_X30_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I21wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ohh3z4~q  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ggk2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ohh3z4~q  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ggk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ohh3z4~q  ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ohh3z4~q  & ( (\soc_inst|m0_1|u_logic|U71xx4~0_combout  & !\soc_inst|m0_1|u_logic|Ggk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|I21wx4~combout  = ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|I21wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Yilwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|I21wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ggk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I21wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I21wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .lut_mask = 64'h3030FFFF30303030;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I21wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I21wx4 .lut_mask = 64'h0000000000FDFDFD;
+defparam \soc_inst|m0_1|u_logic|I21wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I453z4~feeder (
+// Location: MLABCELL_X39_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~97 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I453z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C3qvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Add2~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jwf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~102  ))
+// \soc_inst|m0_1|u_logic|Add2~98  = CARRY(( !\soc_inst|m0_1|u_logic|Jwf3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~102  ))
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~102 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I453z4~feeder_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~97_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~98 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I453z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I453z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|I453z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~97 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~97 .lut_mask = 64'h0000FFFF0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Add2~97 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y18_N1
-dffeas \soc_inst|m0_1|u_logic|I453z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|I453z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I453z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I453z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I453z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X39_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~93 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~93_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~98  ))
+// \soc_inst|m0_1|u_logic|Add2~94  = CARRY(( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~98  ))
 
-// Location: FF_X34_Y18_N20
-dffeas \soc_inst|m0_1|u_logic|Ql23z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ql23z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~98 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~93_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~94 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ql23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~93 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~93 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~93 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~3 (
+// Location: LABCELL_X12_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qjhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ql23z4~q  & ( (\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & !\soc_inst|m0_1|u_logic|I453z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ql23z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & !\soc_inst|m0_1|u_logic|I453z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add2~93_sumout  ) ) ) # ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Dkx2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I453z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ql23z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~93_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dkx2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qjhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .lut_mask = 64'h30FF30FF30303030;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y17_N11
-dffeas \soc_inst|m0_1|u_logic|Nf03z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nf03z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nf03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nf03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .lut_mask = 64'h0000CCCC5555CCCC;
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N31
-dffeas \soc_inst|m0_1|u_logic|Tiz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tiz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tiz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tiz2z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X12_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tjlwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) ) ) )
 
-// Location: FF_X33_Y18_N5
-dffeas \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .lut_mask = 64'hAFFF0000BFFF0000;
+defparam \soc_inst|m0_1|u_logic|Tjlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~4 (
+// Location: LABCELL_X13_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qjhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tiz2z4~q  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nf03z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nf03z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & (\soc_inst|m0_1|u_logic|Tiz2z4~q  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nf03z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|N71xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|L61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nf03z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Qjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~69_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|I21wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~69_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|I21wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nf03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tiz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I21wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qjhvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qjhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .lut_mask = 64'hB0B000B0BBBB00BB;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .lut_mask = 64'h00000000CF008A00;
+defparam \soc_inst|m0_1|u_logic|Qjhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y18_N26
-dffeas \soc_inst|m0_1|u_logic|Rek2z4 (
+// Location: FF_X13_Y17_N46
+dffeas \soc_inst|m0_1|u_logic|Dkx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qjhvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rek2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dkx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rek2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rek2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dkx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dkx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y18_N25
-dffeas \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X39_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~89 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~89_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~94  ))
+// \soc_inst|m0_1|u_logic|Add2~90  = CARRY(( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~94  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~94 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~89_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~90 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~89 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~89 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~89 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~5 (
+// Location: MLABCELL_X39_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rd63z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Rd63z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Plx2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add2~89_sumout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rd63z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Plx2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~89_sumout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jjhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .lut_mask = 64'h0200010102000000;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .lut_mask = 64'h00000F0FAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~6 (
+// Location: LABCELL_X12_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~6_combout  = ( \soc_inst|m0_1|u_logic|Rht2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aru2z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rht2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aru2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Jjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mx0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~73_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mx0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add5~73_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aru2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rht2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jjhvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~73_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mx0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .lut_mask = 64'h0000000032000200;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .lut_mask = 64'h00000000A800A8A8;
+defparam \soc_inst|m0_1|u_logic|Jjhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4~7 (
+// Location: FF_X12_Y17_N43
+dffeas \soc_inst|m0_1|u_logic|Plx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Jjhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Plx2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Plx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Plx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~73 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Izpvx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Izpvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Rek2z4~q  & (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|An73z4~q )))) # (\soc_inst|m0_1|u_logic|Rek2z4~q  & (((!\soc_inst|m0_1|u_logic|S61xx4~0_combout )) # (\soc_inst|m0_1|u_logic|An73z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~73_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~90  ))
+// \soc_inst|m0_1|u_logic|Add2~74  = CARRY(( !\soc_inst|m0_1|u_logic|Bnx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~90  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rek2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|An73z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Izpvx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~6_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~90 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~7_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~73_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~74 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .lut_mask = 64'hF531000000000000;
-defparam \soc_inst|m0_1|u_logic|Izpvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~73 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~73 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~73 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X12_Y17_N26
+dffeas \soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Izpvx4 (
+// Location: LABCELL_X12_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Izpvx4~combout  = ( \soc_inst|m0_1|u_logic|Izpvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Izpvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Izpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Izpvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Izpvx4~1_combout  & !\soc_inst|m0_1|u_logic|Izpvx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Cjhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~73_sumout  & ( \soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & \soc_inst|m0_1|u_logic|S5pvx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Add2~73_sumout  & ( !\soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~73_sumout  & ( 
+// !\soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Izpvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Izpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Izpvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Izpvx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Izpvx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Izpvx4~7_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add2~73_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Izpvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Izpvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Izpvx4 .lut_mask = 64'h0000000000008000;
-defparam \soc_inst|m0_1|u_logic|Izpvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .lut_mask = 64'h333333FF000000CC;
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Whh2z4~0 (
+// Location: LABCELL_X12_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cjhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Whh2z4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Izpvx4~combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) # (\soc_inst|m0_1|u_logic|Izpvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Izpvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Cjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Et0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Et0wx4~combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ijcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Izpvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cjhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Et0wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Whh2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .lut_mask = 64'hFCFFFCFFFC0FFC0F;
-defparam \soc_inst|m0_1|u_logic|Whh2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .lut_mask = 64'h00000000CC0C8808;
+defparam \soc_inst|m0_1|u_logic|Cjhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y17_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mdzvx4~1 (
+// Location: FF_X12_Y17_N25
+dffeas \soc_inst|m0_1|u_logic|Bnx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cjhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bnx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bnx2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fq0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (\soc_inst|m0_1|u_logic|Ehcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Mdzvx4~0_combout  & \soc_inst|m0_1|u_logic|Lhyvx4~2_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (\soc_inst|m0_1|u_logic|Ehcwx4~0_combout  & \soc_inst|m0_1|u_logic|Mdzvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Fq0wx4~combout  = ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~69_sumout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~21_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~69_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~69_sumout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs0wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~21_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~69_sumout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ehcwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mdzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add3~69_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qs0wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~21_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .lut_mask = 64'h0505050500050005;
-defparam \soc_inst|m0_1|u_logic|Mdzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fq0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fq0wx4 .lut_mask = 64'h000F555F333F777F;
+defparam \soc_inst|m0_1|u_logic|Fq0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fdzvx4~0 (
+// Location: MLABCELL_X21_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irjvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fdzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bspvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mdzvx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Irjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|Fq0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( \soc_inst|m0_1|u_logic|Fq0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W5p2z4~q  & ( !\soc_inst|m0_1|u_logic|Fq0wx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W5p2z4~q  & ( !\soc_inst|m0_1|u_logic|Fq0wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bnx2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mdzvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bnx2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Irjvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .lut_mask = 64'h000000000000777F;
-defparam \soc_inst|m0_1|u_logic|Fdzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .lut_mask = 64'h00CFFFCF008AAA8A;
+defparam \soc_inst|m0_1|u_logic|Irjvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y21_N26
-dffeas \soc_inst|m0_1|u_logic|Kt23z4 (
+// Location: FF_X21_Y15_N31
+dffeas \soc_inst|m0_1|u_logic|W5p2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Irjvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kt23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|W5p2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kt23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kt23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|W5p2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W5p2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X28_Y17_N37
-dffeas \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE (
+// Location: FF_X18_Y15_N20
+dffeas \soc_inst|m0_1|u_logic|M0i3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|M0i3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M0i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M0i3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~3 (
+// Location: LABCELL_X18_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X892z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kt23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Kt23z4~q  & \soc_inst|m0_1|u_logic|Ld1xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|X892z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xyh3z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kt23z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xyh3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X892z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .lut_mask = 64'h0AFF0AFF0A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X892z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X892z4~0 .lut_mask = 64'h0020000000000000;
+defparam \soc_inst|m0_1|u_logic|X892z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Noo2z4~q  & ( (\soc_inst|m0_1|u_logic|Sl03z4~q  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ))) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Noo2z4~q  & ( (!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Noo2z4~q  
-// & ( (\soc_inst|m0_1|u_logic|Sl03z4~q  & (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L61xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Noo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N71xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Yoz2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yoz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|N71xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sl03z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Noo2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X18_Y15_N29
+dffeas \soc_inst|m0_1|u_logic|Pa33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pa33z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .lut_mask = 64'hDD000D00DDDD0D0D;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pa33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pa33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y20_N23
-dffeas \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE (
+// Location: FF_X17_Y16_N49
+dffeas \soc_inst|m0_1|u_logic|G123z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
@@ -74839,309 +74607,328 @@ dffeas \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|G123z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G123z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G123z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~0 (
+// Location: LABCELL_X18_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jlo2z4~q  & ( (\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & !\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Jlo2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & !\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|A792z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pa33z4~q  & ( \soc_inst|m0_1|u_logic|G123z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pa33z4~q  & ( !\soc_inst|m0_1|u_logic|G123z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pa33z4~q  & ( !\soc_inst|m0_1|u_logic|G123z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jlo2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pa33z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G123z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A792z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .lut_mask = 64'h5F555F550F000F00;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~1 .lut_mask = 64'h00C0008000400000;
+defparam \soc_inst|m0_1|u_logic|A792z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cqo2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ujo2z4~q  & \soc_inst|m0_1|u_logic|U71xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cqo2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Ujo2z4~q  & 
-// \soc_inst|m0_1|u_logic|U71xx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ujo2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X13_Y15_N38
+dffeas \soc_inst|m0_1|u_logic|Tvh3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tvh3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .lut_mask = 64'h33F333F300F000F0;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tvh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y23_N1
-dffeas \soc_inst|m0_1|u_logic|Ymo2z4 (
+// Location: FF_X13_Y15_N31
+dffeas \soc_inst|m0_1|u_logic|Ixh3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ymo2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ixh3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ymo2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ymo2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ixh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ixh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~5 (
+// Location: LABCELL_X13_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Ll63z4~q  & ( \soc_inst|m0_1|u_logic|Jw83z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ll63z4~q  & ( !\soc_inst|m0_1|u_logic|Jw83z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll63z4~q  & ( !\soc_inst|m0_1|u_logic|Jw83z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|A792z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tvh3z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Ixh3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ll63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jw83z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tvh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ixh3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A792z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .lut_mask = 64'h0021000100200000;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~2 .lut_mask = 64'h0000C00000008080;
+defparam \soc_inst|m0_1|u_logic|A792z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y21_N10
-dffeas \soc_inst|m0_1|u_logic|Uyu2z4 (
+// Location: FF_X15_Y17_N23
+dffeas \soc_inst|m0_1|u_logic|Yj43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uyu2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Yj43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uyu2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uyu2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Yj43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yj43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~6 (
+// Location: FF_X13_Y15_N29
+dffeas \soc_inst|m0_1|u_logic|Ht53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ht53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ht53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ht53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X13_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Lpt2z4~q  & ( \soc_inst|m0_1|u_logic|Uyu2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lpt2z4~q  & ( !\soc_inst|m0_1|u_logic|Uyu2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lpt2z4~q  & ( !\soc_inst|m0_1|u_logic|Uyu2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|A792z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Ht53z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yj43z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lpt2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uyu2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yj43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ht53z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A792z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .lut_mask = 64'h0044000400400000;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~0 .lut_mask = 64'h0000000022003000;
+defparam \soc_inst|m0_1|u_logic|A792z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~7 (
+// Location: LABCELL_X18_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A792z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~7_combout  = ( \soc_inst|m0_1|u_logic|Uu73z4~q  & ( !\soc_inst|m0_1|u_logic|Rtpvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ymo2z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uu73z4~q  & ( !\soc_inst|m0_1|u_logic|Rtpvx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout  & (!\soc_inst|m0_1|u_logic|S61xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ymo2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|A792z4~3_combout  = ( !\soc_inst|m0_1|u_logic|A792z4~2_combout  & ( !\soc_inst|m0_1|u_logic|A792z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X892z4~0_combout  & (!\soc_inst|m0_1|u_logic|A792z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|M0i3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ymo2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rtpvx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uu73z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M0i3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|X892z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A792z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|A792z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A792z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A792z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .lut_mask = 64'hB000B0B000000000;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A792z4~3 .lut_mask = 64'hC040000000000000;
+defparam \soc_inst|m0_1|u_logic|A792z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y25_N59
-dffeas \soc_inst|m0_1|u_logic|Fio2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fio2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X21_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wo0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|L7p2z4~q  & ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|W5p2z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|L7p2z4~q  & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|A792z4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~q  & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|W5p2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|A792z4~3_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W5p2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A792z4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L7p2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fio2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fio2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .lut_mask = 64'hDDD88D88DDDD8D8D;
+defparam \soc_inst|m0_1|u_logic|Wo0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y25_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4~2 (
+// Location: LABCELL_X17_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Un0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|T243z4~q  & ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fio2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|T243z4~q  & ( 
-// \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fio2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|T243z4~q  & ( !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Ab1xx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Un0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wo0wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Oaawx4~1_combout  $ 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fio2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|T243z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Oaawx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wo0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Un0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .lut_mask = 64'h0F0F0000CFCFCCCC;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .lut_mask = 64'hFCF3FCF3E2B80000;
+defparam \soc_inst|m0_1|u_logic|Un0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtpvx4 (
+// Location: LABCELL_X18_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xl0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtpvx4~combout  = ( \soc_inst|m0_1|u_logic|Rtpvx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Rtpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~3_combout  & (\soc_inst|m0_1|u_logic|Rtpvx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Rtpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xl0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Un0wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Un0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Un0wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nn0wx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rtpvx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rtpvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rtpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rtpvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rtpvx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rtpvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Un0wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xl0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtpvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtpvx4 .lut_mask = 64'h0000200000000000;
-defparam \soc_inst|m0_1|u_logic|Rtpvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .lut_mask = 64'h00B0000000B000B0;
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Et7wx4~0 (
+// Location: LABCELL_X18_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xl0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Et7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Tq7wx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Tq7wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Cuxwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|Tq7wx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Xl0wx4~1_combout  & (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bo0wx4~combout  & ( (\soc_inst|m0_1|u_logic|Xl0wx4~1_combout  & 
+// ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|D31wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cuxwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xl0wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .lut_mask = 64'h028A46CE139B57DF;
-defparam \soc_inst|m0_1|u_logic|Et7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .lut_mask = 64'h0000000013131333;
+defparam \soc_inst|m0_1|u_logic|Xl0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mj7wx4~0 (
+// Location: LABCELL_X17_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ecp2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mj7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & !\soc_inst|m0_1|u_logic|Svxwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ecp2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Xl0wx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ecp2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .lut_mask = 64'h5000500000000000;
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ecp2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ecp2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ecp2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y21_N37
-dffeas \soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE (
+// Location: FF_X17_Y14_N50
+dffeas \soc_inst|m0_1|u_logic|Ecp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ksm2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ecp2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -75150,1076 +74937,1014 @@ dffeas \soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE (
 	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ecp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ecp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ecp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X23_Y19_N53
-dffeas \soc_inst|m0_1|u_logic|It63z4 (
+// Location: FF_X17_Y16_N50
+dffeas \soc_inst|m0_1|u_logic|G123z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|It63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|G123z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|It63z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X23_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qowwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|R283z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// ( !\soc_inst|m0_1|u_logic|Ixt2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|It63z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
-//  & ( !\soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE_q  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ixt2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|It63z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R283z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qowwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .lut_mask = 64'hAAAAF0F0CCCCFF00;
-defparam \soc_inst|m0_1|u_logic|Qowwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X24_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qowwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ipm2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|G493z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|G493z4~q ) # (!\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ipm2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wqm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|R6v2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wqm2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|R6v2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Wqm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|G493z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|R6v2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ipm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qowwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .lut_mask = 64'hAAF0AAF0FFCC00CC;
-defparam \soc_inst|m0_1|u_logic|Qowwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X23_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qowwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qowwx4~combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qowwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Qowwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qowwx4~1_combout  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qowwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Qowwx4~1_combout  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qowwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qowwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qowwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qowwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qowwx4 .lut_mask = 64'h000F0000000F00FF;
-defparam \soc_inst|m0_1|u_logic|Qowwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ok7wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qowwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xowwx4~combout  ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xowwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qowwx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G123z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G123z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jl7wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jl7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & !\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wai2z4~q  & \soc_inst|m0_1|u_logic|Wkxvx4~0_combout )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+// Location: LABCELL_X17_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nn0wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G123z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Ecp2z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ecp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G123z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .lut_mask = 64'h88A888A888888888;
-defparam \soc_inst|m0_1|u_logic|Jl7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .lut_mask = 64'h00008080A0000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mj7wx4~1 (
+// Location: FF_X18_Y15_N19
+dffeas \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X17_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nr2xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mj7wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mj7wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Nr2xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mj7wx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|Mj7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .lut_mask = 64'h0800000000000000;
+defparam \soc_inst|m0_1|u_logic|Nr2xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nu7wx4~0 (
+// Location: FF_X13_Y15_N28
+dffeas \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nu7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|S08wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|B28wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|S08wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (\soc_inst|m0_1|u_logic|B28wx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|S08wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|B28wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Q7ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ((\soc_inst|m0_1|u_logic|S08wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|B28wx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Pa33z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Pa33z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Pa33z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B28wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S08wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q7ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pa33z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .lut_mask = 64'h010D313DC1CDF1FD;
-defparam \soc_inst|m0_1|u_logic|Nu7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .lut_mask = 64'h0050004000000040;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~2 (
+// Location: FF_X21_Y12_N31
+dffeas \soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Xvjvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X21_Y19_N37
+dffeas \soc_inst|m0_1|u_logic|Pap2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xl0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pap2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pap2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pap2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Et7wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ark2z4~q  
-// & ((!\soc_inst|m0_1|u_logic|Nu7wx4~0_combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pap2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pap2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pap2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nu7wx4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pap2z4~q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .lut_mask = 64'hAA0AA8A8A000A8A8;
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .lut_mask = 64'h8200020080000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~0 (
+// Location: LABCELL_X13_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dtpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Et7wx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Et7wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jl7wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Dtpvx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tvh3z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ixh3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Et7wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jl7wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dtpvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ixh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tvh3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .lut_mask = 64'h00000000FFFFFA88;
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .lut_mask = 64'h080800000C000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~129 (
+// Location: MLABCELL_X15_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~129_sumout  = SUM(( GND ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add5~78  ))
+// \soc_inst|m0_1|u_logic|Nn0wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|A9p2z4~q  & ( \soc_inst|m0_1|u_logic|Yj43z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|A9p2z4~q  & ( !\soc_inst|m0_1|u_logic|Yj43z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A9p2z4~q  & ( !\soc_inst|m0_1|u_logic|Yj43z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|A9p2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yj43z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add5~78 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add5~129_sumout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ),
+	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~129 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~129 .lut_mask = 64'h0000FFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Add5~129 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .lut_mask = 64'h0050004000100000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dtpvx4~1 (
+// Location: LABCELL_X17_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dtpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~129_sumout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~129_sumout  & ( ((!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Nn0wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Nn0wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nn0wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Nr2xx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Nn0wx4~3_combout  & !\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dtpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mj7wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~129_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nn0wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nr2xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nn0wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nn0wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nn0wx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .lut_mask = 64'hF5D5F5D5A080A080;
-defparam \soc_inst|m0_1|u_logic|Dtpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zei2z4~0 (
+// Location: LABCELL_X17_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nn0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zei2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~combout  & !\soc_inst|m0_1|u_logic|K0qvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|K0qvx4~combout  & (!\soc_inst|m0_1|u_logic|Rtpvx4~combout )) # (\soc_inst|m0_1|u_logic|K0qvx4~combout  & ((\soc_inst|m0_1|u_logic|X4pvx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Nn0wx4~combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Nn0wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K0qvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Nn0wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zei2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .lut_mask = 64'hAA0FAA0FAA00AA00;
-defparam \soc_inst|m0_1|u_logic|Zei2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nn0wx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Nn0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zei2z4~1 (
+// Location: LABCELL_X36_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[19]~14 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zei2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Zei2z4~q  & ( \soc_inst|m0_1|u_logic|Zei2z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q  & ( \soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Lqpvx4~0_combout  
-// ) ) ) # ( \soc_inst|m0_1|u_logic|Zei2z4~q  & ( !\soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zei2z4~q  & ( !\soc_inst|m0_1|u_logic|Zei2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lqpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  = ( \soc_inst|m0_1|u_logic|Nn0wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) # (\soc_inst|m0_1|u_logic|R40wx4~combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nn0wx4~combout  & ( (\soc_inst|m0_1|u_logic|R40wx4~combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lqpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zei2z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nn0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .lut_mask = 64'h2300EFCC3333FFFF;
-defparam \soc_inst|m0_1|u_logic|Zei2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .lut_mask = 64'h00CF00CF30FF30FF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[19]~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y22_N14
-dffeas \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE (
+// Location: FF_X36_Y17_N17
+dffeas \soc_inst|m0_1|u_logic|L8m2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zei2z4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|L8m2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L8m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L8m2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qynvx4~0 (
+// Location: LABCELL_X30_Y21_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qynvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Rilwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|L8m2z4~q  & !\soc_inst|m0_1|u_logic|Ecowx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Ecowx4~combout 
+//  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8m2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ecowx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qynvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rilwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .lut_mask = 64'h1100110011001130;
-defparam \soc_inst|m0_1|u_logic|Qynvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .lut_mask = 64'hFF00FF0055005500;
+defparam \soc_inst|m0_1|u_logic|Rilwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qynvx4~1 (
+// Location: LABCELL_X30_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qynvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qynvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Qynvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q 
-//  & (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|Npk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Rilwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|interconnect_1|HRDATA[19]~25_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Jpa3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[19]~25_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Jpa3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|interconnect_1|HRDATA[19]~25_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Jpa3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qynvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rilwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jpa3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qynvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rilwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .lut_mask = 64'h0001000155555555;
-defparam \soc_inst|m0_1|u_logic|Qynvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .lut_mask = 64'h5055505550550000;
+defparam \soc_inst|m0_1|u_logic|Rilwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vxnvx4~1 (
+// Location: LABCELL_X31_Y18_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rilwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vxnvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Qynvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vxnvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Zznvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qynvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Vxnvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Rilwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qtdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvdwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Qtdwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rilwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Uvdwx4~1_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Vxnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zznvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qynvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rilwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Uvdwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtdwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .lut_mask = 64'h3333000030000000;
-defparam \soc_inst|m0_1|u_logic|Vxnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .lut_mask = 64'h3032303231333133;
+defparam \soc_inst|m0_1|u_logic|Rilwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~134 (
+// Location: LABCELL_X30_Y18_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bo0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add5~134_cout  = CARRY(( !\soc_inst|m0_1|u_logic|Vxnvx4~1_combout  ) + ( !\soc_inst|m0_1|u_logic|Pdi2z4~q  ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|Bo0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & ( 
+// ((\soc_inst|m0_1|u_logic|W6iwx4~combout  & !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout )) # (\soc_inst|m0_1|u_logic|Phlwx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vxnvx4~1_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Phlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
+	.combout(\soc_inst|m0_1|u_logic|Bo0wx4~0_combout ),
 	.sumout(),
-	.cout(\soc_inst|m0_1|u_logic|Add5~134_cout ),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add5~134 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add5~134 .lut_mask = 64'h000000FF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add5~134 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .lut_mask = 64'h5F0F5F0F55005500;
+defparam \soc_inst|m0_1|u_logic|Bo0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~1 (
+// Location: LABCELL_X30_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bo0wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qppvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qppvx4~0_combout  & \soc_inst|m0_1|u_logic|Lz8wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qppvx4~0_combout  & (\soc_inst|m0_1|u_logic|Lz8wx4~0_combout  & !\soc_inst|m0_1|u_logic|Add5~93_sumout )) ) )
+// \soc_inst|m0_1|u_logic|Bo0wx4~combout  = ( \soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bo0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rilwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mjlwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fjlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bo0wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rilwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Yilwx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qppvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lz8wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjlwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yilwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bo0wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .lut_mask = 64'h0C000C000C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bo0wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bo0wx4 .lut_mask = 64'h150015003F003F00;
+defparam \soc_inst|m0_1|u_logic|Bo0wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~2 (
+// Location: MLABCELL_X39_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~69 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qppvx4~2_combout  = ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qppvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Htyvx4~3_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Add2~69_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Zjq2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~74  ))
+// \soc_inst|m0_1|u_logic|Add2~70  = CARRY(( !\soc_inst|m0_1|u_logic|Zjq2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~74  ))
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zjq2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~74 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~69_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~70 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .lut_mask = 64'h000000000C0F0C0F;
-defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~69 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~69 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~69 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y22_N29
-dffeas \soc_inst|m0_1|u_logic|Dq73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dq73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dq73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dq73z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X40_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ithvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ithvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Zjq2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add2~69_sumout  ) ) ) # ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Zjq2z4~q  ) ) )
 
-// Location: FF_X34_Y22_N25
-dffeas \soc_inst|m0_1|u_logic|Ruj2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ruj2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~69_sumout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zjq2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ithvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ruj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ruj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .lut_mask = 64'h0000F0F05555F0F0;
+defparam \soc_inst|m0_1|u_logic|Ithvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4~1 (
+// Location: LABCELL_X13_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ithvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V7ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ukt2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ug63z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ruj2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Ithvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~49_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Bo0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~49_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ithvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Bo0wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dq73z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ruj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ukt2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ug63z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bo0wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ithvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~49_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V7ywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .lut_mask = 64'hCCCCFF00F0F0AAAA;
-defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y23_N23
-dffeas \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .lut_mask = 64'h00000000CF008A00;
+defparam \soc_inst|m0_1|u_logic|Ithvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y23_N14
-dffeas \soc_inst|m0_1|u_logic|Fwj2z4 (
+// Location: FF_X13_Y17_N14
+dffeas \soc_inst|m0_1|u_logic|Zjq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ithvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fwj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zjq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fwj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fwj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zjq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zjq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4~0 (
+// Location: MLABCELL_X39_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~65 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V7ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dtj2z4~q  & ( \soc_inst|m0_1|u_logic|Txj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Fwj2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dtj2z4~q  & ( \soc_inst|m0_1|u_logic|Txj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Fwj2z4~q ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Dtj2z4~q  & ( !\soc_inst|m0_1|u_logic|Txj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Fwj2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dtj2z4~q  & ( !\soc_inst|m0_1|u_logic|Txj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Fwj2z4~q ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~65_sumout  = SUM(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~70  ))
+// \soc_inst|m0_1|u_logic|Add2~66  = CARRY(( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~70  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fwj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dtj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Txj2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~70 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V7ywx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~65_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~66 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .lut_mask = 64'hFACF0ACFFAC00AC0;
-defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~65 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~65 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~65 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4 (
+// Location: LABCELL_X40_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V7ywx4~combout  = ( \soc_inst|m0_1|u_logic|V7ywx4~1_combout  & ( \soc_inst|m0_1|u_logic|V7ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|V7ywx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|V7ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|V7ywx4~1_combout  & ( !\soc_inst|m0_1|u_logic|V7ywx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ldhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Add2~65_sumout  ) ) ) # ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|B9g3z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~65_sumout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B9g3z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|V7ywx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|V7ywx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V7ywx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V7ywx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V7ywx4 .lut_mask = 64'h00000A0A05050F0F;
-defparam \soc_inst|m0_1|u_logic|V7ywx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A7ywx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|A7ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & \soc_inst|m0_1|u_logic|V7ywx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & \soc_inst|m0_1|u_logic|V7ywx4~combout )) # (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V7ywx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ldhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .lut_mask = 64'h444C444C000C000C;
-defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .shared_arith = "off";
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .lut_mask = 64'h0000F0F05555F0F0;
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zetwx4 (
+// Location: LABCELL_X13_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ldhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zetwx4~combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|A7ywx4~0_combout  & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|A7ywx4~0_combout  
-// & \soc_inst|m0_1|u_logic|W4ywx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ldhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tj0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add5~53_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tj0wx4~combout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~53_sumout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ldhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~53_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tj0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zetwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ldhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zetwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zetwx4 .lut_mask = 64'h000F000F00F000F0;
-defparam \soc_inst|m0_1|u_logic|Zetwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .lut_mask = 64'h00000000C800C8C8;
+defparam \soc_inst|m0_1|u_logic|Ldhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mouwx4~0 (
+// Location: FF_X13_Y17_N58
+dffeas \soc_inst|m0_1|u_logic|B9g3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ldhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|B9g3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|B9g3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B9g3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~61 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mouwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zetwx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xuxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Zetwx4~combout  & \soc_inst|m0_1|u_logic|Oldwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Add2~61_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~66  ))
+// \soc_inst|m0_1|u_logic|Add2~62  = CARRY(( !\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~66  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zetwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xuxwx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~66 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~61_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~62 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .lut_mask = 64'h0050005055055505;
-defparam \soc_inst|m0_1|u_logic|Mouwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~61 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~61 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~61 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~12 (
+// Location: FF_X12_Y17_N8
+dffeas \soc_inst|m0_1|u_logic|Foe3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Foe3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Foe3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Foe3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X12_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gehvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o~12_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Rtpvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Rtpvx4~combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  
-// & ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Rtpvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~q  & ((!\soc_inst|m0_1|u_logic|Rtpvx4~combout ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Gehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Foe3z4~q  & ( (\soc_inst|m0_1|u_logic|Add2~61_sumout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout  & !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Foe3z4~q  & ( 
+// ((\soc_inst|m0_1|u_logic|Add2~61_sumout  & \soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~61_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Foe3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gehvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .lut_mask = 64'h00F500E400A000E4;
-defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .lut_mask = 64'h1F1F1F1F10101010;
+defparam \soc_inst|m0_1|u_logic|Gehvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y14_N12
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[29]~22 (
+// Location: LABCELL_X12_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gehvx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[29]~22_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( \soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( \soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ( (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( !\soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ( (!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|ram_1|write_cycle~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Gehvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~25_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Qe0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~25_sumout  & ( \soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gehvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Qe0wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
-	.datab(!\soc_inst|ram_1|write_cycle~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gehvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qe0wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~25_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[29]~22_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[29]~22 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[29]~22 .lut_mask = 64'h0000222211113333;
-defparam \soc_inst|ram_1|data_to_memory[29]~22 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .lut_mask = 64'h00000000AA22A020;
+defparam \soc_inst|m0_1|u_logic|Gehvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y18_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[29]~22_combout ,\soc_inst|ram_1|data_to_memory[13]~21_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X12_Y17_N7
+dffeas \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Gehvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_bit_number = 13;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_bit_number = 13;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001492D2DC0F05220E42890A1000555555555555541C313000000000000000000000000";
+defparam \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N12
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[13]~21 (
+// Location: MLABCELL_X39_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~105 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[13]~21_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( (\soc_inst|ram_1|write_cycle~q  & (!\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ) # (\soc_inst|ram_1|byte_select [1]))) ) )
+// \soc_inst|m0_1|u_logic|Add2~105_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~62  ))
+// \soc_inst|m0_1|u_logic|Add2~106  = CARRY(( !\soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~62  ))
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select [1]),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~62 ),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[13]~21_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~105_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~106 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[13]~21 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[13]~21 .lut_mask = 64'h0555055500500050;
-defparam \soc_inst|ram_1|data_to_memory[13]~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~105 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~105 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~105 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxmwx4~0 (
+// Location: LABCELL_X12_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vihvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hxmwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout ) # (!\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  ) )
+// \soc_inst|m0_1|u_logic|Vihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~105_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|S5pvx4~combout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~105_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~105_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hxmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vihvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .lut_mask = 64'hFFFF0000FAFA0000;
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .lut_mask = 64'h3030303030FC30FC;
+defparam \soc_inst|m0_1|u_logic|Vihvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y25_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxmwx4~1 (
+// Location: LABCELL_X13_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vihvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hxmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|F5ewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Hxmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|F5ewx4~combout  & ( (\soc_inst|m0_1|u_logic|Hxmwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Vihvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout  & (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Ba0wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Ba0wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~1_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Vihvx4~0_combout  & (\soc_inst|m0_1|u_logic|Tjlwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Ba0wx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mouwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hxmwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F5ewx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vihvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tjlwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ba0wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~1_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .lut_mask = 64'h0F0C0F0C0A080A08;
-defparam \soc_inst|m0_1|u_logic|Hxmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .lut_mask = 64'h2202220222020000;
+defparam \soc_inst|m0_1|u_logic|Vihvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y25_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mb1wx4~0 (
+// Location: FF_X13_Y17_N22
+dffeas \soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vihvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mb1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( \soc_inst|m0_1|u_logic|Nlnwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Cymwx4~3_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ) # 
-// (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Zdhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add2~117_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Kaf3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Kaf3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~117_sumout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mb1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zdhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .lut_mask = 64'hF5F5F0F055550000;
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .lut_mask = 64'hFF0FAA0F00000000;
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y25_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mb1wx4~1 (
+// Location: MLABCELL_X28_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mb1wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mb1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mb1wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Sknwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zdhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zdhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add5~125_sumout )))) # 
+// (\soc_inst|m0_1|u_logic|H4nwx4~combout  & (\soc_inst|m0_1|u_logic|Oa3wx4~combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~125_sumout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Mb1wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oa3wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zdhvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .lut_mask = 64'h0707000077770000;
-defparam \soc_inst|m0_1|u_logic|Mb1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .lut_mask = 64'h00000000AF8CAF8C;
+defparam \soc_inst|m0_1|u_logic|Zdhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nehvx4~1 (
+// Location: FF_X28_Y17_N25
+dffeas \soc_inst|m0_1|u_logic|Kaf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Zdhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kaf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kaf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y92wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nehvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~17_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~109_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q )))))) ) )
+// \soc_inst|m0_1|u_logic|Y92wx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( \soc_inst|m0_1|u_logic|Add3~113_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( \soc_inst|m0_1|u_logic|Add3~113_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~113_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~113_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~109_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE_q ),
-	.datag(!\soc_inst|m0_1|u_logic|Add5~17_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add3~113_sumout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nehvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y92wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .lut_mask = 64'hA000A800A0AAA8AA;
-defparam \soc_inst|m0_1|u_logic|Nehvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y92wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y92wx4 .lut_mask = 64'hFFAAF0A0CC88C080;
+defparam \soc_inst|m0_1|u_logic|Y92wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nehvx4~0 (
+// Location: LABCELL_X23_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nehvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nehvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
-// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mb1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nehvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|K8ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|B6j2z4~q  & ( \soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kaf3z4~q )) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  & ( \soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kaf3z4~q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|B6j2z4~q  & ( !\soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kaf3z4~q 
+// )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B6j2z4~q  & ( !\soc_inst|m0_1|u_logic|Y92wx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Kaf3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mb1wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nehvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kaf3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y92wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .lut_mask = 64'h00000000CCCCFFCD;
-defparam \soc_inst|m0_1|u_logic|Nehvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .lut_mask = 64'h2022A8AA3033FCFF;
+defparam \soc_inst|m0_1|u_logic|K8ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y25_N19
-dffeas \soc_inst|m0_1|u_logic|Tme3z4 (
+// Location: FF_X23_Y18_N37
+dffeas \soc_inst|m0_1|u_logic|B6j2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nehvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|K8ivx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -76228,2329 +75953,2255 @@ dffeas \soc_inst|m0_1|u_logic|Tme3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tme3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B6j2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tme3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tme3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B6j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B6j2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y16_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9jvx4~0 (
+// Location: LABCELL_X22_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bf9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A9jvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Tme3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Slr2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Tme3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Slr2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~5_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tme3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bf9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q 
+// )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tme3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .lut_mask = 64'h0F03FFF30A02AAA2;
-defparam \soc_inst|m0_1|u_logic|A9jvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .lut_mask = 64'h0000000000880000;
+defparam \soc_inst|m0_1|u_logic|Bf9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y16_N59
-dffeas \soc_inst|m0_1|u_logic|Slr2z4 (
+// Location: FF_X25_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Pgf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|A9jvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Slr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pgf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Slr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Slr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pgf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pgf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~0 (
+// Location: FF_X25_Y19_N22
+dffeas \soc_inst|m0_1|u_logic|Eif3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Eif3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Eif3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eif3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ww92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Gq43z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pz53z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Bc82z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pgf3z4~q  & ( \soc_inst|m0_1|u_logic|Eif3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
+//  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Pgf3z4~q  & ( !\soc_inst|m0_1|u_logic|Eif3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pgf3z4~q  & ( !\soc_inst|m0_1|u_logic|Eif3z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pz53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gq43z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pgf3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eif3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ww92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bc82z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .lut_mask = 64'h0000000030220000;
-defparam \soc_inst|m0_1|u_logic|Ww92z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .lut_mask = 64'h0050004000100000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y17_N8
-dffeas \soc_inst|m0_1|u_logic|U5q2z4 (
+// Location: FF_X19_Y19_N1
+dffeas \soc_inst|m0_1|u_logic|M4j2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U5q2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M4j2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U5q2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M4j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M4j2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y18_N38
-dffeas \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE (
+// Location: FF_X22_Y19_N53
+dffeas \soc_inst|m0_1|u_logic|Uuf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Uuf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uuf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uuf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X27_Y18_N8
-dffeas \soc_inst|m0_1|u_logic|O723z4 (
+// Location: FF_X21_Y23_N29
+dffeas \soc_inst|m0_1|u_logic|Qrf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O723z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qrf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O723z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O723z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qrf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qrf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y18_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ww92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|O723z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|O723z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ww92z4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y19_N17
+dffeas \soc_inst|m0_1|u_logic|Ftf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ftf3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .lut_mask = 64'h00000000C0A00000;
-defparam \soc_inst|m0_1|u_logic|Ww92z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ftf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ftf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ty92z4~0 (
+// Location: MLABCELL_X21_Y23_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ty92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|F4q2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bc82z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qrf3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ftf3z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|F4q2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qrf3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ftf3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ty92z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bc82z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .lut_mask = 64'h1000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ty92z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .lut_mask = 64'h00C0000000A00000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y19_N1
-dffeas \soc_inst|m0_1|u_logic|X213z4~DUPLICATE (
+// Location: FF_X25_Y23_N19
+dffeas \soc_inst|m0_1|u_logic|Tjf3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|M41wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Tjf3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X213z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X213z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tjf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tjf3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~2 (
+// Location: FF_X25_Y23_N56
+dffeas \soc_inst|m0_1|u_logic|Ilf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ilf3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ilf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ilf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y23_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ww92z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|D603z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Bc82z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Ilf3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Tjf3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D603z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|X213z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tjf3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ilf3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ww92z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bc82z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .lut_mask = 64'h00000000C000A000;
-defparam \soc_inst|m0_1|u_logic|Ww92z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .lut_mask = 64'h5410000000000000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ww92z4~3 (
+// Location: LABCELL_X22_Y19_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ww92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Ty92z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ww92z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ww92z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ww92z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5q2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Bc82z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Bc82z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bc82z4~2_combout  & ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uuf3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ww92z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U5q2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ww92z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ty92z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ww92z4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bc82z4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bc82z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ww92z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bc82z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .lut_mask = 64'hA200000000000000;
-defparam \soc_inst|m0_1|u_logic|Ww92z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .lut_mask = 64'hF050F05000000000;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C61wx4~0 (
+// Location: LABCELL_X22_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bc82z4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C61wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Slr2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Slr2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Slr2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hmqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ww92z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Slr2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Bc82z4~4_combout  = ( \soc_inst|m0_1|u_logic|M4j2z4~q  & ( \soc_inst|m0_1|u_logic|Bc82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Bc82z4~0_combout  & \soc_inst|m0_1|u_logic|Icxwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M4j2z4~q  
+// & ( \soc_inst|m0_1|u_logic|Bc82z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Bf9wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bc82z4~0_combout  & \soc_inst|m0_1|u_logic|Icxwx4~combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Slr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ww92z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bf9wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bc82z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M4j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bc82z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bc82z4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C61wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C61wx4~0 .lut_mask = 64'hCCAFCCAFCCAFCCA0;
-defparam \soc_inst|m0_1|u_logic|C61wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .lut_mask = 64'h0000000000A000F0;
+defparam \soc_inst|m0_1|u_logic|Bc82z4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xjhvx4~0 (
+// Location: LABCELL_X23_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ntnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xjhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rix2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~101_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bc82z4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Zfh3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|B6j2z4~q 
+//  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Bc82z4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Zfh3z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|B6j2z4~q ) # ((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~101_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zfh3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bc82z4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xjhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .lut_mask = 64'hFAFA000000FF0000;
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .lut_mask = 64'hF0BBF0BBF088F088;
+defparam \soc_inst|m0_1|u_logic|Ntnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xjhvx4~1 (
+// Location: LABCELL_X23_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6cwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xjhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xjhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~61_sumout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|X61wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xjhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~61_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|D6cwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ 
+// (\soc_inst|m0_1|u_logic|T7cwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|T7cwx4~0_combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ntnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout  $ (\soc_inst|m0_1|u_logic|T7cwx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|X61wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xjhvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T7cwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ntnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D6cwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .lut_mask = 64'h00000000CCC0FFF0;
-defparam \soc_inst|m0_1|u_logic|Xjhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y22_N46
-dffeas \soc_inst|m0_1|u_logic|Rix2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xjhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rix2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rix2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rix2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .lut_mask = 64'hEDEDDE84EDED0000;
+defparam \soc_inst|m0_1|u_logic|D6cwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~4 (
+// Location: LABCELL_X23_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Va3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o~4_combout  = ( \soc_inst|m0_1|u_logic|Add3~97_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~61_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~97_sumout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~61_sumout )) # (\soc_inst|m0_1|u_logic|C61wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~97_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~61_sumout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~97_sumout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// \soc_inst|m0_1|u_logic|Add5~61_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|Va3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~125_sumout  & ( \soc_inst|m0_1|u_logic|D6cwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|R6cwx4~5_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~125_sumout  & ( \soc_inst|m0_1|u_logic|D6cwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|R6cwx4~5_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C61wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~61_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add3~97_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~125_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D6cwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o~4 .lut_mask = 64'h00550F5F33773F7F;
-defparam \soc_inst|m0_1|u_logic|haddr_o~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .lut_mask = 64'h0000000088AA080A;
+defparam \soc_inst|m0_1|u_logic|Va3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdjvx4~0 (
+// Location: LABCELL_X29_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fa2wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdjvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J7q2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|haddr_o~4_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rix2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|haddr_o~4_combout  & 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rix2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|J7q2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Rix2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|J7q2z4~q  & ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rix2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fa2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oa3wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Va3wx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|D31wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rix2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oa3wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Va3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .lut_mask = 64'h0F05FFF50C04CCC4;
-defparam \soc_inst|m0_1|u_logic|Pdjvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .lut_mask = 64'h0000000000003F7F;
+defparam \soc_inst|m0_1|u_logic|Fa2wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y16_N13
-dffeas \soc_inst|m0_1|u_logic|J7q2z4 (
+// Location: FF_X25_Y19_N23
+dffeas \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pdjvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J7q2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J7q2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J7q2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~1 (
+// Location: MLABCELL_X25_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Du9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mi23z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Vr33z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mi23z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Vr33z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|R6cwx4~2_combout  = ( \soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Orj2z4~q ) # ((\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|V41xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ab1xx4~0_combout  & !\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vr33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mi23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ab1xx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Orj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|V41xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Du9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .lut_mask = 64'h5040100000000000;
-defparam \soc_inst|m0_1|u_logic|Du9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .lut_mask = 64'h50505050FF50FF50;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y18_N14
-dffeas \soc_inst|m0_1|u_logic|E153z4 (
+// Location: FF_X19_Y19_N2
+dffeas \soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E153z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E153z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E153z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~0 (
+// Location: LABCELL_X19_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P852z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Du9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Na63z4~q  & ( \soc_inst|m0_1|u_logic|E153z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Na63z4~q  & ( !\soc_inst|m0_1|u_logic|E153z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Na63z4~q  & ( !\soc_inst|m0_1|u_logic|E153z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|P852z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aff3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Na63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|E153z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aff3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Du9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P852z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .lut_mask = 64'h1100100001000000;
-defparam \soc_inst|m0_1|u_logic|Du9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P852z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P852z4~0 .lut_mask = 64'h1000100000000000;
+defparam \soc_inst|m0_1|u_logic|P852z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y18_N31
-dffeas \soc_inst|m0_1|u_logic|Euh3z4 (
+// Location: FF_X18_Y19_N46
+dffeas \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Wbf3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Euh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Euh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Euh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aw9wx4~0 (
+// Location: LABCELL_X19_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W852z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aw9wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Psh3z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|W852z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Psh3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W852z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .lut_mask = 64'h0000000040000000;
-defparam \soc_inst|m0_1|u_logic|Aw9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W852z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W852z4~0 .lut_mask = 64'h0001000100000000;
+defparam \soc_inst|m0_1|u_logic|W852z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y24_N52
-dffeas \soc_inst|m0_1|u_logic|Arh3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Arh3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Arh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Arh3z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X19_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S652z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|S652z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bqf3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) )
 
-// Location: FF_X27_Y22_N50
-dffeas \soc_inst|m0_1|u_logic|Lph3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lph3z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bqf3z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|S652z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lph3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lph3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S652z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S652z4~0 .lut_mask = 64'h1000100000000000;
+defparam \soc_inst|m0_1|u_logic|S652z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~2 (
+// Location: LABCELL_X19_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G752z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Du9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Arh3z4~q )) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Lph3z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|G752z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xmf3z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Arh3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lph3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xmf3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Du9wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G752z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .lut_mask = 64'h4540000000000000;
-defparam \soc_inst|m0_1|u_logic|Du9wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G752z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G752z4~0 .lut_mask = 64'h0010001000000000;
+defparam \soc_inst|m0_1|u_logic|G752z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Du9wx4~3 (
+// Location: LABCELL_X19_Y19_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Du9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Aw9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Du9wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Du9wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Du9wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Euh3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|R6cwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|S652z4~0_combout  & ( !\soc_inst|m0_1|u_logic|G752z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P852z4~0_combout  & (!\soc_inst|m0_1|u_logic|W852z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Du9wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Du9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Euh3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aw9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Du9wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P852z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W852z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|S652z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G752z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Du9wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .lut_mask = 64'h80A0000000000000;
-defparam \soc_inst|m0_1|u_logic|Du9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .lut_mask = 64'hD000000000000000;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P82wx4~0 (
+// Location: FF_X19_Y20_N41
+dffeas \soc_inst|m0_1|u_logic|Ldf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ldf3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ldf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ldf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I852z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P82wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Y8q2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ey9wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|J7q2z4~q  ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Y8q2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Du9wx4~3_combout  & ( !\soc_inst|m0_1|u_logic|J7q2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|I852z4~0_combout  = ( \soc_inst|m0_1|u_logic|S61xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ldf3z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J7q2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Du9wx4~3_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ldf3z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I852z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P82wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P82wx4~0 .lut_mask = 64'hAAAACFCFAAAACFC0;
-defparam \soc_inst|m0_1|u_logic|P82wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I852z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I852z4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|I852z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N72wx4~0 (
+// Location: LABCELL_X19_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T352z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N72wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout )))) # (\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|P82wx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) # (\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) # (\soc_inst|m0_1|u_logic|Ns9wx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|T352z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ftf3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ns9wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ftf3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N72wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T352z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N72wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N72wx4~0 .lut_mask = 64'hFEC2EF2CCCC0CC0C;
-defparam \soc_inst|m0_1|u_logic|N72wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T352z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T352z4~0 .lut_mask = 64'h2000200000000000;
+defparam \soc_inst|m0_1|u_logic|T352z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q52wx4~0 (
+// Location: LABCELL_X19_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C552z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q52wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (\soc_inst|m0_1|u_logic|N72wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (\soc_inst|m0_1|u_logic|N72wx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( 
-// (\soc_inst|m0_1|u_logic|N72wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z62wx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|C552z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pgf3z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N72wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pgf3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q52wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C552z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .lut_mask = 64'h0B000B0000000B00;
-defparam \soc_inst|m0_1|u_logic|Q52wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C552z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C552z4~0 .lut_mask = 64'h0002000200000000;
+defparam \soc_inst|m0_1|u_logic|C552z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q52wx4~1 (
+// Location: FF_X21_Y23_N28
+dffeas \soc_inst|m0_1|u_logic|Qrf3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qrf3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qrf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qrf3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M352z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q52wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Glnwx4~2_combout  & ( \soc_inst|m0_1|u_logic|U72wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q52wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|M352z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qrf3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q52wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Glnwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qrf3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M352z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .lut_mask = 64'h0000000000F50000;
-defparam \soc_inst|m0_1|u_logic|Q52wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M352z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M352z4~0 .lut_mask = 64'h0008000800000000;
+defparam \soc_inst|m0_1|u_logic|M352z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N47
-dffeas \soc_inst|m0_1|u_logic|Na63z4 (
+// Location: FF_X25_Y23_N20
+dffeas \soc_inst|m0_1|u_logic|Tjf3z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Na63z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Tjf3z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Na63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Na63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tjf3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tjf3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O452z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O452z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tjf3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tjf3z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|O452z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O452z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O452z4~0 .lut_mask = 64'h0020002000000000;
+defparam \soc_inst|m0_1|u_logic|O452z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|R6cwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|M352z4~0_combout  & ( !\soc_inst|m0_1|u_logic|O452z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T352z4~0_combout  & (!\soc_inst|m0_1|u_logic|C552z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uuf3z4~q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T352z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Uuf3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C552z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M352z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O452z4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y18_N58
-dffeas \soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE (
+// Location: FF_X16_Y19_N1
+dffeas \soc_inst|m0_1|u_logic|Mof3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mof3z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Mof3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mof3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mof3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~1 (
+// Location: LABCELL_X18_Y21_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Na63z4~q  & ( \soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  
-// & !\soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Na63z4~q  & ( !\soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|T1d3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Na63z4~q  & ( !\soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|R6cwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mof3z4~q  & ( !\soc_inst|m0_1|u_logic|B6j2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mof3z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|B6j2z4~q ) # (\soc_inst|m0_1|u_logic|U71xx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ta1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mof3z4~q  & ( \soc_inst|m0_1|u_logic|U71xx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Na63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U71xx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|B6j2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ta1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mof3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .lut_mask = 64'h0101000101000000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .lut_mask = 64'h5555F5F50000F0F0;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y18_N13
-dffeas \soc_inst|m0_1|u_logic|E153z4~DUPLICATE (
+// Location: FF_X25_Y20_N8
+dffeas \soc_inst|m0_1|u_logic|Fpi2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Q52wx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Fa2wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Fpi2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E153z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E153z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fpi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fpi2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~2 (
+// Location: MLABCELL_X25_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Lph3z4~q  & ( \soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lph3z4~q  & ( !\soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lph3z4~q  & ( !\soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|R6cwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fpi2z4~q ) # (!\soc_inst|m0_1|u_logic|Ilf3z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ilf3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Jc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Fpi2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Lph3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|E153z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fpi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ilf3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Jc1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .lut_mask = 64'h0048000800400000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .lut_mask = 64'h0000CCCCF0F0FCFC;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y25_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T04xx4~0 (
+// Location: LABCELL_X19_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6cwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T04xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Euh3z4~q  & ( (!\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|R6cwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|R6cwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|R6cwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R6cwx4~2_combout  & (\soc_inst|m0_1|u_logic|R6cwx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|I852z4~0_combout  & \soc_inst|m0_1|u_logic|R6cwx4~3_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Euh3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R6cwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R6cwx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I852z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R6cwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R6cwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T04xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T04xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T04xx4~0 .lut_mask = 64'h0080000000000000;
-defparam \soc_inst|m0_1|u_logic|T04xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .lut_mask = 64'h0020000000000000;
+defparam \soc_inst|m0_1|u_logic|R6cwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~3 (
+// Location: LABCELL_X35_Y20_N42
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[23]~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fxv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Arh3z4~q  & 
-// \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fxv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fxv2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Arh3z4~q  & \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) )
+// \soc_inst|ram_1|data_to_memory[23]~0_combout  = ( \soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|R6cwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Arh3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fxv2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|R6cwx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~3_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[23]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .lut_mask = 64'h0080002200800000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~3 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[23]~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[23]~0 .lut_mask = 64'hF5F0F5F0A0F0A0F0;
+defparam \soc_inst|ram_1|data_to_memory[23]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y24_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~4 (
+// Location: LABCELL_X35_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V4ovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~4_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Rdq2z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wnu2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Rdq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Wnu2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|V4ovx4~0_combout  = ( \soc_inst|ram_1|data_to_memory[23]~0_combout  & ( \soc_inst|m0_1|u_logic|K3l2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wnu2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rdq2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|data_to_memory[23]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .lut_mask = 64'h0000E00000004000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .lut_mask = 64'h0000000055555555;
+defparam \soc_inst|m0_1|u_logic|V4ovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ccq2z4~q  & ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ccq2z4~q  & ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ccq2z4~q  & ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  $ 
-// (\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ccq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X34_Y19_N14
+dffeas \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .lut_mask = 64'h8008800000080000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4~5 (
+// Location: LABCELL_X35_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Z62wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Z62wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z62wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Z62wx4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|T04xx4~0_combout  & !\soc_inst|m0_1|u_logic|Z62wx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|R6xwx4~0_combout  = ( \soc_inst|m0_1|u_logic|K3uvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Svs2z4~q  & \soc_inst|m0_1|u_logic|E0uvx4~combout )) # (\soc_inst|m0_1|u_logic|Uqi2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|K3uvx4~0_combout  
+// & ( (\soc_inst|m0_1|u_logic|Svs2z4~q  & \soc_inst|m0_1|u_logic|E0uvx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z62wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z62wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T04xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z62wx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6xwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .lut_mask = 64'h8000000000000000;
-defparam \soc_inst|m0_1|u_logic|Z62wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .lut_mask = 64'h000F000F555F555F;
+defparam \soc_inst|m0_1|u_logic|R6xwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z62wx4 (
+// Location: MLABCELL_X28_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z62wx4~combout  = ( \soc_inst|m0_1|u_logic|Z62wx4~8_combout  & ( \soc_inst|m0_1|u_logic|Z62wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|R6xwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R6xwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z4l2z4~q  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # ((!\soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Z4l2z4~q  & (!\soc_inst|m0_1|u_logic|K7pwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qwowx4~combout ) # (!\soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Z62wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z62wx4~8_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R6xwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z62wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6xwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z62wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z62wx4 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Z62wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .lut_mask = 64'hFAC8FAC800000000;
+defparam \soc_inst|m0_1|u_logic|R6xwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y15_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[15]~1 (
+// Location: MLABCELL_X28_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6xwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  = (!\soc_inst|m0_1|u_logic|Wq5wx4~combout  & (!\soc_inst|m0_1|u_logic|Z62wx4~combout )) # (\soc_inst|m0_1|u_logic|Wq5wx4~combout  & ((!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout )))
+// \soc_inst|m0_1|u_logic|R6xwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R6xwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|N1uvx4~combout  & \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z62wx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R6xwx4~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6xwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .lut_mask = 64'hAAF0AAF0AAF0AAF0;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[15]~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y18_N10
-dffeas \soc_inst|m0_1|u_logic|Usl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Usl2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Usl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Usl2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X46_Y18_N44
-dffeas \soc_inst|m0_1|u_logic|T7d3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Z0uvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T7d3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T7d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T7d3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X48_Y15_N49
-dffeas \soc_inst|m0_1|u_logic|Lul2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lul2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lul2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lul2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X48_Y15_N10
-dffeas \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jsc3z4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .lut_mask = 64'h00000000FF03FF03;
+defparam \soc_inst|m0_1|u_logic|R6xwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~1 (
+// Location: LABCELL_X33_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Walwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Lul2z4~q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Walwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[23]~8_combout  & ( ((!\soc_inst|m0_1|u_logic|Uei3z4~q  & \soc_inst|m0_1|u_logic|I7owx4~combout )) # (\soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[23]~8_combout  & ( (!\soc_inst|m0_1|u_logic|Uei3z4~q  & \soc_inst|m0_1|u_logic|I7owx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uei3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Walwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .lut_mask = 64'h005500550F5F0F5F;
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Walwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Walwx4~0 .lut_mask = 64'h00F000F055F555F5;
+defparam \soc_inst|m0_1|u_logic|Walwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~0 (
+// Location: MLABCELL_X28_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Walwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( ((\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|B2uvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vgs2z4~q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|B2uvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Walwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Walwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Jca3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Walwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R6xwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|G6owx4~combout ) # (\soc_inst|m0_1|u_logic|Jca3z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R6xwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jca3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Walwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xs7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .lut_mask = 64'h004400440F4F0F4F;
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Walwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Walwx4~1 .lut_mask = 64'hA2000000A2A20000;
+defparam \soc_inst|m0_1|u_logic|Walwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~2 (
+// Location: LABCELL_X29_Y22_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjxwx4~2_combout  = ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wjxwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Tqs2z4~q  & !\soc_inst|m0_1|u_logic|Wjxwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|E0uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wjxwx4~1_combout  & !\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|W4zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wjxwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tqs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W4zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .lut_mask = 64'hAA00AA00A000A000;
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .lut_mask = 64'hAAAAFAFA0000F0F0;
+defparam \soc_inst|m0_1|u_logic|W4zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y16_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~3 (
+// Location: LABCELL_X29_Y22_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4zvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjxwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wjxwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ara3z4~q  & (!\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # (\soc_inst|m0_1|u_logic|D4a3z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|Ara3z4~q  & (((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|D4a3z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|W4zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|W4zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|W4zvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|D4a3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W4zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .lut_mask = 64'h00000000F351F351;
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .lut_mask = 64'h5550FFF000000000;
+defparam \soc_inst|m0_1|u_logic|W4zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~4 (
+// Location: LABCELL_X29_Y22_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wjxwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Wjxwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~q  & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # ((!\soc_inst|m0_1|u_logic|T7d3z4~q )))) # (\soc_inst|m0_1|u_logic|Usl2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|K7pwx4~combout  & ((!\soc_inst|m0_1|u_logic|N1uvx4~combout ) # (!\soc_inst|m0_1|u_logic|T7d3z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Z4qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T7d3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .lut_mask = 64'h00000000FAC8FAC8;
-defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .lut_mask = 64'hB0B0B0B00000B0B0;
+defparam \soc_inst|m0_1|u_logic|Z4qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N6
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[15]~2 (
+// Location: LABCELL_X29_Y22_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4qvx4 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[15]~2_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ) # (\soc_inst|ram_1|byte_select [1]))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (!\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout )) ) )
+// \soc_inst|m0_1|u_logic|Z4qvx4~combout  = ( \soc_inst|m0_1|u_logic|Wsawx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z4qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|W4zvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [1]),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wsawx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z4qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[15]~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[15]~2 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[15]~2 .lut_mask = 64'h000A000A050F050F;
-defparam \soc_inst|ram_1|data_to_memory[15]~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4qvx4 .lut_mask = 64'h0000000000003301;
+defparam \soc_inst|m0_1|u_logic|Z4qvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y14_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[31]~1_combout ,\soc_inst|ram_1|data_to_memory[15]~2_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X27_Y22_N52
+dffeas \soc_inst|m0_1|u_logic|X553z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|m0_1|u_logic|X553z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_bit_number = 15;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_bit_number = 15;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001B6DCF6C10051870C213092507D55555555555541E4BB000000000000000000000000";
+defparam \soc_inst|m0_1|u_logic|X553z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X553z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y14_N57
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[31]~1 (
-// Equation(s):
-// \soc_inst|ram_1|data_to_memory[31]~1_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( \soc_inst|m0_1|u_logic|hwdata_o~0_combout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( \soc_inst|m0_1|u_logic|hwdata_o~0_combout  & ( (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( !\soc_inst|m0_1|u_logic|hwdata_o~0_combout  & ( (!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|ram_1|write_cycle~q ) ) ) )
+// Location: FF_X29_Y22_N53
+dffeas \soc_inst|m0_1|u_logic|Wd13z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wd13z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wd13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wd13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[31]~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y22_N31
+dffeas \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[31]~1 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[31]~1 .lut_mask = 64'h00000A0A05050F0F;
-defparam \soc_inst|ram_1|data_to_memory[31]~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N3
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[15]~4 (
+// Location: FF_X29_Y22_N2
+dffeas \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4qvx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y22_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~2 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[15]~4_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ) ) )
+// \soc_inst|m0_1|u_logic|Ht5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wd13z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wd13z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[15]~4 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[15]~4 .lut_mask = 64'hAAFFAAFF00550055;
-defparam \soc_inst|interconnect_1|HRDATA[15]~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .lut_mask = 64'hCCCCFF00AAAAF0F0;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9lwx4~0 (
+// Location: MLABCELL_X25_Y22_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9lwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[15]~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( 
-// ((\soc_inst|m0_1|u_logic|B7owx4~combout  & \soc_inst|interconnect_1|HRDATA[15]~4_combout )) # (\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ht5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ow33z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ow33z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mcz2z4~q  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mcz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ow33z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9lwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .lut_mask = 64'h333F333F000F000F;
-defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .lut_mask = 64'hF0F0FF000000FF00;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N4rvx4~0 (
+// Location: MLABCELL_X25_Y22_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N4rvx4~0_combout  = ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( \soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q6mwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ht5wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( ((!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & ((\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// (\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q  & (((\soc_inst|m0_1|u_logic|Ht5wx4~2_combout )))) # (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Ikz2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ikz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~2_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ht5wx4~1_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .lut_mask = 64'h2220333033333333;
-defparam \soc_inst|m0_1|u_logic|N4rvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .lut_mask = 64'h03002000CF00EC00;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9lwx4~1 (
+// Location: MLABCELL_X25_Y22_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ht5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9lwx4~1_combout  = ( \soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ) # (\soc_inst|m0_1|u_logic|Wfuwx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|U9lwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout )) # (\soc_inst|m0_1|u_logic|U9lwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ht5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xowwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ht5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|X553z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cll2z4~q )))) # (\soc_inst|m0_1|u_logic|X553z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Cll2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U9lwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X553z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cll2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xowwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .lut_mask = 64'h0AFF0AFF0BFF0BFF;
-defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .lut_mask = 64'hC4F5000000000000;
+defparam \soc_inst|m0_1|u_logic|Ht5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~0 (
+// Location: LABCELL_X35_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[7] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R5zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Walwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( 
-// ((\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Walwx4~1_combout )) # (\soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o [7] = ( !\soc_inst|m0_1|u_logic|Ht5wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ht5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R5zvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .lut_mask = 64'h5F555F550F000F00;
-defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[7] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~1 (
+// Location: LABCELL_X36_Y15_N51
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[7]~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R5zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R5zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|W6iwx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Palwx4~0_combout  & (!\soc_inst|m0_1|u_logic|R5zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|W6iwx4~combout )))) ) )
+// \soc_inst|ram_1|data_to_memory[7]~4_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o [7] & ( (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|byte_select [0]) ) ) ) # ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [7] & ( (\soc_inst|ram_1|write_cycle~q  & !\soc_inst|ram_1|byte_select [0]) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R5zvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~q ),
+	.datac(!\soc_inst|ram_1|byte_select [0]),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [7]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[7]~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .lut_mask = 64'hA800A800FC00FC00;
-defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[7]~4 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[7]~4 .lut_mask = 64'h0000303003033333;
+defparam \soc_inst|ram_1|data_to_memory[7]~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3qvx4~0 (
+// Location: M10K_X26_Y11_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 (
+	.portawe(\soc_inst|ram_1|write_cycle~q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[23]~3_combout ,\soc_inst|ram_1|data_to_memory[7]~4_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_bit_number = 7;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_bit_number = 7;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init0 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002C1E1800174445D976422442244224000026C14400016186028844884488448164C2707FFFFFFFFFFFFD7B002000000000000000000001554";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N0
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[23]~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J3qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) ) )
+// \soc_inst|ram_1|data_to_memory[23]~3_combout  = ( \soc_inst|ram_1|byte_select [2] & ( (\soc_inst|ram_1|data_to_memory[23]~0_combout  & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) # ( !\soc_inst|ram_1|byte_select [2] & ( 
+// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ),
+	.datac(!\soc_inst|ram_1|data_to_memory[23]~0_combout ),
+	.datad(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datae(!\soc_inst|ram_1|byte_select [2]),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[23]~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .lut_mask = 64'h00000000000057FF;
-defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[23]~3 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[23]~3 .lut_mask = 64'h0033000F0033000F;
+defparam \soc_inst|ram_1|data_to_memory[23]~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y20_N47
-dffeas \soc_inst|m0_1|u_logic|Cgt2z4 (
+// Location: IOIBUF_X4_Y0_N1
+cyclonev_io_ibuf \SW[7]~input (
+	.i(SW[7]),
+	.ibar(gnd),
+	.dynamicterminationcontrol(gnd),
+	.o(\SW[7]~input_o ));
+// synopsys translate_off
+defparam \SW[7]~input .bus_hold = "false";
+defparam \SW[7]~input .simulate_z_as = "z";
+// synopsys translate_on
+
+// Location: FF_X31_Y17_N5
+dffeas \soc_inst|switches_1|switch_store[0][7] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.asdata(\SW[7]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cgt2z4~q ),
+	.q(\soc_inst|switches_1|switch_store[0][7]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cgt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cgt2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|N3ywx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Cgt2z4~q  & ( \soc_inst|m0_1|u_logic|Ll73z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cgt2z4~q  & ( !\soc_inst|m0_1|u_logic|Ll73z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cgt2z4~q  & ( !\soc_inst|m0_1|u_logic|Ll73z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cgt2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ll73z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N3ywx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .lut_mask = 64'h0050001000400000;
-defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .shared_arith = "off";
+defparam \soc_inst|switches_1|switch_store[0][7] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][7] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~1 (
+// Location: LABCELL_X31_Y17_N3
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[7]~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N3ywx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Xti2z4~q  & ( \soc_inst|m0_1|u_logic|Koj2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xti2z4~q  & ( !\soc_inst|m0_1|u_logic|Koj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xti2z4~q  & ( !\soc_inst|m0_1|u_logic|Koj2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|interconnect_1|HRDATA[7]~11_combout  = ( \soc_inst|interconnect_1|HRDATA[6]~10_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout )) # 
+// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[0][7]~q ))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xti2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Koj2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+	.datad(!\soc_inst|switches_1|switch_store[0][7]~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N3ywx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .lut_mask = 64'h0003000200010000;
-defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[7]~11 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[7]~11 .lut_mask = 64'hCCCCCCCC0A5F0A5F;
+defparam \soc_inst|interconnect_1|HRDATA[7]~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|N3ywx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cc63z4~q  & ( \soc_inst|m0_1|u_logic|Isi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cc63z4~q  & ( !\soc_inst|m0_1|u_logic|Isi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cc63z4~q  & ( !\soc_inst|m0_1|u_logic|Isi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) 
-// )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Cc63z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Isi2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N3ywx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X37_Y19_N13
+dffeas \soc_inst|m0_1|u_logic|Bmb3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [7]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|L0uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .lut_mask = 64'h2200200002000000;
-defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bmb3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bmb3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y24_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~3 (
+// Location: LABCELL_X33_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N3ywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Glj2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Lpu2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Wywwx4~0_combout  = ( \soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Ylc3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ylc3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & \soc_inst|m0_1|u_logic|Ylc3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Glj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lpu2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ylc3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N3ywx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wywwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .lut_mask = 64'h00000000000088C0;
-defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .lut_mask = 64'h005500550055FFFF;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4 (
+// Location: LABCELL_X24_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N3ywx4~combout  = ( !\soc_inst|m0_1|u_logic|N3ywx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|N3ywx4~2_combout  & (!\soc_inst|m0_1|u_logic|N3ywx4~1_combout  & !\soc_inst|m0_1|u_logic|N3ywx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Wywwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wywwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tib3z4~q  & (((!\soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|E0uvx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Tib3z4~q  & (!\soc_inst|m0_1|u_logic|Qwowx4~combout  & ((!\soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|E0uvx4~combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|N3ywx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N3ywx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N3ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wywwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wywwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N3ywx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N3ywx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|N3ywx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .lut_mask = 64'hEEE0EEE000000000;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U2ewx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|U2ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # (\soc_inst|m0_1|u_logic|X77wx4~combout ))) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X39_Y20_N22
+dffeas \soc_inst|m0_1|u_logic|Nfb3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Nfb3z4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nfb3z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .lut_mask = 64'hC0CC0000C0C00000;
-defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nfb3z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttwwx4~0 (
+// Location: LABCELL_X24_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ttwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|C3w2z4~q  & !\soc_inst|m0_1|u_logic|Wxp2z4~q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|C3w2z4~q  & !\soc_inst|m0_1|u_logic|Wxp2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Wywwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Nfb3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wywwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dhb3z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nfb3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H6tvx4~0_combout  & (\soc_inst|m0_1|u_logic|Wywwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dhb3z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wywwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dhb3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nfb3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wywwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .lut_mask = 64'hC444C444D555D555;
-defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .lut_mask = 64'h080C080C0A0F0A0F;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8nwx4~0 (
+// Location: MLABCELL_X25_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wywwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B8nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U2ewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2ewx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wywwx4~3_combout  = ( \soc_inst|m0_1|u_logic|N1uvx4~combout  & ( \soc_inst|m0_1|u_logic|Wywwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Zad3z4~q  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Bmb3z4~q ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|N1uvx4~combout  & ( \soc_inst|m0_1|u_logic|Wywwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|Bmb3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wywwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B8nwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wywwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .lut_mask = 64'hA0A0A0A0AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .lut_mask = 64'h00000000FFAAF0A0;
+defparam \soc_inst|m0_1|u_logic|Wywwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8nwx4~1 (
+// Location: LABCELL_X29_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G9lwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kswwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Wxp2z4~q  & !\soc_inst|m0_1|u_logic|Palwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Palwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|G9lwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[7]~11_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wywwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Fq7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # 
+// (!\soc_inst|interconnect_1|HRDATA[7]~11_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kswwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wywwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fq7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .lut_mask = 64'h0000FEFE0000DC00;
-defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .lut_mask = 64'hA800FC00A8A8FCFC;
+defparam \soc_inst|m0_1|u_logic|G9lwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4~0 (
+// Location: LABCELL_X29_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vq1wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( \soc_inst|m0_1|u_logic|Khfwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Sknwx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ( !\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|R5zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Walwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & \soc_inst|m0_1|u_logic|V9iwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & \soc_inst|m0_1|u_logic|V9iwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R5zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .lut_mask = 64'hFAFAAAAAF0F00000;
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|R5zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4~1 (
+// Location: LABCELL_X29_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vq1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Vq1wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Vq1wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Imnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|R5zvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R5zvx4~0_combout  & (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|U9lwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R5zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R5zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .lut_mask = 64'h2323AFAF00000000;
-defparam \soc_inst|m0_1|u_logic|Vq1wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .lut_mask = 64'hC8C8C8C800C800C8;
+defparam \soc_inst|m0_1|u_logic|R5zvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vq1wx4 (
+// Location: LABCELL_X24_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J3qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vq1wx4~combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|J3qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
 	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vq1wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vq1wx4 .lut_mask = 64'h00000000F0F3F0F3;
-defparam \soc_inst|m0_1|u_logic|Vq1wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .lut_mask = 64'h0000000000005F7F;
+defparam \soc_inst|m0_1|u_logic|J3qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y25_N56
-dffeas \soc_inst|m0_1|u_logic|V4d3z4 (
+// Location: FF_X18_Y19_N26
+dffeas \soc_inst|m0_1|u_logic|Cgt2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V4d3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cgt2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V4d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V4d3z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y25_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bfhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|V4d3z4~q  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~45_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|V4d3z4~q  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add2~45_sumout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~45_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .lut_mask = 64'hAAA0FFF500000000;
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cgt2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cgt2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfhvx4~1 (
+// Location: LABCELL_X18_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bfhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vq1wx4~combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Add5~113_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout )))) # (\soc_inst|m0_1|u_logic|Vq1wx4~combout  & (((!\soc_inst|m0_1|u_logic|Add5~113_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|N3ywx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ll73z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cgt2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ll73z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Cgt2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfhvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cgt2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ll73z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N3ywx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .lut_mask = 64'h00000000DDD0DDD0;
-defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y25_N55
-dffeas \soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .lut_mask = 64'h0000000023002000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y14_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmivx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Dmivx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|G6d3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|G1s2z4~q ) # (!\soc_inst|m0_1|u_logic|G6d3z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|G1s2z4~q  
-// ) ) )
+// Location: LABCELL_X18_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N3ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q  & ((!\soc_inst|m0_1|u_logic|Isi2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Cc63z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cc63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Isi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dmivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N3ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .lut_mask = 64'hAAAAFAFA0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Dmivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .lut_mask = 64'h0000E40000000000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dmivx4~1 (
+// Location: LABCELL_X18_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dmivx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xxovx4~combout  & ( !\soc_inst|m0_1|u_logic|Dmivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xxovx4~combout  & ( !\soc_inst|m0_1|u_logic|Dmivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|N3ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Koj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Xti2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Koj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xti2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dmivx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xti2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Koj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N3ywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .lut_mask = 64'hCFCF8A8A00000000;
-defparam \soc_inst|m0_1|u_logic|Dmivx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y15_N35
-dffeas \soc_inst|m0_1|u_logic|G1s2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dmivx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G1s2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G1s2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G1s2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .lut_mask = 64'h0000030200000002;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y19_N56
-dffeas \soc_inst|m0_1|u_logic|Ql33z4 (
+// Location: FF_X17_Y21_N20
+dffeas \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ql33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ql33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ql33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X25_Y19_N34
-dffeas \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hc23z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X17_Y21_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|N3ywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Glj2z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Glj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|N3ywx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .lut_mask = 64'h00000E0200000000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~1 (
+// Location: LABCELL_X18_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N3ywx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uga2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Ql33z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ql33z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|N3ywx4~combout  = ( !\soc_inst|m0_1|u_logic|N3ywx4~1_combout  & ( !\soc_inst|m0_1|u_logic|N3ywx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|N3ywx4~2_combout  & !\soc_inst|m0_1|u_logic|N3ywx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ql33z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|N3ywx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N3ywx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N3ywx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uga2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N3ywx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .lut_mask = 64'h2220000000200000;
-defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N3ywx4 .lut_mask = 64'hF000000000000000;
+defparam \soc_inst|m0_1|u_logic|N3ywx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ria2z4~0 (
+// Location: MLABCELL_X28_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U2ewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ria2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dcs2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|U2ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & ((!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|X77wx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dcs2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ria2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .lut_mask = 64'h0000000000800000;
-defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .lut_mask = 64'h8C888C8800000000;
+defparam \soc_inst|m0_1|u_logic|U2ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X27_Y23_N37
-dffeas \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M7qwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|M7qwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Qxc2z4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qxc2z4~combout ) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qxc2z4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .lut_mask = 64'h0000000033FF03FF;
+defparam \soc_inst|m0_1|u_logic|M7qwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~0 (
+// Location: LABCELL_X29_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uga2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|I463z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pgfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5ewx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & \soc_inst|m0_1|u_logic|Qdtwx4~combout )) # (\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M5ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M7qwx4~0_combout  & \soc_inst|m0_1|u_logic|Qdtwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|I463z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M7qwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdtwx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M5ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uga2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pgfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .lut_mask = 64'h0000404000005000;
-defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .lut_mask = 64'h0505050537373737;
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y16_N32
-dffeas \soc_inst|m0_1|u_logic|B613z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B613z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|B613z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B613z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|B613z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X28_Y20_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pgfwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|T2owx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pgfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[25]~18_combout ) ) ) )
 
-// Location: FF_X28_Y21_N49
-dffeas \soc_inst|m0_1|u_logic|H903z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H903z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H903z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .lut_mask = 64'hFAFA000000000000;
+defparam \soc_inst|m0_1|u_logic|Pgfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y16_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~2 (
+// Location: LABCELL_X27_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uga2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// !\soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|B613z4~q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ppzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & 
+// \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|B613z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H903z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uga2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .lut_mask = 64'h000080800000A000;
-defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .lut_mask = 64'h00AA00AAFFFF00AA;
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~3 (
+// Location: MLABCELL_X28_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uga2z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uga2z4~2_combout  & ( (\soc_inst|m0_1|u_logic|Rds2z4~q  & (!\soc_inst|m0_1|u_logic|Uga2z4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ria2z4~0_combout  & !\soc_inst|m0_1|u_logic|Uga2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uga2z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Uga2z4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ria2z4~0_combout  & !\soc_inst|m0_1|u_logic|Uga2z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ppzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ppzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rds2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uga2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ria2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Uga2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uga2z4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ppzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uga2z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .lut_mask = 64'hC000400000000000;
-defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .lut_mask = 64'h0CCC00000FFF0000;
+defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxnvx4~0 (
+// Location: LABCELL_X31_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|G1s2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uga2z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|G1s2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|G1s2z4~q 
-// ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|G1s2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rkd3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Oihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uga2z4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oihvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .lut_mask = 64'hAACCAAFFAACCAAF0;
-defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .lut_mask = 64'h5555555550005000;
+defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y15_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jxovx4 (
+// Location: LABCELL_X31_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jxovx4~combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add3~37_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Hxnvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~105_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add3~37_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add3~37_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Add5~105_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add3~37_sumout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Oihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zpx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Add2~77_sumout ) # ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) 
+// # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zpx2z4~q  & ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add2~77_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zpx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Add2~77_sumout ) # 
+// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zpx2z4~q  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add2~77_sumout ) # (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add3~37_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~77_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oihvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jxovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jxovx4 .lut_mask = 64'h11111F1F11FF1FFF;
-defparam \soc_inst|m0_1|u_logic|Jxovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .lut_mask = 64'hE0E0EFEFE000EF00;
+defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qknvx4~0 (
+// Location: LABCELL_X31_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|Jxovx4~combout  $ (!\soc_inst|m0_1|u_logic|Ekovx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|Jxovx4~combout  $ (!\soc_inst|m0_1|u_logic|Ekovx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffs2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Oihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oihvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Oihvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oihvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Oihvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oihvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oihvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .lut_mask = 64'h0F0FAFAF030CABAE;
-defparam \soc_inst|m0_1|u_logic|Qknvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .lut_mask = 64'h00000000FF000100;
+defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y16_N5
-dffeas \soc_inst|m0_1|u_logic|Ffs2z4 (
+// Location: FF_X31_Y16_N37
+dffeas \soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qknvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -78559,760 +78210,828 @@ dffeas \soc_inst|m0_1|u_logic|Ffs2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ffs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B2uvx4~0 (
+// Location: LABCELL_X23_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rnovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B2uvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~q  & ( (!\soc_inst|m0_1|u_logic|Kop2z4~q  & !\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Rnovx4~combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Add3~73_sumout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Nozvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Nozvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Add3~73_sumout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Nozvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Nozvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add3~73_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rnovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|B2uvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rnovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rnovx4 .lut_mask = 64'hFF0FCC0CAA0A8808;
+defparam \soc_inst|m0_1|u_logic|Rnovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfuwx4 (
+// Location: MLABCELL_X25_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wfuwx4~combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & \soc_inst|m0_1|u_logic|J6i2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ekovx4~combout  & ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|S4qvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ekovx4~combout  & ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ((!\soc_inst|m0_1|u_logic|S4qvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Xxovx4~combout ))) # (\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Xxovx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ekovx4~combout  & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|S4qvx4~combout ) # (\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ekovx4~combout  & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & (((!\soc_inst|m0_1|u_logic|S4qvx4~combout  & \soc_inst|m0_1|u_logic|Yuovx4~combout )) # (\soc_inst|m0_1|u_logic|Xxovx4~combout ))) # (\soc_inst|m0_1|u_logic|Z6ovx4~combout  & 
+// (((!\soc_inst|m0_1|u_logic|Xxovx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wfuwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wfuwx4 .lut_mask = 64'h0000000011111111;
-defparam \soc_inst|m0_1|u_logic|Wfuwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .lut_mask = 64'h5ADAD0D0DADAD0D0;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Geuwx4~0 (
+// Location: LABCELL_X23_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Geuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|D4g3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|D4g3z4~q  & \soc_inst|m0_1|u_logic|M5tvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~6_combout  = ( \soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cqovx4~combout  & (\soc_inst|m0_1|u_logic|Y1pvx4~combout  & (\soc_inst|m0_1|u_logic|haddr_o~4_combout  & \soc_inst|m0_1|u_logic|C70wx4~combout 
+// ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|D4g3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C70wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Geuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .lut_mask = 64'h0303030303FF03FF;
-defparam \soc_inst|m0_1|u_logic|Geuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .lut_mask = 64'h0000000000020002;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N0
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[13]~27 (
+// Location: LABCELL_X24_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~8 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[13]~27_combout  = ( \soc_inst|interconnect_1|HRDATA[11]~3_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[11]~3_combout  & ( 
-// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Owovx4~combout  & ((!\soc_inst|m0_1|u_logic|Fvovx4~combout  & ((!\soc_inst|m0_1|u_logic|Yuovx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & !\soc_inst|m0_1|u_logic|Xxovx4~combout )))) # (\soc_inst|m0_1|u_logic|Fvovx4~combout  & (!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Xxovx4~combout )))))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Owovx4~combout ))) # (\soc_inst|m0_1|u_logic|Z6ovx4~combout  & 
+// (!\soc_inst|m0_1|u_logic|S4qvx4~combout  & \soc_inst|m0_1|u_logic|Owovx4~combout ))))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[13]~27 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[13]~27 .lut_mask = 64'hF0F0F0F000FF00FF;
-defparam \soc_inst|interconnect_1|HRDATA[13]~27 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .lut_mask = 64'hECA0CC0000003000;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~0 (
+// Location: LABCELL_X23_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Twmwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & (\soc_inst|m0_1|u_logic|T5g3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~q )))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (\soc_inst|m0_1|u_logic|T5g3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~q ))) ) ) ) # ( \soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|B7owx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|I7owx4~combout ) # (\soc_inst|m0_1|u_logic|K7g3z4~q ))) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|I7owx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|K7g3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Nlovx4~8_combout  & (\soc_inst|m0_1|u_logic|Vezvx4~combout  & !\soc_inst|m0_1|u_logic|Bv0wx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K7g3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T5g3z4~q ),
-	.datae(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nlovx4~8_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vezvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Twmwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .lut_mask = 64'hF5F5C4C400F500C4;
-defparam \soc_inst|m0_1|u_logic|Twmwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .lut_mask = 64'h0000000010101010;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~1 (
+// Location: LABCELL_X24_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Twmwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Twmwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yuovx4~combout  & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ((!\soc_inst|m0_1|u_logic|Ekovx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Fvovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yuovx4~combout  & ( \soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fvovx4~combout  & (!\soc_inst|m0_1|u_logic|Ekovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Rxzvx4~combout ) # (\soc_inst|m0_1|u_logic|Owovx4~combout )))) # (\soc_inst|m0_1|u_logic|Fvovx4~combout  & (((!\soc_inst|m0_1|u_logic|Rxzvx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yuovx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yuovx4~combout  & ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rxzvx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Fvovx4~combout  & \soc_inst|m0_1|u_logic|Owovx4~combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yxdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jtdwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Twmwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Twmwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .lut_mask = 64'h00000000CDEFCDEF;
-defparam \soc_inst|m0_1|u_logic|Twmwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .lut_mask = 64'hFF0AFF00DD08DD00;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Twmwx4~2 (
+// Location: LABCELL_X19_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Twmwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Twmwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Geuwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Twmwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout  & !\soc_inst|m0_1|u_logic|Geuwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|haddr_o~3_combout  = ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( \soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|Add3~93_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( \soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Add3~93_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( !\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Add3~93_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( !\soc_inst|m0_1|u_logic|P82wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Add3~93_sumout  & 
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Geuwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Twmwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add3~93_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P82wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .lut_mask = 64'h0000F8F80000FCFC;
-defparam \soc_inst|m0_1|u_logic|Twmwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~3 .lut_mask = 64'h00330F3F55775F7F;
+defparam \soc_inst|m0_1|u_logic|haddr_o~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcuvx4~0 (
+// Location: LABCELL_X24_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hsize_o~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vcuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Cymwx4~3_combout  & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|hsize_o~0_combout  = ( !\soc_inst|m0_1|u_logic|It52z4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vcuvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .lut_mask = 64'h0015003F15153F3F;
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hsize_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hsize_o~0 .lut_mask = 64'h0FFF0FFF00000000;
+defparam \soc_inst|m0_1|u_logic|hsize_o~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcuvx4~1 (
+// Location: LABCELL_X24_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Twmwx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Vcuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Twmwx4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vpovx4~combout  & ( (\soc_inst|m0_1|u_logic|haddr_o~3_combout  & (!\soc_inst|m0_1|u_logic|hsize_o~0_combout  & !\soc_inst|m0_1|u_logic|Hszvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vcuvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vpovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .lut_mask = 64'h00D000D000D000DD;
-defparam \soc_inst|m0_1|u_logic|Vcuvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .lut_mask = 64'h5000500000000000;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wamvx4~0 (
+// Location: LABCELL_X24_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wamvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Tdp2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Tdp2z4~q  & ( !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q  & (((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|H1rvx4~0_combout 
-// ))) # (\soc_inst|m0_1|u_logic|F0y2z4~q  & (((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ql0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ug0wx4~combout  & (!\soc_inst|m0_1|u_logic|Fq0wx4~combout  & \soc_inst|m0_1|u_logic|Nlovx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .lut_mask = 64'hF222F2FF222222FF;
-defparam \soc_inst|m0_1|u_logic|Wamvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y21_N19
-dffeas \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wamvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .lut_mask = 64'h00C000C000000000;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rryvx4~0 (
+// Location: LABCELL_X24_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rryvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|G0w2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Uaj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~4_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Nlovx4~3_combout  & (\soc_inst|m0_1|u_logic|Y92wx4~combout  & \soc_inst|m0_1|u_logic|haddr_o~5_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nlovx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y92wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .lut_mask = 64'h1000000000000000;
-defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Upyvx4~0 (
+// Location: LABCELL_X24_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Upyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rryvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Nlovx4~7_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Rnovx4~combout  & (\soc_inst|m0_1|u_logic|Nlovx4~5_combout  & (\soc_inst|m0_1|u_logic|Nlovx4~6_combout  & 
+// \soc_inst|m0_1|u_logic|Nlovx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nlovx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nlovx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Upyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .lut_mask = 64'h0000000044004400;
-defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3mwx4~0 (
+// Location: LABCELL_X24_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Elnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R3mwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (((\soc_inst|m0_1|u_logic|B73wx4~combout  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Elnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
+// ((\soc_inst|m0_1|u_logic|Fvovx4~combout ) # (\soc_inst|m0_1|u_logic|S4qvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & 
+// ((\soc_inst|m0_1|u_logic|Fvovx4~combout ) # (\soc_inst|m0_1|u_logic|S4qvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Elnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .lut_mask = 64'h000000000008000F;
-defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .lut_mask = 64'h00FFAAFF003FAABF;
+defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y22_N40
-dffeas \soc_inst|m0_1|u_logic|Pet2z4 (
+// Location: FF_X24_Y16_N31
+dffeas \soc_inst|m0_1|u_logic|J6i2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Elnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pet2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pet2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pet2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J6i2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J6i2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nen2z4~0 (
+// Location: LABCELL_X24_Y17_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N1uvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nen2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Pet2z4~q  & !\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( 
-// ((\soc_inst|m0_1|u_logic|Pet2z4~q  & !\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Kryvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|N1uvx4~combout  = ( !\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Ffs2z4~q  & \soc_inst|m0_1|u_logic|Mjl2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pet2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nen2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N1uvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .lut_mask = 64'h5F555F550F000F00;
-defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N1uvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N1uvx4 .lut_mask = 64'h0004000400000000;
+defparam \soc_inst|m0_1|u_logic|N1uvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nen2z4~1 (
+// Location: LABCELL_X30_Y20_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nen2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Nen2z4~q  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Upyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Msyvx4~combout ))) # (\soc_inst|m0_1|u_logic|Nen2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nen2z4~q  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (\soc_inst|m0_1|u_logic|Nen2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Msyvx4~combout ) # (\soc_inst|m0_1|u_logic|Vbovx4~0_combout )) # (\soc_inst|m0_1|u_logic|Upyvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nen2z4~q  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|S9ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mjl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mjl2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Upyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nen2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S9ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .lut_mask = 64'h0000FFFF070F8F0F;
-defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y19_N13
-dffeas \soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .lut_mask = 64'h00000AAA00005522;
+defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C1zvx4 (
+// Location: LABCELL_X30_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C1zvx4~combout  = ( \soc_inst|m0_1|u_logic|J4x2z4~q  & ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|J4x2z4~q  & ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & 
-// ( !\soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|J4x2z4~q  & ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|S9ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|E0uvx4~combout  & (!\soc_inst|m0_1|u_logic|S9ywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Qrp2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|S9ywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qrp2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S9ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C1zvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|S9ywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C1zvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C1zvx4 .lut_mask = 64'hF0F0F0F00000F0F0;
-defparam \soc_inst|m0_1|u_logic|C1zvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .lut_mask = 64'hFC00FC00A800A800;
+defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~0 (
+// Location: LABCELL_X30_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1j2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|C1zvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|C1zvx4~combout  ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|C1zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((\soc_inst|m0_1|u_logic|Ark2z4~q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q  & (((!\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|C1zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|S9ywx4~2_combout  = ( \soc_inst|m0_1|u_logic|S9ywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # ((!\soc_inst|m0_1|u_logic|H8l2z4~q )))) # (\soc_inst|m0_1|u_logic|Ywi2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Wfuwx4~combout  & ((!\soc_inst|m0_1|u_logic|K7pwx4~combout ) # (!\soc_inst|m0_1|u_logic|H8l2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C1zvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S9ywx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1j2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S9ywx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .lut_mask = 64'h30803F88FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .lut_mask = 64'h00000000FCA8FCA8;
+defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~3 (
+// Location: LABCELL_X30_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Otxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1j2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( (((\soc_inst|m0_1|u_logic|M1j2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Rngwx4~combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))))) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jky2z4~q ))) # (\soc_inst|m0_1|u_logic|Rxl2z4~q ))) ) 
-// )
+// \soc_inst|m0_1|u_logic|Otxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S9ywx4~2_combout  & ( (\soc_inst|m0_1|u_logic|N1uvx4~combout  & (\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|S9ywx4~2_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S9ywx4~2_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1j2z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Otxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .lut_mask = 64'h000000003F3FFFDF;
-defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .lut_mask = 64'h3333333301010101;
+defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~1 (
+// Location: LABCELL_X27_Y13_N12
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[31]~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1j2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Jky2z4~q ) # (\soc_inst|m0_1|u_logic|Akewx4~0_combout 
-// )))) # (\soc_inst|m0_1|u_logic|C1zvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Jky2z4~q ) # (\soc_inst|m0_1|u_logic|C1zvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Akewx4~0_combout ) ) ) )
+// \soc_inst|ram_1|data_to_memory[31]~1_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~0_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ) # (\soc_inst|ram_1|byte_select [3]))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o~0_combout  & ( (!\soc_inst|ram_1|byte_select [3] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & \soc_inst|ram_1|write_cycle~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|C1zvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~3_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select [3]),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ),
+	.datac(!\soc_inst|ram_1|write_cycle~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1j2z4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[31]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .lut_mask = 64'h00000000F5FFC4FF;
-defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[31]~1 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[31]~1 .lut_mask = 64'h0202020207070707;
+defparam \soc_inst|ram_1|data_to_memory[31]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzyvx4~0 (
+// Location: M10K_X26_Y14_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 (
+	.portawe(\soc_inst|ram_1|write_cycle~q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[31]~1_combout ,\soc_inst|ram_1|data_to_memory[15]~2_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_bit_number = 15;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_bit_number = 15;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000019B1B9DB74CA3D374D8D9B8D9B8D9BDAAAB0401461C3084C9571B371B371B37F092507D55555555555541E4BB000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y16_N57
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[15]~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|ram_1|data_to_memory[15]~2_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|byte_select [1]) ) ) ) # ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout  & ( (\soc_inst|ram_1|write_cycle~q  & !\soc_inst|ram_1|byte_select [1]) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|ram_1|write_cycle~q ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.datad(!\soc_inst|ram_1|byte_select [1]),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[15]~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[15]~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[15]~2 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[15]~2 .lut_mask = 64'h0000550000555555;
+defparam \soc_inst|ram_1|data_to_memory[15]~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H0zvx4~0 (
+// Location: LABCELL_X30_Y14_N0
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[31]~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H0zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|X77wx4~combout  ) )
+// \soc_inst|interconnect_1|HRDATA[31]~2_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & !\soc_inst|interconnect_1|HRDATA[26]~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datad(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|H0zvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[31]~2 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[31]~2 .lut_mask = 64'hCC00CC00CCFFCCFF;
+defparam \soc_inst|interconnect_1|HRDATA[31]~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y17_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~0 (
+// Location: LABCELL_X29_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Palwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cuyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Palwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( (\soc_inst|interconnect_1|HRDATA[31]~2_combout ) # (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Otxwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( 
+// ((\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|interconnect_1|HRDATA[31]~2_combout )) # (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B7owx4~combout  & ( !\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Otxwx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .lut_mask = 64'h88000000C2C20000;
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Palwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Palwx4~0 .lut_mask = 64'h33FF3FFF33333F3F;
+defparam \soc_inst|m0_1|u_logic|Palwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yyyvx4 (
+// Location: MLABCELL_X28_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U72wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yyyvx4~combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|U72wx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Imnwx4~combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Walwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (\soc_inst|m0_1|u_logic|Pmnwx4~combout  & ((!\soc_inst|m0_1|u_logic|Palwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Imnwx4~combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yyyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yyyvx4 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Yyyvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U72wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U72wx4~0 .lut_mask = 64'h080C88CC0A0FAAFF;
+defparam \soc_inst|m0_1|u_logic|U72wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~1 (
+// Location: LABCELL_X19_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yyyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Nsk2z4~q )))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Yyyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Sdhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add2~97_sumout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jwf3z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~97_sumout  & ( \soc_inst|m0_1|u_logic|Add5~65_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add2~97_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jwf3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~97_sumout  & ( 
+// !\soc_inst|m0_1|u_logic|Add5~65_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add2~97_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~65_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .lut_mask = 64'hE0F0E000E0F0E000;
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .lut_mask = 64'hAFAF8D8DAF008D00;
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~2 (
+// Location: LABCELL_X19_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cuyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & (!\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sdhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Sknwx4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cuyvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sdhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .lut_mask = 64'h00000000FCA8FCA8;
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .lut_mask = 64'h00000000FB00FB00;
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~3 (
+// Location: LABCELL_X19_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sdhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cuyvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Cuyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ((!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jky2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Sdhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|U72wx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Sdhvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & \soc_inst|m0_1|u_logic|U72wx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cuyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U72wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sdhvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .lut_mask = 64'h00000000F030F030;
-defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .lut_mask = 64'h00000000AAFAAAFB;
+defparam \soc_inst|m0_1|u_logic|Sdhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~2 (
+// Location: FF_X19_Y13_N1
+dffeas \soc_inst|m0_1|u_logic|Jwf3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Sdhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jwf3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jwf3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zcivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M1j2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Cuyvx4~3_combout  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Cuyvx4~3_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & 
-// ((\soc_inst|m0_1|u_logic|M1j2z4~q ))) # (\soc_inst|interconnect_1|HREADY~0_combout  & (\soc_inst|m0_1|u_logic|M1j2z4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Zcivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( \soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & 
+// (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y8q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y8q2z4~q  & ( !\soc_inst|m0_1|u_logic|haddr_o~3_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jwf3z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jwf3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zcivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .lut_mask = 64'h03CF03CF00FF00FF;
-defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .lut_mask = 64'h4545EFEF4500EF00;
+defparam \soc_inst|m0_1|u_logic|Zcivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y22_N8
-dffeas \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE (
+// Location: FF_X19_Y15_N20
+dffeas \soc_inst|m0_1|u_logic|Y8q2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zcivx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -79321,1267 +79040,1657 @@ dffeas \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Y8q2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Y8q2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y8q2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G02wx4 (
+// Location: FF_X21_Y20_N52
+dffeas \soc_inst|m0_1|u_logic|Cao2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cao2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cao2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cao2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y20_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hs92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G02wx4~combout  = ( \soc_inst|m0_1|u_logic|G02wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Hs92z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Cao2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G02wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Cao2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hs92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G02wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G02wx4 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|G02wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Hs92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y23_N50
-dffeas \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE (
+// Location: FF_X16_Y15_N49
+dffeas \soc_inst|m0_1|u_logic|O403z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|O403z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O403z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O403z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X16_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kq92z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O403z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I113z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O403z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|I113z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kq92z4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .lut_mask = 64'h5000000044000000;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X18_Y16_N25
+dffeas \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~2 (
+// Location: LABCELL_X17_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7bwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Hyz2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bv03z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyz2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Bv03z4~q ) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kq92z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Ro43z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bv03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ro43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7bwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kq92z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .lut_mask = 64'h00000000D0008000;
-defparam \soc_inst|m0_1|u_logic|D7bwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y23_N47
-dffeas \soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .lut_mask = 64'h0000500000004040;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~1 (
+// Location: MLABCELL_X15_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7bwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|X533z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kq92z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Z523z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|If33z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X533z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|If33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z523z4~q ),
 	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7bwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kq92z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .lut_mask = 64'h00000000C0A00000;
-defparam \soc_inst|m0_1|u_logic|D7bwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .lut_mask = 64'h00000000C8080000;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~0 (
+// Location: LABCELL_X19_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kq92z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Gf43z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Po53z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Kq92z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Kq92z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kq92z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hs92z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kq92z4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rbo2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Po53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gf43z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hs92z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rbo2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kq92z4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kq92z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kq92z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kq92z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .lut_mask = 64'h000000000000C088;
-defparam \soc_inst|m0_1|u_logic|D7bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|Kq92z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A9bwx4~0 (
+// Location: LABCELL_X19_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U11wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A9bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|J5m2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|U11wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Y8q2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kq92z4~3_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Y8q2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Y8q2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ym93z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nrvwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Y8q2z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ym93z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J5m2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y8q2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ym93z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kq92z4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A9bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .lut_mask = 64'h0000000040000000;
-defparam \soc_inst|m0_1|u_logic|A9bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U11wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U11wx4~0 .lut_mask = 64'hB8B8B8B8BBBBBB88;
+defparam \soc_inst|m0_1|u_logic|U11wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D7bwx4~3 (
+// Location: LABCELL_X18_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D7bwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|D7bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A9bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D7bwx4~2_combout  & (!\soc_inst|m0_1|u_logic|D7bwx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qz0wx4~1_combout  = ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|W21wx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W21wx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # ((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|W21wx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & !\soc_inst|m0_1|u_logic|W21wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|U11wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kfawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & (\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W21wx4~combout )))) # (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (((\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|W21wx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|D7bwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D7bwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D7bwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A9bwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|U11wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfawx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D7bwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .lut_mask = 64'hC400000000000000;
-defparam \soc_inst|m0_1|u_logic|D7bwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .lut_mask = 64'h3705330073503300;
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aqnvx4~0 (
+// Location: LABCELL_X18_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aqnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Ebbwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q  ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|D7bwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Qz0wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qz0wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & !\soc_inst|m0_1|u_logic|G11wx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qz0wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|G11wx4~0_combout  & !\soc_inst|m0_1|u_logic|Add5~69_sumout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D7bwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qz0wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G11wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~69_sumout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .lut_mask = 64'hCCCCFF0FCCCCFA0A;
-defparam \soc_inst|m0_1|u_logic|Aqnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .lut_mask = 64'h8000800080808080;
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O2bwx4~0 (
+// Location: LABCELL_X18_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qz0wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O2bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aqnvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Q3bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|I21wx4~combout  & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout  & (((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|I21wx4~combout  & ( (\soc_inst|m0_1|u_logic|Qz0wx4~2_combout  & 
+// ((\soc_inst|m0_1|u_logic|D31wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qz0wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D31wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I21wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O2bwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .lut_mask = 64'hFFAAA0C0AAFFC0A0;
-defparam \soc_inst|m0_1|u_logic|O2bwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .lut_mask = 64'h00000000030F070F;
+defparam \soc_inst|m0_1|u_logic|Qz0wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~0 (
+// Location: LABCELL_X19_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbo2z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I30wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O2bwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Cam2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Rbo2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Qz0wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O2bwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qz0wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rbo2z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I30wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I30wx4~0 .lut_mask = 64'h00000000FFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|I30wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rbo2z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rbo2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Rbo2z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~1 (
+// Location: FF_X19_Y15_N44
+dffeas \soc_inst|m0_1|u_logic|Rbo2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rbo2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rbo2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rbo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rbo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X15_Y21_N56
+dffeas \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Sg83z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X13_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z52xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I30wx4~1_combout  = ( \soc_inst|m0_1|u_logic|R40wx4~combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Rryvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|R40wx4~combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Rryvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & \soc_inst|m0_1|u_logic|Rryvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Z52xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & \soc_inst|m0_1|u_logic|T1d3z4~q 
+// )) ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I30wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z52xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I30wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I30wx4~1 .lut_mask = 64'h03030303FFFF0303;
-defparam \soc_inst|m0_1|u_logic|I30wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .lut_mask = 64'h0000000C00000000;
+defparam \soc_inst|m0_1|u_logic|Z52xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~0 (
+// Location: FF_X12_Y19_N41
+dffeas \soc_inst|m0_1|u_logic|J773z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J773z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J773z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J773z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J773z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X12_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U0vvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & \soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|Whlwx4~3_combout  & \soc_inst|m0_1|u_logic|Omyvx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Jl93z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|J773z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Jl93z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Jl93z4~q  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|J773z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Whlwx4~3_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rilwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|J773z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jl93z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U0vvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .lut_mask = 64'hF0FAF0FA00AA00AA;
-defparam \soc_inst|m0_1|u_logic|U0vvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~7 .lut_mask = 64'h0400000504000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~1 (
+// Location: LABCELL_X13_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U0vvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & !\soc_inst|m0_1|u_logic|Ihlwx4~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|W21wx4~7_combout  & ( \soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rbo2z4~q  & (!\soc_inst|m0_1|u_logic|Z52xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cao2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W21wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z52xx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cao2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mjlwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ihlwx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rbo2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cao2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z52xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W21wx4~7_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U0vvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .lut_mask = 64'hFCF0FCF0CC00CC00;
-defparam \soc_inst|m0_1|u_logic|U0vvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4~8 .lut_mask = 64'hF300000051000000;
+defparam \soc_inst|m0_1|u_logic|W21wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U0vvx4~2 (
+// Location: LABCELL_X13_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W21wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U0vvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U0vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|U0vvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|U0vvx4~0_combout  & !\soc_inst|m0_1|u_logic|U0vvx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|W21wx4~combout  = ( \soc_inst|m0_1|u_logic|W21wx4~6_combout  & ( \soc_inst|m0_1|u_logic|W21wx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U0vvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U0vvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W21wx4~8_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W21wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .lut_mask = 64'h8080808080C080C0;
-defparam \soc_inst|m0_1|u_logic|U0vvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W21wx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|W21wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~2 (
+// Location: LABCELL_X37_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O24wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I30wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~33_sumout  & ( (\soc_inst|m0_1|u_logic|I30wx4~0_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & (!\soc_inst|m0_1|u_logic|I30wx4~1_combout  & 
-// \soc_inst|m0_1|u_logic|U0vvx4~2_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~33_sumout  & ( (\soc_inst|m0_1|u_logic|I30wx4~0_combout  & (!\soc_inst|m0_1|u_logic|I30wx4~1_combout  & \soc_inst|m0_1|u_logic|U0vvx4~2_combout )) ) )
+// \soc_inst|m0_1|u_logic|O24wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( \soc_inst|m0_1|u_logic|W21wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( \soc_inst|m0_1|u_logic|W21wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( !\soc_inst|m0_1|u_logic|W21wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I30wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W21wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I30wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I30wx4~2 .lut_mask = 64'h0050005000100010;
-defparam \soc_inst|m0_1|u_logic|I30wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O24wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O24wx4~0 .lut_mask = 64'h0000AAFF5500FFFF;
+defparam \soc_inst|m0_1|u_logic|O24wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y23_N38
-dffeas \soc_inst|m0_1|u_logic|Hbv2z4 (
+// Location: FF_X36_Y17_N28
+dffeas \soc_inst|m0_1|u_logic|Gdo2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hbv2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gdo2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hbv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hbv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gdo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gdo2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y23_N43
-dffeas \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pjyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( (\soc_inst|m0_1|u_logic|Gdo2z4~q  & (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & \soc_inst|m0_1|u_logic|Xeo2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( (!\soc_inst|m0_1|u_logic|T2owx4~1_combout  & \soc_inst|m0_1|u_logic|Xeo2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( (\soc_inst|m0_1|u_logic|Gdo2z4~q  & !\soc_inst|m0_1|u_logic|T2owx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|T2owx4~1_combout  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Gdo2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T2owx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xeo2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .lut_mask = 64'hF0F0505000F00050;
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4~0 (
+// Location: LABCELL_X31_Y21_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pjyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|T0m2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H2m2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Hbv2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T0m2z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|H2m2z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Hbv2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pjyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pjyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[16]~30_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|U18wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout  & (\soc_inst|m0_1|u_logic|Pjyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|B7owx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[16]~30_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hbv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H2m2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T0m2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pjyvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U18wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .lut_mask = 64'hCACAFF0FCACAF000;
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .lut_mask = 64'h00C800C800FA00FA;
+defparam \soc_inst|m0_1|u_logic|Pjyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y26_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4~1 (
+// Location: MLABCELL_X25_Y21_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H783z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Y1u2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yx63z4~q  ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|V3m2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|O3pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9iwx4~1_combout  & (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W6iwx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V3m2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H783z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y1u2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yx63z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .lut_mask = 64'hAAAAFF00F0F0CCCC;
-defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .lut_mask = 64'h40504455C0F0CCFF;
+defparam \soc_inst|m0_1|u_logic|O3pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4 (
+// Location: MLABCELL_X25_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O3pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Pjyvx4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O3pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .lut_mask = 64'h00000000CFCFCECE;
+defparam \soc_inst|m0_1|u_logic|O3pvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3pvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|O3pvx4~combout  = ( \soc_inst|m0_1|u_logic|O3pvx4~1_combout  & ( (((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|O3pvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|O3pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3pvx4 .lut_mask = 64'h00000000777F777F;
+defparam \soc_inst|m0_1|u_logic|O3pvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzxwx4~combout  = ( \soc_inst|m0_1|u_logic|Fzxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fzxwx4~1_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fzxwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Fzxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fzxwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// \soc_inst|m0_1|u_logic|H3d3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ojnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~29_sumout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fzxwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzxwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzxwx4 .lut_mask = 64'h0000000F0F000F0F;
-defparam \soc_inst|m0_1|u_logic|Fzxwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wxxwx4~0 (
+// Location: LABCELL_X31_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9pvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wxxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( !\soc_inst|m0_1|u_logic|Wai2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wai2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wai2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wai2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|F9pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F9pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .lut_mask = 64'h300030003000FF00;
-defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .lut_mask = 64'h110155053303FF0F;
+defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9nwx4~0 (
+// Location: LABCELL_X31_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9pvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Svxwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|F9pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|F9pvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|F9pvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F9pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .lut_mask = 64'h3333033333333333;
-defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .lut_mask = 64'h000000000E0EFFFF;
+defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwdwx4~0 (
+// Location: LABCELL_X29_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pwdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ojnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .lut_mask = 64'h30F030F000C000C0;
-defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .lut_mask = 64'h44444444C4C4C4CC;
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~1 (
+// Location: LABCELL_X29_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Glnwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|Glnwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (\soc_inst|m0_1|u_logic|Glnwx4~0_combout )) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ojnvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|Ojnvx4~1_combout  & ( ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|O3pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|X4pvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|Ojnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X4pvx4~combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout  & 
+// (\soc_inst|m0_1|u_logic|J4pvx4~1_combout )) # (\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|O3pvx4~combout ))))) # (\soc_inst|m0_1|u_logic|X4pvx4~combout  & (\soc_inst|m0_1|u_logic|J4pvx4~1_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Z7i2z4~q  & ( !\soc_inst|m0_1|u_logic|Ojnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J4pvx4~1_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|J4pvx4~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O3pvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .lut_mask = 64'h3F0C3F0C0C0C0C0C;
-defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .lut_mask = 64'h0000C4C4313BF5FF;
+defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K22wx4~1 (
+// Location: FF_X29_Y16_N37
+dffeas \soc_inst|m0_1|u_logic|Z7i2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Z7i2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z7i2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y24_N56
+dffeas \soc_inst|m0_1|u_logic|Iwp2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Iwp2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Iwp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Iwp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y24_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K22wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Imnwx4~combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Imnwx4~combout  & ( \soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Imnwx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Rkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) # (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Sknwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Hmyvx4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|D4mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & !\soc_inst|m0_1|u_logic|R1w2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Iwp2z4~q ) # ((\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & !\soc_inst|m0_1|u_logic|R1w2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sknwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Imnwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Iwp2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K22wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D4mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K22wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K22wx4~1 .lut_mask = 64'h00000BBB0BBB0BBB;
-defparam \soc_inst|m0_1|u_logic|K22wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .lut_mask = 64'hFF30FF3030303030;
+defparam \soc_inst|m0_1|u_logic|D4mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K22wx4~0 (
+// Location: LABCELL_X31_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K22wx4~0_combout  = ( \soc_inst|m0_1|u_logic|K22wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Pmnwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Nlnwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Pmnwx4~combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|K22wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pmnwx4~combout ) # (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|D4mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Hyy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q ) # ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Hyy2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  
+// & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Hyy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nlnwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pmnwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K22wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D4mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K22wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K22wx4~0 .lut_mask = 64'h00000FFF00000EEE;
-defparam \soc_inst|m0_1|u_logic|K22wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .lut_mask = 64'h50505050DCDC5050;
+defparam \soc_inst|m0_1|u_logic|D4mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zz1wx4~0 (
+// Location: LABCELL_X23_Y24_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D4mvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zz1wx4~1_combout  & (\soc_inst|m0_1|u_logic|Zz1wx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zz1wx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Zz1wx4~2_combout  & !\soc_inst|m0_1|u_logic|Glnwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|D4mvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D4mvx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D4mvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|D4mvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z7i2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D4mvx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zz1wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zz1wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|D4mvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D4mvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .lut_mask = 64'h0000000003000301;
-defparam \soc_inst|m0_1|u_logic|Zz1wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .lut_mask = 64'hF0F0F030F0F00000;
+defparam \soc_inst|m0_1|u_logic|D4mvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y19_N26
-dffeas \soc_inst|m0_1|u_logic|Hq33z4 (
+// Location: FF_X23_Y24_N55
+dffeas \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|D4mvx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hq33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hq33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hq33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y19_N2
-dffeas \soc_inst|m0_1|u_logic|Kc03z4 (
+// Location: FF_X28_Y20_N10
+dffeas \soc_inst|m0_1|u_logic|Cy33z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kc03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cy33z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kc03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kc03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cy33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy33z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y19_N19
-dffeas \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE (
+// Location: FF_X28_Y20_N38
+dffeas \soc_inst|m0_1|u_logic|L753z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|L753z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L753z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L753z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~6 (
+// Location: LABCELL_X27_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Kc03z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Qyc3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Kc03z4~q ) # ((\soc_inst|m0_1|u_logic|T1d3z4~q )))) 
-// # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Qyc3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  
-// & !\soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Punvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Cy33z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|L753z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kc03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qyc3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cy33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|L753z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Punvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~6 .lut_mask = 64'hC0C08F8CC0C08380;
-defparam \soc_inst|m0_1|u_logic|P12wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~0 .lut_mask = 64'h000000000000A0C0;
+defparam \soc_inst|m0_1|u_logic|Punvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~4 (
+// Location: FF_X23_Y20_N38
+dffeas \soc_inst|m0_1|u_logic|Kf13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kf13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kf13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kf13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y20_N55
+dffeas \soc_inst|m0_1|u_logic|To23z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|To23z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|To23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|To23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y20_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Cvr2z4~q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Imu2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Punvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|To23z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Kf13z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|To23z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Kf13z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cvr2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Imu2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kf13z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|To23z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Punvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~4 .lut_mask = 64'hF3C0F3C000000000;
-defparam \soc_inst|m0_1|u_logic|P12wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~1 .lut_mask = 64'h00B0000000800000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y21_N11
-dffeas \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE (
+// Location: FF_X23_Y20_N13
+dffeas \soc_inst|m0_1|u_logic|Wlz2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Wlz2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wlz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wlz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~5 (
+// Location: FF_X27_Y22_N11
+dffeas \soc_inst|m0_1|u_logic|Qi03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qi03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qi03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qi03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~5_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Asr2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|Otr2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Punvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qi03z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wlz2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qi03z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Wlz2z4~q ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Otr2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wlz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qi03z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Punvx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Punvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~2 .lut_mask = 64'h00000000E0002000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Punvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Duuwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Duuwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duuwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Punvx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Duuwx4~2_combout  & !\soc_inst|m0_1|u_logic|Punvx4~2_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Duuwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Punvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Duuwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Punvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duuwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Duuwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Punvx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Punvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~3 .lut_mask = 64'h8000000000000000;
+defparam \soc_inst|m0_1|u_logic|Punvx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Punvx4~4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Punvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Punvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|U4z2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|Punvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Punvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Punvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|U4z2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Punvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Punvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Punvx4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Punvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Punvx4~4 .lut_mask = 64'hAAAACFCFAAAAC0CF;
+defparam \soc_inst|m0_1|u_logic|Punvx4~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lz8wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Lz8wx4~0_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Punvx4~4_combout  & (!\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Punvx4~4_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Punvx4~4_combout  & (!\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ ((!\soc_inst|m0_1|u_logic|Wzawx4~combout )))) # (\soc_inst|m0_1|u_logic|Punvx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & (!\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (\soc_inst|m0_1|u_logic|Wzawx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Punvx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # (!\soc_inst|m0_1|u_logic|U09wx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Lz8wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .lut_mask = 64'hFFF66960F0F06060;
+defparam \soc_inst|m0_1|u_logic|Lz8wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Qppvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lz8wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qppvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~93_sumout ) # (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Asr2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qppvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lz8wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~5 .lut_mask = 64'hFF00AAAA0000F0F0;
-defparam \soc_inst|m0_1|u_logic|P12wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .lut_mask = 64'h00000000AF00AF00;
+defparam \soc_inst|m0_1|u_logic|Qppvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E913z4~feeder (
+// Location: MLABCELL_X28_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E913z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|C2rvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E913z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C2rvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E913z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E913z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|E913z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .lut_mask = 64'hFCFCCCCCF0F00000;
+defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y16_N44
-dffeas \soc_inst|m0_1|u_logic|E913z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|E913z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|C2rvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Khfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|C2rvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E913z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E913z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .lut_mask = 64'hF555F555F000F000;
+defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~7 (
+// Location: MLABCELL_X28_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|C2rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C2rvx4~1_combout  & !\soc_inst|m0_1|u_logic|C2rvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|C2rvx4~1_combout  & !\soc_inst|m0_1|u_logic|C2rvx4~0_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|C2rvx4~1_combout  & !\soc_inst|m0_1|u_logic|C2rvx4~0_combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|C2rvx4~1_combout  & !\soc_inst|m0_1|u_logic|C2rvx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E913z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C2rvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C2rvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~7 .lut_mask = 64'hF3F3FFFF00F00000;
-defparam \soc_inst|m0_1|u_logic|P12wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .lut_mask = 64'h808080808080C0C0;
+defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~0 (
+// Location: MLABCELL_X28_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qppvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~0_combout  = ( \soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|P12wx4~4_combout ))) # (\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( 
-// \soc_inst|m0_1|u_logic|P12wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|P12wx4~4_combout ))) # (\soc_inst|m0_1|u_logic|P12wx4~6_combout  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~7_combout  & ( ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|P12wx4~4_combout )) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q )))) # (\soc_inst|m0_1|u_logic|P12wx4~6_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~5_combout  & ( 
-// !\soc_inst|m0_1|u_logic|P12wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~6_combout  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|P12wx4~4_combout ))) # (\soc_inst|m0_1|u_logic|P12wx4~6_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Qppvx4~2_combout  = ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qppvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Htyvx4~3_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P12wx4~6_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|P12wx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|P12wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~7_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qppvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~0 .lut_mask = 64'h4C5D7F5D08190819;
-defparam \soc_inst|m0_1|u_logic|P12wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .lut_mask = 64'h0000000000CF00CF;
+defparam \soc_inst|m0_1|u_logic|Qppvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y21_N49
-dffeas \soc_inst|m0_1|u_logic|Qz43z4 (
+// Location: FF_X23_Y20_N19
+dffeas \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qz43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qz43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X31_Y19_N43
-dffeas \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE (
+// Location: FF_X21_Y21_N47
+dffeas \soc_inst|m0_1|u_logic|Dtj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dtj2z4~feeder_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Dtj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dtj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dtj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~1 (
+// Location: MLABCELL_X21_Y21_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Qz43z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|V7ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duu2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duu2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Duu2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Dtj2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Fwj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duu2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Dtj2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Fwj2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qz43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dtj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fwj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Duu2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V7ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~1 .lut_mask = 64'h0A00000008080000;
-defparam \soc_inst|m0_1|u_logic|P12wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .lut_mask = 64'hCFC0CFC0FAFA0A0A;
+defparam \soc_inst|m0_1|u_logic|V7ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y19_N47
-dffeas \soc_inst|m0_1|u_logic|Ii73z4 (
+// Location: FF_X24_Y18_N35
+dffeas \soc_inst|m0_1|u_logic|Dq73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ii73z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dq73z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ii73z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dq73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ii73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ii73z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dq73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dq73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qwr2z4~feeder (
+// Location: LABCELL_X22_Y22_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qwr2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Zz1wx4~0_combout  )
+// \soc_inst|m0_1|u_logic|V7ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dq73z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ug63z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ukt2z4~q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ruj2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ruj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ukt2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ug63z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dq73z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qwr2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V7ywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qwr2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qwr2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Qwr2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .lut_mask = 64'hAAAACCCCF0F0FF00;
+defparam \soc_inst|m0_1|u_logic|V7ywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y23_N1
-dffeas \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qwr2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X27_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V7ywx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V7ywx4~combout  = ( \soc_inst|m0_1|u_logic|V7ywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q ) # (\soc_inst|m0_1|u_logic|V7ywx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|V7ywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|V7ywx4~0_combout )) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|V7ywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|V7ywx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|V7ywx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|V7ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V7ywx4 .lut_mask = 64'h0003000330333033;
+defparam \soc_inst|m0_1|u_logic|V7ywx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y21_N43
-dffeas \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X27_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A7ywx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|A7ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q ) # ((\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & \soc_inst|m0_1|u_logic|V7ywx4~combout )))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wai2z4~q  & \soc_inst|m0_1|u_logic|V7ywx4~combout )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|V7ywx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .lut_mask = 64'h0044C0C40044C0C4;
+defparam \soc_inst|m0_1|u_logic|A7ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~2 (
+// Location: LABCELL_X27_Y18_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mzxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Szr2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
-//  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z863z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~2 .lut_mask = 64'hA000000800000008;
-defparam \soc_inst|m0_1|u_logic|P12wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4~3 (
+// Location: MLABCELL_X28_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vy7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~1_combout  & (\soc_inst|m0_1|u_logic|Ii73z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qc1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Svxwx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  $ (\soc_inst|m0_1|u_logic|Svxwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|P12wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ii73z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qc1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4~3 .lut_mask = 64'hAA0A220200000000;
-defparam \soc_inst|m0_1|u_logic|P12wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .lut_mask = 64'hAA55AA55EA15EA15;
+defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P12wx4 (
+// Location: LABCELL_X31_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwdwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P12wx4~combout  = ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Hq33z4~q  & (!\soc_inst|m0_1|u_logic|P12wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rr83z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|P12wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rr83z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Pwdwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & \soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hq33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P12wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rr83z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P12wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P12wx4 .lut_mask = 64'h00000000C0F04050;
-defparam \soc_inst|m0_1|u_logic|P12wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .lut_mask = 64'h0C0CFCFC00000000;
+defparam \soc_inst|m0_1|u_logic|Pwdwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lk9wx4~1 (
+// Location: LABCELL_X31_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glnwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lk9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|D1awx4~0_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~combout  & ( (\soc_inst|m0_1|u_logic|W7z2z4~q  & !\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|D1awx4~0_combout  & ( \soc_inst|m0_1|u_logic|P12wx4~combout  & ( !\soc_inst|m0_1|u_logic|Lk9wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|D1awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|W7z2z4~q  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Lk9wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|D1awx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P12wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & !\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Glnwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & \soc_inst|m0_1|u_logic|Glnwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qs7wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & (\soc_inst|m0_1|u_logic|Glnwx4~0_combout )) # (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lk9wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Glnwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pwdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qs7wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lk9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .lut_mask = 64'hF0005000FF005500;
-defparam \soc_inst|m0_1|u_logic|Lk9wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .lut_mask = 64'h5F0A5F0A0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Glnwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skhvx4~1 (
+// Location: FF_X29_Y17_N20
+dffeas \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lkhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Skhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~41_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add2~49_sumout ) # ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q )))))) ) )
+// \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~105_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Add2~41_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q )))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~49_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~41_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q ),
-	.datag(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE_q ),
+	.datag(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Skhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lkhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .lut_mask = 64'h80808880C4C4CCC4;
-defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .lut_mask = 64'hC000C800C0CCC8CC;
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skhvx4~0 (
+// Location: LABCELL_X29_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lkhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Skhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Skhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|K22wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Skhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & \soc_inst|m0_1|u_logic|K22wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Skhvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & \soc_inst|m0_1|u_logic|K22wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Skhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout  & \soc_inst|m0_1|u_logic|K22wx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Lkhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wn1wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lkhvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Skhvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wn1wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lkhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .lut_mask = 64'h5054505450545055;
-defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .lut_mask = 64'h00000000AAAAEEEF;
+defparam \soc_inst|m0_1|u_logic|Lkhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y22_N8
-dffeas \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE (
+// Location: FF_X29_Y17_N19
+dffeas \soc_inst|m0_1|u_logic|Ufx2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Lkhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -80590,45 +80699,45 @@ dffeas \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ufx2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ufx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ufx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y16_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohivx4~0 (
+// Location: LABCELL_X19_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hvivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ohivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Szr2z4~q  & ( \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Szr2z4~q  & ( !\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z6ovx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z6ovx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Szr2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z6ovx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hvivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rkd3z4~q  & ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ufx2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rkd3z4~q  & ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rkd3z4~q  & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ufx2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rkd3z4~q  & ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ufx2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ufx2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .lut_mask = 64'h2220EEE03330FFF0;
-defparam \soc_inst|m0_1|u_logic|Ohivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .lut_mask = 64'h0F05FFF50C04CCC4;
+defparam \soc_inst|m0_1|u_logic|Hvivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y16_N16
-dffeas \soc_inst|m0_1|u_logic|Szr2z4 (
+// Location: FF_X19_Y12_N16
+dffeas \soc_inst|m0_1|u_logic|Rkd3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ohivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hvivx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -80637,170 +80746,150 @@ dffeas \soc_inst|m0_1|u_logic|Szr2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Szr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rkd3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Szr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Szr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rkd3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rkd3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y16_N43
-dffeas \soc_inst|m0_1|u_logic|E913z4 (
+// Location: FF_X15_Y19_N55
+dffeas \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|E913z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|E913z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E913z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|E913z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~2 (
+// Location: LABCELL_X16_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kn9wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Kc03z4~q  & ( \soc_inst|m0_1|u_logic|E913z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kc03z4~q  & ( !\soc_inst|m0_1|u_logic|E913z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kc03z4~q  & ( !\soc_inst|m0_1|u_logic|E913z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Uga2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|I463z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|I463z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kc03z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|E913z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|I463z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uga2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .lut_mask = 64'h0808080000080000;
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .lut_mask = 64'h000000D000000080;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y19_N44
-dffeas \soc_inst|m0_1|u_logic|Yg23z4 (
+// Location: FF_X16_Y17_N32
+dffeas \soc_inst|m0_1|u_logic|Rds2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yg23z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rds2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yg23z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yg23z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rds2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rds2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~1 (
+// Location: LABCELL_X16_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kn9wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yg23z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hq33z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Uga2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Ql33z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Hc23z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yg23z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hq33z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hc23z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ql33z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uga2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .lut_mask = 64'h000000008A800000;
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y21_N10
-dffeas \soc_inst|m0_1|u_logic|Eyr2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Eyr2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Eyr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .lut_mask = 64'h4040000044000000;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y21_N44
-dffeas \soc_inst|m0_1|u_logic|Z863z4 (
+// Location: FF_X16_Y14_N37
+dffeas \soc_inst|m0_1|u_logic|B613z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Zz1wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Pn1wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z863z4~q ),
+	.q(\soc_inst|m0_1|u_logic|B613z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z863z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z863z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B613z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|B613z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~0 (
+// Location: LABCELL_X16_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kn9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Z863z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qz43z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Uga2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H903z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|B613z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z863z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qz43z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|B613z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H903z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uga2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .lut_mask = 64'h0000000050004400;
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .lut_mask = 64'h000000008800A000;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y23_N2
-dffeas \soc_inst|m0_1|u_logic|Qwr2z4 (
+// Location: FF_X19_Y14_N16
+dffeas \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qwr2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Dcs2z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -80809,124 +80898,122 @@ dffeas \soc_inst|m0_1|u_logic|Qwr2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qwr2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qwr2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qwr2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hp9wx4~0 (
+// Location: LABCELL_X17_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ria2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hp9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qwr2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ria2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qwr2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ria2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .lut_mask = 64'h0000008000000000;
-defparam \soc_inst|m0_1|u_logic|Hp9wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .lut_mask = 64'h0000000008000000;
+defparam \soc_inst|m0_1|u_logic|Ria2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y19_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kn9wx4~3 (
+// Location: LABCELL_X16_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uga2z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kn9wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Kn9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hp9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kn9wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Kn9wx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Eyr2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Uga2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Uga2z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ria2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uga2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Uga2z4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rds2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kn9wx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kn9wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eyr2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kn9wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hp9wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uga2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rds2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uga2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uga2z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ria2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uga2z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .lut_mask = 64'h8088000000000000;
-defparam \soc_inst|m0_1|u_logic|Kn9wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .lut_mask = 64'hA020000000000000;
+defparam \soc_inst|m0_1|u_logic|Uga2z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F32wx4~0 (
+// Location: LABCELL_X16_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hxnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F32wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lr9wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Szr2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Kn9wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Szr2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Hxnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Uga2z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Rkd3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pjqwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Uga2z4~3_combout  & ( !\soc_inst|m0_1|u_logic|G1s2z4~q  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uga2z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Rkd3z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Uga2z4~3_combout  & ( !\soc_inst|m0_1|u_logic|G1s2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I793z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Szr2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kn9wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rkd3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|G1s2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uga2z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F32wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F32wx4~0 .lut_mask = 64'hAACCAAFFAACCAAF0;
-defparam \soc_inst|m0_1|u_logic|F32wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .lut_mask = 64'hCCCCAAFFCCCCAAF0;
+defparam \soc_inst|m0_1|u_logic|Hxnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y15_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z6ovx4 (
+// Location: MLABCELL_X25_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jxovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z6ovx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Add3~45_sumout ))) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~45_sumout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Add3~45_sumout ))) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~45_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|F32wx4~0_combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// (\soc_inst|m0_1|u_logic|Add3~45_sumout ))) # (\soc_inst|m0_1|u_logic|F32wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~45_sumout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jxovx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~37_sumout  & ( \soc_inst|m0_1|u_logic|Add5~105_sumout  & ( (((\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~37_sumout  & ( \soc_inst|m0_1|u_logic|Add5~105_sumout  & ( ((\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~37_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~105_sumout  & ( ((\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~37_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~105_sumout  & ( (\soc_inst|m0_1|u_logic|Hxnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~45_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hxnvx4~0_combout ),
 	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~37_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~105_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z6ovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z6ovx4 .lut_mask = 64'h035703570357FFFF;
-defparam \soc_inst|m0_1|u_logic|Z6ovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jxovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jxovx4 .lut_mask = 64'h000F555F333F777F;
+defparam \soc_inst|m0_1|u_logic|Jxovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y15_N32
-dffeas \soc_inst|ram_1|saved_word_address[6] (
+// Location: FF_X25_Y17_N19
+dffeas \soc_inst|ram_1|saved_word_address[8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Jxovx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -80935,66 +81022,67 @@ dffeas \soc_inst|ram_1|saved_word_address[6] (
 	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [6]),
+	.q(\soc_inst|ram_1|saved_word_address [8]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[6] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[6] .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[8] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[8] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N39
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[6]~6 (
+// Location: MLABCELL_X25_Y17_N15
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[8]~8 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[6]~6_combout  = ( \soc_inst|m0_1|u_logic|Z6ovx4~combout  & ( ((!\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|always1~0_combout )) # (\soc_inst|ram_1|saved_word_address [6]) ) ) # ( !\soc_inst|m0_1|u_logic|Z6ovx4~combout  
-// & ( (\soc_inst|ram_1|saved_word_address [6] & ((!\soc_inst|ram_1|always1~0_combout ) # (\soc_inst|ram_1|write_cycle~q ))) ) )
+// \soc_inst|ram_1|memory.raddr_a[8]~8_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Jxovx4~combout )) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// ((\soc_inst|ram_1|saved_word_address [8]))) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [8] ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|saved_word_address [6]),
-	.datad(!\soc_inst|ram_1|always1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|saved_word_address [8]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[6]~6_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[8]~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .lut_mask = 64'h0F050F050FAF0FAF;
-defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .lut_mask = 64'h0F0F0F0F47474747;
+defparam \soc_inst|ram_1|memory.raddr_a[8]~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y14_N33
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[17]~10 (
+// Location: LABCELL_X33_Y15_N9
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[20]~16 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[17]~10_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & ( (!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ) # (\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ))) ) )
+// \soc_inst|ram_1|data_to_memory[20]~16_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (!\soc_inst|ram_1|byte_select [2] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (\soc_inst|ram_1|byte_select [2] & \soc_inst|ram_1|write_cycle~q ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
-	.datab(!\soc_inst|ram_1|write_cycle~q ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|byte_select [2]),
+	.datac(!\soc_inst|ram_1|write_cycle~q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[17]~10_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[20]~16_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[17]~10 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[17]~10 .lut_mask = 64'h1313131302020202;
-defparam \soc_inst|ram_1|data_to_memory[17]~10 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[20]~16 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[20]~16 .lut_mask = 64'h030300000F0F0C0C;
+defparam \soc_inst|ram_1|data_to_memory[20]~16 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y14_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
+// Location: M10K_X26_Y18_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -81009,7 +81097,7 @@ cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 (
 	.clr0(gnd),
 	.clr1(gnd),
 	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[17]~10_combout ,\soc_inst|ram_1|data_to_memory[9]~9_combout }),
+	.portadatain({\soc_inst|ram_1|data_to_memory[20]~16_combout ,\soc_inst|ram_1|data_to_memory[4]~15_combout }),
 	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
 \soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
 \soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
@@ -81022,221 +81110,234 @@ cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_bit_number = 9;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_bit_number = 9;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001D75D1194051D8FF16BC5F87AC955555555555555B706000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_first_bit_number = 4;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_first_bit_number = 4;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000541C1C001F2547D9F6404440444044114501542F162817A1428808880888088012D2F81555555555555553240400505005555555500001540";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N39
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[9]~9 (
+// Location: LABCELL_X31_Y17_N42
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[4]~23 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[9]~9_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & !\soc_inst|ram_1|byte_select [1])) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ))) ) )
+// \soc_inst|interconnect_1|HRDATA[4]~23_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
+// (\soc_inst|switches_1|switch_store[0][4]~q ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
+// \soc_inst|switches_1|switch_store[0][4]~q )) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
-	.datad(!\soc_inst|ram_1|byte_select [1]),
+	.datac(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[0][4]~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[9]~6_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[9]~9_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[9]~9 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[9]~9 .lut_mask = 64'h0555055505000500;
-defparam \soc_inst|ram_1|data_to_memory[9]~9 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[4]~23 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[4]~23 .lut_mask = 64'h000500050A0F0A0F;
+defparam \soc_inst|interconnect_1|HRDATA[4]~23 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jqhvx4~0 (
+// Location: MLABCELL_X34_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W5rvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jqhvx4~0_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout ) # ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|switches_1|switch_store[1][1]~q )) ) ) # ( 
-// !\soc_inst|interconnect_1|Equal1~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout ) # ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) ) )
+// \soc_inst|m0_1|u_logic|W5rvx4~combout  = ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
-	.datad(!\soc_inst|switches_1|switch_store[1][1]~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jqhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W5rvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .lut_mask = 64'hFEFEFEFEFFEEFFEE;
-defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W5rvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W5rvx4 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|W5rvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpsvx4~0 (
+// Location: LABCELL_X35_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bpsvx4~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|m0_1|u_logic|Vaw2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Fbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Owq2z4~q  & ( \soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (!\soc_inst|interconnect_1|HRDATA[4]~23_combout  & ((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Owq2z4~q  & ( !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (!\soc_inst|interconnect_1|HRDATA[4]~23_combout  & ((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Owq2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[4]~23_combout  & ((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W5rvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .lut_mask = 64'hEE0EEE0E0000EE0E;
+defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y16_N22
-dffeas \soc_inst|m0_1|u_logic|Mfw2z4 (
+// Location: FF_X35_Y16_N55
+dffeas \soc_inst|m0_1|u_logic|Owq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jqhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mfw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Owq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mfw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mfw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Owq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Owq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pqrvx4~0 (
+// Location: MLABCELL_X28_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Leuvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pqrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ))) # 
-// (\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|switches_1|switch_store[1][1]~q )))) ) )
+// \soc_inst|m0_1|u_logic|Leuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Gtmwx4~2_combout )))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datac(!\soc_inst|switches_1|switch_store[1][1]~q ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pqrvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Leuvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .lut_mask = 64'h0000000001230123;
-defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .lut_mask = 64'h0103050F113355FF;
+defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S7nvx4~0 (
+// Location: MLABCELL_X28_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Leuvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S7nvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pqrvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~21_combout  & (((\soc_inst|m0_1|u_logic|Rxl2z4~q )) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ))) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~21_combout  & (!\soc_inst|m0_1|u_logic|Vapvx4~combout  & ((\soc_inst|m0_1|u_logic|Rxl2z4~q ) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Leuvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Leuvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|Leuvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Leuvx4~0_combout  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & \soc_inst|m0_1|u_logic|Leuvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Leuvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S7nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .lut_mask = 64'h32FA32FA00000000;
-defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .lut_mask = 64'h00AA00FF00020003;
+defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S7nvx4~1 (
+// Location: LABCELL_X36_Y21_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pamvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|S7nvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dwl2z4~q  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mfw2z4~q ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|S7nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mfw2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Pamvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~q  & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Trq2z4~q  & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Trq2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Owq2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Trq2z4~q  & ( !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Owq2z4~q  & (((!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) # (\soc_inst|m0_1|u_logic|H1rvx4~0_combout 
+// ))) # (\soc_inst|m0_1|u_logic|Owq2z4~q  & (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mfw2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S7nvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .lut_mask = 64'h00000000F3F35151;
-defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .lut_mask = 64'hC0EAF3FB00AA33BB;
+defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y20_N56
-dffeas \soc_inst|m0_1|u_logic|Rxl2z4 (
+// Location: FF_X36_Y21_N37
+dffeas \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -81245,701 +81346,858 @@ dffeas \soc_inst|m0_1|u_logic|Rxl2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rxl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rxl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Celwx4~0 (
+// Location: LABCELL_X23_Y24_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjkvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Celwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rxl2z4~q  & ( (!\soc_inst|m0_1|u_logic|Keiwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Jky2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Rxl2z4~q  & ( !\soc_inst|m0_1|u_logic|Keiwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Bjkvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0pvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0pvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Celwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bjkvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Celwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Celwx4~0 .lut_mask = 64'hF0F0F0F0F0D0F0D0;
-defparam \soc_inst|m0_1|u_logic|Celwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Celwx4~1 (
+// Location: LABCELL_X23_Y24_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjkvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Celwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ocfwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Celwx4~0_combout  & (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|G27wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ocfwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Celwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Bjkvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yuovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bjkvx4~0_combout  & (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|R8x2z4~q 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Yuovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bjkvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|R8x2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Celwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bjkvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Celwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Celwx4~1 .lut_mask = 64'h5555555500150015;
-defparam \soc_inst|m0_1|u_logic|Celwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .lut_mask = 64'hC4C4C4C4C400C400;
+defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbfwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Fbfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout  & ((\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~q ))) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Celwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fbfwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Celwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y24_N50
+dffeas \soc_inst|m0_1|u_logic|Ovc3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ovc3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .lut_mask = 64'h0000000045051515;
-defparam \soc_inst|m0_1|u_logic|Fbfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ovc3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ovc3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Herwx4~0 (
+// Location: LABCELL_X27_Y22_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnkvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Herwx4~0_combout  = (!\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & (\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))))
+// \soc_inst|m0_1|u_logic|Qnkvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Efp2z4~q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Efp2z4~q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datae(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Efp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Herwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qnkvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Herwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Herwx4~0 .lut_mask = 64'h7530753075307530;
-defparam \soc_inst|m0_1|u_logic|Herwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .lut_mask = 64'hC0C0D5D5C0C0D5D5;
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Herwx4~1 (
+// Location: LABCELL_X23_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnkvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Herwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Herwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Viy2z4~q ) # (\soc_inst|m0_1|u_logic|E4iwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Qnkvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Qnkvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Qnkvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Herwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qnkvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Herwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Herwx4~1 .lut_mask = 64'h0555055500000000;
-defparam \soc_inst|m0_1|u_logic|Herwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .lut_mask = 64'hAFAF8C8C00000000;
+defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y22_N40
-dffeas \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE (
+// Location: FF_X23_Y19_N47
+dffeas \soc_inst|m0_1|u_logic|Efp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Efp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Efp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Efp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vb2wx4~0 (
+// Location: FF_X21_Y20_N47
+dffeas \soc_inst|m0_1|u_logic|Wmp2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wmp2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wmp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wmp2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y19_N37
+dffeas \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y22_N28
+dffeas \soc_inst|m0_1|u_logic|V233z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V233z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V233z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V233z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y22_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vb2wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qj2wx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Vi2wx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Qw62z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|V233z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vi2wx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qj2wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|V233z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vb2wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qw62z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .lut_mask = 64'hFCCCFCCCF000F000;
-defparam \soc_inst|m0_1|u_logic|Vb2wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .lut_mask = 64'h00A0000000C00000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vb2wx4 (
+// Location: FF_X24_Y22_N50
+dffeas \soc_inst|m0_1|u_logic|Zr03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zr03z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zr03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zr03z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y22_N38
+dffeas \soc_inst|m0_1|u_logic|Fvz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fvz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fvz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fvz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y22_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vb2wx4~combout  = ( !\soc_inst|m0_1|u_logic|Vb2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|If2wx4~0_combout  & ((\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Qw62z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fvz2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zr03z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oi2wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|If2wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vb2wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zr03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fvz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qw62z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vb2wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vb2wx4 .lut_mask = 64'h003F003F00000000;
-defparam \soc_inst|m0_1|u_logic|Vb2wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .lut_mask = 64'h2200300000000000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Meyvx4 (
+// Location: LABCELL_X24_Y23_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec43z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Meyvx4~combout  = ( \soc_inst|m0_1|u_logic|Ge2wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vb2wx4~combout  & \soc_inst|m0_1|u_logic|Yv1wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ec43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vb2wx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Yv1wx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ge2wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ec43z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Meyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Meyvx4 .lut_mask = 64'h0000000000AA00AA;
-defparam \soc_inst|m0_1|u_logic|Meyvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ec43z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Ec43z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y21_N55
-dffeas \soc_inst|m0_1|u_logic|Lq03z4 (
+// Location: FF_X24_Y23_N23
+dffeas \soc_inst|m0_1|u_logic|Ec43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lq03z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ec43z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lq03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ec43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lq03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lq03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ec43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ec43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rtz2z4~feeder (
+// Location: FF_X27_Y19_N14
+dffeas \soc_inst|m0_1|u_logic|Nl53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nl53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nl53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nl53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y23_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rtz2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Qw62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ec43z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nl53z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ec43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nl53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rtz2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qw62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtz2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rtz2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Rtz2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .lut_mask = 64'h000000000A0C0000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X22_Y19_N14
-dffeas \soc_inst|m0_1|u_logic|Rtz2z4 (
+// Location: FF_X22_Y13_N2
+dffeas \soc_inst|m0_1|u_logic|Ilp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rtz2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ilp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rtz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rtz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ilp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ilp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X22_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~2 (
+// Location: LABCELL_X22_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qp62z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rtz2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lq03z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ny62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ilp2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lq03z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ilp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qp62z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .lut_mask = 64'h00000000A000C000;
-defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yr13z4~feeder (
+// Location: LABCELL_X23_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yr13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Qw62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Qw62z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ny62z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qw62z4~1_combout  & (!\soc_inst|m0_1|u_logic|Qw62z4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wmp2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wmp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qw62z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qw62z4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qw62z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ny62z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yr13z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qw62z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yr13z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yr13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Yr13z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X23_Y21_N47
-dffeas \soc_inst|m0_1|u_logic|Yr13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yr13z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yr13z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yr13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yr13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .lut_mask = 64'hC400000000000000;
+defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H133z4~feeder (
+// Location: LABCELL_X23_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mpnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H133z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ovc3z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qxuwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ovc3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Efp2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Ovc3z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ovc3z4~q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Efp2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Efp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qw62z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H133z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H133z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H133z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|H133z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .lut_mask = 64'hACACAFAFACACAFA0;
+defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y21_N50
-dffeas \soc_inst|m0_1|u_logic|H133z4 (
+// Location: FF_X21_Y20_N14
+dffeas \soc_inst|m0_1|u_logic|I7r2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H133z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H133z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I7r2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H133z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H133z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I7r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I7r2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~1 (
+// Location: LABCELL_X23_Y23_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z472z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qp62z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H133z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yr13z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Z472z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|U5r2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yr13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H133z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U5r2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qp62z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z472z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .lut_mask = 64'h4400500000000000;
-defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z472z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z472z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Z472z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ytm2z4~feeder (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ytm2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ytm2z4~feeder_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y23_N41
+dffeas \soc_inst|m0_1|u_logic|Nt03z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nt03z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ytm2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ytm2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ytm2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nt03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nt03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y20_N32
-dffeas \soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE (
+// Location: FF_X23_Y23_N8
+dffeas \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ytm2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nr62z4~0 (
+// Location: LABCELL_X23_Y23_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nr62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|C372z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
+// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nt03z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nt03z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nr62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C372z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .lut_mask = 64'h0008000000000000;
-defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~2 .lut_mask = 64'h000088000000C000;
+defparam \soc_inst|m0_1|u_logic|C372z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y19_N40
-dffeas \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE (
+// Location: FF_X23_Y23_N44
+dffeas \soc_inst|m0_1|u_logic|J433z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|J433z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J433z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J433z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qa43z4~feeder (
+// Location: FF_X28_Y21_N34
+dffeas \soc_inst|m0_1|u_logic|Av13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Av13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Av13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y23_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qa43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|C372z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J433z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  & !\soc_inst|m0_1|u_logic|Av13z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|J433z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Av13z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|C372z4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C372z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~1 .lut_mask = 64'h0A00080800000000;
+defparam \soc_inst|m0_1|u_logic|C372z4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y23_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bn53z4~feeder (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bn53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|C00wx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qa43z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bn53z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qa43z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qa43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Qa43z4~feeder .shared_arith = "off";
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bn53z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bn53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Bn53z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y21_N41
-dffeas \soc_inst|m0_1|u_logic|Qa43z4 (
+// Location: FF_X27_Y23_N59
+dffeas \soc_inst|m0_1|u_logic|Bn53z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qa43z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Bn53z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bn53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bn53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bn53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y21_N10
+dffeas \soc_inst|m0_1|u_logic|Sd43z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
 	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qa43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sd43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qa43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qa43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sd43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sd43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~0 (
+// Location: LABCELL_X27_Y23_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qp62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qa43z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|C372z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Sd43z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Bn53z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qa43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bn53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sd43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qp62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C372z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .lut_mask = 64'h000000000C000A00;
-defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~0 .lut_mask = 64'h000000000000A808;
+defparam \soc_inst|m0_1|u_logic|C372z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~3 (
+// Location: LABCELL_X23_Y23_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qp62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Qp62z4~0_combout  & ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mvm2z4~q  & (!\soc_inst|m0_1|u_logic|Qp62z4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|Qp62z4~1_combout  & !\soc_inst|m0_1|u_logic|Nr62z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qp62z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qp62z4~2_combout  & 
-// (!\soc_inst|m0_1|u_logic|Qp62z4~1_combout  & !\soc_inst|m0_1|u_logic|Nr62z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|C372z4~3_combout  = ( !\soc_inst|m0_1|u_logic|C372z4~1_combout  & ( !\soc_inst|m0_1|u_logic|C372z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z472z4~0_combout  & (!\soc_inst|m0_1|u_logic|C372z4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|I7r2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mvm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qp62z4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qp62z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nr62z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qp62z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I7r2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z472z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C372z4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C372z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C372z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qp62z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C372z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .lut_mask = 64'hC000000040000000;
-defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C372z4~3 .lut_mask = 64'hC400000000000000;
+defparam \soc_inst|m0_1|u_logic|C372z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Euzvx4~0 (
+// Location: LABCELL_X23_Y23_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tpnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Euzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qp62z4~3_combout ) # (!\soc_inst|m0_1|u_logic|Svqwx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|U593z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C372z4~3_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ovc3z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Bdwwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|C372z4~3_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ovc3z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C372z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xx93z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|C372z4~3_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xx93z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U593z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qp62z4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xx93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|C372z4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .lut_mask = 64'hFF00AAAAFF00FCFC;
-defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .lut_mask = 64'hCCCCCCCCFF55FA50;
+defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtzvx4~0 (
+// Location: LABCELL_X22_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~97 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qtzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & !\soc_inst|m0_1|u_logic|Euzvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add5~97_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~34  ))
+// \soc_inst|m0_1|u_logic|Add5~98  = CARRY(( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~34  ))
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~34 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~98 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .lut_mask = 64'h0F000F00F000F000;
-defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~97 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~97 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~97 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oszvx4~0 (
+// Location: LABCELL_X22_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add5~109 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oszvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Uvzvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|X8zvx4~combout  & (!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uvzvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Add5~109_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~98  ))
+// \soc_inst|m0_1|u_logic|Add5~110  = CARRY(( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Evcwx4~2_combout ))) ) + ( (!\soc_inst|m0_1|u_logic|Donvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) + ( \soc_inst|m0_1|u_logic|Add5~98  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Donvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Evcwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add5~98 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oszvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add5~110 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .lut_mask = 64'hCF8A0000CF8A0000;
-defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~109 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add5~109 .lut_mask = 64'h0000FF5500003FC0;
+defparam \soc_inst|m0_1|u_logic|Add5~109 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N48
+// Location: LABCELL_X31_Y19_N6
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zuzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zuzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & (\soc_inst|m0_1|u_logic|A9iwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Zuzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Y7iwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|O9iwx4~1_combout  & (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & ((\soc_inst|m0_1|u_logic|A9iwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O9iwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A9iwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y7iwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -81953,19 +82211,20 @@ defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .lut_mask = 64'h0111033305550FFF;
 defparam \soc_inst|m0_1|u_logic|Zuzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y21_N42
+// Location: LABCELL_X31_Y19_N0
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zuzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & (\soc_inst|m0_1|u_logic|D7iwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|D7iwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & (\soc_inst|m0_1|u_logic|Zuzvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|D7iwx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zuzvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|D7iwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zuzvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) # (\soc_inst|m0_1|u_logic|D7iwx4~1_combout ))) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|D7iwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zuzvx4~0_combout ),
 	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -81975,417 +82234,544 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zuzvx4~1 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .lut_mask = 64'h000000008C8C8CAF;
+defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .lut_mask = 64'h00BB00BB0000000B;
 defparam \soc_inst|m0_1|u_logic|Zuzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y21_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oszvx4~1 (
+// Location: MLABCELL_X39_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~57 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oszvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Luzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Oszvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~37_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add2~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~38  ))
+// \soc_inst|m0_1|u_logic|Add2~58  = CARRY(( !\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~38  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oszvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~38 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~57_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~58 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add2~57 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~57 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~57 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y17_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add2~57_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~57_sumout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Glhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .lut_mask = 64'h0000000051510000;
-defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .lut_mask = 64'hF0FF0000A0AF0000;
+defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y19_N26
-dffeas \soc_inst|m0_1|u_logic|Mvm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mvm2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Glhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Glhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~37_sumout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Glhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~37_sumout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Glhvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mvm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mvm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .lut_mask = 64'h00000000E0E0EEEE;
+defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y20_N31
-dffeas \soc_inst|m0_1|u_logic|Ytm2z4 (
+// Location: FF_X31_Y18_N43
+dffeas \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ytm2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ytm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ytm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ytm2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X23_Y19_N41
-dffeas \soc_inst|m0_1|u_logic|Zj53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zj53z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zj53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zj53z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~1 (
+// Location: MLABCELL_X39_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~53 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zj53z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// ( !\soc_inst|m0_1|u_logic|Rtz2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qa43z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Add2~53_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~58  ))
+// \soc_inst|m0_1|u_logic|Add2~54  = CARRY(( !\soc_inst|m0_1|u_logic|Ycx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~58  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qa43z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rtz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zj53z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~58 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~53_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~54 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .lut_mask = 64'h0000AAAAF0F0FF00;
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~53 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~53 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add2~53 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y21_N56
-dffeas \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Lq03z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X39_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~49 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Add2~49_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~54  ))
+// \soc_inst|m0_1|u_logic|Add2~50  = CARRY(( !\soc_inst|m0_1|u_logic|Jex2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~54  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~54 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~49_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add2~50 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add2~49 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~49 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~49 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~2 (
+// Location: LABCELL_X29_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|U593z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yr13z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|H133z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|U593z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q 
-//  & ( !\soc_inst|m0_1|u_logic|U593z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yr13z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H133z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  
-// & ( !\soc_inst|m0_1|u_logic|U593z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Bfhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|V4d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Add2~45_sumout ) # ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|V4d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add2~45_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|S5pvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H133z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yr13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U593z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add2~45_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V4d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .lut_mask = 64'h000F3535F0FF3535;
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .lut_mask = 64'hCC880000FFBB0000;
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~0 (
+// Location: LABCELL_X29_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Uvzvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Uvzvx4~1_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Uvzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Uvzvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Bfhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Bfhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~113_sumout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vq1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (\soc_inst|m0_1|u_logic|Bfhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~113_sumout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Uvzvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bfhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vq1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .lut_mask = 64'hAAAA00AA000000AA;
-defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .lut_mask = 64'h2220222033303330;
+defparam \soc_inst|m0_1|u_logic|Bfhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4 (
+// Location: FF_X29_Y17_N16
+dffeas \soc_inst|m0_1|u_logic|V4d3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bfhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V4d3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V4d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V4d3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xxovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uvzvx4~combout  = ( !\soc_inst|m0_1|u_logic|Qowwx4~combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mvm2z4~q  & (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ytm2z4~q )))) # (\soc_inst|m0_1|u_logic|Mvm2z4~q  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ytm2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Xxovx4~combout  = ( \soc_inst|m0_1|u_logic|Konvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~41_sumout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~113_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~41_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Konvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~113_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~41_sumout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Konvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~113_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~41_sumout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mvm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ytm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qowwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add3~41_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Konvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~113_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uvzvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uvzvx4 .lut_mask = 64'hD0DD000000000000;
-defparam \soc_inst|m0_1|u_logic|Uvzvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xxovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xxovx4 .lut_mask = 64'h000F555F333F777F;
+defparam \soc_inst|m0_1|u_logic|Xxovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uz9wx4~1 (
+// Location: FF_X25_Y17_N49
+dffeas \soc_inst|ram_1|saved_word_address[7] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|saved_word_address [7]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|saved_word_address[7] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[7] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y17_N12
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[7]~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uz9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~q )))) ) )
+// \soc_inst|ram_1|memory.raddr_a[7]~7_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Xxovx4~combout )) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// ((\soc_inst|ram_1|saved_word_address [7]))) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [7] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
+	.datad(!\soc_inst|ram_1|saved_word_address [7]),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[7]~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .lut_mask = 64'h8C008C00AF00AF00;
-defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .lut_mask = 64'h00FF00FF0C3F0C3F;
+defparam \soc_inst|ram_1|memory.raddr_a[7]~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~37 (
+// Location: LABCELL_X36_Y16_N15
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[21]~24 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~37_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~34  ))
-// \soc_inst|m0_1|u_logic|Add2~38  = CARRY(( !\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~34  ))
+// \soc_inst|ram_1|data_to_memory[21]~24_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( (\soc_inst|ram_1|write_cycle~q  & !\soc_inst|ram_1|byte_select [2]) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|byte_select [2]) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|ram_1|write_cycle~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|byte_select [2]),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~34 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~37_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~38 ),
+	.combout(\soc_inst|ram_1|data_to_memory[21]~24_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~37 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~37 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~37 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[21]~24 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[21]~24 .lut_mask = 64'h0505000055555050;
+defparam \soc_inst|ram_1|data_to_memory[21]~24 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~57 (
+// Location: M10K_X26_Y20_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[21]~24_combout ,\soc_inst|ram_1|data_to_memory[5]~23_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_first_bit_number = 5;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_first_bit_number = 5;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050061800000000000000000000000090100140200000100100000000000000001000001555555555555412000000505550000000000001550";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y17_N39
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[21]~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~57_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Nbx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~38  ))
-// \soc_inst|m0_1|u_logic|Add2~58  = CARRY(( !\soc_inst|m0_1|u_logic|Nbx2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~38  ))
+// \soc_inst|interconnect_1|HRDATA[21]~29_combout  = ( \soc_inst|interconnect_1|HRDATA[16]~7_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( (!\soc_inst|interconnect_1|Equal1~0_combout ) # 
+// (\soc_inst|switches_1|switch_store[1][5]~q ) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) ) # ( 
+// \soc_inst|interconnect_1|HRDATA[16]~7_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( (\soc_inst|switches_1|switch_store[1][5]~q  & \soc_inst|interconnect_1|Equal1~0_combout ) ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+	.dataa(!\soc_inst|switches_1|switch_store[1][5]~q ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a21 ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~38 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~57_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~58 ),
+	.combout(\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~57 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~57 .lut_mask = 64'h0000FFFF0000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add2~57 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[21]~29 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[21]~29 .lut_mask = 64'hCCCC0055CCCCFF55;
+defparam \soc_inst|interconnect_1|HRDATA[21]~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Glhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add2~57_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Nbx2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Nbx2z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Add2~57_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nbx2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+// Location: MLABCELL_X34_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|interconnect_1|HRDATA[5]~28_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # ((\soc_inst|interconnect_1|HRDATA[5]~28_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .lut_mask = 64'hFF330000AA330000;
-defparam \soc_inst|m0_1|u_logic|Glhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .lut_mask = 64'hF0F3F0F300330033;
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Glhvx4~1 (
+// Location: LABCELL_X33_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hphvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Glhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Glhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~37_sumout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Glhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~37_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Hphvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Glhvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hphvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .lut_mask = 64'h0000E0E00000EEEE;
-defparam \soc_inst|m0_1|u_logic|Glhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y18_N19
-dffeas \soc_inst|m0_1|u_logic|Nbx2z4 (
+// Location: FF_X33_Y15_N55
+dffeas \soc_inst|m0_1|u_logic|Qlw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Glhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hphvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nbx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qlw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nbx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nbx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qlw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qlw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkhvx4~1 (
+// Location: MLABCELL_X34_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Add5~81_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Ycx2z4~q ))) # (\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Add2~53_sumout  & 
-// \soc_inst|m0_1|u_logic|Y8pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ycx2z4~q ))) # (\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Q6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qlw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
+// & ( (!\soc_inst|m0_1|u_logic|Qlw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~53_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qlw2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .lut_mask = 64'h4E4E444EFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .lut_mask = 64'h0A0A0A0AFF0AFF0A;
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkhvx4~0 (
+// Location: LABCELL_X30_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zkhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|W4zvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|W4zvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|W4zvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|W4zvx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Q6nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Q6nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Q6nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[21]~29_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q6nvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q6nvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .lut_mask = 64'hAA08AA08AA08AA0A;
-defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .lut_mask = 64'hFC00FC0000000000;
+defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y23_N28
-dffeas \soc_inst|m0_1|u_logic|Ycx2z4 (
+// Location: FF_X30_Y16_N55
+dffeas \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -82394,1101 +82780,916 @@ dffeas \soc_inst|m0_1|u_logic|Ycx2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ycx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ycx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y15_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4qvx4 (
+// Location: LABCELL_X35_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Herwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S4qvx4~combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|Add3~49_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Add5~81_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Add3~49_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Add3~49_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~81_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Yonvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Add3~49_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Herwx4~0_combout  = ( \soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|V2iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( \soc_inst|m0_1|u_logic|V2iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|J3iwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|V2iwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~49_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|J3iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V2iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Herwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S4qvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S4qvx4 .lut_mask = 64'h005533770F5F3F7F;
-defparam \soc_inst|m0_1|u_logic|S4qvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Herwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Herwx4~0 .lut_mask = 64'h0000AAAAF0F0FAFA;
+defparam \soc_inst|m0_1|u_logic|Herwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Elnvx4~0 (
+// Location: MLABCELL_X21_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Herwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Elnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fvovx4~combout ))) # (\soc_inst|m0_1|u_logic|S4qvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|J6i2z4~q  & ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fvovx4~combout )) # (\soc_inst|m0_1|u_logic|S4qvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|J6i2z4~q  & ( !\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Herwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Herwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Viy2z4~q ) # (\soc_inst|m0_1|u_logic|E4iwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|E4iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Herwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Elnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .lut_mask = 64'h0000CCCCFF5FFFDF;
-defparam \soc_inst|m0_1|u_logic|Elnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Herwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Herwx4~1 .lut_mask = 64'h1515151500000000;
+defparam \soc_inst|m0_1|u_logic|Herwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y16_N25
-dffeas \soc_inst|m0_1|u_logic|J6i2z4 (
+// Location: FF_X21_Y19_N35
+dffeas \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Elnvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Herwx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J6i2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J6i2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9ovx4 (
+// Location: LABCELL_X24_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mvc2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9ovx4~combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Mvc2z4~combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mvc2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9ovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9ovx4 .lut_mask = 64'h000000000A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|D9ovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mvc2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mvc2z4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Mvc2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iuuvx4~0 (
+// Location: LABCELL_X24_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kuc2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cam2z4~q  & (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q 
-//  & !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Awc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mvc2z4~combout  & ( (!\soc_inst|m0_1|u_logic|Vwc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout  & \soc_inst|m0_1|u_logic|Awc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Awc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mvc2z4~combout  & ( (!\soc_inst|m0_1|u_logic|Vwc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout  & !\soc_inst|m0_1|u_logic|Cxc2z4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vwc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kuc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cxc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Awc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Awc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mvc2z4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .lut_mask = 64'h0000040000000000;
-defparam \soc_inst|m0_1|u_logic|Iuuvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .lut_mask = 64'h8080008000000000;
+defparam \soc_inst|m0_1|u_logic|Kuc2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K1ivx4~0 (
+// Location: LABCELL_X22_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eb72z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|hwdata_o [5] & 
-// ((\soc_inst|m0_1|u_logic|D9ovx4~combout ))) # (\soc_inst|m0_1|u_logic|hwdata_o [5] & (\soc_inst|m0_1|u_logic|N7c3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o 
-// [5] & ((\soc_inst|m0_1|u_logic|D9ovx4~combout ))) # (\soc_inst|m0_1|u_logic|hwdata_o [5] & (\soc_inst|m0_1|u_logic|N7c3z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & (((\soc_inst|m0_1|u_logic|D9ovx4~combout  & !\soc_inst|m0_1|u_logic|hwdata_o [5])) # (\soc_inst|m0_1|u_logic|N7c3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( ((\soc_inst|m0_1|u_logic|D9ovx4~combout  & !\soc_inst|m0_1|u_logic|hwdata_o [5])) # (\soc_inst|m0_1|u_logic|N7c3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Eb72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|X2j2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
-	.datae(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|X2j2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eb72z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .lut_mask = 64'h3F332A220F330A22;
-defparam \soc_inst|m0_1|u_logic|K1ivx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y17_N44
-dffeas \soc_inst|m0_1|u_logic|N7c3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|N7c3z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N7c3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|N7c3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Eb72z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jjuwx4~0 (
+// Location: MLABCELL_X25_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jjuwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzvwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|N7c3z4~q ) # (!\soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|H972z4~0_combout  = ( !\soc_inst|m0_1|u_logic|T253z4~q  & ( \soc_inst|m0_1|u_logic|Kt33z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T253z4~q  & ( !\soc_inst|m0_1|u_logic|Kt33z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T253z4~q  & ( !\soc_inst|m0_1|u_logic|Kt33z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzvwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T253z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kt33z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H972z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .lut_mask = 64'hFFF0FFF000000000;
-defparam \soc_inst|m0_1|u_logic|Jjuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~0 .lut_mask = 64'h0022002000020000;
+defparam \soc_inst|m0_1|u_logic|H972z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvzwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wvzwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I90xx4~0_combout  & (\soc_inst|m0_1|u_logic|Jjuwx4~0_combout  & \soc_inst|m0_1|u_logic|Jjuwx4~1_combout )) ) )
+// Location: FF_X24_Y21_N49
+dffeas \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Sa13z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jjuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jjuwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y14_N32
+dffeas \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|J3qvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .lut_mask = 64'h0003000300000000;
-defparam \soc_inst|m0_1|u_logic|Wvzwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G2zwx4~1 (
+// Location: MLABCELL_X25_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G2zwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wvzwx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|H972z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H972z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|m0_1|u_logic|G2zwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~1 .lut_mask = 64'h2200000030000000;
+defparam \soc_inst|m0_1|u_logic|H972z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W5rvx4 (
+// Location: LABCELL_X24_Y22_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W5rvx4~combout  = ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & \soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|H972z4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ehz2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yd03z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ehz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yd03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W5rvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|H972z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W5rvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W5rvx4 .lut_mask = 64'h000000000A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|W5rvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~2 .lut_mask = 64'h00C000A000000000;
+defparam \soc_inst|m0_1|u_logic|H972z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvqvx4~1 (
+// Location: LABCELL_X24_Y19_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H972z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & (\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Xnrvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hxx2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|H972z4~3_combout  = ( !\soc_inst|m0_1|u_logic|H972z4~1_combout  & ( !\soc_inst|m0_1|u_logic|H972z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Eb72z4~0_combout  & (!\soc_inst|m0_1|u_logic|H972z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pfz2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Eb72z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H972z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pfz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H972z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H972z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H972z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .lut_mask = 64'h0000000000000200;
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H972z4~3 .lut_mask = 64'h80C0000000000000;
+defparam \soc_inst|m0_1|u_logic|H972z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fbnvx4~0 (
+// Location: LABCELL_X24_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A67wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Owq2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[4]~23_combout  & ((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Owq2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[4]~23_combout  & (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Owq2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Owq2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W5rvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|A67wx4~0_combout  = ( \soc_inst|m0_1|u_logic|H972z4~3_combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|V1l2z4~q )) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H972z4~3_combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|V1l2z4~q )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|H972z4~3_combout  & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|V1l2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H972z4~3_combout  & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Rhi2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ((\soc_inst|m0_1|u_logic|V1l2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W5rvx4~combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rhi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V1l2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H972z4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .lut_mask = 64'hDD00DDDDD000D0D0;
-defparam \soc_inst|m0_1|u_logic|Fbnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y16_N37
-dffeas \soc_inst|m0_1|u_logic|Owq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Owq2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Owq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Owq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|A67wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A67wx4~0 .lut_mask = 64'h303A303A303A353F;
+defparam \soc_inst|m0_1|u_logic|A67wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Leuvx4~0 (
+// Location: LABCELL_X19_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Leuvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout  & (\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ((\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~13_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~18  ))
+// \soc_inst|m0_1|u_logic|Add3~14  = CARRY(( !\soc_inst|m0_1|u_logic|Jux2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~18  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~18 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Leuvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~13_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~14 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .lut_mask = 64'h0103050F113355FF;
-defparam \soc_inst|m0_1|u_logic|Leuvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~13 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Leuvx4~1 (
+// Location: LABCELL_X19_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Leuvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Leuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|Leuvx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & (\soc_inst|m0_1|u_logic|Leuvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Leuvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~9_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~14  ))
+// \soc_inst|m0_1|u_logic|Add3~10  = CARRY(( !\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~14  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Leuvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~9_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~10 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .lut_mask = 64'h0808080A0C0C0C0F;
-defparam \soc_inst|m0_1|u_logic|Leuvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~9 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pamvx4~0 (
+// Location: LABCELL_X19_Y17_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pamvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~q  & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|Owq2z4~q )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Trq2z4~q  & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|Owq2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Trq2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (((\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|Owq2z4~q )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Trq2z4~q  & ( !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & !\soc_inst|m0_1|u_logic|Owq2z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add3~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~10  ))
+// \soc_inst|m0_1|u_logic|Add3~6  = CARRY(( !\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~10  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~5_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add3~6 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .lut_mask = 64'hBA30BAFF303030FF;
-defparam \soc_inst|m0_1|u_logic|Pamvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y21_N13
-dffeas \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pamvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Add3~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~5 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add3~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J00wx4~0 (
+// Location: LABCELL_X19_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add3~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J00wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zz8wx4~combout ) # (!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Add3~1_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J0l2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add3~6  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add3~6 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J00wx4~0_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add3~1_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J00wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J00wx4~0 .lut_mask = 64'h88808880CCC0CCC0;
-defparam \soc_inst|m0_1|u_logic|J00wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add3~1 .lut_mask = 64'h0000FFFF0000FF00;
+defparam \soc_inst|m0_1|u_logic|Add3~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpcwx4~0 (
+// Location: MLABCELL_X21_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gpcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (((\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & !\soc_inst|m0_1|u_logic|Muawx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|haddr_o~0_combout  = ( \soc_inst|m0_1|u_logic|Add3~1_sumout  & ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~1_sumout  & ( \soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~1_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|A67wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~1_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~77_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|A67wx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .lut_mask = 64'h8D888D884E444E44;
-defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~0 .lut_mask = 64'hFF33F030AA22A020;
+defparam \soc_inst|m0_1|u_logic|haddr_o~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J00wx4~1 (
+// Location: MLABCELL_X21_Y17_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J00wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~97_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Gpcwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout )) # (\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~97_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Gpcwx4~0_combout  & !\soc_inst|m0_1|u_logic|Fuawx4~1_combout )) # (\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~97_sumout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
-// (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & (((\soc_inst|m0_1|u_logic|Gpcwx4~0_combout  & !\soc_inst|m0_1|u_logic|Fuawx4~1_combout )) # (\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|S6ovx4~2_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~1_combout  & ( (!\soc_inst|m0_1|u_logic|haddr_o~0_combout  & (!\soc_inst|m0_1|u_logic|haddr_o [29] & \soc_inst|m0_1|u_logic|V2qvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|J00wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.datad(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J00wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J00wx4~1 .lut_mask = 64'h1311000013111311;
-defparam \soc_inst|m0_1|u_logic|J00wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C00wx4~0 (
+// Location: LABCELL_X24_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C00wx4~0_combout  = ( \soc_inst|m0_1|u_logic|J00wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|S6ovx4~3_combout  = ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( (\soc_inst|m0_1|u_logic|U5qvx4~combout  & \soc_inst|m0_1|u_logic|S6ovx4~1_combout ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C00wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C00wx4~0 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|C00wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y22_N28
-dffeas \soc_inst|m0_1|u_logic|Bn53z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bn53z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bn53z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bn53z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X39_Y23_N38
-dffeas \soc_inst|m0_1|u_logic|U5r2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U5r2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U5r2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U5r2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X35_Y24_N5
-dffeas \soc_inst|m0_1|u_logic|Twz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Twz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Twz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Twz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y22_N56
-dffeas \soc_inst|m0_1|u_logic|J433z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J433z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J433z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J433z4 .power_up = "low";
-// synopsys translate_on
+// Location: LABCELL_X24_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nmnvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Nmnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ((\soc_inst|m0_1|u_logic|S6ovx4~3_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & \soc_inst|m0_1|u_logic|S6ovx4~3_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( 
+// ((\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & !\soc_inst|interconnect_1|HREADY~0_combout )) # (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
 
-// Location: FF_X35_Y24_N37
-dffeas \soc_inst|m0_1|u_logic|Av13z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Av13z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av13z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Av13z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .lut_mask = 64'h50FF50FF50DC50DC;
+defparam \soc_inst|m0_1|u_logic|Nmnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y23_N44
-dffeas \soc_inst|m0_1|u_logic|Nt03z4 (
+// Location: FF_X24_Y16_N1
+dffeas \soc_inst|m0_1|u_logic|Mjl2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nmnvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nt03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mjl2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nt03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nt03z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mjl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mjl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjkvx4~0 (
+// Location: LABCELL_X30_Y17_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B7owx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bjkvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ovc3z4~q  & ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) ) )
+// \soc_inst|m0_1|u_logic|B7owx4~combout  = ( \soc_inst|m0_1|u_logic|F4nvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mjl2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mjl2z4~q ),
+	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|F4nvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bjkvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B7owx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .lut_mask = 64'hCCCCDDDD00005555;
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B7owx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B7owx4 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|m0_1|u_logic|B7owx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bjkvx4~1 (
+// Location: LABCELL_X30_Y19_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9lwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bjkvx4~1_combout  = ( \soc_inst|m0_1|u_logic|W0pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Bjkvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R8x2z4~q  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Yuovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Bjkvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Yuovx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|U9lwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( (\soc_inst|interconnect_1|HRDATA[15]~4_combout  & \soc_inst|m0_1|u_logic|B7owx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tq7wx4~0_combout  & ( 
+// ((\soc_inst|interconnect_1|HRDATA[15]~4_combout  & \soc_inst|m0_1|u_logic|B7owx4~combout )) # (\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bjkvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tq7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9lwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .lut_mask = 64'hFFAA332200000000;
-defparam \soc_inst|m0_1|u_logic|Bjkvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .lut_mask = 64'h333F333F000F000F;
+defparam \soc_inst|m0_1|u_logic|U9lwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y15_N16
-dffeas \soc_inst|m0_1|u_logic|Ovc3z4 (
+// Location: FF_X37_Y17_N19
+dffeas \soc_inst|m0_1|u_logic|D4a3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|D4a3z4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|C5ovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ovc3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|D4a3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ovc3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ovc3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D4a3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|D4a3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~2 (
+// Location: LABCELL_X24_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Am5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nt03z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|J433z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Av13z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nt03z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J433z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|Ovc3z4~q  & ( (!\soc_inst|m0_1|u_logic|Av13z4~q ) # (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Wjxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qwowx4~combout  & ( ((\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|B2uvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vgs2z4~q ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Qwowx4~combout  & ( (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & \soc_inst|m0_1|u_logic|B2uvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J433z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Av13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nt03z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qwowx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Am5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .lut_mask = 64'hFFCCF0AA00CCF0AA;
-defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y22_N38
-dffeas \soc_inst|m0_1|u_logic|I7r2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I7r2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I7r2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I7r2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .lut_mask = 64'h004400440F4F0F4F;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y23_N43
-dffeas \soc_inst|m0_1|u_logic|Sd43z4 (
+// Location: FF_X36_Y18_N55
+dffeas \soc_inst|m0_1|u_logic|Lul2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sd43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Lul2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sd43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sd43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lul2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lul2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~3 (
+// Location: LABCELL_X24_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Am5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Yaz2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sd43z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M1j2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|I7r2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Sd43z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wjxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Lul2z4~q )) # (\soc_inst|m0_1|u_logic|Jsc3z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|Ts5wx4~0_combout  & \soc_inst|m0_1|u_logic|Lul2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I7r2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sd43z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jsc3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Am5wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .lut_mask = 64'hAAF000F0FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .lut_mask = 64'h005500550F5F0F5F;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~0 (
+// Location: LABCELL_X24_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Am5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Am5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Svk2z4~q 
-// ) # (!\soc_inst|m0_1|u_logic|Twz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Am5wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Svk2z4~q ) # (!\soc_inst|m0_1|u_logic|Twz2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Am5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Wjxwx4~2_combout  = ( \soc_inst|m0_1|u_logic|E0uvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wjxwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wjxwx4~0_combout  & !\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|E0uvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wjxwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Wjxwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Twz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Am5wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wjxwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Am5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .lut_mask = 64'h0000A0A05040F0E0;
-defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .lut_mask = 64'hAAAAA0A000000000;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~1 (
+// Location: LABCELL_X24_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Am5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bn53z4~q  & (!\soc_inst|m0_1|u_logic|Ixxwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5r2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ixxwx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|U5r2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wjxwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wjxwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|D4a3z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|T4uvx4~0_combout  & (\soc_inst|m0_1|u_logic|Ara3z4~q  & ((!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ) # (\soc_inst|m0_1|u_logic|D4a3z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bn53z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U5r2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T4uvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H6tvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ara3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|D4a3z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wjxwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .lut_mask = 64'hCF00450000000000;
-defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .lut_mask = 64'h000000008CAF8CAF;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[4] (
+// Location: LABCELL_X30_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wjxwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o [4] = ( \soc_inst|m0_1|u_logic|Y9t2z4~q  & ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Wjxwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Wjxwx4~3_combout  & ( \soc_inst|m0_1|u_logic|N1uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|T7d3z4~q  & ((!\soc_inst|m0_1|u_logic|Usl2z4~q ) # (!\soc_inst|m0_1|u_logic|K7pwx4~combout ))) ) 
+// ) ) # ( \soc_inst|m0_1|u_logic|Wjxwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|N1uvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~q ) # (!\soc_inst|m0_1|u_logic|K7pwx4~combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T7d3z4~q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wjxwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.combout(\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .lut_mask = 64'h0000EEEE0000E0E0;
+defparam \soc_inst|m0_1|u_logic|Wjxwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N27
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[4]~15 (
+// Location: LABCELL_X30_Y19_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9lwx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[4]~15_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) )
+// \soc_inst|m0_1|u_logic|U9lwx4~1_combout  = ( \soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ) # (\soc_inst|m0_1|u_logic|Wfuwx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|U9lwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & !\soc_inst|m0_1|u_logic|Wjxwx4~4_combout )) # (\soc_inst|m0_1|u_logic|U9lwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [0]),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|write_cycle~q ),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.dataa(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U9lwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wjxwx4~4_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[4]~15_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[4]~15 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[4]~15 .lut_mask = 64'h000000AA005500FF;
-defparam \soc_inst|ram_1|data_to_memory[4]~15 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .lut_mask = 64'h5F0F5F0F5F1F5F1F;
+defparam \soc_inst|m0_1|u_logic|U9lwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N27
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[4]~23 (
+// Location: LABCELL_X31_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttwwx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[4]~23_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
-// (\soc_inst|switches_1|switch_store[0][4]~q ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (\soc_inst|interconnect_1|Equal1~0_combout  & 
-// \soc_inst|switches_1|switch_store[0][4]~q )) ) )
+// \soc_inst|m0_1|u_logic|Ttwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// ( ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|C3w2z4~q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wxp2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wxp2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|C3w2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[0][4]~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[4]~23 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[4]~23 .lut_mask = 64'h0005000550555055;
-defparam \soc_inst|interconnect_1|HRDATA[4]~23 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .lut_mask = 64'hF0303030F3333333;
+defparam \soc_inst|m0_1|u_logic|Ttwwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pxrvx4~0 (
+// Location: LABCELL_X29_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8nwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pxrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 )) # 
-// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][4]~q ))))) ) )
+// \soc_inst|m0_1|u_logic|B8nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|U2ewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|G9lwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ttwwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|U2ewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
-	.datad(!\soc_inst|switches_1|switch_store[1][4]~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ttwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2ewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G9lwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pxrvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B8nwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .lut_mask = 64'h0000000002130213;
-defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y18_N25
-dffeas \soc_inst|m0_1|u_logic|Xly2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xly2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xly2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .lut_mask = 64'hF000F000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|B8nwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X6nvx4~0 (
+// Location: LABCELL_X30_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B8nwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xly2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pxrvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[4]~23_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Pxrvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[4]~23_combout )))) ) )
+// \soc_inst|m0_1|u_logic|B8nwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sknwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kswwx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Sknwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout  & !\soc_inst|m0_1|u_logic|Wxp2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Palwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|B8nwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Kswwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wxp2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pxrvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sknwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kswwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X6nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .lut_mask = 64'h32003200FA00FA00;
-defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .lut_mask = 64'h00000000F8FCF8A8;
+defparam \soc_inst|m0_1|u_logic|B8nwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ophvx4~0 (
+// Location: LABCELL_X29_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ophvx4~0_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout ) # ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|switches_1|switch_store[1][4]~q )) ) ) # ( 
-// !\soc_inst|interconnect_1|Equal1~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout ) # ((!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 )) ) )
+// \soc_inst|m0_1|u_logic|Skhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~41_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Jex2z4~q )))))) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Add2~49_sumout ) # ((!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Jex2z4~q )))))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datac(!\soc_inst|switches_1|switch_store[1][4]~q ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~49_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jex2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ophvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Skhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .lut_mask = 64'hFFEEFFEEFEFEFEFE;
-defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y16_N19
-dffeas \soc_inst|m0_1|u_logic|Ckw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ophvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ckw2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ckw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ckw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .lut_mask = 64'h80808880C4C4CCC4;
+defparam \soc_inst|m0_1|u_logic|Skhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X6nvx4~1 (
+// Location: LABCELL_X29_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Owq2z4~q  & ( (\soc_inst|m0_1|u_logic|X6nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ckw2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Owq2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Wfovx4~combout  & (\soc_inst|m0_1|u_logic|X6nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ckw2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Skhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Skhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & \soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K22wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Skhvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|X6nvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ckw2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Glnwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K22wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Skhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .lut_mask = 64'h080A080A0C0F0C0F;
-defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .lut_mask = 64'h00000000F0F0FFF1;
+defparam \soc_inst|m0_1|u_logic|Skhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y18_N26
-dffeas \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE (
+// Location: FF_X29_Y16_N26
+dffeas \soc_inst|m0_1|u_logic|Jex2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Skhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -83497,123 +83698,45 @@ dffeas \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Jex2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tecwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Tecwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tecwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .lut_mask = 64'h0010000000000000;
-defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Afcwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Afcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Z4bwx4~0_combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Afcwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .lut_mask = 64'hC0C0C0C000C0C0C0;
-defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ydcwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ydcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Afcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tecwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|I6z2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Afcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tecwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tecwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Afcwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .lut_mask = 64'hC040CC4400000000;
-defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jex2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jex2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y15_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rxzvx4 (
+// Location: MLABCELL_X25_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z6ovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rxzvx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~33_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Add5~109_sumout )) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~33_sumout )) # (\soc_inst|m0_1|u_logic|Add5~109_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~33_sumout )) # (\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// \soc_inst|m0_1|u_logic|Add3~33_sumout ) ) ) )
+// \soc_inst|m0_1|u_logic|Z6ovx4~combout  = ( \soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~45_sumout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~41_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~45_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~45_sumout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F32wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~41_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~45_sumout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add3~33_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add3~45_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|F32wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~41_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rxzvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rxzvx4 .lut_mask = 64'h003355770F3F5F7F;
-defparam \soc_inst|m0_1|u_logic|Rxzvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z6ovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z6ovx4 .lut_mask = 64'h000F555F333F777F;
+defparam \soc_inst|m0_1|u_logic|Z6ovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y15_N7
-dffeas \soc_inst|ram_1|saved_word_address[3] (
+// Location: FF_X25_Y17_N1
+dffeas \soc_inst|ram_1|saved_word_address[6] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -83622,67 +83745,65 @@ dffeas \soc_inst|ram_1|saved_word_address[3] (
 	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [3]),
+	.q(\soc_inst|ram_1|saved_word_address [6]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[3] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[3] .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[6] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[6] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N9
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[3]~3 (
+// Location: MLABCELL_X25_Y17_N39
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[6]~6 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[3]~3_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( \soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( (!\soc_inst|ram_1|write_cycle~q ) # (\soc_inst|ram_1|saved_word_address [3]) ) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & 
-// ( \soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( \soc_inst|ram_1|saved_word_address [3] ) ) ) # ( \soc_inst|ram_1|always1~0_combout  & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|saved_word_address [3]) ) ) 
-// ) # ( !\soc_inst|ram_1|always1~0_combout  & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( \soc_inst|ram_1|saved_word_address [3] ) ) )
+// \soc_inst|ram_1|memory.raddr_a[6]~6_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// (\soc_inst|ram_1|saved_word_address [6])) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [6] ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|saved_word_address [3]),
-	.datae(!\soc_inst|ram_1|always1~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|saved_word_address [6]),
+	.datad(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[3]~3_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[6]~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .lut_mask = 64'h00FF005500FFAAFF;
-defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .lut_mask = 64'h0F0F0F0F03CF03CF;
+defparam \soc_inst|ram_1|memory.raddr_a[6]~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y17_N15
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[25]~11 (
+// Location: LABCELL_X31_Y15_N57
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[19]~18 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[25]~11_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( \soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( \soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( !\soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( (\soc_inst|ram_1|write_cycle~q  & !\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ) ) ) )
+// \soc_inst|ram_1|data_to_memory[19]~18_combout  = (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select [2] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 )) # (\soc_inst|ram_1|byte_select [2] & 
+// ((!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout )))))
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select [2]),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[25]~11_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[19]~18_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[25]~11 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[25]~11 .lut_mask = 64'h0000505005055555;
-defparam \soc_inst|ram_1|data_to_memory[25]~11 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[19]~18 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[19]~18 .lut_mask = 64'h1302130213021302;
+defparam \soc_inst|ram_1|data_to_memory[19]~18 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y17_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 (
+// Location: M10K_X26_Y13_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 (
 	.portawe(\soc_inst|ram_1|write_cycle~q ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
@@ -83698,7 +83819,7 @@ cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 (
 	.clr0(gnd),
 	.clr1(gnd),
 	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[25]~11_combout ,\soc_inst|ram_1|data_to_memory[1]~12_combout }),
+	.portadatain({\soc_inst|ram_1|data_to_memory[19]~18_combout ,\soc_inst|ram_1|data_to_memory[11]~17_combout }),
 	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
 \soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
 \soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
@@ -83711,148 +83832,106 @@ cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_bit_number = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_bit_number = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000369AC8A0AF897F3008412079577FFFFFFFFFFFFC338EC000000000000000000000000";
-// synopsys translate_on
-
-// Location: LABCELL_X46_Y15_N12
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[25]~18 (
-// Equation(s):
-// \soc_inst|interconnect_1|HRDATA[25]~18_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~17_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (!\soc_inst|interconnect_1|Equal1~0_combout ) # 
-// (\soc_inst|switches_1|switch_store[1][9]~q ) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[24]~17_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) ) # ( 
-// \soc_inst|interconnect_1|HRDATA[24]~17_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (\soc_inst|switches_1|switch_store[1][9]~q  & \soc_inst|interconnect_1|Equal1~0_combout ) ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[24]~17_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|switches_1|switch_store[1][9]~q ),
-	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datae(!\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[25]~18 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[25]~18 .lut_mask = 64'hFF000303FF00F3F3;
-defparam \soc_inst|interconnect_1|HRDATA[25]~18 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y20_N25
-dffeas \soc_inst|m0_1|u_logic|Pty2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pty2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pty2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pty2z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_bit_number = 11;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_bit_number = 11;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000009B9B99C4221508C23773D77BF773D082AA01C08432C03F087415F41FF61DF400311A40000000000000008644000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~0 (
+// Location: LABCELL_X31_Y15_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[19]~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|interconnect_1|HRDATA[9]~16_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[9]~16_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+// \soc_inst|interconnect_1|HRDATA[19]~25_combout  = ( \soc_inst|switches_1|switch_store[1][3]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
+// (\soc_inst|interconnect_1|HRDATA[16]~7_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][3]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][3]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & 
+// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][3]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[16]~7_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|switches_1|switch_store[1][3]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a19 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O5nvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
-defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[19]~25 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[19]~25 .lut_mask = 64'hA0A0A3A3ACACAFAF;
+defparam \soc_inst|interconnect_1|HRDATA[19]~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fohvx4~0 (
+// Location: LABCELL_X31_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vphvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fohvx4~0_combout  = (!\soc_inst|interconnect_1|HRDATA[25]~18_combout ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout )
+// \soc_inst|m0_1|u_logic|Vphvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[19]~25_combout )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
+	.datab(gnd),
 	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(gnd),
+	.datad(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fohvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vphvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .lut_mask = 64'hFCFCFCFCFCFCFCFC;
-defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .lut_mask = 64'hFFF0FFF0FFF0FFF0;
+defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y20_N2
-dffeas \soc_inst|m0_1|u_logic|Urw2z4 (
+// Location: FF_X31_Y14_N56
+dffeas \soc_inst|m0_1|u_logic|Oiw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fohvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vphvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -83861,66 +83940,91 @@ dffeas \soc_inst|m0_1|u_logic|Urw2z4 (
 	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Urw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Oiw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Urw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Urw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Oiw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Oiw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~1 (
+// Location: LABCELL_X31_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Y7y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Urw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Urw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|E7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( (\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & !\soc_inst|m0_1|u_logic|Oiw2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( ((\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Oiw2z4~q )) # (\soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Urw2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Oiw2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O5nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E7nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .lut_mask = 64'h00AA00AAF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .lut_mask = 64'h5F555F550F000F00;
+defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~2 (
+// Location: LABCELL_X31_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O5nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|O5nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|O5nvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~18_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|E7nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & !\soc_inst|m0_1|u_logic|Jky2z4~q )) # (\soc_inst|interconnect_1|HRDATA[3]~26_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & !\soc_inst|m0_1|u_logic|Jky2z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O5nvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5nvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E7nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .lut_mask = 64'hFC00FC0000000000;
-defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .lut_mask = 64'hCC00CC00CF0FCF0F;
+defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y20_N26
-dffeas \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE (
+// Location: LABCELL_X31_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|E7nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|E7nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E7nvx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[19]~25_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E7nvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|E7nvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .lut_mask = 64'hF0C0F0C000000000;
+defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X31_Y14_N37
+dffeas \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -83929,490 +84033,632 @@ dffeas \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~0 (
+// Location: LABCELL_X29_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H0dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G27wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|H0dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q 
+//  & !\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H0dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G27wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G27wx4~0 .lut_mask = 64'h0F0F0F0FFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|G27wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .lut_mask = 64'h0000000000004000;
+defparam \soc_inst|m0_1|u_logic|H0dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X3xvx4~0 (
+// Location: MLABCELL_X25_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O0dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X3xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout 
-// ))) ) ) # ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|O0dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z4bwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Zcn2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Z4bwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Zcn2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Z4bwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Zcn2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  
+// & (!\soc_inst|m0_1|u_logic|Zcn2z4~q  & !\soc_inst|m0_1|u_logic|I4dwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X3xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O0dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .lut_mask = 64'h00AA00AA02AA02AA;
-defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .lut_mask = 64'h8800888888888888;
+defparam \soc_inst|m0_1|u_logic|O0dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X3xvx4~1 (
+// Location: LABCELL_X23_Y23_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xucwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X3xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X3xvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~q )) 
-// # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X3xvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X3xvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Xucwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O0dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H0dwx4~0_combout  & (\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O0dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H0dwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|X3xvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H0dwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|O0dwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .lut_mask = 64'hCCCCCC4C0000CC4C;
-defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .lut_mask = 64'hC4C4000000C40000;
+defparam \soc_inst|m0_1|u_logic|Xucwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9swx4~0 (
+// Location: MLABCELL_X28_Y23_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J00wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9swx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|J00wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9swx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J00wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9swx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9swx4~0 .lut_mask = 64'h67FF67FFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|U9swx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J00wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J00wx4~0 .lut_mask = 64'hC8C80000C8C8C8C8;
+defparam \soc_inst|m0_1|u_logic|J00wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S8swx4~0 (
+// Location: LABCELL_X23_Y23_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpcwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S8swx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|U9swx4~0_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q )) # (\soc_inst|m0_1|u_logic|Swy2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|H9i2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # (\soc_inst|m0_1|u_logic|U9swx4~0_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Gpcwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U9swx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datag(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S8swx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S8swx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|S8swx4~0 .lut_mask = 64'hFFFFFFFFE0F0C8D8;
-defparam \soc_inst|m0_1|u_logic|S8swx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .lut_mask = 64'hCCC0CCC0CC0CCC0C;
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~1 (
+// Location: LABCELL_X23_Y23_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G27wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Gpcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( \soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Muawx4~0_combout  & \soc_inst|m0_1|u_logic|Tpnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzawx4~combout  & ( !\soc_inst|m0_1|u_logic|Xucwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xucwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G27wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G27wx4~1 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|G27wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .lut_mask = 64'hAAAA00F000F0AAAA;
+defparam \soc_inst|m0_1|u_logic|Gpcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~1 (
+// Location: LABCELL_X23_Y20_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J00wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bkxvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (!\soc_inst|m0_1|u_logic|H9i2z4~q  & !\soc_inst|m0_1|u_logic|Ae6wx4~0_combout )) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|H9i2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ae6wx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|J00wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & \soc_inst|m0_1|u_logic|Gpcwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~97_sumout  & (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & \soc_inst|m0_1|u_logic|Gpcwx4~1_combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~97_sumout  & (\soc_inst|m0_1|u_logic|J00wx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Gpcwx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|J00wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gpcwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gpcwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .lut_mask = 64'hF0F0B0B0F0F08080;
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J00wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J00wx4~1 .lut_mask = 64'h0222020203330303;
+defparam \soc_inst|m0_1|u_logic|J00wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~2 (
+// Location: MLABCELL_X28_Y21_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C00wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bkxvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~q  & (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|J7swx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|J7swx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|C00wx4~0_combout  = (\soc_inst|m0_1|u_logic|J00wx4~1_combout  & \soc_inst|m0_1|u_logic|Leuvx4~1_combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bkxvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|J00wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .lut_mask = 64'h0F0A0F0A0C080C08;
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C00wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C00wx4~0 .lut_mask = 64'h000F000F000F000F;
+defparam \soc_inst|m0_1|u_logic|C00wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y23_N38
+dffeas \soc_inst|m0_1|u_logic|U5r2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U5r2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|U5r2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5r2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y23_N7
+dffeas \soc_inst|m0_1|u_logic|Twz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Twz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Twz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Twz2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y24_N49
+dffeas \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Bjkvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y23_N43
+dffeas \soc_inst|m0_1|u_logic|J433z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J433z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J433z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J433z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y21_N35
+dffeas \soc_inst|m0_1|u_logic|Av13z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Av13z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Av13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y23_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Am5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|J433z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nt03z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Av13z4~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|J433z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Av13z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nt03z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Am5wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .lut_mask = 64'hAAAAF0F0FF00CCCC;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y21_N11
+dffeas \soc_inst|m0_1|u_logic|Sd43z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sd43z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sd43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sd43z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4~0 (
+// Location: MLABCELL_X21_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bkxvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Am5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sd43z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|I7r2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sd43z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|I7r2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|I7r2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sd43z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Am5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .lut_mask = 64'h8ACF8ACF00000000;
-defparam \soc_inst|m0_1|u_logic|Bkxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .lut_mask = 64'hBC3CBC3C8C0C8C0C;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bkxvx4 (
+// Location: LABCELL_X24_Y23_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bkxvx4~combout  = ( \soc_inst|m0_1|u_logic|Bkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|X3xvx4~1_combout  & (\soc_inst|m0_1|u_logic|Bkxvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~q ) # (\soc_inst|m0_1|u_logic|S8swx4~0_combout 
-// )))) ) )
+// \soc_inst|m0_1|u_logic|Am5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Am5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Twz2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Am5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Am5wx4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Am5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Am5wx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S8swx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bkxvx4~2_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Twz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Am5wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Am5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bkxvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bkxvx4 .lut_mask = 64'h0000000000230023;
-defparam \soc_inst|m0_1|u_logic|Bkxvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .lut_mask = 64'h0C0C00000C0CCC88;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~0 (
+// Location: LABCELL_X23_Y23_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Am5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) # (\soc_inst|m0_1|u_logic|L8t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Am5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U5r2z4~q  & (!\soc_inst|m0_1|u_logic|Ixxwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bn53z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Am5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ixxwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bn53z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U5r2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bn53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ixxwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .lut_mask = 64'h00000000F555F555;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .lut_mask = 64'hF030501000000000;
+defparam \soc_inst|m0_1|u_logic|Am5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~2 (
+// Location: LABCELL_X36_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[4] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Y6t2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o [4] = ( !\soc_inst|m0_1|u_logic|Am5wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Am5wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o [4]),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .lut_mask = 64'h0100010045004500;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .lut_mask = 64'h3333333300000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[4] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~3 (
+// Location: MLABCELL_X39_Y18_N12
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[4]~15 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rfpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rfpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) ) ) )
+// \soc_inst|ram_1|data_to_memory[4]~15_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [4] & ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|hwdata_o [4] & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout  & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rfpvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|byte_select [0]),
+	.datac(!\soc_inst|ram_1|write_cycle~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o [4]),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~3_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[4]~15_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .lut_mask = 64'hFFF0555000000000;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~3 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[4]~15 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[4]~15 .lut_mask = 64'h000003030C0C0F0F;
+defparam \soc_inst|ram_1|data_to_memory[4]~15 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~4 (
+// Location: LABCELL_X33_Y15_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ophvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Rfpvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Xhxvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rfpvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Xhxvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Ophvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|interconnect_1|HRDATA[16]~7_combout ) # ((\soc_inst|interconnect_1|Equal1~0_combout  & 
+// !\soc_inst|switches_1|switch_store[1][4]~q ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & ( (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
+// ((!\soc_inst|switches_1|switch_store[1][4]~q ) # (!\soc_inst|interconnect_1|HRDATA[16]~7_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rfpvx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|switches_1|switch_store[1][4]~q ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ophvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .lut_mask = 64'h0000FFFF0000FBFB;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .lut_mask = 64'hFFFEFFFEFFBAFFBA;
+defparam \soc_inst|m0_1|u_logic|Ophvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rfpvx4~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rfpvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Rfpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rfpvx4~4_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Rfpvx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Rfpvx4~4_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Bkxvx4~combout ) # (\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Rfpvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Rfpvx4~4_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Rfpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rfpvx4~4_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rfpvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rfpvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rfpvx4~4_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y15_N4
+dffeas \soc_inst|m0_1|u_logic|Ckw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ophvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ckw2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .lut_mask = 64'h00FF00FF00DD00FF;
-defparam \soc_inst|m0_1|u_logic|Rfpvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ckw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ckw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y23_N28
-dffeas \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE (
+// Location: FF_X35_Y16_N56
+dffeas \soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
+	.d(\soc_inst|m0_1|u_logic|Fbnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnbwx4~0 (
+// Location: LABCELL_X30_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pxrvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hnbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|Qobwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rxl2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( \soc_inst|m0_1|u_logic|Qobwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|Qobwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Rxl2z4~q  & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( !\soc_inst|m0_1|u_logic|Qobwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Pxrvx4~0_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & (\soc_inst|switches_1|switch_store[1][4]~q  & \soc_inst|interconnect_1|HRDATA[16]~7_combout )) ) ) # ( 
+// !\soc_inst|interconnect_1|Equal1~0_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20  & (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & \soc_inst|interconnect_1|HRDATA[16]~7_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a20 ),
+	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datac(!\soc_inst|switches_1|switch_store[1][4]~q ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|Equal1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pxrvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .lut_mask = 64'hFF550F0555550505;
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .lut_mask = 64'h0011001100030003;
+defparam \soc_inst|m0_1|u_logic|Pxrvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~1 (
+// Location: LABCELL_X30_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X6nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4bwx4~1_combout  = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|X6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xly2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pxrvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[4]~23_combout ) # (!\soc_inst|m0_1|u_logic|Vapvx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xly2z4~q  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Pxrvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[4]~23_combout ) # (!\soc_inst|m0_1|u_logic|Vapvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[4]~23_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pxrvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X6nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .lut_mask = 64'hAAAAAAAA0AAA0AAA;
-defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .lut_mask = 64'h50405040F0C0F0C0;
+defparam \soc_inst|m0_1|u_logic|X6nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnbwx4~1 (
+// Location: LABCELL_X30_Y16_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X6nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hnbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Z4bwx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Z4bwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|X6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|X6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # ((\soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & (\soc_inst|m0_1|u_logic|Ckw2z4~q  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ckw2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X6nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .lut_mask = 64'hF3FBF3FBF0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .lut_mask = 64'h000000008CAF8CAF;
+defparam \soc_inst|m0_1|u_logic|X6nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y22_N37
-dffeas \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE (
+// Location: FF_X30_Y16_N40
+dffeas \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|X6nvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -84421,318 +84667,248 @@ dffeas \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~25 (
+// Location: LABCELL_X35_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gxxvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~25_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J4x2z4~q  ) + ( !\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  ) + ( !VCC ))
-// \soc_inst|m0_1|u_logic|Add2~26  = CARRY(( !\soc_inst|m0_1|u_logic|J4x2z4~q  ) + ( !\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  ) + ( !VCC ))
+// \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Viy2z4~q  $ (\soc_inst|m0_1|u_logic|Jky2z4~q 
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Viy2z4~q  $ (!\soc_inst|m0_1|u_logic|Jky2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~25_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~26 ),
+	.combout(\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~25 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~25 .lut_mask = 64'h00000F0F0000FF00;
-defparam \soc_inst|m0_1|u_logic|Add2~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .lut_mask = 64'h6996699696699669;
+defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imhvx4~0 (
+// Location: LABCELL_X35_Y14_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ljpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Imhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add2~25_sumout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|J4x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|J4x2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ljpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~q  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  $ (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Nqy2z4~q  $ (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  $ (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add2~25_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Imhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .lut_mask = 64'hAFAF00008D8D0000;
-defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .lut_mask = 64'h5AA55AA5A55AA55A;
+defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imhvx4~1 (
+// Location: LABCELL_X35_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jipvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Imhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Imhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~101_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Imhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Add5~101_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jipvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ljpvx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Imhvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jipvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .lut_mask = 64'h0000E0E00000EEEE;
-defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y22_N5
-dffeas \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .lut_mask = 64'h00000000C30FC30F;
+defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y15_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekovx4 (
+// Location: LABCELL_X36_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hhpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ekovx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (((\soc_inst|m0_1|u_logic|Add3~29_sumout  & \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # 
-// (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Add5~33_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Add3~29_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Add5~33_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Add3~29_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (\soc_inst|m0_1|u_logic|Add3~29_sumout  & 
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hhpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Viy2z4~q ) # (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add3~29_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ekovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ekovx4 .lut_mask = 64'h111111FF1F1F1FFF;
-defparam \soc_inst|m0_1|u_logic|Ekovx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X36_Y15_N26
-dffeas \soc_inst|ram_1|saved_word_address[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[1] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .lut_mask = 64'h00000000A8A8A8A8;
+defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N33
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[1]~1 (
+// Location: LABCELL_X36_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[1]~1_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( \soc_inst|m0_1|u_logic|Ekovx4~combout  & ( (!\soc_inst|ram_1|write_cycle~q ) # (\soc_inst|ram_1|saved_word_address [1]) ) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & 
-// ( \soc_inst|m0_1|u_logic|Ekovx4~combout  & ( \soc_inst|ram_1|saved_word_address [1] ) ) ) # ( \soc_inst|ram_1|always1~0_combout  & ( !\soc_inst|m0_1|u_logic|Ekovx4~combout  & ( (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|saved_word_address [1]) ) ) 
-// ) # ( !\soc_inst|ram_1|always1~0_combout  & ( !\soc_inst|m0_1|u_logic|Ekovx4~combout  & ( \soc_inst|ram_1|saved_word_address [1] ) ) )
+// \soc_inst|m0_1|u_logic|Kfpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|saved_word_address [1]),
-	.datae(!\soc_inst|ram_1|always1~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[1]~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .lut_mask = 64'h00FF005500FFAAFF;
-defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .lut_mask = 64'h0F000F00FF000F00;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N0
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~21 (
+// Location: LABCELL_X35_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[1]~21_combout  = ( \soc_inst|switches_1|switch_store[0][1]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & 
-// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [1])))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][1]~q  & ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [1]))))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout  & (((\soc_inst|interconnect_1|HRDATA[1]~19_combout )))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][1]~q  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [1]))))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout  & (((!\soc_inst|interconnect_1|HRDATA[1]~19_combout )))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][1]~q  & 
-// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [1]))))) ) ) )
+// \soc_inst|m0_1|u_logic|C9rvx4~0_combout  = (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Kyi2z4~q )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|switches_1|DataValid [1]),
-	.datad(!\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
-	.datae(!\soc_inst|switches_1|switch_store[0][1]~q ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[1]~21 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[1]~21 .lut_mask = 64'h880ADD0A885FDD5F;
-defparam \soc_inst|interconnect_1|HRDATA[1]~21 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .lut_mask = 64'h0F000F000F000F00;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hcnvx4~0 (
+// Location: MLABCELL_X34_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hcnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dwl2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~21_combout  & ((\soc_inst|m0_1|u_logic|Abovx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dwl2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & (!\soc_inst|interconnect_1|HRDATA[1]~21_combout  & 
-// ((\soc_inst|m0_1|u_logic|Abovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dwl2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Abovx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dwl2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Abovx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kfpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hcnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .lut_mask = 64'h4C4C5F5F4C005F00;
-defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y16_N32
-dffeas \soc_inst|m0_1|u_logic|Dwl2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hcnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dwl2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dwl2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .lut_mask = 64'h02020F0F02020202;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~1 (
+// Location: MLABCELL_X34_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fmqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dwl2z4~q  & ( (\soc_inst|m0_1|u_logic|Dsqvx4~combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Dwl2z4~q  & ( ((\soc_inst|m0_1|u_logic|Dsqvx4~combout  
-// & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kfpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kfpvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kfpvx4~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .lut_mask = 64'h50FF50FF50505050;
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .lut_mask = 64'hFF00FF00FC00FC00;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A1yvx4~0 (
+// Location: LABCELL_X35_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A1yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Hyy2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Kfpvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Irqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kfpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kfpvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|C9rvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Irqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kfpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.dataf(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .lut_mask = 64'h0808000208080002;
-defparam \soc_inst|m0_1|u_logic|A1yvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .lut_mask = 64'h00000000C0C0C000;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N21
+// Location: LABCELL_X36_Y14_N42
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mnpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|A1yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & 
-// (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Mnpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|A1yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
@@ -84745,2981 +84921,2712 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mnpvx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .lut_mask = 64'h000C000C0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .lut_mask = 64'h000A000A0F0F0F0F;
 defparam \soc_inst|m0_1|u_logic|Mnpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~0 (
+// Location: LABCELL_X27_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fmqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zpqvx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kfpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Qzq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qzq2z4~q  & ( (\soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .lut_mask = 64'h0A0A0A0AFF0AFF0A;
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .lut_mask = 64'h55005500F5F0F5F0;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmpvx4~0 (
+// Location: LABCELL_X30_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Z3yvx4~combout  & (((!\soc_inst|m0_1|u_logic|Xhxvx4~combout ) # (!\soc_inst|m0_1|u_logic|Ukpvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Z3yvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Kfpvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Kfpvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kfpvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Jipvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z3yvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jipvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Kfpvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .lut_mask = 64'hFF00FF00FD00FD00;
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .lut_mask = 64'h00004C4C00000000;
+defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmpvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rmpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( \soc_inst|m0_1|u_logic|Rmpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rngwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( \soc_inst|m0_1|u_logic|Rmpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rmpvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y15_N14
+dffeas \soc_inst|m0_1|u_logic|Qzq2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .lut_mask = 64'h00000000BBBBBB00;
-defparam \soc_inst|m0_1|u_logic|Rmpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qzq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qzq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yplwx4~0 (
+// Location: MLABCELL_X28_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yplwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Hnbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y29wx4~combout  & ( (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Qobwx4~0_combout  & !\soc_inst|m0_1|u_logic|Xwawx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Y29wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qobwx4~0_combout  & !\soc_inst|m0_1|u_logic|Xwawx4~0_combout )) # (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qobwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .lut_mask = 64'h00A000A000000000;
-defparam \soc_inst|m0_1|u_logic|Yplwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .lut_mask = 64'hB3B3B3B300B300B3;
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vopvx4~0 (
+// Location: MLABCELL_X28_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4bwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vopvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G97wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|G97wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Z4bwx4~1_combout  = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dplwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4bwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .lut_mask = 64'hFAC8FAC800000000;
-defparam \soc_inst|m0_1|u_logic|Vopvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .lut_mask = 64'hAAAAAAAA0AAA0AAA;
+defparam \soc_inst|m0_1|u_logic|Z4bwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ljpvx4~0 (
+// Location: MLABCELL_X28_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnbwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ljpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hnbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & \soc_inst|m0_1|u_logic|Z4bwx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|Qzq2z4~q  & \soc_inst|m0_1|u_logic|Z4bwx4~1_combout )) # (\soc_inst|m0_1|u_logic|W19wx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hnbwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .lut_mask = 64'h3C3CC3C3C3C33C3C;
-defparam \soc_inst|m0_1|u_logic|Ljpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .lut_mask = 64'hCFEFCFEFCCEECCEE;
+defparam \soc_inst|m0_1|u_logic|Hnbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvxvx4 (
+// Location: LABCELL_X18_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jvxvx4~combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Rxl2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Viy2z4~q  & \soc_inst|m0_1|u_logic|Rxl2z4~q )))) # (\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Viy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rxl2z4~q )) # (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Rxl2z4~q ) # (\soc_inst|m0_1|u_logic|Viy2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Jky2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Viy2z4~q ) # (!\soc_inst|m0_1|u_logic|Rxl2z4~q ))) # (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Rxl2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Viy2z4~q  & !\soc_inst|m0_1|u_logic|Rxl2z4~q )) # (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Viy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Rxl2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Cr1wx4~3_combout  = ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Hnbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( \soc_inst|m0_1|u_logic|Hnbwx4~1_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & \soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((\soc_inst|m0_1|u_logic|Muawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X8zvx4~combout  & ( !\soc_inst|m0_1|u_logic|Hnbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & \soc_inst|m0_1|u_logic|Muawx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hnbwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jvxvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jvxvx4 .lut_mask = 64'hE881E88181178117;
-defparam \soc_inst|m0_1|u_logic|Jvxvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .lut_mask = 64'h08086E6E04049D9D;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vnqvx4~0 (
+// Location: MLABCELL_X21_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ffbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vnqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  $ (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  $ (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  $ (((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( !\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jvxvx4~combout  $ (((\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ffbwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|G6d3z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q 
+// )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G6d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .lut_mask = 64'hC333333C333C3CCC;
-defparam \soc_inst|m0_1|u_logic|Vnqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .lut_mask = 64'h0050000000000000;
+defparam \soc_inst|m0_1|u_logic|Ffbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xipvx4~0 (
+// Location: MLABCELL_X28_Y21_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xipvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Csewx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|Csewx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( \soc_inst|m0_1|u_logic|Vnxvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Cr1wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zz8wx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sh5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zz8wx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Vnxvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffbwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zz8wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sh5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .lut_mask = 64'h333300003B330A00;
-defparam \soc_inst|m0_1|u_logic|Xipvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .lut_mask = 64'hA800A800A8A8A8A8;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Onqvx4~0 (
+// Location: LABCELL_X22_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Onqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vnqvx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Hyy2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Cr1wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ) # (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cr1wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ) # (\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cr1wx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cr1wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Onqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .lut_mask = 64'h0000000040BF40BF;
-defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .lut_mask = 64'h000088CC0000080C;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hhpvx4~0 (
+// Location: LABCELL_X30_Y23_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hhpvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Viy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Zluvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Omyvx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ajmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Qkmwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Omyvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zluvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .lut_mask = 64'h00FA00FA00000000;
-defparam \soc_inst|m0_1|u_logic|Hhpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .lut_mask = 64'hAFAF0F0FAAAA0000;
+defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~2 (
+// Location: LABCELL_X30_Y23_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fmqvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Onqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Vopvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Zluvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Onqvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zluvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .lut_mask = 64'hD700D70000000000;
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .lut_mask = 64'hFCFCCCCCF0F00000;
+defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~3 (
+// Location: LABCELL_X30_Y23_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fmqvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fmqvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Fmqvx4~1_combout  & !\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fmqvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Fmqvx4~1_combout  & (\soc_inst|m0_1|u_logic|Rxl2z4~q  & !\soc_inst|m0_1|u_logic|Fmqvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Zluvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Zluvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zluvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zluvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Zluvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fmqvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fmqvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zluvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zluvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .lut_mask = 64'h000000002020A0A0;
-defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .lut_mask = 64'hA0A00000A0F00000;
+defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzl2z4~feeder (
+// Location: LABCELL_X24_Y24_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cr1wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fzl2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Fmqvx4~3_combout  )
+// \soc_inst|m0_1|u_logic|Cr1wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cr1wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nen2z4~q ) # (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cr1wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fzl2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzl2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fzl2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Fzl2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .lut_mask = 64'h000000000000FAFA;
+defparam \soc_inst|m0_1|u_logic|Cr1wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y20_N19
-dffeas \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE (
+// Location: FF_X18_Y18_N58
+dffeas \soc_inst|m0_1|u_logic|Gf73z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fzl2z4~feeder_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Gf73z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gf73z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf73z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mmxvx4~0 (
+// Location: LABCELL_X18_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mmxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~q  & !\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uup2z4~q  $ (((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ))))) ) )
+// \soc_inst|m0_1|u_logic|Q1ywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Po83z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Gju2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Gf73z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Ajn2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gf73z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ajn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Po83z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Gju2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mmxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .lut_mask = 64'h78007800F000F000;
-defparam \soc_inst|m0_1|u_logic|Mmxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .lut_mask = 64'hCCCCAAAAFF00F0F0;
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~1 (
+// Location: LABCELL_X18_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbxvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mmxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Q1ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Vu93z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Yfn2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Psv2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Mhn2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mmxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vu93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Psv2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yfn2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mhn2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .lut_mask = 64'hBFB0BFB000000000;
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .lut_mask = 64'hFF00CCCCF0F0AAAA;
+defparam \soc_inst|m0_1|u_logic|Q1ywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~2 (
+// Location: MLABCELL_X28_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q1ywx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbxvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sbxvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Dsqvx4~combout  & (((!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Viy2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Dsqvx4~combout  & (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Viy2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Q1ywx4~combout  = ( \soc_inst|m0_1|u_logic|Q1ywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Q1ywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|Q1ywx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q1ywx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sbxvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .lut_mask = 64'h00000000A2F3A2F3;
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q1ywx4 .lut_mask = 64'h000C000C030F030F;
+defparam \soc_inst|m0_1|u_logic|Q1ywx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mbnvx4~0 (
+// Location: MLABCELL_X28_Y18_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tzxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[3]~26_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[3]~26_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Gtp2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[3]~26_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gtp2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[3]~26_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Tzxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q1ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Q1ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wai2z4~q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .lut_mask = 64'hC800C8C8FA00FAFA;
-defparam \soc_inst|m0_1|u_logic|Mbnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y16_N13
-dffeas \soc_inst|m0_1|u_logic|Gtp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mbnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gtp2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gtp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gtp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .lut_mask = 64'h00A000A030B030B0;
+defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gokwx4~0 (
+// Location: MLABCELL_X28_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9nwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gokwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Swy2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Y9nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & (((\soc_inst|m0_1|u_logic|Svxwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wxxwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .lut_mask = 64'h0000030300000000;
-defparam \soc_inst|m0_1|u_logic|Gokwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .lut_mask = 64'h3333333313331333;
+defparam \soc_inst|m0_1|u_logic|Y9nwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~0 (
+// Location: LABCELL_X31_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Gtp2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q ) # (((\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|A1yvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Irqvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|A1yvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Gokwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A1yvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .lut_mask = 64'h0F3FAFBF0000AAAA;
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .lut_mask = 64'h010301030F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gqxvx4 (
+// Location: LABCELL_X29_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gqxvx4~combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jvxvx4~combout  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  $ 
-// (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Jvxvx4~combout  & 
-// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Jvxvx4~combout  & \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Zkhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Add5~81_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|Ycx2z4~q ))) # (\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) # ( \soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Add2~53_sumout )))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ycx2z4~q ))) # (\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add2~53_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gqxvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gqxvx4 .lut_mask = 64'h2400240048004800;
-defparam \soc_inst|m0_1|u_logic|Gqxvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .lut_mask = 64'h0FFF03FFAAFFAAFF;
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y7xvx4 (
+// Location: MLABCELL_X28_Y22_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zkhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y7xvx4~combout  = ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ljpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Vnqvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Zkhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|W4zvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Zkhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & \soc_inst|m0_1|u_logic|W4zvx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W4zvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zkhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y7xvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y7xvx4 .lut_mask = 64'h0404040400000000;
-defparam \soc_inst|m0_1|u_logic|Y7xvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .lut_mask = 64'hAAEEAAEF00000000;
+defparam \soc_inst|m0_1|u_logic|Zkhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hnxvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Hnxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y7xvx4~combout  & ( (\soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Gqxvx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Y7xvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Gqxvx4~combout  & \soc_inst|m0_1|u_logic|Xipvx4~0_combout )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hnxvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y22_N58
+dffeas \soc_inst|m0_1|u_logic|Ycx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Zkhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ycx2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .lut_mask = 64'h020202020B0B0B0B;
-defparam \soc_inst|m0_1|u_logic|Hnxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ycx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ycx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbxvx4~3 (
+// Location: MLABCELL_X25_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4qvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbxvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hnxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sbxvx4~2_combout  & !\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hnxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sbxvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Sbxvx4~0_combout  & \soc_inst|m0_1|u_logic|Jky2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|S4qvx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~49_sumout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~81_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~49_sumout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( ((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~49_sumout )) # (\soc_inst|m0_1|u_logic|Yonvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~81_sumout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~49_sumout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sbxvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sbxvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hnxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add3~49_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Yonvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~81_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .lut_mask = 64'h0404444400000000;
-defparam \soc_inst|m0_1|u_logic|Sbxvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S4qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S4qvx4 .lut_mask = 64'h11111F1F11FF1FFF;
+defparam \soc_inst|m0_1|u_logic|S4qvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y23_N37
-dffeas \soc_inst|m0_1|u_logic|Uup2z4 (
+// Location: FF_X25_Y17_N7
+dffeas \soc_inst|ram_1|saved_word_address[5] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Sbxvx4~3_combout ),
+	.d(\soc_inst|m0_1|u_logic|S4qvx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uup2z4~q ),
+	.q(\soc_inst|ram_1|saved_word_address [5]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uup2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uup2z4 .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[5] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[5] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4bwx4~0 (
+// Location: MLABCELL_X25_Y17_N33
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[5]~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S4bwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & (\soc_inst|m0_1|u_logic|Z4bwx4~0_combout  & !\soc_inst|m0_1|u_logic|Fzl2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( 
-// !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~q  & !\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[5]~5_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|S4qvx4~combout )) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// ((\soc_inst|ram_1|saved_word_address [5]))) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [5] ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
+	.datad(!\soc_inst|ram_1|saved_word_address [5]),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S4bwx4~0_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[5]~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .lut_mask = 64'hCC00CC000C00CC00;
-defparam \soc_inst|m0_1|u_logic|S4bwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .lut_mask = 64'h00FF00FF0C3F0C3F;
+defparam \soc_inst|ram_1|memory.raddr_a[5]~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3bwx4~0 (
+// Location: LABCELL_X31_Y15_N45
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[18]~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q3bwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|S4bwx4~0_combout  & ( \soc_inst|m0_1|u_logic|R40wx4~combout  & ( (!\soc_inst|m0_1|u_logic|L4bwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Uup2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S4bwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( (!\soc_inst|m0_1|u_logic|L4bwx4~0_combout  & (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|Uup2z4~q )))) ) ) )
+// \soc_inst|ram_1|data_to_memory[18]~6_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select [2]) # (!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ))) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (\soc_inst|ram_1|byte_select [2] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L4bwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S4bwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.dataa(!\soc_inst|ram_1|byte_select [2]),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q3bwx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[18]~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .lut_mask = 64'hA0200000AA220000;
-defparam \soc_inst|m0_1|u_logic|Q3bwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y26_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~17 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~17_sumout  = SUM(( !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~26  ))
-// \soc_inst|m0_1|u_logic|Add2~18  = CARRY(( !\soc_inst|m0_1|u_logic|G7x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~26  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~26 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~17_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~18 ),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~17 .lut_mask = 64'h0000FFFF0000F0F0;
-defparam \soc_inst|m0_1|u_logic|Add2~17 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[18]~6 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[18]~6 .lut_mask = 64'h050005000F0A0F0A;
+defparam \soc_inst|ram_1|data_to_memory[18]~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bmhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bmhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add2~17_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|G7x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add2~17_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|G7x2z4~q ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add2~17_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bmhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: M10K_X26_Y12_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 (
+	.portawe(\soc_inst|ram_1|write_cycle~q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[18]~6_combout ,\soc_inst|ram_1|data_to_memory[10]~5_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .lut_mask = 64'hF3F30000A3A30000;
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_bit_number = 10;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_bit_number = 10;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010B0B880000120000008828808888A8A803103000000100104200000000000001C28001555555555555412841000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bmhvx4~1 (
+// Location: LABCELL_X31_Y22_N0
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[10]~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bmhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Bmhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~33_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Bmhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Add5~33_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bmhvx4~0_combout ),
+// \soc_inst|ram_1|data_to_memory[10]~5_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (!\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) 
+// ) ) ) # ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout  & ( (\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|write_cycle~DUPLICATE_q ) ) ) )
+
+	.dataa(!\soc_inst|ram_1|byte_select [1]),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[10]~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[10]~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .lut_mask = 64'h00000000CC88FFAA;
-defparam \soc_inst|m0_1|u_logic|Bmhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y22_N25
-dffeas \soc_inst|m0_1|u_logic|G7x2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bmhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G7x2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G7x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G7x2z4 .power_up = "low";
+defparam \soc_inst|ram_1|data_to_memory[10]~5 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[10]~5 .lut_mask = 64'h05050F0F00000A0A;
+defparam \soc_inst|ram_1|data_to_memory[10]~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mekvx4~0 (
+// Location: LABCELL_X31_Y15_N30
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[18]~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mekvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Cam2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Cam2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) ) )
+// \soc_inst|interconnect_1|HRDATA[18]~13_combout  = ( \soc_inst|switches_1|switch_store[1][2]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
+// (\soc_inst|interconnect_1|HRDATA[16]~7_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][2]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][2]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & 
+// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][2]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[16]~7_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
+	.datae(!\soc_inst|switches_1|switch_store[1][2]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a18 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mekvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .lut_mask = 64'hAAAAAFAF00000F0F;
-defparam \soc_inst|m0_1|u_logic|Mekvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[18]~13 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[18]~13 .lut_mask = 64'hA0A0A3A3ACACAFAF;
+defparam \soc_inst|interconnect_1|HRDATA[18]~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y15_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mekvx4~1 (
+// Location: LABCELL_X33_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cqhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mekvx4~1_combout  = ( \soc_inst|m0_1|u_logic|W0pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Mekvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G7x2z4~q  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ekovx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W0pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Mekvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ekovx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Cqhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[18]~13_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[18]~13_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mekvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cqhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .lut_mask = 64'hFAFA323200000000;
-defparam \soc_inst|m0_1|u_logic|Mekvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y15_N58
-dffeas \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE (
+// Location: FF_X33_Y14_N38
+dffeas \soc_inst|m0_1|u_logic|Ahw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mekvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cqhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X36_Y22_N29
-dffeas \soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C00wx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ahw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ahw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ahw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~0 (
+// Location: LABCELL_X33_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C372z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Sd43z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE_q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|L7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ahw2z4~q ) # ((\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sd43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ahw2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C372z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L7nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C372z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C372z4~0 .lut_mask = 64'h00000000000088A0;
-defparam \soc_inst|m0_1|u_logic|C372z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .lut_mask = 64'h30303030FF30FF30;
+defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~2 (
+// Location: LABCELL_X33_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C372z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Twz2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nt03z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|L7nvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Viy2z4~q  & ((!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[2]~14_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )))) # (\soc_inst|m0_1|u_logic|Viy2z4~q 
+//  & (((\soc_inst|interconnect_1|HRDATA[2]~14_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ))))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Twz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nt03z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C372z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L7nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C372z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C372z4~2 .lut_mask = 64'h0000C00000008080;
-defparam \soc_inst|m0_1|u_logic|C372z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .lut_mask = 64'h888F888F888F888F;
+defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~1 (
+// Location: LABCELL_X33_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C372z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Av13z4~q ))) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|J433z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|L7nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|L7nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L7nvx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[18]~13_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J433z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Av13z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L7nvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|L7nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C372z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C372z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C372z4~1 .lut_mask = 64'h00000000E2000000;
-defparam \soc_inst|m0_1|u_logic|C372z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z472z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z472z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U5r2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|M1j2z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|U5r2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z472z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X33_Y14_N56
+dffeas \soc_inst|m0_1|u_logic|Viy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z472z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z472z4~0 .lut_mask = 64'h0000000000800000;
-defparam \soc_inst|m0_1|u_logic|Z472z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Viy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Viy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C372z4~3 (
+// Location: LABCELL_X27_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C372z4~3_combout  = ( !\soc_inst|m0_1|u_logic|C372z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z472z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C372z4~0_combout  & (!\soc_inst|m0_1|u_logic|C372z4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|I7r2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Z4xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C372z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C372z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I7r2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|C372z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z472z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C372z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C372z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C372z4~3 .lut_mask = 64'h80C0000000000000;
-defparam \soc_inst|m0_1|u_logic|C372z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .lut_mask = 64'h00F000F0AAFAAAFA;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tpnvx4~0 (
+// Location: LABCELL_X35_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tpnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|C372z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Bdwwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C372z4~3_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|C372z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ovc3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C372z4~3_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ovc3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|I6xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y7xvx4~combout  $ (!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Gqxvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C372z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I6xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .lut_mask = 64'hACACACACAFAFAFA0;
-defparam \soc_inst|m0_1|u_logic|Tpnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .lut_mask = 64'h00000000A55AA55A;
+defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y26_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~33 (
+// Location: LABCELL_X27_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add2~33_sumout  = SUM(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~18  ))
-// \soc_inst|m0_1|u_logic|Add2~34  = CARRY(( !\soc_inst|m0_1|u_logic|R8x2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~18  ))
+// \soc_inst|m0_1|u_logic|Z4xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add2~18 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add2~33_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add2~34 ),
+	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add2~33 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add2~33 .lut_mask = 64'h0000FFFF0000CCCC;
-defparam \soc_inst|m0_1|u_logic|Add2~33 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .lut_mask = 64'hA0F0A0F020302030;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ulhvx4~0 (
+// Location: LABCELL_X27_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ulhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~33_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|R8x2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Z4xvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z4xvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~q  $ (((\soc_inst|m0_1|u_logic|Fzl2z4~q ) # (\soc_inst|m0_1|u_logic|Qzq2z4~q )))) # (\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~33_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z4xvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ulhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .lut_mask = 64'hAF8DAF8D00000000;
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .lut_mask = 64'h00000000D57FD57F;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ulhvx4~1 (
+// Location: LABCELL_X27_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ulhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ulhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~97_sumout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (\soc_inst|m0_1|u_logic|Ulhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~97_sumout )))) ) )
+// \soc_inst|m0_1|u_logic|Z4xvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Z4xvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Z4xvx4~0_combout  & (!\soc_inst|m0_1|u_logic|I6xvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Viy2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ulhvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I6xvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z4xvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ulhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .lut_mask = 64'h00C800C800FA00FA;
-defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .lut_mask = 64'h000000004C004C00;
+defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y21_N29
-dffeas \soc_inst|m0_1|u_logic|R8x2z4 (
+// Location: FF_X27_Y15_N26
+dffeas \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ulhvx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R8x2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R8x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R8x2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Nlhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Add2~37_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Cax2z4~q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cax2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~37_sumout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .lut_mask = 64'hCF8BCF8B00000000;
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlhvx4~1 (
+// Location: LABCELL_X36_Y21_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rryvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & \soc_inst|m0_1|u_logic|Nlhvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Add5~109_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Nlhvx4~0_combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( \soc_inst|m0_1|u_logic|Nlhvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Add5~109_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Nlhvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Rryvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Trq2z4~q  & ( \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|G0w2z4~q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nlhvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tdp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .lut_mask = 64'h00F000FF00C000CC;
-defparam \soc_inst|m0_1|u_logic|Nlhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y25_N52
-dffeas \soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nlhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .lut_mask = 64'h0000000040000000;
+defparam \soc_inst|m0_1|u_logic|Rryvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnkvx4~0 (
+// Location: MLABCELL_X28_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Upyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qnkvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # (\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Upyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rryvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qnkvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Upyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .lut_mask = 64'hAAAAAFAF00000F0F;
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .lut_mask = 64'h0000000044004400;
+defparam \soc_inst|m0_1|u_logic|Upyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnkvx4~1 (
+// Location: LABCELL_X29_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qnkvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Qnkvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qnkvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|R3mwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (((\soc_inst|m0_1|u_logic|B73wx4~combout  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qnkvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datag(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .lut_mask = 64'hDDDD0000D0D00000;
-defparam \soc_inst|m0_1|u_logic|Qnkvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X33_Y15_N26
-dffeas \soc_inst|m0_1|u_logic|Efp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qnkvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Efp2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Efp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Efp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .lut_mask = 64'h000000000008000F;
+defparam \soc_inst|m0_1|u_logic|R3mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y20_N44
-dffeas \soc_inst|m0_1|u_logic|Ilp2z4 (
+// Location: FF_X29_Y10_N37
+dffeas \soc_inst|m0_1|u_logic|Pet2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ilp2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|R3mwx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ilp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Pet2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ilp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ilp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pet2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pet2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny62z4~0 (
+// Location: MLABCELL_X28_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nen2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ilp2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Nen2z4~0_combout  = ( \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & !\soc_inst|m0_1|u_logic|Htyvx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q  & ( 
+// ((\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & !\soc_inst|m0_1|u_logic|Htyvx4~3_combout )) # (\soc_inst|m0_1|u_logic|Pet2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ilp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pet2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nen2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .lut_mask = 64'h0000000000008000;
-defparam \soc_inst|m0_1|u_logic|Ny62z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X25_Y21_N14
-dffeas \soc_inst|m0_1|u_logic|V233z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|V233z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V233z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|V233z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .lut_mask = 64'h50FF50FF50505050;
+defparam \soc_inst|m0_1|u_logic|Nen2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~1 (
+// Location: MLABCELL_X28_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nen2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qw62z4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Mt13z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|V233z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mt13z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|V233z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mt13z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Nen2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Nen2z4~q  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Nen2z4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nen2z4~q  & ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Nen2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Nen2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (((!\soc_inst|m0_1|u_logic|Msyvx4~combout  & !\soc_inst|m0_1|u_logic|Upyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nen2z4~0_combout )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nen2z4~q  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & (\soc_inst|m0_1|u_logic|Nen2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Upyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Msyvx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|V233z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mt13z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Upyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nen2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qw62z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .lut_mask = 64'h00A0008000000080;
-defparam \soc_inst|m0_1|u_logic|Qw62z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .lut_mask = 64'h0015EAFF0055AAFF;
+defparam \soc_inst|m0_1|u_logic|Nen2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y23_N14
-dffeas \soc_inst|m0_1|u_logic|Ec43z4 (
+// Location: FF_X28_Y12_N49
+dffeas \soc_inst|m0_1|u_logic|Nen2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ec43z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nen2z4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ec43z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nen2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ec43z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ec43z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nen2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nen2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~0 (
+// Location: LABCELL_X36_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C1zvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qw62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Nl53z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ec43z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( !\soc_inst|m0_1|u_logic|Nl53z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Ec43z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|C1zvx4~combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nen2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Nen2z4~q  ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ec43z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nl53z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nen2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qw62z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C1zvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .lut_mask = 64'h0000008A00000080;
-defparam \soc_inst|m0_1|u_logic|Qw62z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C1zvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C1zvx4 .lut_mask = 64'hF0F0F0F030303030;
+defparam \soc_inst|m0_1|u_logic|C1zvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~2 (
+// Location: LABCELL_X37_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qw62z4~2_combout  = ( \soc_inst|m0_1|u_logic|Zr03z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fvz2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zr03z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Fvz2z4~q ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|M1j2z4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C1zvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|C1zvx4~combout  ) ) # ( 
+// \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|C1zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|C1zvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fvz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zr03z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C1zvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qw62z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1j2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .lut_mask = 64'h00000000C8000800;
-defparam \soc_inst|m0_1|u_logic|Qw62z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .lut_mask = 64'h3C543050FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qw62z4~3 (
+// Location: LABCELL_X37_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qw62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Qw62z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qw62z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Ny62z4~0_combout  & (!\soc_inst|m0_1|u_logic|Qw62z4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wmp2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|M1j2z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( (((\soc_inst|m0_1|u_logic|M1j2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Rngwx4~combout ))))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Jky2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ny62z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wmp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qw62z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qw62z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qw62z4~2_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qw62z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1j2z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .lut_mask = 64'hA200000000000000;
-defparam \soc_inst|m0_1|u_logic|Qw62z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .lut_mask = 64'h000000000FFFFFDF;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mpnvx4~0 (
+// Location: LABCELL_X37_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mpnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ovc3z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Qxuwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ovc3z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ovc3z4~q ) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qw62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ovc3z4~q ))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Efp2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|M1j2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jky2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Akewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|C1zvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Jky2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Akewx4~0_combout )) # (\soc_inst|m0_1|u_logic|C1zvx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Efp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ovc3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qw62z4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C1zvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1j2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .lut_mask = 64'hF0AAF0FFF0AAF0CC;
-defparam \soc_inst|m0_1|u_logic|Mpnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .lut_mask = 64'h00000000F5FFD5DD;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wccwx4~0 (
+// Location: LABCELL_X27_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wccwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuawx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Wzawx4~combout  & (!\soc_inst|m0_1|u_logic|X8zvx4~combout )) # (\soc_inst|m0_1|u_logic|Wzawx4~combout  & ((!\soc_inst|m0_1|u_logic|Muawx4~0_combout ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ydcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) # (!\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Cuyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Muawx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuawx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .lut_mask = 64'hFAFAAC00AFAFCA00;
-defparam \soc_inst|m0_1|u_logic|Wccwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .lut_mask = 64'hA000CC2200000000;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yxzvx4~0 (
+// Location: LABCELL_X29_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yyyvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fyzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vcuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wccwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~109_sumout ) # 
-// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Yyyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wccwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fyzvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vcuvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .lut_mask = 64'h0000000000000F05;
-defparam \soc_inst|m0_1|u_logic|Yxzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yyyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yyyvx4 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Yyyvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ujp2z4~feeder (
+// Location: LABCELL_X29_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ujp2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yyyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Yyyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cuyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ujp2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ujp2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ujp2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Ujp2z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X23_Y22_N5
-dffeas \soc_inst|m0_1|u_logic|Ujp2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ujp2z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ujp2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ujp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ujp2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .lut_mask = 64'hFD00FD00A800A800;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wu63z4~feeder (
+// Location: MLABCELL_X28_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wu63z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Cuyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cuyvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Uwyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cuyvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wu63z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wu63z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wu63z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Wu63z4~feeder .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X23_Y22_N44
-dffeas \soc_inst|m0_1|u_logic|Wu63z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wu63z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wu63z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wu63z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wu63z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .lut_mask = 64'h0000FCFC0000A8A8;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~0 (
+// Location: MLABCELL_X28_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cuyvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qxuwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wu63z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ujp2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Cuyvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Cuyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jky2z4~q  & !\soc_inst|m0_1|u_logic|Mkrwx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Cuyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ujp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wu63z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Cuyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .lut_mask = 64'h000080800000C000;
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .lut_mask = 64'h0000F0F000003030;
+defparam \soc_inst|m0_1|u_logic|Cuyvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X25_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gip2z4~feeder (
+// Location: MLABCELL_X21_Y20_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M1j2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gip2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|M1j2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Cuyvx4~3_combout  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Cuyvx4~3_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & 
+// (\soc_inst|m0_1|u_logic|M1j2z4~q )) # (\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|M1j2z4~1_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~1_combout ),
+	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cuyvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gip2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gip2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gip2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Gip2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .lut_mask = 64'h330F330F33333333;
+defparam \soc_inst|m0_1|u_logic|M1j2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X25_Y22_N17
-dffeas \soc_inst|m0_1|u_logic|Gip2z4 (
+// Location: FF_X21_Y20_N11
+dffeas \soc_inst|m0_1|u_logic|M1j2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gip2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|M1j2z4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gip2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gip2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gip2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X24_Y19_N59
-dffeas \soc_inst|m0_1|u_logic|F8v2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F8v2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F8v2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F8v2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M1j2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M1j2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~3 (
+// Location: LABCELL_X19_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C51xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qxuwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|F8v2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Gip2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|C51xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gip2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|F8v2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .lut_mask = 64'h000000000A000C00;
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C51xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C51xx4~0 .lut_mask = 64'h0030000000000000;
+defparam \soc_inst|m0_1|u_logic|C51xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y22_N22
-dffeas \soc_inst|m0_1|u_logic|W893z4 (
+// Location: FF_X21_Y20_N32
+dffeas \soc_inst|m0_1|u_logic|Ytm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W893z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ytm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W893z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W893z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ytm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ytm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X24_Y22_N38
-dffeas \soc_inst|m0_1|u_logic|Sgp2z4 (
+// Location: FF_X23_Y22_N19
+dffeas \soc_inst|m0_1|u_logic|Mvm2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sgp2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Mvm2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sgp2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sgp2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X24_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qxuwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgp2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|W893z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|W893z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgp2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .lut_mask = 64'h0000000000000E04;
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mvm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mvm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wyt2z4~feeder (
+// Location: LABCELL_X19_Y22_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zj53z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wyt2z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Zj53z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wyt2z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zj53z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wyt2z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wyt2z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Wyt2z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zj53z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zj53z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Zj53z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X23_Y22_N38
-dffeas \soc_inst|m0_1|u_logic|Wyt2z4 (
+// Location: FF_X19_Y22_N56
+dffeas \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wyt2z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Zj53z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wyt2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wyt2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wyt2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y22_N59
+dffeas \soc_inst|m0_1|u_logic|Rtz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rtz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rtz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F483z4~feeder (
+// Location: LABCELL_X19_Y22_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qa43z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F483z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Yxzvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Qa43z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|Oszvx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F483z4~feeder_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qa43z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F483z4~feeder .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F483z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|F483z4~feeder .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qa43z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qa43z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Qa43z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y20_N50
-dffeas \soc_inst|m0_1|u_logic|F483z4 (
+// Location: FF_X19_Y22_N26
+dffeas \soc_inst|m0_1|u_logic|Qa43z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|F483z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qa43z4~feeder_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F483z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qa43z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F483z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F483z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X23_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qxuwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|F483z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Rni2z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wyt2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Wyt2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|F483z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .lut_mask = 64'h00000A0000000C00;
-defparam \soc_inst|m0_1|u_logic|Qxuwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X24_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxuwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Qxuwx4~combout  = ( !\soc_inst|m0_1|u_logic|Qxuwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qxuwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qxuwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ) ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qxuwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qxuwx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qxuwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxuwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxuwx4 .lut_mask = 64'hF000000000000000;
-defparam \soc_inst|m0_1|u_logic|Qxuwx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X24_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rw7wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( \soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Svqwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Qxuwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Svqwx4~combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .lut_mask = 64'h00FF00FF0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Rw7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qa43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qa43z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkdwx4~1 (
+// Location: LABCELL_X19_Y22_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fkdwx4~1_combout  = ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fkdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Fkdwx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|D5ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fkdwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rw7wx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Uvzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Rtz2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Qa43z4~q  ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rw7wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|D5ywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fkdwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qa43z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .lut_mask = 64'h00000F0FFFFF0F0F;
-defparam \soc_inst|m0_1|u_logic|Fkdwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .lut_mask = 64'h0000FF00F0F0AAAA;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y20_N1
-dffeas \soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE (
+// Location: FF_X25_Y23_N35
+dffeas \soc_inst|m0_1|u_logic|Yr13z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Yr13z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y15_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6twx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q6twx4~0_combout  = ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mcc3z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mcc3z4~q  & ( (\soc_inst|m0_1|u_logic|Vac3z4~q  & 
-// \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mcc3z4~q  & ( (\soc_inst|m0_1|u_logic|Vac3z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|M5tvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mcc3z4~q  & ( (\soc_inst|m0_1|u_logic|Vac3z4~q  & \soc_inst|m0_1|u_logic|Ts5wx4~0_combout ) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ts5wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|M5tvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mcc3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6twx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .lut_mask = 64'h030303030303FFFF;
-defparam \soc_inst|m0_1|u_logic|Q6twx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yr13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yr13z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6twx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Q6twx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Q6twx4~0_combout  & ( \soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S5b3z4~q  & ((!\soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q6twx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A5uvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|S5b3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|B2uvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Q6twx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|A5uvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6twx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y23_N2
+dffeas \soc_inst|m0_1|u_logic|H133z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .lut_mask = 64'hFFF00000AAA00000;
-defparam \soc_inst|m0_1|u_logic|Q6twx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H133z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H133z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X42_Y13_N8
-dffeas \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE (
+// Location: FF_X31_Y19_N17
+dffeas \soc_inst|m0_1|u_logic|Lq03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xsmvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Lq03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lq03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lq03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y13_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~0 (
+// Location: MLABCELL_X25_Y23_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rhfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( (!\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Qfa3z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|I7owx4~combout  & ( \soc_inst|m0_1|u_logic|G6owx4~combout  & ( !\soc_inst|m0_1|u_logic|Qfa3z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|I7owx4~combout  & ( !\soc_inst|m0_1|u_logic|G6owx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Uvzvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Lq03z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  
+// & ( \soc_inst|m0_1|u_logic|Lq03z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|U593z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yr13z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Lq03z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Lq03z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|U593z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yr13z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qfa3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|I7owx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G6owx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yr13z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|U593z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H133z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lq03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .lut_mask = 64'h0000CCCCFF00FFCC;
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .lut_mask = 64'h3535000F3535F0FF;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y15_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~1 (
+// Location: LABCELL_X19_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rhfwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Rhfwx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~21_combout  & (((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q6twx4~1_combout )))) # 
-// (\soc_inst|interconnect_1|HRDATA[1]~21_combout  & (!\soc_inst|m0_1|u_logic|B7owx4~combout  & ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Q6twx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Uvzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uvzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Uvzvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uvzvx4~1_combout 
+//  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Uvzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~q ) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q6twx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uvzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .lut_mask = 64'hEE0EEE0E00000000;
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .lut_mask = 64'hF000F0F0000000F0;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rhfwx4~2 (
+// Location: LABCELL_X19_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uvzvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rhfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Rhfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & (\soc_inst|m0_1|u_logic|Fkdwx4~1_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oldwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Jmdwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Uvzvx4~combout  = ( !\soc_inst|m0_1|u_logic|Qowwx4~combout  & ( !\soc_inst|m0_1|u_logic|Uvzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Mvm2z4~q )))) # (\soc_inst|m0_1|u_logic|C51xx4~0_combout  & (\soc_inst|m0_1|u_logic|Ytm2z4~q  & ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mvm2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oldwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fkdwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jmdwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rhfwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ytm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mvm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qowwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uvzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .lut_mask = 64'h00000000CEDFCEDF;
-defparam \soc_inst|m0_1|u_logic|Rhfwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uvzvx4 .lut_mask = 64'h8CAF000000000000;
+defparam \soc_inst|m0_1|u_logic|Uvzvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppzvx4~0 (
+// Location: MLABCELL_X28_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uz9wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|F8iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout  & \soc_inst|m0_1|u_logic|W6iwx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Uz9wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W7z2z4~q ) # ((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xwawx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y29wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppzvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uz9wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .lut_mask = 64'h0A0A0A0AFF0AFF0A;
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .lut_mask = 64'h00F000F0AAFAAAFA;
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppzvx4~1 (
+// Location: LABCELL_X19_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uz9wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ppzvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & (!\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|H9iwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & (((\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppzvx4~0_combout ),
+// \soc_inst|m0_1|u_logic|Uz9wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Uz9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Uz9wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|D1awx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|D1awx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uz9wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .lut_mask = 64'h0DDD0DDD00000000;
-defparam \soc_inst|m0_1|u_logic|Ppzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .lut_mask = 64'hC0F0CCFF00000000;
+defparam \soc_inst|m0_1|u_logic|Uz9wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~2 (
+// Location: LABCELL_X19_Y20_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qtzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oihvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & (\soc_inst|m0_1|u_logic|H4nwx4~combout  & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ppzvx4~1_combout  & ( \soc_inst|m0_1|u_logic|H4nwx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Qtzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & !\soc_inst|m0_1|u_logic|Wzawx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Uz9wx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & \soc_inst|m0_1|u_logic|Wzawx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzawx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uz9wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oihvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .lut_mask = 64'h3333333320202020;
-defparam \soc_inst|m0_1|u_logic|Oihvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y21_N19
-dffeas \soc_inst|m0_1|u_logic|Zpx2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zpx2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zpx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .lut_mask = 64'h00F000F0F000F000;
+defparam \soc_inst|m0_1|u_logic|Qtzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~1 (
+// Location: LABCELL_X19_Y19_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oszvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oihvx4~1_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( \soc_inst|m0_1|u_logic|Zpx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Add2~77_sumout  & ((!\soc_inst|m0_1|u_logic|Add5~57_sumout ) # ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout 
-// )))) # (\soc_inst|m0_1|u_logic|Add2~77_sumout  & (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~57_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|Zpx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Add5~57_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Zpx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Add2~77_sumout  
-// & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~57_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( !\soc_inst|m0_1|u_logic|Zpx2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~57_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Oszvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Uvzvx4~combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Shyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|X8zvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add2~77_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zpx2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qtzvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X8zvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uvzvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oihvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oszvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .lut_mask = 64'hF0C0A080FFCCAF8C;
-defparam \soc_inst|m0_1|u_logic|Oihvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .lut_mask = 64'hF0A0FFAA00000000;
+defparam \soc_inst|m0_1|u_logic|Oszvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oihvx4~0 (
+// Location: LABCELL_X31_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oszvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oihvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oihvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Oihvx4~2_combout ) # 
-// ((\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & \soc_inst|m0_1|u_logic|Ppzvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oihvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Oihvx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Oszvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zuzvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Luzvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Oszvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~37_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oihvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ppzvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oihvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oszvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zuzvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Luzvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .lut_mask = 64'h00000000AA00AB00;
-defparam \soc_inst|m0_1|u_logic|Oihvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .lut_mask = 64'h0000551100000000;
+defparam \soc_inst|m0_1|u_logic|Oszvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y21_N20
-dffeas \soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE (
+// Location: FF_X23_Y22_N35
+dffeas \soc_inst|m0_1|u_logic|R6v2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Oihvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|R6v2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R6v2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R6v2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rnovx4 (
+// Location: LABCELL_X23_Y22_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rnovx4~combout  = ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Add3~73_sumout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~73_sumout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Add5~57_sumout  & ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Add3~73_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~73_sumout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~57_sumout  & ( 
-// !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Add3~73_sumout )))) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// (\soc_inst|m0_1|u_logic|Nozvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (!\soc_inst|m0_1|u_logic|Add3~73_sumout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Svqwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|R6v2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & !\soc_inst|m0_1|u_logic|Wqm2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~73_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nozvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~57_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R6v2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wqm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rnovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Svqwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rnovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rnovx4 .lut_mask = 64'hA8FCA8FCA8FC0000;
-defparam \soc_inst|m0_1|u_logic|Rnovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .lut_mask = 64'h000000000C000808;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y15_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~5 (
+// Location: LABCELL_X22_Y22_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~5_combout  = ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( \soc_inst|m0_1|u_logic|Yuovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|S4qvx4~combout )) # (\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|Ekovx4~combout ))))) # (\soc_inst|m0_1|u_logic|Z6ovx4~combout  & (!\soc_inst|m0_1|u_logic|Xxovx4~combout )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( \soc_inst|m0_1|u_logic|Yuovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & (!\soc_inst|m0_1|u_logic|S4qvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|Ekovx4~combout ))))) # (\soc_inst|m0_1|u_logic|Z6ovx4~combout  & (!\soc_inst|m0_1|u_logic|Xxovx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Yuovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & (!\soc_inst|m0_1|u_logic|S4qvx4~combout )) # (\soc_inst|m0_1|u_logic|Xxovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ekovx4~combout ))))) # (\soc_inst|m0_1|u_logic|Z6ovx4~combout  & (!\soc_inst|m0_1|u_logic|Xxovx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( !\soc_inst|m0_1|u_logic|Yuovx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Z6ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & (!\soc_inst|m0_1|u_logic|S4qvx4~combout  & \soc_inst|m0_1|u_logic|Ekovx4~combout )) # (\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|Ekovx4~combout 
-// ))))) # (\soc_inst|m0_1|u_logic|Z6ovx4~combout  & (!\soc_inst|m0_1|u_logic|Xxovx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Svqwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ksm2z4~q  & ( \soc_inst|m0_1|u_logic|It63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ksm2z4~q  & ( !\soc_inst|m0_1|u_logic|It63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ksm2z4~q  & ( !\soc_inst|m0_1|u_logic|It63z4~q  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ksm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|It63z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Svqwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .lut_mask = 64'h66C4E6C4E6C4E6C4;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .lut_mask = 64'h4400040040000000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y15_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~3 (
+// Location: LABCELL_X22_Y22_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Yuovx4~combout  & ( \soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fvovx4~combout  & (\soc_inst|m0_1|u_logic|Owovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ekovx4~combout ) # (!\soc_inst|m0_1|u_logic|Z6ovx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yuovx4~combout  & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ekovx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # (\soc_inst|m0_1|u_logic|Fvovx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yuovx4~combout  & ( !\soc_inst|m0_1|u_logic|Rxzvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ekovx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ) # (\soc_inst|m0_1|u_logic|Fvovx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Svqwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ixt2z4~q  & ( \soc_inst|m0_1|u_logic|R283z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ixt2z4~q  & ( !\soc_inst|m0_1|u_logic|R283z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ixt2z4~q  & ( !\soc_inst|m0_1|u_logic|R283z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Rni2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ixt2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R283z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Svqwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .lut_mask = 64'hFFBBFFBB0C080000;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .lut_mask = 64'h0030001000200000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~1 (
+// Location: LABCELL_X22_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Vpovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hszvx4~combout  & (!\soc_inst|m0_1|u_logic|hsize_o~0_combout  & \soc_inst|m0_1|u_logic|haddr_o~3_combout )) ) )
+// \soc_inst|m0_1|u_logic|Svqwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G493z4~q  & ( \soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G493z4~q  & ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~q  & \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G493z4~q  & ( !\soc_inst|m0_1|u_logic|Ipm2z4~q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
+// \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|G493z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ipm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Svqwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .lut_mask = 64'h00A000A000000000;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .lut_mask = 64'h0003000200010000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~2 (
+// Location: LABCELL_X23_Y22_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Svqwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Fq0wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ql0wx4~combout  & (!\soc_inst|m0_1|u_logic|Ug0wx4~combout  & \soc_inst|m0_1|u_logic|Nlovx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Svqwx4~combout  = ( !\soc_inst|m0_1|u_logic|Svqwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Svqwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Svqwx4~0_combout  & !\soc_inst|m0_1|u_logic|Svqwx4~2_combout )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Svqwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Svqwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Svqwx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svqwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Svqwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .lut_mask = 64'h00C000C000000000;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Svqwx4 .lut_mask = 64'hC000C00000000000;
+defparam \soc_inst|m0_1|u_logic|Svqwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~4 (
+// Location: LABCELL_X24_Y22_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~4_combout  = ( \soc_inst|m0_1|u_logic|Y92wx4~combout  & ( \soc_inst|m0_1|u_logic|Nlovx4~2_combout  & ( (\soc_inst|m0_1|u_logic|haddr_o~5_combout  & \soc_inst|m0_1|u_logic|Nlovx4~3_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qp62z4~2_combout  = ( \soc_inst|m0_1|u_logic|Lq03z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rtz2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lq03z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Rtz2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|haddr_o~5_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y92wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rtz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Lq03z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qp62z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .lut_mask = 64'h0000000000000055;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .lut_mask = 64'h00000000A0800080;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~6 (
+// Location: FF_X19_Y22_N55
+dffeas \soc_inst|m0_1|u_logic|Zj53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Zj53z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zj53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zj53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zj53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X19_Y22_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~6_combout  = ( \soc_inst|m0_1|u_logic|Fc0wx4~combout  & ( \soc_inst|m0_1|u_logic|C70wx4~combout  & ( (\soc_inst|m0_1|u_logic|haddr_o~4_combout  & (!\soc_inst|m0_1|u_logic|Cqovx4~combout  & 
-// \soc_inst|m0_1|u_logic|Y1pvx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Qp62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Qa43z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Zj53z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cqovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y1pvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fc0wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C70wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qa43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zj53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qp62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .lut_mask = 64'h0000000000000404;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .lut_mask = 64'h000000000000AC00;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y15_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~8 (
+// Location: MLABCELL_X21_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nr62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Jxovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Owovx4~combout  & ((!\soc_inst|m0_1|u_logic|Fvovx4~combout  & ((!\soc_inst|m0_1|u_logic|Yuovx4~combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & !\soc_inst|m0_1|u_logic|Z6ovx4~combout )))) # (\soc_inst|m0_1|u_logic|Fvovx4~combout  & (((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & !\soc_inst|m0_1|u_logic|Z6ovx4~combout )))))) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Jxovx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Xxovx4~combout  & ((!\soc_inst|m0_1|u_logic|Owovx4~combout  & ((!\soc_inst|m0_1|u_logic|Z6ovx4~combout ))) # (\soc_inst|m0_1|u_logic|Owovx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|S4qvx4~combout  & \soc_inst|m0_1|u_logic|Z6ovx4~combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Nr62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ytm2z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Owovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S4qvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xxovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jxovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z6ovx4~combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ytm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nr62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .lut_mask = 64'hAA80AA0080805000;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Nr62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y15_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~0 (
+// Location: FF_X25_Y23_N1
+dffeas \soc_inst|m0_1|u_logic|H133z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Oszvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H133z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H133z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H133z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y23_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nhzvx4~combout  & ( (\soc_inst|m0_1|u_logic|Nlovx4~8_combout  & (!\soc_inst|m0_1|u_logic|Bv0wx4~combout  & \soc_inst|m0_1|u_logic|Vezvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Qp62z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Yr13z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|H133z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nlovx4~8_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vezvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nhzvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yr13z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H133z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qp62z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .lut_mask = 64'h0000000000500050;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .lut_mask = 64'h0000A0C000000000;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nlovx4~7 (
+// Location: LABCELL_X23_Y22_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp62z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nlovx4~7_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~6_combout  & ( \soc_inst|m0_1|u_logic|Nlovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rnovx4~combout  & (\soc_inst|m0_1|u_logic|Nlovx4~5_combout  & 
-// \soc_inst|m0_1|u_logic|Nlovx4~4_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Qp62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Nr62z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qp62z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qp62z4~2_combout  & (!\soc_inst|m0_1|u_logic|Qp62z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mvm2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rnovx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nlovx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nlovx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nlovx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qp62z4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mvm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qp62z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nr62z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qp62z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qp62z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .lut_mask = 64'h0000000000000005;
-defparam \soc_inst|m0_1|u_logic|Nlovx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .lut_mask = 64'hA200000000000000;
+defparam \soc_inst|m0_1|u_logic|Qp62z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jknvx4~0 (
+// Location: LABCELL_X23_Y22_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Euzvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ) # ((!\soc_inst|m0_1|u_logic|Yuovx4~combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout  & 
-// \soc_inst|m0_1|u_logic|Lz93z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|S6ovx4~3_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Lz93z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Euzvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Svqwx4~combout ) # (!\soc_inst|m0_1|u_logic|Qp62z4~3_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|U593z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Efp2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Efp2z4~q  ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U593z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qp62z4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Efp2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .lut_mask = 64'h00AA00AAFCFEFCFE;
-defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y16_N49
-dffeas \soc_inst|m0_1|u_logic|Lz93z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lz93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lz93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .lut_mask = 64'hFF00FF00CCCCFAFA;
+defparam \soc_inst|m0_1|u_logic|Euzvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N1uvx4 (
+// Location: LABCELL_X23_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hszvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N1uvx4~combout  = ( \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lz93z4~q  & (!\soc_inst|m0_1|u_logic|J6i2z4~q  & (\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Kop2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Hszvx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~37_sumout  & ( \soc_inst|m0_1|u_logic|Add3~53_sumout  & ( (((\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~37_sumout  & ( \soc_inst|m0_1|u_logic|Add3~53_sumout  & ( ((\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~37_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~53_sumout  & ( ((\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~37_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~53_sumout  & ( (\soc_inst|m0_1|u_logic|Euzvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kop2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Euzvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~37_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add3~53_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N1uvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N1uvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N1uvx4 .lut_mask = 64'h0000000004000400;
-defparam \soc_inst|m0_1|u_logic|N1uvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hszvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hszvx4 .lut_mask = 64'h050505FF373737FF;
+defparam \soc_inst|m0_1|u_logic|Hszvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y20_N28
-dffeas \soc_inst|m0_1|u_logic|Azs2z4 (
+// Location: FF_X23_Y17_N25
+dffeas \soc_inst|ram_1|saved_word_address[4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Azs2z4~q ),
+	.q(\soc_inst|ram_1|saved_word_address [4]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Azs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Azs2z4 .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[4] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[4] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y16_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~0 (
+// Location: MLABCELL_X25_Y17_N36
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[4]~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S9ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lz93z4~q  & ((\soc_inst|m0_1|u_logic|Ffs2z4~q ))) # (\soc_inst|m0_1|u_logic|Lz93z4~q  & 
-// (\soc_inst|m0_1|u_logic|Cps2z4~q  & !\soc_inst|m0_1|u_logic|Ffs2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|T2owx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffs2z4~q  & ((\soc_inst|m0_1|u_logic|P2a3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Lz93z4~q ))) ) ) )
+// \soc_inst|ram_1|memory.raddr_a[4]~4_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Hszvx4~combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// (\soc_inst|ram_1|saved_word_address [4])) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [4] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T2owx4~0_combout ),
+	.dataa(!\soc_inst|ram_1|saved_word_address [4]),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Hszvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S9ywx4~0_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[4]~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .lut_mask = 64'h0000000050F01A1A;
-defparam \soc_inst|m0_1|u_logic|S9ywx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .lut_mask = 64'h5555555511DD11DD;
+defparam \soc_inst|ram_1|memory.raddr_a[4]~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~1 (
+// Location: LABCELL_X31_Y16_N3
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[22]~31 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S9ywx4~1_combout  = ( !\soc_inst|m0_1|u_logic|S9ywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E0uvx4~combout  & ((!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qrp2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|E0uvx4~combout  & (!\soc_inst|m0_1|u_logic|Azs2z4~q  & ((!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qrp2z4~q )))) ) )
+// \soc_inst|ram_1|data_to_memory[22]~31_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|byte_select [2]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22  & (!\soc_inst|ram_1|byte_select [2] & \soc_inst|ram_1|write_cycle~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E0uvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|K3uvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Azs2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|byte_select [2]),
+	.datad(!\soc_inst|ram_1|write_cycle~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S9ywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S9ywx4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[22]~31_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .lut_mask = 64'hFAC8FAC800000000;
-defparam \soc_inst|m0_1|u_logic|S9ywx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[22]~31 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[22]~31 .lut_mask = 64'h00500050005F005F;
+defparam \soc_inst|ram_1|data_to_memory[22]~31 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S9ywx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|S9ywx4~2_combout  = ( \soc_inst|m0_1|u_logic|K7pwx4~combout  & ( \soc_inst|m0_1|u_logic|S9ywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H8l2z4~q  & ((!\soc_inst|m0_1|u_logic|Ywi2z4~q ) # (!\soc_inst|m0_1|u_logic|Wfuwx4~combout ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|K7pwx4~combout  & ( \soc_inst|m0_1|u_logic|S9ywx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q ) # (!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|K7pwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S9ywx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S9ywx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: M10K_X26_Y24_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[22]~31_combout ,\soc_inst|ram_1|data_to_memory[6]~32_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .lut_mask = 64'h00000000FCFCA8A8;
-defparam \soc_inst|m0_1|u_logic|S9ywx4~2 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_bit_number = 6;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_bit_number = 6;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000700618001F4047D9F6724472447244900003C12700003103008E488E488E48803482403FFFFFFFFFFFFC3A000551000000000000000001554";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Otxwx4~0 (
+// Location: MLABCELL_X34_Y22_N36
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[6]~32 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Otxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S9ywx4~2_combout  & ( (\soc_inst|m0_1|u_logic|N1uvx4~combout  & (\soc_inst|m0_1|u_logic|Bjd3z4~q  & \soc_inst|m0_1|u_logic|Lstwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S9ywx4~2_combout  & ( \soc_inst|m0_1|u_logic|Lstwx4~0_combout  ) )
+// \soc_inst|ram_1|data_to_memory[6]~32_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ) # (\soc_inst|ram_1|byte_select [0]))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (!\soc_inst|ram_1|byte_select [0] & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & \soc_inst|ram_1|write_cycle~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|N1uvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select [0]),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
+	.datac(!\soc_inst|ram_1|write_cycle~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S9ywx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Otxwx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[6]~32_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .lut_mask = 64'h00FF00FF00030003;
-defparam \soc_inst|m0_1|u_logic|Otxwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[6]~32 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[6]~32 .lut_mask = 64'h0202020207070707;
+defparam \soc_inst|ram_1|data_to_memory[6]~32 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N39
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[31]~2 (
+// Location: LABCELL_X31_Y15_N9
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[22]~35 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[31]~2_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31  & \soc_inst|interconnect_1|HRDATA[26]~0_combout ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout ) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ) ) )
+// \soc_inst|interconnect_1|HRDATA[22]~35_combout  = ( \soc_inst|switches_1|switch_store[1][6]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22  & ( \soc_inst|interconnect_1|HRDATA[16]~7_combout  ) ) ) # ( 
+// !\soc_inst|switches_1|switch_store[1][6]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22  & ( (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & !\soc_inst|interconnect_1|Equal1~0_combout ) ) ) ) # ( 
+// \soc_inst|switches_1|switch_store[1][6]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22  & ( (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & \soc_inst|interconnect_1|Equal1~0_combout ) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a31 ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|switches_1|switch_store[1][6]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[31]~2 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[31]~2 .lut_mask = 64'hFF0FFF0F000F000F;
-defparam \soc_inst|interconnect_1|HRDATA[31]~2 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[22]~35 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[22]~35 .lut_mask = 64'h0000050550505555;
+defparam \soc_inst|interconnect_1|HRDATA[22]~35 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Palwx4~0 (
+// Location: MLABCELL_X34_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Edovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Palwx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[31]~2_combout  & ( \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B7owx4~combout ) # (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[31]~2_combout  & ( \soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Otxwx4~0_combout  ) ) ) # ( \soc_inst|interconnect_1|HRDATA[31]~2_combout  & ( !\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( 
-// ((\soc_inst|m0_1|u_logic|B7owx4~combout ) # (\soc_inst|m0_1|u_logic|Lcowx4~0_combout )) # (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[31]~2_combout  & ( !\soc_inst|m0_1|u_logic|Hr7wx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Lcowx4~0_combout ) # (\soc_inst|m0_1|u_logic|Otxwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Edovx4~combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Xnrvx4~0_combout  & \soc_inst|m0_1|u_logic|B8c2z4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Nbm2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Otxwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lcowx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B7owx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hr7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Edovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Palwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Palwx4~0 .lut_mask = 64'h77777F7F55555F5F;
-defparam \soc_inst|m0_1|u_logic|Palwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Edovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Edovx4 .lut_mask = 64'hFFFFFFFF555D555D;
+defparam \soc_inst|m0_1|u_logic|Edovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtwwx4~0 (
+// Location: MLABCELL_X34_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~34 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|C3w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((((\soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Walwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) ) ) # ( 
-// \soc_inst|m0_1|u_logic|C3w2z4~q  & ( (((!\soc_inst|m0_1|u_logic|Wxp2z4~q  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Add1~34_cout  = CARRY(( (!\soc_inst|m0_1|u_logic|Nbm2z4~q ) # (!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ) ) + ( VCC ) + ( !VCC ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.combout(),
 	.sumout(),
-	.cout(),
+	.cout(\soc_inst|m0_1|u_logic|Add1~34_cout ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .lut_mask = 64'hBFFFFBFFBFFF73FF;
-defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~34 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~34 .lut_mask = 64'h000000000000FAFA;
+defparam \soc_inst|m0_1|u_logic|Add1~34 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~0 (
+// Location: MLABCELL_X34_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zluvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ) # ((!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ajmwx4~2_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add1~5_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~34_cout  ))
+// \soc_inst|m0_1|u_logic|Add1~6  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~34_cout  ))
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qkmwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ajmwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~34_cout ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zluvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~5_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~6 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .lut_mask = 64'hF000F000FCCCFCCC;
-defparam \soc_inst|m0_1|u_logic|Zluvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~5 .lut_mask = 64'h0000000000005050;
+defparam \soc_inst|m0_1|u_logic|Add1~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~1 (
+// Location: LABCELL_X35_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zluvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Jkmwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Ojmwx4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ykyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|C9rvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( (\soc_inst|m0_1|u_logic|F0y2z4~q  & (!\soc_inst|m0_1|u_logic|C9rvx4~0_combout  $ (((\soc_inst|m0_1|u_logic|U7w2z4~q  & !\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q 
+// ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( (\soc_inst|m0_1|u_logic|F0y2z4~q  & (!\soc_inst|m0_1|u_logic|C9rvx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jkmwx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ojmwx4~2_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zluvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9rvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .lut_mask = 64'hFAFAF0F0AAAA0000;
-defparam \soc_inst|m0_1|u_logic|Zluvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .lut_mask = 64'h0550055041504150;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zluvx4~2 (
+// Location: MLABCELL_X34_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zluvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Zluvx4~1_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zluvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zluvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Zluvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|C9rvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Nbm2z4~q  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE_q  $ (((!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nbm2z4~q  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dwl2z4~q  & ((!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|G2zwx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nbm2z4~q  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Nbm2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dwl2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zluvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zluvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9rvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .lut_mask = 64'hAA000000AF000000;
-defparam \soc_inst|m0_1|u_logic|Zluvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .lut_mask = 64'h5555333350553C33;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9mvx4~0 (
+// Location: MLABCELL_X34_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U9mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~q  & (((!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) # (\soc_inst|m0_1|u_logic|H1rvx4~0_combout 
-// ))) # (\soc_inst|m0_1|u_logic|Lbn2z4~q  & (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|C9rvx4~1_combout  = ( \soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C9rvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q  & (\soc_inst|m0_1|u_logic|C9rvx4~3_combout  & (!\soc_inst|m0_1|u_logic|Dwl2z4~q  $ 
+// (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|N4rvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C9rvx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Gtp2z4~q  & (\soc_inst|m0_1|u_logic|C9rvx4~3_combout  & 
+// (!\soc_inst|m0_1|u_logic|Dwl2z4~q  $ (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|C9rvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9rvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .lut_mask = 64'hCE0AFF3B0A0A3B3B;
-defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .lut_mask = 64'h0000000010012002;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y21_N25
-dffeas \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE (
+// Location: FF_X34_Y16_N50
+dffeas \soc_inst|m0_1|u_logic|Lbn2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -87728,645 +87635,701 @@ dffeas \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Lbn2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lbn2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lbn2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pguvx4~0 (
+// Location: MLABCELL_X34_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pguvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G0w2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|C9rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout  & \soc_inst|m0_1|u_logic|C9rvx4~1_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (\soc_inst|m0_1|u_logic|Nbm2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (((\soc_inst|m0_1|u_logic|X2rvx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|C9rvx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout  & (\soc_inst|m0_1|u_logic|Nbm2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C9rvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .lut_mask = 64'h0000800000000000;
-defparam \soc_inst|m0_1|u_logic|Pguvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .lut_mask = 64'h111D111D11D111D1;
+defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y1ivx4~0 (
+// Location: MLABCELL_X34_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ranvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y1ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hub3z4~q  & (!\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Hub3z4~q  & ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( \soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hub3z4~q  & (!\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Hub3z4~q  & ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Hub3z4~q  & (\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Yz4wx4~combout  & ( !\soc_inst|m0_1|u_logic|D9ovx4~combout  & ( (\soc_inst|m0_1|u_logic|Hub3z4~q  & ((!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ranvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I3y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~5_sumout  & ((!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|m0_1|u_logic|Add1~5_sumout  & 
+// ((!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I3y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[6]~36_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Yz4wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add1~5_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ranvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .lut_mask = 64'h55440504F5C4F5C4;
-defparam \soc_inst|m0_1|u_logic|Y1ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .lut_mask = 64'h3322FFAA3020F0A0;
+defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y17_N49
-dffeas \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE (
+// Location: FF_X34_Y16_N25
+dffeas \soc_inst|m0_1|u_logic|I3y2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ranvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|I3y2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I3y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I3y2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~0 (
+// Location: LABCELL_X31_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aphvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I90xx4~0_combout  = ( !\soc_inst|m0_1|u_logic|D0wwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Aphvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[22]~35_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[22]~35_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D0wwx4~1_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aphvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I90xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I90xx4~0 .lut_mask = 64'hFFF0FFF000000000;
-defparam \soc_inst|m0_1|u_logic|I90xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I90xx4~2 (
+// Location: FF_X31_Y15_N19
+dffeas \soc_inst|m0_1|u_logic|Enw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Aphvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Enw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Enw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Enw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I90xx4~2_combout  = ( \soc_inst|m0_1|u_logic|I90xx4~1_combout  & ( \soc_inst|m0_1|u_logic|I90xx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|J6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Enw2z4~q  & ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( !\soc_inst|m0_1|u_logic|I3y2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Enw2z4~q  & ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|I3y2z4~q ) # (\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Enw2z4~q  & ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|I90xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I90xx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Enw2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J6nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I90xx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I90xx4~2 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|I90xx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .lut_mask = 64'h0F0F0000CFCFCCCC;
+defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R4zwx4~0 (
+// Location: LABCELL_X30_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R4zwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) # (\soc_inst|m0_1|u_logic|I90xx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~2_combout  & \soc_inst|m0_1|u_logic|Kbzwx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & !\soc_inst|m0_1|u_logic|Adzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout )) # (\soc_inst|m0_1|u_logic|I90xx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Czzwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvzwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I90xx4~2_combout  & (\soc_inst|m0_1|u_logic|Kbzwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Adzwx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|J6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|interconnect_1|HRDATA[6]~36_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # ((\soc_inst|interconnect_1|HRDATA[6]~36_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I90xx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kbzwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdzwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Adzwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Czzwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wvzwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J6nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .lut_mask = 64'h00207F7722227777;
-defparam \soc_inst|m0_1|u_logic|R4zwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
+defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6pwx4~0 (
+// Location: LABCELL_X30_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I6pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H6zwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A6zwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|H6zwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vzywx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|J6nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|J6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J6nvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[22]~35_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R4zwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vzywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H6zwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A6zwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J6nvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|J6nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .lut_mask = 64'hBF000B00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|I6pwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .lut_mask = 64'hFC00FC0000000000;
+defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~1 (
+// Location: FF_X30_Y16_N4
+dffeas \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cjuwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & !\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Cjuwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ) # (\soc_inst|m0_1|u_logic|U5pwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Kxkwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|I2t2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( 
+// ((\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|I2t2z4~q )) # (\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jjuwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Cjuwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzqvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .lut_mask = 64'hFF0FFF0FF000F000;
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .lut_mask = 64'h7373737350505050;
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~2 (
+// Location: MLABCELL_X28_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tykwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzqvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pazwx4~combout  & ( (\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & !\soc_inst|m0_1|u_logic|Viuwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pazwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & (!\soc_inst|m0_1|u_logic|Arzwx4~1_combout )) # (\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Viuwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Tykwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|K9z2z4~q  & ( (\soc_inst|m0_1|u_logic|C3z2z4~q  & \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|K9z2z4~q  & ( \soc_inst|m0_1|u_logic|C3z2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|K9z2z4~q  & ( (\soc_inst|m0_1|u_logic|C3z2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|K9z2z4~q  & ( \soc_inst|m0_1|u_logic|C3z2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Arzwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Viuwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pazwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tykwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .lut_mask = 64'hF5A0F5A055005500;
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .lut_mask = 64'h5555040455550505;
+defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzqvx4~0 (
+// Location: MLABCELL_X28_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tykwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kzqvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kzqvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout  & !\soc_inst|m0_1|u_logic|C0zwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kzqvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|C0zwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Tykwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tykwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I2t2z4~q  & (!\soc_inst|m0_1|u_logic|Auk2z4~q  & \soc_inst|m0_1|u_logic|C9yvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Tykwx4~0_combout  & 
+// ( (\soc_inst|m0_1|u_logic|I2t2z4~q  & (\soc_inst|m0_1|u_logic|C9yvx4~combout  & ((!\soc_inst|m0_1|u_logic|Auk2z4~q ) # (\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kzqvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kzqvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tykwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tykwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .lut_mask = 64'h3200000010000000;
-defparam \soc_inst|m0_1|u_logic|Kzqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .lut_mask = 64'h0045004500440044;
+defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~4 (
+// Location: LABCELL_X37_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C9rvx4~4_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & (\soc_inst|m0_1|u_logic|Dwl2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( \soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & (!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & (\soc_inst|m0_1|u_logic|Dwl2z4~q 
-// ))) # (\soc_inst|m0_1|u_logic|Nbm2z4~q  & (!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Owq2z4~q ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & (\soc_inst|m0_1|u_logic|Dwl2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G2zwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|X2rvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & (\soc_inst|m0_1|u_logic|Dwl2z4~q )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((\soc_inst|m0_1|u_logic|Owq2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kxkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~q ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Jky2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jky2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9rvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .lut_mask = 64'h0A5F0A5F194C0A5F;
-defparam \soc_inst|m0_1|u_logic|C9rvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .lut_mask = 64'h0000AAAAACACAEAE;
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~0 (
+// Location: LABCELL_X22_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C9rvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kyi2z4~q  & ( \soc_inst|m0_1|u_logic|Nbm2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Kxkwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Kxkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kxkwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Tykwx4~1_combout  & \soc_inst|m0_1|u_logic|G2lwx4~combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Kxkwx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tykwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kxkwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|C9rvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .lut_mask = 64'h00A000A000000000;
+defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~3 (
+// Location: FF_X22_Y20_N34
+dffeas \soc_inst|m0_1|u_logic|Svk2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Svk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Svk2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sd1xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C9rvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( (\soc_inst|m0_1|u_logic|F0y2z4~q  & (!\soc_inst|m0_1|u_logic|C9rvx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Ywi2z4~q  & \soc_inst|m0_1|u_logic|U7w2z4~q ))))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kkrvx4~5_combout  & ( (\soc_inst|m0_1|u_logic|F0y2z4~q  & (!\soc_inst|m0_1|u_logic|Ywi2z4~q  $ (!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kkrvx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9rvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .lut_mask = 64'h050A050A0D020D02;
-defparam \soc_inst|m0_1|u_logic|C9rvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .lut_mask = 64'h0000000003000300;
+defparam \soc_inst|m0_1|u_logic|Sd1xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|C9rvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dwl2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & (\soc_inst|m0_1|u_logic|C9rvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Gtp2z4~q  $ 
-// (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dwl2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & (\soc_inst|m0_1|u_logic|C9rvx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Gtp2z4~q  $ (!\soc_inst|m0_1|u_logic|N4rvx4~0_combout )))) ) ) )
+// Location: FF_X22_Y13_N1
+dffeas \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|N4rvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C9rvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~3_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9rvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y23_N22
+dffeas \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ec43z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .lut_mask = 64'h0000000000280014;
-defparam \soc_inst|m0_1|u_logic|C9rvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y16_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C9rvx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|C9rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nbm2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Nbm2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C9rvx4~1_combout  & !\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q 
-//  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|C9rvx4~1_combout  & \soc_inst|m0_1|u_logic|X2rvx4~2_combout ) ) ) )
+// Location: FF_X23_Y19_N38
+dffeas \soc_inst|m0_1|u_logic|Mt13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mt13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mt13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mt13z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y22_N49
+dffeas \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .lut_mask = 64'h000F0F0055555555;
-defparam \soc_inst|m0_1|u_logic|C9rvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Edovx4 (
+// Location: LABCELL_X23_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Edovx4~combout  = ( \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nbm2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( 
-// ((\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & \soc_inst|m0_1|u_logic|Xnrvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nbm2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  
-// & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Eo5wx4~5_combout  = ( \soc_inst|m0_1|u_logic|V233z4~q  & ( \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Efp2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Mt13z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V233z4~q  & ( \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Efp2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Mt13z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (((\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|V233z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Efp2z4~q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Mt13z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|V233z4~q  & ( !\soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Efp2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|Mt13z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mt13z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Efp2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|V233z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Edovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Edovx4 .lut_mask = 64'hFFFFFFFF37373333;
-defparam \soc_inst|m0_1|u_logic|Edovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .lut_mask = 64'hCFAFCFA0C0AFC0A0;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~34 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~34_cout  = CARRY(( (!\soc_inst|m0_1|u_logic|Nbm2z4~q ) # (!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ) ) + ( VCC ) + ( !VCC ))
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(),
-	.sumout(),
-	.cout(\soc_inst|m0_1|u_logic|Add1~34_cout ),
-	.shareout());
+// Location: FF_X24_Y22_N37
+dffeas \soc_inst|m0_1|u_logic|Fvz2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fvz2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~34 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~34 .lut_mask = 64'h000000000000FCFC;
-defparam \soc_inst|m0_1|u_logic|Add1~34 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fvz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fvz2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~5 (
+// Location: MLABCELL_X21_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~5_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~34_cout  ))
-// \soc_inst|m0_1|u_logic|Add1~6  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~34_cout  ))
+// \soc_inst|m0_1|u_logic|Eo5wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Fvz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|M1j2z4~q  & !\soc_inst|m0_1|u_logic|Wmp2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fvz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|M1j2z4~q  & !\soc_inst|m0_1|u_logic|Wmp2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wmp2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fvz2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~34_cout ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~5_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~6 ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~5 .lut_mask = 64'h0000000000003030;
-defparam \soc_inst|m0_1|u_logic|Add1~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .lut_mask = 64'hDA5ADA5AD050D050;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ranvx4~0 (
+// Location: LABCELL_X23_Y19_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ranvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I3y2z4~q  & ( \soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~5_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3y2z4~q  & ( \soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~5_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I3y2z4~q  & ( !\soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~5_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I3y2z4~q  & ( !\soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~5_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Eo5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Eo5wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Eo5wx4~5_combout 
+// ))) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( \soc_inst|m0_1|u_logic|Eo5wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Eo5wx4~5_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~q  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
+// (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Eo5wx4~5_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add1~5_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Eo5wx4~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ranvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .lut_mask = 64'h3232FAFA3200FA00;
-defparam \soc_inst|m0_1|u_logic|Ranvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .lut_mask = 64'h0088008822AA20A8;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y16_N25
-dffeas \soc_inst|m0_1|u_logic|I3y2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ranvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I3y2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X27_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Eo5wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & (((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & (\soc_inst|m0_1|u_logic|Nl53z4~q  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nl53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I3y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I3y2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .lut_mask = 64'hBB0B000000000000;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~9 (
+// Location: MLABCELL_X39_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[5] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~9_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|W4y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~6  ))
-// \soc_inst|m0_1|u_logic|Add1~10  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|W4y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~6  ))
+// \soc_inst|m0_1|u_logic|hwdata_o [5] = ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Eo5wx4~2_combout  ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
-	.datae(gnd),
-	.dataf(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~6 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~9_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~10 ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o [5]),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~9 .lut_mask = 64'h0000000000003300;
-defparam \soc_inst|m0_1|u_logic|Add1~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .lut_mask = 64'hFFFF0000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[5] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kanvx4~0 (
+// Location: MLABCELL_X39_Y18_N3
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[5]~23 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kanvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~11_combout  & ((!\soc_inst|m0_1|u_logic|Add1~9_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~11_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add1~9_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W4y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~9_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~9_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
+// \soc_inst|ram_1|data_to_memory[5]~23_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (\soc_inst|ram_1|write_cycle~q  & !\soc_inst|ram_1|byte_select [0]) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [5] & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (\soc_inst|ram_1|write_cycle~q  & \soc_inst|ram_1|byte_select [0]) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add1~9_sumout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|byte_select [0]),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o [5]),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[5]~23_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .lut_mask = 64'h00FAFAFA00C8C8C8;
-defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y16_N43
-dffeas \soc_inst|m0_1|u_logic|W4y2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|W4y2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|W4y2z4 .power_up = "low";
+defparam \soc_inst|ram_1|data_to_memory[5]~23 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[5]~23 .lut_mask = 64'h0505000055555050;
+defparam \soc_inst|ram_1|data_to_memory[5]~23 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~21 (
+// Location: LABCELL_X33_Y20_N33
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[5]~28 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~21_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|K6y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~10  ))
-// \soc_inst|m0_1|u_logic|Add1~22  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|K6y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~10  ))
+// \soc_inst|interconnect_1|HRDATA[5]~28_combout  = ( \soc_inst|interconnect_1|HRDATA[6]~10_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout ) # 
+// (\soc_inst|switches_1|switch_store[0][5]~q ) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) ) # ( 
+// \soc_inst|interconnect_1|HRDATA[6]~10_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (\soc_inst|switches_1|switch_store[0][5]~q  & \soc_inst|interconnect_1|Equal1~0_combout ) ) ) ) # ( 
+// !\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(!\soc_inst|switches_1|switch_store[0][5]~q ),
+	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datae(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~10 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~21_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~22 ),
+	.combout(\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~21 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~21 .lut_mask = 64'h0000000000003030;
-defparam \soc_inst|m0_1|u_logic|Add1~21 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[5]~28 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[5]~28 .lut_mask = 64'hAAAA0303AAAAF3F3;
+defparam \soc_inst|interconnect_1|HRDATA[5]~28 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Danvx4~0 (
+// Location: MLABCELL_X34_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yanvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Danvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K6y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~21_sumout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[8]~33_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K6y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|m0_1|u_logic|Add1~21_sumout  & 
-// ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[8]~33_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|K6y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[8]~33_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K6y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[8]~33_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Yanvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[5]~28_combout  & ((!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|F0y2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|F0y2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add1~21_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yanvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Danvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Danvx4~0 .lut_mask = 64'h0E0EEEEE0E00EE00;
-defparam \soc_inst|m0_1|u_logic|Danvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .lut_mask = 64'hCCFFCCFFC0F0C0F0;
+defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y16_N10
-dffeas \soc_inst|m0_1|u_logic|K6y2z4 (
+// Location: FF_X34_Y15_N40
+dffeas \soc_inst|m0_1|u_logic|F0y2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Yanvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -88375,161 +88338,119 @@ dffeas \soc_inst|m0_1|u_logic|K6y2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|F0y2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K6y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|K6y2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|F0y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F0y2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~25 (
+// Location: LABCELL_X36_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~25_sumout  = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~22  ))
-// \soc_inst|m0_1|u_logic|Add1~26  = CARRY(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~22  ))
+// \soc_inst|m0_1|u_logic|Gvrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~22 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~25_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~26 ),
+	.combout(\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~25 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~25 .lut_mask = 64'h0000CCFF0000FFFF;
-defparam \soc_inst|m0_1|u_logic|Add1~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .lut_mask = 64'h0202AAAAAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W9nvx4~0 (
+// Location: LABCELL_X35_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ctrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y7y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[9]~16_combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~25_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|interconnect_1|HRDATA[9]~16_combout  & 
-// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~25_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y7y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~25_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~25_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ctrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|F0y2z4~q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|F0y2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add1~25_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W9nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ctrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .lut_mask = 64'h3322FFAA3020F0A0;
-defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y16_N1
-dffeas \soc_inst|m0_1|u_logic|Y7y2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|W9nvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y7y2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y7y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y7y2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .lut_mask = 64'hF0F0F4F400004444;
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~29 (
+// Location: LABCELL_X35_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ctrwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~29_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE_q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~26  ))
-// \soc_inst|m0_1|u_logic|Add1~30  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE_q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~26  ))
+// \soc_inst|m0_1|u_logic|Ctrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Surwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dsqvx4~combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Surwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout  & (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dsqvx4~combout ) # (\soc_inst|m0_1|u_logic|Dvy2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~26 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~29_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~30 ),
+	.combout(\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~29 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~29 .lut_mask = 64'h0000000000003300;
-defparam \soc_inst|m0_1|u_logic|Add1~29 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y16_N20
-dffeas \soc_inst|m0_1|u_logic|M9y2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M9y2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M9y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M9y2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .lut_mask = 64'h00A200A2A2A2A2A2;
+defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P9nvx4~0 (
+// Location: MLABCELL_X25_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kghvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M9y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[10]~12_combout  & ((!\soc_inst|m0_1|u_logic|Add1~29_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[10]~12_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add1~29_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|M9y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~29_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~29_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Kghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ctrwx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ((\soc_inst|m0_1|u_logic|Cllwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Qtrwx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|I6z2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ctrwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & \soc_inst|m0_1|u_logic|I6z2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add1~29_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .lut_mask = 64'h00EEEEEE00E0E0E0;
-defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .lut_mask = 64'h00AA00AA15FF15FF;
+defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y16_N19
-dffeas \soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE (
+// Location: FF_X25_Y13_N40
+dffeas \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -88538,936 +88459,893 @@ dffeas \soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~13 (
+// Location: MLABCELL_X28_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tecwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~13_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Bby2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~30  ))
-// \soc_inst|m0_1|u_logic|Add1~14  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Bby2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~30  ))
+// \soc_inst|m0_1|u_logic|Tecwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~30 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~13_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~14 ),
+	.combout(\soc_inst|m0_1|u_logic|Tecwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~13 .lut_mask = 64'h0000000000003030;
-defparam \soc_inst|m0_1|u_logic|Add1~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .lut_mask = 64'h0000000004000000;
+defparam \soc_inst|m0_1|u_logic|Tecwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I9nvx4~0 (
+// Location: LABCELL_X27_Y16_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Afcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bby2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~24_combout  & ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bby2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|interconnect_1|HRDATA[11]~24_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bby2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bby2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Add1~13_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Afcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Z4bwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|I4dwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Z4bwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Add1~13_sumout ),
-	.datab(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z4bwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I4dwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z4bwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I9nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Afcwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .lut_mask = 64'h3322FFAA3020F0A0;
-defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y16_N25
-dffeas \soc_inst|m0_1|u_logic|Bby2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|I9nvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bby2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bby2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bby2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .lut_mask = 64'hA0A000A0A0A0A0A0;
+defparam \soc_inst|m0_1|u_logic|Afcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~1 (
+// Location: LABCELL_X27_Y19_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ydcwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~1_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Qcy2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~14  ))
-// \soc_inst|m0_1|u_logic|Add1~2  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Qcy2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~14  ))
+// \soc_inst|m0_1|u_logic|Ydcwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Afcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tecwx4~0_combout  & (\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Afcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tecwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ) # (\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tecwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xwawx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Afcwx4~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~14 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~1_sumout ),
-	.cout(\soc_inst|m0_1|u_logic|Add1~2 ),
+	.combout(\soc_inst|m0_1|u_logic|Ydcwx4~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~1 .lut_mask = 64'h0000000000003030;
-defparam \soc_inst|m0_1|u_logic|Add1~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .lut_mask = 64'hC4C400C400000000;
+defparam \soc_inst|m0_1|u_logic|Ydcwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y16_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B9nvx4~0 (
+// Location: LABCELL_X23_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rxzvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qcy2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[12]~22_combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~1_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[12]~22_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~1_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qcy2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~1_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Add1~1_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rxzvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~33_sumout  & ( \soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~109_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~33_sumout  & ( \soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~109_sumout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~33_sumout  & ( !\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~109_sumout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~33_sumout  & ( !\soc_inst|m0_1|u_logic|Mpnvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~109_sumout ) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add1~1_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~109_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~33_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mpnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B9nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .lut_mask = 64'h0F0CFFCC0A08AA88;
-defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rxzvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rxzvx4 .lut_mask = 64'h005533770F5F3F7F;
+defparam \soc_inst|m0_1|u_logic|Rxzvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y16_N4
-dffeas \soc_inst|m0_1|u_logic|Qcy2z4 (
+// Location: FF_X23_Y19_N1
+dffeas \soc_inst|ram_1|saved_word_address[3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|B9nvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.q(\soc_inst|ram_1|saved_word_address [3]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qcy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qcy2z4 .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[3] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~17 (
+// Location: LABCELL_X23_Y19_N54
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[3]~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Add1~17_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Bdm2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~2  ))
+// \soc_inst|ram_1|memory.raddr_a[3]~3_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Rxzvx4~combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// (\soc_inst|ram_1|saved_word_address [3])) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [3] ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|ram_1|saved_word_address [3]),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rxzvx4~combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|m0_1|u_logic|Add1~2 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|m0_1|u_logic|Add1~17_sumout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[3]~3_combout ),
+	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Add1~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Add1~17 .lut_mask = 64'h0000000000003030;
-defparam \soc_inst|m0_1|u_logic|Add1~17 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .lut_mask = 64'h5555555505F505F5;
+defparam \soc_inst|ram_1|memory.raddr_a[3]~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U8nvx4~0 (
+// Location: LABCELL_X36_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~12 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bdm2z4~q  & ( \soc_inst|m0_1|u_logic|Add1~17_sumout  & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[13]~27_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdm2z4~q  & ( \soc_inst|m0_1|u_logic|Add1~17_sumout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[13]~27_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bdm2z4~q  & ( !\soc_inst|m0_1|u_logic|Add1~17_sumout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[13]~27_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdm2z4~q  & ( !\soc_inst|m0_1|u_logic|Add1~17_sumout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[13]~27_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o~12_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout  & 
+// \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~combout  & \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Hc1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Rtpvx4~combout  & \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add1~17_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rtpvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eo5wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hc1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .lut_mask = 64'h3322FFAA3020F0A0;
-defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y16_N37
-dffeas \soc_inst|m0_1|u_logic|Bdm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bdm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bdm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bdm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .lut_mask = 64'h00AA00FC00AA0030;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oylwx4~0 (
+// Location: LABCELL_X27_Y17_N36
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[29]~22 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oylwx4~0_combout  = ( \soc_inst|m0_1|u_logic|K6y2z4~q  & ( (\soc_inst|m0_1|u_logic|Bdm2z4~q  & (\soc_inst|m0_1|u_logic|I3y2z4~q  & \soc_inst|m0_1|u_logic|W4y2z4~q )) ) )
+// \soc_inst|ram_1|data_to_memory[29]~22_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|byte_select [3]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ( (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & !\soc_inst|ram_1|byte_select [3])) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
+	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+	.datac(!\soc_inst|ram_1|byte_select [3]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oylwx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[29]~22_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .lut_mask = 64'h0000000001010101;
-defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[29]~22 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[29]~22 .lut_mask = 64'h1010101015151515;
+defparam \soc_inst|ram_1|data_to_memory[29]~22 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y21_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[29]~22_combout ,\soc_inst|ram_1|data_to_memory[13]~21_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_bit_number = 13;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_bit_number = 13;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010465A249450851144000000000000B555703C1488390A24B8000000000000010A1000555555555555541C313000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oylwx4~1 (
+// Location: LABCELL_X31_Y22_N45
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[13]~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oylwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qcy2z4~q  & ( \soc_inst|m0_1|u_logic|Oylwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Y7y2z4~q ) # (!\soc_inst|m0_1|u_logic|Bby2z4~q )) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q  & ( \soc_inst|m0_1|u_logic|Oylwx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Qcy2z4~q  & ( !\soc_inst|m0_1|u_logic|Oylwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Oylwx4~0_combout  ) )
+// \soc_inst|ram_1|data_to_memory[13]~21_combout  = ( !\soc_inst|ram_1|byte_select [1] & ( \soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout 
+// ) ) ) ) # ( \soc_inst|ram_1|byte_select [1] & ( !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) ) # ( !\soc_inst|ram_1|byte_select [1] & ( !\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout  & ( 
+// (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+	.dataa(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oylwx4~0_combout ),
+	.datae(!\soc_inst|ram_1|byte_select [1]),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[13]~11_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[13]~21_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .lut_mask = 64'hFFFFFFFFFFFFFEFE;
-defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[13]~21 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[13]~21 .lut_mask = 64'h0505555505050000;
+defparam \soc_inst|ram_1|data_to_memory[13]~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|By4wx4 (
+// Location: LABCELL_X30_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|By4wx4~combout  = (\soc_inst|m0_1|u_logic|Nbm2z4~q  & \soc_inst|m0_1|u_logic|Oylwx4~1_combout )
+// \soc_inst|m0_1|u_logic|Ajnvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Vapvx4~combout  ) ) ) # ( \soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[13]~27_combout  & ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Qem2z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
+	.datae(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|By4wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|By4wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|By4wx4 .lut_mask = 64'h0303030303030303;
-defparam \soc_inst|m0_1|u_logic|By4wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .lut_mask = 64'hAAAABBBB00003333;
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y17_N34
-dffeas \soc_inst|m0_1|u_logic|Y6t2z4 (
+// Location: FF_X35_Y14_N53
+dffeas \soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|By4wx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y6t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Y6t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ptgwx4~0 (
+// Location: MLABCELL_X34_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ptgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Add1~1_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Qcy2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~14  ))
+// \soc_inst|m0_1|u_logic|Add1~2  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Qcy2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~14  ))
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~1_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~2 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~1 .lut_mask = 64'h0000000000005500;
+defparam \soc_inst|m0_1|u_logic|Add1~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V76wx4~0 (
+// Location: MLABCELL_X34_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V76wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Add1~17_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE_q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~2  ))
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V76wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V76wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V76wx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|V76wx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V76wx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|V76wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( !\soc_inst|m0_1|u_logic|V76wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y6t2z4~q  & (!\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|M66wx4~combout )))) # (\soc_inst|m0_1|u_logic|Y6t2z4~q  & (((!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|M66wx4~combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( !\soc_inst|m0_1|u_logic|V76wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|M66wx4~combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|V76wx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~2 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~17_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V76wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V76wx4~1 .lut_mask = 64'hFFF0DDD000000000;
-defparam \soc_inst|m0_1|u_logic|V76wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~17 .lut_mask = 64'h0000000000005050;
+defparam \soc_inst|m0_1|u_logic|Add1~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wdqvx4~0 (
+// Location: LABCELL_X35_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U8nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \soc_inst|m0_1|u_logic|U8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bdm2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~17_sumout  & ((!\soc_inst|interconnect_1|HRDATA[13]~27_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdm2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~17_sumout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|interconnect_1|HRDATA[13]~27_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bdm2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|interconnect_1|HRDATA[13]~27_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bdm2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[13]~27_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add1~17_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .lut_mask = 64'h3330FFF02220AAA0;
+defparam \soc_inst|m0_1|u_logic|U8nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D56wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|D56wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Jppvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D56wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X35_Y14_N52
+dffeas \soc_inst|m0_1|u_logic|Bdm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|U8nvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D56wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D56wx4~0 .lut_mask = 64'h02CE02CE00CC00CC;
-defparam \soc_inst|m0_1|u_logic|D56wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bdm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bdm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~2 (
+// Location: LABCELL_X31_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dnhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G27wx4~2_combout  = (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )
+// \soc_inst|m0_1|u_logic|Dnhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ) # (!\soc_inst|interconnect_1|HRDATA[26]~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dnhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G27wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G27wx4~2 .lut_mask = 64'h000F000F000F000F;
-defparam \soc_inst|m0_1|u_logic|G27wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .lut_mask = 64'hFFFFFFFFFFF0FFF0;
+defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|P0hwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y14_N31
+dffeas \soc_inst|m0_1|u_logic|Byw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Dnhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Byw2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .lut_mask = 64'h00000F0F00000000;
-defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Byw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Byw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Px5wx4 (
+// Location: LABCELL_X31_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Px5wx4~combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Ajnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Byw2z4~q  & ( (\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Bdm2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Byw2z4~q  & ( ((\soc_inst|m0_1|u_logic|Wfovx4~combout  & 
+// !\soc_inst|m0_1|u_logic|Bdm2z4~q )) # (\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Byw2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Px5wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Px5wx4 .lut_mask = 64'hFFFFFFFFFFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|Px5wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .lut_mask = 64'h50FF50FF50505050;
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uw5wx4~0 (
+// Location: LABCELL_X31_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uw5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Px5wx4~combout  & ( (\soc_inst|m0_1|u_logic|G27wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  $ (((\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))))) ) )
+// \soc_inst|m0_1|u_logic|Ajnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ajnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ajnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # ((!\soc_inst|interconnect_1|HRDATA[26]~0_combout ) # 
+// (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+	.datad(!\soc_inst|m0_1|u_logic|Ajnvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ajnvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uw5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .lut_mask = 64'h0B040B0400000000;
-defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .lut_mask = 64'hFE00FE0000000000;
+defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mz5wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mz5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Socwx4~0_combout ) ) )
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mz5wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y14_N49
+dffeas \soc_inst|m0_1|u_logic|Qem2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ajnvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qem2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qem2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~0 (
+// Location: LABCELL_X31_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mz5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Uw5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jp3wx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Uw5wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mz5wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .lut_mask = 64'h8880888000000000;
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Ahwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~1 (
+// Location: LABCELL_X36_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohwvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu5wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) # ((!\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|V1yvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ohwvx4~combout  = ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C2yvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .lut_mask = 64'hFEFCFEFC00000000;
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ohwvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ohwvx4 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|Ohwvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~2 (
+// Location: LABCELL_X31_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oowvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xu5wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout  & (\soc_inst|m0_1|u_logic|Xu5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|D56wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Oowvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|D56wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xu5wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .lut_mask = 64'h0000000000540054;
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Oowvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dj6wx4~0 (
+// Location: MLABCELL_X34_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Ejwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .lut_mask = 64'h0F000F00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Ejwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vskwx4~0 (
+// Location: LABCELL_X35_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Blwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vskwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ohwvx4~combout  & !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Blwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .lut_mask = 64'h3030303000000000;
-defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .lut_mask = 64'hFFFF000000000000;
+defparam \soc_inst|m0_1|u_logic|Blwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H06wx4~0 (
+// Location: MLABCELL_X34_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H06wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & (\soc_inst|m0_1|u_logic|Vskwx4~0_combout  & \soc_inst|m0_1|u_logic|Bsy2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|R8wvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & (((\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout 
+// )))) # (\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R8wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H06wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H06wx4~0 .lut_mask = 64'h0003000300000000;
-defparam \soc_inst|m0_1|u_logic|H06wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .lut_mask = 64'h10100000101A0000;
+defparam \soc_inst|m0_1|u_logic|R8wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~3 (
+// Location: MLABCELL_X34_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R8wvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xu5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|H06wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|Xu5wx4~2_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H06wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu5wx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|R8wvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|R8wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xu5wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .lut_mask = 64'h00FF00FF00300030;
-defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xu5wx4~combout  = ( !\soc_inst|m0_1|u_logic|W46wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu5wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|G36wx4~0_combout )) ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G36wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|W46wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R8wvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xu5wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xu5wx4 .lut_mask = 64'h00000000FCFF0000;
-defparam \soc_inst|m0_1|u_logic|Xu5wx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y23_N56
-dffeas \soc_inst|m0_1|u_logic|Wai2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wai2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wai2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .lut_mask = 64'hC888C88800000000;
+defparam \soc_inst|m0_1|u_logic|R8wvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tzxwx4~0 (
+// Location: MLABCELL_X34_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tzxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Zcn2z4~q )) # (\soc_inst|m0_1|u_logic|Q1ywx4~combout ))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Wkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Wai2z4~q  & !\soc_inst|m0_1|u_logic|Zcn2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|K8wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Q1ywx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K8wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .lut_mask = 64'h4040404040CC40CC;
-defparam \soc_inst|m0_1|u_logic|Tzxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .lut_mask = 64'h0000000011001100;
+defparam \soc_inst|m0_1|u_logic|K8wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vy7wx4~0 (
+// Location: MLABCELL_X34_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  $ (\soc_inst|m0_1|u_logic|Svxwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Svxwx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Tzxwx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  $ (\soc_inst|m0_1|u_logic|Svxwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  $ (\soc_inst|m0_1|u_logic|Svxwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vhwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (((\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Dvy2z4~q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Svxwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vhwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .lut_mask = 64'hCC33CC33FC03CC33;
-defparam \soc_inst|m0_1|u_logic|Vy7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .lut_mask = 64'h000000004F004F00;
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S8ewx4~0 (
+// Location: MLABCELL_X34_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vhwvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S8ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & \soc_inst|m0_1|u_logic|Pkwwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Vhwvx4~1_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vhwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ukpvx4~combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vhwvx4~0_combout  ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vhwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|S8ewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .lut_mask = 64'hF0F0F0F0F050F050;
+defparam \soc_inst|m0_1|u_logic|Vhwvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H9iwx4~1 (
+// Location: MLABCELL_X34_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H9iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & !\soc_inst|m0_1|u_logic|H9iwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|S8ewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|H9iwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|K8wvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (\soc_inst|m0_1|u_logic|C2yvx4~combout  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  $ (\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|C2yvx4~combout  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H9iwx4~0_combout ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S8ewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K8wvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .lut_mask = 64'hCCCCCCCC88888888;
-defparam \soc_inst|m0_1|u_logic|H9iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .lut_mask = 64'h0001000100090009;
+defparam \soc_inst|m0_1|u_logic|K8wvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bspvx4~0 (
+// Location: MLABCELL_X34_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K8wvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bspvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Cymwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( 
-// ((\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Cymwx4~3_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|K8wvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|K8wvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vhwvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|K8wvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Qem2z4~q )))) 
+// ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|K8wvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K8wvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bspvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .lut_mask = 64'h3F0F3F0F33003300;
-defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .lut_mask = 64'h00F100F100000000;
+defparam \soc_inst|m0_1|u_logic|K8wvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bspvx4~1 (
+// Location: LABCELL_X31_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bspvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Bspvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Bspvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|F9wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((\soc_inst|m0_1|u_logic|Pty2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Pty2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Pty2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Pty2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bspvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F9wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .lut_mask = 64'h3F003F3F00000000;
-defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .lut_mask = 64'h005F00135F5F1313;
+defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y25_N26
-dffeas \soc_inst|m0_1|u_logic|Vvx2z4 (
+// Location: FF_X28_Y14_N13
+dffeas \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -89476,91 +89354,68 @@ dffeas \soc_inst|m0_1|u_logic|Vvx2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vvx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vvx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~0 (
+// Location: LABCELL_X29_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P3mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vvx2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout  & \soc_inst|m0_1|u_logic|Add2~13_sumout )) ) ) # ( !\soc_inst|m0_1|u_logic|Vvx2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|S5pvx4~combout  & \soc_inst|m0_1|u_logic|Add2~13_sumout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|P3mvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add2~13_sumout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .lut_mask = 64'h5757575702020202;
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X40_Y25_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Mhhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add5~117_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P3mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .lut_mask = 64'hF0A0F0A000000000;
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .lut_mask = 64'hCFCF0000CCCC0000;
+defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y25_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~2 (
+// Location: MLABCELL_X28_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P3mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|H4nwx4~combout  & ( (!\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & (\soc_inst|m0_1|u_logic|Bspvx4~1_combout  & \soc_inst|m0_1|u_logic|Mhhvx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H4nwx4~combout  & ( \soc_inst|m0_1|u_logic|Mhhvx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|P3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|P3mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & (\soc_inst|m0_1|u_logic|Auk2z4~q  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ) # 
+// (\soc_inst|m0_1|u_logic|F9wvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|P3mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ((\soc_inst|m0_1|u_logic|Auk2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & (\soc_inst|m0_1|u_logic|F9wvx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mhhvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|F9wvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P3mvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .lut_mask = 64'h00FF00FF000C000C;
-defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .lut_mask = 64'h028A028A008A008A;
+defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y25_N25
-dffeas \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE (
+// Location: FF_X28_Y14_N32
+dffeas \soc_inst|m0_1|u_logic|Auk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -89569,601 +89424,654 @@ dffeas \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Auk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Auk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Auk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o[29] (
+// Location: MLABCELL_X28_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4xvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o [29] = ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Add3~9_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Add3~9_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// (!\soc_inst|m0_1|u_logic|Add3~9_sumout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|E4xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|C3z2z4~q  & ((!\soc_inst|m0_1|u_logic|K1z2z4~q ) # (!\soc_inst|m0_1|u_logic|Auk2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|C3z2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add3~9_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.combout(\soc_inst|m0_1|u_logic|E4xvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o[29] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o[29] .lut_mask = 64'hEE0EEE0EEE0E0000;
-defparam \soc_inst|m0_1|u_logic|haddr_o[29] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .lut_mask = 64'hFF00FF00FA00FA00;
+defparam \soc_inst|m0_1|u_logic|E4xvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~2 (
+// Location: MLABCELL_X28_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B3mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S6ovx4~2_combout  = ( !\soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (\soc_inst|m0_1|u_logic|haddr_o~1_combout  & (\soc_inst|m0_1|u_logic|V2qvx4~combout  & !\soc_inst|m0_1|u_logic|haddr_o [29])) ) )
+// \soc_inst|m0_1|u_logic|B3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|E4xvx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|E4xvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|E4xvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B3mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .lut_mask = 64'h0500050000000000;
-defparam \soc_inst|m0_1|u_logic|S6ovx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .lut_mask = 64'h0C0F0C0F0C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|B3mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Va62z4 (
+// Location: MLABCELL_X34_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlwvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Va62z4~combout  = ( \soc_inst|m0_1|u_logic|Add3~9_sumout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  ) )
+// \soc_inst|m0_1|u_logic|Wlwvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Ohwvx4~combout  & (!\soc_inst|m0_1|u_logic|G27wx4~0_combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ejwvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add3~9_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Va62z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wlwvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Va62z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Va62z4 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|Va62z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .lut_mask = 64'h7333733300000000;
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o[29]~2 (
+// Location: MLABCELL_X34_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wlwvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wlwvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wlwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Jky2z4~q ) # (\soc_inst|m0_1|u_logic|Vhwvx4~1_combout )))) # 
+// (\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((\soc_inst|m0_1|u_logic|Jky2z4~q ) # (\soc_inst|m0_1|u_logic|Vhwvx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vhwvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wlwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wlwvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .lut_mask = 64'hF0FFF0FFA0AAA0AA;
-defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .lut_mask = 64'h0BBB0BBB00000000;
+defparam \soc_inst|m0_1|u_logic|Wlwvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H362z4~0 (
+// Location: LABCELL_X24_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B3mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H362z4~0_combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|K1wvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~77_sumout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~77_sumout ) ) )
+// \soc_inst|m0_1|u_logic|B3mvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B3mvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ((\soc_inst|m0_1|u_logic|C3z2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & (\soc_inst|m0_1|u_logic|Wlwvx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B3mvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wlwvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H362z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H362z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H362z4~0 .lut_mask = 64'hFFF0FFF055505550;
-defparam \soc_inst|m0_1|u_logic|H362z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .lut_mask = 64'h028A028A00000000;
+defparam \soc_inst|m0_1|u_logic|B3mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|htrans_o[1]~0 (
+// Location: FF_X24_Y14_N23
+dffeas \soc_inst|m0_1|u_logic|C3z2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|B3mvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|C3z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|C3z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Emewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & ( \soc_inst|m0_1|u_logic|H362z4~0_combout  & ( (\soc_inst|m0_1|u_logic|E7mwx4~combout  & ((!\soc_inst|m0_1|u_logic|Va62z4~combout  & 
-// (\soc_inst|m0_1|u_logic|haddr_o~1_combout )) # (\soc_inst|m0_1|u_logic|Va62z4~combout  & ((\soc_inst|m0_1|u_logic|Add3~1_sumout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & ( !\soc_inst|m0_1|u_logic|H362z4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|E7mwx4~combout  & ((\soc_inst|m0_1|u_logic|haddr_o~1_combout ) # (\soc_inst|m0_1|u_logic|Va62z4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & ( !\soc_inst|m0_1|u_logic|H362z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|E7mwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Emewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K9z2z4~q ) # ((!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Va62z4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
-	.datae(!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|H362z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .lut_mask = 64'h3333131300000213;
-defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Emewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Emewx4~0 .lut_mask = 64'hFFFFFFFFFFFCFFFC;
+defparam \soc_inst|m0_1|u_logic|Emewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N51
-cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~1 (
+// Location: MLABCELL_X28_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvswx4~0 (
 // Equation(s):
-// \soc_inst|switches_1|half_word_address~1_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout  & ( (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & (((\soc_inst|m0_1|u_logic|S6ovx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|S6ovx4~2_combout )) # (\soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Wvswx4~0_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Cyq2z4~q  & \soc_inst|m0_1|u_logic|E4xvx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
-	.datae(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.dataf(!\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|half_word_address~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wvswx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address~1 .extended_lut = "off";
-defparam \soc_inst|switches_1|half_word_address~1 .lut_mask = 64'h00000000000040F0;
-defparam \soc_inst|switches_1|half_word_address~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .lut_mask = 64'h0000AEAE0000AAAA;
+defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N36
-cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~3 (
+// Location: LABCELL_X36_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjswx4~0 (
 // Equation(s):
-// \soc_inst|switches_1|half_word_address~3_combout  = ( \soc_inst|switches_1|half_word_address~1_combout  & ( \soc_inst|switches_1|half_word_address~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Fjswx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zoy2z4~q )) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|Jky2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  
+// & (!\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jky2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Zoy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jky2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fjswx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .lut_mask = 64'h5010400054104400;
+defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X18_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjswx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fjswx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wvswx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fjswx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|C3z2z4~q ))) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|switches_1|half_word_address~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|switches_1|half_word_address~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wvswx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjswx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|half_word_address~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address~3 .extended_lut = "off";
-defparam \soc_inst|switches_1|half_word_address~3 .lut_mask = 64'h0000000000FF00FF;
-defparam \soc_inst|switches_1|half_word_address~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .lut_mask = 64'h00CF000000000000;
+defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y15_N37
-dffeas \soc_inst|switches_1|half_word_address[0] (
+// Location: FF_X19_Y19_N23
+dffeas \soc_inst|m0_1|u_logic|T1d3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|switches_1|half_word_address~3_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|half_word_address [0]),
+	.q(\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address[0] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|half_word_address[0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T1d3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T1d3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N18
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~6 (
+// Location: LABCELL_X27_Y19_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~4 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[24]~6_combout  = ( \soc_inst|interconnect_1|HRDATA[9]~5_combout  & ( (!\soc_inst|interconnect_1|mux_sel [2] & ((!\soc_inst|interconnect_1|mux_sel [1]) # ((!\soc_inst|interconnect_1|mux_sel [0] & 
-// \soc_inst|switches_1|half_word_address [0])))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[9]~5_combout  & ( (!\soc_inst|interconnect_1|mux_sel [1] & !\soc_inst|interconnect_1|mux_sel [2]) ) )
+// \soc_inst|m0_1|u_logic|Eo5wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ujp2z4~q  & ( \soc_inst|m0_1|u_logic|Wyt2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((\soc_inst|m0_1|u_logic|Wu63z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|F483z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ujp2z4~q  & ( \soc_inst|m0_1|u_logic|Wyt2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (((\soc_inst|m0_1|u_logic|Wu63z4~q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q )) # (\soc_inst|m0_1|u_logic|F483z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ujp2z4~q  & ( !\soc_inst|m0_1|u_logic|Wyt2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (((!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|Wu63z4~q )))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|F483z4~q  & ((\soc_inst|m0_1|u_logic|Yaz2z4~q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ujp2z4~q  & ( !\soc_inst|m0_1|u_logic|Wyt2z4~q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q  & ((\soc_inst|m0_1|u_logic|Wu63z4~q ))) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// (\soc_inst|m0_1|u_logic|F483z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datad(!\soc_inst|switches_1|half_word_address [0]),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[9]~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|F483z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wu63z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ujp2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wyt2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[24]~6 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[24]~6 .lut_mask = 64'hC0C0C0C0C0E0C0E0;
-defparam \soc_inst|interconnect_1|HRDATA[24]~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .lut_mask = 64'h0035F0350F35FF35;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N12
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~17 (
+// Location: FF_X21_Y21_N5
+dffeas \soc_inst|m0_1|u_logic|Gip2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Yxzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gip2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gip2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gip2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y19_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~3 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[24]~17_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~6_combout  & ( ((\soc_inst|ram_1|read_cycle~q  & (\soc_inst|ram_1|byte_select [3] & \soc_inst|interconnect_1|mux_sel [0]))) # (\soc_inst|interconnect_1|mux_sel [1]) ) 
-// )
+// \soc_inst|m0_1|u_logic|Eo5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Gip2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|F8v2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|W893z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Gip2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q ) # (\soc_inst|m0_1|u_logic|Sgp2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Gip2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|F8v2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~q  & ((\soc_inst|m0_1|u_logic|W893z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Gip2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgp2z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|read_cycle~q ),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|ram_1|byte_select [3]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|F8v2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|W893z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gip2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[24]~17 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[24]~17 .lut_mask = 64'h0000000033373337;
-defparam \soc_inst|interconnect_1|HRDATA[24]~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .lut_mask = 64'h0505303FF5F5303F;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y15_N35
-dffeas \soc_inst|switches_1|switch_store[1][8] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[8]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][8]~q ),
-	.prn(vcc));
+// Location: LABCELL_X27_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Eo5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eo5wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Eo5wx4~4_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Eo5wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~3_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][8] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][8] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .lut_mask = 64'h5505550550005000;
+defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~1 (
+// Location: LABCELL_X27_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylwwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|P12wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Zhyvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|P12wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ylwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qzq2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fzl2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ylwwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .lut_mask = 64'hFE32FE32DC10DC10;
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N18
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[24]~26 (
+// Location: LABCELL_X27_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylwwx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[24]~26_combout  = ( \soc_inst|ram_1|write_cycle~q  & ( (!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 )) # (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & 
-// (((\soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & \soc_inst|m0_1|u_logic|Y9t2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ylwwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ylwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cyq2z4~q  & (!\soc_inst|m0_1|u_logic|Wai2z4~q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout ))) ) 
+// )
 
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ),
-	.datab(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datae(!\soc_inst|ram_1|write_cycle~q ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ylwwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[24]~26_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[24]~26 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[24]~26 .lut_mask = 64'h0000444700004447;
-defparam \soc_inst|ram_1|data_to_memory[24]~26 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .lut_mask = 64'h0000000000100010;
+defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y17_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 (
-	.portawe(\soc_inst|ram_1|write_cycle~q ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[24]~26_combout ,\soc_inst|ram_1|data_to_memory[16]~25_combout }),
-	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portabyteenamasks(1'b1),
-	.portbdatain(2'b00),
-	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
-\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
-\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+// Location: LABCELL_X27_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ok7wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ok7wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ylwwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Wai2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylwwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wai2z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_bit_number = 16;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_bit_number = 16;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000BFB8CB40A88F9954051007D15400000000000000287D000000000000000000000000";
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .lut_mask = 64'hBBBB0000FBFB0000;
+defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y19_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Manwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Manwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Manwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Manwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Manwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N12
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[16]~25 (
+// Location: LABCELL_X29_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S1ewx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[16]~25_combout  = ( \soc_inst|ram_1|write_cycle~q  & ( (!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ))) # 
-// (\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O24wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|S1ewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & !\soc_inst|m0_1|u_logic|Manwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|write_cycle~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[16]~25_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[16]~25 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[16]~25 .lut_mask = 64'h0000000030FC30FC;
-defparam \soc_inst|ram_1|data_to_memory[16]~25 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N33
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~31 (
+// Location: LABCELL_X29_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W6iwx4 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[24]~31_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24  & ( (\soc_inst|interconnect_1|HRDATA[24]~17_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
-// (\soc_inst|switches_1|switch_store[1][8]~q ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24  & ( (\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|interconnect_1|HRDATA[24]~17_combout  & 
-// \soc_inst|switches_1|switch_store[1][8]~q )) ) )
+// \soc_inst|m0_1|u_logic|W6iwx4~combout  = ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[1][8]~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ),
+	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W6iwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[24]~31 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[24]~31 .lut_mask = 64'h000500050A0F0A0F;
-defparam \soc_inst|interconnect_1|HRDATA[24]~31 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W6iwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W6iwx4 .lut_mask = 64'h0000000055005500;
+defparam \soc_inst|m0_1|u_logic|W6iwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~0 (
+// Location: LABCELL_X29_Y21_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bspvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|interconnect_1|HRDATA[8]~33_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[8]~33_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Bspvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Cymwx4~3_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jymwx4~1_combout  & ( 
+// ((\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Cymwx4~3_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cymwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jymwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V5nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bspvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
-defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .lut_mask = 64'h30FF30FF30303030;
+defparam \soc_inst|m0_1|u_logic|Bspvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mohvx4~0 (
+// Location: LABCELL_X30_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bspvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mohvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~31_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[24]~31_combout  )
+// \soc_inst|m0_1|u_logic|Bspvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Bspvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Bspvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Twmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hxmwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bspvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Twmwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mohvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .lut_mask = 64'h0AAA00000FFF0000;
+defparam \soc_inst|m0_1|u_logic|Bspvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y20_N43
-dffeas \soc_inst|m0_1|u_logic|Gqw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mohvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gqw2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X39_Y16_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mhhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~13_sumout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (\soc_inst|m0_1|u_logic|S5pvx4~combout )) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~13_sumout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~13_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gqw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gqw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .lut_mask = 64'h5500550077227722;
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~1 (
+// Location: LABCELL_X30_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|K6y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Gqw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Gqw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Mhhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & (!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout  & !\soc_inst|m0_1|u_logic|Lefwx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Gqw2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mhhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V5nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
-defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .lut_mask = 64'hF000F000C000C000;
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~2 (
+// Location: LABCELL_X30_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhhvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V5nvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|V5nvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[24]~31_combout  & !\soc_inst|m0_1|u_logic|V5nvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|V5nvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|V5nvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Mhhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mhhvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Mhhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|Bspvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|V5nvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bspvx4~1_combout ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|V5nvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhhvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .lut_mask = 64'hCCCC888800000000;
-defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .lut_mask = 64'h00000000FF55FF00;
+defparam \soc_inst|m0_1|u_logic|Mhhvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y20_N58
-dffeas \soc_inst|m0_1|u_logic|Bsy2z4 (
+// Location: FF_X30_Y13_N46
+dffeas \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -90172,637 +90080,758 @@ dffeas \soc_inst|m0_1|u_logic|Bsy2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bsy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Bsy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ho3wx4~0 (
+// Location: MLABCELL_X21_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Va62z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ho3wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Va62z4~combout  = ( \soc_inst|m0_1|u_logic|Add3~9_sumout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add3~9_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Va62z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .lut_mask = 64'h00C000C000000000;
-defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Va62z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Va62z4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Va62z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~1 (
+// Location: LABCELL_X22_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H362z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ) # (\soc_inst|m0_1|u_logic|W28wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|H362z4~0_combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|A67wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|K1wvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~77_sumout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~77_sumout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A67wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H362z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .lut_mask = 64'h00000000050F050F;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H362z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H362z4~0 .lut_mask = 64'hFFAAFFAA0F0A0F0A;
+defparam \soc_inst|m0_1|u_logic|H362z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mn3wx4~0 (
+// Location: MLABCELL_X21_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|htrans_o[1]~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mn3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Qfdwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & ( \soc_inst|m0_1|u_logic|H362z4~0_combout  & ( (\soc_inst|m0_1|u_logic|E7mwx4~combout  & ((!\soc_inst|m0_1|u_logic|Va62z4~combout  & 
+// (\soc_inst|m0_1|u_logic|haddr_o~1_combout )) # (\soc_inst|m0_1|u_logic|Va62z4~combout  & ((\soc_inst|m0_1|u_logic|Add3~1_sumout ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & ( !\soc_inst|m0_1|u_logic|H362z4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|E7mwx4~combout  & ((\soc_inst|m0_1|u_logic|haddr_o~1_combout ) # (\soc_inst|m0_1|u_logic|Va62z4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & ( !\soc_inst|m0_1|u_logic|H362z4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|E7mwx4~combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Va62z4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H362z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .lut_mask = 64'h0000000003030303;
-defparam \soc_inst|m0_1|u_logic|Mn3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .lut_mask = 64'h3333131300000213;
+defparam \soc_inst|m0_1|u_logic|htrans_o[1]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~0 (
+// Location: MLABCELL_X21_Y17_N18
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+// \soc_inst|switches_1|half_word_address~1_combout  = ( \soc_inst|m0_1|u_logic|E7mwx4~combout  & ( \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout  & ( (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & \soc_inst|interconnect_1|HREADY~0_combout ) ) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|E7mwx4~combout  & ( \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~1_combout  & (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & (\soc_inst|interconnect_1|HREADY~0_combout  & 
+// !\soc_inst|m0_1|u_logic|S6ovx4~2_combout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.dataf(!\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~0_combout ),
+	.combout(\soc_inst|switches_1|half_word_address~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|half_word_address~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~1 .lut_mask = 64'h0000000004000C0C;
+defparam \soc_inst|switches_1|half_word_address~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~2 (
+// Location: LABCELL_X24_Y17_N6
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Jp3wx4~combout  & ( \soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Df3wx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Jp3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Df3wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jp3wx4~combout  & ( !\soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Df3wx4~0_combout )) ) ) )
+// \soc_inst|switches_1|half_word_address~2_combout  = ( \soc_inst|switches_1|half_word_address~1_combout  & ( \soc_inst|m0_1|u_logic|Fvovx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|switches_1|half_word_address~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~2_combout ),
+	.combout(\soc_inst|switches_1|half_word_address~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .lut_mask = 64'h8080808080800000;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .shared_arith = "off";
+defparam \soc_inst|switches_1|half_word_address~2 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~2 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|switches_1|half_word_address~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~5 (
+// Location: FF_X24_Y17_N8
+dffeas \soc_inst|switches_1|half_word_address[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|switches_1|half_word_address~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|half_word_address [1]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|half_word_address[1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|half_word_address[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y17_N3
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~19 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & \soc_inst|m0_1|u_logic|B73wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|B73wx4~combout  & ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # (\soc_inst|m0_1|u_logic|A0zvx4~0_combout ))) ) )
+// \soc_inst|interconnect_1|HRDATA[1]~19_combout  = ( \soc_inst|switches_1|half_word_address [1] & ( !\soc_inst|interconnect_1|HRDATA[1]~37_combout  ) ) # ( !\soc_inst|switches_1|half_word_address [1] & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[1]~37_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|switches_1|half_word_address [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~5_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .lut_mask = 64'h030F030F03030303;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~19 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~19 .lut_mask = 64'hAA00AA00FF00FF00;
+defparam \soc_inst|interconnect_1|HRDATA[1]~19 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~6 (
+// Location: MLABCELL_X34_Y17_N24
+cyclonev_lcell_comb \soc_inst|switches_1|DataValid~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Ukpvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|G27wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Ukpvx4~combout ) ) ) )
+// \soc_inst|switches_1|DataValid~1_combout  = ( \soc_inst|switches_1|DataValid [0] & ( \soc_inst|switches_1|half_word_address [1] ) ) # ( !\soc_inst|switches_1|DataValid [0] & ( \soc_inst|switches_1|half_word_address [1] & ( 
+// (!\soc_inst|switches_1|last_buttons [0] & !\KEY[0]~input_o ) ) ) ) # ( \soc_inst|switches_1|DataValid [0] & ( !\soc_inst|switches_1|half_word_address [1] & ( (!\soc_inst|switches_1|read_enable~q ) # (((!\soc_inst|switches_1|last_buttons [0] & 
+// !\KEY[0]~input_o )) # (\soc_inst|switches_1|half_word_address [0])) ) ) ) # ( !\soc_inst|switches_1|DataValid [0] & ( !\soc_inst|switches_1|half_word_address [1] & ( (!\soc_inst|switches_1|last_buttons [0] & !\KEY[0]~input_o ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+	.dataa(!\soc_inst|switches_1|read_enable~q ),
+	.datab(!\soc_inst|switches_1|last_buttons [0]),
+	.datac(!\KEY[0]~input_o ),
+	.datad(!\soc_inst|switches_1|half_word_address [0]),
+	.datae(!\soc_inst|switches_1|DataValid [0]),
+	.dataf(!\soc_inst|switches_1|half_word_address [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~6_combout ),
+	.combout(\soc_inst|switches_1|DataValid~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .lut_mask = 64'h00000A0A00FF0AFF;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .shared_arith = "off";
+defparam \soc_inst|switches_1|DataValid~1 .extended_lut = "off";
+defparam \soc_inst|switches_1|DataValid~1 .lut_mask = 64'hC0C0EAFFC0C0FFFF;
+defparam \soc_inst|switches_1|DataValid~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~7 (
+// Location: FF_X34_Y17_N25
+dffeas \soc_inst|switches_1|DataValid[0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|switches_1|DataValid~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|DataValid [0]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|DataValid[0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|DataValid[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X34_Y17_N44
+dffeas \soc_inst|switches_1|switch_store[0][0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[0]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][0]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][0] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][0] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y17_N42
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[0]~32 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( !\soc_inst|m0_1|u_logic|Df3wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) )
+// \soc_inst|interconnect_1|HRDATA[0]~32_combout  = ( \soc_inst|switches_1|switch_store[0][0]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [0])))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][0]~q  & ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [0]))))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout  & (((\soc_inst|interconnect_1|HRDATA[1]~19_combout )))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][0]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [0]))))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout  & (((!\soc_inst|interconnect_1|HRDATA[1]~19_combout )))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][0]~q  & 
+// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [0]))))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~6_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
+	.datad(!\soc_inst|switches_1|DataValid [0]),
+	.datae(!\soc_inst|switches_1|switch_store[0][0]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~7_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .lut_mask = 64'hF0FFFCFF00000000;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[0]~32 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[0]~32 .lut_mask = 64'h808AD0DA858FD5DF;
+defparam \soc_inst|interconnect_1|HRDATA[0]~32 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~8 (
+// Location: LABCELL_X35_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~5_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Vcnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kyi2z4~q  & ( \soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (!\soc_inst|interconnect_1|HRDATA[0]~32_combout  & ((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Kyi2z4~q  & ( !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (!\soc_inst|interconnect_1|HRDATA[0]~32_combout  & ((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kyi2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[0]~32_combout  & ((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Df3wx4~5_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .lut_mask = 64'h00000000FCFF3033;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .lut_mask = 64'hEE0EEE0E0000EE0E;
+defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~9 (
+// Location: FF_X35_Y16_N38
+dffeas \soc_inst|m0_1|u_logic|Kyi2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kyi2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kyi2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y19_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Df3wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~4_combout  & \soc_inst|interconnect_1|HREADY~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~2_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|L8t2z4~q ) # (\soc_inst|m0_1|u_logic|Df3wx4~4_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Df3wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( 
-// \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Kkyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~4_combout ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Df3wx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~8_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kkyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .lut_mask = 64'h3333333331311111;
-defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .lut_mask = 64'h0F0F0F0F0F000F00;
+defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1pvx4~0 (
+// Location: LABCELL_X36_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ocnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R1pvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (((\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|Df3wx4~9_combout )))))) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~q ) # (\soc_inst|m0_1|u_logic|W28wx4~0_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Ocnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|m0_1|u_logic|F9pvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Kkyvx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kyi2z4~q ))))) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kyi2z4~q ))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kyi2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kkyvx4~1_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .lut_mask = 64'h000000000A0AFFCF;
-defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .lut_mask = 64'h0DDD0D0D0D0D0D0D;
+defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K4mvx4~0 (
+// Location: FF_X36_Y21_N49
+dffeas \soc_inst|m0_1|u_logic|R1w2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R1w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R1w2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J5vvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K4mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & !\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & !\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|J5vvx4~combout  = (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|interconnect_1|HREADY~0_combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K4mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .lut_mask = 64'hA0A0B3B3A0A0B3B3;
-defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|J5vvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|J5vvx4 .lut_mask = 64'h00F000F000F000F0;
+defparam \soc_inst|m0_1|u_logic|J5vvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y15_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K4mvx4~1 (
+// Location: MLABCELL_X25_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K4mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fvovx4~combout  & ( !\soc_inst|m0_1|u_logic|K4mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout  & ( !\soc_inst|m0_1|u_logic|K4mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|X7mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A4t2z4~q  & (\soc_inst|m0_1|u_logic|J5vvx4~combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|S4w2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~q  & (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|A4t2z4~q  & 
+// \soc_inst|m0_1|u_logic|J5vvx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~q  & (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|A4t2z4~q  & 
+// \soc_inst|m0_1|u_logic|J5vvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( !\soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|S4w2z4~q  & (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|A4t2z4~q  & 
+// \soc_inst|m0_1|u_logic|J5vvx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|K4mvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X7mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .lut_mask = 64'hF0FFA0AA00000000;
-defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .lut_mask = 64'h000100010001000D;
+defparam \soc_inst|m0_1|u_logic|X7mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y15_N10
-dffeas \soc_inst|m0_1|u_logic|Jw93z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jw93z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X25_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X7mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X7mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|X7mvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|X7mvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|I6w2z4~q  & ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # 
+// (!\soc_inst|interconnect_1|HREADY~0_combout ))) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I6w2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|X7mvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|X7mvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jw93z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jw93z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .lut_mask = 64'h00FC00FCFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|X7mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y22_N50
-dffeas \soc_inst|m0_1|u_logic|X563z4~DUPLICATE (
+// Location: FF_X25_Y12_N14
+dffeas \soc_inst|m0_1|u_logic|I6w2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|X7mvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|X563z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|I6w2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X563z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|X563z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|I6w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I6w2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~3 (
+// Location: MLABCELL_X25_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xhbwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ow43z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Wd23z4~q )))) # (\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|X563z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ow43z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Wd23z4~q )))) # (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|X563z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|F5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mtqvx4~combout  & (\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ((!\soc_inst|m0_1|u_logic|R1w2z4~q 
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mtqvx4~combout  & \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|X563z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wd23z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ow43z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F5mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .lut_mask = 64'h0189018945CD45CD;
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .lut_mask = 64'h0A0A0A0A5F0A5F0A;
+defparam \soc_inst|m0_1|u_logic|F5mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~2 (
+// Location: MLABCELL_X25_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F5mvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xhbwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wa03z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Cmn2z4~q )) # (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Okn2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Wa03z4~q  & ( ((!\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Cmn2z4~q )) # (\soc_inst|m0_1|u_logic|M1j2z4~q  & ((!\soc_inst|m0_1|u_logic|Okn2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|F5mvx4~2_combout  = ( \soc_inst|m0_1|u_logic|F5mvx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & (((\soc_inst|m0_1|u_logic|U5x2z4~q )))) # (\soc_inst|interconnect_1|HREADY~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|U5x2z4~q )) # (\soc_inst|m0_1|u_logic|F5mvx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|F5mvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U5x2z4~q  & 
+// ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cmn2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Okn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|F5mvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U5x2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wa03z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|F5mvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .lut_mask = 64'hACFFACFFAC00AC00;
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .lut_mask = 64'h00EE00EE05EF05EF;
+defparam \soc_inst|m0_1|u_logic|F5mvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Xhbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fn33z4~q ) # (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Q713z4~q  & 
-// \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Q713z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fn33z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X25_Y12_N37
+dffeas \soc_inst|m0_1|u_logic|U5x2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|F5mvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|U5x2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .lut_mask = 64'h00AA00AAFFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U5x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U5x2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~0 (
+// Location: LABCELL_X29_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lefwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ) # ((\soc_inst|m0_1|u_logic|Fgm2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (!\soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~q 
-// ) # (\soc_inst|m0_1|u_logic|Wzy2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Xhbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Wzy2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Xhbwx4~3_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Xhbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Wzy2z4~q  
-// & !\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Lefwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ((!\soc_inst|m0_1|u_logic|R1w2z4~q  & ((\soc_inst|m0_1|u_logic|U5x2z4~q ))) # (\soc_inst|m0_1|u_logic|R1w2z4~q  & (\soc_inst|m0_1|u_logic|I6w2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|I6w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U5x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .lut_mask = 64'h020022208A00AA20;
-defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .lut_mask = 64'h001BFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Lefwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qrnvx4~0 (
+// Location: LABCELL_X33_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) # (\soc_inst|m0_1|u_logic|Jw93z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Imhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~25_sumout  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Xhbwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Add2~25_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Imhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .lut_mask = 64'h335F335033503350;
-defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .lut_mask = 64'h88AA88AA80A280A2;
+defparam \soc_inst|m0_1|u_logic|Imhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uzvvx4~0 (
+// Location: LABCELL_X33_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uzvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( !\soc_inst|m0_1|u_logic|Tyx2z4~q  $ (!\soc_inst|m0_1|u_logic|J4x2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( !\soc_inst|m0_1|u_logic|J4x2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  $ (!\soc_inst|m0_1|u_logic|Tyx2z4~q  $ 
-// (!\soc_inst|m0_1|u_logic|J4x2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( !\soc_inst|m0_1|u_logic|J4x2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Imhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & \soc_inst|m0_1|u_logic|Imhvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & \soc_inst|m0_1|u_logic|Imhvx4~0_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( \soc_inst|m0_1|u_logic|Imhvx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( 
+// (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & \soc_inst|m0_1|u_logic|Imhvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Imhvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uzvvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .lut_mask = 64'hFF009966FF0033CC;
-defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .lut_mask = 64'h0A0A0F0F08080C0C;
+defparam \soc_inst|m0_1|u_logic|Imhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y15_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fvovx4 (
+// Location: FF_X33_Y18_N38
+dffeas \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fvovx4~combout  = ( \soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (((!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( ((!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( ((!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ekovx4~combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (((\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~33_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Add3~29_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~33_sumout )) # (\soc_inst|m0_1|u_logic|Add3~29_sumout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( ((\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~33_sumout )) # (\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// \soc_inst|m0_1|u_logic|Add5~33_sumout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uzvvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add3~29_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Aqnvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ekovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fvovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fvovx4 .lut_mask = 64'h0C0C0CFF5D5D5DFF;
-defparam \soc_inst|m0_1|u_logic|Fvovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ekovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekovx4 .lut_mask = 64'h030303FF575757FF;
+defparam \soc_inst|m0_1|u_logic|Ekovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y15_N43
-dffeas \soc_inst|ram_1|saved_word_address[0] (
+// Location: FF_X25_Y17_N26
+dffeas \soc_inst|ram_1|saved_word_address[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ekovx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|saved_word_address [0]),
+	.q(\soc_inst|ram_1|saved_word_address [1]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|saved_word_address[0] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|saved_word_address[0] .power_up = "low";
+defparam \soc_inst|ram_1|saved_word_address[1] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N12
-cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[0]~0 (
+// Location: MLABCELL_X25_Y17_N30
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[1]~1 (
 // Equation(s):
-// \soc_inst|ram_1|memory.raddr_a[0]~0_combout  = ( \soc_inst|m0_1|u_logic|Fvovx4~combout  & ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q ) # (\soc_inst|ram_1|saved_word_address [0]) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fvovx4~combout  & ( \soc_inst|ram_1|always1~0_combout  & ( (\soc_inst|ram_1|saved_word_address [0] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fvovx4~combout  & ( !\soc_inst|ram_1|always1~0_combout  & ( 
-// \soc_inst|ram_1|saved_word_address [0] ) ) ) # ( !\soc_inst|m0_1|u_logic|Fvovx4~combout  & ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [0] ) ) )
+// \soc_inst|ram_1|memory.raddr_a[1]~1_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ekovx4~combout ))) # (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & 
+// (\soc_inst|ram_1|saved_word_address [1])) ) ) # ( !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [1] ) )
 
-	.dataa(!\soc_inst|ram_1|saved_word_address [0]),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.dataa(!\soc_inst|ram_1|saved_word_address [1]),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ekovx4~combout ),
+	.datae(gnd),
 	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|memory.raddr_a[0]~0_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[1]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .lut_mask = 64'h555555550505F5F5;
-defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .lut_mask = 64'h5555555511DD11DD;
+defparam \soc_inst|ram_1|memory.raddr_a[1]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N15
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[22]~31 (
+// Location: LABCELL_X27_Y16_N6
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[27]~19 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[22]~31_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ) # (\soc_inst|ram_1|byte_select [2]))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & ( (\soc_inst|ram_1|write_cycle~q  & (!\soc_inst|ram_1|byte_select [2] & \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 )) ) )
+// \soc_inst|ram_1|data_to_memory[27]~19_combout  = ( \soc_inst|ram_1|write_cycle~q  & ( \soc_inst|m0_1|u_logic|Knvvx4~0_combout  & ( (\soc_inst|ram_1|byte_select [3]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ) ) ) ) # ( 
+// \soc_inst|ram_1|write_cycle~q  & ( !\soc_inst|m0_1|u_logic|Knvvx4~0_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & !\soc_inst|ram_1|byte_select [3]) ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
-	.datab(!\soc_inst|ram_1|byte_select [2]),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+	.datab(!\soc_inst|ram_1|byte_select [3]),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.datae(!\soc_inst|ram_1|write_cycle~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[22]~31_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[27]~19_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[22]~31 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[22]~31 .lut_mask = 64'h0404040415151515;
-defparam \soc_inst|ram_1|data_to_memory[22]~31 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[27]~19 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[27]~19 .lut_mask = 64'h0000444400007777;
+defparam \soc_inst|ram_1|data_to_memory[27]~19 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y13_N0
-cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 (
+// Location: M10K_X26_Y16_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 (
 	.portawe(\soc_inst|ram_1|write_cycle~q ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
@@ -90818,7 +90847,7 @@ cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 (
 	.clr0(gnd),
 	.clr1(gnd),
 	.nerror(vcc),
-	.portadatain({\soc_inst|ram_1|data_to_memory[22]~31_combout ,\soc_inst|ram_1|data_to_memory[6]~32_combout }),
+	.portadatain({\soc_inst|ram_1|data_to_memory[27]~19_combout ,\soc_inst|ram_1|data_to_memory[3]~20_combout }),
 	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
 \soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
 \soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
@@ -90831,1142 +90860,1400 @@ cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .init_file_layout = "port_a";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .operation_mode = "dual_port";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_bit_number = 6;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_width = 12;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clear = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clock = "none";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_width = 2;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_address = 0;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_bit_number = 6;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_last_address = 4095;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_depth = 4096;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_width = 32;
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .ram_block_type = "M20K";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init0 = "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000003C304000F049C0000C403482403FFFFFFFFFFFFC32000551000000000000000001554";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_bit_number = 3;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_bit_number = 3;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init0 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000005B2535A397EF25F97E0FEB0EEA0FEB411144764580BC462040AFF6EFE7AFF7E140FA701555555555555419860140500505000000050001410";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y13_N15
-cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[6]~32 (
+// Location: MLABCELL_X39_Y18_N21
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[3]~20 (
 // Equation(s):
-// \soc_inst|ram_1|data_to_memory[6]~32_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( \soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( !\soc_inst|m0_1|u_logic|hwdata_o~4_combout  & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) )
+// \soc_inst|ram_1|data_to_memory[3]~20_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  & !\soc_inst|ram_1|byte_select [0])) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o~20_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|byte_select [0]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ))) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [0]),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|write_cycle~q ),
+	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
+	.datac(!\soc_inst|ram_1|byte_select [0]),
 	.datad(gnd),
-	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~4_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~20_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|data_to_memory[6]~32_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[3]~20_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|data_to_memory[6]~32 .extended_lut = "off";
-defparam \soc_inst|ram_1|data_to_memory[6]~32 .lut_mask = 64'h00000A0A05050F0F;
-defparam \soc_inst|ram_1|data_to_memory[6]~32 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[3]~20 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[3]~20 .lut_mask = 64'h1515151510101010;
+defparam \soc_inst|ram_1|data_to_memory[3]~20 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N33
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[22]~35 (
+// Location: LABCELL_X30_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rnhvx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[22]~35_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22  & ( (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
-// (\soc_inst|switches_1|switch_store[1][6]~q ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22  & ( (\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & 
-// \soc_inst|switches_1|switch_store[1][6]~q )) ) )
+// \soc_inst|m0_1|u_logic|Rnhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout ) # (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (\soc_inst|interconnect_1|HRDATA[26]~0_combout  
+// & !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) )
 
-	.dataa(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datad(!\soc_inst|switches_1|switch_store[1][6]~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Rnhvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .lut_mask = 64'hFFFF3030FFFFFCFC;
+defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X30_Y14_N52
+dffeas \soc_inst|m0_1|u_logic|Xuw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rnhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Xuw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Xuw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Xuw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oesvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Oesvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout ))) 
+// ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27  & ( (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & !\soc_inst|interconnect_1|HRDATA[26]~0_combout )) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a22 ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oesvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[22]~35 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[22]~35 .lut_mask = 64'h000500050A0F0A0F;
-defparam \soc_inst|interconnect_1|HRDATA[22]~35 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .lut_mask = 64'h3000300030333033;
+defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~0 (
+// Location: MLABCELL_X34_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J6nvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( ((!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~q )) # (\soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[6]~36_combout  & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|A5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Oesvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[11]~24_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Oesvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[11]~24_combout )))) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oesvx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[6]~36_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J6nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A5nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .lut_mask = 64'hC0C0C0C0D5D5D5D5;
-defparam \soc_inst|m0_1|u_logic|J6nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .lut_mask = 64'h30203020F0A0F0A0;
+defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aphvx4~0 (
+// Location: MLABCELL_X34_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aphvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[22]~35_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[22]~35_combout  )
+// \soc_inst|m0_1|u_logic|A5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|A5nvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (\soc_inst|m0_1|u_logic|Bby2z4~q  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xuw2z4~q ))) ) 
+// ) ) # ( \soc_inst|m0_1|u_logic|A5nvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xuw2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xuw2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|A5nvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aphvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Aphvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .lut_mask = 64'h0000BBBB00000B0B;
+defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y18_N44
-dffeas \soc_inst|m0_1|u_logic|Enw2z4 (
+// Location: FF_X34_Y14_N14
+dffeas \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Aphvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Enw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Enw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Enw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~1 (
+// Location: MLABCELL_X34_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dj6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Enw2z4~q ) # ((\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|I3y2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|I3y2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Enw2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J6nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .lut_mask = 64'h55005500F5F0F5F0;
-defparam \soc_inst|m0_1|u_logic|J6nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Dj6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J6nvx4~2 (
+// Location: LABCELL_X36_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vskwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J6nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|J6nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|J6nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[22]~35_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Vskwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Ohwvx4~combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~q  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[22]~35_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|J6nvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J6nvx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .lut_mask = 64'hFC00FC0000000000;
-defparam \soc_inst|m0_1|u_logic|J6nvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .lut_mask = 64'h00000000F0F00000;
+defparam \soc_inst|m0_1|u_logic|Vskwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y18_N14
-dffeas \soc_inst|m0_1|u_logic|Zoy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|J6nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H06wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|H06wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & \soc_inst|m0_1|u_logic|Bsy2z4~q )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zoy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zoy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H06wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H06wx4~0 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|H06wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W7hwx4~0 (
+// Location: LABCELL_X33_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ptgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W7hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~q  & ((\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Lny2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Ptgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Ptgwx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V76wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V76wx4~0_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|V76wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V76wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V76wx4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|V76wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V76wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|V76wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|V76wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M66wx4~combout  & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|V76wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # (\soc_inst|m0_1|u_logic|Y6t2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V76wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .lut_mask = 64'h000000004C4C4C4C;
-defparam \soc_inst|m0_1|u_logic|W7hwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V76wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V76wx4~1 .lut_mask = 64'hFCFFA8AA00000000;
+defparam \soc_inst|m0_1|u_logic|V76wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhgwx4~0 (
+// Location: LABCELL_X23_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wdqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Wdqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iikwx4~0 (
+// Location: MLABCELL_X25_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yy5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iikwx4~0_combout  = ( \soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~q  & (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) 
-// ) )
+// \soc_inst|m0_1|u_logic|Yy5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|O76wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .lut_mask = 64'h0000000000004400;
-defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .lut_mask = 64'h0000000000F000F0;
+defparam \soc_inst|m0_1|u_logic|Yy5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xf6wx4~0 (
+// Location: LABCELL_X30_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xf6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Orewx4~0_combout )))) # (\soc_inst|m0_1|u_logic|L8t2z4~q 
-//  & (((\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kzxvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|P0hwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .lut_mask = 64'h0000000003AF03AF;
-defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lu6wx4~0 (
+// Location: LABCELL_X31_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lu6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Xu5wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) # (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) # (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .lut_mask = 64'h0000000002020202;
-defparam \soc_inst|m0_1|u_logic|Lu6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .lut_mask = 64'hCCC8CCC8CCC0CCC0;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uv6wx4 (
+// Location: LABCELL_X30_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D56wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uv6wx4~combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|D56wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Y6t2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Y6t2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|D56wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uv6wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uv6wx4 .lut_mask = 64'h00000000FFA0FFA0;
-defparam \soc_inst|m0_1|u_logic|Uv6wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D56wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D56wx4~0 .lut_mask = 64'h00003000CCCCFCCC;
+defparam \soc_inst|m0_1|u_logic|D56wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uijwx4~0 (
+// Location: LABCELL_X29_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mz5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Uijwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Mz5wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mz5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .lut_mask = 64'h8800880000880088;
-defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Mz5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qf6wx4~0 (
+// Location: MLABCELL_X34_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qf6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|G27wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qf6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .lut_mask = 64'h000A000A00000000;
-defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~2 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|m0_1|u_logic|G27wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~2 (
+// Location: MLABCELL_X34_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Px5wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qf6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uv6wx4~combout  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|H9i2z4~q ))) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qf6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qf6wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Uv6wx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qf6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Px5wx4~combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qf6wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Px5wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .lut_mask = 64'h3333333333332323;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Px5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Px5wx4 .lut_mask = 64'hFFFFFFFFFFF0FFF0;
+defparam \soc_inst|m0_1|u_logic|Px5wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~3 (
+// Location: MLABCELL_X34_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uw5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~2_combout  & ( (((!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hyy2z4~q )) # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|H9i2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Uw5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Px5wx4~combout  & ( (\soc_inst|m0_1|u_logic|G27wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  $ (((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q 
+// ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uw5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .lut_mask = 64'h00000000F7FFF7FF;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .lut_mask = 64'h0D020D0200000000;
+defparam \soc_inst|m0_1|u_logic|Uw5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpjwx4~0 (
+// Location: MLABCELL_X28_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gpjwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|H9i2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Xu5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uw5wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mz5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jp3wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mz5wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uw5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .lut_mask = 64'h44CC44CC00000000;
-defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .lut_mask = 64'hA800A80000000000;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Og4wx4~0 (
+// Location: LABCELL_X30_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Og4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( (\soc_inst|m0_1|u_logic|Y6t2z4~q  & \soc_inst|m0_1|u_logic|Huqvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Xu5wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xu5wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout  & (\soc_inst|m0_1|u_logic|Xu5wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|D56wx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xu5wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D56wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .lut_mask = 64'h0000000005040504;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ua6wx4~0 (
+// Location: LABCELL_X33_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ua6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Xu5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu5wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|H06wx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xu5wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|H06wx4~0_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xu5wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .lut_mask = 64'h0003000300000000;
-defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .lut_mask = 64'h00000000F0F0FCFC;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~0 (
+// Location: LABCELL_X30_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xu5wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ua6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xu5wx4~combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W46wx4~0_combout  & (\soc_inst|m0_1|u_logic|Xu5wx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|G36wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W46wx4~0_combout  & \soc_inst|m0_1|u_logic|Xu5wx4~3_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W46wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|G36wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xu5wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .lut_mask = 64'hFC00FC0000000000;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xu5wx4 .lut_mask = 64'h0A0A0A0A0A020A02;
+defparam \soc_inst|m0_1|u_logic|Xu5wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~1 (
+// Location: FF_X28_Y17_N11
+dffeas \soc_inst|m0_1|u_logic|Wai2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Xu5wx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wai2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wai2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y21_N1
+dffeas \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Dv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y22_N43
+dffeas \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X18_Y22_N34
+dffeas \soc_inst|m0_1|u_logic|H783z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H783z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H783z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Na6wx4~0_combout  & (\soc_inst|m0_1|u_logic|Q86wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (\soc_inst|m0_1|u_logic|Q86wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Fzxwx4~1_combout  = ( \soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yx63z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yx63z4~q ) # (\soc_inst|m0_1|u_logic|Svk2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q86wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yx63z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H783z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .lut_mask = 64'h00EE00EE00E000E0;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .lut_mask = 64'hCCF0CCF0AAFFAA00;
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~4 (
+// Location: FF_X24_Y20_N31
+dffeas \soc_inst|m0_1|u_logic|Yb93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Hx1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yb93z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yb93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yb93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y23_N43
+dffeas \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|H2m2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y21_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xf6wx4~0_combout  & (\soc_inst|m0_1|u_logic|Bkxvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Q86wx4~3_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Fzxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yb93z4~q  & ( \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Hbv2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T0m2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yb93z4~q  & ( \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|Hbv2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T0m2z4~q ) # ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) ) 
+// # ( \soc_inst|m0_1|u_logic|Yb93z4~q  & ( !\soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~q ) # (!\soc_inst|m0_1|u_logic|Hbv2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T0m2z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yb93z4~q  & ( !\soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Svk2z4~q ) # (!\soc_inst|m0_1|u_logic|Hbv2z4~q )))) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|T0m2z4~q ) # ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q86wx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|T0m2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hbv2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yb93z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .lut_mask = 64'h0000000000080008;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .lut_mask = 64'hEFE5EAE04F454A40;
+defparam \soc_inst|m0_1|u_logic|Fzxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~5 (
+// Location: LABCELL_X23_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzxwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Fzxwx4~combout  = ( \soc_inst|m0_1|u_logic|Fzxwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fzxwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fzxwx4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Fzxwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fzxwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Fzxwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Fzxwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fzxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .lut_mask = 64'h00000000F0FAF0FA;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzxwx4 .lut_mask = 64'h0000505005055555;
+defparam \soc_inst|m0_1|u_logic|Fzxwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~6 (
+// Location: MLABCELL_X28_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wxxwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q86wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dc6wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|H9i2z4~q )))) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|H9i2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Wxxwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fzxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sy2wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q86wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .lut_mask = 64'h0000000077707770;
-defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .lut_mask = 64'h00A000A022A222A2;
+defparam \soc_inst|m0_1|u_logic|Wxxwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~2 (
+// Location: MLABCELL_X28_Y18_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pkwwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Qem2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  $ (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.dataf(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .lut_mask = 64'h05050F0F05050F0F;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .lut_mask = 64'hCC33CC33CCC3CCC3;
+defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~1 (
+// Location: MLABCELL_X28_Y19_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vr7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|G27wx4~2_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|G27wx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  $ (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Vr7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Manwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & \soc_inst|m0_1|u_logic|Vy7wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .lut_mask = 64'h0021002100220022;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .lut_mask = 64'hAAAFAAAF00000000;
+defparam \soc_inst|m0_1|u_logic|Vr7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~3 (
+// Location: MLABCELL_X28_Y19_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R7iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~3_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & ((!\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Jm6wx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|R7iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vr7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .lut_mask = 64'h0000000032303230;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ad7wx4~0 (
+// Location: LABCELL_X29_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R5zvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ad7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|R5zvx4~2_combout  = ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( \soc_inst|m0_1|u_logic|R5zvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) # (\soc_inst|m0_1|u_logic|R7iwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R5zvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .lut_mask = 64'h5555555500550055;
-defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .lut_mask = 64'h000000003F3F7F7F;
+defparam \soc_inst|m0_1|u_logic|R5zvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~6 (
+// Location: MLABCELL_X39_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add2~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Add2~5_sumout  = SUM(( !\soc_inst|m0_1|u_logic|J0l2z4~q  ) + ( GND ) + ( \soc_inst|m0_1|u_logic|Add2~2  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add2~2 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add2~5_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add2~5 .lut_mask = 64'h0000FFFF0000F0F0;
+defparam \soc_inst|m0_1|u_logic|Add2~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~4 (
+// Location: MLABCELL_X39_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wthvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Wthvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add2~5_sumout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|J0l2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add2~5_sumout  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|J0l2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Add2~5_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wthvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .lut_mask = 64'hCCCCCCCC00C800C8;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .lut_mask = 64'hF3F3A3A300000000;
+defparam \soc_inst|m0_1|u_logic|Wthvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hyewx4 (
+// Location: MLABCELL_X28_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wthvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hyewx4~combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~q  & ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( (\soc_inst|m0_1|u_logic|Rxl2z4~q  & \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Wthvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H4nwx4~combout  & ( \soc_inst|m0_1|u_logic|Wthvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R5zvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Add5~77_sumout ) # 
+// (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H4nwx4~combout  & ( \soc_inst|m0_1|u_logic|Wthvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Add5~77_sumout ) # (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R5zvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~77_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wthvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wthvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hyewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hyewx4 .lut_mask = 64'h0000000000000055;
-defparam \soc_inst|m0_1|u_logic|Hyewx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .lut_mask = 64'h00000000FCFC5454;
+defparam \soc_inst|m0_1|u_logic|Wthvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y14_N1
+dffeas \soc_inst|m0_1|u_logic|J0l2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wthvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J0l2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J0l2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (\soc_inst|m0_1|u_logic|Hyewx4~combout  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) 
-// )
+// Location: FF_X30_Y13_N14
+dffeas \soc_inst|m0_1|u_logic|Omk2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Omk2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Omk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Omk2z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X30_Y13_N47
+dffeas \soc_inst|m0_1|u_logic|Vvx2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Mhhvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .lut_mask = 64'h0001000100000000;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vvx2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vvx2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~5 (
+// Location: LABCELL_X30_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Msyvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Jm6wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Msyvx4~combout  = ( !\soc_inst|m0_1|u_logic|Vvx2z4~q  & ( !\soc_inst|m0_1|u_logic|Rryvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J0l2z4~q  & (!\soc_inst|m0_1|u_logic|Omk2z4~q  & (!\soc_inst|m0_1|u_logic|Jux2z4~q  & 
+// \soc_inst|m0_1|u_logic|Pet2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pet2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Vvx2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .lut_mask = 64'h00CC00CC00CE00CC;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Msyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Msyvx4 .lut_mask = 64'h0080000000000000;
+defparam \soc_inst|m0_1|u_logic|Msyvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P28wx4 (
+// Location: LABCELL_X24_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jyb2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P28wx4~combout  = ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Wai2z4~q ))) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (!\soc_inst|m0_1|u_logic|Igi2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( 
-// !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & ((!\soc_inst|m0_1|u_logic|Wai2z4~q ))) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (!\soc_inst|m0_1|u_logic|Igi2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Qb3wx4~combout  & !\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jyb2z4~2_combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|P1c2z4~0_combout  & \soc_inst|m0_1|u_logic|Jyb2z4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|P1c2z4~0_combout  & (\soc_inst|m0_1|u_logic|Jyb2z4~1_combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P1c2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jyb2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P28wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P28wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P28wx4 .lut_mask = 64'h9A9A569A9A565656;
-defparam \soc_inst|m0_1|u_logic|P28wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .lut_mask = 64'h080A080A0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Jyb2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xt6wx4~0 (
+// Location: LABCELL_X24_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xt6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Zei2z4~q  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  $ 
-// (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Scpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Jyb2z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I1c2z4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Jyb2z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|L8t2z4~q  & ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|I1c2z4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|I1c2z4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .lut_mask = 64'h00005A5A00004848;
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .lut_mask = 64'h0000C8000000C8C0;
+defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y26_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q07wx4~1 (
+// Location: LABCELL_X19_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ipsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q07wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Ipsvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q07wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .lut_mask = 64'hF0F0FFFFF0F00000;
-defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X07wx4~0 (
+// Location: LABCELL_X30_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X07wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Idk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Idk2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Idk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Idk2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Scpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ipsvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Scpvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
+// \soc_inst|interconnect_1|HREADY~0_combout )) # (\soc_inst|m0_1|u_logic|Scpvx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X07wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X07wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X07wx4~0 .lut_mask = 64'hFCA8C08054004000;
-defparam \soc_inst|m0_1|u_logic|X07wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .lut_mask = 64'h0037000000000000;
+defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y25_N50
-dffeas \soc_inst|m0_1|u_logic|Gci2z4 (
+// Location: FF_X31_Y14_N29
+dffeas \soc_inst|m0_1|u_logic|Rxl2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gci2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Rxl2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gci2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gci2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rxl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rxl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q07wx4~0 (
+// Location: LABCELL_X33_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pqrvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q07wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout ) # (\soc_inst|m0_1|u_logic|Gci2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & ((\soc_inst|m0_1|u_logic|Wai2z4~q ))) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (\soc_inst|m0_1|u_logic|Gci2z4~q )) ) ) 
-// ) # ( \soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & ((!\soc_inst|m0_1|u_logic|Wai2z4~q ))) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (\soc_inst|m0_1|u_logic|Gci2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Gci2z4~q  & \soc_inst|m0_1|u_logic|Qb3wx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Pqrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 )) # 
+// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][1]~q ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.datad(!\soc_inst|switches_1|switch_store[1][1]~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q07wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pqrvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .lut_mask = 64'h0505C5C53535F5F5;
-defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .lut_mask = 64'h0000000004070407;
+defparam \soc_inst|m0_1|u_logic|Pqrvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y25_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xt6wx4~1 (
+// Location: LABCELL_X31_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S7nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Q07wx4~1_combout  $ 
-// (\soc_inst|m0_1|u_logic|X07wx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout  & !\soc_inst|m0_1|u_logic|X07wx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Q07wx4~1_combout  $ (\soc_inst|m0_1|u_logic|X07wx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Xt6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & (!\soc_inst|m0_1|u_logic|Q07wx4~1_combout  $ (\soc_inst|m0_1|u_logic|X07wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X07wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|S7nvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Pqrvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~21_combout  & (((\soc_inst|m0_1|u_logic|Rxl2z4~q )) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ))) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~21_combout  & (!\soc_inst|m0_1|u_logic|Vapvx4~combout  & ((\soc_inst|m0_1|u_logic|Rxl2z4~q ) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q07wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X07wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Q07wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pqrvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S7nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .lut_mask = 64'hEE00E00EAA00A00A;
-defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .lut_mask = 64'h32FA32FA00000000;
+defparam \soc_inst|m0_1|u_logic|S7nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~7 (
+// Location: LABCELL_X33_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jqhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  = ( \soc_inst|m0_1|u_logic|P28wx4~combout  & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & ((!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout  $ (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P28wx4~combout  & ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|P28wx4~combout  & ( !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P28wx4~combout  & ( !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jqhvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|interconnect_1|HRDATA[16]~7_combout ) # ((\soc_inst|interconnect_1|Equal1~0_combout  & 
+// !\soc_inst|switches_1|switch_store[1][1]~q ))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17  & ( (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((!\soc_inst|interconnect_1|Equal1~0_combout ) # 
+// ((!\soc_inst|switches_1|switch_store[1][1]~q ) # (!\soc_inst|interconnect_1|HRDATA[16]~7_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|P28wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|switches_1|switch_store[1][1]~q ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a17 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jqhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .lut_mask = 64'hF300F300FC00F900;
-defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .lut_mask = 64'hFFFEFFFEFFBAFFBA;
+defparam \soc_inst|m0_1|u_logic|Jqhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eyhvx4~1 (
+// Location: FF_X33_Y15_N1
+dffeas \soc_inst|m0_1|u_logic|Mfw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Jqhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mfw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mfw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mfw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S7nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eyhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Q86wx4~6_combout  & !\soc_inst|m0_1|u_logic|Jm6wx4~3_combout )) # 
-// (\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Q86wx4~6_combout  & 
-// !\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ))) # (\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q86wx4~6_combout ) # 
-// (\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q86wx4~6_combout ) # (\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|S7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mfw2z4~q  & ( (\soc_inst|m0_1|u_logic|S7nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Mfw2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & (\soc_inst|m0_1|u_logic|S7nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Q86wx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|S7nvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mfw2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .lut_mask = 64'h5F5F5F5F57555F55;
-defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .lut_mask = 64'h008C008C00AF00AF;
+defparam \soc_inst|m0_1|u_logic|S7nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y21_N13
-dffeas \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE (
+// Location: FF_X31_Y14_N28
+dffeas \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|S7nvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -91975,378 +92262,259 @@ dffeas \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpzvx4~1 (
+// Location: LABCELL_X27_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bpzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Fmqvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Dwl2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Dwl2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.dataf(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .lut_mask = 64'h000000AA000000AA;
-defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .lut_mask = 64'h00F000F0CCFCCCFC;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y25_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~2 (
+// Location: LABCELL_X27_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G5qvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~29_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~29_sumout  & ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~29_sumout  & ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Fmqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((\soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G5qvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .lut_mask = 64'h8808000088088808;
-defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .lut_mask = 64'h50505050FF50FF50;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9pvx4~0 (
+// Location: LABCELL_X35_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Onqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F9pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & ((\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ((\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Amyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Hmyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Tlyvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ((\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Rkyvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Onqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vnqvx4~0_combout  $ ((((!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hyy2z4~q )) # (\soc_inst|m0_1|u_logic|Bsy2z4~q 
+// ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tlyvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hmyvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vnqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F9pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Onqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .lut_mask = 64'h105030F0115533FF;
-defparam \soc_inst|m0_1|u_logic|F9pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .lut_mask = 64'h0000000039333933;
+defparam \soc_inst|m0_1|u_logic|Onqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9pvx4~1 (
+// Location: LABCELL_X27_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F9pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F9pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Lstwx4~0_combout  & \soc_inst|m0_1|u_logic|Pjyvx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F9pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pjyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Fmqvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Onqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~q  $ (\soc_inst|m0_1|u_logic|Fzl2z4~q )) # (\soc_inst|m0_1|u_logic|Vopvx4~0_combout 
+// ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lstwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pjyvx4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|F9pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pjyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Onqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .lut_mask = 64'h00000FFF00000FCF;
-defparam \soc_inst|m0_1|u_logic|F9pvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .lut_mask = 64'hD070D07000000000;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y25_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~1 (
+// Location: LABCELL_X27_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fmqvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G5qvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|G5qvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nyawx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|G5qvx4~2_combout  & !\soc_inst|m0_1|u_logic|Nyawx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Fmqvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Fmqvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Fmqvx4~1_combout  & (!\soc_inst|m0_1|u_logic|Fmqvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G5qvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fmqvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fmqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fmqvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .lut_mask = 64'h0000000020202030;
-defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .lut_mask = 64'h000000004C004C00;
+defparam \soc_inst|m0_1|u_logic|Fmqvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X35_Y25_N5
-dffeas \soc_inst|m0_1|u_logic|Qz33z4 (
+// Location: FF_X27_Y14_N56
+dffeas \soc_inst|m0_1|u_logic|Fzl2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Fmqvx4~3_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qz33z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fzl2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qz33z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qz33z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fzl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fzl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y25_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~0 (
+// Location: MLABCELL_X28_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U09wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oxnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Z853z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qz33z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|U09wx4~0_combout  = ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  
+// & \soc_inst|m0_1|u_logic|Y29wx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & (\soc_inst|m0_1|u_logic|Y29wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & (\soc_inst|m0_1|u_logic|Y29wx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|W19wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|R29wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Yzi2z4~q  & \soc_inst|m0_1|u_logic|Y29wx4~combout )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Yzi2z4~q  & (\soc_inst|m0_1|u_logic|Y29wx4~combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qz33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z853z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y29wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R29wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W19wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U09wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .lut_mask = 64'h000000A0000000C0;
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y25_N50
-dffeas \soc_inst|m0_1|u_logic|Knz2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Knz2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Knz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Knz2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U09wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U09wx4~0 .lut_mask = 64'hAE0CFFFFAE0CAE0C;
+defparam \soc_inst|m0_1|u_logic|U09wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y26_N32
-dffeas \soc_inst|m0_1|u_logic|Ek03z4 (
+// Location: FF_X33_Y18_N31
+dffeas \soc_inst|m0_1|u_logic|Fcj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ek03z4~feeder_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ek03z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Fcj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ek03z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ek03z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X33_Y26_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~2 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Oxnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Knz2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ek03z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Knz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ek03z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .lut_mask = 64'h00C0000000A00000;
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X35_Y24_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Oxnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hq23z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yg13z4~q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Hq23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yg13z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .lut_mask = 64'h00000000C0008800;
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X36_Y25_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Oxnvx4~2_combout )) # 
-// (\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Cawwx4~combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  ) ) # ( \soc_inst|m0_1|u_logic|Cawwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Iwp2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Cawwx4~combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Iwp2z4~q  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Iwp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .lut_mask = 64'hCCCCCCCCFFFF5FFF;
-defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fcj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fcj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N5qvx4~0 (
+// Location: LABCELL_X33_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N5qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & (((\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~29_sumout )))) # 
-// (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & (((\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~29_sumout )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( 
-// (\soc_inst|m0_1|u_logic|K1wvx4~combout  & \soc_inst|m0_1|u_logic|Add5~29_sumout ) ) )
+// \soc_inst|m0_1|u_logic|Cxhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fcj2z4~q  & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cxhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .lut_mask = 64'h000F000F111F111F;
-defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .lut_mask = 64'hCCCC0000F3F30000;
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N54
-cyclonev_lcell_comb \soc_inst|ram_1|byte1~0 (
+// Location: LABCELL_X33_Y18_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxhvx4~1 (
 // Equation(s):
-// \soc_inst|ram_1|byte1~0_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( ((\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|T50wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( \soc_inst|m0_1|u_logic|It52z4~2_combout  ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (((\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & !\soc_inst|m0_1|u_logic|T50wx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|It52z4~2_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|T50wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|It52z4~2_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Cxhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cxhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~93_sumout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Cxhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~93_sumout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cxhvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|byte1~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte1~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|byte1~0 .lut_mask = 64'hFFBBBFBB33333733;
-defparam \soc_inst|ram_1|byte1~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y17_N56
-dffeas \soc_inst|ram_1|byte_select[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte1~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select [1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[1] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[1] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .lut_mask = 64'h0000AA880000FFCC;
+defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y15_N5
-dffeas \soc_inst|ram_1|read_cycle~DUPLICATE (
+// Location: FF_X33_Y18_N32
+dffeas \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|read_cycle~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -92355,94 +92523,95 @@ dffeas \soc_inst|ram_1|read_cycle~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|read_cycle~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|read_cycle~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|read_cycle~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N54
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[11]~3 (
+// Location: LABCELL_X30_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pfovx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[11]~3_combout  = ( !\soc_inst|interconnect_1|mux_sel [2] & ( (\soc_inst|ram_1|byte_select [1] & (\soc_inst|ram_1|read_cycle~DUPLICATE_q  & (!\soc_inst|interconnect_1|mux_sel [1] & \soc_inst|interconnect_1|mux_sel [0]))) ) )
+// \soc_inst|m0_1|u_logic|Pfovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jhy2z4~q  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vaw2z4~q  & ((!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q 
+// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jhy2z4~q  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vaw2z4~q  & ((!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|ram_1|byte_select [1]),
-	.datab(!\soc_inst|ram_1|read_cycle~DUPLICATE_q ),
-	.datac(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
+	.dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[11]~3 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[11]~3 .lut_mask = 64'h0010001000000000;
-defparam \soc_inst|interconnect_1|HRDATA[11]~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .lut_mask = 64'h00000000C8CCC0CC;
+defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y15_N33
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[10]~12 (
+// Location: LABCELL_X31_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ynhvx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[10]~12_combout  = ( \soc_inst|interconnect_1|HRDATA[11]~3_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[11]~3_combout  & ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[11]~3_combout  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ynhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout  & 
+// ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
 	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ynhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[10]~12 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[10]~12 .lut_mask = 64'hF0F00000F0F0FFFF;
-defparam \soc_inst|interconnect_1|HRDATA[10]~12 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .lut_mask = 64'hFFFFFFFF74747474;
+defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y15_N5
-dffeas \soc_inst|m0_1|u_logic|Dvy2z4 (
+// Location: FF_X31_Y14_N2
+dffeas \soc_inst|m0_1|u_logic|Itw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H5nvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ynhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Itw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dvy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dvy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Itw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Itw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N24
+// Location: LABCELL_X31_Y14_N3
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout  & 
-// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 )) ) )
+// \soc_inst|m0_1|u_logic|Dcsvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout ))) 
+// ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & \soc_inst|m0_1|u_logic|Qbpvx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -92452,22 +92621,22 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcsvx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .lut_mask = 64'h00000000F033F033;
+defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .lut_mask = 64'h0088008800BB00BB;
 defparam \soc_inst|m0_1|u_logic|Dcsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N57
+// Location: LABCELL_X31_Y14_N6
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H5nvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dcsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[10]~12_combout )))) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # ((!\soc_inst|interconnect_1|HRDATA[10]~12_combout )))) ) )
+// \soc_inst|m0_1|u_logic|H5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[10]~12_combout ) # (!\soc_inst|m0_1|u_logic|Vapvx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[10]~12_combout ) # (!\soc_inst|m0_1|u_logic|Vapvx4~combout )))) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcsvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -92477,66 +92646,22 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5nvx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .lut_mask = 64'h54FC54FC00000000;
+defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .lut_mask = 64'h54005400FC00FC00;
 defparam \soc_inst|m0_1|u_logic|H5nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ynhvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ynhvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((\soc_inst|interconnect_1|HRDATA[25]~1_combout  & !\soc_inst|interconnect_1|HRDATA[26]~0_combout )) 
-// ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26  & ( (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # ((\soc_inst|interconnect_1|HRDATA[26]~0_combout ) # (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a26 ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ynhvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .lut_mask = 64'hAFFFAFFFAFAAAFAA;
-defparam \soc_inst|m0_1|u_logic|Ynhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y15_N29
-dffeas \soc_inst|m0_1|u_logic|Itw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ynhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Itw2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Itw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Itw2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X45_Y15_N3
+// Location: LABCELL_X31_Y14_N24
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Itw2z4~q  & ( (\soc_inst|m0_1|u_logic|H5nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|M9y2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Itw2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & (\soc_inst|m0_1|u_logic|H5nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|M9y2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|H5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H5nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wfovx4~combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Itw2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Wfovx4~combout  & (\soc_inst|m0_1|u_logic|M9y2z4~q  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Itw2z4~q )))) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H5nvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Itw2z4~q ),
 	.datad(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Itw2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H5nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -92546,11 +92671,11 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H5nvx4~1 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .lut_mask = 64'h080C080C0A0F0A0F;
+defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .lut_mask = 64'h000000008ACF8ACF;
 defparam \soc_inst|m0_1|u_logic|H5nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y15_N4
+// Location: FF_X31_Y14_N26
 dffeas \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|H5nvx4~1_combout ),
@@ -92569,916 +92694,956 @@ defparam \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE .is_wysiwyg = "true";
 defparam \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~0 (
+// Location: MLABCELL_X28_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W28wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kxkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~q  & (((\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Csewx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Jky2z4~q  & (\soc_inst|m0_1|u_logic|Csewx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jky2z4~q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|W28wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .lut_mask = 64'h4C5D4C5D4C0C4C0C;
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W28wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W28wx4~0 .lut_mask = 64'hFFFFFFFFAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|W28wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tykwx4~0 (
+// Location: MLABCELL_X34_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ho3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tykwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C3z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~q ) # ((\soc_inst|m0_1|u_logic|I6z2z4~q  & ((!\soc_inst|m0_1|u_logic|W7z2z4~q ) # (\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Ho3wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tykwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .lut_mask = 64'h00000000CECFCECF;
-defparam \soc_inst|m0_1|u_logic|Tykwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .lut_mask = 64'h00C000C000000000;
+defparam \soc_inst|m0_1|u_logic|Ho3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y25_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tykwx4~1 (
+// Location: LABCELL_X31_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tykwx4~1_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Auk2z4~q ) # ((\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Tykwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ho3wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ho3wx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|W28wx4~0_combout  & (\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tykwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ho3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tykwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .lut_mask = 64'h0000000051505150;
-defparam \soc_inst|m0_1|u_logic|Tykwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .lut_mask = 64'h00030003000F000F;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~1 (
+// Location: LABCELL_X31_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qp3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kxkwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Qp3wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .lut_mask = 64'h00CC00CCFFFF00CC;
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Qp3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kxkwx4~2 (
+// Location: LABCELL_X31_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kxkwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Kxkwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout  & (!\soc_inst|m0_1|u_logic|Kxkwx4~0_combout  & !\soc_inst|m0_1|u_logic|Tykwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Qem2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kxkwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tykwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kxkwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .lut_mask = 64'h5000500000000000;
-defparam \soc_inst|m0_1|u_logic|Kxkwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y22_N11
-dffeas \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kxkwx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S61xx4~0 (
+// Location: LABCELL_X31_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S61xx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Df3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Df3wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jp3wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Df3wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S61xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S61xx4~0 .lut_mask = 64'h00000000000A000A;
-defparam \soc_inst|m0_1|u_logic|S61xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .lut_mask = 64'hC080C08000000000;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y19_N8
-dffeas \soc_inst|m0_1|u_logic|Jw73z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jw73z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jw73z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jw73z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X25_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~3 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Df3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Egkwx4~0_combout )) ) )
 
-// Location: FF_X34_Y22_N50
-dffeas \soc_inst|m0_1|u_logic|Art2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Hfyvx4~2_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Art2z4~q ),
-	.prn(vcc));
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Art2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Art2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~0 (
+// Location: MLABCELL_X25_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Art2z4~q  & ( (!\soc_inst|m0_1|u_logic|J0v2z4~q  & \soc_inst|m0_1|u_logic|R91xx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Art2z4~q  & ( ((!\soc_inst|m0_1|u_logic|J0v2z4~q  & 
-// \soc_inst|m0_1|u_logic|R91xx4~0_combout )) # (\soc_inst|m0_1|u_logic|T31xx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Df3wx4~3_combout ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Df3wx4~3_combout  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|J0v2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|R91xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T31xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Art2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .lut_mask = 64'h0AFF0AFF0A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .lut_mask = 64'h0F000F005F005F00;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~3 (
+// Location: LABCELL_X23_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Zu23z4~q  & ( \soc_inst|m0_1|u_logic|Rd53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Zu23z4~q  & ( !\soc_inst|m0_1|u_logic|Rd53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zu23z4~q  & ( !\soc_inst|m0_1|u_logic|Rd53z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q )) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Df3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zu23z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rd53z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .lut_mask = 64'h1100010010000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .lut_mask = 64'h0000000030FF30FF;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X27_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~5 (
+// Location: MLABCELL_X25_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Skh3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Djh3z4~q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Svk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Skh3z4~q  & ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Svk2z4~q  & ((!\soc_inst|m0_1|u_logic|Djh3z4~q ) # (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Ukpvx4~combout  & (\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|G27wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ukpvx4~combout  & (\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Djh3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Skh3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .lut_mask = 64'h00A8000800000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y25_N14
-dffeas \soc_inst|m0_1|u_logic|I443z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I443z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I443z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I443z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X29_Y19_N10
-dffeas \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .lut_mask = 64'h110011001F0F1F0F;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y25_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~2 (
+// Location: MLABCELL_X25_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I443z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|I443z4~q  & 
-// (\soc_inst|m0_1|u_logic|H3d3z4~q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~7_combout  = ( !\soc_inst|m0_1|u_logic|Df3wx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ffj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|I443z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .lut_mask = 64'h0400050004000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .lut_mask = 64'hBFAFBFAF00000000;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~4 (
+// Location: MLABCELL_X25_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|Hak2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|Vgq2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( !\soc_inst|m0_1|u_logic|Hak2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q )) 
-// # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Vgq2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (((!\soc_inst|m0_1|u_logic|Df3wx4~5_combout )))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vgq2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .lut_mask = 64'h8280000002000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .lut_mask = 64'h00000000E4F5E4F5;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~1 (
+// Location: MLABCELL_X25_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Df3wx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Kiq2z4~q  & ( \soc_inst|m0_1|u_logic|Ql13z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kiq2z4~q  & ( !\soc_inst|m0_1|u_logic|Ql13z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & 
-// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kiq2z4~q  & ( !\soc_inst|m0_1|u_logic|Ql13z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|T1d3z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Df3wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~4_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~4_combout  & ( 
+// \soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|interconnect_1|HREADY~0_combout  & !\soc_inst|m0_1|u_logic|Df3wx4~2_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Df3wx4~4_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~8_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Kiq2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ql13z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Df3wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Df3wx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .lut_mask = 64'h2800200008000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .lut_mask = 64'h0F0F0F0F0A000F0F;
+defparam \soc_inst|m0_1|u_logic|Df3wx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~6 (
+// Location: LABCELL_X22_Y18_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W0pvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Pdbwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~5_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ))) ) )
+// \soc_inst|m0_1|u_logic|W0pvx4~combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdbwx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pdbwx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pdbwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdbwx4~4_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W0pvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .lut_mask = 64'h8000800000000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W0pvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W0pvx4 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|W0pvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X34_Y19_N55
-dffeas \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE (
+// Location: FF_X33_Y18_N37
+dffeas \soc_inst|m0_1|u_logic|J4x2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cfzvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Imhvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|J4x2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|J4x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J4x2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~7 (
+// Location: LABCELL_X23_Y24_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K4mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~7_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~q  & !\soc_inst|m0_1|u_logic|Yx83z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|An63z4~q  & (!\soc_inst|m0_1|u_logic|H3d3z4~q  & \soc_inst|m0_1|u_logic|Yaz2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|K4mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jw93z4~q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0pvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jw93z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) # ((\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|P0pvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|An63z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yx83z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K4mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .lut_mask = 64'h0000000008080300;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
+defparam \soc_inst|m0_1|u_logic|K4mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4~8 (
+// Location: LABCELL_X23_Y24_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K4mvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|K4mvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|K4mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W0pvx4~combout  & ((!\soc_inst|m0_1|u_logic|Fvovx4~combout ) # ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|W0pvx4~combout  & (\soc_inst|m0_1|u_logic|J4x2z4~q  & ((!\soc_inst|m0_1|u_logic|Fvovx4~combout ) # (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|K4mvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .lut_mask = 64'hA8FCA8FC00000000;
+defparam \soc_inst|m0_1|u_logic|K4mvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X23_Y24_N22
+dffeas \soc_inst|m0_1|u_logic|Jw93z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|K4mvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jw93z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jw93z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jw93z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y22_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~8_combout  = ( \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pdbwx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hmh3z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pdbwx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Y21xx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C51xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hmh3z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xhbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fn33z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// ( !\soc_inst|m0_1|u_logic|Q713z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hmh3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fn33z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q713z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .lut_mask = 64'hA0AAF0FF00000000;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .lut_mask = 64'h0000FFFFFF00F0F0;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pdbwx4 (
+// Location: LABCELL_X24_Y24_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pdbwx4~combout  = ( \soc_inst|m0_1|u_logic|Pdbwx4~6_combout  & ( \soc_inst|m0_1|u_logic|Pdbwx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Pdbwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S61xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Jw73z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xhbwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|X563z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Ow43z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wd23z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S61xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ow43z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jw73z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pdbwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pdbwx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pdbwx4~8_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X563z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wd23z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pdbwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pdbwx4 .lut_mask = 64'h000000000000AF00;
-defparam \soc_inst|m0_1|u_logic|Pdbwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .lut_mask = 64'h00FF000055550F0F;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X28_Y16_N50
+dffeas \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y22_N7
+dffeas \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~0 (
+// Location: LABCELL_X27_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~combout )) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// (((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & !\soc_inst|m0_1|u_logic|R40wx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Pdbwx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|R40wx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Xhbwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cmn2z4~q  & !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Cmn2z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pdbwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Cmn2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .lut_mask = 64'hAFACAFACA3A0A3A0;
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .lut_mask = 64'hCCFFCC00F0FFF000;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Knvvx4~0 (
+// Location: LABCELL_X23_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xhbwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Knvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ny3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wzy2z4~q )) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ) # (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Xhbwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Xhbwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Xhbwx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Wzy2z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Xhbwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Xhbwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xhbwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xhbwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|m0_1|u_logic|Knvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .lut_mask = 64'h082A00002A2A2200;
+defparam \soc_inst|m0_1|u_logic|Xhbwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5mvx4~0 (
+// Location: LABCELL_X23_Y20_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qrnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T5mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Qrnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( \soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~q  & (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Jw93z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( !\soc_inst|m0_1|u_logic|Xhbwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|U4z2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) # (\soc_inst|m0_1|u_logic|Jw93z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jw93z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xhbwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T5mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .lut_mask = 64'h5555555555545554;
-defparam \soc_inst|m0_1|u_logic|T5mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .lut_mask = 64'h13DF10DC10DC10DC;
+defparam \soc_inst|m0_1|u_logic|Qrnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Imvvx4~0 (
+// Location: MLABCELL_X34_Y21_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uzvvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Imvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K3l2z4~q  & ( (\soc_inst|m0_1|u_logic|Wfuwx4~combout  & \soc_inst|m0_1|u_logic|Sx3wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Uzvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|J4x2z4~q  $ (((!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|J4x2z4~q  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|J4x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uzvvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .lut_mask = 64'h0000000003030303;
-defparam \soc_inst|m0_1|u_logic|Imvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .lut_mask = 64'hCCCCCCCC96669666;
+defparam \soc_inst|m0_1|u_logic|Uzvvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T5mvx4~1 (
+// Location: LABCELL_X24_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fvovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T5mvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ) # 
-// ((!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # (!\soc_inst|m0_1|u_logic|K3l2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Fvovx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( \soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & ( (((!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( \soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~101_sumout  & ( !\soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~101_sumout  & ( !\soc_inst|m0_1|u_logic|Uzvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Knvvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|T5mvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qrnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add5~101_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uzvvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .lut_mask = 64'h00FE00FEFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|T5mvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fvovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fvovx4 .lut_mask = 64'h0C0C0CFF5D5D5DFF;
+defparam \soc_inst|m0_1|u_logic|Fvovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y17_N29
-dffeas \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE (
+// Location: FF_X24_Y17_N55
+dffeas \soc_inst|ram_1|saved_word_address[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|T5mvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Fvovx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ),
+	.q(\soc_inst|ram_1|saved_word_address [0]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X50_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S4pwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|S4pwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B1a3z4~q  & ( \soc_inst|m0_1|u_logic|Uqi2z4~q  & ( (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|P2a3z4~q ) # 
-// (\soc_inst|m0_1|u_logic|X9n2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1a3z4~q  & ( \soc_inst|m0_1|u_logic|Uqi2z4~q  & ( \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|B1a3z4~q  & ( !\soc_inst|m0_1|u_logic|Uqi2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|P2a3z4~q  & \soc_inst|m0_1|u_logic|X9n2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1a3z4~q  & ( !\soc_inst|m0_1|u_logic|Uqi2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|P2a3z4~q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .lut_mask = 64'h3232223233333233;
-defparam \soc_inst|m0_1|u_logic|S4pwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|saved_word_address[0] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|saved_word_address[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~1 (
+// Location: LABCELL_X27_Y17_N42
+cyclonev_lcell_comb \soc_inst|ram_1|memory.raddr_a[0]~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X2rvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U5pwx4~0_combout  & !\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|I6pwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|B6pwx4~4_combout  & !\soc_inst|m0_1|u_logic|G2zwx4~1_combout ) ) )
+// \soc_inst|ram_1|memory.raddr_a[0]~0_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( (!\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|m0_1|u_logic|Fvovx4~combout ))) # (\soc_inst|ram_1|write_cycle~q  & (\soc_inst|ram_1|saved_word_address [0])) ) ) # ( 
+// !\soc_inst|ram_1|always1~0_combout  & ( \soc_inst|ram_1|saved_word_address [0] ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B6pwx4~4_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U5pwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G2zwx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|ram_1|write_cycle~q ),
+	.datac(!\soc_inst|ram_1|saved_word_address [0]),
+	.datad(!\soc_inst|m0_1|u_logic|Fvovx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I6pwx4~0_combout ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X2rvx4~1_combout ),
+	.combout(\soc_inst|ram_1|memory.raddr_a[0]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .lut_mask = 64'hAA00AA00F000F000;
-defparam \soc_inst|m0_1|u_logic|X2rvx4~1 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .lut_mask = 64'h0F0F0F0F03CF03CF;
+defparam \soc_inst|ram_1|memory.raddr_a[0]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2rvx4~2 (
+// Location: LABCELL_X36_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X2rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|X2rvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|E5owx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|X2rvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Q6mwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ((\soc_inst|m0_1|u_logic|C0zwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|E5owx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|S4pwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) # (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|P12wx4~combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Eacwx4~9_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ((!\soc_inst|m0_1|u_logic|P12wx4~combout ) # ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S4pwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C0zwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q6mwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|P12wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Eacwx4~9_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X2rvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .lut_mask = 64'h030A030A0F0A0F0A;
-defparam \soc_inst|m0_1|u_logic|X2rvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .lut_mask = 64'hE2F3E2F3E2C0E2C0;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tbnvx4~0 (
+// Location: LABCELL_X36_Y15_N27
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[24]~26 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[2]~14_combout  & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & (!\soc_inst|interconnect_1|HRDATA[2]~14_combout  & 
-// ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) )
+// \soc_inst|ram_1|data_to_memory[24]~26_combout  = ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & ( (\soc_inst|ram_1|write_cycle~q  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ) # 
+// (\soc_inst|ram_1|byte_select [3]))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & ( (!\soc_inst|ram_1|byte_select [3] & (\soc_inst|ram_1|write_cycle~q  & 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 )) ) ) ) # ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & ( (!\soc_inst|ram_1|byte_select [3] & (\soc_inst|ram_1|write_cycle~q  & 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & ( (!\soc_inst|ram_1|byte_select [3] & (\soc_inst|ram_1|write_cycle~q  & 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select [3]),
+	.datab(gnd),
+	.datac(!\soc_inst|ram_1|write_cycle~q ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ),
+	.datae(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[24]~26_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .lut_mask = 64'h8C8CAFAF8C00AF00;
-defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[24]~26 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[24]~26 .lut_mask = 64'h000A000A000A050F;
+defparam \soc_inst|ram_1|data_to_memory[24]~26 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X50_Y16_N49
-dffeas \soc_inst|m0_1|u_logic|Lbn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+// Location: M10K_X14_Y17_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 (
+	.portawe(\soc_inst|ram_1|write_cycle~q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[24]~26_combout ,\soc_inst|ram_1|data_to_memory[16]~25_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lbn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lbn2z4 .power_up = "low";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_bit_number = 16;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_bit_number = 16;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008F2ADA3A7D7EDFE7FF9CEB9CEF9CE6EEED02A23E65501442C15384568557845007D15400000000000000287D000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cqhvx4~0 (
+// Location: LABCELL_X31_Y15_N54
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[16]~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cqhvx4~0_combout  = (!\soc_inst|interconnect_1|HRDATA[18]~13_combout ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout )
+// \soc_inst|ram_1|data_to_memory[16]~25_combout  = ( \soc_inst|m0_1|u_logic|O24wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & !\soc_inst|ram_1|byte_select [2])) ) ) # 
+// ( !\soc_inst|m0_1|u_logic|O24wx4~0_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select [2]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
+	.datad(!\soc_inst|ram_1|byte_select [2]),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cqhvx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[16]~25_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .lut_mask = 64'hFFF0FFF0FFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|Cqhvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[16]~25 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[16]~25 .lut_mask = 64'h0333033303000300;
+defparam \soc_inst|ram_1|data_to_memory[16]~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y20_N23
-dffeas \soc_inst|m0_1|u_logic|Ahw2z4 (
+// Location: FF_X31_Y15_N44
+dffeas \soc_inst|switches_1|switch_store[1][8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cqhvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\SW[8]~input_o ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ahw2z4~q ),
+	.q(\soc_inst|switches_1|switch_store[1][8]~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ahw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ahw2z4 .power_up = "low";
+defparam \soc_inst|switches_1|switch_store[1][8] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][8] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~1 (
+// Location: LABCELL_X31_Y17_N33
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ahw2z4~q ) # ((\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Lbn2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
-//  & ( (\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Lbn2z4~q ) ) )
+// \soc_inst|interconnect_1|HRDATA[24]~6_combout  = ( \soc_inst|interconnect_1|HRDATA[9]~5_combout  & ( (!\soc_inst|interconnect_1|mux_sel [2] & ((!\soc_inst|interconnect_1|mux_sel [1]) # ((!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q  & 
+// \soc_inst|switches_1|half_word_address [0])))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[9]~5_combout  & ( (!\soc_inst|interconnect_1|mux_sel [1] & !\soc_inst|interconnect_1|mux_sel [2]) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ahw2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(!\soc_inst|interconnect_1|mux_sel [2]),
+	.datad(!\soc_inst|switches_1|half_word_address [0]),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[9]~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L7nvx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .lut_mask = 64'h50505050FF50FF50;
-defparam \soc_inst|m0_1|u_logic|L7nvx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~6 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~6 .lut_mask = 64'hC0C0C0C0C0E0C0E0;
+defparam \soc_inst|interconnect_1|HRDATA[24]~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~0 (
+// Location: LABCELL_X31_Y16_N6
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L7nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( (\soc_inst|interconnect_1|HRDATA[2]~14_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[2]~14_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+// \soc_inst|interconnect_1|HRDATA[24]~17_combout  = ( \soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q  & ( \soc_inst|interconnect_1|HRDATA[24]~6_combout  & ( ((\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & \soc_inst|ram_1|read_cycle~q )) # 
+// (\soc_inst|interconnect_1|mux_sel [1]) ) ) ) # ( !\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q  & ( \soc_inst|interconnect_1|HRDATA[24]~6_combout  & ( \soc_inst|interconnect_1|mux_sel [1] ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.dataa(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.datab(!\soc_inst|ram_1|read_cycle~q ),
+	.datac(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datad(gnd),
+	.datae(!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L7nvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .lut_mask = 64'hF0F3F0F300330033;
-defparam \soc_inst|m0_1|u_logic|L7nvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~17 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~17 .lut_mask = 64'h000000000F0F1F1F;
+defparam \soc_inst|interconnect_1|HRDATA[24]~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7nvx4~2 (
+// Location: LABCELL_X31_Y15_N42
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[24]~31 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L7nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|L7nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L7nvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[18]~13_combout ))) ) )
+// \soc_inst|interconnect_1|HRDATA[24]~31_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~17_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 )) # 
+// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[1][8]~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L7nvx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[18]~13_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a24 ),
+	.datad(!\soc_inst|switches_1|switch_store[1][8]~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L7nvx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .lut_mask = 64'hAAA0AAA000000000;
-defparam \soc_inst|m0_1|u_logic|L7nvx4~2 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~31 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[24]~31 .lut_mask = 64'h000000000C3F0C3F;
+defparam \soc_inst|interconnect_1|HRDATA[24]~31 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y20_N7
-dffeas \soc_inst|m0_1|u_logic|Viy2z4 (
+// Location: FF_X33_Y14_N49
+dffeas \soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|L7nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -93487,1993 +93652,2029 @@ dffeas \soc_inst|m0_1|u_logic|Viy2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Viy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Viy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~0 (
+// Location: MLABCELL_X34_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ggswx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Viy2z4~q  & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Viy2z4~q  & \soc_inst|m0_1|u_logic|Ahwvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Csewx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Csewx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Add1~9_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|W4y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~6  ))
+// \soc_inst|m0_1|u_logic|Add1~10  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|W4y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~6  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~6 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~9_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~10 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Add1~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~9 .lut_mask = 64'h0000000000005050;
+defparam \soc_inst|m0_1|u_logic|Add1~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kanvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kanvx4~0_combout  = ( \soc_inst|m0_1|u_logic|W4y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[7]~11_combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add1~9_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|interconnect_1|HRDATA[7]~11_combout  & 
+// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~9_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|W4y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add1~9_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|W4y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add1~9_sumout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add1~9_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ggswx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .lut_mask = 64'h3F3F3B3B00000A0A;
-defparam \soc_inst|m0_1|u_logic|Ggswx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .lut_mask = 64'h5550FFF04440CCC0;
+defparam \soc_inst|m0_1|u_logic|Kanvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~1 (
+// Location: FF_X34_Y15_N1
+dffeas \soc_inst|m0_1|u_logic|W4y2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Kanvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|W4y2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|W4y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|W4y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ggswx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Add1~21_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE_q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~10  ))
+// \soc_inst|m0_1|u_logic|Add1~22  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE_q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~10  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~10 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ggswx4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~21_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~22 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .lut_mask = 64'h0000AAAAF0F0FAFA;
-defparam \soc_inst|m0_1|u_logic|Ggswx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~21 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~21 .lut_mask = 64'h0000000000005050;
+defparam \soc_inst|m0_1|u_logic|Add1~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ggswx4~2 (
+// Location: LABCELL_X33_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Danvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ggswx4~2_combout  = ( \soc_inst|m0_1|u_logic|G2lwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ggswx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ggswx4~1_combout  & ((!\soc_inst|m0_1|u_logic|C9yvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|E4xvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Danvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K6y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~21_sumout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
+// (!\soc_inst|interconnect_1|HRDATA[8]~33_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K6y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~21_sumout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[8]~33_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|K6y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
+// (!\soc_inst|interconnect_1|HRDATA[8]~33_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K6y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
+// (!\soc_inst|interconnect_1|HRDATA[8]~33_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ggswx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ggswx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add1~21_sumout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .lut_mask = 64'h00000000C080C080;
-defparam \soc_inst|m0_1|u_logic|Ggswx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Danvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Danvx4~0 .lut_mask = 64'h00FAFAFA00C8C8C8;
+defparam \soc_inst|m0_1|u_logic|Danvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y22_N43
-dffeas \soc_inst|m0_1|u_logic|Yaz2z4 (
+// Location: FF_X33_Y14_N50
+dffeas \soc_inst|m0_1|u_logic|K6y2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ggswx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Danvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yaz2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K6y2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yaz2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yaz2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X34_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Htyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|U4z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Qi03z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|U4z2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Qi03z4~q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qi03z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htyvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .lut_mask = 64'h8880000008000000;
-defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K6y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K6y2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y24_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~1 (
+// Location: LABCELL_X35_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mohvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Htyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Wlz2z4~q )) ) ) ) 
-// # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cy33z4~q  & (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Mohvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~31_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[24]~31_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cy33z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wlz2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mohvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .lut_mask = 64'h0000202030000000;
-defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Mohvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y24_N16
-dffeas \soc_inst|m0_1|u_logic|L753z4~DUPLICATE (
+// Location: FF_X33_Y14_N23
+dffeas \soc_inst|m0_1|u_logic|Gqw2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Mohvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Gqw2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L753z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L753z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gqw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gqw2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y24_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~2 (
+// Location: LABCELL_X33_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Htyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|To23z4~q  & (\soc_inst|m0_1|u_logic|Kf13z4~q  & ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|To23z4~q  & ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kf13z4~q  & ((!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y91xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ) # (\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|V5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gqw2z4~q  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K6y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gqw2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Pfovx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Gqw2z4~q  & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K6y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gqw2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K6y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|To23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kf13z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L753z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K6y2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Gqw2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htyvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V5nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .lut_mask = 64'hF0FF303350551011;
-defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .lut_mask = 64'h22222222FFFF2222;
+defparam \soc_inst|m0_1|u_logic|V5nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~3 (
+// Location: LABCELL_X33_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Htyvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Htyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Htyvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Htyvx4~1_combout  & !\soc_inst|m0_1|u_logic|V7ywx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|V5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( \soc_inst|interconnect_1|HRDATA[8]~33_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Vapvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (\soc_inst|interconnect_1|HRDATA[8]~33_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vapvx4~combout  & ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bsy2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Htyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Htyvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V7ywx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~2_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|interconnect_1|HRDATA[8]~33_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V5nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .lut_mask = 64'h00000000A000A000;
-defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .shared_arith = "off";
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .lut_mask = 64'hAAAAAAFF000000FF;
+defparam \soc_inst|m0_1|u_logic|V5nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[1] (
+// Location: MLABCELL_X34_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwdata_o [1] = ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|V5nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|V5nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|V5nvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[24]~31_combout ))) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[24]~31_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V5nvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V5nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.combout(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .lut_mask = 64'hFC00FC0000000000;
+defparam \soc_inst|m0_1|u_logic|V5nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y20_N2
-dffeas \soc_inst|m0_1|u_logic|R0t2z4 (
+// Location: FF_X34_Y14_N7
+dffeas \soc_inst|m0_1|u_logic|Bsy2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.d(\soc_inst|m0_1|u_logic|V5nvx4~2_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R0t2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R0t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R0t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bsy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bsy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rexvx4~0 (
+// Location: LABCELL_X33_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rexvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G7x2z4~q  & ( (\soc_inst|m0_1|u_logic|G9w2z4~q  & \soc_inst|m0_1|u_logic|R0t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  $ (((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R0t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G7x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .lut_mask = 64'h0000000050145014;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~0 (
+// Location: LABCELL_X31_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|Kzxvx4~combout )) # (\soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .lut_mask = 64'h003300330F3F0F3F;
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X42_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ppsvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ppsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (!\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ppsvx4~0_combout  ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .lut_mask = 64'hFFFFFFCC00000000;
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .lut_mask = 64'h000F000F0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Una2z4~0 (
+// Location: LABCELL_X31_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Una2z4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Jm6wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Jm6wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jm6wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Una2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Una2z4~0 .lut_mask = 64'h0000000000004444;
-defparam \soc_inst|m0_1|u_logic|Una2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .lut_mask = 64'h0505050504000400;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~0 (
+// Location: LABCELL_X30_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gpjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q ) # ((!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Gpjwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & ((\soc_inst|m0_1|u_logic|H9i2z4~q ) # (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .lut_mask = 64'hFFFCFFFC00000000;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .lut_mask = 64'h50F050F000000000;
+defparam \soc_inst|m0_1|u_logic|Gpjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~1 (
+// Location: MLABCELL_X28_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ua6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C5c2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Ua6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C5c2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .lut_mask = 64'hFF00FF003F003F00;
-defparam \soc_inst|m0_1|u_logic|C5c2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|Ua6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z6c2z4~0 (
+// Location: MLABCELL_X28_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z6c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kzxvx4~combout  & \soc_inst|m0_1|u_logic|Y6t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ua6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ua6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .lut_mask = 64'h0000000000330033;
-defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~0 (
+// Location: LABCELL_X24_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Na6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C5c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Nsk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Na6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|T1xvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1xvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C5c2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .lut_mask = 64'h00FF00FF00F000F0;
-defparam \soc_inst|m0_1|u_logic|C5c2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .lut_mask = 64'h00000000F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Na6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~2 (
+// Location: LABCELL_X30_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C5c2z4~2_combout  = ( \soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C5c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ) # ((\soc_inst|m0_1|u_logic|O9qvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Z6c2z4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C5c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ) # (\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y6t2z4~q  & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Q86wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Na6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C5c2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Q86wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C5c2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .lut_mask = 64'hB0B0B0B0B0F0B0F0;
-defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .lut_mask = 64'h0000FAFA0000FA00;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~2 (
+// Location: LABCELL_X35_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rqywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Amjwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C5c2z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & (\soc_inst|m0_1|u_logic|Ppsvx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Una2z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Rqywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ye4wx4~combout  & \soc_inst|m0_1|u_logic|R1w2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|U7w2z4~q ) # (\soc_inst|m0_1|u_logic|Ye4wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ppsvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C5c2z4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .lut_mask = 64'h0000202000000000;
-defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .lut_mask = 64'hDDDDDDDD05050505;
+defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4 (
+// Location: LABCELL_X35_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ppsvx4~combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|I1c2z4~combout  & ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Jyb2z4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|I1c2z4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|C6mwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ye4wx4~combout  & !\soc_inst|m0_1|u_logic|Pwywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ye4wx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|I1c2z4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ppsvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ppsvx4 .lut_mask = 64'h00000000BABAB0B0;
-defparam \soc_inst|m0_1|u_logic|Ppsvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .lut_mask = 64'hAAAAAAAAAA00AA00;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~0 (
+// Location: LABCELL_X37_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S6ovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ppsvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Vsywx4~7_combout  = (\soc_inst|m0_1|u_logic|Vsywx4~6_combout  & !\soc_inst|m0_1|u_logic|Inb2z4~combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S6ovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .lut_mask = 64'h00000000F0A0F0A0;
-defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .lut_mask = 64'h0F000F000F000F00;
+defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~1 (
+// Location: LABCELL_X35_Y16_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S6ovx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|It52z4~2_combout  & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// \soc_inst|m0_1|u_logic|S6ovx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|It52z4~2_combout  & (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & !\soc_inst|m0_1|u_logic|N5qvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|It52z4~2_combout  & \soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & !\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|C6mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Tyywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vsywx4~7_combout  & ( 
+// \soc_inst|m0_1|u_logic|Tyywx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S6ovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .lut_mask = 64'h0F000F0202000202;
-defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .lut_mask = 64'h00FF00FF0FFF0FFF;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N48
-cyclonev_lcell_comb \soc_inst|ram_1|always1~0 (
+// Location: LABCELL_X35_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~3 (
 // Equation(s):
-// \soc_inst|ram_1|always1~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|interconnect_1|LessThan0~0_combout  & ( (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & (((\soc_inst|m0_1|u_logic|S6ovx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|S6ovx4~2_combout )) # (\soc_inst|m0_1|u_logic|E7mwx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|C6mwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Luywx4~6_combout  & (((\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & \soc_inst|m0_1|u_logic|Vsywx4~7_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Luywx4~6_combout  & (((\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & \soc_inst|m0_1|u_logic|Vsywx4~7_combout )) # (\soc_inst|m0_1|u_logic|N8b2z4~combout )))) # (\soc_inst|m0_1|u_logic|Gvywx4~0_combout ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Luywx4~6_combout  & (\soc_inst|m0_1|u_logic|N8b2z4~combout ))) # (\soc_inst|m0_1|u_logic|C6mwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
-	.datae(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.dataf(!\soc_inst|interconnect_1|LessThan0~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N8b2z4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C6mwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|always1~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|always1~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|always1~0 .lut_mask = 64'h0000000000004F00;
-defparam \soc_inst|ram_1|always1~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .lut_mask = 64'h111F1F1FFFFF1F1F;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N3
-cyclonev_lcell_comb \soc_inst|ram_1|read_cycle~0 (
+// Location: LABCELL_X35_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5mwx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|read_cycle~0_combout  = ( !\soc_inst|m0_1|u_logic|hwrite_o~0_combout  & ( \soc_inst|ram_1|always1~0_combout  ) )
+// \soc_inst|m0_1|u_logic|V5mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) # (\soc_inst|m0_1|u_logic|C6mwx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & !\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|ram_1|always1~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|read_cycle~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|read_cycle~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|read_cycle~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|ram_1|read_cycle~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .lut_mask = 64'h0F000F000F050F05;
+defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y15_N4
-dffeas \soc_inst|ram_1|read_cycle (
+// Location: FF_X35_Y16_N44
+dffeas \soc_inst|m0_1|u_logic|G9w2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|read_cycle~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|read_cycle~q ),
+	.q(\soc_inst|m0_1|u_logic|G9w2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|read_cycle .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|read_cycle .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G9w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G9w2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N6
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[6]~10 (
+// Location: LABCELL_X27_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xf6wx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[6]~10_combout  = ( \soc_inst|interconnect_1|mux_sel [0] & ( (\soc_inst|interconnect_1|HRDATA[6]~9_combout  & (((\soc_inst|ram_1|read_cycle~q  & \soc_inst|ram_1|byte_select[0]~DUPLICATE_q )) # 
-// (\soc_inst|interconnect_1|mux_sel [1]))) ) ) # ( !\soc_inst|interconnect_1|mux_sel [0] & ( (\soc_inst|interconnect_1|mux_sel [1] & \soc_inst|interconnect_1|HRDATA[6]~9_combout ) ) )
+// \soc_inst|m0_1|u_logic|Xf6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|G9w2z4~q  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & ((\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kzxvx4~combout ))) ) ) 
+// ) # ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G9w2z4~q  & ( ((\soc_inst|m0_1|u_logic|Kzxvx4~combout  & \soc_inst|m0_1|u_logic|L8t2z4~q )) # (\soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|ram_1|read_cycle~q ),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|ram_1|byte_select[0]~DUPLICATE_q ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[6]~9_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|mux_sel [0]),
+	.dataa(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[6]~10 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[6]~10 .lut_mask = 64'h0033003300370037;
-defparam \soc_inst|interconnect_1|HRDATA[6]~10 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y15_N5
-dffeas \soc_inst|switches_1|switch_store[0][5] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[5]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][5]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][5] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][5] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .lut_mask = 64'h00000F5F0000005F;
+defparam \soc_inst|m0_1|u_logic|Xf6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y14_N9
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[5]~28 (
+// Location: LABCELL_X33_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uijwx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[5]~28_combout  = ( \soc_inst|interconnect_1|Equal1~0_combout  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
-// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ((\soc_inst|switches_1|switch_store[0][5]~q ))) ) ) ) # ( !\soc_inst|interconnect_1|Equal1~0_combout  & ( 
-// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout ) ) ) ) # ( \soc_inst|interconnect_1|Equal1~0_combout  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
-// ((\soc_inst|switches_1|switch_store[0][5]~q ))) ) ) ) # ( !\soc_inst|interconnect_1|Equal1~0_combout  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
-// !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Uijwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|switches_1|switch_store[0][5]~q ),
-	.datae(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[5]~28 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[5]~28 .lut_mask = 64'h888888DDDDDD88DD;
-defparam \soc_inst|interconnect_1|HRDATA[5]~28 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .lut_mask = 64'hC000C0000C000C00;
+defparam \soc_inst|m0_1|u_logic|Uijwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y16_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yanvx4~0 (
+// Location: LABCELL_X31_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qf6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yanvx4~0_combout  = ( \soc_inst|m0_1|u_logic|F0y2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( !\soc_inst|interconnect_1|HRDATA[5]~28_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|F0y2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & !\soc_inst|interconnect_1|HRDATA[5]~28_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F0y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  ) ) # ( 
-// !\soc_inst|m0_1|u_logic|F0y2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Qf6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q  & (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yanvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qf6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .lut_mask = 64'hCCCCFFFFC0C0F0F0;
-defparam \soc_inst|m0_1|u_logic|Yanvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y16_N55
-dffeas \soc_inst|m0_1|u_logic|F0y2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Yanvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F0y2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F0y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F0y2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|m0_1|u_logic|Qf6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hphvx4~0 (
+// Location: LABCELL_X27_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Uv6wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hphvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[21]~29_combout  )
+// \soc_inst|m0_1|u_logic|Uv6wx4~combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & \soc_inst|interconnect_1|HREADY~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
+// (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hphvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .lut_mask = 64'hFFFFFFFFAAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|Hphvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y20_N40
-dffeas \soc_inst|m0_1|u_logic|Qlw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hphvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qlw2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qlw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qlw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Uv6wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Uv6wx4 .lut_mask = 64'h0F0A0F0A0A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Uv6wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~1 (
+// Location: LABCELL_X31_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qlw2z4~q ) # ((!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
-//  & ( (!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # (((!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qf6wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|H9i2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qlw2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qf6wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .lut_mask = 64'h00000000FFFBFFFB;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~0 (
+// Location: LABCELL_X31_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|interconnect_1|HRDATA[5]~28_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Lny2z4~q ) # ((\soc_inst|interconnect_1|HRDATA[5]~28_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Lu6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q86wx4~2_combout  & (((\soc_inst|m0_1|u_logic|U2x2z4~q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~q )) # (\soc_inst|m0_1|u_logic|H9i2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lu6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q86wx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[5]~28_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Q86wx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .lut_mask = 64'h0F0F0F0F070F070F;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6nvx4~2 (
+// Location: LABCELL_X31_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6nvx4~2_combout  = ( \soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( !\soc_inst|m0_1|u_logic|Q6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q6nvx4~1_combout  & !\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[21]~29_combout  & ( !\soc_inst|m0_1|u_logic|Q6nvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q6nvx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & (\soc_inst|m0_1|u_logic|Q86wx4~1_combout  & (\soc_inst|m0_1|u_logic|Bkxvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q6nvx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|HRDATA[21]~29_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q6nvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q86wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bkxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xf6wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .lut_mask = 64'hAAAAA0A000000000;
-defparam \soc_inst|m0_1|u_logic|Q6nvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .lut_mask = 64'h0000000002000200;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y18_N34
-dffeas \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Q6nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X31_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Q86wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Q86wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Q86wx4~4_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .lut_mask = 64'h00000000FF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gvrwx4~0 (
+// Location: LABCELL_X30_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Md6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gvrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( ((\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Md6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H9i2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Md6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .lut_mask = 64'h55FF77FF00000000;
-defparam \soc_inst|m0_1|u_logic|Gvrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|m0_1|u_logic|Md6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ctrwx4~0 (
+// Location: LABCELL_X30_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dc6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ctrwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & (!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|Gvrwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  
-// & ( (!\soc_inst|m0_1|u_logic|Xly2z4~q ) # ((\soc_inst|m0_1|u_logic|Nbm2z4~q  & (!\soc_inst|m0_1|u_logic|F0y2z4~q  & \soc_inst|m0_1|u_logic|Gvrwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Dc6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Md6wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|G97wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Md6wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|F0y2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffxvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Md6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ctrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dc6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .lut_mask = 64'hAABAAABA00300030;
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .lut_mask = 64'hA0A0A0A0A020A020;
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ctrwx4~1 (
+// Location: LABCELL_X31_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dc6wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ctrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( !\soc_inst|m0_1|u_logic|Ctrwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Surwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( !\soc_inst|m0_1|u_logic|Ctrwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Surwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Dc6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (\soc_inst|m0_1|u_logic|Dc6wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ae6wx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dc6wx4~0_combout  & !\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Surwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ctrwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dc6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ae6wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .lut_mask = 64'h5F5F131300000000;
-defparam \soc_inst|m0_1|u_logic|Ctrwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .lut_mask = 64'h0F000F0005000500;
+defparam \soc_inst|m0_1|u_logic|Dc6wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kghvx4~0 (
+// Location: MLABCELL_X28_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ((\soc_inst|m0_1|u_logic|I6z2z4~q ))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & 
-// (\soc_inst|m0_1|u_logic|Ctrwx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & (((\soc_inst|m0_1|u_logic|I6z2z4~q )))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & 
-// (\soc_inst|m0_1|u_logic|Ctrwx4~1_combout  & ((\soc_inst|m0_1|u_logic|I6z2z4~q ) # (\soc_inst|m0_1|u_logic|Cllwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ctrwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .lut_mask = 64'h01F301F303F303F3;
-defparam \soc_inst|m0_1|u_logic|Kghvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y21_N35
-dffeas \soc_inst|m0_1|u_logic|I6z2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kghvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6z2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I6z2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .lut_mask = 64'h0000000030303030;
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjewx4~0 (
+// Location: MLABCELL_X28_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iikwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fjewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( \soc_inst|m0_1|u_logic|I2t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|C3z2z4~q  & \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|C3z2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Auk2z4~q  & ( \soc_inst|m0_1|u_logic|I2t2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|C3z2z4~q  & \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( !\soc_inst|m0_1|u_logic|I2t2z4~q  & ( (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  
-// & (\soc_inst|m0_1|u_logic|C3z2z4~q  & \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Iikwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|W7hwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Hyy2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .lut_mask = 64'h000000050005055F;
-defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .lut_mask = 64'h0000000000200020;
+defparam \soc_inst|m0_1|u_logic|Iikwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjewx4~1 (
+// Location: LABCELL_X31_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q86wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fjewx4~1_combout  = ( \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|I6z2z4~q  & ((!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|W7z2z4~q ))) # (\soc_inst|m0_1|u_logic|I6z2z4~q  & (!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & !\soc_inst|m0_1|u_logic|W7z2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|I6z2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|W7z2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Q86wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Iikwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Q86wx4~5_combout  & ((\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ) # (\soc_inst|m0_1|u_logic|A4t2z4~q )))) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|Iikwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q86wx4~5_combout  & ((\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ) # (\soc_inst|m0_1|u_logic|A4t2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Q86wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dc6wx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q86wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .lut_mask = 64'hFFFEFFFEFEF8FEF8;
-defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .lut_mask = 64'h030F030F020A020A;
+defparam \soc_inst|m0_1|u_logic|Q86wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I1c2z4 (
+// Location: MLABCELL_X21_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eyhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I1c2z4~combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|G97wx4~0_combout  & \soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Eyhvx4~0_combout  = ( !\soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|m0_1|u_logic|Pdi2z4~q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pdi2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I1c2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I1c2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I1c2z4 .lut_mask = 64'h00000000000C000C;
-defparam \soc_inst|m0_1|u_logic|I1c2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpsvx4~0 (
+// Location: LABCELL_X35_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wpsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .lut_mask = 64'h0000000005110511;
-defparam \soc_inst|m0_1|u_logic|Wpsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .lut_mask = 64'h5555555500000000;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~0 (
+// Location: LABCELL_X35_Y14_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hyewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Scpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|I1c2z4~combout  & (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Jyb2z4~2_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|I1c2z4~combout  & \soc_inst|m0_1|u_logic|Jyb2z4~2_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Hyewx4~combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( (\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jky2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I1c2z4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hyewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .lut_mask = 64'h00000000C0C88088;
-defparam \soc_inst|m0_1|u_logic|Scpvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y15_N19
-dffeas \soc_inst|m0_1|u_logic|Dks2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Vytvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Dks2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dks2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Dks2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hyewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hyewx4 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Hyewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8b2z4 (
+// Location: LABCELL_X35_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N8b2z4~combout  = ( \soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dks2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Txa2z4~0_combout  )
+// \soc_inst|m0_1|u_logic|Jm6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyewx4~combout  & ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )) ) 
+// ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Dks2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N8b2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N8b2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N8b2z4 .lut_mask = 64'hFFFFFFFFFF00FF00;
-defparam \soc_inst|m0_1|u_logic|N8b2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .lut_mask = 64'h0000000000000030;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~5 (
+// Location: LABCELL_X35_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~5_combout  = ( \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H8l2z4~q  & (!\soc_inst|m0_1|u_logic|Usl2z4~q  & ((!\soc_inst|m0_1|u_logic|T7d3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H8l2z4~q  & ((!\soc_inst|m0_1|u_logic|T7d3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Usl2z4~q  & ((!\soc_inst|m0_1|u_logic|T7d3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Iuuvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T7d3z4~q ) # (!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~q  & !\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q ) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H8l2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Usl2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T7d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .lut_mask = 64'hFFF0CCC0AAA08880;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~5 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y18_N38
-dffeas \soc_inst|m0_1|u_logic|Svs2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Qztvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Svs2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Svs2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Svs2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .lut_mask = 64'hDD00DD00DC00DC00;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~3 (
+// Location: LABCELL_X35_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkb3z4~q  & (!\soc_inst|m0_1|u_logic|Svs2z4~q  & ((!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Zad3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kkb3z4~q  & ((!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Zad3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Svs2z4~q  & ((!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Zad3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Zad3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jm6wx4~4_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~4_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Jm6wx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Jm6wx4~4_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkb3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zad3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Svs2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .lut_mask = 64'hFAFAFA00C8C8C800;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .lut_mask = 64'h5555555500000040;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~2 (
+// Location: MLABCELL_X28_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ad7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~2_combout  = ( \soc_inst|m0_1|u_logic|Tib3z4~q  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z4l2z4~q  & (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Bmb3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tib3z4~q  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z4l2z4~q  & ((!\soc_inst|m0_1|u_logic|Bmb3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tib3z4~q  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Bmb3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tib3z4~q  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bmb3z4~q ) # (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ad7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pty2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bmb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z4l2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tib3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .lut_mask = 64'hFFAAF0A0CC88C080;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .lut_mask = 64'h0F0F0F0F05050505;
+defparam \soc_inst|m0_1|u_logic|Ad7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~4 (
+// Location: LABCELL_X23_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xt6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~4_combout  = ( \soc_inst|m0_1|u_logic|Qrp2z4~q  & ( \soc_inst|m0_1|u_logic|P2a3z4~q  & ( (\soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q 
-//  & \soc_inst|m0_1|u_logic|Uqi2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qrp2z4~q  & ( \soc_inst|m0_1|u_logic|P2a3z4~q  & ( (\soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Uqi2z4~q  & \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qrp2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|P2a3z4~q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Uqi2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qrp2z4~q  & ( !\soc_inst|m0_1|u_logic|P2a3z4~q  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sta2z4~0_combout  & (\soc_inst|m0_1|u_logic|Uqi2z4~q  & \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Xt6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Zei2z4~q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  $ (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  $ (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Uqi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qrp2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zei2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .lut_mask = 64'h0001110122013301;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .lut_mask = 64'h0066006600600060;
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~0 (
+// Location: LABCELL_X23_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q07wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uls2z4~q  & (!\soc_inst|m0_1|u_logic|Bjd3z4~q  & ((!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vfd3z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bjd3z4~q  & ((!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vfd3z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uls2z4~q  & ((!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Vfd3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Txa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pguvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Vfd3z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Q07wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Uls2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vfd3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bjd3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Txa2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q07wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .lut_mask = 64'hFAFAC8C8FA00C800;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .lut_mask = 64'hCCCCCCCCFF00FF00;
+defparam \soc_inst|m0_1|u_logic|Q07wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~1 (
+// Location: LABCELL_X24_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X07wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cps2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Cps2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|X07wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Idk2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Idk2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Zxpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Idk2z4~q ) # (!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|S17wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Idk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Idk2z4~q ) # (!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cps2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zxpvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|S17wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X07wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .lut_mask = 64'hFFAACC88F0A0C080;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X07wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X07wx4~0 .lut_mask = 64'hFCA8A8000C080800;
+defparam \soc_inst|m0_1|u_logic|X07wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~6 (
+// Location: FF_X29_Y15_N32
+dffeas \soc_inst|m0_1|u_logic|Gci2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Cb3wx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Z9zvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gci2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gci2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gci2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q07wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~6_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vsywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Vsywx4~5_combout  & (\soc_inst|m0_1|u_logic|Vsywx4~3_combout  & 
-// (\soc_inst|m0_1|u_logic|Vsywx4~2_combout  & !\soc_inst|m0_1|u_logic|Vsywx4~4_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Q07wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (((\soc_inst|m0_1|u_logic|Wai2z4~q )) # (\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (((\soc_inst|m0_1|u_logic|Gci2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Y5zvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (\soc_inst|m0_1|u_logic|Fc7wx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Wai2z4~q )))) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (((\soc_inst|m0_1|u_logic|Gci2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vsywx4~5_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vsywx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vsywx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Vsywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vsywx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fc7wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gci2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Y5zvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q07wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .lut_mask = 64'h0000000000000100;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .lut_mask = 64'h5303530353F353F3;
+defparam \soc_inst|m0_1|u_logic|Q07wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Inb2z4 (
+// Location: LABCELL_X23_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xt6wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Inb2z4~combout  = ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vgs2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  = ( \soc_inst|m0_1|u_logic|X07wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Q07wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X07wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q07wx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|X07wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q07wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Dtpvx4~1_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vgs2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xt6wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q07wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zqpvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dtpvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|X07wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q07wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Inb2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Inb2z4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Inb2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .lut_mask = 64'hFAAA0000C8883222;
+defparam \soc_inst|m0_1|u_logic|Xt6wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~4 (
+// Location: LABCELL_X23_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P28wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~4_combout  = ( !\soc_inst|m0_1|u_logic|G8n2z4~q  & ( \soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdb3z4~q ) # ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout 
-// )))) # (\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Pab3z4~q  & ((!\soc_inst|m0_1|u_logic|Xdb3z4~q ) # (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|G8n2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdb3z4~q ) # ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Pab3z4~q  & ((!\soc_inst|m0_1|u_logic|Xdb3z4~q ) # (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G8n2z4~q  & ( !\soc_inst|m0_1|u_logic|Jruvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdb3z4~q ) # ((!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Kwa2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Pab3z4~q  & ((!\soc_inst|m0_1|u_logic|Xdb3z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|P28wx4~combout  = ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( \soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & 
+// ((\soc_inst|m0_1|u_logic|Wai2z4~q ))) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (!\soc_inst|m0_1|u_logic|Igi2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( 
+// !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Qb3wx4~combout  & ((!\soc_inst|m0_1|u_logic|Wai2z4~q ))) # (\soc_inst|m0_1|u_logic|Qb3wx4~combout  & (!\soc_inst|m0_1|u_logic|Igi2z4~q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Z78wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|N88wx4~16_combout  & ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Qb3wx4~combout  & !\soc_inst|m0_1|u_logic|Igi2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kwa2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xdb3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Oxuvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pab3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|G8n2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jruvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qb3wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Igi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Z78wx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N88wx4~16_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P28wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~4 .lut_mask = 64'hFCA8FCA8FCA80000;
-defparam \soc_inst|m0_1|u_logic|Luywx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P28wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P28wx4 .lut_mask = 64'hBB441BE4B14E11EE;
+defparam \soc_inst|m0_1|u_logic|P28wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~3 (
+// Location: LABCELL_X23_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jm6wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kss2z4~q  & (!\soc_inst|m0_1|u_logic|Mis2z4~q  & ((!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jxs2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kss2z4~q  & ((!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jxs2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mis2z4~q  & ((!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Jxs2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yauvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mxa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Jxs2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  = ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( \soc_inst|m0_1|u_logic|P28wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & ((!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Bsy2z4~q  $ (\soc_inst|m0_1|u_logic|Ad7wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( \soc_inst|m0_1|u_logic|P28wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|P28wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ) # (!\soc_inst|m0_1|u_logic|Bsy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|P28wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kss2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mis2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K9vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jxs2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yauvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mxa2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jm6wx4~6_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jm6wx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P28wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~3 .lut_mask = 64'hFFF0CCC0AAA08880;
-defparam \soc_inst|m0_1|u_logic|Luywx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .lut_mask = 64'hB0B0E0E0B0B0E0B0;
+defparam \soc_inst|m0_1|u_logic|Jm6wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~0 (
+// Location: LABCELL_X23_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eyhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~0_combout  = ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lns2z4~q  & (!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Axm2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lns2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Axm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Axm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K9ovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jsa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Axm2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Eyhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Eyhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Eyhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Q86wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eyhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~7_combout  ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Eyhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jm6wx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Q86wx4~6_combout  & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Jm6wx4~3_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lns2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Iuuvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Axm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|K9ovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jsa2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jm6wx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q86wx4~6_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Eyhvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~0 .lut_mask = 64'hFFF0CCC0AAA08880;
-defparam \soc_inst|m0_1|u_logic|Luywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .lut_mask = 64'h00F4FFFF00FCFFFF;
+defparam \soc_inst|m0_1|u_logic|Eyhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~5 (
+// Location: FF_X23_Y15_N1
+dffeas \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Eyhvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpzvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~5_combout  = ( \soc_inst|m0_1|u_logic|B1a3z4~q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aqp2z4~q )) # (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|X9n2z4~q ))))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|B1a3z4~q  & ( \soc_inst|m0_1|u_logic|Sta2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aqp2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|X9n2z4~q ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Bpzvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bpzvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aqp2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|X9n2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~5 .lut_mask = 64'h0000000004158C9D;
-defparam \soc_inst|m0_1|u_logic|Luywx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .lut_mask = 64'h00000F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Bpzvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~2 (
+// Location: LABCELL_X27_Y22_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gcb3z4~q  & (!\soc_inst|m0_1|u_logic|Bus2z4~q  & ((!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ) 
-// # (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gcb3z4~q  & ((!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bus2z4~q  & ((!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wva2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|I30wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Rryvx4~0_combout  & ( \soc_inst|m0_1|u_logic|R40wx4~combout  & ( \soc_inst|m0_1|u_logic|Bpzvx4~1_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Rryvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( (\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rryvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Shyvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gcb3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bus2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ckuvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wva2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mhvvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I30wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~2 .lut_mask = 64'hFFCCF0C0AA88A080;
-defparam \soc_inst|m0_1|u_logic|Luywx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~1 .lut_mask = 64'h0F0F3F3F00003333;
+defparam \soc_inst|m0_1|u_logic|I30wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~1 (
+// Location: LABCELL_X27_Y22_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I30wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q6l2z4~q  & (!\soc_inst|m0_1|u_logic|Pcd3z4~q  & ((!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ) 
-// # (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q6l2z4~q  & ((!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pcd3z4~q  & ((!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ruvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Douvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|I30wx4~2_combout  = ( \soc_inst|m0_1|u_logic|I30wx4~0_combout  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|I30wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Add5~33_sumout ) # 
+// (\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Q6l2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pguvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pcd3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ruvvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Douvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I30wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~33_sumout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|I30wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~1 .lut_mask = 64'hFAFAFA00C8C8C800;
-defparam \soc_inst|m0_1|u_logic|Luywx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I30wx4~2 .lut_mask = 64'h000000000000A2A2;
+defparam \soc_inst|m0_1|u_logic|I30wx4~2 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X24_Y20_N55
+dffeas \soc_inst|m0_1|u_logic|X6m2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|X6m2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|X6m2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|X6m2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X19_Y22_N7
+dffeas \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J5m2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X24_Y20_N49
+dffeas \soc_inst|m0_1|u_logic|Gf43z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Gf43z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Gf43z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gf43z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X23_Y21_N37
+dffeas \soc_inst|m0_1|u_logic|Po53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Po53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Po53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Po53z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Luywx4~6 (
+// Location: LABCELL_X18_Y22_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Luywx4~6_combout  = ( \soc_inst|m0_1|u_logic|Luywx4~2_combout  & ( \soc_inst|m0_1|u_logic|Luywx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Luywx4~4_combout  & (\soc_inst|m0_1|u_logic|Luywx4~3_combout  & 
-// (\soc_inst|m0_1|u_logic|Luywx4~0_combout  & !\soc_inst|m0_1|u_logic|Luywx4~5_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|R40wx4~2_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Bv03z4~q  & ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Bv03z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|X533z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Bv03z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|Bv03z4~q  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|X533z4~q )) 
+// ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Luywx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Luywx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Luywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Luywx4~5_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Luywx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Luywx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|X533z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bv03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R40wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Luywx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Luywx4~6 .lut_mask = 64'h0000000000000100;
-defparam \soc_inst|m0_1|u_logic|Luywx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~2 .lut_mask = 64'h00050F0F50550F0F;
+defparam \soc_inst|m0_1|u_logic|R40wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypa2z4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ypa2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( \soc_inst|m0_1|u_logic|P2a3z4~q  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~q  & (!\soc_inst|m0_1|u_logic|N8b2z4~combout  & ((!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ) # 
-// (\soc_inst|m0_1|u_logic|Inb2z4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( \soc_inst|m0_1|u_logic|P2a3z4~q  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~q  & ((!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ) # 
-// (\soc_inst|m0_1|u_logic|Inb2z4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( !\soc_inst|m0_1|u_logic|P2a3z4~q  & ( (!\soc_inst|m0_1|u_logic|B1a3z4~q  & !\soc_inst|m0_1|u_logic|N8b2z4~combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Luywx4~6_combout  & ( !\soc_inst|m0_1|u_logic|P2a3z4~q  & ( !\soc_inst|m0_1|u_logic|B1a3z4~q  ) ) )
+// Location: FF_X18_Y22_N13
+dffeas \soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|I30wx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1a3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|N8b2z4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X17_Y18_N41
+dffeas \soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Hyz2z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .lut_mask = 64'hAAAA8888A0AA8088;
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Poa2z4~0 (
+// Location: LABCELL_X19_Y21_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Poa2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|R40wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R40wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .lut_mask = 64'h000000000C0C0000;
-defparam \soc_inst|m0_1|u_logic|Poa2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~1 .lut_mask = 64'h33440333FF440333;
+defparam \soc_inst|m0_1|u_logic|R40wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ik4wx4~0 (
+// Location: LABCELL_X23_Y21_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|W7hwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|R40wx4~0_combout  = ( \soc_inst|m0_1|u_logic|R40wx4~2_combout  & ( \soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Po53z4~q  & (\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|R40wx4~2_combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gf43z4~q  & (!\soc_inst|m0_1|u_logic|Svk2z4~q  & !\soc_inst|m0_1|u_logic|T1d3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|R40wx4~2_combout  & 
+// ( !\soc_inst|m0_1|u_logic|R40wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Gf43z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Po53z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|R40wx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ik4wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R40wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .lut_mask = 64'hFFFFEFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4~0 .lut_mask = 64'hFF00A00000000C00;
+defparam \soc_inst|m0_1|u_logic|R40wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bk4wx4 (
+// Location: LABCELL_X23_Y21_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R40wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bk4wx4~combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Rngwx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|R40wx4~combout  = ( \soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fzxwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X6m2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C51xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|R40wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fzxwx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ) # (\soc_inst|m0_1|u_logic|X6m2z4~q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|X6m2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y21xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fzxwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|C51xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R40wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|R40wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bk4wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bk4wx4 .lut_mask = 64'h0000000003000300;
-defparam \soc_inst|m0_1|u_logic|Bk4wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R40wx4 .lut_mask = 64'hDD000D0000000000;
+defparam \soc_inst|m0_1|u_logic|R40wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ik4wx4~1 (
+// Location: MLABCELL_X34_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[11]~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ik4wx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ik4wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ik4wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( !\soc_inst|m0_1|u_logic|Bk4wx4~combout  & ( \soc_inst|m0_1|u_logic|Ik4wx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  = ( \soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wq5wx4~combout ) # (\soc_inst|m0_1|u_logic|R40wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Gm1wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|R40wx4~combout  & \soc_inst|m0_1|u_logic|Wq5wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ik4wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|R40wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wq5wx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gm1wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .lut_mask = 64'h00FF00FF00A800D8;
-defparam \soc_inst|m0_1|u_logic|Ik4wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .lut_mask = 64'h000F000FFF0FFF0F;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[11]~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xtywx4~0 (
+// Location: MLABCELL_X34_Y17_N12
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[11]~17 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xtywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Cam2z4~q  & (!\soc_inst|m0_1|u_logic|G0w2z4~q  & ((!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|ram_1|data_to_memory[11]~17_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & (!\soc_inst|ram_1|byte_select [1] & \soc_inst|ram_1|write_cycle~DUPLICATE_q )) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((\soc_inst|ram_1|byte_select [1]) # (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
+	.datab(!\soc_inst|ram_1|byte_select [1]),
+	.datac(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[11]~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[11]~17_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .lut_mask = 64'h0B00FFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Xtywx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[11]~17 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[11]~17 .lut_mask = 64'h0707070704040404;
+defparam \soc_inst|ram_1|data_to_memory[11]~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ypa2z4~1 (
+// Location: LABCELL_X30_Y17_N27
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[11]~24 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  = ( \soc_inst|m0_1|u_logic|P2a3z4~q  & ( \soc_inst|m0_1|u_logic|Xtywx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|P2a3z4~q  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & (!\soc_inst|m0_1|u_logic|Inb2z4~combout  & 
-// \soc_inst|m0_1|u_logic|Vsywx4~6_combout )) ) )
+// \soc_inst|interconnect_1|HRDATA[11]~24_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P2a3z4~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .lut_mask = 64'h0030003033333333;
-defparam \soc_inst|m0_1|u_logic|Ypa2z4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[11]~24 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[11]~24 .lut_mask = 64'hF000F000FF0FFF0F;
+defparam \soc_inst|interconnect_1|HRDATA[11]~24 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~0 (
+// Location: MLABCELL_X34_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~25 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) # 
-// ((\soc_inst|m0_1|u_logic|C34wx4~0_combout  & \soc_inst|m0_1|u_logic|Ypa2z4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) # (\soc_inst|m0_1|u_logic|C34wx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Add1~25_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~22  ))
+// \soc_inst|m0_1|u_logic|Add1~26  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Y7y2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~22  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~22 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~25_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .lut_mask = 64'h0000AA220000AA02;
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~25 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~25 .lut_mask = 64'h0000000000005500;
+defparam \soc_inst|m0_1|u_logic|Add1~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~0 (
+// Location: MLABCELL_X34_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W9nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|It52z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Fcj2z4~q  & (!\soc_inst|m0_1|u_logic|Tyx2z4~q )) # (\soc_inst|m0_1|u_logic|Fcj2z4~q  & ((!\soc_inst|m0_1|u_logic|Hxx2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fcj2z4~q  & (!\soc_inst|m0_1|u_logic|Tyx2z4~q )) # (\soc_inst|m0_1|u_logic|Fcj2z4~q  & ((!\soc_inst|m0_1|u_logic|Hxx2z4~q ))))) ) )
+// \soc_inst|m0_1|u_logic|W9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y7y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~25_sumout  & ((!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & (!\soc_inst|m0_1|u_logic|Add1~25_sumout  & 
+// ((!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Y7y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Y7y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[9]~16_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add1~25_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|It52z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W9nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It52z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|It52z4~0 .lut_mask = 64'h00AC00ACACACACAC;
-defparam \soc_inst|m0_1|u_logic|It52z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .lut_mask = 64'h3322FFAA3020F0A0;
+defparam \soc_inst|m0_1|u_logic|W9nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ipsvx4~0 (
+// Location: FF_X34_Y16_N55
+dffeas \soc_inst|m0_1|u_logic|Y7y2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|W9nvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y7y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y7y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~29 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ipsvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Add1~29_sumout  = SUM(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|M9y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~26  ))
+// \soc_inst|m0_1|u_logic|Add1~30  = CARRY(( VCC ) + ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|M9y2z4~q ) ) + ( \soc_inst|m0_1|u_logic|Add1~26  ))
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~29_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Ipsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~29 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~29 .lut_mask = 64'h0000AAFF0000FFFF;
+defparam \soc_inst|m0_1|u_logic|Add1~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~1 (
+// Location: MLABCELL_X34_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Add1~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|It52z4~1_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|It52z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fcj2z4~q  & !\soc_inst|m0_1|u_logic|Vaw2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|It52z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Fcj2z4~q  & !\soc_inst|m0_1|u_logic|Vaw2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|It52z4~0_combout  & !\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ) 
-// ) )
+// \soc_inst|m0_1|u_logic|Add1~13_sumout  = SUM(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Bby2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~30  ))
+// \soc_inst|m0_1|u_logic|Add1~14  = CARRY(( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Bby2z4~q ) ) + ( VCC ) + ( \soc_inst|m0_1|u_logic|Add1~30  ))
 
-	.dataa(!\soc_inst|m0_1|u_logic|It52z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|m0_1|u_logic|Add1~30 ),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|It52z4~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|m0_1|u_logic|Add1~13_sumout ),
+	.cout(\soc_inst|m0_1|u_logic|Add1~14 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It52z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|It52z4~1 .lut_mask = 64'h88888888F888F888;
-defparam \soc_inst|m0_1|u_logic|It52z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Add1~13 .lut_mask = 64'h0000000000005050;
+defparam \soc_inst|m0_1|u_logic|Add1~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7mwx4 (
+// Location: MLABCELL_X34_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I9nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E7mwx4~combout  = ( \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|It52z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Scpvx4~0_combout  & (\soc_inst|m0_1|u_logic|Z5pvx4~3_combout  & 
-// \soc_inst|m0_1|u_logic|hprot_o~5_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|It52z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Scpvx4~0_combout  & (\soc_inst|m0_1|u_logic|Z5pvx4~3_combout  & 
-// (!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|hprot_o~5_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|I9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bby2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~24_combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add1~13_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bby2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~24_combout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # (!\soc_inst|m0_1|u_logic|Add1~13_sumout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bby2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add1~13_sumout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bby2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add1~13_sumout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|It52z4~1_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add1~13_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|I9nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E7mwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E7mwx4 .lut_mask = 64'h0000000000100011;
-defparam \soc_inst|m0_1|u_logic|E7mwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .lut_mask = 64'h0F0CFFCC0A08AA88;
+defparam \soc_inst|m0_1|u_logic|I9nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y18_N56
-dffeas \soc_inst|m0_1|u_logic|Vaw2z4 (
+// Location: FF_X34_Y15_N7
+dffeas \soc_inst|m0_1|u_logic|Bby2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|I9nvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Bby2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vaw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Vaw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bby2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bby2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pfovx4~0 (
+// Location: MLABCELL_X34_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B9nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pfovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Vaw2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Vaw2z4~q  & ((!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Jhy2z4~q  & !\soc_inst|m0_1|u_logic|Fcj2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|B9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qcy2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~1_sumout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
+// (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~1_sumout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # (!\soc_inst|interconnect_1|HRDATA[12]~22_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qcy2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
+// (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qcy2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) # 
+// (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add1~1_sumout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B9nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .lut_mask = 64'h00000000E0A0F0F0;
-defparam \soc_inst|m0_1|u_logic|Pfovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .lut_mask = 64'h00FCFCFC00A8A8A8;
+defparam \soc_inst|m0_1|u_logic|B9nvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y16_N1
+dffeas \soc_inst|m0_1|u_logic|Qcy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|B9nvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qcy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qcy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N6
+// Location: LABCELL_X30_Y14_N36
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Knhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Knhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout  & 
-// ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Knhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[26]~0_combout  & ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) 
+// ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[26]~0_combout  & ( \soc_inst|interconnect_1|HRDATA[25]~1_combout  ) ) # ( \soc_inst|interconnect_1|HRDATA[26]~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( 
+// (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) ) ) # ( !\soc_inst|interconnect_1|HRDATA[26]~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datae(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -95483,11 +95684,11 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Knhvx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .lut_mask = 64'hFFFFFFFF33F033F0;
+defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .lut_mask = 64'hFF00FFCCFFFFFFCC;
 defparam \soc_inst|m0_1|u_logic|Knhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y15_N8
+// Location: FF_X30_Y14_N37
 dffeas \soc_inst|m0_1|u_logic|Mww2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Knhvx4~0_combout ),
@@ -95506,16 +95707,16 @@ defparam \soc_inst|m0_1|u_logic|Mww2z4 .is_wysiwyg = "true";
 defparam \soc_inst|m0_1|u_logic|Mww2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N30
+// Location: MLABCELL_X34_Y14_N24
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zgsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zgsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout  & 
-// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 )) ) )
+// \soc_inst|m0_1|u_logic|Zgsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout  & 
+// ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ))) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
 	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a28 ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.datag(gnd),
@@ -95527,22 +95728,22 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zgsvx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .lut_mask = 64'h00000000CF03CF03;
+defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .lut_mask = 64'h00000000CC0FCC0F;
 defparam \soc_inst|m0_1|u_logic|Zgsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N12
+// Location: MLABCELL_X34_Y14_N18
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T4nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[12]~22_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # (!\soc_inst|interconnect_1|HRDATA[12]~22_combout )))) ) )
+// \soc_inst|m0_1|u_logic|T4nvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zgsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Vapvx4~combout  & (((\soc_inst|m0_1|u_logic|Hyy2z4~q )) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Vapvx4~combout  & (!\soc_inst|interconnect_1|HRDATA[12]~22_combout  & ((\soc_inst|m0_1|u_logic|Hyy2z4~q ) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout )))) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[12]~22_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zgsvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -95552,1632 +95753,1485 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4nvx4~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .lut_mask = 64'h32003200FA00FA00;
+defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .lut_mask = 64'h3F2A3F2A00000000;
 defparam \soc_inst|m0_1|u_logic|T4nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N48
+// Location: MLABCELL_X25_Y15_N27
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T4nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|T4nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Qcy2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & (\soc_inst|m0_1|u_logic|Mww2z4~q  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Qcy2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|T4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|T4nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qcy2z4~q  & (!\soc_inst|m0_1|u_logic|Wfovx4~combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mww2z4~q )))) 
+// # (\soc_inst|m0_1|u_logic|Qcy2z4~q  & (((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mww2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mww2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mww2z4~q ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|T4nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .lut_mask = 64'h00000000BB0BBB0B;
-defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y20_N49
-dffeas \soc_inst|m0_1|u_logic|Hyy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hyy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Hyy2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X48_Y24_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ocfwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ocfwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Hyy2z4~q ))) ) 
-// )
-
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .lut_mask = 64'h0010001000000000;
-defparam \soc_inst|m0_1|u_logic|Ocfwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X47_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rafwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rafwx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1d2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Nqy2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|R1d2z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Fbfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Ocfwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|R1d2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fbfwx4~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .lut_mask = 64'h00000000BFBF0F0F;
-defparam \soc_inst|m0_1|u_logic|Rafwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X30_Y22_N29
-dffeas \soc_inst|m0_1|u_logic|Rni2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Rafwx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Yafwx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rni2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rni2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X37_Y23_N7
-dffeas \soc_inst|m0_1|u_logic|Po83z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wcyvx4~3_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Po83z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Po83z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Po83z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X27_Y23_N43
-dffeas \soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Gf73z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Tw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ylbwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Po83z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// ( \soc_inst|m0_1|u_logic|Gju2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Ajn2z4~q  ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Po83z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ajn2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gju2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .lut_mask = 64'h33330F0F00FF5555;
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X24_Y19_N35
-dffeas \soc_inst|m0_1|u_logic|Mhn2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Kv1wx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Mhn2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Mhn2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X24_Y19_N14
-dffeas \soc_inst|m0_1|u_logic|Psv2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Rv1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Psv2z4~q ),
-	.prn(vcc));
+	.combout(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Psv2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Psv2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .lut_mask = 64'h00000000D0DDD0DD;
+defparam \soc_inst|m0_1|u_logic|T4nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X24_Y19_N2
-dffeas \soc_inst|m0_1|u_logic|Yfn2z4 (
+// Location: FF_X25_Y15_N29
+dffeas \soc_inst|m0_1|u_logic|Hyy2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Cr1wx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|T4nvx4~1_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Ax1wx4~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yfn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yfn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yfn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hyy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hyy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4~0 (
+// Location: MLABCELL_X25_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ylbwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vu93z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (\soc_inst|m0_1|u_logic|Yfn2z4~q ) # (\soc_inst|m0_1|u_logic|Sjj2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vu93z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & \soc_inst|m0_1|u_logic|Yfn2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Vu93z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Mhn2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Psv2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Vu93z4~q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Mhn2z4~q )) # (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((\soc_inst|m0_1|u_logic|Psv2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ekc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q 
+// ) # (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mhn2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Psv2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Yfn2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Vu93z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ekc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .lut_mask = 64'h4747474700CC33FF;
-defparam \soc_inst|m0_1|u_logic|Ylbwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .lut_mask = 64'h000C00C0004C004C;
+defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylbwx4 (
+// Location: MLABCELL_X25_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ylbwx4~combout  = ( !\soc_inst|m0_1|u_logic|Ylbwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ylbwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & !\soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ylbwx4~1_combout  
-// & ( !\soc_inst|m0_1|u_logic|Ylbwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rni2z4~q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ylbwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rni2z4~q  
-// ) ) )
+// \soc_inst|m0_1|u_logic|Skc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & !\soc_inst|m0_1|u_logic|L8t2z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ylbwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ylbwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Skc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylbwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylbwx4 .lut_mask = 64'h0F0F000F0F000000;
-defparam \soc_inst|m0_1|u_logic|Ylbwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vff2z4 (
+// Location: MLABCELL_X25_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vff2z4~combout  = ( \soc_inst|m0_1|u_logic|Duuwx4~combout  & ( \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ebbwx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bdwwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duuwx4~combout  & ( \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Ebbwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bdwwx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Duuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ylbwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Duuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Ylbwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Mhc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vff2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vff2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vff2z4 .lut_mask = 64'h4444EEEE05AF05AF;
-defparam \soc_inst|m0_1|u_logic|Vff2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .lut_mask = 64'h0000000000100010;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aeg2z4 (
+// Location: LABCELL_X19_Y18_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aeg2z4~combout  = ( \soc_inst|m0_1|u_logic|Fzl2z4~q  & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nrvwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fzl2z4~q  
-// & ( \soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Zkuwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hmqwx4~combout )) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Fzl2z4~q  & ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nrvwx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fzl2z4~q  & ( !\soc_inst|m0_1|u_logic|Ey9wx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Zkuwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hmqwx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Mhc2z4~1_combout  = ( \soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|S4w2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|S4w2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|S4w2z4~q  & \soc_inst|m0_1|u_logic|Ekc2z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|W7hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|S4w2z4~q  & ((\soc_inst|m0_1|u_logic|Skc2z4~0_combout ) # (\soc_inst|m0_1|u_logic|Ekc2z4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ekc2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Skc2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aeg2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aeg2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aeg2z4 .lut_mask = 64'h05AF111105AFBBBB;
-defparam \soc_inst|m0_1|u_logic|Aeg2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .lut_mask = 64'h0222020233333333;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tdg2z4 (
+// Location: MLABCELL_X25_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tdg2z4~combout  = ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ai9wx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H2wwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|Ai9wx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H2wwx4~combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Pybwx4~combout ) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Pybwx4~combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|L8t2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tdg2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tdg2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tdg2z4 .lut_mask = 64'h0C0C3F3F11DD11DD;
-defparam \soc_inst|m0_1|u_logic|Tdg2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .lut_mask = 64'h0000000000000100;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qhe2z4 (
+// Location: LABCELL_X19_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qhe2z4~combout  = ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Eruwx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Cawwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Eruwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cawwx4~combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Eruwx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Cawwx4~combout )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Eruwx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cawwx4~combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
+// \soc_inst|m0_1|u_logic|Dcrwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qhe2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qhe2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qhe2z4 .lut_mask = 64'h018945CD23AB67EF;
-defparam \soc_inst|m0_1|u_logic|Qhe2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .lut_mask = 64'h0050000000000000;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hhd2z4 (
+// Location: LABCELL_X19_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hhd2z4~combout  = ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dmvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|H1qwx4~combout ) # (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dmvwx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|H1qwx4~combout  & 
-// \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dmvwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xcuwx4~combout  & ( 
-// !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Dmvwx4~combout ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
+// \soc_inst|m0_1|u_logic|Dcrwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// (((\soc_inst|m0_1|u_logic|Xx2wx4~combout  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hhd2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hhd2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hhd2z4 .lut_mask = 64'hFFE455E4AAE400E4;
-defparam \soc_inst|m0_1|u_logic|Hhd2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .lut_mask = 64'h10F010F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jhe2z4 (
+// Location: MLABCELL_X25_Y16_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jhe2z4~combout  = ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fexwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Feqwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( 
-// \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Fexwx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Feqwx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|U7uwx4~combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fexwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Feqwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|U7uwx4~combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Fexwx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Feqwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+// \soc_inst|m0_1|u_logic|Mhc2z4~3_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (((\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jhe2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jhe2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jhe2z4 .lut_mask = 64'hFDB97531ECA86420;
-defparam \soc_inst|m0_1|u_logic|Jhe2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .lut_mask = 64'h0133013301000100;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohd2z4 (
+// Location: MLABCELL_X25_Y16_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ohd2z4~combout  = ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|D9uwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Icxwx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( \soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
-// (\soc_inst|m0_1|u_logic|D9uwx4~combout  & (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Icxwx4~combout ) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|D9uwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Icxwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( !\soc_inst|m0_1|u_logic|Mnvwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|D9uwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Icxwx4~combout ))))) ) ) )
+// \soc_inst|m0_1|u_logic|Mhc2z4~2_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & 
+// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (((\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ohd2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohd2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ohd2z4 .lut_mask = 64'h20702A7A25752F7F;
-defparam \soc_inst|m0_1|u_logic|Ohd2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .lut_mask = 64'h4CCC44000CCC0000;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgd2z4~4 (
+// Location: MLABCELL_X25_Y16_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wmc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mgd2z4~4_combout  = ( !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Cyq2z4~q ) # (((\soc_inst|m0_1|u_logic|Hhd2z4~combout ))))) # 
-// (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cyq2z4~q  & (\soc_inst|m0_1|u_logic|Ohd2z4~combout ))) ) ) # ( \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Cyq2z4~q ) # (((\soc_inst|m0_1|u_logic|Jhe2z4~combout ))))) # (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Cyq2z4~q  & (\soc_inst|m0_1|u_logic|Qhe2z4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Wmc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qhe2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hhd2z4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jhe2z4~combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ohd2z4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wmc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .lut_mask = 64'h89AB898989ABABAB;
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .lut_mask = 64'h0050005000000000;
+defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y19_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cgf2z4 (
+// Location: MLABCELL_X25_Y16_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cgf2z4~combout  = ( \soc_inst|m0_1|u_logic|Bywwx4~combout  & ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qxuwx4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout  & ( \soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Qxuwx4~combout  & !\soc_inst|m0_1|u_logic|Fzl2z4~q )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~q )) # (\soc_inst|m0_1|u_logic|Svqwx4~combout 
-// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bywwx4~combout  & ( !\soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~q ) # (\soc_inst|m0_1|u_logic|Qxuwx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svqwx4~combout  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bywwx4~combout  & ( !\soc_inst|m0_1|u_logic|Lr9wx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Qxuwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Svqwx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mhc2z4~4_combout  = ( !\soc_inst|m0_1|u_logic|Mhc2z4~2_combout  & ( !\soc_inst|m0_1|u_logic|Wmc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mhc2z4~3_combout  & ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Mhc2z4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mhc2z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wmc2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cgf2z4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cgf2z4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cgf2z4 .lut_mask = 64'h350035F0350F35FF;
-defparam \soc_inst|m0_1|u_logic|Cgf2z4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .lut_mask = 64'hF0A0000000000000;
+defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgd2z4~0 (
+// Location: MLABCELL_X25_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~q  & (((!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & ((\soc_inst|m0_1|u_logic|Cgf2z4~combout ))) # 
-// (\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & (\soc_inst|m0_1|u_logic|Vff2z4~combout ))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~q  & ((((\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Cyq2z4~q  & ((!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & (\soc_inst|m0_1|u_logic|Aeg2z4~combout )) # (\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & ((\soc_inst|m0_1|u_logic|Tdg2z4~combout ))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & 
+// \soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vff2z4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aeg2z4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tdg2z4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Cgf2z4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .lut_mask = 64'h0C0C0C0C777733FF;
-defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .lut_mask = 64'h00C0000000C00080;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~0 (
+// Location: MLABCELL_X25_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mac2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gzvvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  $ (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
-// (((!\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( ((\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Mac2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mac2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .lut_mask = 64'h04FF000834083008;
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .lut_mask = 64'h0000000004000000;
+defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~1 (
+// Location: LABCELL_X19_Y16_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kgc2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Kgc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (((!\soc_inst|m0_1|u_logic|Aok2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q 
+// ))) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .lut_mask = 64'hA2F3005100000000;
+defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gzvvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jp3wx4~combout  & ( ((\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Jp3wx4~combout  & 
-// ( (\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .lut_mask = 64'h0F000F003F333F33;
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .lut_mask = 64'h000000000F0F0000;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~2 (
+// Location: LABCELL_X19_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Gzvvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Gzvvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & \soc_inst|m0_1|u_logic|Mgd2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Kgc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Mac2z4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kgc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Mac2z4~0_combout  & !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Kgc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Mac2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kgc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Mac2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mac2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .lut_mask = 64'h2F002F00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .lut_mask = 64'hE000E0E0A000A0A0;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y16_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O092z4~0 (
+// Location: LABCELL_X19_Y18_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O092z4~0_combout  = ( \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Fcj2z4~q  $ (\soc_inst|m0_1|u_logic|B8c2z4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Mhc2z4~4_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Zdc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Dcrwx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|Mhc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mhc2z4~4_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Zdc2z4~0_combout  & !\soc_inst|m0_1|u_logic|Dcrwx4~2_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zdc2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mhc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Dcrwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mhc2z4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O092z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O092z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O092z4~0 .lut_mask = 64'h00000000C3C3CCCC;
-defparam \soc_inst|m0_1|u_logic|O092z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .lut_mask = 64'h000000008800C800;
+defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T50wx4~0 (
+// Location: LABCELL_X19_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qaiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T50wx4~0_combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Punvx4~4_combout )) # (\soc_inst|m0_1|u_logic|O092z4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Add5~93_sumout ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Punvx4~4_combout )) # (\soc_inst|m0_1|u_logic|O092z4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qaiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
-	.datac(!\soc_inst|m0_1|u_logic|O092z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T50wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T50wx4~0 .lut_mask = 64'h0F5F0F5F3F7F3F7F;
-defparam \soc_inst|m0_1|u_logic|T50wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .lut_mask = 64'hF0F0F0F0FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Qaiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N57
-cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~0 (
+// Location: LABCELL_X19_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H4nwx4 (
 // Equation(s):
-// \soc_inst|switches_1|half_word_address~0_combout  = ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & !\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|H4nwx4~combout  = ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|switches_1|half_word_address~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H4nwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|half_word_address~0 .extended_lut = "off";
-defparam \soc_inst|switches_1|half_word_address~0 .lut_mask = 64'h0000000050505050;
-defparam \soc_inst|switches_1|half_word_address~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H4nwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H4nwx4 .lut_mask = 64'hAAAAAAAA00000000;
+defparam \soc_inst|m0_1|u_logic|H4nwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N54
-cyclonev_lcell_comb \soc_inst|ram_1|byte2~0 (
+// Location: LABCELL_X33_Y18_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ulhvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|byte2~0_combout  = ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|hsize_o~0_combout ) # ((\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & 
-// \soc_inst|switches_1|half_word_address~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|hsize_o~0_combout ) # (\soc_inst|switches_1|half_word_address~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Ulhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R8x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (!\soc_inst|m0_1|u_logic|Add2~33_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|R8x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add2~33_sumout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
-	.datad(!\soc_inst|switches_1|half_word_address~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add2~33_sumout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R8x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|byte2~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ulhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte2~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|byte2~0 .lut_mask = 64'hF0FFF0FFF0F4F0F4;
-defparam \soc_inst|ram_1|byte2~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .lut_mask = 64'h88808880AAA2AAA2;
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y15_N55
-dffeas \soc_inst|ram_1|byte_select[2] (
+// Location: LABCELL_X33_Y18_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ulhvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ulhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ulhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~97_sumout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Leuvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout  & (\soc_inst|m0_1|u_logic|Ulhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~97_sumout )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ulhvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Leuvx4~1_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ulhvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .lut_mask = 64'h00A800A800FC00FC;
+defparam \soc_inst|m0_1|u_logic|Ulhvx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X33_Y18_N58
+dffeas \soc_inst|m0_1|u_logic|R8x2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte2~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ulhvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select [2]),
+	.q(\soc_inst|m0_1|u_logic|R8x2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[2] .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[2] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R8x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R8x2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N21
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[16]~7 (
+// Location: LABCELL_X23_Y18_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yuovx4 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[16]~7_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~6_combout  & ( ((\soc_inst|interconnect_1|mux_sel [0] & (\soc_inst|ram_1|byte_select [2] & \soc_inst|ram_1|read_cycle~q ))) # (\soc_inst|interconnect_1|mux_sel [1]) ) )
+// \soc_inst|m0_1|u_logic|Yuovx4~combout  = ( \soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Add3~25_sumout ))) # (\soc_inst|m0_1|u_logic|K1wvx4~combout  & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// \soc_inst|m0_1|u_logic|Add3~25_sumout )) # (\soc_inst|m0_1|u_logic|Add5~97_sumout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Add3~25_sumout ))) # (\soc_inst|m0_1|u_logic|K1wvx4~combout  & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~25_sumout )) # 
+// (\soc_inst|m0_1|u_logic|Add5~97_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tpnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// (\soc_inst|m0_1|u_logic|Add3~25_sumout ))) # (\soc_inst|m0_1|u_logic|K1wvx4~combout  & (((\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & \soc_inst|m0_1|u_logic|Add3~25_sumout )) # (\soc_inst|m0_1|u_logic|Add5~97_sumout ))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
-	.datac(!\soc_inst|ram_1|byte_select [2]),
-	.datad(!\soc_inst|ram_1|read_cycle~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add3~25_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Add5~97_sumout ),
+	.datae(!\soc_inst|m0_1|u_logic|Tpnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yuovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yuovx4 .lut_mask = 64'h035703570357FFFF;
+defparam \soc_inst|m0_1|u_logic|Yuovx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jknvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Jknvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & (((!\soc_inst|m0_1|u_logic|Yuovx4~combout  & \soc_inst|m0_1|u_logic|S6ovx4~3_combout )) # 
+// (\soc_inst|m0_1|u_logic|Lz93z4~q ))) # (\soc_inst|interconnect_1|HREADY~0_combout  & (((!\soc_inst|m0_1|u_logic|Yuovx4~combout  & \soc_inst|m0_1|u_logic|S6ovx4~3_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Nlovx4~7_combout  & ( 
+// ((!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Lz93z4~q )) # (\soc_inst|m0_1|u_logic|S6ovx4~3_combout ) ) )
+
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lz93z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yuovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S6ovx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nlovx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[16]~7 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[16]~7 .lut_mask = 64'h0000000033373337;
-defparam \soc_inst|interconnect_1|HRDATA[16]~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .lut_mask = 64'h22FF22FF22F222F2;
+defparam \soc_inst|m0_1|u_logic|Jknvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y16_N29
-dffeas \soc_inst|switches_1|switch_store[1][0] (
+// Location: FF_X24_Y16_N46
+dffeas \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[0]~input_o ),
+	.d(\soc_inst|m0_1|u_logic|Jknvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][0]~q ),
+	.q(\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][0] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N54
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[16]~30 (
+// Location: LABCELL_X30_Y21_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfuwx4 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[16]~30_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
-// (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (((!\soc_inst|interconnect_1|Equal1~0_combout ) # (\soc_inst|switches_1|switch_store[1][0]~q )))) ) ) # ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( 
-// (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (((\soc_inst|switches_1|switch_store[1][0]~q  & \soc_inst|interconnect_1|Equal1~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Wfuwx4~combout  = ( \soc_inst|m0_1|u_logic|B2uvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|J6i2z4~q ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datac(!\soc_inst|switches_1|switch_store[1][0]~q ),
-	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|J6i2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B2uvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[16]~30 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[16]~30 .lut_mask = 64'h888B888BBB8BBB8B;
-defparam \soc_inst|interconnect_1|HRDATA[16]~30 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wfuwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfuwx4 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Wfuwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y20_N41
-dffeas \soc_inst|m0_1|u_logic|Yzi2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yzi2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X27_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o~18 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|hwdata_o~18_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Kqzvx4~combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Vf5wx4~8_combout  & ( (\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Kqzvx4~combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kqzvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vf5wx4~8_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yzi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yzi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .lut_mask = 64'h3030332230300022;
+defparam \soc_inst|m0_1|u_logic|hwdata_o~18 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~0 (
+// Location: LABCELL_X35_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ynvvx4 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ynvvx4~combout  = ( \soc_inst|m0_1|u_logic|R3uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( ((\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|Wfuwx4~combout )) # (\soc_inst|m0_1|u_logic|S5b3z4~q ) ) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|R3uvx4~0_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( (\soc_inst|m0_1|u_logic|K3l2z4~q  & \soc_inst|m0_1|u_logic|Wfuwx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|R3uvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & ( \soc_inst|m0_1|u_logic|S5b3z4~q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S5b3z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|R3uvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ynvvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ynvvx4 .lut_mask = 64'h00000F0F11111F1F;
+defparam \soc_inst|m0_1|u_logic|Ynvvx4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X37_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yzi2z4~q  & ( (\soc_inst|interconnect_1|HRDATA[0]~32_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Yzi2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|interconnect_1|HRDATA[0]~32_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|M5mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1w2z4~q  & ( \soc_inst|m0_1|u_logic|Hzj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|R1w2z4~q  & ( (\soc_inst|m0_1|u_logic|Hzj2z4~q  & ((!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sta2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M5mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .lut_mask = 64'hCCCFCCCF000F000F;
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .lut_mask = 64'h00FE00FE00FF00FF;
+defparam \soc_inst|m0_1|u_logic|M5mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qqhvx4~0 (
+// Location: LABCELL_X37_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M5mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qqhvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[16]~30_combout )
+// \soc_inst|m0_1|u_logic|M5mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|M5mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wfuwx4~combout ) # ((!\soc_inst|m0_1|u_logic|K3l2z4~q ) # ((!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ynvvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|M5mvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ynvvx4~combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wfuwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K3l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M5mvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qqhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .lut_mask = 64'hFFAAFFAAFFAAFFAA;
-defparam \soc_inst|m0_1|u_logic|Qqhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .lut_mask = 64'h00FF00FFFEFFFEFF;
+defparam \soc_inst|m0_1|u_logic|M5mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y20_N5
-dffeas \soc_inst|m0_1|u_logic|Ydw2z4 (
+// Location: FF_X37_Y20_N55
+dffeas \soc_inst|m0_1|u_logic|Hzj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qqhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|M5mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ydw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Hzj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ydw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ydw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hzj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hzj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~1 (
+// Location: MLABCELL_X34_Y19_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pwywx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qdnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ydw2z4~q ) # ((!\soc_inst|m0_1|u_logic|Kyi2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
-//  & ( (!\soc_inst|m0_1|u_logic|Kyi2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Pwywx4~0_combout  = ( \soc_inst|m0_1|u_logic|G2zwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & \soc_inst|m0_1|u_logic|Wvzwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ydw2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wvzwx4~1_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G2zwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .lut_mask = 64'h00F000F0AAFAAAFA;
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .lut_mask = 64'h000000000C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Pwywx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qdnvx4~2 (
+// Location: LABCELL_X35_Y16_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qdnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qdnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qdnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[16]~30_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|C6mwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xtywx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vsywx4~7_combout )) # 
+// (\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xtywx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & (\soc_inst|m0_1|u_logic|Hzywx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Wwywx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Vsywx4~7_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|interconnect_1|HRDATA[16]~30_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qdnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdnvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .lut_mask = 64'hFFAA000000000000;
-defparam \soc_inst|m0_1|u_logic|Qdnvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y20_N40
-dffeas \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qdnvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .lut_mask = 64'h000000001F0F3FFF;
+defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~0 (
+// Location: LABCELL_X29_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z9dwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Z9dwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .lut_mask = 64'h30003000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~1 (
+// Location: LABCELL_X27_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jk0xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ilpvx4~0_combout )) 
-// ) ) ) # ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Jk0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .lut_mask = 64'h000000CC0000F0FC;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .lut_mask = 64'h0000000011111111;
+defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~2 (
+// Location: MLABCELL_X28_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj0xx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( !\soc_inst|m0_1|u_logic|Kfpvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Qem2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ukpvx4~combout  & ( !\soc_inst|m0_1|u_logic|Kfpvx4~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Aj0xx4~combout  = ( \soc_inst|m0_1|u_logic|Yg2wx4~combout  & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yg2wx4~combout  & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yg2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jk0xx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kfpvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .lut_mask = 64'hFFFFFFCC00000000;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aj0xx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aj0xx4 .lut_mask = 64'h3333000077335500;
+defparam \soc_inst|m0_1|u_logic|Aj0xx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~3 (
+// Location: MLABCELL_X34_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gjqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Kfpvx4~0_combout  & (\soc_inst|m0_1|u_logic|Kfpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|C9rvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aj0xx4~combout  & ( \soc_inst|m0_1|u_logic|Thm2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Irqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kfpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kfpvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C9rvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .lut_mask = 64'h0C080C0800000000;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~4 (
+// Location: MLABCELL_X34_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Abovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Abovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & (((!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gjqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|C6mwx4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ujqvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) # (\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .lut_mask = 64'h2F2F2F2F22222222;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Abovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Abovx4~0 .lut_mask = 64'h3033333331333333;
+defparam \soc_inst|m0_1|u_logic|Abovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jipvx4~0 (
+// Location: LABCELL_X35_Y16_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zlnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jipvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ljpvx4~0_combout  $ (((\soc_inst|m0_1|u_logic|Hyy2z4~q ) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Zlnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ) # (!\soc_inst|interconnect_1|HREADY~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Abovx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ljpvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jipvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .lut_mask = 64'h0000000099559955;
-defparam \soc_inst|m0_1|u_logic|Jipvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .lut_mask = 64'hFFFFFFFF00FC00FC;
+defparam \soc_inst|m0_1|u_logic|Zlnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kfpvx4~5 (
+// Location: FF_X35_Y16_N25
+dffeas \soc_inst|m0_1|u_logic|Nbm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Zlnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nbm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nbm2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P9nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kfpvx4~5_combout  = ( \soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Jipvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kfpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Jipvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Kfpvx4~3_combout  & !\soc_inst|m0_1|u_logic|Kfpvx4~4_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|P9nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|M9y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~29_sumout  & ((!\soc_inst|interconnect_1|HRDATA[10]~12_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9y2z4~q  & ( \soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Add1~29_sumout  & (\soc_inst|m0_1|u_logic|Edovx4~combout  & 
+// ((!\soc_inst|interconnect_1|HRDATA[10]~12_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|M9y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (!\soc_inst|interconnect_1|HRDATA[10]~12_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|M9y2z4~q  & ( !\soc_inst|m0_1|u_logic|C9rvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Edovx4~combout  & ((!\soc_inst|interconnect_1|HRDATA[10]~12_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kfpvx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kfpvx4~4_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jipvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Add1~29_sumout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[10]~12_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C9rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .lut_mask = 64'h1010303000000000;
-defparam \soc_inst|m0_1|u_logic|Kfpvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .lut_mask = 64'h00FCFCFC00A8A8A8;
+defparam \soc_inst|m0_1|u_logic|P9nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y23_N59
-dffeas \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE (
+// Location: FF_X31_Y14_N43
+dffeas \soc_inst|m0_1|u_logic|M9y2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
+	.d(\soc_inst|m0_1|u_logic|P9nvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|M9y2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|M9y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|M9y2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W4ywx4~0 (
+// Location: MLABCELL_X34_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oylwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|W4ywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q8ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Wai2z4~q  & (((\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & !\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Q8ywx4~combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Wai2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Oylwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|W4y2z4~q  & (\soc_inst|m0_1|u_logic|I3y2z4~q  & \soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|I3y2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oylwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .lut_mask = 64'h4040404040F040F0;
-defparam \soc_inst|m0_1|u_logic|W4ywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Oylwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mzxwx4~0 (
+// Location: MLABCELL_X34_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oylwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mzxwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|A7ywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W4ywx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Oylwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Oylwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bby2z4~q  & ( (!\soc_inst|m0_1|u_logic|M9y2z4~q ) # ((!\soc_inst|m0_1|u_logic|Y7y2z4~q ) # (!\soc_inst|m0_1|u_logic|Qcy2z4~q )) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Oylwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bby2z4~q  ) ) # ( \soc_inst|m0_1|u_logic|Oylwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bby2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Oylwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bby2z4~q  ) 
+// )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|W4ywx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A7ywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M9y2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qcy2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Oylwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .lut_mask = 64'hFF00FF0000000000;
-defparam \soc_inst|m0_1|u_logic|Mzxwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .lut_mask = 64'hFFFFFFFFFFFFFEFE;
+defparam \soc_inst|m0_1|u_logic|Oylwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pkwwx4~0 (
+// Location: LABCELL_X27_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|By4wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tzxwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  $ (\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Tzxwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Wxxwx4~0_combout  $ (((!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|By4wx4~combout  = ( \soc_inst|m0_1|u_logic|Nbm2z4~q  & ( \soc_inst|m0_1|u_logic|Oylwx4~1_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mzxwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxxwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Oylwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tzxwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|By4wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .lut_mask = 64'hF30CF30CF00FF00F;
-defparam \soc_inst|m0_1|u_logic|Pkwwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|By4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|By4wx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|By4wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkyvx4~0 (
+// Location: FF_X27_Y13_N10
+dffeas \soc_inst|m0_1|u_logic|Y6t2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|By4wx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Y6t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Y6t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z6c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Y9nwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Pkwwx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Manwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Z6c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y6t2z4~q  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y9nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .lut_mask = 64'h000000001F3F1F3F;
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Z6c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~0 (
+// Location: LABCELL_X24_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C5c2z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C2rvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Khfwx4~3_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ) # (!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bgfwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Omyvx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Wjyvx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|C5c2z4~2_combout  = ( \soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C5c2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ) # (\soc_inst|m0_1|u_logic|Z6c2z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|O9qvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|H0zvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C5c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ) # (\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Khfwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wjyvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Bgfwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Omyvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|C5c2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|C5c2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z6c2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H0zvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C2rvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C5c2z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .lut_mask = 64'hF0F00000FCFCCCCC;
-defparam \soc_inst|m0_1|u_logic|C2rvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .lut_mask = 64'hA0AAA0AAA2AAA2AA;
+defparam \soc_inst|m0_1|u_logic|C5c2z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~1 (
+// Location: MLABCELL_X25_Y16_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Una2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C2rvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & !\soc_inst|m0_1|u_logic|Amyvx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pgfwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout  & !\soc_inst|m0_1|u_logic|Amyvx4~2_combout )) ) )
+// \soc_inst|m0_1|u_logic|Una2z4~0_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Ucqvx4~combout  & \soc_inst|m0_1|u_logic|X77wx4~combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Rhfwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Amyvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ykyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pgfwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C2rvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .lut_mask = 64'hFFC0FFC0C0C0C0C0;
-defparam \soc_inst|m0_1|u_logic|C2rvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Una2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Una2z4~0 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|Una2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2rvx4~2 (
+// Location: LABCELL_X24_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C2rvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C2rvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|C2rvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C2rvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & !\soc_inst|m0_1|u_logic|C2rvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Ppsvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Una2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Amjwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & (\soc_inst|m0_1|u_logic|Ppsvx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|C5c2z4~2_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C2rvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ppsvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C5c2z4~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .lut_mask = 64'hAA00AF0000000000;
-defparam \soc_inst|m0_1|u_logic|C2rvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .lut_mask = 64'h0400040000000000;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxhvx4~0 (
+// Location: LABCELL_X24_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ppsvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cxhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fcj2z4~q  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout ) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fcj2z4~q  & ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ppsvx4~combout  = ( \soc_inst|m0_1|u_logic|Jyb2z4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|I1c2z4~combout ) # ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q 
+// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Jyb2z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Ppsvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|I1c2z4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ppsvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I1c2z4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jyb2z4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cxhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ppsvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .lut_mask = 64'hAAAAF5F500000000;
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ppsvx4 .lut_mask = 64'h0C080C080F080F08;
+defparam \soc_inst|m0_1|u_logic|Ppsvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cxhvx4~1 (
+// Location: LABCELL_X24_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cxhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Add5~93_sumout  & ( \soc_inst|m0_1|u_logic|Cxhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xdfwx4~combout  & ((!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|C2rvx4~2_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~93_sumout  & ( \soc_inst|m0_1|u_logic|Cxhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # (\soc_inst|m0_1|u_logic|C2rvx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|S6ovx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Ppsvx4~combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|A4t2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Cxhvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ppsvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S6ovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .lut_mask = 64'h00000000DDDDDD00;
-defparam \soc_inst|m0_1|u_logic|Cxhvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y22_N38
-dffeas \soc_inst|m0_1|u_logic|Fcj2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cxhvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fcj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fcj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .lut_mask = 64'h00FA00FA00000000;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qbpvx4~0 (
+// Location: MLABCELL_X21_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S6ovx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|Fcj2z4~q  & \soc_inst|m0_1|u_logic|Ueovx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|S6ovx4~1_combout  = ( !\soc_inst|m0_1|u_logic|It52z4~2_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|It52z4~2_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|It52z4~2_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|S6ovx4~0_combout  & ((!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & \soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S6ovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .lut_mask = 64'h0000000000C000C0;
-defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .lut_mask = 64'h0F010F0003010000;
+defparam \soc_inst|m0_1|u_logic|S6ovx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wmhvx4~0 (
+// Location: LABCELL_X22_Y17_N0
+cyclonev_lcell_comb \soc_inst|ram_1|always1~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wmhvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|interconnect_1|HRDATA[30]~34_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[30]~34_combout  ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[30]~34_combout  ) )
+// \soc_inst|ram_1|always1~0_combout  = ( \soc_inst|interconnect_1|LessThan0~0_combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( (\soc_inst|m0_1|u_logic|E7mwx4~combout  & (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & 
+// \soc_inst|interconnect_1|HREADY~0_combout )) ) ) ) # ( \soc_inst|interconnect_1|LessThan0~0_combout  & ( !\soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & (\soc_inst|interconnect_1|HREADY~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|E7mwx4~combout ) # (\soc_inst|m0_1|u_logic|S6ovx4~1_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datae(!\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wmhvx4~0_combout ),
+	.combout(\soc_inst|ram_1|always1~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .lut_mask = 64'hFFFFFFFFFFFF0000;
-defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|always1~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|always1~0 .lut_mask = 64'h0000007000000030;
+defparam \soc_inst|ram_1|always1~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X52_Y19_N28
-dffeas \soc_inst|m0_1|u_logic|Qzw2z4 (
+// Location: FF_X31_Y17_N23
+dffeas \soc_inst|ram_1|byte_select[0]~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Wmhvx4~0_combout ),
+	.d(\soc_inst|ram_1|byte0~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qzw2z4~q ),
+	.q(\soc_inst|ram_1|byte_select[0]~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qzw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qzw2z4 .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X51_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|M4nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qzw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Qzw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qzw2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M4nvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .lut_mask = 64'hCCFCCCFC00F000F0;
-defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|byte_select[0]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[0]~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8nvx4~0 (
+// Location: LABCELL_X31_Y17_N27
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~37 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|N8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout  & (((\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout )))) # 
-// (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & ((\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout ) ) )
+// \soc_inst|interconnect_1|HRDATA[1]~37_combout  = ( !\soc_inst|interconnect_1|mux_sel [0] & ( ((!\soc_inst|interconnect_1|mux_sel [1]) # ((!\soc_inst|switches_1|read_enable~q ) # ((\soc_inst|interconnect_1|mux_sel [2]) # 
+// (\soc_inst|switches_1|half_word_address [0])))) ) ) # ( \soc_inst|interconnect_1|mux_sel [0] & ( (!\soc_inst|ram_1|byte_select[0]~DUPLICATE_q ) # (((!\soc_inst|ram_1|read_cycle~q ) # ((\soc_inst|interconnect_1|mux_sel [2]))) # 
+// (\soc_inst|interconnect_1|mux_sel [1])) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
-	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fey2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|ram_1|byte_select[0]~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(!\soc_inst|ram_1|read_cycle~q ),
+	.datad(!\soc_inst|switches_1|half_word_address [0]),
+	.datae(!\soc_inst|interconnect_1|mux_sel [0]),
+	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
+	.datag(!\soc_inst|switches_1|read_enable~q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|N8nvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .lut_mask = 64'h0FFF0FFF0EEE0EEE;
-defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y16_N53
-dffeas \soc_inst|m0_1|u_logic|Fey2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|N8nvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fey2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fey2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fey2z4 .power_up = "low";
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|HRDATA[1]~37 .extended_lut = "on";
+defparam \soc_inst|interconnect_1|HRDATA[1]~37 .lut_mask = 64'hFCFFFBFBFFFFFFFF;
+defparam \soc_inst|interconnect_1|HRDATA[1]~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~1 (
+// Location: MLABCELL_X34_Y17_N18
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~20 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fey2z4~q ) # ((\soc_inst|interconnect_1|HRDATA[11]~3_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & 
-// \soc_inst|m0_1|u_logic|Vapvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & 
-// \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+// \soc_inst|interconnect_1|HRDATA[1]~20_combout  = ( \soc_inst|switches_1|half_word_address [1] & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & !\soc_inst|interconnect_1|HRDATA[1]~37_combout ) ) ) # ( !\soc_inst|switches_1|half_word_address [1] & ( 
+// !\soc_inst|interconnect_1|HRDATA[1]~37_combout  ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fey2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[1]~37_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataf(!\soc_inst|switches_1|half_word_address [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M4nvx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .lut_mask = 64'h00110011F0F1F0F1;
-defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~20 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~20 .lut_mask = 64'hFF00FF00F000F000;
+defparam \soc_inst|interconnect_1|HRDATA[1]~20 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~2 (
+// Location: MLABCELL_X34_Y17_N54
+cyclonev_lcell_comb \soc_inst|switches_1|DataValid~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M4nvx4~2_combout  = ( \soc_inst|interconnect_1|HRDATA[30]~34_combout  & ( (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & (!\soc_inst|m0_1|u_logic|M4nvx4~0_combout  & !\soc_inst|m0_1|u_logic|M4nvx4~1_combout )) ) ) # ( 
-// !\soc_inst|interconnect_1|HRDATA[30]~34_combout  & ( (!\soc_inst|m0_1|u_logic|M4nvx4~0_combout  & !\soc_inst|m0_1|u_logic|M4nvx4~1_combout ) ) )
+// \soc_inst|switches_1|DataValid~0_combout  = ( \soc_inst|switches_1|DataValid [1] & ( \soc_inst|switches_1|half_word_address [1] ) ) # ( !\soc_inst|switches_1|DataValid [1] & ( \soc_inst|switches_1|half_word_address [1] & ( 
+// (!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o ) ) ) ) # ( \soc_inst|switches_1|DataValid [1] & ( !\soc_inst|switches_1|half_word_address [1] & ( (!\soc_inst|switches_1|half_word_address [0]) # ((!\soc_inst|switches_1|read_enable~q ) # 
+// ((!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o ))) ) ) ) # ( !\soc_inst|switches_1|DataValid [1] & ( !\soc_inst|switches_1|half_word_address [1] & ( (!\soc_inst|switches_1|last_buttons [1] & !\KEY[1]~input_o ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|M4nvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M4nvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.dataa(!\soc_inst|switches_1|last_buttons [1]),
+	.datab(!\soc_inst|switches_1|half_word_address [0]),
+	.datac(!\soc_inst|switches_1|read_enable~q ),
+	.datad(!\KEY[1]~input_o ),
+	.datae(!\soc_inst|switches_1|DataValid [1]),
+	.dataf(!\soc_inst|switches_1|half_word_address [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
+	.combout(\soc_inst|switches_1|DataValid~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .lut_mask = 64'hF000F000C000C000;
-defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .shared_arith = "off";
+defparam \soc_inst|switches_1|DataValid~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|DataValid~0 .lut_mask = 64'hAA00FEFCAA00FFFF;
+defparam \soc_inst|switches_1|DataValid~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y19_N55
-dffeas \soc_inst|m0_1|u_logic|H9i2z4 (
+// Location: FF_X34_Y17_N55
+dffeas \soc_inst|switches_1|DataValid[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
+	.d(\soc_inst|switches_1|DataValid~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -97186,308 +97240,360 @@ dffeas \soc_inst|m0_1|u_logic|H9i2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.q(\soc_inst|switches_1|DataValid [1]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H9i2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H9i2z4 .power_up = "low";
+defparam \soc_inst|switches_1|DataValid[1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|DataValid[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C2yvx4 (
+// Location: FF_X34_Y17_N50
+dffeas \soc_inst|switches_1|switch_store[0][1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[1]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][1]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][1] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][1] .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X39_Y18_N30
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[1]~12 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C2yvx4~combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  ) )
+// \soc_inst|ram_1|data_to_memory[1]~12_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( \soc_inst|ram_1|write_cycle~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|hwdata_o [1] & ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|hwdata_o [1] & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (\soc_inst|ram_1|byte_select [0] & \soc_inst|ram_1|write_cycle~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|ram_1|byte_select [0]),
+	.datac(!\soc_inst|ram_1|write_cycle~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[1]~12_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C2yvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C2yvx4 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|C2yvx4 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[1]~12 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[1]~12 .lut_mask = 64'h000003030C0C0F0F;
+defparam \soc_inst|ram_1|data_to_memory[1]~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~2 (
+// Location: LABCELL_X29_Y22_N3
+cyclonev_lcell_comb \soc_inst|ram_1|data_to_memory[25]~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z5pvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|C2yvx4~combout  & (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q )) ) )
+// \soc_inst|ram_1|data_to_memory[25]~11_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & ((!\soc_inst|ram_1|byte_select [3]) # (\soc_inst|m0_1|u_logic|hwdata_o~18_combout ))) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25  & ( (\soc_inst|ram_1|byte_select [3] & (\soc_inst|ram_1|write_cycle~DUPLICATE_q  & \soc_inst|m0_1|u_logic|hwdata_o~18_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select [3]),
+	.datab(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z5pvx4~2_combout ),
+	.combout(\soc_inst|ram_1|data_to_memory[25]~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .lut_mask = 64'h0000000000050005;
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .shared_arith = "off";
+defparam \soc_inst|ram_1|data_to_memory[25]~11 .extended_lut = "off";
+defparam \soc_inst|ram_1|data_to_memory[25]~11 .lut_mask = 64'h0101232301012323;
+defparam \soc_inst|ram_1|data_to_memory[25]~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Z5pvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Z5pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z5pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z5pvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z5pvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  ) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: M10K_X26_Y22_N0
+cyclonev_ram_block \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 (
+	.portawe(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|ram_1|data_to_memory[25]~11_combout ,\soc_inst|ram_1|data_to_memory[1]~12_combout }),
+	.portaaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portabyteenamasks(1'b1),
+	.portbdatain(2'b00),
+	.portbaddr({\soc_inst|ram_1|memory.raddr_a[11]~11_combout ,\soc_inst|ram_1|memory.raddr_a[10]~10_combout ,\soc_inst|ram_1|memory.raddr_a[9]~9_combout ,\soc_inst|ram_1|memory.raddr_a[8]~8_combout ,\soc_inst|ram_1|memory.raddr_a[7]~7_combout ,
+\soc_inst|ram_1|memory.raddr_a[6]~6_combout ,\soc_inst|ram_1|memory.raddr_a[5]~5_combout ,\soc_inst|ram_1|memory.raddr_a[4]~4_combout ,\soc_inst|ram_1|memory.raddr_a[3]~3_combout ,\soc_inst|ram_1|memory.raddr_a[2]~2_combout ,
+\soc_inst|ram_1|memory.raddr_a[1]~1_combout ,\soc_inst|ram_1|memory.raddr_a[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .lut_mask = 64'hCCCCC0CCC0CCC0CC;
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .shared_arith = "off";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .init_file = "db/de1_soc_wrapper.ram0_ahb_ram_41fd0858.hdl.mif";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .init_file_layout = "port_a";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .logical_ram_name = "arm_soc:soc_inst|ahb_ram:ram_1|altsyncram:memory_rtl_0|altsyncram_nms1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .operation_mode = "dual_port";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_bit_number = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_width = 12;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clear = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clock = "none";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_width = 2;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_address = 0;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_bit_number = 1;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_last_address = 4095;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_depth = 4096;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_width = 32;
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .ram_block_type = "M20K";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000066BEAA23F7C6EDFB7EE676E377E2763BABC2BE25FCC021062A666FB67FF66FAC2079577FFFFFFFFFFFFC338EC000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~2 (
+// Location: MLABCELL_X34_Y17_N48
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[1]~21 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|It52z4~2_combout  = ( \soc_inst|m0_1|u_logic|It52z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Z5pvx4~3_combout  & (\soc_inst|m0_1|u_logic|Scpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Z5pvx4~0_combout )))) ) )
+// \soc_inst|interconnect_1|HRDATA[1]~21_combout  = ( \soc_inst|switches_1|switch_store[0][1]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [1])))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][1]~q  & ( 
+// \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [1]))))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout  & (((\soc_inst|interconnect_1|HRDATA[1]~19_combout )))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][1]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [1]))))) # (\soc_inst|interconnect_1|HRDATA[1]~20_combout  & (((!\soc_inst|interconnect_1|HRDATA[1]~19_combout )))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][1]~q  & 
+// ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~20_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~19_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # 
+// (\soc_inst|interconnect_1|HRDATA[1]~19_combout  & ((\soc_inst|switches_1|DataValid [1]))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|It52z4~1_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~20_combout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[1]~19_combout ),
+	.datad(!\soc_inst|switches_1|DataValid [1]),
+	.datae(!\soc_inst|switches_1|switch_store[0][1]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|It52z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|It52z4~2 .lut_mask = 64'h0000000002030203;
-defparam \soc_inst|m0_1|u_logic|It52z4~2 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~21 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[1]~21 .lut_mask = 64'h808AD0DA858FD5DF;
+defparam \soc_inst|interconnect_1|HRDATA[1]~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N33
-cyclonev_lcell_comb \soc_inst|ram_1|byte3~0 (
+// Location: MLABCELL_X34_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hcnvx4~0 (
 // Equation(s):
-// \soc_inst|ram_1|byte3~0_combout  = ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # ((\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & 
-// \soc_inst|m0_1|u_logic|Hdh2z4~1_combout ))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Hcnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dwl2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dwl2z4~q  & ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Dwl2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) # (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Dwl2z4~q  & ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Kzqvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[1]~21_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[1]~21_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kzqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|byte3~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hcnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte3~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|byte3~0 .lut_mask = 64'hAF0FAF0FEF0FFF1F;
-defparam \soc_inst|ram_1|byte3~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .lut_mask = 64'h0C080F0ACC88FFAA;
+defparam \soc_inst|m0_1|u_logic|Hcnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X43_Y15_N34
-dffeas \soc_inst|ram_1|byte_select[3]~DUPLICATE (
+// Location: FF_X34_Y15_N19
+dffeas \soc_inst|m0_1|u_logic|Dwl2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|byte3~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hcnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Dwl2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|byte_select[3]~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|byte_select[3]~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y14_N51
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[26]~0 (
-// Equation(s):
-// \soc_inst|interconnect_1|HRDATA[26]~0_combout  = ( !\soc_inst|interconnect_1|mux_sel [1] & ( \soc_inst|interconnect_1|mux_sel [0] & ( (\soc_inst|ram_1|byte_select[3]~DUPLICATE_q  & (\soc_inst|ram_1|read_cycle~DUPLICATE_q  & 
-// !\soc_inst|interconnect_1|mux_sel [2])) ) ) )
-
-	.dataa(!\soc_inst|ram_1|byte_select[3]~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|ram_1|read_cycle~DUPLICATE_q ),
-	.datad(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datae(!\soc_inst|interconnect_1|mux_sel [1]),
-	.dataf(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[26]~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[26]~0 .lut_mask = 64'h0000000005000000;
-defparam \soc_inst|interconnect_1|HRDATA[26]~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dwl2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Dwl2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dnhvx4~0 (
+// Location: LABCELL_X36_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Acnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dnhvx4~0_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) ) # ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29  )
+// \soc_inst|m0_1|u_logic|Acnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G0w2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Dwl2z4~q  & (!\soc_inst|m0_1|u_logic|H1rvx4~0_combout  & ((\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Dwl2z4~q  
+// & (((\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|C2rvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Dwl2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dwl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2rvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dnhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .lut_mask = 64'hFFFFFFFFFFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|Dnhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .lut_mask = 64'h0C043F15CC44FF55;
+defparam \soc_inst|m0_1|u_logic|Acnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y20_N11
-dffeas \soc_inst|m0_1|u_logic|Byw2z4 (
+// Location: FF_X36_Y21_N31
+dffeas \soc_inst|m0_1|u_logic|G0w2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Dnhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Acnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Byw2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|G0w2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Byw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Byw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|G0w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|G0w2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~1 (
+// Location: LABCELL_X29_Y22_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qnyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bdm2z4~q ) # ((!\soc_inst|m0_1|u_logic|Byw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Byw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Qnyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q 
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|R1pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Byw2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bdm2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .lut_mask = 64'h0000FFFF0000A0F0;
+defparam \soc_inst|m0_1|u_logic|Qnyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~0 (
+// Location: MLABCELL_X28_Y22_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vllvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Vapvx4~combout  & \soc_inst|interconnect_1|HRDATA[13]~27_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|m0_1|u_logic|Vapvx4~combout  & \soc_inst|interconnect_1|HRDATA[13]~27_combout )) ) )
+// \soc_inst|m0_1|u_logic|Vllvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( 
+// !\soc_inst|m0_1|u_logic|U4z2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[13]~27_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vllvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .lut_mask = 64'hAAAFAAAF000F000F;
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .lut_mask = 64'hFF00FF000A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Vllvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajnvx4~2 (
+// Location: MLABCELL_X28_Y22_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vllvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Ajnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajnvx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[26]~0_combout ) # ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ) # 
-// (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Vllvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qnyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vllvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|G0w2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qnyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vllvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|G0w2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datab(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a29 ),
-	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ajnvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ajnvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Qnyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vllvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajnvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .lut_mask = 64'hFE00FE0000000000;
-defparam \soc_inst|m0_1|u_logic|Ajnvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .lut_mask = 64'hF5F5C4C400000000;
+defparam \soc_inst|m0_1|u_logic|Vllvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y20_N50
-dffeas \soc_inst|m0_1|u_logic|Qem2z4 (
+// Location: FF_X28_Y22_N38
+dffeas \soc_inst|m0_1|u_logic|U4z2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ajnvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Vllvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -97496,926 +97602,1078 @@ dffeas \soc_inst|m0_1|u_logic|Qem2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U4z2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qem2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qem2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U4z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U4z2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~1 (
+// Location: LABCELL_X27_Y22_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qllwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # ((\soc_inst|m0_1|u_logic|Y6t2z4~q  & 
-// \soc_inst|m0_1|u_logic|Huqvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Y6t2z4~q  & \soc_inst|m0_1|u_logic|Huqvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Htyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|U4z2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qi03z4~q ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U4z2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qi03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qllwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .lut_mask = 64'h00000000888F888F;
-defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .lut_mask = 64'hAC00000000000000;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pa7wx4~0 (
+// Location: FF_X28_Y20_N11
+dffeas \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pa7wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Htyvx4~1_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wlz2z4~q  & ((\soc_inst|m0_1|u_logic|Svk2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wlz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .lut_mask = 64'h00000CA000000000;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3xvx4~0 (
+// Location: FF_X23_Y20_N37
+dffeas \soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X28_Y20_N56
+dffeas \soc_inst|m0_1|u_logic|To23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Qppvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|To23z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|To23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|To23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q3xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pa7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Pa7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q 
-//  & (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & \soc_inst|m0_1|u_logic|Ark2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Htyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|To23z4~q  & (\soc_inst|m0_1|u_logic|L753z4~q  & ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|To23z4~q  & ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L753z4~q  & ((!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sd1xx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ld1xx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|To23z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y91xx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L753z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sd1xx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ld1xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q3xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .lut_mask = 64'h000800080F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .lut_mask = 64'hF5F500F531310031;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3xvx4~1 (
+// Location: LABCELL_X27_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htyvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q3xvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Q3xvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rexvx4~0_combout )) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Htyvx4~3_combout  = ( !\soc_inst|m0_1|u_logic|V7ywx4~combout  & ( \soc_inst|m0_1|u_logic|Htyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Htyvx4~0_combout  & !\soc_inst|m0_1|u_logic|Htyvx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q3xvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Htyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Htyvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|V7ywx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .lut_mask = 64'hDDFFDDFF00000000;
-defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .lut_mask = 64'h00000000F0000000;
+defparam \soc_inst|m0_1|u_logic|Htyvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~2 (
+// Location: MLABCELL_X39_Y20_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwdata_o[1] (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qllwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Q3xvx4~1_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Q3xvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout 
-// ) # (!\soc_inst|m0_1|u_logic|Ju5wx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|hwdata_o [1] = ( !\soc_inst|m0_1|u_logic|Htyvx4~3_combout  & ( \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Htyvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qllwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwdata_o [1]),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .lut_mask = 64'h00FA00FA00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|hwdata_o[1] .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~3 (
+// Location: FF_X34_Y15_N17
+dffeas \soc_inst|m0_1|u_logic|R0t2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwdata_o [1]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|U1uvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|R0t2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|R0t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|R0t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rexvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qllwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Bkxvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qllwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|L8t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~q )))) 
-// ) )
+// \soc_inst|m0_1|u_logic|Rexvx4~0_combout  = ( \soc_inst|m0_1|u_logic|G9w2z4~q  & ( (\soc_inst|m0_1|u_logic|R0t2z4~q  & !\soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qllwx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|R0t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qllwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .lut_mask = 64'h0000000000EF00EF;
-defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .lut_mask = 64'h0000000030303030;
+defparam \soc_inst|m0_1|u_logic|Rexvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~4 (
+// Location: LABCELL_X24_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qx52z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qllwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Qllwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qllwx4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Qllwx4~0_combout )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qllwx4~1_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qllwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Qllwx4~3_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Qx52z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|L8t2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Qllwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qllwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qx52z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .lut_mask = 64'h0F0F0F0F00030F0F;
-defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .lut_mask = 64'h0500050000000000;
+defparam \soc_inst|m0_1|u_logic|Qx52z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jeewx4 (
+// Location: LABCELL_X24_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jeewx4~combout  = ( !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fzl2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|hprot_o~4_combout  = ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qx52z4~0_combout  & (\soc_inst|m0_1|u_logic|Y6t2z4~q  & !\soc_inst|m0_1|u_logic|Yy5wx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Na6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qx52z4~0_combout  & !\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qx52z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yy5wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jeewx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jeewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jeewx4 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|Jeewx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~4 .lut_mask = 64'hCC00CC000C000C00;
+defparam \soc_inst|m0_1|u_logic|hprot_o~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zmlwx4~0 (
+// Location: LABCELL_X29_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sy52z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zmlwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Jeewx4~combout  $ (((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))))) ) )
+// \soc_inst|m0_1|u_logic|Sy52z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|A4t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jeewx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sy52z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .lut_mask = 64'h6030603000000000;
-defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .lut_mask = 64'h000000CC00000000;
+defparam \soc_inst|m0_1|u_logic|Sy52z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~0 (
+// Location: LABCELL_X30_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z0mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hklwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dsqvx4~combout  & !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Jky2z4~q ) # ((\soc_inst|m0_1|u_logic|Dsqvx4~combout  & !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Z0mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|A4t2z4~q  & 
+// \soc_inst|m0_1|u_logic|A4c2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|A4t2z4~q  & (\soc_inst|m0_1|u_logic|A4c2z4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q  & \soc_inst|m0_1|u_logic|A4c2z4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bpzvx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4c2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bpzvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hklwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .lut_mask = 64'hF3F0F3F033003300;
-defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .lut_mask = 64'h000000AA0C0C0CAE;
+defparam \soc_inst|m0_1|u_logic|Z0mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~2 (
+// Location: LABCELL_X30_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hklwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q 
-//  & \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|hprot_o~2_combout  = ( !\soc_inst|m0_1|u_logic|A76wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # ((!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hklwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .lut_mask = 64'h0020000000000020;
-defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~2 .lut_mask = 64'hFB00FB0000000000;
+defparam \soc_inst|m0_1|u_logic|hprot_o~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~3 (
+// Location: LABCELL_X29_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hklwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Hklwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hklwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Nbm2z4~q ) # (\soc_inst|m0_1|u_logic|Owq2z4~q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hklwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hklwx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|hprot_o~3_combout  = ( \soc_inst|m0_1|u_logic|Y6t2z4~q  & ( \soc_inst|m0_1|u_logic|hprot_o~2_combout  & ( !\soc_inst|m0_1|u_logic|Sy52z4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Y6t2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|hprot_o~2_combout  & ( (!\soc_inst|m0_1|u_logic|Sy52z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # (!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Owq2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hklwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sy52z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hklwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .lut_mask = 64'hAAAA0000AA220000;
-defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~3 .lut_mask = 64'h00000000A8A8AAAA;
+defparam \soc_inst|m0_1|u_logic|hprot_o~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~4 (
+// Location: LABCELL_X24_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hklwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hklwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Hklwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # (\soc_inst|m0_1|u_logic|Xly2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Hklwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Xly2z4~q  & !\soc_inst|m0_1|u_logic|Hklwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|hprot_o~5_combout  = ( \soc_inst|m0_1|u_logic|hprot_o~4_combout  & ( \soc_inst|m0_1|u_logic|hprot_o~3_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~1_combout  & ((!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hklwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hklwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|hprot_o~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|hprot_o~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hklwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .lut_mask = 64'h000000002200A200;
-defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~5 .lut_mask = 64'h0000000000000E0E;
+defparam \soc_inst|m0_1|u_logic|hprot_o~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bthvx4~0 (
+// Location: LABCELL_X30_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U5qvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bthvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hklwx4~4_combout  & ( ((\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ((\soc_inst|m0_1|u_logic|E4xvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cllwx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Hklwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & \soc_inst|m0_1|u_logic|Cyq2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|U5qvx4~combout  = ( !\soc_inst|m0_1|u_logic|hprot_o~5_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hklwx4~4_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .lut_mask = 64'h00CC00CC13FF13FF;
-defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U5qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U5qvx4 .lut_mask = 64'h00000000FFFF0000;
+defparam \soc_inst|m0_1|u_logic|U5qvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y21_N49
-dffeas \soc_inst|m0_1|u_logic|Cyq2z4 (
+// Location: FF_X21_Y14_N11
+dffeas \soc_inst|m0_1|u_logic|Wxp2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|U5qvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Wxp2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cyq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cyq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Wxp2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Wxp2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Emewx4~0 (
+// Location: LABCELL_X29_Y19_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtwwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Emewx4~0_combout  = ( \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|I6z2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|W7z2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q  )
+// \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|C3w2z4~q  & ( (!\soc_inst|m0_1|u_logic|Wxp2z4~q ) # ((((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Walwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~q )) ) 
+// ) # ( \soc_inst|m0_1|u_logic|C3w2z4~q  & ( (((!\soc_inst|m0_1|u_logic|Wxp2z4~q  & ((!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Wxp2z4~q  & (!\soc_inst|m0_1|u_logic|Palwx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|W7z2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wxp2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Palwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|C3w2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U9lwx4~1_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Walwx4~1_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Emewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Emewx4~0 .lut_mask = 64'hFFFFFFFFFFFAFFFA;
-defparam \soc_inst|m0_1|u_logic|Emewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .lut_mask = 64'hBFFFFBFFBFFF73FF;
+defparam \soc_inst|m0_1|u_logic|Mtwwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wvswx4~0 (
+// Location: LABCELL_X27_Y22_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wvswx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|C9yvx4~combout  & !\soc_inst|m0_1|u_logic|Emewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|C9yvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Emewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & !\soc_inst|m0_1|u_logic|Cyq2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|G5qvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Zhyvx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lhyvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Bpzvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|G5qvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Add5~29_sumout  & 
+// ((!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zhyvx4~combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G5qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Shyvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lhyvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bpzvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wvswx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G5qvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .lut_mask = 64'h0F040F040F000F00;
-defparam \soc_inst|m0_1|u_logic|Wvswx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .lut_mask = 64'h8808AA0A00000000;
+defparam \soc_inst|m0_1|u_logic|G5qvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjswx4~0 (
+// Location: MLABCELL_X28_Y22_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G5qvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fjswx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Jky2z4~q  & !\soc_inst|m0_1|u_logic|Qem2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Jky2z4~q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|G5qvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|G5qvx4~2_combout  & (!\soc_inst|m0_1|u_logic|Nyawx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Mtwwx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|B8nwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|G5qvx4~2_combout  & !\soc_inst|m0_1|u_logic|Nyawx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G5qvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nyawx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjswx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .lut_mask = 64'h00000000E0EA4040;
-defparam \soc_inst|m0_1|u_logic|Fjswx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .lut_mask = 64'h00000C0000000D00;
+defparam \soc_inst|m0_1|u_logic|G5qvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjswx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Fjswx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fjswx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G2lwx4~combout  & (!\soc_inst|m0_1|u_logic|Wvswx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|G2lwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wvswx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjswx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y22_N11
+dffeas \soc_inst|m0_1|u_logic|Knz2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Knz2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .lut_mask = 64'h4050405000000000;
-defparam \soc_inst|m0_1|u_logic|Fjswx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Knz2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Knz2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X29_Y22_N8
-dffeas \soc_inst|m0_1|u_logic|T1d3z4 (
+// Location: FF_X27_Y22_N14
+dffeas \soc_inst|m0_1|u_logic|Ek03z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fjswx4~1_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Meyvx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ek03z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T1d3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T1d3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ek03z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ek03z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X23_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~4 (
+// Location: LABCELL_X27_Y22_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~4_combout  = ( \soc_inst|m0_1|u_logic|F483z4~q  & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wyt2z4~q ) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|F483z4~q  
-// & ( \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wyt2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|F483z4~q  & ( !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ujp2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Wu63z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F483z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ujp2z4~q )) # (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Wu63z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Oxnvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Knz2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ek03z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sjj2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ujp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wu63z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wyt2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|F483z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Knz2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ek03z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .lut_mask = 64'h5353535300F00FFF;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .lut_mask = 64'h00C000A000000000;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~3 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|F8v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgp2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|W893z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|F8v2z4~q  & ( (\soc_inst|m0_1|u_logic|Gip2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|F8v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgp2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|W893z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|F8v2z4~q  & ( (!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Gip2z4~q ) ) ) )
+// Location: FF_X27_Y22_N23
+dffeas \soc_inst|m0_1|u_logic|Qz33z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Fw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qz33z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qz33z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qz33z4 .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgp2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|W893z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Gip2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|F8v2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y22_N41
+dffeas \soc_inst|m0_1|u_logic|Z853z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z853z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .lut_mask = 64'h00F053530FFF5353;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z853z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z853z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X24_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eo5wx4~0 (
+// Location: LABCELL_X27_Y22_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eo5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Eo5wx4~4_combout  & ( \soc_inst|m0_1|u_logic|Eo5wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Eo5wx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Eo5wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|T1d3z4~q  & \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eo5wx4~4_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Eo5wx4~3_combout  & ( \soc_inst|m0_1|u_logic|T1d3z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Oxnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Qz33z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Z853z4~q ))))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Eo5wx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Eo5wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qz33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z853z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .lut_mask = 64'h0F0F000F0F000000;
-defparam \soc_inst|m0_1|u_logic|Eo5wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .lut_mask = 64'h00000000000088C0;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylwwx4~0 (
+// Location: FF_X28_Y22_N13
+dffeas \soc_inst|m0_1|u_logic|Hq23z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hq23z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hq23z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hq23z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y22_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yg13z4~feeder (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ylwwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uup2z4~q  & ( \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Yg13z4~feeder_combout  = ( \soc_inst|m0_1|u_logic|G5qvx4~1_combout  )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Uup2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylwwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .lut_mask = 64'h0000000000000F00;
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .lut_mask = 64'h00000000FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Yg13z4~feeder .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ylwwx4~1 (
+// Location: FF_X29_Y22_N55
+dffeas \soc_inst|m0_1|u_logic|Yg13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Yg13z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Yg13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Yg13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Yg13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y22_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ylwwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ylwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wai2z4~q  & 
-// \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Oxnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hq23z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Sjj2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yg13z4~q  & (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ylwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hq23z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yg13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .lut_mask = 64'h0000000000000050;
-defparam \soc_inst|m0_1|u_logic|Ylwwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .lut_mask = 64'h00000000C000A000;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ok7wx4~1 (
+// Location: LABCELL_X22_Y17_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oxnvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ok7wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ylwwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Wai2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylwwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ok7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Wai2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Oxnvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Oxnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oxnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Oxnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oxnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Oxnvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Oxnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oxnvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Oxnvx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & (((!\soc_inst|m0_1|u_logic|Cawwx4~combout )) # (\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Eo5wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wai2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ylwwx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Oxnvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oxnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Oxnvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .lut_mask = 64'hF3F30000FBFB0000;
-defparam \soc_inst|m0_1|u_logic|Ok7wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .lut_mask = 64'hF0DDF0FFF0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Oxnvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y25_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Manwx4~0 (
+// Location: MLABCELL_X21_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N5qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Manwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ok7wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) )
+// \soc_inst|m0_1|u_logic|N5qvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~29_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & \soc_inst|m0_1|u_logic|Duc2z4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~29_sumout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & (\soc_inst|m0_1|u_logic|Oxnvx4~3_combout  & \soc_inst|m0_1|u_logic|Duc2z4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Oxnvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ok7wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Manwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Manwx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Manwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .lut_mask = 64'h0005000533373337;
+defparam \soc_inst|m0_1|u_logic|N5qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S1ewx4~0 (
+// Location: LABCELL_X31_Y17_N54
+cyclonev_lcell_comb \soc_inst|ram_1|byte1~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S1ewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Manwx4~0_combout  & !\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ) ) )
+// \soc_inst|ram_1|byte1~0_combout  = ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( \soc_inst|m0_1|u_logic|It52z4~2_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( 
+// ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & ((\soc_inst|m0_1|u_logic|N5qvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & ( !\soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Manwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vy7wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pkwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
+	.combout(\soc_inst|ram_1|byte1~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|m0_1|u_logic|S1ewx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|byte1~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte1~0 .lut_mask = 64'hBBBBB3BFBBBB3333;
+defparam \soc_inst|ram_1|byte1~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W6iwx4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|W6iwx4~combout  = ( \soc_inst|m0_1|u_logic|S1ewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|E6nwx4~0_combout  & !\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ) ) )
+// Location: FF_X31_Y17_N56
+dffeas \soc_inst|ram_1|byte_select[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|byte1~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|byte_select [1]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[1] .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[1] .power_up = "low";
+// synopsys translate_on
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z1ewx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S1ewx4~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|W6iwx4~combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X31_Y17_N8
+dffeas \soc_inst|ram_1|read_cycle~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|read_cycle~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|read_cycle~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|W6iwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|W6iwx4 .lut_mask = 64'h0000000030303030;
-defparam \soc_inst|m0_1|u_logic|W6iwx4 .shared_arith = "off";
+defparam \soc_inst|ram_1|read_cycle~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|read_cycle~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzpvx4~0 (
+// Location: LABCELL_X31_Y17_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[11]~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ntmwx4~1_combout  & ( 
-// ((\soc_inst|m0_1|u_logic|V9iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Gtmwx4~2_combout )) # (\soc_inst|m0_1|u_logic|F8iwx4~0_combout ) ) )
+// \soc_inst|interconnect_1|HRDATA[11]~3_combout  = ( \soc_inst|ram_1|read_cycle~DUPLICATE_q  & ( (\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q  & (!\soc_inst|interconnect_1|mux_sel [2] & (\soc_inst|ram_1|byte_select [1] & 
+// !\soc_inst|interconnect_1|mux_sel [1]))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V9iwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Gtmwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F8iwx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [2]),
+	.datac(!\soc_inst|ram_1|byte_select [1]),
+	.datad(!\soc_inst|interconnect_1|mux_sel [1]),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ntmwx4~1_combout ),
+	.dataf(!\soc_inst|ram_1|read_cycle~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzpvx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .lut_mask = 64'h50FF50FF50505050;
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[11]~3 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[11]~3 .lut_mask = 64'h0000000004000400;
+defparam \soc_inst|interconnect_1|HRDATA[11]~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wzpvx4~1 (
+// Location: LABCELL_X30_Y17_N33
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[15]~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wzpvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Wzpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Wzpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xrmwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|W6iwx4~combout  & ((\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ) # (\soc_inst|m0_1|u_logic|H9iwx4~1_combout ))) ) ) )
+// \soc_inst|interconnect_1|HRDATA[15]~4_combout  = ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # (\soc_inst|interconnect_1|HRDATA[11]~3_combout ) ) ) # ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[11]~3_combout  & !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|W6iwx4~combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|H9iwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lsmwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzpvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xrmwx4~2_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .lut_mask = 64'h0AAA00000FFF0000;
-defparam \soc_inst|m0_1|u_logic|Wzpvx4~1 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[15]~4 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[15]~4 .lut_mask = 64'hF000F000FF0FFF0F;
+defparam \soc_inst|interconnect_1|HRDATA[15]~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~0 (
+// Location: MLABCELL_X34_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Thhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Add2~9_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Jux2z4~q 
-// )) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Jux2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Hjnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|interconnect_1|HRDATA[15]~4_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|U2x2z4~q ) # ((\soc_inst|interconnect_1|HRDATA[15]~4_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~9_sumout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Thhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .lut_mask = 64'h3030303030FC30FC;
-defparam \soc_inst|m0_1|u_logic|Thhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .lut_mask = 64'hF0F3F0F300330033;
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~1 (
+// Location: LABCELL_X31_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Thhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Thhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~85_sumout ))) ) )
+// \soc_inst|m0_1|u_logic|Pmhvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[31]~2_combout )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Thhvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Thhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pmhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .lut_mask = 64'hF0C0F0C000000000;
-defparam \soc_inst|m0_1|u_logic|Thhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .lut_mask = 64'hFFF0FFF0FFF0FFF0;
+defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thhvx4~2 (
+// Location: FF_X31_Y15_N22
+dffeas \soc_inst|m0_1|u_logic|F1x2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Pmhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|F1x2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|F1x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|F1x2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G8nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Thhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Thhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((\soc_inst|m0_1|u_logic|Wzpvx4~1_combout  & !\soc_inst|m0_1|u_logic|R7iwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|G8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((!\soc_inst|interconnect_1|HRDATA[15]~4_combout ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wzpvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Thhvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G8nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .lut_mask = 64'h00000000F3F0F3F0;
-defparam \soc_inst|m0_1|u_logic|Thhvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .lut_mask = 64'h00000000AAA0AAA0;
+defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y21_N41
-dffeas \soc_inst|m0_1|u_logic|Jux2z4 (
+// Location: FF_X34_Y15_N59
+dffeas \soc_inst|m0_1|u_logic|Ufy2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Thhvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|G8nvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Edovx4~combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jux2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Ufy2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jux2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jux2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ufy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ufy2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khnvx4~0 (
+// Location: MLABCELL_X34_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( (!\soc_inst|m0_1|u_logic|Ohh3z4~q ) # (\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ohh3z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Hjnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|F1x2z4~q ) # ((\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Ufy2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout 
+//  & ( (\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|Ufy2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|F1x2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ufy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .lut_mask = 64'hF0F0F5F500005555;
-defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .lut_mask = 64'h0F000F00AFAAAFAA;
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y15_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khnvx4~1 (
+// Location: MLABCELL_X25_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Khnvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Khnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jux2z4~q  & (!\soc_inst|m0_1|u_logic|W0pvx4~combout  & ((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|V2qvx4~combout )))) # (\soc_inst|m0_1|u_logic|Jux2z4~q  & (((!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ) # (\soc_inst|m0_1|u_logic|V2qvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Hjnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hjnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hjnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[31]~2_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hjnvx4~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Khnvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hjnvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .lut_mask = 64'hD0DDD0DD00000000;
-defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .lut_mask = 64'hF0A0F0A000000000;
+defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y15_N29
-dffeas \soc_inst|m0_1|u_logic|Ohh3z4 (
+// Location: FF_X25_Y15_N49
+dffeas \soc_inst|m0_1|u_logic|U2x2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
+	.d(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -98424,488 +98682,494 @@ dffeas \soc_inst|m0_1|u_logic|Ohh3z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+	.q(\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ohh3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ohh3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U2x2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|U2x2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qh72z4~0 (
+// Location: LABCELL_X33_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Srgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qh72z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rek2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Srgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rek2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qh72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .lut_mask = 64'h0020000000000000;
-defparam \soc_inst|m0_1|u_logic|Qh72z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X34_Y18_N2
-dffeas \soc_inst|m0_1|u_logic|I453z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|I453z4~feeder_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|I453z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I453z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|I453z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .lut_mask = 64'h0000000000003000;
+defparam \soc_inst|m0_1|u_logic|Srgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~0 (
+// Location: LABCELL_X30_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fzyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tf72z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( \soc_inst|m0_1|u_logic|Zu33z4~q  & ( (!\soc_inst|m0_1|u_logic|I453z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Rni2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Zu33z4~q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|I453z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I453z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Zu33z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tf72z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .lut_mask = 64'h0000320000000200;
-defparam \soc_inst|m0_1|u_logic|Tf72z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Fzyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y18_N4
-dffeas \soc_inst|m0_1|u_logic|Aez2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aez2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X33_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mk6wx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Mk6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aez2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aez2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .lut_mask = 64'h0000000033333333;
+defparam \soc_inst|m0_1|u_logic|Mk6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~1 (
+// Location: LABCELL_X35_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X3xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tf72z4~1_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~q  & ( !\soc_inst|m0_1|u_logic|Rni2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hc13z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ql23z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|X3xvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( ((\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|G27wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ql23z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hc13z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tf72z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X3xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .lut_mask = 64'h0000C80800000000;
-defparam \soc_inst|m0_1|u_logic|Tf72z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .lut_mask = 64'h3337333700000000;
+defparam \soc_inst|m0_1|u_logic|X3xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y17_N32
-dffeas \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|C3qvx4~1_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X3xvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|X3xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X3xvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fzyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|X3xvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fzyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|X3xvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .lut_mask = 64'hFDFF313300000000;
+defparam \soc_inst|m0_1|u_logic|X3xvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~2 (
+// Location: LABCELL_X29_Y10_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pa7wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tf72z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Nf03z4~q  & ( \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nf03z4~q  & ( !\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nf03z4~q  & ( !\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pa7wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nf03z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tf72z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .lut_mask = 64'h0C00040008000000;
-defparam \soc_inst|m0_1|u_logic|Tf72z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .lut_mask = 64'h000F000F00000000;
+defparam \soc_inst|m0_1|u_logic|Pa7wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tf72z4~3 (
+// Location: LABCELL_X29_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tf72z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Tf72z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Tf72z4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qh72z4~0_combout  & (!\soc_inst|m0_1|u_logic|Tf72z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Aez2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Q3xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pa7wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Pa7wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qh72z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tf72z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aez2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Tf72z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tf72z4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tf72z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q3xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .lut_mask = 64'h8088000000000000;
-defparam \soc_inst|m0_1|u_logic|Tf72z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .lut_mask = 64'h0008000800FF00FF;
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y17_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Esnvx4~0 (
+// Location: LABCELL_X29_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q3xvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Esnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( \soc_inst|m0_1|u_logic|F8wwx4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )) # (\soc_inst|m0_1|u_logic|Ohh3z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Tf72z4~3_combout  & ( !\soc_inst|m0_1|u_logic|F8wwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Hak2z4~q )))) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ohh3z4~q  & ((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Q3xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q3xvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Q3xvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hak2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Tf72z4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Q3xvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .lut_mask = 64'h1D0C1D3F1D0C1D0C;
-defparam \soc_inst|m0_1|u_logic|Esnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .lut_mask = 64'hDDDDFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Q3xvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V2qvx4 (
+// Location: LABCELL_X35_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V2qvx4~combout  = ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( \soc_inst|m0_1|u_logic|Add3~13_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( \soc_inst|m0_1|u_logic|Add3~13_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~13_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( !\soc_inst|m0_1|u_logic|Add3~13_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|U6wvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add3~13_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V2qvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V2qvx4 .lut_mask = 64'hDDDDDD00D0D0D000;
-defparam \soc_inst|m0_1|u_logic|V2qvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .lut_mask = 64'h20202020FF00FF00;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N12
-cyclonev_lcell_comb \soc_inst|interconnect_1|LessThan1~0 (
+// Location: LABCELL_X29_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~4 (
 // Equation(s):
-// \soc_inst|interconnect_1|LessThan1~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ((!\soc_inst|m0_1|u_logic|V2qvx4~combout ) # (!\soc_inst|m0_1|u_logic|haddr_o [29]))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|haddr_o~0_combout  )
+// \soc_inst|m0_1|u_logic|U6wvx4~4_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|haddr_o [29]),
-	.datad(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|LessThan1~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|LessThan1~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|LessThan1~0 .lut_mask = 64'hFFFFFFFF00FC00FC;
-defparam \soc_inst|interconnect_1|LessThan1~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .lut_mask = 64'h4C0C4C0C44004400;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N14
-dffeas \soc_inst|interconnect_1|mux_sel[2] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|interconnect_1|LessThan1~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|interconnect_1|mux_sel [2]),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|U2x2z4~q ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|mux_sel[2] .is_wysiwyg = "true";
-defparam \soc_inst|interconnect_1|mux_sel[2] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .lut_mask = 64'h0505000000000000;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y15_N0
-cyclonev_lcell_comb \soc_inst|interconnect_1|Equal1~0 (
+// Location: LABCELL_X35_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~3 (
 // Equation(s):
-// \soc_inst|interconnect_1|Equal1~0_combout  = ( \soc_inst|interconnect_1|mux_sel [1] & ( (!\soc_inst|interconnect_1|mux_sel [0] & !\soc_inst|interconnect_1|mux_sel [2]) ) )
+// \soc_inst|m0_1|u_logic|U6wvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q  & ((\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datad(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|mux_sel [1]),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|Equal1~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|Equal1~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|Equal1~0 .lut_mask = 64'h00000000F000F000;
-defparam \soc_inst|interconnect_1|Equal1~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .lut_mask = 64'h2222222201230121;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y16_N5
-dffeas \soc_inst|switches_1|switch_store[0][3] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[3]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~1_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[0][3]~q ),
-	.prn(vcc));
+// Location: LABCELL_X29_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~5 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|U6wvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|U6wvx4~3_combout  & ( \soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~2_combout  & (!\soc_inst|m0_1|u_logic|U6wvx4~4_combout  & 
+// !\soc_inst|m0_1|u_logic|U6wvx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6wvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~4_combout  & !\soc_inst|m0_1|u_logic|U6wvx4~1_combout ) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U6wvx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|U6wvx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~5_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[0][3] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[0][3] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .lut_mask = 64'hC0C0000080800000;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y16_N3
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[3]~26 (
+// Location: LABCELL_X24_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~0 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[3]~26_combout  = ( \soc_inst|interconnect_1|HRDATA[6]~10_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout )) # 
-// (\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|switches_1|switch_store[0][3]~q ))) ) ) # ( !\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) )
+// \soc_inst|m0_1|u_logic|U6wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datac(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
-	.datad(!\soc_inst|switches_1|switch_store[0][3]~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[3]~26 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[3]~26 .lut_mask = 64'hAAAAAAAA0C3F0C3F;
-defparam \soc_inst|interconnect_1|HRDATA[3]~26 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .lut_mask = 64'h00000000F0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~0 (
+// Location: LABCELL_X29_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E7nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|interconnect_1|HRDATA[3]~26_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Jky2z4~q ) # ((\soc_inst|interconnect_1|HRDATA[3]~26_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|U6wvx4~6_combout  = ( !\soc_inst|m0_1|u_logic|U6wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & (\soc_inst|m0_1|u_logic|Q3xvx4~1_combout  & (\soc_inst|m0_1|u_logic|J3xvx4~combout  & 
+// \soc_inst|m0_1|u_logic|U6wvx4~5_combout ))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[3]~26_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|J3xvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U6wvx4~5_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E7nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .lut_mask = 64'hF0F5F0F500550055;
-defparam \soc_inst|m0_1|u_logic|E7nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .lut_mask = 64'h0002000200000000;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vphvx4~0 (
+// Location: LABCELL_X29_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vphvx4~0_combout  = (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[19]~25_combout )
+// \soc_inst|m0_1|u_logic|U6wvx4~7_combout  = ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Lu6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Qdj2z4~q  & 
+// \soc_inst|interconnect_1|HREADY~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( \soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( 
+// !\soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|X3xvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|U6wvx4~6_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vphvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .lut_mask = 64'hFFF0FFF0FFF0FFF0;
-defparam \soc_inst|m0_1|u_logic|Vphvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .lut_mask = 64'h0F0F0F0F0F0F0404;
+defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y20_N20
-dffeas \soc_inst|m0_1|u_logic|Oiw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vphvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Oiw2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X34_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndwvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ndwvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pty2z4~q  & ((\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ))) ) 
+// ) ) # ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|Viy2z4~q  & ((\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) 
+// ) ) ) # ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Viy2z4~q  & ((\soc_inst|m0_1|u_logic|Dvy2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ndwvx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oiw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Oiw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .lut_mask = 64'h0077777700070707;
+defparam \soc_inst|m0_1|u_logic|Ndwvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~1 (
+// Location: MLABCELL_X28_Y14_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E7nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q ) # ((!\soc_inst|m0_1|u_logic|Oiw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Oiw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|I3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( (!\soc_inst|m0_1|u_logic|I2t2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ilpvx4~0_combout )))) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Auk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ilpvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Oiw2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E7nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I3mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .lut_mask = 64'h0A0A0A0AFF0AFF0A;
-defparam \soc_inst|m0_1|u_logic|E7nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .lut_mask = 64'hCCEECCEEC0E0C0E0;
+defparam \soc_inst|m0_1|u_logic|I3mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7nvx4~2 (
+// Location: MLABCELL_X28_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I3mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E7nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|E7nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|E7nvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[19]~25_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|I3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I3mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & (\soc_inst|m0_1|u_logic|K1z2z4~q  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ndwvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|I3mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ((\soc_inst|m0_1|u_logic|K1z2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & (\soc_inst|m0_1|u_logic|Ndwvx4~0_combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|E7nvx4~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[19]~25_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ndwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E7nvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I3mvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .lut_mask = 64'hCCC0CCC000000000;
-defparam \soc_inst|m0_1|u_logic|E7nvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .lut_mask = 64'h028A028A008A008A;
+defparam \soc_inst|m0_1|u_logic|I3mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y20_N32
-dffeas \soc_inst|m0_1|u_logic|Jky2z4 (
+// Location: FF_X28_Y14_N35
+dffeas \soc_inst|m0_1|u_logic|K1z2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|E7nvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|I3mvx4~1_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -98914,2297 +99178,2441 @@ dffeas \soc_inst|m0_1|u_logic|Jky2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|K1z2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jky2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jky2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|K1z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K1z2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gxxvx4~0 (
+// Location: MLABCELL_X28_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4xvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gxxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rxl2z4~q  & ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( !\soc_inst|m0_1|u_logic|Jky2z4~q  $ (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Rxl2z4~q  & ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( !\soc_inst|m0_1|u_logic|Jky2z4~q  $ (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Rxl2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( !\soc_inst|m0_1|u_logic|Jky2z4~q  $ (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rxl2z4~q  & ( !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Jky2z4~q  $ (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|E4xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( (\soc_inst|m0_1|u_logic|I2t2z4~q  & (\soc_inst|m0_1|u_logic|K1z2z4~q  & \soc_inst|m0_1|u_logic|C3z2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .lut_mask = 64'h6969969696966969;
-defparam \soc_inst|m0_1|u_logic|Gxxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .lut_mask = 64'h0000000000030003;
+defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Irxvx4~0 (
+// Location: LABCELL_X35_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Irxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Viy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q  & (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jky2z4~q ))) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Viy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q  & ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Jky2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jky2z4~q )))) # (\soc_inst|m0_1|u_logic|Rxl2z4~q  & (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Jky2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Hklwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q ) # (!\soc_inst|m0_1|u_logic|Jky2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Dsqvx4~combout  & ( !\soc_inst|m0_1|u_logic|Jky2z4~q  ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
 	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Irxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hklwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .lut_mask = 64'hE880E88080008000;
-defparam \soc_inst|m0_1|u_logic|Irxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .lut_mask = 64'hFF000000FFAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zpxvx4~0 (
+// Location: MLABCELL_X34_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zpxvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Irxvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jvxvx4~combout  & ((!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Irxvx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Gxxvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Jvxvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Hklwx4~2_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~q  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H9i2z4~q  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gxxvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Jvxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Irxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hklwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .lut_mask = 64'h377F377FC880C880;
-defparam \soc_inst|m0_1|u_logic|Zpxvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .lut_mask = 64'h0000000020001000;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6xvx4~0 (
+// Location: LABCELL_X35_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I6xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xipvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Zpxvx4~0_combout  $ (!\soc_inst|m0_1|u_logic|Gqxvx4~combout  $ (!\soc_inst|m0_1|u_logic|Y7xvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Hklwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hklwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Hklwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Nbm2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Gvrwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hklwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Hklwx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zpxvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gqxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y7xvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xipvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Gvrwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hklwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I6xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hklwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .lut_mask = 64'h0000000096969696;
-defparam \soc_inst|m0_1|u_logic|I6xvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y23_N58
-dffeas \soc_inst|m0_1|u_logic|Qzq2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Kfpvx4~5_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qzq2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qzq2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qzq2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .lut_mask = 64'hCCCC8C8C00000000;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~1 (
+// Location: LABCELL_X27_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jeewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4xvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dsqvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Nqy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dsqvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Nqy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Mnpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dsqvx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|Nqy2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Jeewx4~combout  = ( !\soc_inst|m0_1|u_logic|Zcn2z4~q  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qzq2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dsqvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hhpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mnpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jeewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .lut_mask = 64'h8C8C8C8C00008C8C;
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jeewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jeewx4 .lut_mask = 64'hA000A00000000000;
+defparam \soc_inst|m0_1|u_logic|Jeewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~2 (
+// Location: LABCELL_X35_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zmlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4xvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z4xvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  $ (((\soc_inst|m0_1|u_logic|Qzq2z4~q ) # (\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Vopvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Zmlwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vopvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Jeewx4~combout  $ (((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z4xvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jeewx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vopvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .lut_mask = 64'h000000009F3F9F3F;
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .lut_mask = 64'h6363000000000000;
+defparam \soc_inst|m0_1|u_logic|Zmlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~0 (
+// Location: LABCELL_X35_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hklwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q ) # ((!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zpqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~q  & \soc_inst|m0_1|u_logic|Irqvx4~1_combout ) ) )
+// \soc_inst|m0_1|u_logic|Hklwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Zmlwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hklwx4~0_combout  & (\soc_inst|m0_1|u_logic|Hklwx4~3_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zmlwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Hklwx4~0_combout  & \soc_inst|m0_1|u_logic|Hklwx4~3_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Irqvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zpqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hklwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hklwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Zmlwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hklwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .lut_mask = 64'h00F000F0AAFAAAFA;
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .lut_mask = 64'h040400000C040000;
+defparam \soc_inst|m0_1|u_logic|Hklwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z4xvx4~3 (
+// Location: MLABCELL_X28_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bthvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z4xvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z4xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I6xvx4~0_combout  & \soc_inst|m0_1|u_logic|Z4xvx4~2_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rmpvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Z4xvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|I6xvx4~0_combout  & (\soc_inst|m0_1|u_logic|Z4xvx4~2_combout  & \soc_inst|m0_1|u_logic|Viy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Bthvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~q  & ( \soc_inst|m0_1|u_logic|Hklwx4~4_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~q  & ( \soc_inst|m0_1|u_logic|Hklwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  
+// & ((\soc_inst|m0_1|u_logic|Cllwx4~0_combout ) # (\soc_inst|m0_1|u_logic|E4xvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cyq2z4~q  & ( !\soc_inst|m0_1|u_logic|Hklwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Qllwx4~4_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I6xvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z4xvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rmpvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z4xvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hklwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .lut_mask = 64'h0202222200000000;
-defparam \soc_inst|m0_1|u_logic|Z4xvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .lut_mask = 64'h0000F0F00707FFFF;
+defparam \soc_inst|m0_1|u_logic|Bthvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X42_Y23_N29
-dffeas \soc_inst|m0_1|u_logic|Zcn2z4 (
+// Location: FF_X28_Y15_N14
+dffeas \soc_inst|m0_1|u_logic|Cyq2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Z4xvx4~3_combout ),
+	.d(\soc_inst|m0_1|u_logic|Bthvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Rfpvx4~5_combout ),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Zcn2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Cyq2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zcn2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Zcn2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Cyq2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cyq2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z9dwx4~0 (
+// Location: LABCELL_X23_Y20_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vff2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z9dwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Vff2z4~combout  = ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~q )) # (\soc_inst|m0_1|u_logic|Duuwx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~q  & \soc_inst|m0_1|u_logic|Bdwwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( \soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & 
+// (((\soc_inst|m0_1|u_logic|Fzl2z4~q )) # (\soc_inst|m0_1|u_logic|Duuwx4~combout ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q ) # (\soc_inst|m0_1|u_logic|Bdwwx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ylbwx4~combout  & 
+// ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (\soc_inst|m0_1|u_logic|Duuwx4~combout  & (!\soc_inst|m0_1|u_logic|Fzl2z4~q ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// \soc_inst|m0_1|u_logic|Bdwwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ylbwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ebbwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (\soc_inst|m0_1|u_logic|Duuwx4~combout  & (!\soc_inst|m0_1|u_logic|Fzl2z4~q 
+// ))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q ) # (\soc_inst|m0_1|u_logic|Bdwwx4~combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duuwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bdwwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ylbwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ebbwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vff2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|Z9dwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vff2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vff2z4 .lut_mask = 64'h707340437C7F4C4F;
+defparam \soc_inst|m0_1|u_logic|Vff2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jk0xx4~0 (
+// Location: LABCELL_X18_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aeg2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jk0xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Aeg2z4~combout  = ( \soc_inst|m0_1|u_logic|Fzl2z4~q  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (\soc_inst|m0_1|u_logic|Ey9wx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Nrvwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fzl2z4~q  & ( \soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q ) # (\soc_inst|m0_1|u_logic|Hmqwx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fzl2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (\soc_inst|m0_1|u_logic|Ey9wx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((\soc_inst|m0_1|u_logic|Nrvwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Zkuwx4~combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~q  & \soc_inst|m0_1|u_logic|Hmqwx4~combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ey9wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hmqwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nrvwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zkuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aeg2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .lut_mask = 64'h00000000000F000F;
-defparam \soc_inst|m0_1|u_logic|Jk0xx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Aeg2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aeg2z4 .lut_mask = 64'h05052277AFAF2277;
+defparam \soc_inst|m0_1|u_logic|Aeg2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aj0xx4 (
+// Location: LABCELL_X16_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tdg2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aj0xx4~combout  = ( \soc_inst|m0_1|u_logic|Jk0xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Yg2wx4~combout ) # ((\soc_inst|m0_1|u_logic|Zcn2z4~q  & !\soc_inst|m0_1|u_logic|Cyq2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Jk0xx4~0_combout  & ( \soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Zcn2z4~q  & !\soc_inst|m0_1|u_logic|Cyq2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Jk0xx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yg2wx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Tdg2z4~combout  = ( \soc_inst|m0_1|u_logic|H2wwx4~combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Pybwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Ai9wx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H2wwx4~combout  & ( \soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Pybwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Ai9wx4~combout ))))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|H2wwx4~combout  & 
+// ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Pybwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Ai9wx4~combout ))))) # 
+// (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|H2wwx4~combout  & ( !\soc_inst|m0_1|u_logic|Pjqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Pybwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Ai9wx4~combout ))))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zcn2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Yg2wx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jk0xx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pybwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ai9wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H2wwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pjqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tdg2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aj0xx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aj0xx4 .lut_mask = 64'h0000FF004444FF44;
-defparam \soc_inst|m0_1|u_logic|Aj0xx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tdg2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tdg2z4 .lut_mask = 64'h202A252F707A757F;
+defparam \soc_inst|m0_1|u_logic|Tdg2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gjqvx4~0 (
+// Location: LABCELL_X22_Y18_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jhe2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aj0xx4~combout  & ( \soc_inst|m0_1|u_logic|Thm2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Jhe2z4~combout  = ( \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & !\soc_inst|m0_1|u_logic|U7uwx4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (!\soc_inst|m0_1|u_logic|F8wwx4~combout  & (\soc_inst|m0_1|u_logic|Fzl2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( \soc_inst|m0_1|u_logic|Feqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|U7uwx4~combout ) # (\soc_inst|m0_1|u_logic|Fzl2z4~q )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & (!\soc_inst|m0_1|u_logic|F8wwx4~combout  & (\soc_inst|m0_1|u_logic|Fzl2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fexwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & !\soc_inst|m0_1|u_logic|U7uwx4~combout )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|F8wwx4~combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fexwx4~combout  & ( !\soc_inst|m0_1|u_logic|Feqwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((!\soc_inst|m0_1|u_logic|U7uwx4~combout ) # (\soc_inst|m0_1|u_logic|Fzl2z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|F8wwx4~combout ) # ((!\soc_inst|m0_1|u_logic|Fzl2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|F8wwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U7uwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fexwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Feqwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jhe2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|Gjqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jhe2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jhe2z4 .lut_mask = 64'hFE5EF454AE0EA404;
+defparam \soc_inst|m0_1|u_logic|Jhe2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xdnvx4~0 (
+// Location: LABCELL_X22_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qhe2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|Gjqvx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|Thm2z4~q ))) # 
-// (\soc_inst|interconnect_1|HREADY~0_combout  & (\soc_inst|m0_1|u_logic|Ujqvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Qhe2z4~combout  = ( \soc_inst|m0_1|u_logic|Eruwx4~combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q ) # ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Saqwx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Cawwx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout  & ( \soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((\soc_inst|m0_1|u_logic|Fzl2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Saqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Cawwx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Eruwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (((!\soc_inst|m0_1|u_logic|Fzl2z4~q )))) # (\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Saqwx4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Cawwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Eruwx4~combout  & ( !\soc_inst|m0_1|u_logic|N3ywx4~combout  & ( (\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((!\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Saqwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Cawwx4~combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cawwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|N3ywx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qhe2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .lut_mask = 64'h03CF03CFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X48_Y20_N44
-dffeas \soc_inst|m0_1|u_logic|Thm2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Thm2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Thm2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Thm2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qhe2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qhe2z4 .lut_mask = 64'h0511AF1105BBAFBB;
+defparam \soc_inst|m0_1|u_logic|Qhe2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C34wx4~0 (
+// Location: MLABCELL_X21_Y19_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hhd2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C34wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( !\soc_inst|m0_1|u_logic|Thm2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Hhd2z4~combout  = ( \soc_inst|m0_1|u_logic|Qzq2z4~q  & ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Dmvwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzq2z4~q  & ( \soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & !\soc_inst|m0_1|u_logic|Xcuwx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qzq2z4~q  
+// & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|H1qwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (!\soc_inst|m0_1|u_logic|Dmvwx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzq2z4~q  
+// & ( !\soc_inst|m0_1|u_logic|Bjxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xcuwx4~combout ) # (\soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xcuwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dmvwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H1qwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bjxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hhd2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C34wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C34wx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|C34wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hhd2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hhd2z4 .lut_mask = 64'hDDDDFA508888FA50;
+defparam \soc_inst|m0_1|u_logic|Hhd2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C34wx4 (
+// Location: LABCELL_X22_Y19_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ohd2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C34wx4~combout  = ( \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|C34wx4~0_combout  & \soc_inst|m0_1|u_logic|Ypa2z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( 
-// \soc_inst|m0_1|u_logic|C34wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Ohd2z4~combout  = ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( \soc_inst|m0_1|u_logic|Icxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|D9uwx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~q ) # ((\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( \soc_inst|m0_1|u_logic|Icxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (\soc_inst|m0_1|u_logic|D9uwx4~combout ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((!\soc_inst|m0_1|u_logic|Qzq2z4~q ) # ((\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|G4qwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Icxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (((\soc_inst|m0_1|u_logic|D9uwx4~combout )) # (\soc_inst|m0_1|u_logic|Qzq2z4~q ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Qzq2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|G4qwx4~combout  & ( !\soc_inst|m0_1|u_logic|Icxwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (!\soc_inst|m0_1|u_logic|Qzq2z4~q  & (\soc_inst|m0_1|u_logic|D9uwx4~combout 
+// ))) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Qzq2z4~q  & ((\soc_inst|m0_1|u_logic|Mnvwx4~combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|D9uwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mnvwx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|G4qwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icxwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C34wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ohd2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C34wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C34wx4 .lut_mask = 64'h0F0F0F0F000F000F;
-defparam \soc_inst|m0_1|u_logic|C34wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ohd2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ohd2z4 .lut_mask = 64'h08192A3B4C5D6E7F;
+defparam \soc_inst|m0_1|u_logic|Ohd2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0hwx4~1 (
+// Location: LABCELL_X22_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgd2z4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I0hwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|C34wx4~combout )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Mgd2z4~4_combout  = ( !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Cyq2z4~q ) # (\soc_inst|m0_1|u_logic|Hhd2z4~combout )))) # 
+// (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ohd2z4~combout  & (\soc_inst|m0_1|u_logic|Cyq2z4~q )))) ) ) # ( \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & 
+// ((((!\soc_inst|m0_1|u_logic|Cyq2z4~q ))) # (\soc_inst|m0_1|u_logic|Jhe2z4~combout ))) # (\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Qhe2z4~combout  & (\soc_inst|m0_1|u_logic|Cyq2z4~q ))))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Jhe2z4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qhe2z4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hhd2z4~combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ohd2z4~combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I0hwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .lut_mask = 64'h000000003F333F33;
-defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .lut_mask = 64'hCC03CC47CCCFCC47;
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0hwx4~0 (
+// Location: LABCELL_X23_Y22_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cgf2z4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I0hwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Cgf2z4~combout  = ( \soc_inst|m0_1|u_logic|Qzq2z4~q  & ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Svqwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & 
+// ((\soc_inst|m0_1|u_logic|Lr9wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzq2z4~q  & ( \soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q ) # (\soc_inst|m0_1|u_logic|Bywwx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qzq2z4~q 
+//  & ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fzl2z4~q  & (\soc_inst|m0_1|u_logic|Svqwx4~combout )) # (\soc_inst|m0_1|u_logic|Fzl2z4~q  & ((\soc_inst|m0_1|u_logic|Lr9wx4~combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qzq2z4~q  & 
+// ( !\soc_inst|m0_1|u_logic|Qxuwx4~combout  & ( (\soc_inst|m0_1|u_logic|Bywwx4~combout  & \soc_inst|m0_1|u_logic|Fzl2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bywwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fzl2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svqwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lr9wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qzq2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qxuwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cgf2z4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .lut_mask = 64'h00FF00FF00000000;
-defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cgf2z4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cgf2z4 .lut_mask = 64'h11110C3FDDDD0C3F;
+defparam \soc_inst|m0_1|u_logic|Cgf2z4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zygwx4~0 (
+// Location: LABCELL_X22_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mgd2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zygwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cyq2z4~q  & (((!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & ((\soc_inst|m0_1|u_logic|Cgf2z4~combout ))) # 
+// (\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & (\soc_inst|m0_1|u_logic|Vff2z4~combout ))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~q  & ((((\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Cyq2z4~q  & (((!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & (\soc_inst|m0_1|u_logic|Aeg2z4~combout )) # (\soc_inst|m0_1|u_logic|Mgd2z4~4_combout  & ((\soc_inst|m0_1|u_logic|Tdg2z4~combout )))))) # (\soc_inst|m0_1|u_logic|Cyq2z4~q  
+// & ((((\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ))))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vff2z4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aeg2z4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tdg2z4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mgd2z4~4_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Cgf2z4~combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zygwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .lut_mask = 64'h00C000C000000000;
-defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .lut_mask = 64'h0A0A0A0A777755FF;
+defparam \soc_inst|m0_1|u_logic|Mgd2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvgwx4~0 (
+// Location: LABCELL_X22_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Gzvvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Yyyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Zygwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Yyyvx4~combout  
-// & ( (!\soc_inst|m0_1|u_logic|Zygwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ) # ((\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ) # 
+// (\soc_inst|m0_1|u_logic|Gzvvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mgd2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zygwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~1_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Mgd2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .lut_mask = 64'hD0D0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .lut_mask = 64'h3F3FBFBF00000000;
+defparam \soc_inst|m0_1|u_logic|Gzvvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvgwx4~1 (
+// Location: MLABCELL_X21_Y14_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O092z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvgwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tvgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Srgwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Tvgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|O092z4~0_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & !\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvgwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O092z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .lut_mask = 64'hAAAAAAAA00080008;
-defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O092z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O092z4~0 .lut_mask = 64'h5050505014141414;
+defparam \soc_inst|m0_1|u_logic|O092z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hvhwx4~0 (
+// Location: MLABCELL_X21_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T50wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  ) )
+// \soc_inst|m0_1|u_logic|T50wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~93_sumout  & ( (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Punvx4~4_combout )) # (\soc_inst|m0_1|u_logic|O092z4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Add5~93_sumout  & ( ((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & \soc_inst|m0_1|u_logic|Punvx4~4_combout )) # (\soc_inst|m0_1|u_logic|O092z4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Punvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O092z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~93_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .lut_mask = 64'hF0F0F0F000000000;
-defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T50wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T50wx4~0 .lut_mask = 64'h05FF05FF37FF37FF;
+defparam \soc_inst|m0_1|u_logic|T50wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~0 (
+// Location: MLABCELL_X21_Y14_N3
+cyclonev_lcell_comb \soc_inst|switches_1|half_word_address~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H06wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~q ) ) )
+// \soc_inst|switches_1|half_word_address~0_combout  = ( \soc_inst|m0_1|u_logic|T50wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qr42z4~1_combout  & !\soc_inst|m0_1|u_logic|It52z4~2_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0hwx4~0_combout ),
+	.combout(\soc_inst|switches_1|half_word_address~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .lut_mask = 64'h00000000F555F555;
-defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .shared_arith = "off";
+defparam \soc_inst|switches_1|half_word_address~0 .extended_lut = "off";
+defparam \soc_inst|switches_1|half_word_address~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|switches_1|half_word_address~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~0 (
+// Location: LABCELL_X31_Y17_N18
+cyclonev_lcell_comb \soc_inst|ram_1|byte2~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P0hwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P0hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tvgwx4~1_combout  ) ) )
+// \soc_inst|ram_1|byte2~0_combout  = ( \soc_inst|m0_1|u_logic|hsize_o~0_combout  & ( (\soc_inst|switches_1|half_word_address~0_combout  & ((!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Qr42z4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|hsize_o~0_combout  )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P0hwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|switches_1|half_word_address~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|hsize_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ),
+	.combout(\soc_inst|ram_1|byte2~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .lut_mask = 64'hFF00FC0000000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|byte2~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|byte2~0 .lut_mask = 64'hFFFFFFFF0F020F02;
+defparam \soc_inst|ram_1|byte2~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kugwx4~0 (
+// Location: FF_X31_Y17_N20
+dffeas \soc_inst|ram_1|byte_select[2]~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|byte2~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|ram_1|always1~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|byte_select[2]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|byte_select[2]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y17_N36
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[16]~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kugwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & (((\soc_inst|m0_1|u_logic|C9yvx4~combout  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|A76wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|A76wx4~0_combout ) ) )
+// \soc_inst|interconnect_1|HRDATA[16]~7_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~6_combout  & ( ((\soc_inst|ram_1|byte_select[2]~DUPLICATE_q  & (\soc_inst|ram_1|read_cycle~q  & \soc_inst|interconnect_1|mux_sel [0]))) # 
+// (\soc_inst|interconnect_1|mux_sel [1]) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.dataa(!\soc_inst|ram_1|byte_select[2]~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(!\soc_inst|ram_1|read_cycle~q ),
+	.datad(!\soc_inst|interconnect_1|mux_sel [0]),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kugwx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .lut_mask = 64'h1111111115111511;
-defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[16]~7 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[16]~7 .lut_mask = 64'h0000000033373337;
+defparam \soc_inst|interconnect_1|HRDATA[16]~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~0 (
+// Location: FF_X31_Y15_N53
+dffeas \soc_inst|switches_1|switch_store[1][7] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[7]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[1][7]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[1][7] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[1][7] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[23]~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Togwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Hyy2z4~q  & !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q ) # ((\soc_inst|m0_1|u_logic|Hyy2z4~q  & !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )) ) )
+// \soc_inst|interconnect_1|HRDATA[23]~8_combout  = ( \soc_inst|switches_1|switch_store[1][7]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
+// (\soc_inst|interconnect_1|HRDATA[16]~7_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][7]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][7]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & 
+// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][7]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[16]~7_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datad(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
+	.datae(!\soc_inst|switches_1|switch_store[1][7]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Togwx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Togwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Togwx4~0 .lut_mask = 64'hCFCCCFCC03000300;
-defparam \soc_inst|m0_1|u_logic|Togwx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[23]~8 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[23]~8 .lut_mask = 64'hAA00AA0FAAF0AAFF;
+defparam \soc_inst|interconnect_1|HRDATA[23]~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~1 (
+// Location: LABCELL_X30_Y16_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tohvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Togwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Tohvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[23]~8_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Togwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tohvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Togwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Togwx4~1 .lut_mask = 64'hFF50FF5050505050;
-defparam \soc_inst|m0_1|u_logic|Togwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~2 (
+// Location: FF_X30_Y16_N53
+dffeas \soc_inst|m0_1|u_logic|Sow2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Tohvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Sow2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Sow2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sow2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y16_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Togwx4~2_combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Togwx4~1_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|C6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Sow2z4~q  & ( (\soc_inst|m0_1|u_logic|Wfovx4~combout  & !\soc_inst|m0_1|u_logic|W4y2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Sow2z4~q  & ( ((\soc_inst|m0_1|u_logic|Wfovx4~combout  & 
+// !\soc_inst|m0_1|u_logic|W4y2z4~q )) # (\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Togwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sow2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Togwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Togwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Togwx4~2 .lut_mask = 64'h330033003F0F3F0F;
-defparam \soc_inst|m0_1|u_logic|Togwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .lut_mask = 64'h7575757530303030;
+defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~3 (
+// Location: LABCELL_X30_Y16_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Togwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Togwx4~2_combout  & ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Togwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Togwx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|C6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|interconnect_1|HRDATA[7]~11_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((\soc_inst|interconnect_1|HRDATA[7]~11_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Togwx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Togwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Togwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Togwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Togwx4~3 .lut_mask = 64'hF0F0F0F050F050F0;
-defparam \soc_inst|m0_1|u_logic|Togwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .lut_mask = 64'hF0F5F0F500550055;
+defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekgwx4~0 (
+// Location: LABCELL_X30_Y16_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ekgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Tki2z4~q ))) 
-// ) )
+// \soc_inst|m0_1|u_logic|C6nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|C6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C6nvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[23]~8_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C6nvx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C6nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .lut_mask = 64'h0000000000200020;
-defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .lut_mask = 64'hFC00FC0000000000;
+defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Poa2z4~1 (
+// Location: FF_X30_Y16_N35
+dffeas \soc_inst|m0_1|u_logic|Nqy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Nqy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nqy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y13_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5wvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Poa2z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Poa2z4~0_combout  & \soc_inst|m0_1|u_logic|Pcyvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Z5wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (\soc_inst|m0_1|u_logic|Hklwx4~1_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hklwx4~1_combout  & \soc_inst|m0_1|u_logic|U6wvx4~7_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hklwx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Poa2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .lut_mask = 64'h0005000500000000;
-defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .lut_mask = 64'h0055005500F500F5;
+defparam \soc_inst|m0_1|u_logic|Z5wvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~14 (
+// Location: LABCELL_X31_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~14_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( !\soc_inst|m0_1|u_logic|Ekgwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ekgwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Poa2z4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( !\soc_inst|m0_1|u_logic|Ekgwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( !\soc_inst|m0_1|u_logic|Ekgwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|W3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Nqy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Poa2z4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~14_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W3mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .lut_mask = 64'hAAAAAAAAA8A8AAAA;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .lut_mask = 64'hCCCCFCFC0000F0F0;
+defparam \soc_inst|m0_1|u_logic|W3mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~13 (
+// Location: MLABCELL_X28_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|W3mvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~13_combout  = ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # ((\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & \soc_inst|m0_1|u_logic|Jky2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & \soc_inst|m0_1|u_logic|Jky2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & \soc_inst|m0_1|u_logic|Jky2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & 
-// (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & \soc_inst|m0_1|u_logic|Jky2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|W3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|I2t2z4~q  & ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & (!\soc_inst|m0_1|u_logic|W3mvx4~0_combout  & ((\soc_inst|m0_1|u_logic|Bsy2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I2t2z4~q  & ( \soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & (!\soc_inst|m0_1|u_logic|W3mvx4~0_combout  & 
+// ((\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (\soc_inst|m0_1|u_logic|R8wvx4~1_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|I2t2z4~q  & ( !\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|W3mvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~13_combout ),
+	.combout(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .lut_mask = 64'h004400440044F0F4;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .lut_mask = 64'h0000AAAA08880888;
+defparam \soc_inst|m0_1|u_logic|W3mvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~15 (
+// Location: FF_X28_Y14_N14
+dffeas \soc_inst|m0_1|u_logic|I2t2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|W3mvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|I2t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|I2t2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V8yvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~15_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~13_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~14_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|V8yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & (\soc_inst|m0_1|u_logic|I2t2z4~q  & (\soc_inst|m0_1|u_logic|Auk2z4~q ))) # (\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|I2t2z4~q  & (\soc_inst|m0_1|u_logic|Auk2z4~q  & !\soc_inst|m0_1|u_logic|E4xvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bfgwx4~14_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~13_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~15_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V8yvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .lut_mask = 64'h0F0E0F0E00000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .lut_mask = 64'h10101010101F101F;
+defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~16 (
+// Location: LABCELL_X37_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~16_combout  = ( \soc_inst|m0_1|u_logic|Rngwx4~combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~15_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~15_combout  & 
-// ((\soc_inst|m0_1|u_logic|Togwx4~3_combout ) # (\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|D6yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Csewx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Csewx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Csewx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Togwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~15_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~16_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D6yvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .lut_mask = 64'h005F005F00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .lut_mask = 64'h0C0C0C0CDDDD8C8C;
+defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Itgwx4~0 (
+// Location: LABCELL_X23_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Itgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Msyvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|D6yvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Auk2z4~q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout 
+//  & ( (!\soc_inst|m0_1|u_logic|Auk2z4~q  & \soc_inst|m0_1|u_logic|Pcyvx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D6yvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .lut_mask = 64'hF0FFF0FF00000000;
-defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~6 (
+// Location: LABCELL_X23_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (((\soc_inst|m0_1|u_logic|Ark2z4~q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  
-// & ((\soc_inst|m0_1|u_logic|Sgj2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|D6yvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|D6yvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D6yvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|G2lwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C9yvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|V8yvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|V8yvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|D6yvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D6yvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .lut_mask = 64'h0AF03E3C00000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .lut_mask = 64'hE0E0000000000000;
+defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~7 (
+// Location: FF_X19_Y19_N37
+dffeas \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y19_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L61xx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~7_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~6_combout  & (((!\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|Pmgwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Tki2z4~q ))) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~6_combout  ) )
+// \soc_inst|m0_1|u_logic|L61xx4~0_combout  = ( \soc_inst|m0_1|u_logic|Svk2z4~q  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|T1d3z4~q  & !\soc_inst|m0_1|u_logic|Yaz2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Yaz2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Svk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .lut_mask = 64'hAAAAAAAAA222A222;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L61xx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L61xx4~0 .lut_mask = 64'h00000000C000C000;
+defparam \soc_inst|m0_1|u_logic|L61xx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// (((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) ) )
+// Location: FF_X28_Y22_N14
+dffeas \soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Ydyvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X27_Y22_N40
+dffeas \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|G5qvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Z853z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .lut_mask = 64'h5C0C5C0C00000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~8 (
+// Location: LABCELL_X22_Y20_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~5_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~7_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Ax0xx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Zhyvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q ) # (\soc_inst|m0_1|u_logic|Knz2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H3d3z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Z853z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H3d3z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Knz2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~7_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Knz2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z853z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .lut_mask = 64'h00FB00FB00000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .lut_mask = 64'hC0CCC0CCC3CFC3CF;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~9 (
+// Location: LABCELL_X22_Y20_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~9_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Zhyvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~q  & (!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q 
+// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|Zhyvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H3d3z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .lut_mask = 64'h00000000FFEFFFEF;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .lut_mask = 64'h0F05000080800000;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~3 (
+// Location: LABCELL_X27_Y22_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0hwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|C2yvx4~combout  & (\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & !\soc_inst|m0_1|u_logic|A4t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Zhyvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Qz33z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|T1d3z4~q  & ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & ( (!\soc_inst|m0_1|u_logic|Yg13z4~q  & (\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qz33z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yg13z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T1d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0hwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .lut_mask = 64'h1010101000000000;
-defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .lut_mask = 64'h0C0000000A000000;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~10 (
+// Location: LABCELL_X22_Y20_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zhyvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~10_combout  = ( \soc_inst|m0_1|u_logic|P0hwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|My6wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & 
-// (((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Zhyvx4~combout  = ( \soc_inst|m0_1|u_logic|Ek03z4~q  & ( !\soc_inst|m0_1|u_logic|Zhyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8ywx4~combout  & !\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ek03z4~q  
+// & ( !\soc_inst|m0_1|u_logic|Zhyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L61xx4~0_combout  & (!\soc_inst|m0_1|u_logic|Q8ywx4~combout  & !\soc_inst|m0_1|u_logic|Zhyvx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P0hwx4~3_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|L61xx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q8ywx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Zhyvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ek03z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zhyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .lut_mask = 64'h0000000074447444;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zhyvx4 .lut_mask = 64'hC000F00000000000;
+defparam \soc_inst|m0_1|u_logic|Zhyvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~11 (
+// Location: MLABCELL_X28_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ujqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~11_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~10_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|H3d3z4~q  & ( \soc_inst|m0_1|u_logic|Aj0xx4~combout  & ( (\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & !\soc_inst|m0_1|u_logic|Zhyvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|H3d3z4~q  & 
+// ( \soc_inst|m0_1|u_logic|Aj0xx4~combout  & ( (!\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & (\soc_inst|m0_1|u_logic|B73wx4~combout  & ((\soc_inst|m0_1|u_logic|Z9dwx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Kryvx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Zhyvx4~combout ) # ((\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Z9dwx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~9_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~10_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|H3d3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~11_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .lut_mask = 64'h5554555400000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .lut_mask = 64'h0000000050735050;
+defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y24_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ugewx4~0 (
+// Location: MLABCELL_X28_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xdnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ugewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q  & !\soc_inst|m0_1|u_logic|Viy2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Xdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Thm2z4~q  & ( \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Thm2z4~q  & ( \soc_inst|m0_1|u_logic|Gjqvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Thm2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Gjqvx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Thm2z4~q  & ( !\soc_inst|m0_1|u_logic|Gjqvx4~0_combout  & ( 
+// (\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Ujqvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .lut_mask = 64'hA0A0000000000000;
-defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .lut_mask = 64'h0505AFAFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Xdnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~18 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~18_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Px5wx4~combout )) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datag(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~18_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X28_Y12_N25
+dffeas \soc_inst|m0_1|u_logic|Thm2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Xdnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Thm2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .lut_mask = 64'hBBFFBFFFFFF3FFFF;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Thm2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Thm2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hahwx4~0 (
+// Location: MLABCELL_X28_Y17_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C34wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hahwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (((\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|C2yvx4~combout ))) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|B73wx4~combout  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|C34wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ye4wx4~combout  & ( !\soc_inst|m0_1|u_logic|Thm2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Thm2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hahwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .lut_mask = 64'h0500050037003700;
-defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X50_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thgwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Thgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & (\soc_inst|m0_1|u_logic|C2yvx4~combout  & \soc_inst|m0_1|u_logic|Swy2z4~q ))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+defparam \soc_inst|m0_1|u_logic|C34wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C34wx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|C34wx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ypa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) # (\soc_inst|m0_1|u_logic|C34wx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ypa2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) # (\soc_inst|m0_1|u_logic|C34wx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ypa2z4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Kofwx4~0_combout  & \soc_inst|m0_1|u_logic|Ik4wx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ypa2z4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ypa2z4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Una2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ik4wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ) # (\soc_inst|m0_1|u_logic|C34wx4~0_combout )))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|C34wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Una2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ypa2z4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ypa2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Thgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .lut_mask = 64'h0000000000010001;
-defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .lut_mask = 64'h00C400C000C400C4;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhgwx4~1 (
+// Location: LABCELL_X19_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhgwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ukpvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|It52z4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Tyx2z4~q ))) # (\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Hxx2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( (\soc_inst|m0_1|u_logic|M9pvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Tyx2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hxx2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|It52z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .lut_mask = 64'h0050005000000000;
-defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~0 .lut_mask = 64'h00E400E4E4E4E4E4;
+defparam \soc_inst|m0_1|u_logic|It52z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~1 (
+// Location: LABCELL_X19_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Mhgwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Thgwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Hahwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pcyvx4~combout )) # 
-// (\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|It52z4~1_combout  = ( \soc_inst|m0_1|u_logic|Ipsvx4~0_combout  & ( \soc_inst|m0_1|u_logic|It52z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vaw2z4~q  & 
+// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ipsvx4~0_combout  & ( \soc_inst|m0_1|u_logic|It52z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vaw2z4~q  & 
+// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ipsvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|It52z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Vaw2z4~q  & 
+// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ipsvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|It52z4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hahwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Thgwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|It52z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|It52z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .lut_mask = 64'hFD00FD0000000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~1 .lut_mask = 64'hFFFF008800880088;
+defparam \soc_inst|m0_1|u_logic|It52z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~2 (
+// Location: MLABCELL_X21_Y17_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7mwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P0hwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Hyy2z4~q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|E7mwx4~combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|It52z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Z5pvx4~3_combout  & (\soc_inst|m0_1|u_logic|hprot_o~5_combout  & 
+// ((!\soc_inst|m0_1|u_logic|S4w2z4~q ) # (\soc_inst|m0_1|u_logic|Z5pvx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|hprot_o~5_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|It52z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P0hwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E7mwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .lut_mask = 64'h0200020000000000;
-defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E7mwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7mwx4 .lut_mask = 64'h000000000000000B;
+defparam \soc_inst|m0_1|u_logic|E7mwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bhewx4~0 (
+// Location: FF_X21_Y17_N1
+dffeas \soc_inst|m0_1|u_logic|Vaw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Vaw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Vaw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bpsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bhewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hyewx4~combout  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Blwvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Bpsvx4~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|m0_1|u_logic|Vaw2z4~q  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .lut_mask = 64'h0000000000300030;
-defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Bpsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~4 (
+// Location: LABCELL_X33_Y14_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xnrvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|P0hwx4~2_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Xnrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bpsvx4~0_combout  & !\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .lut_mask = 64'h002200220F2F0F2F;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .lut_mask = 64'h000000000A000A00;
+defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahhwx4~0 (
+// Location: LABCELL_X33_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ahhwx4~0_combout  = (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ark2z4~q ))
+// \soc_inst|m0_1|u_logic|Jvqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & !\soc_inst|m0_1|u_logic|Nbm2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jvqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .lut_mask = 64'h0500050005000500;
-defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .lut_mask = 64'h000000000A000A00;
+defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~2 (
+// Location: LABCELL_X33_Y14_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jnrvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|I0hwx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|I0hwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Jnrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvqvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Wfovx4~combout  & \soc_inst|m0_1|u_logic|Jhy2z4~q )) # (\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jnrvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .lut_mask = 64'h0005000533373337;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .lut_mask = 64'h0000000033F333F3;
+defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~3 (
+// Location: FF_X33_Y14_N31
+dffeas \soc_inst|m0_1|u_logic|Jhy2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Jnrvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jhy2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jhy2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y16_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfovx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Wfovx4~combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Jhy2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .lut_mask = 64'hFFFEFFFE00000000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wfovx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfovx4 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Wfovx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~12 (
+// Location: MLABCELL_X34_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Slnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~12_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~4_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~11_combout  & (\soc_inst|m0_1|u_logic|Bfgwx4~18_combout  & 
-// \soc_inst|m0_1|u_logic|Bfgwx4~1_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Slnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & \soc_inst|m0_1|u_logic|Ueovx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~11_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bfgwx4~18_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bfgwx4~1_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Bfgwx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~12_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Slnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .lut_mask = 64'h0000000001010000;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .lut_mask = 64'h0000000000AA00AA;
+defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~17 (
+// Location: FF_X34_Y15_N28
+dffeas \soc_inst|m0_1|u_logic|T1y2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Slnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|T1y2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T1y2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T1y2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X31_Y15_N41
+dffeas \soc_inst|m0_1|u_logic|Jcw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Jcw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Jcw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Jcw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Llnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~17_combout  = ( \soc_inst|m0_1|u_logic|Itgwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~12_combout  & ( (!\soc_inst|m0_1|u_logic|Kugwx4~0_combout  & \soc_inst|m0_1|u_logic|Bfgwx4~16_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Itgwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~12_combout  & ( (!\soc_inst|m0_1|u_logic|Kugwx4~0_combout  & (\soc_inst|m0_1|u_logic|Bfgwx4~16_combout  & !\soc_inst|m0_1|u_logic|Ptgwx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Llnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vaw2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q )))) # (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jcw2z4~q ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vaw2z4~q  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q 
+// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Vaw2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Jcw2z4~q )))) # (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jcw2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Vaw2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout )) # (\soc_inst|m0_1|u_logic|Jcw2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kugwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bfgwx4~16_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~12_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jcw2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Llnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .lut_mask = 64'h0000000020202222;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .lut_mask = 64'h51F351F3510051F3;
+defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4 (
+// Location: MLABCELL_X25_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Llnvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bfgwx4~combout  = ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~17_combout  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|I0hwx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~17_combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Bfgwx4~17_combout  ) ) # ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~17_combout  ) )
+// \soc_inst|m0_1|u_logic|Llnvx4~combout  = ( \soc_inst|m0_1|u_logic|Llnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|T1y2z4~q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|I0hwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T1y2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Llnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bfgwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bfgwx4 .lut_mask = 64'hFFFFFFFFFF00FFC0;
-defparam \soc_inst|m0_1|u_logic|Bfgwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Llnvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Llnvx4 .lut_mask = 64'h00000000F0FFF0FF;
+defparam \soc_inst|m0_1|u_logic|Llnvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y19_N8
-dffeas \soc_inst|m0_1|u_logic|Sgj2z4 (
+// Location: FF_X25_Y15_N22
+dffeas \soc_inst|m0_1|u_logic|Qdj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Qdj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sgj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sgj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qdj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qdj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~0 (
+// Location: LABCELL_X36_Y14_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Fkkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G27wx4~0_combout  & (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .lut_mask = 64'h0400040000000000;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .lut_mask = 64'hFFF0FFF022202220;
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~1 (
+// Location: LABCELL_X36_Y14_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkkwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Fkkwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Gokwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Fkkwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & !\soc_inst|m0_1|u_logic|A4t2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Gokwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fkkwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Gokwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fkkwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|A4t2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .lut_mask = 64'h0000000000000002;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .lut_mask = 64'hF0F0F0F000001010;
+defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~2 (
+// Location: MLABCELL_X25_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pikwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (((\soc_inst|m0_1|u_logic|Xx2wx4~combout 
-//  & \soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Pikwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O76wx4~combout  & ( (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|M66wx4~combout )) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q 
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|O76wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dcrwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pikwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .lut_mask = 64'h10F010F0F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y18_N43
-dffeas \soc_inst|m0_1|u_logic|S4w2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S4w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S4w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .lut_mask = 64'h0005000500370037;
+defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zdc2z4~0 (
+// Location: LABCELL_X33_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Askwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zdc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & ( \soc_inst|m0_1|u_logic|S4w2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Wpsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout  & (\soc_inst|m0_1|u_logic|S4w2z4~q  
-// & (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|X77wx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|Askwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ((\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Xhxvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wpsvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zdc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Askwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .lut_mask = 64'h0002000233333333;
-defparam \soc_inst|m0_1|u_logic|Zdc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Askwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Askwx4~0 .lut_mask = 64'h000C000C040C040C;
+defparam \soc_inst|m0_1|u_logic|Askwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~2 (
+// Location: LABCELL_X35_Y14_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ugewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhc2z4~2_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
-// ((\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ugewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Viy2z4~q  & (!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Viy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .lut_mask = 64'h4C004C00CCC04C00;
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .lut_mask = 64'h8080808000000000;
+defparam \soc_inst|m0_1|u_logic|Ugewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~3 (
+// Location: MLABCELL_X34_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Askwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhc2z4~3_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Askwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (((!\soc_inst|m0_1|u_logic|Nqy2z4~q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q ))) # (\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Pty2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & (((\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~q )))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Askwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .lut_mask = 64'h0011001100F000F0;
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Askwx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Askwx4~1 .lut_mask = 64'hFE7604CCFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Askwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wmc2z4~0 (
+// Location: LABCELL_X31_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wmc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Mkkwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jp3wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qp3wx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wmc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .lut_mask = 64'h0500050000000000;
-defparam \soc_inst|m0_1|u_logic|Wmc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~4 (
+// Location: LABCELL_X31_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhc2z4~4_combout  = ( !\soc_inst|m0_1|u_logic|Wmc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mhc2z4~2_combout  & (!\soc_inst|m0_1|u_logic|Mhc2z4~3_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Kzxvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Mkkwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mhc2z4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mhc2z4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wmc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .lut_mask = 64'hA080A08000000000;
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .lut_mask = 64'h00A000A000000000;
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Skc2z4~0 (
+// Location: LABCELL_X29_Y10_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lgkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Skc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Lgkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Skc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Skc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .lut_mask = 64'h00000F0F00000F0F;
+defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~0 (
+// Location: LABCELL_X33_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Unewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & !\soc_inst|m0_1|u_logic|M4fwx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Hyy2z4~q ) ) 
+// )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Unewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .lut_mask = 64'h0001000100000000;
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Unewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Unewx4~0 .lut_mask = 64'h0000000057555755;
+defparam \soc_inst|m0_1|u_logic|Unewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekc2z4~0 (
+// Location: LABCELL_X29_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ekc2z4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q 
-// ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Unewx4~combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Unewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Unewx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Unewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ekc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Unewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .lut_mask = 64'h0044004C0088004C;
-defparam \soc_inst|m0_1|u_logic|Ekc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Unewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Unewx4 .lut_mask = 64'hC0F0C0F0F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Unewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhc2z4~1 (
+// Location: LABCELL_X31_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mhc2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Mhc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ekc2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|W7hwx4~0_combout  & \soc_inst|m0_1|u_logic|Skc2z4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~7_combout  = ( \soc_inst|m0_1|u_logic|Unewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mkkwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Skc2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mhc2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ekc2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mkkwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Unewx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mhc2z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .lut_mask = 64'h0020333322223333;
-defparam \soc_inst|m0_1|u_logic|Mhc2z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .lut_mask = 64'h00000000C8CCC8CC;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~4 (
+// Location: LABCELL_X33_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~8_combout  = ( \soc_inst|m0_1|u_logic|Askwx4~1_combout  & ( \soc_inst|m0_1|u_logic|T6kwx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Pikwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Askwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Askwx4~1_combout  & ( \soc_inst|m0_1|u_logic|T6kwx4~7_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & (!\soc_inst|m0_1|u_logic|Pikwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Askwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pikwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Askwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Askwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~7_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~8_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .lut_mask = 64'h000000004040C8C8;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|T6kwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Keiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Uv6wx4~combout  & ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Keiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Keiwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Keiwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .lut_mask = 64'h0D0C000000000000;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .lut_mask = 64'h5555555555555055;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kgc2z4~0 (
+// Location: LABCELL_X33_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|My6wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kgc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((\soc_inst|m0_1|u_logic|Sgj2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((\soc_inst|m0_1|u_logic|Sgj2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|My6wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bsy2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .lut_mask = 64'hA0F5000020310000;
-defparam \soc_inst|m0_1|u_logic|Kgc2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|My6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|My6wx4~1 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|My6wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~3 (
+// Location: MLABCELL_X34_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hekwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Hekwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|My6wx4~1_combout  & !\soc_inst|m0_1|u_logic|Qem2z4~q )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hekwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .lut_mask = 64'h05000500FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mac2z4~0 (
+// Location: LABCELL_X29_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mac2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hekwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T6kwx4~2_combout  & (((\soc_inst|m0_1|u_logic|U2x2z4~q ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|A4t2z4~q 
+// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Hekwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T6kwx4~2_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|T6kwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hekwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mac2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .lut_mask = 64'h0000000000000800;
-defparam \soc_inst|m0_1|u_logic|Mac2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .lut_mask = 64'h5555555515551555;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~5 (
+// Location: LABCELL_X29_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Mac2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Mac2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Kgc2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kgc2z4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mkkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O76wx4~combout  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|G97wx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O76wx4~combout  & (\soc_inst|m0_1|u_logic|G97wx4~0_combout  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dcrwx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Kgc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dcrwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mac2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .lut_mask = 64'hEE0EAA0A00000000;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .lut_mask = 64'h0300030023222322;
+defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dcrwx4~6 (
+// Location: LABCELL_X30_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bbkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Mhc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Dcrwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Zdc2z4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Mhc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Dcrwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Dcrwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Zdc2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Mhc2z4~4_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Bbkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & !\soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & !\soc_inst|m0_1|u_logic|H9i2z4~q )) # (\soc_inst|m0_1|u_logic|My6wx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dcrwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zdc2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Mhc2z4~4_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mhc2z4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dcrwx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bbkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .lut_mask = 64'h0000000080C08080;
-defparam \soc_inst|m0_1|u_logic|Dcrwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .lut_mask = 64'hCE0ACE0ACC00CC00;
+defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y25_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yghvx4~0 (
+// Location: LABCELL_X30_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yghvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( \soc_inst|m0_1|u_logic|Tyx2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( \soc_inst|m0_1|u_logic|Hxx2z4~q  & ( 
-// ((!\soc_inst|m0_1|u_logic|S5pvx4~combout  & \soc_inst|interconnect_1|HREADY~0_combout )) # (\soc_inst|m0_1|u_logic|Tyx2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( 
-// (!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|Tyx2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dcrwx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Hxx2z4~q  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & ((\soc_inst|m0_1|u_logic|Tyx2z4~q 
-// ))) # (\soc_inst|interconnect_1|HREADY~0_combout  & (!\soc_inst|m0_1|u_logic|S5pvx4~combout )) ) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~1_combout  = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Iikwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Bbkwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Iikwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Bbkwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|C2yvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Iikwx4~0_combout  & \soc_inst|m0_1|u_logic|C2yvx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Dcrwx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bbkwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .lut_mask = 64'h2E2E0C0C2F2F0F0F;
-defparam \soc_inst|m0_1|u_logic|Yghvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X40_Y21_N40
-dffeas \soc_inst|m0_1|u_logic|Tyx2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Yghvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tyx2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tyx2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .lut_mask = 64'h111111111F111F11;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~1 (
+// Location: LABCELL_X35_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8kwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Scpvx4~1_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tyx2z4~q  & (\soc_inst|m0_1|u_logic|Bpsvx4~0_combout  & !\soc_inst|m0_1|u_logic|Hxx2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Q8kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nqy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Scpvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8kwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .lut_mask = 64'h0000000003000300;
-defparam \soc_inst|m0_1|u_logic|Scpvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .lut_mask = 64'h0003000303030303;
+defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Scpvx4~2 (
+// Location: LABCELL_X35_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bhewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Scpvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Ipsvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Scpvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// \soc_inst|interconnect_1|HREADY~0_combout )) # (\soc_inst|m0_1|u_logic|Scpvx4~1_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Bhewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Hyewx4~combout  & \soc_inst|m0_1|u_logic|Blwvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ipsvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .lut_mask = 64'h0507000000000000;
-defparam \soc_inst|m0_1|u_logic|Scpvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|Bhewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vapvx4 (
+// Location: LABCELL_X29_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vapvx4~combout  = ( \soc_inst|m0_1|u_logic|Fcj2z4~q  & ( (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (\soc_inst|m0_1|u_logic|Vaw2z4~q  & \soc_inst|m0_1|u_logic|Ueovx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Fcj2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Vaw2z4~q  & \soc_inst|m0_1|u_logic|Ueovx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8kwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Egkwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout  & !\soc_inst|m0_1|u_logic|Egkwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q8kwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fcj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vapvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vapvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vapvx4 .lut_mask = 64'h0001000100050005;
-defparam \soc_inst|m0_1|u_logic|Vapvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .lut_mask = 64'hEEAAEEAAE0A0E0A0;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~0 (
+// Location: LABCELL_X29_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hjnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (\soc_inst|m0_1|u_logic|Vapvx4~combout  & \soc_inst|interconnect_1|HRDATA[15]~4_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ) # ((\soc_inst|m0_1|u_logic|Vapvx4~combout  & \soc_inst|interconnect_1|HRDATA[15]~4_combout )) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~5_combout  = ( \soc_inst|m0_1|u_logic|T6kwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|T6kwx4~3_combout  & (!\soc_inst|m0_1|u_logic|T6kwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|T6kwx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T6kwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .lut_mask = 64'hCDCDCDCD05050505;
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .lut_mask = 64'h0000000031003100;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G8nvx4~0 (
+// Location: LABCELL_X29_Y10_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & ((!\soc_inst|interconnect_1|HRDATA[15]~4_combout ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|X8kwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Lgkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X8kwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lgkwx4~0_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[15]~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G8nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .lut_mask = 64'h00000000CCC0CCC0;
-defparam \soc_inst|m0_1|u_logic|G8nvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y16_N43
-dffeas \soc_inst|m0_1|u_logic|Ufy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|G8nvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ufy2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ufy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ufy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .lut_mask = 64'hFFFF0000FAFA0000;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pmhvx4~0 (
+// Location: MLABCELL_X25_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aekwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pmhvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[31]~2_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[31]~2_combout  )
+// \soc_inst|m0_1|u_logic|Aekwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Y6t2z4~q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pmhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .lut_mask = 64'hFFFFFFFFF0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Pmhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y20_N44
-dffeas \soc_inst|m0_1|u_logic|F1x2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pmhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|F1x2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F1x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|F1x2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .lut_mask = 64'h00000000F000F000;
+defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~1 (
+// Location: LABCELL_X30_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hjnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F1x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ufy2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|F1x2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Ufy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Wfovx4~combout )) # (\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|T6kwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Aekwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout  & (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & (\soc_inst|m0_1|u_logic|T6kwx4~5_combout  & 
+// \soc_inst|m0_1|u_logic|T6kwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Aekwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout  & (\soc_inst|m0_1|u_logic|T6kwx4~5_combout  & \soc_inst|m0_1|u_logic|T6kwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ufy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|T6kwx4~5_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T6kwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F1x2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T6kwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .lut_mask = 64'h55F555F500F000F0;
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .lut_mask = 64'h0005000500040004;
+defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hjnvx4~2 (
+// Location: MLABCELL_X25_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ruhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hjnvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hjnvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Hjnvx4~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[31]~2_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ruhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|T6kwx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fkkwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|T6kwx4~8_combout )) # (\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|T6kwx4~6_combout  & ( 
+// (\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hjnvx4~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[31]~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hjnvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .lut_mask = 64'hCCC0CCC000000000;
-defparam \soc_inst|m0_1|u_logic|Hjnvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .lut_mask = 64'h5F5F5F5F5F135F13;
+defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X46_Y20_N25
-dffeas \soc_inst|m0_1|u_logic|U2x2z4 (
+// Location: FF_X25_Y15_N37
+dffeas \soc_inst|m0_1|u_logic|Nsk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Hjnvx4~2_combout ),
+	.d(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -101213,3298 +101621,3197 @@ dffeas \soc_inst|m0_1|u_logic|U2x2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U2x2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U2x2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Nsk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Nsk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpkwx4~0 (
+// Location: LABCELL_X27_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G1mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Ukpvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|G1mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|A4t2z4~q 
+// ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G1mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .lut_mask = 64'h0000000000F000F0;
-defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .lut_mask = 64'h0000A0A00000E0E0;
+defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Akewx4~1 (
+// Location: LABCELL_X29_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P2mwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Akewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout )) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) 
-// # (\soc_inst|m0_1|u_logic|Fij2z4~q )) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # ((\soc_inst|m0_1|u_logic|Emewx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q ))))) ) )
+// \soc_inst|m0_1|u_logic|P2mwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & 
+// \soc_inst|m0_1|u_logic|G97wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Akewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P2mwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Akewx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Akewx4~1 .lut_mask = 64'hFFFFFFFFFFBF00BF;
-defparam \soc_inst|m0_1|u_logic|Akewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .lut_mask = 64'h3333000002020000;
+defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yiewx4~0 (
+// Location: LABCELL_X29_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwrite_o~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yiewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Akewx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O76wx4~combout ) # 
-// (\soc_inst|m0_1|u_logic|B1vvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Npk2z4~q  & (((!\soc_inst|m0_1|u_logic|O76wx4~combout )) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|hwrite_o~0_combout  = ( \soc_inst|m0_1|u_logic|I2mwx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|I2mwx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|G1mwx4~0_combout  & \soc_inst|m0_1|u_logic|Pa7wx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Z0mwx4~0_combout )) # (\soc_inst|m0_1|u_logic|P2mwx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|G1mwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P2mwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Akewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yiewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .lut_mask = 64'h00000000F351F351;
-defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .lut_mask = 64'h1FFF1FFFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y22_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lgkwx4~0 (
+// Location: LABCELL_X29_Y17_N42
+cyclonev_lcell_comb \soc_inst|ram_1|write_cycle~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lgkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  ) )
+// \soc_inst|ram_1|write_cycle~0_combout  = ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout  & ( \soc_inst|ram_1|always1~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.dataf(!\soc_inst|ram_1|always1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.combout(\soc_inst|ram_1|write_cycle~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .lut_mask = 64'h0000000033333333;
-defparam \soc_inst|m0_1|u_logic|Lgkwx4~0 .shared_arith = "off";
+defparam \soc_inst|ram_1|write_cycle~0 .extended_lut = "off";
+defparam \soc_inst|ram_1|write_cycle~0 .lut_mask = 64'h000000000000FFFF;
+defparam \soc_inst|ram_1|write_cycle~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unewx4~0 (
+// Location: FF_X29_Y17_N44
+dffeas \soc_inst|ram_1|write_cycle~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|ram_1|write_cycle~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|ram_1|write_cycle~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|ram_1|write_cycle~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y15_N18
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[25]~18 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Unewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & \soc_inst|m0_1|u_logic|Bsy2z4~q ))) # (\soc_inst|m0_1|u_logic|Hyy2z4~q ) ) 
-// )
+// \soc_inst|interconnect_1|HRDATA[25]~18_combout  = ( \soc_inst|interconnect_1|HRDATA[24]~17_combout  & ( (!\soc_inst|interconnect_1|Equal1~0_combout  & ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ))) # 
+// (\soc_inst|interconnect_1|Equal1~0_combout  & (\soc_inst|switches_1|switch_store[1][9]~q )) ) ) # ( !\soc_inst|interconnect_1|HRDATA[24]~17_combout  & ( !\soc_inst|interconnect_1|HRDATA[25]~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datab(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datac(!\soc_inst|switches_1|switch_store[1][9]~q ),
+	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a25 ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[24]~17_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Unewx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Unewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Unewx4~0 .lut_mask = 64'h0000000055755575;
-defparam \soc_inst|m0_1|u_logic|Unewx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[25]~18 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[25]~18 .lut_mask = 64'hAAAAAAAA03CF03CF;
+defparam \soc_inst|interconnect_1|HRDATA[25]~18 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Unewx4 (
+// Location: LABCELL_X33_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fohvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Unewx4~combout  = ( !\soc_inst|m0_1|u_logic|Unewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Fohvx4~0_combout  = ( \soc_inst|interconnect_1|HRDATA[25]~18_combout  & ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  ) ) # ( !\soc_inst|interconnect_1|HRDATA[25]~18_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Unewx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Unewx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fohvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Unewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Unewx4 .lut_mask = 64'hAFFFAFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Unewx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .lut_mask = 64'hFFFFFFFFAAAAAAAA;
+defparam \soc_inst|m0_1|u_logic|Fohvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sfewx4~0 (
+// Location: FF_X33_Y14_N28
+dffeas \soc_inst|m0_1|u_logic|Urw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Fohvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Urw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Urw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Urw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X33_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sfewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & 
-// \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|O5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Urw2z4~q  & ( (!\soc_inst|m0_1|u_logic|Y7y2z4~q  & \soc_inst|m0_1|u_logic|Wfovx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Urw2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Y7y2z4~q  & 
+// \soc_inst|m0_1|u_logic|Wfovx4~combout )) # (\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Y7y2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Urw2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sfewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O5nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .lut_mask = 64'h00F000F000FF00FF;
-defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .lut_mask = 64'h33F333F300F000F0;
+defparam \soc_inst|m0_1|u_logic|O5nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sfewx4~1 (
+// Location: LABCELL_X33_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sfewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Px5wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Sfewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|O5nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|interconnect_1|HRDATA[9]~16_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pty2z4~q ) # ((\soc_inst|interconnect_1|HRDATA[9]~16_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sfewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[9]~16_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sfewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O5nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .lut_mask = 64'h2FEF2FEF00000000;
-defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .lut_mask = 64'hF0F5F0F500550055;
+defparam \soc_inst|m0_1|u_logic|O5nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fcewx4~0 (
+// Location: LABCELL_X33_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O5nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fcewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q )) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  
-// & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
-// ((\soc_inst|m0_1|u_logic|Npk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|O5nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|O5nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5nvx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~18_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[25]~18_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O5nvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|O5nvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fcewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .lut_mask = 64'hA0A0A0E4ECECECEC;
-defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .lut_mask = 64'hF0C0F0C000000000;
+defparam \soc_inst|m0_1|u_logic|O5nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fcewx4~1 (
+// Location: FF_X33_Y14_N8
+dffeas \soc_inst|m0_1|u_logic|Pty2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|O5nvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Pty2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Pty2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G27wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fcewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fcewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Jeewx4~combout ) # ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|G27wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jeewx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fcewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|G27wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G27wx4~1 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|G27wx4~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X36_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ubjwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ubjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Hyy2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fcewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .lut_mask = 64'hEFFFEFFF00000000;
-defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .lut_mask = 64'h000044000000F400;
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ws3wx4~0 (
+// Location: LABCELL_X36_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ubjwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ws3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Jppvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Jppvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ubjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ubjwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|H9i2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Ubjwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|G27wx4~1_combout  & 
+// (\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & !\soc_inst|m0_1|u_logic|H9i2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ubjwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .lut_mask = 64'h08080808FF08FF08;
-defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .lut_mask = 64'h03000300FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~0 (
+// Location: LABCELL_X33_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3jwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (\soc_inst|m0_1|u_logic|Q77wx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|S3jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H3ivx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|S3jwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .lut_mask = 64'h0000000005000500;
-defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .lut_mask = 64'h0000000C00000C0C;
+defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~2 (
+// Location: LABCELL_X33_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2jwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3ivx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ucqvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|X2jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( \soc_inst|m0_1|u_logic|S3jwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( \soc_inst|m0_1|u_logic|S3jwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|S3jwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|S3jwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H3ivx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|X2jwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .lut_mask = 64'hFFFAFFFA00000000;
-defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .lut_mask = 64'h0303000007070505;
+defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~3 (
+// Location: LABCELL_X36_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3ivx4~3_combout  = ( \soc_inst|m0_1|u_logic|H3ivx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Ps3wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ehjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & (\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (\soc_inst|m0_1|u_logic|Nqy2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3ivx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H3ivx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ehjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .lut_mask = 64'h00000000FCFFFCFF;
-defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .lut_mask = 64'h5F005F000A500A50;
+defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Si4wx4~0 (
+// Location: LABCELL_X30_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ofjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Si4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Ofjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Dvy2z4~q  & \soc_inst|m0_1|u_logic|Qem2z4~q )) # (\soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Si4wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .lut_mask = 64'h0000000003000300;
-defparam \soc_inst|m0_1|u_logic|Si4wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .lut_mask = 64'h000000000C0C2F2F;
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~0 (
+// Location: LABCELL_X31_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pd4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Si4wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y9t2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Si4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Y9t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Lhjwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Si4wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .lut_mask = 64'h000A000A333B333B;
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .lut_mask = 64'h0050005000000000;
+defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~1 (
+// Location: LABCELL_X30_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ofjwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pd4wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pd4wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q ) # ((!\soc_inst|m0_1|u_logic|Bk4wx4~combout ) # (!\soc_inst|m0_1|u_logic|X77wx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Ofjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhjwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Lhjwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (((\soc_inst|m0_1|u_logic|Nkpvx4~0_combout 
+//  & !\soc_inst|m0_1|u_logic|Ehjwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bk4wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ehjwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pd4wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .lut_mask = 64'hFFFCFFFC00000000;
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .lut_mask = 64'h1055105555555555;
+defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pd4wx4~2 (
+// Location: LABCELL_X33_Y13_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hvhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pd4wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pd4wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ) # ((\soc_inst|m0_1|u_logic|Kofwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|C34wx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Pd4wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ik4wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Kofwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pd4wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pd4wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .lut_mask = 64'hF0F0F0F0B0A0B0A0;
-defparam \soc_inst|m0_1|u_logic|Pd4wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .lut_mask = 64'hF0F0F0F000000000;
+defparam \soc_inst|m0_1|u_logic|Hvhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5vvx4~1 (
+// Location: LABCELL_X31_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q5vvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pd4wx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ) # (\soc_inst|m0_1|u_logic|C34wx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Q5vvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pd4wx4~2_combout  & (!\soc_inst|m0_1|u_logic|F5mvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ) # (\soc_inst|m0_1|u_logic|C34wx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout  & (!\soc_inst|m0_1|u_logic|X2jwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout  & (!\soc_inst|m0_1|u_logic|X2jwx4~0_combout  & !\soc_inst|m0_1|u_logic|Ofjwx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cr0xx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pd4wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F5mvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X2jwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q5vvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .lut_mask = 64'h80C080C088CC88CC;
-defparam \soc_inst|m0_1|u_logic|Q5vvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .lut_mask = 64'hC000C00080008000;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~2 (
+// Location: LABCELL_X35_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pyiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Gzhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Hzj2z4~q  & \soc_inst|m0_1|u_logic|Ynvvx4~combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Gzhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & \soc_inst|m0_1|u_logic|Ynvvx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Pyiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X46_Y18_N25
-dffeas \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .lut_mask = 64'h00000000C080C080;
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~3 (
+// Location: MLABCELL_X34_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pyiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|B0ivx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uzhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~2_combout  & (\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Ble3z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|B0ivx4~0_combout  & ( \soc_inst|m0_1|u_logic|Uzhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~2_combout  & \soc_inst|m0_1|u_logic|Ble3z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|B0ivx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Uzhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~2_combout  & \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|B0ivx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Uzhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Av3wx4~2_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Pyiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Av3wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ble3z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .lut_mask = 64'hCCCC0C0C00CC000C;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .lut_mask = 64'h000000005555FF55;
+defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~4 (
+// Location: MLABCELL_X28_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7jwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Y9l2z4~q  & (!\soc_inst|m0_1|u_logic|I0ivx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|T8f3z4~q 
-// )))) # (\soc_inst|m0_1|u_logic|Y9l2z4~q  & (((!\soc_inst|m0_1|u_logic|P0ivx4~0_combout )) # (\soc_inst|m0_1|u_logic|T8f3z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|T7jwx4~combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|T7jwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .lut_mask = 64'h00000000F351F351;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|T7jwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|T7jwx4 .lut_mask = 64'h0000000000310031;
+defparam \soc_inst|m0_1|u_logic|T7jwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~1 (
+// Location: MLABCELL_X28_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6jwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|R1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|X0c3z4~q  & \soc_inst|m0_1|u_logic|W0ivx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|R1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X0c3z4~q  & \soc_inst|m0_1|u_logic|W0ivx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|R6jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~q ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q 
+//  & (((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R6jwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .lut_mask = 64'h00CC00CCF0FCF0FC;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y20_N8
-dffeas \soc_inst|m0_1|u_logic|Gxk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gxk2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gxk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gxk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .lut_mask = 64'h0000000075207520;
+defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~5 (
+// Location: LABCELL_X27_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|F2ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pxb3z4~q ) # ((!\soc_inst|m0_1|u_logic|Gxk2z4~q  & \soc_inst|m0_1|u_logic|T2ivx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|F2ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gxk2z4~q  & \soc_inst|m0_1|u_logic|T2ivx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Q6fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|A4t2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  
+// & ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .lut_mask = 64'hFF00FF00F300F300;
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~7 (
+// Location: MLABCELL_X28_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6fwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~7_combout  = ( \soc_inst|m0_1|u_logic|D1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|F4c3z4~q ) # ((!\soc_inst|m0_1|u_logic|N7c3z4~q  & \soc_inst|m0_1|u_logic|K1ivx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|D1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N7c3z4~q  & \soc_inst|m0_1|u_logic|K1ivx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & (\soc_inst|m0_1|u_logic|Q6fwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|A4t2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & 
+// \soc_inst|m0_1|u_logic|Q6fwx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|F4c3z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Q6fwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .lut_mask = 64'h000000000A0A0A08;
+defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~6 (
+// Location: LABCELL_X29_Y13_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eajwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Vac3z4~q  & ( (!\soc_inst|m0_1|u_logic|Hub3z4~q  & \soc_inst|m0_1|u_logic|Y1ivx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Vac3z4~q  & ( ((!\soc_inst|m0_1|u_logic|Hub3z4~q  & 
-// \soc_inst|m0_1|u_logic|Y1ivx4~0_combout )) # (\soc_inst|m0_1|u_logic|M2ivx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Eajwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|O9qvx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Eajwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .lut_mask = 64'h0FAF0FAF00AA00AA;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .lut_mask = 64'h0003000300F300F3;
+defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~8 (
+// Location: LABCELL_X30_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9jwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Av3wx4~6_combout  & ( \soc_inst|m0_1|u_logic|Syhvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Lul2z4~q  & !\soc_inst|m0_1|u_logic|Av3wx4~7_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Av3wx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Syhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Av3wx4~7_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Q9jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Eajwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Eajwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & \soc_inst|m0_1|u_logic|Pcyvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Av3wx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Av3wx4~6_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Eajwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q9jwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .lut_mask = 64'hFF00000055000000;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .lut_mask = 64'h000A000A00FF00FF;
+defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~9 (
+// Location: LABCELL_X29_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q2jwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~5_combout  & ((!\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Q2jwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( ((((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( ((((\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Av3wx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~8_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q2jwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .lut_mask = 64'h00000000F030F030;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .lut_mask = 64'hFF5F7F7FFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~2 (
+// Location: LABCELL_X27_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  & (\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  & 
-// \soc_inst|m0_1|u_logic|O24wx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zzfwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|L8t2z4~q ))))) ) ) # ( !\soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .lut_mask = 64'h0000000000000101;
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .lut_mask = 64'h0022002200720072;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~3 (
+// Location: LABCELL_X31_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o~18_combout  & (!\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & (!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((\soc_inst|m0_1|u_logic|A0zvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & 
+// (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .lut_mask = 64'h0000000080008000;
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .lut_mask = 64'h00050A0A33053B3B;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~4 (
+// Location: LABCELL_X31_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o~2_combout  & ( (!\soc_inst|m0_1|u_logic|V4ovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & (\soc_inst|m0_1|u_logic|Ny3wx4~2_combout  & 
-// \soc_inst|m0_1|u_logic|Ny3wx4~3_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  & (((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|V1yvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  & (((!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ny3wx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ny3wx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .lut_mask = 64'h0008000800000000;
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .lut_mask = 64'hF700F700B300B300;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~5 (
+// Location: LABCELL_X33_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iyiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ny3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ny3wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Ny3wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Iyiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y9t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iyiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .lut_mask = 64'h00000000F800F800;
-defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .lut_mask = 64'h5000500055055505;
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~10 (
+// Location: LABCELL_X33_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iyiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~10_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Ny3wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rym2z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Av3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Ny3wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rym2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Iyiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & !\soc_inst|m0_1|u_logic|Iyiwx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & ((!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ) # ((\soc_inst|m0_1|u_logic|H9i2z4~q  & !\soc_inst|m0_1|u_logic|Iyiwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Av3wx4~9_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~5_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Iyiwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~10_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .lut_mask = 64'h00008C8C0000AFAF;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .lut_mask = 64'hA2A0A2A022002200;
+defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~11 (
+// Location: MLABCELL_X34_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~11_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~10_combout  & ( (\soc_inst|m0_1|u_logic|Av3wx4~4_combout  & (!\soc_inst|m0_1|u_logic|Av3wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Uyv2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Iyiwx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Emewx4~0_combout  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Iyiwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Emewx4~0_combout  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Uyv2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Av3wx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Av3wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~10_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~11_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .lut_mask = 64'h000000000D000D00;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .lut_mask = 64'h001100110F1F0F1F;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~0 (
+// Location: LABCELL_X30_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Av3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ywi2z4~q  & \soc_inst|m0_1|u_logic|Owgvx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q  & \soc_inst|m0_1|u_logic|Owgvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Lwiwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Lwiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q9jwx4~0_combout  & (\soc_inst|m0_1|u_logic|Q2jwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Lwiwx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q9jwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Q2jwx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lwiwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lwiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Av3wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .lut_mask = 64'h00F000F0AAFAAAFA;
-defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .lut_mask = 64'h0000220000000000;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~1 (
+// Location: MLABCELL_X28_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3ivx4~1_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( \soc_inst|m0_1|u_logic|Av3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( 
-// \soc_inst|m0_1|u_logic|Av3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( !\soc_inst|m0_1|u_logic|Av3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout  & 
-// (!\soc_inst|m0_1|u_logic|U7w2z4~q  & \soc_inst|m0_1|u_logic|Adt2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( !\soc_inst|m0_1|u_logic|Av3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Lwiwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Lwiwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|T7jwx4~combout  & ((!\soc_inst|m0_1|u_logic|R6jwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Tki2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Adt2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Av3wx4~11_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|T7jwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R6jwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lwiwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H3ivx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .lut_mask = 64'h0F0F08080F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .lut_mask = 64'h000000000000C0CC;
+defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~4 (
+// Location: LABCELL_X27_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fvhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|H3ivx4~4_combout  = ( \soc_inst|m0_1|u_logic|H3ivx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|H3ivx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gji2z4~q )) # (\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H3ivx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Gji2z4~q  & (((!\soc_inst|m0_1|u_logic|H3ivx4~3_combout )))) # (\soc_inst|m0_1|u_logic|Gji2z4~q  & (((!\soc_inst|m0_1|u_logic|H3ivx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Fvhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lwiwx4~5_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ) # 
+// (\soc_inst|m0_1|u_logic|Pyiwx4~1_combout )))) # (\soc_inst|interconnect_1|HREADY~0_combout  & (((!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ) # (\soc_inst|m0_1|u_logic|Pyiwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Lwiwx4~5_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # (\soc_inst|interconnect_1|HREADY~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H3ivx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H3ivx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Gji2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H3ivx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|H3ivx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .lut_mask = 64'hF0DDF0DDFFDDFFDD;
-defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .lut_mask = 64'h7777777770777077;
+defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y17_N13
-dffeas \soc_inst|m0_1|u_logic|Gji2z4 (
+// Location: FF_X24_Y15_N23
+dffeas \soc_inst|m0_1|u_logic|Npk2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|H3ivx4~4_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Gji2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Npk2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Gji2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Gji2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Npk2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Npk2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~0 (
+// Location: LABCELL_X24_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xx2wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rngwx4~combout  & ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & 
-// ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Tki2z4~q  & (((\soc_inst|m0_1|u_logic|H9i2z4~q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( !\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Xx2wx4~combout  = ( !\soc_inst|m0_1|u_logic|Emi2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .lut_mask = 64'h0022000005270505;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xx2wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xx2wx4 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Xx2wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~1 (
+// Location: LABCELL_X30_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejhwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pw6wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|A76wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5t2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ejhwx4~combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|A4t2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ejhwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .lut_mask = 64'hCF4FCF4F00000000;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ejhwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ejhwx4 .lut_mask = 64'h0000000000F00000;
+defparam \soc_inst|m0_1|u_logic|Ejhwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|My6wx4~1 (
+// Location: LABCELL_X30_Y11_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0hwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|My6wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|W28wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|I0hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|My6wx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|My6wx4~1 .lut_mask = 64'h0F0F0F0F00000000;
-defparam \soc_inst|m0_1|u_logic|My6wx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|I0hwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lfewx4 (
+// Location: LABCELL_X29_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lfewx4~combout  = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lfewx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lfewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lfewx4 .lut_mask = 64'h00000000FFDDFFDD;
-defparam \soc_inst|m0_1|u_logic|Lfewx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .lut_mask = 64'h2223222300000000;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~2 (
+// Location: LABCELL_X30_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lfewx4~combout  & ( (!\soc_inst|m0_1|u_logic|My6wx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Lfewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|My6wx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|My6wx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~1_combout  = ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( 
+// \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) # 
+// ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lfewx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .lut_mask = 64'hFFE0FFF000000000;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .lut_mask = 64'hB0F03030F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~3 (
+// Location: LABCELL_X33_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Pw6wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Pw6wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gji2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~2_combout  = ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ndhwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ejhwx4~combout  & ((!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ndhwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ejhwx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gji2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ejhwx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pw6wx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .lut_mask = 64'h000000000000EFEF;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .lut_mask = 64'h00000000CCCCC8C8;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~4 (
+// Location: LABCELL_X27_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tghwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Pw6wx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Unewx4~combout  & (!\soc_inst|m0_1|u_logic|Sfewx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fcewx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Tghwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ju5wx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( 
+// (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & (((\soc_inst|m0_1|u_logic|Y6t2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Unewx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sfewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fcewx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tghwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .lut_mask = 64'h0000000020302030;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .lut_mask = 64'h070F070F03030303;
+defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~5 (
+// Location: LABCELL_X30_Y10_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ahhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Itgwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pw6wx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # (\soc_inst|m0_1|u_logic|Yiewx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Itgwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pw6wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # (\soc_inst|m0_1|u_logic|Yiewx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ahhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Yiewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~4_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .lut_mask = 64'h000000000CCC0FFF;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|Ahhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vz6wx4 (
+// Location: MLABCELL_X34_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fghwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vz6wx4~combout  = ( \soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  $ (((\soc_inst|m0_1|u_logic|Ad7wx4~0_combout  & \soc_inst|m0_1|u_logic|P28wx4~combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Xt6wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Fghwx4~combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Emewx4~0_combout  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P28wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vz6wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fghwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vz6wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vz6wx4 .lut_mask = 64'h33333333CCC3CCC3;
-defparam \soc_inst|m0_1|u_logic|Vz6wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fghwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fghwx4 .lut_mask = 64'h0000000004040404;
+defparam \soc_inst|m0_1|u_logic|Fghwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4 (
+// Location: LABCELL_X33_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pw6wx4~combout  = ( \soc_inst|m0_1|u_logic|Vz6wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & (!\soc_inst|m0_1|u_logic|A4t2z4~q  & !\soc_inst|m0_1|u_logic|Blwvx4~0_combout 
-// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Vz6wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pw6wx4~5_combout  ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fghwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xx2wx4~combout  & (\soc_inst|m0_1|u_logic|Ndhwx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|Tghwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Fghwx4~combout  & ( (\soc_inst|m0_1|u_logic|Ndhwx4~2_combout  & !\soc_inst|m0_1|u_logic|Tghwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vz6wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ndhwx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tghwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fghwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pw6wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pw6wx4 .lut_mask = 64'hFF00FF00FF40FF40;
-defparam \soc_inst|m0_1|u_logic|Pw6wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .lut_mask = 64'h0F000A0000000000;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y21_N20
-dffeas \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sjhwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Sjhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|A4t2z4~q )))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # ((((!\soc_inst|m0_1|u_logic|L8t2z4~q ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .lut_mask = 64'hFFFFFFFF3030FFBF;
+defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xnrvx4~0 (
+// Location: MLABCELL_X28_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xnrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|B8c2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Bpsvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tyx2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Sjhwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ndhwx4~3_combout  & (((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sjhwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & \soc_inst|m0_1|u_logic|Ndhwx4~3_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tyx2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ndhwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .lut_mask = 64'h000000000000A0A0;
-defparam \soc_inst|m0_1|u_logic|Xnrvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .lut_mask = 64'h030303030F070F07;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jvqvx4~0 (
+// Location: LABCELL_X36_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0iwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jvqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|B8c2z4~0_combout  & (!\soc_inst|m0_1|u_logic|Nbm2z4~q  & !\soc_inst|m0_1|u_logic|Hxx2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|K0iwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B8c2z4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hxx2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jvqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K0iwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .lut_mask = 64'h0000000050005000;
-defparam \soc_inst|m0_1|u_logic|Jvqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .lut_mask = 64'h3333FAF033330000;
+defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jnrvx4~0 (
+// Location: LABCELL_X36_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0iwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Jnrvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvqvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Wfovx4~combout  & \soc_inst|m0_1|u_logic|Jhy2z4~q )) # (\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|K0iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|K0iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|G27wx4~1_combout  & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|K0iwx4~0_combout  
+// & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xnrvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K0iwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Jnrvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K0iwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .lut_mask = 64'h000000000FCF0FCF;
-defparam \soc_inst|m0_1|u_logic|Jnrvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .lut_mask = 64'h0F0F0F0F02020202;
+defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y16_N31
-dffeas \soc_inst|m0_1|u_logic|Jhy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Jnrvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jhy2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X36_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Fuhwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Nqy2z4~q )) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nqy2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jhy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jhy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .lut_mask = 64'hCCCC0000400C0000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfovx4 (
+// Location: LABCELL_X36_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wfovx4~combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( \soc_inst|m0_1|u_logic|Jhy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Fuhwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & ((!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Nqy2z4~q  & !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|H9i2z4~q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Jhy2z4~q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wfovx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wfovx4 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Wfovx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .lut_mask = 64'hEAC00505AAAA0505;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Oesvx4~0 (
+// Location: LABCELL_X35_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Oesvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & ((!\soc_inst|interconnect_1|HRDATA[25]~1_combout ))) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout  & 
-// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 )) ) )
+// \soc_inst|m0_1|u_logic|Fuhwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fuhwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K0iwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Fuhwx4~1_combout  & 
+// \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K0iwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuhwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Oesvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .lut_mask = 64'h00000000CC55CC55;
-defparam \soc_inst|m0_1|u_logic|Oesvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .lut_mask = 64'h0000000008080000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5nvx4~0 (
+// Location: LABCELL_X31_Y11_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A5nvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Oesvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # 
-// (!\soc_inst|interconnect_1|HRDATA[11]~24_combout )))) # (\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Vapvx4~combout ) # ((!\soc_inst|interconnect_1|HRDATA[11]~24_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Fuhwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[11]~24_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oesvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A5nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .lut_mask = 64'h54FC54FC00000000;
-defparam \soc_inst|m0_1|u_logic|A5nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .lut_mask = 64'h0500050000000000;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rnhvx4~0 (
+// Location: LABCELL_X33_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rnhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[26]~0_combout  & (\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[26]~0_combout  & 
-// ((!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  )
+// \soc_inst|m0_1|u_logic|Fuhwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout  & (((\soc_inst|m0_1|u_logic|Xx2wx4~combout ) # (\soc_inst|m0_1|u_logic|Fuhwx4~4_combout )) # 
+// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[26]~0_combout ),
-	.datad(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a27 ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rnhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .lut_mask = 64'hFFFFFFFF3F303F30;
-defparam \soc_inst|m0_1|u_logic|Rnhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y15_N16
-dffeas \soc_inst|m0_1|u_logic|Xuw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rnhvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Xuw2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xuw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Xuw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .lut_mask = 64'h2A2A2A2A2AAA2AAA;
+defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y15_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|A5nvx4~1 (
+// Location: LABCELL_X33_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hohwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|A5nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Xuw2z4~q  & ( (\soc_inst|m0_1|u_logic|A5nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Bby2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Xuw2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & (\soc_inst|m0_1|u_logic|A5nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wfovx4~combout ) # (\soc_inst|m0_1|u_logic|Bby2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Hohwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bby2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|A5nvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xuw2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .lut_mask = 64'h008C008C00AF00AF;
-defparam \soc_inst|m0_1|u_logic|A5nvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X45_Y15_N1
-dffeas \soc_inst|m0_1|u_logic|Swy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|A5nvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Swy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Swy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .lut_mask = 64'h000000000C0C0C0C;
+defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nkpvx4~0 (
+// Location: MLABCELL_X28_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xphwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Xphwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & \soc_inst|m0_1|u_logic|O9qvx4~0_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xphwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Nkpvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .lut_mask = 64'h00000000000A000A;
+defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pyiwx4~0 (
+// Location: MLABCELL_X28_Y13_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pyiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # 
-// (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & \soc_inst|m0_1|u_logic|Z7fwx4~0_combout )))) # 
+// (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pcyvx4~combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Z7fwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .lut_mask = 64'h0000000088808880;
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .lut_mask = 64'h00C000C011D111D1;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pyiwx4~1 (
+// Location: LABCELL_X33_Y12_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pyiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & !\soc_inst|m0_1|u_logic|Pyiwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mk6wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q ) # ((\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & !\soc_inst|m0_1|u_logic|Bsy2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mk6wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & !\soc_inst|m0_1|u_logic|Bsy2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Pyiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .lut_mask = 64'h000000003F333F33;
-defparam \soc_inst|m0_1|u_logic|Pyiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .lut_mask = 64'h03000300ABAAABAA;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|S3jwx4~0 (
+// Location: LABCELL_X33_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|S3jwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout 
-// )))) ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|U2x2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Icyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|U2x2z4~q 
+//  & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ))))) # (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|S3jwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .lut_mask = 64'h0111011100000000;
-defparam \soc_inst|m0_1|u_logic|S3jwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .lut_mask = 64'hF2D0F2D0F200F200;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|X2jwx4~0 (
+// Location: LABCELL_X33_Y13_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|X2jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|S3jwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|S3jwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|S3jwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & \soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Rmhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rmhwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Rmhwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|S3jwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Rmhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|X2jwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .lut_mask = 64'h0303131300001111;
-defparam \soc_inst|m0_1|u_logic|X2jwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .lut_mask = 64'h00000000E0E00000;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ofjwx4~0 (
+// Location: LABCELL_X33_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ofjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q )) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & ((\soc_inst|m0_1|u_logic|Swy2z4~q ))))) ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Rmhwx4~3_combout  & ( ((!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|G27wx4~2_combout )) # (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .lut_mask = 64'h1105110511011101;
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .lut_mask = 64'h00000000FFF5FFF5;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ehjwx4~0 (
+// Location: MLABCELL_X28_Y13_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ehjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Rmhwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Xphwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Xphwx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Xphwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ehjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .lut_mask = 64'h0F000F00CC30CC30;
-defparam \soc_inst|m0_1|u_logic|Ehjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .lut_mask = 64'h00000000AAAA8A8A;
+defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lhjwx4~0 (
+// Location: LABCELL_X24_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lhjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ndhwx4~combout  = ( \soc_inst|m0_1|u_logic|Rmhwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ) # ((!\soc_inst|m0_1|u_logic|L8t2z4~q  & ((\soc_inst|m0_1|u_logic|Hohwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Fuhwx4~5_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Rmhwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ) # (!\soc_inst|m0_1|u_logic|L8t2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .lut_mask = 64'h0000000050005000;
-defparam \soc_inst|m0_1|u_logic|Lhjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ndhwx4 .lut_mask = 64'hFAFAFAFABAFABAFA;
+defparam \soc_inst|m0_1|u_logic|Ndhwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ofjwx4~1 (
+// Location: FF_X24_Y15_N52
+dffeas \soc_inst|m0_1|u_logic|Fij2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fij2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fij2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y11_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ivewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ofjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Lhjwx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Lhjwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U2x2z4~q  & (((\soc_inst|m0_1|u_logic|Nkpvx4~0_combout 
-//  & !\soc_inst|m0_1|u_logic|Ehjwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ivewx4~combout  = ( \soc_inst|m0_1|u_logic|G9w2z4~q  & ( (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) ) 
+// # ( !\soc_inst|m0_1|u_logic|G9w2z4~q  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & !\soc_inst|m0_1|u_logic|Fij2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ofjwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ehjwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lhjwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ivewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .lut_mask = 64'h0075007500FF00FF;
-defparam \soc_inst|m0_1|u_logic|Ofjwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ivewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ivewx4 .lut_mask = 64'h0300030001000100;
+defparam \soc_inst|m0_1|u_logic|Ivewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ubjwx4~0 (
+// Location: LABCELL_X27_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ubjwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Hyy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Hyy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .lut_mask = 64'h0300000023220000;
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~3 .lut_mask = 64'h88881000FF001000;
+defparam \soc_inst|m0_1|u_logic|Woewx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ubjwx4~1 (
+// Location: LABCELL_X27_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ubjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & ((\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Ubjwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ubjwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ubjwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .lut_mask = 64'h0C0C0C0C0CCC0CCC;
-defparam \soc_inst|m0_1|u_logic|Ubjwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~5 .lut_mask = 64'hF000CB00F0000800;
+defparam \soc_inst|m0_1|u_logic|Woewx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y22_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~6 (
+// Location: MLABCELL_X34_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Ubjwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|X2jwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ofjwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X2jwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ofjwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ubjwx4~1_combout ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .lut_mask = 64'hA0800000A0800000;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~1 .lut_mask = 64'h0000000050555055;
+defparam \soc_inst|m0_1|u_logic|Woewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Eajwx4~0 (
+// Location: LABCELL_X27_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Eajwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|O9qvx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & 
-// ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  $ (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Eajwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .lut_mask = 64'h000300030F030F03;
-defparam \soc_inst|m0_1|u_logic|Eajwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~4 .lut_mask = 64'h2A003A00CECCDECC;
+defparam \soc_inst|m0_1|u_logic|Woewx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q9jwx4~0 (
+// Location: LABCELL_X27_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q9jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & \soc_inst|m0_1|u_logic|Bxcwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Eajwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~2_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Eajwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q9jwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .lut_mask = 64'h000000000FCF0FCF;
-defparam \soc_inst|m0_1|u_logic|Q9jwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~2 .lut_mask = 64'h0300030013001300;
+defparam \soc_inst|m0_1|u_logic|Woewx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iyiwx4~0 (
+// Location: LABCELL_X27_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iyiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ))) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Swy2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Woewx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Woewx4~3_combout  & (!\soc_inst|m0_1|u_logic|Woewx4~5_combout  & (!\soc_inst|m0_1|u_logic|Woewx4~1_combout  & 
+// !\soc_inst|m0_1|u_logic|Woewx4~4_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Woewx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Woewx4~5_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Woewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Woewx4~4_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iyiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .lut_mask = 64'h00000000F055F055;
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~6 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|Woewx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Iyiwx4~1 (
+// Location: LABCELL_X31_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Iyiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Iyiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~q  & (!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & !\soc_inst|m0_1|u_logic|Hyy2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Iyiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (((!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout )) # (\soc_inst|m0_1|u_logic|H9i2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~7_combout  = ( \soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Woewx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ))) 
+// ) ) ) # ( !\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Woewx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) ) )
 
 	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iyiwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .lut_mask = 64'hB300B300A000A000;
-defparam \soc_inst|m0_1|u_logic|Iyiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~7 .lut_mask = 64'h00000000DDDD0D0D;
+defparam \soc_inst|m0_1|u_logic|Woewx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~0 (
+// Location: LABCELL_X33_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Iyiwx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Emewx4~0_combout  & (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Iyiwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Emewx4~0_combout  & (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~8_combout  = ( \soc_inst|m0_1|u_logic|Woewx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Msyvx4~combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Iyiwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .lut_mask = 64'h0003000355575557;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~8 .lut_mask = 64'h000000000B0F0B0F;
+defparam \soc_inst|m0_1|u_logic|Woewx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q2jwx4~0 (
+// Location: LABCELL_X35_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dwewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q2jwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # ((((\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ))) ) ) 
-// # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( ((((\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout )) # (\soc_inst|m0_1|u_logic|Ffj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Dwewx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Hyewx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q2jwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dwewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .lut_mask = 64'hAFFF3FFFFFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Q2jwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .lut_mask = 64'hFFFAFFFA00000000;
+defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~1 (
+// Location: LABCELL_X35_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dwewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((\soc_inst|m0_1|u_logic|Ju5wx4~combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|L8t2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Dwewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & !\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Dwewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .lut_mask = 64'h0100010051505150;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .lut_mask = 64'h0200020000000000;
+defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~2 (
+// Location: LABCELL_X35_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bvewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|A0zvx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q  & (((!\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout )) # (\soc_inst|m0_1|u_logic|O5t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( 
-// ((!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & \soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Aok2z4~q  $ (!\soc_inst|m0_1|u_logic|Npk2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & 
-// (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & \soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Bvewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dwewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (((\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bsy2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Dwewx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Dwewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dwewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Dwewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bvewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .lut_mask = 64'h002211220F2F112F;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .lut_mask = 64'h3333333301330133;
+defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~3 (
+// Location: LABCELL_X33_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  & \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  & ((\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lwiwx4~2_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Bvewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bvewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout 
+// ) # ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Y6t2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Lwiwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Bvewx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .lut_mask = 64'hCCCC0CCCC0CC00CC;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~0 .lut_mask = 64'hFE00FE00FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Woewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~4 (
+// Location: LABCELL_X36_Y12_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Lwiwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Q9jwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Lwiwx4~0_combout  & (\soc_inst|m0_1|u_logic|Q2jwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|E0fwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Pty2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Q9jwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lwiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q2jwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lwiwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lwiwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E0fwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .lut_mask = 64'h0000000008000800;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .lut_mask = 64'h04040E0504040E04;
+defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R6jwx4~0 (
+// Location: MLABCELL_X34_Y11_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R6jwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Emi2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Emi2z4~q  & \soc_inst|m0_1|u_logic|Aok2z4~q 
-// )) ) )
+// \soc_inst|m0_1|u_logic|R3fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (((!\soc_inst|m0_1|u_logic|Dvy2z4~q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R6jwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .lut_mask = 64'h040404040E040E04;
-defparam \soc_inst|m0_1|u_logic|R6jwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .lut_mask = 64'hE4A0E4A0F4F0F4F0;
+defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T7jwx4 (
+// Location: LABCELL_X36_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T7jwx4~combout  = ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|L8t2z4~q )))) ) 
-// )
+// \soc_inst|m0_1|u_logic|E0fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  $ (\soc_inst|m0_1|u_logic|Nqy2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T7jwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|E0fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T7jwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T7jwx4 .lut_mask = 64'h0000000000230023;
-defparam \soc_inst|m0_1|u_logic|T7jwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .lut_mask = 64'h0820082008210821;
+defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6fwx4~0 (
+// Location: LABCELL_X36_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|E0fwx4~2_combout  = ( \soc_inst|m0_1|u_logic|E0fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E0fwx4~1_combout  & !\soc_inst|m0_1|u_logic|Csewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|E0fwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|E0fwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|R3fwx4~0_combout  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|E0fwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E0fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E0fwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .lut_mask = 64'hFFCFFFCF00000000;
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .lut_mask = 64'h88A888A888888888;
+defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q6fwx4~1 (
+// Location: LABCELL_X33_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7fwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( \soc_inst|m0_1|u_logic|Q6fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # 
-// ((!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|E7fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Q6fwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E7fwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .lut_mask = 64'h000000000000AAA8;
-defparam \soc_inst|m0_1|u_logic|Q6fwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .lut_mask = 64'h0003000300000000;
+defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lwiwx4~5 (
+// Location: LABCELL_X33_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lwiwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Lwiwx4~4_combout  & (!\soc_inst|m0_1|u_logic|T7jwx4~combout  & ((!\soc_inst|m0_1|u_logic|R6jwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Woewx4~9_combout  = ( \soc_inst|m0_1|u_logic|E0fwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|E7fwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Woewx4~8_combout  & \soc_inst|m0_1|u_logic|Woewx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|E0fwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|E7fwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Woewx4~8_combout  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Woewx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Lwiwx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R6jwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|T7jwx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Woewx4~8_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Woewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|E0fwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E7fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Woewx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .lut_mask = 64'h0000000031003100;
-defparam \soc_inst|m0_1|u_logic|Lwiwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Woewx4~9 .lut_mask = 64'h0005005500000000;
+defparam \soc_inst|m0_1|u_logic|Woewx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fvhvx4~0 (
+// Location: LABCELL_X24_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fvhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Lwiwx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ) # (\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|Lwiwx4~5_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ) # (\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Lwiwx4~5_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Lwiwx4~5_combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Qxhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Woewx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Ivewx4~combout  & ((\soc_inst|m0_1|u_logic|Emi2z4~q ) # (\soc_inst|interconnect_1|HREADY~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Woewx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~q ) # (\soc_inst|interconnect_1|HREADY~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pyiwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lwiwx4~6_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Lwiwx4~5_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ivewx4~combout ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .lut_mask = 64'h3333FFFF3303FF0F;
-defparam \soc_inst|m0_1|u_logic|Fvhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .lut_mask = 64'h0FFF0FFF03330333;
+defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y19_N23
-dffeas \soc_inst|m0_1|u_logic|Npk2z4 (
+// Location: FF_X24_Y15_N7
+dffeas \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Fvhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Npk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Npk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y8pvx4~0 (
+// Location: LABCELL_X27_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vqfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y8pvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Vqfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vqfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .lut_mask = 64'hFFF5FFF500000000;
-defparam \soc_inst|m0_1|u_logic|Y8pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .lut_mask = 64'h000F000F222F222F;
+defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~0 (
+// Location: LABCELL_X18_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Infwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Add5~29_sumout  & ( !\soc_inst|m0_1|u_logic|M9pvx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Infwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|M9pvx4~0_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~29_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Infwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Infwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Infwx4~0 .lut_mask = 64'h0A110A0000000000;
+defparam \soc_inst|m0_1|u_logic|Infwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~1 (
+// Location: LABCELL_X31_Y10_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojnvx4~1_combout  = ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|B8nwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|F9pvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Y8pvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Lsfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y8pvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ojnvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .lut_mask = 64'h4444CC444444CC4C;
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .lut_mask = 64'h3311331133233323;
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4pvx4~0 (
+// Location: LABCELL_X31_Y10_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J4pvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ark2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Lsfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jky2z4~q  & ( (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) # ( !\soc_inst|m0_1|u_logic|Jky2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & (((\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J4pvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .lut_mask = 64'hCC00EEEE0C000E0E;
-defparam \soc_inst|m0_1|u_logic|J4pvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .lut_mask = 64'h1115111500050005;
+defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|J4pvx4~1 (
+// Location: LABCELL_X31_Y10_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|J4pvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Z5pvx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|S5pvx4~combout  & (!\soc_inst|m0_1|u_logic|J4pvx4~0_combout  & !\soc_inst|m0_1|u_logic|Qaiwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Lsfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C2yvx4~combout  & ((!\soc_inst|m0_1|u_logic|Infwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|B73wx4~combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Lsfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Infwx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|C2yvx4~combout )))) # (\soc_inst|m0_1|u_logic|Infwx4~0_combout  & 
+// (!\soc_inst|m0_1|u_logic|B73wx4~combout  & ((!\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ) # (!\soc_inst|m0_1|u_logic|C2yvx4~combout )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J4pvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Infwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|J4pvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .lut_mask = 64'hC000C00000000000;
-defparam \soc_inst|m0_1|u_logic|J4pvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .lut_mask = 64'hEEE0EEE0EE00EE00;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y15_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ojnvx4~2 (
+// Location: LABCELL_X30_Y10_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ojnvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|O3pvx4~combout  & ( ((!\soc_inst|m0_1|u_logic|J4pvx4~1_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|X4pvx4~combout )))) # (\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|O3pvx4~combout  & ( (\soc_inst|m0_1|u_logic|Ojnvx4~1_combout  & 
-// (((\soc_inst|interconnect_1|HREADY~0_combout  & !\soc_inst|m0_1|u_logic|X4pvx4~combout )) # (\soc_inst|m0_1|u_logic|J4pvx4~1_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Z7i2z4~q  & ( !\soc_inst|m0_1|u_logic|O3pvx4~combout  & ( 
-// (!\soc_inst|interconnect_1|HREADY~0_combout  & (((!\soc_inst|m0_1|u_logic|J4pvx4~1_combout )) # (\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ))) # (\soc_inst|interconnect_1|HREADY~0_combout  & (\soc_inst|m0_1|u_logic|X4pvx4~combout  & 
-// ((!\soc_inst|m0_1|u_logic|J4pvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ojnvx4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( !\soc_inst|m0_1|u_logic|O3pvx4~combout  & ( (\soc_inst|m0_1|u_logic|Ojnvx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|J4pvx4~1_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|X4pvx4~combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ojnvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|J4pvx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|X4pvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O3pvx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .lut_mask = 64'h0203A2F31303B3F3;
-defparam \soc_inst|m0_1|u_logic|Ojnvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y15_N55
-dffeas \soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ojnvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .lut_mask = 64'h00000202AAAA0A0A;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbi3z4~0 (
+// Location: LABCELL_X31_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zlfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rbi3z4~0_combout  = ( \soc_inst|m0_1|u_logic|E7mwx4~combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Zlfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Howvx4~0_combout  & \soc_inst|m0_1|u_logic|Ukpvx4~combout )))) # (\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Howvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ukpvx4~combout )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rbi3z4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .lut_mask = 64'h000000000F0F0F0F;
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y14_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbi3z4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Rbi3z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Va62z4~combout  & ( (!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & (\soc_inst|m0_1|u_logic|Rbi3z4~q )) # (\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & ((\soc_inst|m0_1|u_logic|H362z4~0_combout ))) # (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & (!\soc_inst|m0_1|u_logic|haddr_o~1_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|Va62z4~combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & (\soc_inst|m0_1|u_logic|Rbi3z4~q )) # (\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & (((\soc_inst|m0_1|u_logic|H362z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Add3~1_sumout ) # 
-// (!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout )))))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rbi3z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|H362z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Va62z4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rbi3z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zlfwx4~0_combout ),
 	.sumout(),
 	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .lut_mask = 64'h2277227772722272;
-defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X37_Y14_N49
-dffeas \soc_inst|m0_1|u_logic|Rbi3z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Rbi3z4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Rbi3z4~q ),
-	.prn(vcc));
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rbi3z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Rbi3z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .lut_mask = 64'h111F111F11111111;
+defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y14_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ueovx4~0 (
+// Location: LABCELL_X31_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ueovx4~0_combout  = ( \soc_inst|m0_1|u_logic|Rbi3z4~q  & ( !\soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Zlfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Howvx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zlfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout  & 
+// (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Howvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Zlfwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Howvx4~0_combout )))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rbi3z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zlfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .lut_mask = 64'h00000000F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .lut_mask = 64'hA800A800A8000000;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y16_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Slnvx4~0 (
+// Location: LABCELL_X31_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Slnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & !\soc_inst|m0_1|u_logic|Nbm2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ajfwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ajfwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ucqvx4~combout ))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nbm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ajfwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ajfwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Slnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .lut_mask = 64'h000000000F000F00;
-defparam \soc_inst|m0_1|u_logic|Slnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .lut_mask = 64'h000000000F0A0F0A;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X51_Y16_N19
-dffeas \soc_inst|m0_1|u_logic|T1y2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Slnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Edovx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|T1y2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T1y2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|T1y2z4 .power_up = "low";
-// synopsys translate_on
+// Location: MLABCELL_X28_Y12_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Ajfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) )
 
-// Location: FF_X52_Y19_N23
-dffeas \soc_inst|m0_1|u_logic|Jcw2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Jcw2z4~q ),
-	.prn(vcc));
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Jcw2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Jcw2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .lut_mask = 64'hF3F3E2E200000000;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Llnvx4~0 (
+// Location: LABCELL_X27_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Llnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Vaw2z4~q  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & ((!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ) # (\soc_inst|m0_1|u_logic|Jcw2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ajfwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ajfwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ajfwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ajfwx4~4_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Jcw2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vaw2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ajfwx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ajfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Llnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .lut_mask = 64'h00DD00DDD0D0DDDD;
-defparam \soc_inst|m0_1|u_logic|Llnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .lut_mask = 64'h000000000F0F0F0A;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Llnvx4 (
+// Location: MLABCELL_X28_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Llnvx4~combout  = ( \soc_inst|m0_1|u_logic|Llnvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|T1y2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Llnvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Wfovx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Rvfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) # ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|A4t2z4~q  & ((!\soc_inst|m0_1|u_logic|G9w2z4~q ) # (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|A4t2z4~q ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|T1y2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Llnvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Llnvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Llnvx4 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \soc_inst|m0_1|u_logic|Llnvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .lut_mask = 64'hFFAAFFAAFCA8FCA8;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X47_Y19_N4
-dffeas \soc_inst|m0_1|u_logic|Qdj2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Llnvx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.prn(vcc));
+// Location: MLABCELL_X28_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L6gwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L6gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( \soc_inst|m0_1|u_logic|Akewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Akewx4~0_combout ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|L6gwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qdj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Qdj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .lut_mask = 64'h3F0F3F0F0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~0 (
+// Location: MLABCELL_X28_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Na6wx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Na6wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Rvfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q ) # 
+// ((!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Na6wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .lut_mask = 64'h00AA00AA00FF00FF;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .lut_mask = 64'hFFAFFFAF0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~2 (
+// Location: MLABCELL_X28_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Rvfwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Rvfwx4~0_combout  & (\soc_inst|m0_1|u_logic|Rvfwx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )))) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Rvfwx4~0_combout  & (((\soc_inst|m0_1|u_logic|Rvfwx4~1_combout  & 
+// ((!\soc_inst|m0_1|u_logic|L6gwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Rvfwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L6gwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~1_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .lut_mask = 64'h7333733340004000;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .lut_mask = 64'h0000000055515151;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~1 (
+// Location: MLABCELL_X28_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Rvfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rvfwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rvfwx4~4_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rvfwx4~4_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .lut_mask = 64'h0300030000000000;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .lut_mask = 64'h00FF00FF00FE00FE;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~4 (
+// Location: LABCELL_X31_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~4_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & (!\soc_inst|m0_1|u_logic|Ark2z4~q  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (((\soc_inst|m0_1|u_logic|L8t2z4~q  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|B1gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|W28wx4~0_combout  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|G27wx4~1_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|X5gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|W28wx4~0_combout  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B1gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .lut_mask = 64'h40CC40CC40404040;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .lut_mask = 64'h00CC00CC0FCF0FCF;
+defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~3 (
+// Location: MLABCELL_X34_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K2gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & (!\soc_inst|m0_1|u_logic|H9i2z4~q  $ (((\soc_inst|m0_1|u_logic|Qem2z4~q  & 
-// \soc_inst|m0_1|u_logic|Qdj2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) # ((\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Qdj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Qdj2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q ))) # (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|K2gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( \soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (((\soc_inst|m0_1|u_logic|Bsy2z4~q )))) # (\soc_inst|m0_1|u_logic|Dvy2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (\soc_inst|m0_1|u_logic|Bsy2z4~q )) # (\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( !\soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( !\soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K2gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .lut_mask = 64'h00C100F100C100E1;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .lut_mask = 64'h4000014148080B4B;
+defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~5 (
+// Location: MLABCELL_X34_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~5_combout  = ( !\soc_inst|m0_1|u_logic|U6wvx4~3_combout  & ( \soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~2_combout  & (!\soc_inst|m0_1|u_logic|U6wvx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|U6wvx4~4_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|U6wvx4~3_combout  & ( !\soc_inst|m0_1|u_logic|J7swx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~1_combout  & !\soc_inst|m0_1|u_logic|U6wvx4~4_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|B1gwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Hyy2z4~q )) # (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & \soc_inst|m0_1|u_logic|Hyy2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~2_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U6wvx4~4_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|U6wvx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|J7swx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B1gwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .lut_mask = 64'hC0C0000080800000;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .lut_mask = 64'h0004000411151115;
+defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~6 (
+// Location: LABCELL_X33_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~6_combout  = ( \soc_inst|m0_1|u_logic|J3xvx4~combout  & ( (!\soc_inst|m0_1|u_logic|U6wvx4~0_combout  & (\soc_inst|m0_1|u_logic|U6wvx4~5_combout  & (!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Q3xvx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|B1gwx4~2_combout  = ( \soc_inst|m0_1|u_logic|B1gwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|B1gwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & 
+// (((\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & !\soc_inst|m0_1|u_logic|K2gwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B1gwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|U6wvx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tuwvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B1gwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K2gwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|J3xvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|B1gwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|B1gwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .lut_mask = 64'h0000000000200020;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .lut_mask = 64'h0073007300FF00FF;
+defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U6wvx4~7 (
+// Location: LABCELL_X35_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ccgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|U6wvx4~7_combout  = ( \soc_inst|m0_1|u_logic|Lu6wx4~0_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|Qdj2z4~q ) # ((!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|U6wvx4~6_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Lu6wx4~0_combout  & ( (\soc_inst|interconnect_1|HREADY~0_combout  & ((!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ) # (!\soc_inst|m0_1|u_logic|U6wvx4~6_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ccgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|X3xvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|U6wvx4~6_combout ),
-	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lu6wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ccgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .lut_mask = 64'h00FC00FC00FE00FE;
-defparam \soc_inst|m0_1|u_logic|U6wvx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .lut_mask = 64'h00000000FFEEFFEE;
+defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y21_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|F9wvx4~0 (
+// Location: MLABCELL_X34_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|F9wvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ((\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Rxl2z4~q  & ((\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|K8wvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Rxl2z4~q  & (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ((\soc_inst|m0_1|u_logic|R8wvx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|R8wvx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|K8wvx4~2_combout ),
+// \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  $ (\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  $ ((\soc_inst|m0_1|u_logic|Dvy2z4~q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|F9wvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Y9gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .lut_mask = 64'h044405550CCC0FFF;
-defparam \soc_inst|m0_1|u_logic|F9wvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .lut_mask = 64'h9495949590909090;
+defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P3mvx4~0 (
+// Location: LABCELL_X35_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P3mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|K9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  $ 
+// (\soc_inst|m0_1|u_logic|Nqy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  $ 
+// (\soc_inst|m0_1|u_logic|Nqy2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( !\soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  $ 
+// (\soc_inst|m0_1|u_logic|Nqy2z4~q )))) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y9gwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P3mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K9gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .lut_mask = 64'hCCCCFCFC00000000;
-defparam \soc_inst|m0_1|u_logic|P3mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .lut_mask = 64'h0000AEABAEABAEAB;
+defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X35_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P3mvx4~1 (
+// Location: LABCELL_X35_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P3mvx4~1_combout  = ( \soc_inst|m0_1|u_logic|P3mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & (\soc_inst|m0_1|u_logic|Auk2z4~q  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ) # 
-// (\soc_inst|m0_1|u_logic|F9wvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|P3mvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & ((\soc_inst|m0_1|u_logic|Auk2z4~q ))) # 
-// (\soc_inst|m0_1|u_logic|U6wvx4~7_combout  & (\soc_inst|m0_1|u_logic|F9wvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|D9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|K9gwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ccgwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|K9gwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U6wvx4~7_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Z5wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|F9wvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ccgwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|P3mvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K9gwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D9gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .lut_mask = 64'h048C048C008C008C;
-defparam \soc_inst|m0_1|u_logic|P3mvx4~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X35_Y21_N40
-dffeas \soc_inst|m0_1|u_logic|Auk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|P3mvx4~1_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Auk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Auk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .lut_mask = 64'h3333333320002000;
+defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E4xvx4~0 (
+// Location: MLABCELL_X28_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cyfwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E4xvx4~0_combout  = ( \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Auk2z4~q  & (\soc_inst|m0_1|u_logic|I2t2z4~q  & \soc_inst|m0_1|u_logic|C3z2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Cyfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|Ucqvx4~combout )) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cyfwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .lut_mask = 64'h0000000000030003;
-defparam \soc_inst|m0_1|u_logic|E4xvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .lut_mask = 64'h00000000F0F3F0F3;
+defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V8yvx4~0 (
+// Location: MLABCELL_X25_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6gwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V8yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6z2z4~q  & ( (!\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & (((\soc_inst|m0_1|u_logic|I2t2z4~q  & \soc_inst|m0_1|u_logic|Auk2z4~q )))) # (\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Cyq2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|I6z2z4~q  & ( (!\soc_inst|m0_1|u_logic|E4xvx4~0_combout  & (\soc_inst|m0_1|u_logic|I2t2z4~q  & \soc_inst|m0_1|u_logic|Auk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|E6gwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q ) # ((\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Hyy2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E4xvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V8yvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E6gwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .lut_mask = 64'h000A000A111B111B;
-defparam \soc_inst|m0_1|u_logic|V8yvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .lut_mask = 64'hAFFFAFFF00000000;
+defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y24_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~1 (
+// Location: MLABCELL_X25_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6gwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D6yvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|Auk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Icyvx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|Auk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & 
-// ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|Auk2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|E6gwx4~1_combout  = ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & !\soc_inst|m0_1|u_logic|E6gwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E6gwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|S4w2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|E6gwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D6yvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E6gwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .lut_mask = 64'h30303030FFFF3030;
-defparam \soc_inst|m0_1|u_logic|D6yvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .lut_mask = 64'h4454445444444444;
+defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y24_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~0 (
+// Location: LABCELL_X27_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D6yvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Rxl2z4~q  & (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Rxl2z4~q  & (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Rxl2z4~q ) # (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Rvfwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Cyfwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|E6gwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Rvfwx4~2_combout  & (!\soc_inst|m0_1|u_logic|B1gwx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|D9gwx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rxl2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rvfwx4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|B1gwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|D9gwx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cyfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E6gwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D6yvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .lut_mask = 64'h32320202FFFF0202;
-defparam \soc_inst|m0_1|u_logic|D6yvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .lut_mask = 64'h4040000000000000;
+defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y24_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D6yvx4~2 (
+// Location: MLABCELL_X25_Y16_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D6yvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|D6yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G2lwx4~0_combout  & (!\soc_inst|m0_1|u_logic|D6yvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|V8yvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|C9yvx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|Ajfwx4~combout  = ( \soc_inst|m0_1|u_logic|Rvfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Vqfwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Rvfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Vqfwx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V8yvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|G2lwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D6yvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Vqfwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|D6yvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .lut_mask = 64'hC800C80000000000;
-defparam \soc_inst|m0_1|u_logic|D6yvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ajfwx4 .lut_mask = 64'hFFCDFFCDFF05FF05;
+defparam \soc_inst|m0_1|u_logic|Ajfwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X29_Y22_N38
-dffeas \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE (
+// Location: FF_X23_Y16_N5
+dffeas \soc_inst|m0_1|u_logic|Ffj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|D6yvx4~2_combout ),
+	.asdata(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|K6yvx4~10_combout ),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X43_Y18_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ujqvx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ujqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( \soc_inst|m0_1|u_logic|Aj0xx4~combout  & ( (!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|B73wx4~combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zhyvx4~combout  & ( \soc_inst|m0_1|u_logic|Aj0xx4~combout  & ( ((!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & 
-// \soc_inst|m0_1|u_logic|B73wx4~combout ))) # (\soc_inst|m0_1|u_logic|Kryvx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kryvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Zhyvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Aj0xx4~combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .lut_mask = 64'h0000000002FF0202;
-defparam \soc_inst|m0_1|u_logic|Ujqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ffj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ffj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y18_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vsywx4~7 (
+// Location: LABCELL_X23_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kzxvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vsywx4~7_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~6_combout  & ( !\soc_inst|m0_1|u_logic|Inb2z4~combout  ) )
+// \soc_inst|m0_1|u_logic|Kzxvx4~combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Inb2z4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Vsywx4~6_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Vsywx4~7 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X48_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~1 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|C6mwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & (((\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Vsywx4~7_combout )) # (\soc_inst|m0_1|u_logic|Wwywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & 
-// (((!\soc_inst|m0_1|u_logic|Wwywx4~0_combout  & \soc_inst|m0_1|u_logic|Hzywx4~0_combout )) # (\soc_inst|m0_1|u_logic|Vsywx4~7_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Xtywx4~0_combout  & (((\soc_inst|m0_1|u_logic|Hzywx4~0_combout ) # (\soc_inst|m0_1|u_logic|Vsywx4~7_combout )) # (\soc_inst|m0_1|u_logic|Wwywx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Vsywx4~7_combout  & \soc_inst|m0_1|u_logic|Xtywx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xtywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .lut_mask = 64'h0303070F030B070F;
-defparam \soc_inst|m0_1|u_logic|C6mwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kzxvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kzxvx4 .lut_mask = 64'h00FF00FF00000000;
+defparam \soc_inst|m0_1|u_logic|Kzxvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~2 (
+// Location: LABCELL_X24_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Og4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6mwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ye4wx4~combout  & !\soc_inst|m0_1|u_logic|Wwywx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pwywx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ye4wx4~combout  ) )
+// \soc_inst|m0_1|u_logic|Og4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (\soc_inst|m0_1|u_logic|Huqvx4~0_combout  & \soc_inst|m0_1|u_logic|Kzxvx4~combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wwywx4~0_combout ),
-	.datad(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pwywx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .lut_mask = 64'hCCCCCCCCC0C0C0C0;
-defparam \soc_inst|m0_1|u_logic|C6mwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Og4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~0 (
+// Location: MLABCELL_X25_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ag4wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Vsywx4~7_combout  & ( \soc_inst|m0_1|u_logic|Hzywx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Vsywx4~7_combout  & ( \soc_inst|m0_1|u_logic|Hzywx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Tyywx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Vsywx4~7_combout  & ( !\soc_inst|m0_1|u_logic|Hzywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tyywx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Vsywx4~7_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Hzywx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tyywx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ag4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) 
+// )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tyywx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Hzywx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .lut_mask = 64'h0F0F0F0F0F0FFFFF;
-defparam \soc_inst|m0_1|u_logic|C6mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .lut_mask = 64'h0000000001000100;
+defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6mwx4~3 (
+// Location: LABCELL_X24_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6mwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|N8b2z4~combout  & (((\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & \soc_inst|m0_1|u_logic|Vsywx4~7_combout )))) # 
-// (\soc_inst|m0_1|u_logic|N8b2z4~combout  & (((\soc_inst|m0_1|u_logic|Ozywx4~0_combout  & \soc_inst|m0_1|u_logic|Vsywx4~7_combout )) # (\soc_inst|m0_1|u_logic|Luywx4~6_combout )))) # (\soc_inst|m0_1|u_logic|Gvywx4~0_combout ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|E5owx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|N8b2z4~combout  & (\soc_inst|m0_1|u_logic|Luywx4~6_combout ))) # (\soc_inst|m0_1|u_logic|C6mwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Mtqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( ((\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Wkxvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( (\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|N8b2z4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Luywx4~6_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C6mwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vsywx4~7_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|E5owx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Gvywx4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Ozywx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .lut_mask = 64'h111F1F1FFFFF1F1F;
-defparam \soc_inst|m0_1|u_logic|C6mwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .lut_mask = 64'h003300330F3F0F3F;
+defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Abovx4~0 (
+// Location: MLABCELL_X25_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtqvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Abovx4~0_combout  = ( \soc_inst|m0_1|u_logic|C6mwx4~2_combout  & ( \soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & (((\soc_inst|m0_1|u_logic|C6mwx4~1_combout ) # 
-// (\soc_inst|m0_1|u_logic|Gjqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C6mwx4~2_combout  & ( \soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout  ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|C6mwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & ((\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|C6mwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Rqywx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Mtqvx4~combout  = ( !\soc_inst|m0_1|u_logic|Mtqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ag4wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|P03wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ffj2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ujqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gjqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Abovx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Abovx4~0 .lut_mask = 64'h0F0F07070F0F070F;
-defparam \soc_inst|m0_1|u_logic|Abovx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mtqvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mtqvx4 .lut_mask = 64'h80A080A000000000;
+defparam \soc_inst|m0_1|u_logic|Mtqvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y16_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vcnvx4~0 (
+// Location: MLABCELL_X25_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cdnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vcnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kyi2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|interconnect_1|HRDATA[0]~32_combout  & ((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kyi2z4~q  & ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & (!\soc_inst|interconnect_1|HRDATA[0]~32_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Kyi2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kyi2z4~q  & ( !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ) # 
-// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Cdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Mtqvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & (((\soc_inst|m0_1|u_logic|L8t2z4~q )))) # (\soc_inst|interconnect_1|HREADY~0_combout  & 
+// (((\soc_inst|m0_1|u_logic|Rsqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mtqvx4~combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HRDATA[0]~32_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Kkrvx4~6_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .lut_mask = 64'hCC44FF55C040F050;
-defparam \soc_inst|m0_1|u_logic|Vcnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .lut_mask = 64'h15BF15BF00BF00BF;
+defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X45_Y16_N13
-dffeas \soc_inst|m0_1|u_logic|Kyi2z4 (
+// Location: FF_X25_Y15_N55
+dffeas \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vcnvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -104513,705 +104820,771 @@ dffeas \soc_inst|m0_1|u_logic|Kyi2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Kyi2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kyi2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Kyi2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kkyvx4~1 (
+// Location: LABCELL_X30_Y15_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Jppvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Kkyvx4~1_combout  = (\soc_inst|m0_1|u_logic|Kkyvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|B8nwx4~1_combout )))
+// \soc_inst|m0_1|u_logic|Jppvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Kkyvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .lut_mask = 64'h3330333033303330;
-defparam \soc_inst|m0_1|u_logic|Kkyvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|Jppvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ocnvx4~0 (
+// Location: LABCELL_X30_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ry5wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ocnvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Kkyvx4~1_combout  & (\soc_inst|m0_1|u_logic|F9pvx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Kyi2z4~q ))))) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Kyi2z4~q ))) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|R1w2z4~q  & (((!\soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Kyi2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Ry5wx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Kyi2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Kkyvx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|R1w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|F9pvx4~1_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .lut_mask = 64'h0F050F05CF450F05;
-defparam \soc_inst|m0_1|u_logic|Ocnvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X47_Y21_N37
-dffeas \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ocnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|m0_1|u_logic|Ry5wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q7mvx4~0 (
+// Location: MLABCELL_X25_Y13_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hprot_o~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q7mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Q5vvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|U7w2z4~q  & (((!\soc_inst|m0_1|u_logic|Ye4wx4~combout ) # (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Q5vvx4~1_combout  )
+// \soc_inst|m0_1|u_logic|hprot_o~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|B1vvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ry5wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .lut_mask = 64'hFFFFFFFF00FD00FD;
-defparam \soc_inst|m0_1|u_logic|Q7mvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|hprot_o~0 .lut_mask = 64'hC0F0C0F040504050;
+defparam \soc_inst|m0_1|u_logic|hprot_o~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y20_N19
-dffeas \soc_inst|m0_1|u_logic|U7w2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Q7mvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|U7w2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X24_Y12_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7fwx4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|L7fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  ) ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|L7fwx4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|U7w2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|U7w2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .lut_mask = 64'h00000000F0F00000;
+defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y17_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rqywx4~0 (
+// Location: MLABCELL_X21_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rqywx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ywi2z4~q  & ( (\soc_inst|m0_1|u_logic|Ye4wx4~combout  & \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Ywi2z4~q  & ( (!\soc_inst|m0_1|u_logic|U7w2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Ye4wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Z5d2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fij2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U7w2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .lut_mask = 64'hF5F5F5F500550055;
-defparam \soc_inst|m0_1|u_logic|Rqywx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .lut_mask = 64'h0000000050500000;
+defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V5mwx4~0 (
+// Location: LABCELL_X27_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L5d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|V5mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) # (\soc_inst|m0_1|u_logic|C6mwx4~1_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|C6mwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|Rqywx4~0_combout  & !\soc_inst|m0_1|u_logic|C6mwx4~2_combout ) ) )
+// \soc_inst|m0_1|u_logic|L5d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Rqywx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C6mwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|C6mwx4~2_combout ),
-	.datad(gnd),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C6mwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|L5d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .lut_mask = 64'h5050505051515151;
-defparam \soc_inst|m0_1|u_logic|V5mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .lut_mask = 64'h0000000030003000;
+defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X48_Y20_N7
-dffeas \soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|V5mwx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P7d2z4~0 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|P7d2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|P7d2z4~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .lut_mask = 64'h0F0F0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ivewx4 (
+// Location: MLABCELL_X25_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ivewx4~combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|L8t2z4~q )))) 
-// ) )
+// \soc_inst|m0_1|u_logic|Mrsvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|L5d2z4~0_combout  & ( \soc_inst|m0_1|u_logic|P7d2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ju5wx4~combout  & ((!\soc_inst|m0_1|u_logic|L7fwx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout )))) # (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & (!\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|L7fwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout )))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|L5d2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|P7d2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L7fwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|L7fwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|L5d2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ivewx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ivewx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ivewx4 .lut_mask = 64'h0000000023002300;
-defparam \soc_inst|m0_1|u_logic|Ivewx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .lut_mask = 64'hFCFC0000FCA80000;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E7fwx4~0 (
+// Location: MLABCELL_X25_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E7fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Rexvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|G6d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E7fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|G6d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .lut_mask = 64'h0005000500000000;
-defparam \soc_inst|m0_1|u_logic|E7fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .lut_mask = 64'h000000000F000F00;
+defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R3fwx4~0 (
+// Location: MLABCELL_X25_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R3fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ugewx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) # 
-// ((\soc_inst|m0_1|u_logic|Ugewx4~0_combout  & !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|O3d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|A4t2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|O3d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .lut_mask = 64'hFD30FD30DD00DD00;
-defparam \soc_inst|m0_1|u_logic|R3fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .lut_mask = 64'h00000000C000C000;
+defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~0 (
+// Location: MLABCELL_X25_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E0fwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Mrsvx4~1_combout  = ( \soc_inst|m0_1|u_logic|O76wx4~combout  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O76wx4~combout  & ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|O76wx4~combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & \soc_inst|m0_1|u_logic|Nsk2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|O76wx4~combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O3d2z4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O3d2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E0fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .lut_mask = 64'h0404040480818081;
-defparam \soc_inst|m0_1|u_logic|E0fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .lut_mask = 64'hAAAA00AAA2A2A2A2;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~1 (
+// Location: MLABCELL_X25_Y15_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C4d2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E0fwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & 
-// \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~q  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|C4d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|X77wx4~combout  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E0fwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|C4d2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .lut_mask = 64'h000000000F00AAAE;
-defparam \soc_inst|m0_1|u_logic|E0fwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E0fwx4~2 (
+// Location: MLABCELL_X25_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E0fwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|E0fwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Csewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Swy2z4~q  & (!\soc_inst|m0_1|u_logic|R3fwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|E0fwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Mrsvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Aekwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C4d2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Mrsvx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|G6d2z4~0_combout  & \soc_inst|m0_1|u_logic|Mrsvx4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aekwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|C4d2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|G6d2z4~0_combout  & \soc_inst|m0_1|u_logic|Mrsvx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|E0fwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E0fwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|G6d2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mrsvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C4d2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E0fwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .lut_mask = 64'hFF40FF4000000000;
-defparam \soc_inst|m0_1|u_logic|E0fwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .lut_mask = 64'h0030002000000000;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dwewx4~1 (
+// Location: MLABCELL_X25_Y13_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dwewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q 
-// ))) ) )
+// \soc_inst|m0_1|u_logic|Mrsvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dwewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .lut_mask = 64'h1000100000000000;
-defparam \soc_inst|m0_1|u_logic|Dwewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .lut_mask = 64'hFFAAFFAA00000000;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Dwewx4~0 (
+// Location: MLABCELL_X25_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Dwewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & ((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Hyewx4~combout  & ( !\soc_inst|m0_1|u_logic|Swy2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~0_combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~3_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Mrsvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|hprot_o~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~3_combout  & !\soc_inst|m0_1|u_logic|R8d2z4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Dwewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .lut_mask = 64'hFF00FF00FA00FA00;
-defparam \soc_inst|m0_1|u_logic|Dwewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .lut_mask = 64'h0000000011001110;
+defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bvewx4~0 (
+// Location: MLABCELL_X21_Y17_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|V2qvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bvewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dwewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Dwewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Dwewx4~1_combout ) # ((\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|V2qvx4~combout  = ( \soc_inst|m0_1|u_logic|Add3~13_sumout  & ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~13_sumout  & ( \soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~13_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~13_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~85_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # 
+// (\soc_inst|m0_1|u_logic|Esnvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dwewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Dwewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Esnvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~13_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~85_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bvewx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|V2qvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .lut_mask = 64'h00CD00CD00FF00FF;
-defparam \soc_inst|m0_1|u_logic|Bvewx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|V2qvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|V2qvx4 .lut_mask = 64'hCCFF88AAC0F080A0;
+defparam \soc_inst|m0_1|u_logic|V2qvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~0 (
+// Location: MLABCELL_X21_Y17_N12
+cyclonev_lcell_comb \soc_inst|interconnect_1|LessThan1~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( !\soc_inst|m0_1|u_logic|Bvewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Y6t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( !\soc_inst|m0_1|u_logic|Bvewx4~0_combout  ) )
+// \soc_inst|interconnect_1|LessThan1~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( (\soc_inst|m0_1|u_logic|haddr_o~1_combout  & ((!\soc_inst|m0_1|u_logic|V2qvx4~combout ) # (!\soc_inst|m0_1|u_logic|haddr_o [29]))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|haddr_o~0_combout  )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bvewx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|haddr_o [29]),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~0_combout ),
+	.combout(\soc_inst|interconnect_1|LessThan1~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~0 .lut_mask = 64'hFFFFFBFB00000000;
-defparam \soc_inst|m0_1|u_logic|Woewx4~0 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|LessThan1~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|LessThan1~0 .lut_mask = 64'hFFFFFFFF0F0C0F0C;
+defparam \soc_inst|interconnect_1|LessThan1~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~5 (
+// Location: MLABCELL_X21_Y17_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~5_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  $ 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Ffj2z4~q )) # (\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q ) # (!\soc_inst|m0_1|u_logic|Ffj2z4~q ))))) ) ) ) # ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ) ) ) )
+// \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout  = ( \soc_inst|interconnect_1|LessThan1~0_combout  & ( \soc_inst|interconnect_1|LessThan0~0_combout  ) ) # ( !\soc_inst|interconnect_1|LessThan1~0_combout  & ( 
+// !\soc_inst|interconnect_1|LessThan0~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|LessThan1~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~5_combout ),
+	.combout(\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~5 .lut_mask = 64'hAA00AA00D4008400;
-defparam \soc_inst|m0_1|u_logic|Woewx4~5 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .lut_mask = 64'hF0F0F0F00F0F0F0F;
+defparam \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~4 (
+// Location: FF_X21_Y17_N35
+dffeas \soc_inst|interconnect_1|mux_sel[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|interconnect_1|HSEL_SIGNALS[1]~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|interconnect_1|mux_sel [1]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|mux_sel[1] .is_wysiwyg = "true";
+defparam \soc_inst|interconnect_1|mux_sel[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y17_N48
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[6]~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~4_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) ) ) # 
-// ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q )) # (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  ) ) )
+// \soc_inst|interconnect_1|HRDATA[6]~10_combout  = ( \soc_inst|interconnect_1|HRDATA[6]~9_combout  & ( ((\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q  & (\soc_inst|ram_1|byte_select[0]~DUPLICATE_q  & \soc_inst|ram_1|read_cycle~q ))) # 
+// (\soc_inst|interconnect_1|mux_sel [1]) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ),
+	.datab(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datac(!\soc_inst|ram_1|byte_select[0]~DUPLICATE_q ),
+	.datad(!\soc_inst|ram_1|read_cycle~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HRDATA[6]~9_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~4_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~4 .lut_mask = 64'h0F0FAF0FB100AA00;
-defparam \soc_inst|m0_1|u_logic|Woewx4~4 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[6]~10 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[6]~10 .lut_mask = 64'h0000000033373337;
+defparam \soc_inst|interconnect_1|HRDATA[6]~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~3 (
+// Location: FF_X31_Y22_N32
+dffeas \soc_inst|switches_1|switch_store[0][2] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\SW[2]~input_o ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|switches_1|always0~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|switches_1|switch_store[0][2]~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|switches_1|switch_store[0][2] .is_wysiwyg = "true";
+defparam \soc_inst|switches_1|switch_store[0][2] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X31_Y22_N30
+cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[2]~14 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Tki2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tki2z4~q )) ) ) )
+// \soc_inst|interconnect_1|HRDATA[2]~14_combout  = ( \soc_inst|switches_1|switch_store[0][2]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
+// (\soc_inst|interconnect_1|HRDATA[6]~10_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][2]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
+// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[0][2]~q  & ( 
+// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
+// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[0][2]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( (!\soc_inst|interconnect_1|HRDATA[6]~10_combout  & 
+// !\soc_inst|interconnect_1|HRDATA[25]~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[6]~10_combout ),
+	.datac(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
+	.datae(!\soc_inst|switches_1|switch_store[0][2]~q ),
+	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~3_combout ),
+	.combout(\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~3 .lut_mask = 64'hE4E4000044440C00;
-defparam \soc_inst|m0_1|u_logic|Woewx4~3 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HRDATA[2]~14 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HRDATA[2]~14 .lut_mask = 64'hC0C0C0F3F3C0F3F3;
+defparam \soc_inst|interconnect_1|HRDATA[2]~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~1 (
+// Location: MLABCELL_X34_Y16_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tbnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Tbnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( \soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[2]~14_combout  & (((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) # (\soc_inst|interconnect_1|HRDATA[2]~14_combout  & (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lbn2z4~q  & ( !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[2]~14_combout  & (((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) # 
+// (\soc_inst|interconnect_1|HRDATA[2]~14_combout  & (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lbn2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Lwqvx4~0_combout  & ( (!\soc_inst|interconnect_1|HRDATA[2]~14_combout  & (((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout ))) # (\soc_inst|interconnect_1|HRDATA[2]~14_combout  & 
+// (!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Abovx4~0_combout )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HRDATA[2]~14_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|X2rvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Lbn2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Lwqvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~1 .lut_mask = 64'h000000000F0F0505;
-defparam \soc_inst|m0_1|u_logic|Woewx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .lut_mask = 64'hF3A2F3A20000F3A2;
+defparam \soc_inst|m0_1|u_logic|Tbnvx4~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X34_Y16_N49
+dffeas \soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Tbnvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~2 (
+// Location: LABCELL_X36_Y20_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|U9mvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~2_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wxcwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|U9mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( \soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Uaj2z4~q  & ( !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uaj2z4~q  & ( !\soc_inst|m0_1|u_logic|Zluvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Nxqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Uaj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zluvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~2 .lut_mask = 64'h0022002202220222;
-defparam \soc_inst|m0_1|u_logic|Woewx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .lut_mask = 64'hC0EACFEF00AA0FAF;
+defparam \soc_inst|m0_1|u_logic|U9mvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y17_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~6 (
+// Location: FF_X36_Y20_N13
+dffeas \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|U9mvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y22_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ye4wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~6_combout  = ( !\soc_inst|m0_1|u_logic|Woewx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Woewx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Woewx4~5_combout  & (!\soc_inst|m0_1|u_logic|Woewx4~4_combout  & 
-// !\soc_inst|m0_1|u_logic|Woewx4~3_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Ye4wx4~combout  = ( !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|G0w2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Woewx4~5_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Woewx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Woewx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Woewx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~6 .lut_mask = 64'h8080000000000000;
-defparam \soc_inst|m0_1|u_logic|Woewx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ye4wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ye4wx4 .lut_mask = 64'h8080000000000000;
+defparam \soc_inst|m0_1|u_logic|Ye4wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~7 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~7_combout  = ( \soc_inst|m0_1|u_logic|Woewx4~6_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~6_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~7_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X19_Y18_N25
+dffeas \soc_inst|m0_1|u_logic|S4w2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~7 .lut_mask = 64'h00000000C4F5C4F5;
-defparam \soc_inst|m0_1|u_logic|Woewx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|S4w2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|S4w2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~8 (
+// Location: LABCELL_X19_Y14_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|It52z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~8_combout  = ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Woewx4~7_combout  & ( (\soc_inst|m0_1|u_logic|Q6fwx4~1_combout  & ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Msyvx4~combout 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Woewx4~7_combout  & ( \soc_inst|m0_1|u_logic|Q6fwx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|It52z4~2_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Z5pvx4~3_combout  & ( (\soc_inst|m0_1|u_logic|It52z4~1_combout  & ((!\soc_inst|m0_1|u_logic|S4w2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q6fwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~7_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|It52z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Scpvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|It52z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~8 .lut_mask = 64'h0000000033331313;
-defparam \soc_inst|m0_1|u_logic|Woewx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|It52z4~2 .lut_mask = 64'h00000000000000CF;
+defparam \soc_inst|m0_1|u_logic|It52z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Woewx4~9 (
+// Location: MLABCELL_X21_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6qvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Woewx4~9_combout  = ( \soc_inst|m0_1|u_logic|Woewx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|E7fwx4~0_combout  & (\soc_inst|m0_1|u_logic|Woewx4~0_combout  & ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|E0fwx4~2_combout )))) ) )
+// \soc_inst|m0_1|u_logic|I6qvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T50wx4~0_combout  & (\soc_inst|m0_1|u_logic|U5qvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U5qvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout )) # (\soc_inst|m0_1|u_logic|It52z4~2_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E7fwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|E0fwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Woewx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~8_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U5qvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Woewx4~9_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I6qvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Woewx4~9 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Woewx4~9 .lut_mask = 64'h00000000002A002A;
-defparam \soc_inst|m0_1|u_logic|Woewx4~9 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .lut_mask = 64'h000D00FD00000000;
+defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qxhvx4~0 (
+// Location: LABCELL_X23_Y15_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nfnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qxhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Woewx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Ivewx4~combout  & ((\soc_inst|m0_1|u_logic|Emi2z4~q ) # (\soc_inst|interconnect_1|HREADY~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Woewx4~9_combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~q ) # (\soc_inst|interconnect_1|HREADY~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Nfnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6qvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|I6qvx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|A4t2z4~q ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ivewx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Woewx4~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I6qvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .lut_mask = 64'h55FF55FF050F050F;
-defparam \soc_inst|m0_1|u_logic|Qxhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .lut_mask = 64'h00F000F0FFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y19_N35
-dffeas \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE (
+// Location: FF_X23_Y15_N25
+dffeas \soc_inst|m0_1|u_logic|A4t2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Qxhvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -105220,1277 +105593,1371 @@ dffeas \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X48_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~0 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( \soc_inst|m0_1|u_logic|L8t2z4~q  & ( (!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & !\soc_inst|m0_1|u_logic|Msyvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|L8t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & !\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  ) ) 
-// ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & !\soc_inst|m0_1|u_logic|P7wvx4~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .lut_mask = 64'h8888CCCC8888C0C0;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|A4t2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|A4t2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Infwx4~0 (
+// Location: LABCELL_X27_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Etlwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Infwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # 
-// ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Etlwx4~0_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|A4t2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ))) ) ) # ( !\soc_inst|interconnect_1|HREADY~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Infwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Etlwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Infwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Infwx4~0 .lut_mask = 64'h5500000000000C00;
-defparam \soc_inst|m0_1|u_logic|Infwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .lut_mask = 64'hAAAAAAAA80AA80AA;
+defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsfwx4~1 (
+// Location: LABCELL_X27_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lsfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Hyy2z4~q ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( 
-// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  ) ) )
+// \soc_inst|m0_1|u_logic|Xslwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xslwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .lut_mask = 64'h5555555511114545;
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .lut_mask = 64'h0000000000440044;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lsfwx4~0 (
+// Location: LABCELL_X27_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Lsfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Jky2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q ))) # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q 
-//  & (((!\soc_inst|m0_1|u_logic|Jky2z4~q  & \soc_inst|m0_1|u_logic|Npk2z4~q )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Xslwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Xslwx4~1_combout  & !\soc_inst|m0_1|u_logic|H9i2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Xslwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xslwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .lut_mask = 64'h000000000C5D0C5D;
-defparam \soc_inst|m0_1|u_logic|Lsfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .lut_mask = 64'h0A000A00AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~3 (
+// Location: LABCELL_X27_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Lsfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C2yvx4~combout  & ((!\soc_inst|m0_1|u_logic|B73wx4~combout ) # (!\soc_inst|m0_1|u_logic|Infwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Lsfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|B73wx4~combout  & ((!\soc_inst|m0_1|u_logic|C2yvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Lsfwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|B73wx4~combout  & 
-// (!\soc_inst|m0_1|u_logic|Infwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|C2yvx4~combout ) # (!\soc_inst|m0_1|u_logic|Lsfwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Xslwx4~3_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # ((\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & (((\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Infwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lsfwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lsfwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xslwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .lut_mask = 64'hFAC8FAC8C8C8C8C8;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .lut_mask = 64'h888F888F0F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~1 (
+// Location: LABCELL_X27_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q  & ((\soc_inst|m0_1|u_logic|Aok2z4~q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Xslwx4~4_combout  = ( \soc_inst|m0_1|u_logic|M66wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xslwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Xslwx4~3_combout  & \soc_inst|m0_1|u_logic|B1vvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|M66wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xslwx4~2_combout  & !\soc_inst|m0_1|u_logic|Xslwx4~3_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Xslwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xslwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xslwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .lut_mask = 64'h00B000B010B010B0;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .lut_mask = 64'hC0C0C0C000C000C0;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zlfwx4~0 (
+// Location: LABCELL_X17_Y13_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zlfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|I0hwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Ukpvx4~combout ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|I0hwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|I0hwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Xslwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Z7fwx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Z7fwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zlfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xslwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .lut_mask = 64'h003300330A3B0A3B;
-defparam \soc_inst|m0_1|u_logic|Zlfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .lut_mask = 64'h00F0000000F20022;
+defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~2 (
+// Location: LABCELL_X24_Y15_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ushvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zlfwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & 
-// ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|B73wx4~combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Zlfwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|B73wx4~combout ))) ) ) )
+// \soc_inst|m0_1|u_logic|Ushvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( \soc_inst|m0_1|u_logic|Xslwx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & !\soc_inst|m0_1|u_logic|Etlwx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( \soc_inst|m0_1|u_logic|Xslwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Etlwx4~0_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Xslwx4~4_combout ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Xslwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Etlwx4~0_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Xslwx4~4_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Xslwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Etlwx4~0_combout  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|Xslwx4~4_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ajfwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Zlfwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Etlwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xslwx4~4_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xslwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .lut_mask = 64'hA8A8A80000000000;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .lut_mask = 64'hA0F0A0F0A0F0A0A0;
+defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~4 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ajfwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ajfwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ucqvx4~combout ))) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ajfwx4~3_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ajfwx4~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~4_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X24_Y15_N20
+dffeas \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .lut_mask = 64'h0000000000FC00FC;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4~5 (
+// Location: LABCELL_X35_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ajfwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Ajfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ajfwx4~4_combout  & ( \soc_inst|m0_1|u_logic|Ajfwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( ((\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ((\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & (((\soc_inst|m0_1|u_logic|Bsy2z4~q ) # (\soc_inst|m0_1|u_logic|H9i2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Wvewx4~0_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ajfwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ajfwx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .lut_mask = 64'h0000000000FF00FC;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .lut_mask = 64'h00333333007F337F;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X46_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vqfwx4~0 (
+// Location: LABCELL_X33_Y12_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Vqfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  
-// & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( ((\soc_inst|m0_1|u_logic|M66wx4~combout  & 
-// \soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|Ju5wx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|Dvy2z4~q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q  & ((\soc_inst|m0_1|u_logic|Nqy2z4~q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & 
+// ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # ((\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Vqfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .lut_mask = 64'h0505373705050505;
-defparam \soc_inst|m0_1|u_logic|Vqfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .lut_mask = 64'h65FD65FD22002200;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cyfwx4~0 (
+// Location: LABCELL_X35_Y12_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cyfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ucqvx4~combout  & (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|Z7fwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|U2x2z4~q  & ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))))) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~q 
+//  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datag(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cyfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .lut_mask = 64'h00FF00FF00050005;
-defparam \soc_inst|m0_1|u_logic|Cyfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .lut_mask = 64'h0000000003033233;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~0 (
+// Location: LABCELL_X35_Y12_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B1gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( ((!\soc_inst|m0_1|u_logic|W28wx4~0_combout  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout )) # (\soc_inst|m0_1|u_logic|X5gwx4~0_combout ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|W28wx4~0_combout  & \soc_inst|m0_1|u_logic|Icyvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (((!\soc_inst|m0_1|u_logic|Dvy2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~q )) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & ((\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|H9i2z4~q )))) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Pty2z4~q  & ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~q )) # (\soc_inst|m0_1|u_logic|Dvy2z4~q ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|X5gwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B1gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .lut_mask = 64'h00F000F033F333F3;
-defparam \soc_inst|m0_1|u_logic|B1gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .lut_mask = 64'h3B3B3BBB080808AA;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K2gwx4~0 (
+// Location: LABCELL_X35_Y12_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K2gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Nqy2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
-// (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nqy2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Nqy2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  $ (\soc_inst|m0_1|u_logic|Nqy2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K2gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .lut_mask = 64'h40044004001188BB;
-defparam \soc_inst|m0_1|u_logic|K2gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .lut_mask = 64'h222222222F2F2F2F;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~1 (
+// Location: LABCELL_X35_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B1gwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|Qsewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Wkiwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Wkiwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Wkiwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ) # 
+// (\soc_inst|m0_1|u_logic|H9i2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Wkiwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wkiwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ) # (\soc_inst|m0_1|u_logic|H9i2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wkiwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wkiwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B1gwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .lut_mask = 64'h0005000511111111;
-defparam \soc_inst|m0_1|u_logic|B1gwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .lut_mask = 64'hF050F05030103010;
+defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|B1gwx4~2 (
+// Location: LABCELL_X30_Y15_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ws3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|B1gwx4~2_combout  = ( \soc_inst|m0_1|u_logic|B1gwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Qdj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|B1gwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (((\soc_inst|m0_1|u_logic|Nkpvx4~0_combout 
-//  & !\soc_inst|m0_1|u_logic|K2gwx4~0_combout )) # (\soc_inst|m0_1|u_logic|B1gwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ws3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~q ) # ((\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Yplwx4~0_combout  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B1gwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K2gwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Yplwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B1gwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|B1gwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .lut_mask = 64'h1505150555555555;
-defparam \soc_inst|m0_1|u_logic|B1gwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .lut_mask = 64'h0F000F008F888F88;
+defparam \soc_inst|m0_1|u_logic|Ws3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L6gwx4~0 (
+// Location: LABCELL_X29_Y14_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L6gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Akewx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Akewx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|X77wx4~combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|X77wx4~combout  & \soc_inst|m0_1|u_logic|Ws3wx4~0_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Akewx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L6gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .lut_mask = 64'h30FF30FF00FF00FF;
-defparam \soc_inst|m0_1|u_logic|L6gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .lut_mask = 64'h000F000F0C0F0C0F;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~0 (
+// Location: LABCELL_X29_Y14_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rvfwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # ((!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Ttiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ttiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .lut_mask = 64'hFEFEFEFEFE00FE00;
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .lut_mask = 64'h0000000000400040;
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y20_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~1 (
+// Location: LABCELL_X29_Y14_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rvfwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & !\soc_inst|m0_1|u_logic|Bsy2z4~q )) # (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ttiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ttiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # ((\soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & (\soc_inst|m0_1|u_logic|O76wx4~combout  & 
+// \soc_inst|m0_1|u_logic|Fhc2z4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ttiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (\soc_inst|m0_1|u_logic|Wxcwx4~0_combout  & (\soc_inst|m0_1|u_logic|O76wx4~combout  & 
+// \soc_inst|m0_1|u_logic|Fhc2z4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ttiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .lut_mask = 64'hF3F3F3F3F333F333;
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .lut_mask = 64'h00010001AAABAAAB;
+defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~4 (
+// Location: LABCELL_X29_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rvfwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Rvfwx4~0_combout  & (\soc_inst|m0_1|u_logic|Rvfwx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) 
-// # (\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) ) # ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( ((\soc_inst|m0_1|u_logic|Rvfwx4~0_combout  & (\soc_inst|m0_1|u_logic|Rvfwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|L6gwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~q 
-// ))))) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sbiwx4~3_combout  & (!\soc_inst|m0_1|u_logic|Ttiwx4~1_combout  & !\soc_inst|m0_1|u_logic|Keiwx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sbiwx4~3_combout  & !\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|L6gwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rvfwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~1_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .lut_mask = 64'h0000000000FD00F5;
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .lut_mask = 64'hA0A0A0A0A000A000;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~2 (
+// Location: LABCELL_X29_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Idiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rvfwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Rvfwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rvfwx4~4_combout  ) )
+// \soc_inst|m0_1|u_logic|Idiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & 
+// (\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Rexvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rvfwx4~4_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Idiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .lut_mask = 64'h00FF00FF00FE00FE;
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .lut_mask = 64'h00030F0F00000F0F;
+defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Y9gwx4~0 (
+// Location: MLABCELL_X34_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Agiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|Agiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Y9gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Agiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .lut_mask = 64'hCC00CC0022CE22CE;
-defparam \soc_inst|m0_1|u_logic|Y9gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .lut_mask = 64'h0000000000000003;
+defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K9gwx4~0 (
+// Location: MLABCELL_X34_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yeiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  $ (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q 
-// ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Y9gwx4~0_combout  ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Nqy2z4~q  $ (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Y9gwx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Hyy2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Yeiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Agiwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Agiwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ohwvx4~combout ) # (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Y9gwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Agiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K9gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .lut_mask = 64'h55551001FFFF3003;
-defparam \soc_inst|m0_1|u_logic|K9gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .lut_mask = 64'hFFCF0F0F00000000;
+defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ccgwx4~0 (
+// Location: LABCELL_X29_Y12_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ccgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Yeiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Sbiwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Yeiwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A4t2z4~q  & (\soc_inst|m0_1|u_logic|Sbiwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Sbiwx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyewx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ccgwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .lut_mask = 64'h00000000FFFCFFFC;
-defparam \soc_inst|m0_1|u_logic|Ccgwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .lut_mask = 64'h050105010F030F03;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D9gwx4~0 (
+// Location: LABCELL_X23_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D9gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ccgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K9gwx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Ccgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|K9gwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Qem2z4~q  & !\soc_inst|m0_1|u_logic|Bsy2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~1_combout  = (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ) # (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))))
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|K9gwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ccgwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D9gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .lut_mask = 64'h0000ECEC0000CCCC;
-defparam \soc_inst|m0_1|u_logic|D9gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .lut_mask = 64'h0032003200320032;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6gwx4~0 (
+// Location: LABCELL_X23_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E6gwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & ((!\soc_inst|m0_1|u_logic|H9i2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # 
+// (\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E6gwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .lut_mask = 64'hCF00CF00FF00FF00;
-defparam \soc_inst|m0_1|u_logic|E6gwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .lut_mask = 64'h0000000000CA00CA;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6gwx4~1 (
+// Location: LABCELL_X23_Y11_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E6gwx4~1_combout  = ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( (!\soc_inst|m0_1|u_logic|E6gwx4~0_combout  & \soc_inst|m0_1|u_logic|Howvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E6gwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hohwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sbiwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Sbiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|E6gwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Sbiwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E6gwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .lut_mask = 64'h00F200F200F000F0;
-defparam \soc_inst|m0_1|u_logic|E6gwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .lut_mask = 64'h8000800000000000;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rvfwx4~3 (
+// Location: MLABCELL_X28_Y12_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rvfwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|E6gwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Cyfwx4~0_combout  & (!\soc_inst|m0_1|u_logic|B1gwx4~2_combout  & (\soc_inst|m0_1|u_logic|Rvfwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|D9gwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Sbiwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Sbiwx4~5_combout  & ( \soc_inst|m0_1|u_logic|Sbiwx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|A4t2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sbiwx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Sbiwx4~2_combout  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cyfwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|B1gwx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rvfwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|D9gwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|E6gwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Sbiwx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rvfwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .lut_mask = 64'h0800080000000000;
-defparam \soc_inst|m0_1|u_logic|Rvfwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .lut_mask = 64'h00000F0F00007F7F;
+defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ajfwx4 (
+// Location: LABCELL_X27_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mvhvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ajfwx4~combout  = ( \soc_inst|m0_1|u_logic|Rvfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Vqfwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Rvfwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q ) # ((!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Vqfwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Mvhvx4~combout  = ( \soc_inst|m0_1|u_logic|Sbiwx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sbiwx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|interconnect_1|HREADY~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ajfwx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Vqfwx4~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rvfwx4~3_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~6_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ajfwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ajfwx4 .lut_mask = 64'hFCFDFCFDF0F5F0F5;
-defparam \soc_inst|m0_1|u_logic|Ajfwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mvhvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mvhvx4 .lut_mask = 64'h5F5F5F5F0E0A0E0A;
+defparam \soc_inst|m0_1|u_logic|Mvhvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y19_N41
-dffeas \soc_inst|m0_1|u_logic|Ffj2z4 (
+// Location: FF_X25_Y15_N17
+dffeas \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ajfwx4~combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.sload(vcc),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ffj2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ffj2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~2 (
+// Location: LABCELL_X23_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R1pvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Bsy2z4~q  & \soc_inst|m0_1|u_logic|Nqy2z4~q 
-// )) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Bsy2z4~q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nqy2z4~q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bsy2z4~q )))) # (\soc_inst|m0_1|u_logic|Nqy2z4~q  & (((!\soc_inst|m0_1|u_logic|Bsy2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|R1pvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Df3wx4~9_combout ))))) ) ) # ( 
+// \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( ((\soc_inst|m0_1|u_logic|Df3wx4~9_combout  & ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~q ) # (\soc_inst|m0_1|u_logic|W28wx4~0_combout ))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|W28wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .lut_mask = 64'h62F062F052D052D0;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .lut_mask = 64'h000000000C0CFFAF;
+defparam \soc_inst|m0_1|u_logic|R1pvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~5 (
-// Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( ((\soc_inst|m0_1|u_logic|Qdj2z4~q  & (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Tki2z4~q )))) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ))))) ) )
-
-	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkiwx4~2_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X23_Y14_N38
+dffeas \soc_inst|m0_1|u_logic|Ohh3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .lut_mask = 64'h0003003200030033;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ohh3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ohh3z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~3 (
+// Location: LABCELL_X23_Y14_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Qem2z4~q  & ((\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) # 
-// (\soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( \soc_inst|m0_1|u_logic|H9i2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Oowvx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Qem2z4~q  & ((\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q )))) # (\soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Khnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Ohh3z4~q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout )) # (\soc_inst|m0_1|u_logic|Idk2z4~q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|P0pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ohh3z4~q  & !\soc_inst|m0_1|u_logic|Df3wx4~9_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Oowvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ohh3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Idk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Df3wx4~9_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P0pvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .lut_mask = 64'h0000337F3333337F;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .lut_mask = 64'hA0A0A0A0B3B3B3B3;
+defparam \soc_inst|m0_1|u_logic|Khnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~0 (
+// Location: LABCELL_X23_Y14_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Khnvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # ((\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & 
-// !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & 
-// (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( 
-// (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )))) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ))) # 
-// (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Khnvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Khnvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Jux2z4~q )))) # 
+// (\soc_inst|m0_1|u_logic|R1pvx4~0_combout  & (\soc_inst|m0_1|u_logic|V2qvx4~combout  & ((!\soc_inst|m0_1|u_logic|W0pvx4~combout ) # (\soc_inst|m0_1|u_logic|Jux2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1pvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|V2qvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|W0pvx4~combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Khnvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .lut_mask = 64'h5D085D085D08DDCC;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .lut_mask = 64'hBB0BBB0B00000000;
+defparam \soc_inst|m0_1|u_logic|Khnvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~1 (
+// Location: FF_X23_Y14_N37
+dffeas \soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Khnvx4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X24_Y19_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Wkiwx4~0_combout  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
-// ((\soc_inst|m0_1|u_logic|Wkiwx4~0_combout  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|N662z4~2_combout  = ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sl03z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Yoz2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sl03z4~q  & ( (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Yoz2z4~q ) # (!\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wkiwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yoz2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sl03z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N662z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .lut_mask = 64'h3377005533770055;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~2 .lut_mask = 64'h0000A08000000080;
+defparam \soc_inst|m0_1|u_logic|N662z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wkiwx4~4 (
+// Location: FF_X25_Y21_N20
+dffeas \soc_inst|m0_1|u_logic|Cc53z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Mw1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cc53z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cc53z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cc53z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y21_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Wkiwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Wkiwx4~3_combout  & ( \soc_inst|m0_1|u_logic|Wkiwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & ((!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ) # (\soc_inst|m0_1|u_logic|H9i2z4~q ))) 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Wkiwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Wkiwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ) # (\soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|N662z4~0_combout  = ( \soc_inst|m0_1|u_logic|T243z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Cc53z4~q  
+// & !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|T243z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Cc53z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wkiwx4~5_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wkiwx4~3_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wkiwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Cc53z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|T243z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N662z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .lut_mask = 64'hF3F3000051510000;
-defparam \soc_inst|m0_1|u_logic|Wkiwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~0 .lut_mask = 64'h0000000032001000;
+defparam \soc_inst|m0_1|u_logic|N662z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Agiwx4~0 (
+// Location: FF_X27_Y21_N2
+dffeas \soc_inst|m0_1|u_logic|Bk13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Bk13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Bk13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Bk13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X27_Y21_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Agiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|N662z4~1_combout  = ( \soc_inst|m0_1|u_logic|Bk13z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Kt23z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bk13z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Kt23z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Kt23z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bk13z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Agiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N662z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .lut_mask = 64'h0000000000000005;
-defparam \soc_inst|m0_1|u_logic|Agiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~1 .lut_mask = 64'h00000000A0802000;
+defparam \soc_inst|m0_1|u_logic|N662z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yeiwx4~0 (
+// Location: FF_X22_Y13_N38
+dffeas \soc_inst|m0_1|u_logic|Ymo2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Fdzvx4~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|Pu1wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Ymo2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Ymo2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ymo2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X22_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K862z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Yeiwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Agiwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|P7wvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ohwvx4~combout )))) # 
-// (\soc_inst|m0_1|u_logic|Swy2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|K862z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ymo2z4~q  & ( \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & (\soc_inst|m0_1|u_logic|M1j2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|P7wvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ohwvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Agiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ymo2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|K862z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .lut_mask = 64'hC8FFC8FF00000000;
-defparam \soc_inst|m0_1|u_logic|Yeiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|K862z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|K862z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|K862z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Idiwx4~0 (
+// Location: MLABCELL_X25_Y18_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N662z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Idiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  ) ) # ( !\soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( 
-// (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|N662z4~3_combout  = ( \soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K862z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N662z4~2_combout  & (!\soc_inst|m0_1|u_logic|N662z4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Noo2z4~q  & !\soc_inst|m0_1|u_logic|N662z4~1_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ue9wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|K862z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N662z4~2_combout  & 
+// (!\soc_inst|m0_1|u_logic|N662z4~0_combout  & !\soc_inst|m0_1|u_logic|N662z4~1_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|N662z4~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|N662z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Noo2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|N662z4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|K862z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Idiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N662z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .lut_mask = 64'h000000000030FFFF;
-defparam \soc_inst|m0_1|u_logic|Idiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N662z4~3 .lut_mask = 64'h8800080000000000;
+defparam \soc_inst|m0_1|u_logic|N662z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~3 (
+// Location: MLABCELL_X25_Y18_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xrnvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~3_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|X77wx4~combout  & \soc_inst|m0_1|u_logic|Ws3wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|X77wx4~combout  & 
-// ((\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Xrnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( (\soc_inst|m0_1|u_logic|Eruwx4~combout  & \soc_inst|m0_1|u_logic|N662z4~3_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( \soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( 
+// \soc_inst|m0_1|u_logic|Cqo2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & ( \soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cqo2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Eruwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|N662z4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .lut_mask = 64'h0555055505050505;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .lut_mask = 64'h555533335555000F;
+defparam \soc_inst|m0_1|u_logic|Xrnvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttiwx4~0 (
+// Location: LABCELL_X22_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o[29]~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ttiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Kzxvx4~combout  & !\soc_inst|m0_1|u_logic|Fij2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  = ( \soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|K1wvx4~combout  & ((!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Add5~117_sumout  & ( (!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) # (\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Xrnvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~117_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ttiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .lut_mask = 64'h0000000002000200;
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .lut_mask = 64'hF3F3F3F3F300F300;
+defparam \soc_inst|m0_1|u_logic|haddr_o[29]~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ttiwx4~1 (
+// Location: LABCELL_X30_Y14_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbi3z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ttiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fhc2z4~0_combout  & (\soc_inst|m0_1|u_logic|O76wx4~combout  & \soc_inst|m0_1|u_logic|Wxcwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ttiwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Rbi3z4~0_combout  = ( \soc_inst|m0_1|u_logic|E7mwx4~combout  & ( \soc_inst|interconnect_1|HREADY~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fhc2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ttiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wxcwx4~0_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rbi3z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .lut_mask = 64'h3333333300050005;
-defparam \soc_inst|m0_1|u_logic|Ttiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~4 (
+// Location: LABCELL_X27_Y14_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rbi3z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Ttiwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Sbiwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Rbi3z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Va62z4~combout  & ( (!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & ((((\soc_inst|m0_1|u_logic|Rbi3z4~q ))))) # (\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & 
+// ((!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & (((\soc_inst|m0_1|u_logic|H362z4~0_combout )))) # (\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout  & (!\soc_inst|m0_1|u_logic|haddr_o~1_combout )))) ) ) # ( \soc_inst|m0_1|u_logic|Va62z4~combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & ((((\soc_inst|m0_1|u_logic|Rbi3z4~q ))))) # (\soc_inst|m0_1|u_logic|Rbi3z4~0_combout  & (((\soc_inst|m0_1|u_logic|H362z4~0_combout  & ((!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Add3~1_sumout )))))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Sbiwx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ttiwx4~1_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|haddr_o[29]~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Rbi3z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Add3~1_sumout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rbi3z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Va62z4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H362z4~0_combout ),
+	.datag(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Rbi3z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .lut_mask = 64'hF0A0F0A000000000;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .lut_mask = 64'h10DC00CC32FE32FE;
+defparam \soc_inst|m0_1|u_logic|Rbi3z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y21_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~5 (
+// Location: FF_X27_Y14_N49
+dffeas \soc_inst|m0_1|u_logic|Rbi3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Rbi3z4~1_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Rbi3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Rbi3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Rbi3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y14_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ueovx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Sbiwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|Idiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )))) # (\soc_inst|m0_1|u_logic|Ark2z4~q  & (((\soc_inst|m0_1|u_logic|Yeiwx4~0_combout )) # (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) )
+// \soc_inst|m0_1|u_logic|Ueovx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Z7i2z4~q  & ( \soc_inst|m0_1|u_logic|Rbi3z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Yeiwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Idiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rbi3z4~q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~4_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Z7i2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .lut_mask = 64'h000000003F153F15;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .lut_mask = 64'h5555555500000000;
+defparam \soc_inst|m0_1|u_logic|Ueovx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~0 (
+// Location: LABCELL_X30_Y16_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qbpvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Fij2z4~q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Fij2z4~q  & 
-// ((!\soc_inst|m0_1|u_logic|Aok2z4~q ))))) ) )
+// \soc_inst|m0_1|u_logic|Qbpvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .lut_mask = 64'h0000000000D800D8;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~0 .shared_arith = "off";
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .lut_mask = 64'h0000000050005000;
+defparam \soc_inst|m0_1|u_logic|Qbpvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~1 (
+// Location: LABCELL_X30_Y14_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wmhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Howvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Wmhvx4~0_combout  = (!\soc_inst|interconnect_1|HRDATA[30]~34_combout ) # (!\soc_inst|m0_1|u_logic|Ueovx4~0_combout )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wmhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .lut_mask = 64'h0000000055505550;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .lut_mask = 64'hFFCCFFCCFFCCFFCC;
+defparam \soc_inst|m0_1|u_logic|Wmhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hohwx4~0 (
+// Location: FF_X30_Y14_N8
+dffeas \soc_inst|m0_1|u_logic|Qzw2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wmhvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Qzw2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Qzw2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Qzw2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X30_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hohwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & \soc_inst|m0_1|u_logic|A0zvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|M4nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Qzw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|H9i2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qzw2z4~q  & \soc_inst|m0_1|u_logic|Pfovx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qzw2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M4nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .lut_mask = 64'h0000000000AA00AA;
-defparam \soc_inst|m0_1|u_logic|Hohwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .lut_mask = 64'hAAFAAAFA00F000F0;
+defparam \soc_inst|m0_1|u_logic|M4nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~2 (
+// Location: MLABCELL_X34_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|N8nvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Hohwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Sbiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|N8nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & (((\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout )))) # 
+// (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & (!\soc_inst|interconnect_1|HRDATA[11]~3_combout  & ((\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout )))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Jvqvx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fey2z4~q ) # (\soc_inst|m0_1|u_logic|Edovx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Sbiwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xhiwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sbiwx4~1_combout ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Edovx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fey2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jvqvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|N8nvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .lut_mask = 64'h8000800000000000;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .lut_mask = 64'h0FFF0FFF0EEE0EEE;
+defparam \soc_inst|m0_1|u_logic|N8nvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sbiwx4~6 (
+// Location: FF_X34_Y15_N44
+dffeas \soc_inst|m0_1|u_logic|Fey2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|N8nvx4~0_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Fey2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Fey2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Fey2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X34_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sbiwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Sbiwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Sbiwx4~5_combout  & (((\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ) # (\soc_inst|m0_1|u_logic|L8t2z4~q )) # 
-// (\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Sbiwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & \soc_inst|m0_1|u_logic|Sbiwx4~5_combout ) ) )
+// \soc_inst|m0_1|u_logic|M4nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fey2z4~q ) # ((\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & 
+// \soc_inst|m0_1|u_logic|Vapvx4~combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout  & ( (\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & (\soc_inst|interconnect_1|HRDATA[11]~3_combout  & 
+// \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Wkiwx4~4_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Sbiwx4~5_combout ),
+	.dataa(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+	.datab(!\soc_inst|interconnect_1|HRDATA[11]~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fey2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sbiwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|M4nvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .lut_mask = 64'h00330033007F007F;
-defparam \soc_inst|m0_1|u_logic|Sbiwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .lut_mask = 64'h00110011F0F1F0F1;
+defparam \soc_inst|m0_1|u_logic|M4nvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mvhvx4 (
+// Location: MLABCELL_X25_Y15_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M4nvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mvhvx4~combout  = ( \soc_inst|m0_1|u_logic|Sbiwx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|Sbiwx4~6_combout  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q ) # (\soc_inst|interconnect_1|HREADY~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|M4nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|M4nvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|M4nvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ) # (!\soc_inst|interconnect_1|HRDATA[30]~34_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|interconnect_1|HRDATA[30]~34_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|M4nvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Sbiwx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|M4nvx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mvhvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mvhvx4 .lut_mask = 64'h0FFF0FFF00F800F8;
-defparam \soc_inst|m0_1|u_logic|Mvhvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .lut_mask = 64'hFA00FA0000000000;
+defparam \soc_inst|m0_1|u_logic|M4nvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y19_N43
-dffeas \soc_inst|m0_1|u_logic|Aok2z4 (
+// Location: FF_X25_Y15_N52
+dffeas \soc_inst|m0_1|u_logic|H9i2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Mvhvx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|M4nvx4~2_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -106499,672 +106966,690 @@ dffeas \soc_inst|m0_1|u_logic|Aok2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|H9i2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aok2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Aok2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|H9i2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|H9i2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X45_Y18_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qr42z4~0 (
+// Location: LABCELL_X33_Y13_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ukpvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qr42z4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q ) # ((\soc_inst|m0_1|u_logic|Emi2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Ukpvx4~combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|H9i2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qr42z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .lut_mask = 64'hAAAFAAAA00000055;
-defparam \soc_inst|m0_1|u_logic|Qr42z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ukpvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ukpvx4 .lut_mask = 64'hFF00FF0000000000;
+defparam \soc_inst|m0_1|u_logic|Ukpvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qr42z4~1 (
+// Location: MLABCELL_X25_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wpkwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qr42z4~1_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( !\soc_inst|m0_1|u_logic|Qr42z4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qr42z4~0_combout  & \soc_inst|m0_1|u_logic|Tki2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ukpvx4~combout  & !\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qr42z4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .lut_mask = 64'h00F000F0F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Qr42z4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .lut_mask = 64'h0000000055005500;
+defparam \soc_inst|m0_1|u_logic|Wpkwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I6qvx4~0 (
+// Location: LABCELL_X33_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Itgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|I6qvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|T50wx4~0_combout  & (\soc_inst|m0_1|u_logic|U5qvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ))))) ) ) # ( \soc_inst|m0_1|u_logic|N5qvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|U5qvx4~combout  & (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ) # (\soc_inst|m0_1|u_logic|It52z4~2_combout ))))) ) )
+// \soc_inst|m0_1|u_logic|Itgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Msyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Ilpvx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qr42z4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|It52z4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U5qvx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|N5qvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|T50wx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|I6qvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .lut_mask = 64'h000B00FB00000000;
-defparam \soc_inst|m0_1|u_logic|I6qvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .lut_mask = 64'hCCCCFFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Itgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nfnvx4~0 (
+// Location: LABCELL_X33_Y13_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nfnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6qvx4~0_combout  ) # ( !\soc_inst|m0_1|u_logic|I6qvx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & \soc_inst|m0_1|u_logic|A4t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~0_combout  = ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & 
+// (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|H9i2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Rngwx4~combout  & (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & !\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( 
+// (\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|I6qvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .lut_mask = 64'h00F000F0FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Nfnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .lut_mask = 64'h0000000F2200220F;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X36_Y21_N8
-dffeas \soc_inst|m0_1|u_logic|A4t2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Nfnvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|A4t2z4~q ),
-	.prn(vcc));
+// Location: LABCELL_X30_Y15_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~1 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Pw6wx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Pw6wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|A76wx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~q ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|A4t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|A4t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .lut_mask = 64'hBB3BBB3B00000000;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y21_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~0 (
+// Location: LABCELL_X31_Y13_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|A4t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|H3ivx4~2_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Vbovx4~0_combout  & !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ucqvx4~combout  & ( !\soc_inst|m0_1|u_logic|Vbovx4~0_combout  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Vbovx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ucqvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H3ivx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .lut_mask = 64'h00000000CCCCCCCC;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .lut_mask = 64'hAAAAAAAAAAAA8888;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y20_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E6nwx4~0 (
+// Location: LABCELL_X30_Y15_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E6nwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) )
+// \soc_inst|m0_1|u_logic|H3ivx4~3_combout  = ( \soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( (\soc_inst|m0_1|u_logic|H3ivx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Cr0xx4~0_combout  & ( \soc_inst|m0_1|u_logic|H3ivx4~2_combout  ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|H3ivx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Cr0xx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H3ivx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .lut_mask = 64'h3300330033303330;
-defparam \soc_inst|m0_1|u_logic|E6nwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .lut_mask = 64'h00FF00FF00F300F3;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R7iwx4~0 (
+// Location: LABCELL_X30_Y15_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R7iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|E6nwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Vr7wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|H3ivx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Q77wx4~0_combout )) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|E6nwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Vr7wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ps3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Q77wx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H3ivx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .lut_mask = 64'h000000000000FFFF;
-defparam \soc_inst|m0_1|u_logic|R7iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y21_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|R7iwx4~1 (
+// Location: LABCELL_X30_Y17_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|R7iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout  & !\soc_inst|m0_1|u_logic|B8nwx4~1_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Mtwwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|R7iwx4~0_combout  & !\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Owgvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ywi2z4~q ) # (!\soc_inst|m0_1|u_logic|Wbk2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Owgvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ywi2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Imvvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Owgvx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Wbk2z4~q  ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Q8rwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B8nwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtwwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ywi2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wbk2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Imvvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Owgvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .lut_mask = 64'hC0C0C0C0C000C000;
-defparam \soc_inst|m0_1|u_logic|R7iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .lut_mask = 64'h0000F0F0CCCCFCFC;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~0 (
+// Location: MLABCELL_X34_Y20_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & ((\soc_inst|m0_1|u_logic|Add2~1_sumout ))) # (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Omk2z4~q 
-// )) ) ) # ( !\soc_inst|m0_1|u_logic|S5pvx4~combout  & ( (\soc_inst|m0_1|u_logic|Qaiwx4~0_combout  & !\soc_inst|m0_1|u_logic|Omk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|T2ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gxk2z4~q ) # ((!\soc_inst|m0_1|u_logic|Pxb3z4~q  & \soc_inst|m0_1|u_logic|F2ivx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|T2ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pxb3z4~q  & \soc_inst|m0_1|u_logic|F2ivx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Qaiwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pxb3z4~q ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Add2~1_sumout ),
+	.datac(!\soc_inst|m0_1|u_logic|Gxk2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|F2ivx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|S5pvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|T2ivx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .lut_mask = 64'h5050505050FA50FA;
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .lut_mask = 64'h00AA00AAF0FAF0FA;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~1 (
+// Location: LABCELL_X35_Y17_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~6 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvhvx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Lefwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tvhvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Xdfwx4~combout ) # (!\soc_inst|m0_1|u_logic|Add5~9_sumout ))) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~6_combout  = ( \soc_inst|m0_1|u_logic|Y1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hub3z4~q ) # ((\soc_inst|m0_1|u_logic|M2ivx4~0_combout  & !\soc_inst|m0_1|u_logic|Vac3z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Y1ivx4~0_combout  & ( (\soc_inst|m0_1|u_logic|M2ivx4~0_combout  & !\soc_inst|m0_1|u_logic|Vac3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xdfwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|M2ivx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tvhvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Vac3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hub3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Lefwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y1ivx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~6_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .lut_mask = 64'h50505050FF50FF50;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y21_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvhvx4~2 (
+// Location: LABCELL_X35_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tvhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Tvhvx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H4nwx4~combout ) # ((!\soc_inst|m0_1|u_logic|R7iwx4~1_combout  & \soc_inst|m0_1|u_logic|E9zvx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~7_combout  = ( \soc_inst|m0_1|u_logic|K1ivx4~0_combout  & ( \soc_inst|m0_1|u_logic|D1ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|N7c3z4~q ) # (!\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|K1ivx4~0_combout  & ( \soc_inst|m0_1|u_logic|D1ivx4~0_combout  & ( !\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|K1ivx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D1ivx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|N7c3z4~q  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|R7iwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H4nwx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|E9zvx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tvhvx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|N7c3z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|K1ivx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D1ivx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .lut_mask = 64'h00000000F0FCF0FC;
-defparam \soc_inst|m0_1|u_logic|Tvhvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X42_Y21_N37
-dffeas \soc_inst|m0_1|u_logic|Omk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tvhvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Omk2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Omk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Omk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .lut_mask = 64'h0000AAAAF0F0FAFA;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y25_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Msyvx4 (
+// Location: LABCELL_X35_Y17_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Msyvx4~combout  = ( \soc_inst|m0_1|u_logic|Pet2z4~q  & ( !\soc_inst|m0_1|u_logic|Rryvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Omk2z4~q  & (!\soc_inst|m0_1|u_logic|J0l2z4~q  & (!\soc_inst|m0_1|u_logic|Jux2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~8_combout  = ( \soc_inst|m0_1|u_logic|Lul2z4~q  & ( \soc_inst|m0_1|u_logic|Syhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~6_combout  & !\soc_inst|m0_1|u_logic|Av3wx4~7_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Lul2z4~q  & ( !\soc_inst|m0_1|u_logic|Syhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~6_combout  & !\soc_inst|m0_1|u_logic|Av3wx4~7_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Lul2z4~q  & ( 
+// !\soc_inst|m0_1|u_logic|Syhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~6_combout  & !\soc_inst|m0_1|u_logic|Av3wx4~7_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Omk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|J0l2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Jux2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pet2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rryvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Av3wx4~6_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Av3wx4~7_combout ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Lul2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Syhvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Msyvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Msyvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Msyvx4 .lut_mask = 64'h0000800000000000;
-defparam \soc_inst|m0_1|u_logic|Msyvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .lut_mask = 64'h8888888800008888;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~3 (
+// Location: LABCELL_X35_Y17_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xslwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & !\soc_inst|m0_1|u_logic|O5t2z4~q ))) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q 
-// ) ) ) # ( !\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )))) # (\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~9_combout  = ( \soc_inst|m0_1|u_logic|Nzhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Av3wx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Av3wx4~5_combout  & \soc_inst|m0_1|u_logic|Oar2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nzhvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Av3wx4~8_combout  & ( !\soc_inst|m0_1|u_logic|Av3wx4~5_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Av3wx4~5_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Oar2z4~q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Nzhvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xslwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .lut_mask = 64'hC055C055D555D555;
-defparam \soc_inst|m0_1|u_logic|Xslwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .lut_mask = 64'h00000000AAAA0A0A;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~1 (
+// Location: LABCELL_X36_Y17_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xslwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & (\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout  & ( (\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout  & (\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout  & (\soc_inst|m0_1|u_logic|O24wx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o[20]~16_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|hwdata_o[18]~13_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|O24wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|hwdata_o[19]~14_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[21]~15_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xslwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .lut_mask = 64'h0000000005000500;
-defparam \soc_inst|m0_1|u_logic|Xslwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~2 (
+// Location: LABCELL_X36_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xslwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xslwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qdj2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Xslwx4~1_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qdj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~3_combout  = ( !\soc_inst|m0_1|u_logic|hwdata_o~18_combout  & ( \soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o~10_combout  & (!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout  & 
+// !\soc_inst|m0_1|u_logic|Ux4wx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xslwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o~10_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|hwdata_o[22]~3_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ux4wx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|hwdata_o~18_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|hwdata_o[17]~17_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xslwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .lut_mask = 64'h0C000C00CC00CC00;
-defparam \soc_inst|m0_1|u_logic|Xslwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .lut_mask = 64'h0000000080800000;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~4 (
+// Location: LABCELL_X36_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xslwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Xslwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Xslwx4~3_combout  & ((!\soc_inst|m0_1|u_logic|M66wx4~combout ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Sx3wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ny3wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o~2_combout  & (\soc_inst|m0_1|u_logic|Ny3wx4~2_combout  & 
+// !\soc_inst|m0_1|u_logic|V4ovx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Xslwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xslwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o~2_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Ny3wx4~2_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|V4ovx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Sx3wx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xslwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .lut_mask = 64'hCC0CCC0C00000000;
-defparam \soc_inst|m0_1|u_logic|Xslwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .lut_mask = 64'h0000000022000000;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xslwx4~0 (
+// Location: LABCELL_X36_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ny3wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xslwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~q  & 
-// \soc_inst|m0_1|u_logic|Ark2z4~q )))) # (\soc_inst|m0_1|u_logic|Aok2z4~q  & (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|Ark2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Aok2z4~q  & !\soc_inst|m0_1|u_logic|Emi2z4~q ) ) ) )
+// \soc_inst|m0_1|u_logic|Ny3wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ny3wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o~12_combout  & !\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ny3wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Ny3wx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|hwdata_o~12_combout  & ((!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|hwdata_o~12_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Ny3wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ny3wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xslwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ny3wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .lut_mask = 64'h00000000AA00AE0C;
-defparam \soc_inst|m0_1|u_logic|Xslwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .lut_mask = 64'h00000000AA888888;
+defparam \soc_inst|m0_1|u_logic|Ny3wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Etlwx4~0 (
+// Location: LABCELL_X35_Y17_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Etlwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & 
-// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|Ptgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~10_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~9_combout  & ( \soc_inst|m0_1|u_logic|Ny3wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rym2z4~q ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Av3wx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Ny3wx4~5_combout  & ( (!\soc_inst|m0_1|u_logic|D9ovx4~combout  & ((!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Rym2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Rym2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zyhvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|D9ovx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Av3wx4~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ny3wx4~5_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Etlwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .lut_mask = 64'hE0E0A0A0F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Etlwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .lut_mask = 64'h0000F3000000F3F3;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ushvx4~0 (
+// Location: LABCELL_X35_Y21_N45
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ushvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Etlwx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|Xslwx4~4_combout  & ((!\soc_inst|m0_1|u_logic|Msyvx4~combout ) # 
-// (!\soc_inst|m0_1|u_logic|Xslwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~1_combout  = ( \soc_inst|m0_1|u_logic|W0ivx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|X0c3z4~q ) # ((\soc_inst|m0_1|u_logic|R1ivx4~0_combout  & !\soc_inst|m0_1|u_logic|Ipb3z4~q )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|W0ivx4~0_combout  & ( (\soc_inst|m0_1|u_logic|R1ivx4~0_combout  & !\soc_inst|m0_1|u_logic|Ipb3z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Msyvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xslwx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Xslwx4~0_combout ),
-	.datad(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|R1ivx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|X0c3z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ipb3z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Etlwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|W0ivx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .lut_mask = 64'hFF32FF3200000000;
-defparam \soc_inst|m0_1|u_logic|Ushvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .lut_mask = 64'h55005500F5F0F5F0;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y19_N25
-dffeas \soc_inst|m0_1|u_logic|O5t2z4 (
+// Location: FF_X35_Y21_N55
+dffeas \soc_inst|m0_1|u_logic|T8f3z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Ushvx4~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|T8f3z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O5t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|O5t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|T8f3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|T8f3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X35_Y17_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~2 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Av3wx4~2_combout  = ( \soc_inst|m0_1|u_logic|Gzhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Hzj2z4~q  & \soc_inst|m0_1|u_logic|Ynvvx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Gzhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hzj2z4~q  & \soc_inst|m0_1|u_logic|Ynvvx4~combout ) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hzj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ynvvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Gzhvx4~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~2_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .lut_mask = 64'h0C0C0C0CFF0CFF0C;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|M66wx4 (
+// Location: LABCELL_X35_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|M66wx4~combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Uzhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Av3wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Uzhvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Av3wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B0ivx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Uzhvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|M66wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|M66wx4 .lut_mask = 64'h00000000AAAAAAAA;
-defparam \soc_inst|m0_1|u_logic|M66wx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .lut_mask = 64'hF0FF303300000000;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtqvx4~0 (
+// Location: LABCELL_X35_Y17_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mtqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( ((\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Wkxvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( (\soc_inst|m0_1|u_logic|M66wx4~combout  & \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|T8f3z4~q  & (!\soc_inst|m0_1|u_logic|P0ivx4~0_combout  & ((!\soc_inst|m0_1|u_logic|I0ivx4~0_combout ) # (\soc_inst|m0_1|u_logic|Y9l2z4~q 
+// )))) # (\soc_inst|m0_1|u_logic|T8f3z4~q  & (((!\soc_inst|m0_1|u_logic|I0ivx4~0_combout )) # (\soc_inst|m0_1|u_logic|Y9l2z4~q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|T8f3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Y9l2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|P0ivx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I0ivx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .lut_mask = 64'h003300330F3F0F3F;
-defparam \soc_inst|m0_1|u_logic|Mtqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .lut_mask = 64'h00000000F531F531;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ag4wx4~0 (
+// Location: LABCELL_X35_Y17_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Av3wx4~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ag4wx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q  & (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Ju5wx4~combout )) ) 
-// ) )
+// \soc_inst|m0_1|u_logic|Av3wx4~11_combout  = ( !\soc_inst|m0_1|u_logic|Av3wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Av3wx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Av3wx4~10_combout  & ((!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zx3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Av3wx4~10_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Av3wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Av3wx4~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .lut_mask = 64'h0000000000000202;
-defparam \soc_inst|m0_1|u_logic|Ag4wx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .lut_mask = 64'h0000000000CF0000;
+defparam \soc_inst|m0_1|u_logic|Av3wx4~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y14_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mtqvx4 (
+// Location: LABCELL_X31_Y17_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mtqvx4~combout  = ( !\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & ( \soc_inst|m0_1|u_logic|P03wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mtqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Ag4wx4~0_combout 
-// )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Og4wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|P03wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Mtqvx4~0_combout  & !\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|H3ivx4~1_combout  = ( \soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( (\soc_inst|m0_1|u_logic|Adt2z4~q  & (((!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout  & !\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Av3wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Av3wx4~11_combout  & ( \soc_inst|m0_1|u_logic|Adt2z4~q  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Mtqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ag4wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Og4wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|P03wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q5vvx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Av3wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Adt2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Av3wx4~11_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|H3ivx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mtqvx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mtqvx4 .lut_mask = 64'hCC0000000C000000;
-defparam \soc_inst|m0_1|u_logic|Mtqvx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .lut_mask = 64'h0F0F0F0F0B030B03;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Cdnvx4~0 (
+// Location: LABCELL_X30_Y15_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|H3ivx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Cdnvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~q  & ((!\soc_inst|interconnect_1|HREADY~0_combout ) # ((\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Mtqvx4~combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Abovx4~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & (((\soc_inst|m0_1|u_logic|L8t2z4~q )))) # (\soc_inst|interconnect_1|HREADY~0_combout  & 
-// (((\soc_inst|m0_1|u_logic|Rsqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Mtqvx4~combout ))) ) )
+// \soc_inst|m0_1|u_logic|H3ivx4~4_combout  = ( \soc_inst|m0_1|u_logic|Ws3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H3ivx4~3_combout ) # ((\soc_inst|m0_1|u_logic|Gji2z4~q ) # (\soc_inst|m0_1|u_logic|H3ivx4~1_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ws3wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Gji2z4~q  & ((!\soc_inst|m0_1|u_logic|H3ivx4~3_combout ) # ((\soc_inst|m0_1|u_logic|H3ivx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Gji2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|H3ivx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rsqvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|H3ivx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|H3ivx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H3ivx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gji2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Abovx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ws3wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|H3ivx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .lut_mask = 64'h15BF15BF00BF00BF;
-defparam \soc_inst|m0_1|u_logic|Cdnvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .lut_mask = 64'hAFCCAFCCAFFFAFFF;
+defparam \soc_inst|m0_1|u_logic|H3ivx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y19_N43
-dffeas \soc_inst|m0_1|u_logic|L8t2z4 (
+// Location: FF_X30_Y15_N2
+dffeas \soc_inst|m0_1|u_logic|Gji2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Cdnvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|H3ivx4~4_combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -107173,2534 +107658,2546 @@ dffeas \soc_inst|m0_1|u_logic|L8t2z4 (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Gji2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L8t2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|L8t2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Gji2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Gji2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~2 (
+// Location: LABCELL_X35_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Lfewx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
-// \soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q )))) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|H9i2z4~q 
-// )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|Uijwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q ))) ) ) )
+// \soc_inst|m0_1|u_logic|Lfewx4~combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Uijwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Lfewx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .lut_mask = 64'hF8F00505B8300505;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Lfewx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Lfewx4 .lut_mask = 64'h3333333330333033;
+defparam \soc_inst|m0_1|u_logic|Lfewx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0iwx4~0 (
+// Location: LABCELL_X36_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K0iwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Hyy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( 
-// \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & ((\soc_inst|m0_1|u_logic|Hyy2z4~q ))) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|Swy2z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Hyy2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dj6wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qem2z4~q  & 
-// (((\soc_inst|m0_1|u_logic|Hyy2z4~q )))) # (\soc_inst|m0_1|u_logic|Qem2z4~q  & ((!\soc_inst|m0_1|u_logic|Bsy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Swy2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~2_combout  = ( !\soc_inst|m0_1|u_logic|My6wx4~1_combout  & ( \soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Lfewx4~combout  & ((!\soc_inst|m0_1|u_logic|My6wx4~0_combout ) # 
+// ((!\soc_inst|m0_1|u_logic|Swy2z4~q ) # (\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|My6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lfewx4~combout  ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|My6wx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Vskwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Lfewx4~combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dj6wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Lfewx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Vskwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K0iwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .lut_mask = 64'h32FE00CC30FC00CC;
-defparam \soc_inst|m0_1|u_logic|K0iwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .lut_mask = 64'hFF00FF00EF000000;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|K0iwx4~1 (
+// Location: LABCELL_X30_Y15_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|K0iwx4~1_combout  = ( \soc_inst|m0_1|u_logic|K0iwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|G27wx4~1_combout  & \soc_inst|m0_1|u_logic|U2x2z4~q )) ) ) # ( !\soc_inst|m0_1|u_logic|K0iwx4~0_combout  
-// & ( \soc_inst|m0_1|u_logic|U2x2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~3_combout  = ( \soc_inst|m0_1|u_logic|Pw6wx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Pw6wx4~1_combout  & (((!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Gji2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pw6wx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gji2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|K0iwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Pw6wx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|K0iwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .lut_mask = 64'h00FF00FF000C000C;
-defparam \soc_inst|m0_1|u_logic|K0iwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .lut_mask = 64'h000000000F0D0F0D;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~1 (
+// Location: MLABCELL_X34_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sfewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( !\soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ) # 
-// ((\soc_inst|m0_1|u_logic|H9i2z4~q  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Sfewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Dvy2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q  & !\soc_inst|m0_1|u_logic|Nqy2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sfewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .lut_mask = 64'hCC400000CC0C0000;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .lut_mask = 64'h0F000F000F0F0F0F;
+defparam \soc_inst|m0_1|u_logic|Sfewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~3 (
+// Location: MLABCELL_X34_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sfewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fuhwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & (\soc_inst|m0_1|u_logic|Qdj2z4~q  & (!\soc_inst|m0_1|u_logic|Fuhwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|K0iwx4~1_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Sfewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Px5wx4~combout  & (((\soc_inst|m0_1|u_logic|Pty2z4~q  & !\soc_inst|m0_1|u_logic|Bsy2z4~q )) # (\soc_inst|m0_1|u_logic|Sfewx4~0_combout ))) ) 
+// ) # ( !\soc_inst|m0_1|u_logic|Ugewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Px5wx4~combout  & (((\soc_inst|m0_1|u_logic|Sfewx4~0_combout ) # (\soc_inst|m0_1|u_logic|Bsy2z4~q )) # (\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuhwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|K0iwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Sfewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fuhwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Sfewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .lut_mask = 64'h1000100000000000;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .lut_mask = 64'h2AAA2AAA20AA20AA;
+defparam \soc_inst|m0_1|u_logic|Sfewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~4 (
+// Location: MLABCELL_X21_Y13_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fcewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & \soc_inst|m0_1|u_logic|Hdh2z4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Fcewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|G9w2z4~q ) # (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|G9w2z4~q  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fcewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .lut_mask = 64'h0044004400000000;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .lut_mask = 64'hCCCCFFCC0500FF00;
+defparam \soc_inst|m0_1|u_logic|Fcewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fuhwx4~5 (
+// Location: MLABCELL_X21_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fcewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fuhwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Fuhwx4~4_combout  & ( \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuhwx4~3_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~4_combout  & ( 
-// \soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Fuhwx4~4_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( !\soc_inst|m0_1|u_logic|Fuhwx4~3_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Fuhwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Xx2wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout  & 
-// \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Fcewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fcewx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( 
+// \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fcewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Jeewx4~combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fcewx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fcewx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Fuhwx4~3_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Fuhwx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Jeewx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fcewx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fcewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .lut_mask = 64'h0C0CCCCC4C4CCCCC;
-defparam \soc_inst|m0_1|u_logic|Fuhwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .lut_mask = 64'hFF00FF00F500FF00;
+defparam \soc_inst|m0_1|u_logic|Fcewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xphwx4~0 (
+// Location: LABCELL_X29_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xphwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|Qp3wx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fcewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Pw6wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Sfewx4~1_combout  & \soc_inst|m0_1|u_logic|Unewx4~combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Fcewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Pw6wx4~3_combout  & (!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Sfewx4~1_combout  & \soc_inst|m0_1|u_logic|Unewx4~combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pw6wx4~3_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Sfewx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Unewx4~combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fcewx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xphwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .lut_mask = 64'h00000000000C000C;
-defparam \soc_inst|m0_1|u_logic|Xphwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .lut_mask = 64'h0040004000500050;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y19_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~0 (
+// Location: MLABCELL_X28_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Akewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Bsy2z4~q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|Mk6wx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( 
-// !\soc_inst|m0_1|u_logic|Qllwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Akewx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # (((!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|A4t2z4~q ))) # (\soc_inst|m0_1|u_logic|Fij2z4~q ) ) ) # ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// (((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Emewx4~0_combout )) # (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datag(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Akewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .lut_mask = 64'h00CC00CC00CCF0FC;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Akewx4~1 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Akewx4~1 .lut_mask = 64'hFFFFFF00FFDFFFDF;
+defparam \soc_inst|m0_1|u_logic|Akewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~2 (
+// Location: LABCELL_X29_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Yiewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ((!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Swy2z4~q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Icyvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Csewx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Yiewx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jbhwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Akewx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O76wx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|B1vvx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Jbhwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Akewx4~1_combout  & ((!\soc_inst|m0_1|u_logic|O76wx4~combout ) # (\soc_inst|m0_1|u_logic|B1vvx4~0_combout ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Icyvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Csewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Akewx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Yiewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .lut_mask = 64'hFFFF2222D0D00000;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .lut_mask = 64'h00DD00DD000D000D;
+defparam \soc_inst|m0_1|u_logic|Yiewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y23_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~1 (
+// Location: LABCELL_X29_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Npk2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Npk2z4~q 
-// )) ) ) ) # ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Pmgwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Z7fwx4~0_combout  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Npk2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~5_combout  = ( \soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yiewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Itgwx4~0_combout  & \soc_inst|m0_1|u_logic|Pw6wx4~4_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Yiewx4~0_combout  & ( \soc_inst|m0_1|u_logic|Pw6wx4~4_combout  ) ) ) # ( \soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yiewx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Itgwx4~0_combout  & (\soc_inst|m0_1|u_logic|Pw6wx4~4_combout  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Z9dwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Yiewx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Pw6wx4~4_combout  & \soc_inst|m0_1|u_logic|Fjewx4~1_combout ) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Z7fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Pw6wx4~4_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Yiewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .lut_mask = 64'h30003000300030FF;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .lut_mask = 64'h0303010133331111;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~3 (
+// Location: LABCELL_X23_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Vz6wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~3_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rmhwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rmhwx4~0_combout  & (\soc_inst|m0_1|u_logic|Rmhwx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rmhwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Rmhwx4~0_combout  & \soc_inst|m0_1|u_logic|Rmhwx4~2_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Vz6wx4~combout  = ( \soc_inst|m0_1|u_logic|P28wx4~combout  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  $ (((!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ) # (\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|P28wx4~combout  & ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  $ (!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Rmhwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Rmhwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ad7wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Xt6wx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|P28wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Vz6wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .lut_mask = 64'h0C0C0C0000000000;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Vz6wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Vz6wx4 .lut_mask = 64'h33CC33CC33C333C3;
+defparam \soc_inst|m0_1|u_logic|Vz6wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~4 (
+// Location: LABCELL_X23_Y15_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pw6wx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Rmhwx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Rmhwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|G27wx4~2_combout 
-// ) # (!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Pw6wx4~combout  = ( \soc_inst|m0_1|u_logic|Vz6wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ) # ((\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Blwvx4~0_combout  & 
+// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Vz6wx4~combout  & ( !\soc_inst|m0_1|u_logic|Pw6wx4~5_combout  ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Rmhwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Blwvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pw6wx4~5_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Vz6wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .lut_mask = 64'h00000000FCFCFFFF;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pw6wx4 .lut_mask = 64'hFF00FF00FF40FF40;
+defparam \soc_inst|m0_1|u_logic|Pw6wx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Rmhwx4~5 (
+// Location: FF_X23_Y15_N38
+dffeas \soc_inst|m0_1|u_logic|Tki2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Pw6wx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Tki2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Tki2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X23_Y15_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pcyvx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Rmhwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  & ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Xphwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) ) 
-// ) ) # ( \soc_inst|m0_1|u_logic|Rmhwx4~4_combout  & ( !\soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( !\soc_inst|m0_1|u_logic|Xphwx4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Pcyvx4~combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Tki2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xphwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Rmhwx4~4_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .lut_mask = 64'h0000AAAA0000A2A2;
-defparam \soc_inst|m0_1|u_logic|Rmhwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Pcyvx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Pcyvx4 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|m0_1|u_logic|Pcyvx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N27
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Sjhwx4~0 (
+// Location: LABCELL_X23_Y15_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Duc2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Sjhwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  
-// & ( ((!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) # (((!\soc_inst|m0_1|u_logic|L8t2z4~q ) # (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ))) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Duc2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|Kfd2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # ((!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|L8t2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qfdwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Kfd2z4~0_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .lut_mask = 64'hDCDCFFFFDCDCFFDF;
-defparam \soc_inst|m0_1|u_logic|Sjhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .lut_mask = 64'hFFEFFFEF00000000;
+defparam \soc_inst|m0_1|u_logic|Duc2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ejhwx4 (
+// Location: FF_X21_Y20_N56
+dffeas \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|F6zvx4~1_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|m0_1|u_logic|G02wx4~combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X25_Y21_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ejhwx4~combout  = ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Ec62z4~0_combout  = ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Na53z4~q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|E143z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E143z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Na53z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ejhwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ec62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ejhwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ejhwx4 .lut_mask = 64'h000A000A00000000;
-defparam \soc_inst|m0_1|u_logic|Ejhwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .lut_mask = 64'h0000202000003000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~0 (
+// Location: FF_X21_Y23_N2
+dffeas \soc_inst|m0_1|u_logic|J5i3z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|J5i3z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Wu1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|J5i3z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|J5i3z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|J5i3z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y23_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Y6t2z4~q ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ark2z4~q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Fij2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Ec62z4~2_combout  = ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Y6i3z4~q  & ( (!\soc_inst|m0_1|u_logic|J5i3z4~q  & (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Fgm2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Y6i3z4~q  & ( (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|J5i3z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|Fgm2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|J5i3z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y6i3z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ec62z4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .lut_mask = 64'h0C0C0C0C00040004;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .lut_mask = 64'h3020000000200000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~1 (
+// Location: MLABCELL_X21_Y20_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Be62z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  & ( \soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ndhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|I0hwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Ark2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~q ))) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) ) 
-// )
+// \soc_inst|m0_1|u_logic|Be62z4~0_combout  = ( !\soc_inst|m0_1|u_logic|N8i3z4~q  & ( \soc_inst|m0_1|u_logic|M1j2z4~q  & ( (!\soc_inst|m0_1|u_logic|Sjj2z4~q  & (\soc_inst|m0_1|u_logic|Fgm2z4~q  & (!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ilpvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Ndhwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|N8i3z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|M1j2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Be62z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .lut_mask = 64'hDFFF000055FF0000;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Be62z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Be62z4~0 .lut_mask = 64'h0000000020000000;
+defparam \soc_inst|m0_1|u_logic|Be62z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~2 (
+// Location: FF_X21_Y24_N34
+dffeas \soc_inst|m0_1|u_logic|Mi13z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Mi13z4~feeder_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(\soc_inst|m0_1|u_logic|Yv1wx4~1_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|Mi13z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|Mi13z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Mi13z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X21_Y24_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~2_combout  = ( \soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ndhwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ejhwx4~combout  & ((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Ndhwx4~1_combout  & ( !\soc_inst|m0_1|u_logic|Ejhwx4~combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ec62z4~1_combout  = ( !\soc_inst|m0_1|u_logic|Fgm2z4~q  & ( \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Rni2z4~q  & ((!\soc_inst|m0_1|u_logic|Sjj2z4~q  & ((!\soc_inst|m0_1|u_logic|Mi13z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|Sjj2z4~q  & (!\soc_inst|m0_1|u_logic|Vr23z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ejhwx4~combout ),
-	.datae(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sjj2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Vr23z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Rni2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Mi13z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Fgm2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ec62z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .lut_mask = 64'h00000000FF00FA00;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .lut_mask = 64'h00000000E0400000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tghwx4~0 (
+// Location: MLABCELL_X21_Y20_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ec62z4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tghwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~q  & ( (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & ((!\soc_inst|m0_1|u_logic|Sgj2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Fij2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & (((\soc_inst|m0_1|u_logic|Y6t2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) # (\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Ec62z4~3_combout  = ( !\soc_inst|m0_1|u_logic|Be62z4~0_combout  & ( !\soc_inst|m0_1|u_logic|Ec62z4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Ec62z4~0_combout  & (!\soc_inst|m0_1|u_logic|Ec62z4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ) # (\soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE_q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ec62z4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ue9wx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ec62z4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Be62z4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ec62z4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tghwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ec62z4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .lut_mask = 64'h1311131133113311;
-defparam \soc_inst|m0_1|u_logic|Tghwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .lut_mask = 64'hC400000000000000;
+defparam \soc_inst|m0_1|u_logic|Ec62z4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fghwx4 (
+// Location: MLABCELL_X21_Y18_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8zvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fghwx4~combout  = ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & (\soc_inst|m0_1|u_logic|B73wx4~combout  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Q8zvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((\soc_inst|m0_1|u_logic|Rhi2z4~q ) # (\soc_inst|m0_1|u_logic|Kuc2z4~1_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( \soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & \soc_inst|m0_1|u_logic|Rhi2z4~q )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Saqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & \soc_inst|m0_1|u_logic|Rhi2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Saqwx4~combout  & ( !\soc_inst|m0_1|u_logic|Ec62z4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & 
+// (\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Duc2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout  & \soc_inst|m0_1|u_logic|Rhi2z4~q )))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Duc2z4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Kuc2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Rhi2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Saqwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ec62z4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fghwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fghwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fghwx4 .lut_mask = 64'h0005000500000000;
-defparam \soc_inst|m0_1|u_logic|Fghwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .lut_mask = 64'h2272227222722777;
+defparam \soc_inst|m0_1|u_logic|Q8zvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~3 (
+// Location: LABCELL_X22_Y17_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Fghwx4~combout  & ( (\soc_inst|m0_1|u_logic|Ndhwx4~2_combout  & (!\soc_inst|m0_1|u_logic|Tghwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Xx2wx4~combout )))) ) )
+// \soc_inst|m0_1|u_logic|haddr_o~1_combout  = ( \soc_inst|m0_1|u_logic|Add3~5_sumout  & ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # 
+// (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~5_sumout  & ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|K1wvx4~combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Add3~5_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout )) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Add3~5_sumout  & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout  & 
+// \soc_inst|m0_1|u_logic|Gzvvx4~2_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Xx2wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ndhwx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Tghwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fghwx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Add3~5_sumout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .lut_mask = 64'h0E000E0000000000;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|haddr_o~1 .lut_mask = 64'h00AA0FAF33BB3FBF;
+defparam \soc_inst|m0_1|u_logic|haddr_o~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4~4 (
+// Location: LABCELL_X22_Y17_N36
+cyclonev_lcell_comb \soc_inst|interconnect_1|LessThan0~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~4_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Ndhwx4~3_combout  & ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ))) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( (\soc_inst|m0_1|u_logic|Ndhwx4~3_combout  & (((\soc_inst|m0_1|u_logic|Sjhwx4~0_combout  & !\soc_inst|m0_1|u_logic|Huqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ))) ) )
+// \soc_inst|interconnect_1|LessThan0~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sjhwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ndhwx4~3_combout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ),
+	.combout(\soc_inst|interconnect_1|LessThan0~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .lut_mask = 64'h004F004F005F005F;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4~4 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|LessThan0~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|LessThan0~0 .lut_mask = 64'h00000000FF00FF00;
+defparam \soc_inst|interconnect_1|LessThan0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ndhwx4 (
+// Location: FF_X22_Y17_N40
+dffeas \soc_inst|interconnect_1|mux_sel[0]~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|interconnect_1|mux_sel[0]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|interconnect_1|mux_sel[0]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X29_Y17_N51
+cyclonev_lcell_comb \soc_inst|interconnect_1|HREADY~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ndhwx4~combout  = ( \soc_inst|m0_1|u_logic|Ndhwx4~4_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & (((!\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ) # (\soc_inst|m0_1|u_logic|Fuhwx4~5_combout )) # 
-// (\soc_inst|m0_1|u_logic|Hohwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Ndhwx4~4_combout  )
+// \soc_inst|interconnect_1|HREADY~0_combout  = ( \soc_inst|interconnect_1|mux_sel [2] & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) # ( !\soc_inst|interconnect_1|mux_sel [2] & ( \soc_inst|ram_1|write_cycle~DUPLICATE_q  & ( 
+// (!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ) # (\soc_inst|interconnect_1|mux_sel [1]) ) ) ) # ( \soc_inst|interconnect_1|mux_sel [2] & ( !\soc_inst|ram_1|write_cycle~DUPLICATE_q  ) ) # ( !\soc_inst|interconnect_1|mux_sel [2] & ( 
+// !\soc_inst|ram_1|write_cycle~DUPLICATE_q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Hohwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fuhwx4~5_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Rmhwx4~5_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ndhwx4~4_combout ),
+	.dataa(!\soc_inst|interconnect_1|mux_sel[0]~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\soc_inst|interconnect_1|mux_sel [1]),
+	.datae(!\soc_inst|interconnect_1|mux_sel [2]),
+	.dataf(!\soc_inst|ram_1|write_cycle~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
+	.combout(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ndhwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ndhwx4 .lut_mask = 64'hFFFFFFFFAA2AAA2A;
-defparam \soc_inst|m0_1|u_logic|Ndhwx4 .shared_arith = "off";
+defparam \soc_inst|interconnect_1|HREADY~0 .extended_lut = "off";
+defparam \soc_inst|interconnect_1|HREADY~0 .lut_mask = 64'hFFFFFFFFAAFFFFFF;
+defparam \soc_inst|interconnect_1|HREADY~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y19_N32
-dffeas \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE (
+// Location: FF_X24_Y15_N35
+dffeas \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ndhwx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(vcc),
+	.sload(gnd),
 	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.q(\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~1 (
+// Location: LABCELL_X33_Y13_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zygwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Orewx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Fij2z4~q  & \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Aok2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Zygwx4~0_combout  = ( \soc_inst|m0_1|u_logic|V1yvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|U2x2z4~q  & !\soc_inst|m0_1|u_logic|A4t2z4~q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zygwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .lut_mask = 64'h00000000333F333F;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .lut_mask = 64'h00000000A000A000;
+defparam \soc_inst|m0_1|u_logic|Zygwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D5kwx4~0 (
+// Location: LABCELL_X33_Y13_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|D5kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~q  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & 
-// !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Sgj2z4~q  & ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Ark2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) ) ) )
+// \soc_inst|m0_1|u_logic|Tvgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Zygwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( !\soc_inst|m0_1|u_logic|Yyyvx4~combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Zygwx4~0_combout  & ( 
+// !\soc_inst|m0_1|u_logic|Aok2z4~q  & ( (!\soc_inst|m0_1|u_logic|Yyyvx4~combout  & ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Yyyvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Zygwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|D5kwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .lut_mask = 64'h440008084400080C;
-defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .lut_mask = 64'hC4C40000CCCC0000;
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~2 (
+// Location: LABCELL_X33_Y13_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tvgwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~q ) # ((\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Kzxvx4~combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) ) 
-// # ( !\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ncqvx4~0_combout  & (\soc_inst|m0_1|u_logic|Emi2z4~q  & (\soc_inst|m0_1|u_logic|Kzxvx4~combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Tvgwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L8t2z4~q  & ((!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( 
+// !\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Tvgwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tvgwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .lut_mask = 64'h01000100CDCCCDCC;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .lut_mask = 64'hC0C0C0C0C0F0C0C0;
+defparam \soc_inst|m0_1|u_logic|Tvgwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~3 (
+// Location: LABCELL_X33_Y12_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Amjwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|D5kwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Ark2z4~q 
-// )))) ) )
+// \soc_inst|m0_1|u_logic|P0hwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H06wx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|D5kwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Amjwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|H06wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P0hwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .lut_mask = 64'hC8CCC8CC00000000;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .lut_mask = 64'h00000000CF0FCF0F;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~4 (
+// Location: LABCELL_X33_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Amjwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Amjwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Y6t2z4~q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Amjwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|Amjwx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|P0hwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|P0hwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Hvhwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Tvgwx4~1_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Amjwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tvgwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Amjwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|P0hwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hvhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .lut_mask = 64'h00000000F0F0E0E0;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .lut_mask = 64'hAAAA0000A8A80000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y19_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~5 (
+// Location: LABCELL_X30_Y15_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|I0hwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~5_combout  = ( !\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ( (\soc_inst|m0_1|u_logic|Amjwx4~4_combout  & (\soc_inst|m0_1|u_logic|Amjwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|I0hwx4~1_combout  = ( \soc_inst|m0_1|u_logic|C34wx4~combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zzb2z4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|C34wx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout  & ((\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Amjwx4~4_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|C34wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|I0hwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .lut_mask = 64'h0032003200000000;
-defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .lut_mask = 64'h003F003F000F000F;
+defparam \soc_inst|m0_1|u_logic|I0hwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qujwx4~0 (
+// Location: LABCELL_X27_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Kugwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Qujwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (((!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|G27wx4~0_combout ))) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # 
-// ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )))) ) )
+// \soc_inst|m0_1|u_logic|Kugwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & (((!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & \soc_inst|m0_1|u_logic|Bxcwx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|A76wx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|C9yvx4~combout  & ( (\soc_inst|m0_1|u_logic|O9qvx4~0_combout  & \soc_inst|m0_1|u_logic|A76wx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
-	.datag(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|O9qvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A76wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C9yvx4~combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Qujwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Kugwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .lut_mask = 64'hFFFFFFFEEFFFFFFE;
-defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .lut_mask = 64'h1111111111511151;
+defparam \soc_inst|m0_1|u_logic|Kugwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zvjwx4~0 (
+// Location: LABCELL_X31_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Zvjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & (((\soc_inst|m0_1|u_logic|G27wx4~2_combout ) # (\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|R3fwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|R3fwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Togwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Togwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .lut_mask = 64'h1515151515551555;
-defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~1 .lut_mask = 64'hF0FCF0FC00CC00CC;
+defparam \soc_inst|m0_1|u_logic|Togwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xujwx4~0 (
+// Location: LABCELL_X31_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Xujwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qdj2z4~q  & ( (\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & (((\soc_inst|m0_1|u_logic|My6wx4~1_combout  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Togwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Togwx4~1_combout  & ( ((\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|A4t2z4~q ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Togwx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Pcyvx4~combout  & !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Togwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Xujwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Togwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .lut_mask = 64'h0000000001330133;
-defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~2 .lut_mask = 64'h0F000F005F555F55;
+defparam \soc_inst|m0_1|u_logic|Togwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E2kwx4~0 (
+// Location: LABCELL_X31_Y11_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|E2kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & 
-// (!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~q  & ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
-// (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~q  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q 
-//  & ( (\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) ) ) )
+// \soc_inst|m0_1|u_logic|Togwx4~0_combout  = ( \soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|H9i2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|U2x2z4~q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|H9i2z4~q  & ((\soc_inst|m0_1|u_logic|Hyy2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datab(gnd),
 	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|E2kwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Togwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .lut_mask = 64'h0000000F002000D8;
-defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~0 .lut_mask = 64'hAA0FAA0FAA00AA00;
+defparam \soc_inst|m0_1|u_logic|Togwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X55_Y21_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~0 (
+// Location: LABCELL_X31_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Togwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Htjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # 
-// (\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Qem2z4~q )) ) ) )
+// \soc_inst|m0_1|u_logic|Togwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Togwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Togwx4~2_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Togwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Togwx4~2_combout  & 
+// ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Togwx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Togwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Togwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .lut_mask = 64'h0000010100001101;
-defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Togwx4~3 .lut_mask = 64'hCC0CCC0CCCCCCCCC;
+defparam \soc_inst|m0_1|u_logic|Togwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~1 (
+// Location: MLABCELL_X28_Y13_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Poa2z4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Htjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( !\soc_inst|m0_1|u_logic|Htjwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Htjwx4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Poa2z4~1_combout  = ( \soc_inst|m0_1|u_logic|Pcyvx4~combout  & ( \soc_inst|m0_1|u_logic|Poa2z4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ffj2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Htjwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Poa2z4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htjwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Poa2z4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .lut_mask = 64'hA0F0A0F0F0F0F0F0;
-defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .lut_mask = 64'h0000000000003030;
+defparam \soc_inst|m0_1|u_logic|Poa2z4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y21_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~2 (
+// Location: LABCELL_X33_Y13_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ekgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Htjwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E2kwx4~0_combout  & (\soc_inst|m0_1|u_logic|Htjwx4~1_combout  & 
-// !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Htjwx4~1_combout  & !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) ) ) ) # ( 
-// \soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|E2kwx4~0_combout  & \soc_inst|m0_1|u_logic|Htjwx4~1_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Xiwvx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Htjwx4~1_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Ekgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout ))) 
+// ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|E2kwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Htjwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htjwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .lut_mask = 64'h3333222230302020;
-defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .lut_mask = 64'h0000000000080008;
+defparam \soc_inst|m0_1|u_logic|Ekgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~3 (
+// Location: MLABCELL_X28_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~14 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Htjwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Htjwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Xujwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~14_combout  = ( !\soc_inst|m0_1|u_logic|Ekgwx4~0_combout  & ( ((!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Poa2z4~1_combout ) # (!\soc_inst|m0_1|u_logic|Hyy2z4~q ))) # 
+// (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Xujwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|W7hwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Poa2z4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Htjwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ekgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Htjwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~14_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .lut_mask = 64'h00000000AAA8AAA8;
-defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .lut_mask = 64'hFFFDFFFD00000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y24_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Drjwx4~0 (
+// Location: LABCELL_X36_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~13 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Drjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Htjwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Qem2z4~q  & (!\soc_inst|m0_1|u_logic|Qujwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Htjwx4~3_combout  & ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~13_combout  = ( \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout ) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( (!\soc_inst|m0_1|u_logic|Jky2z4~q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & ((\soc_inst|m0_1|u_logic|P0hwx4~1_combout )))) # (\soc_inst|m0_1|u_logic|Jky2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout )) # (\soc_inst|m0_1|u_logic|Srgwx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ahwvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Rngwx4~combout  & ( 
+// (\soc_inst|m0_1|u_logic|Jky2z4~q  & \soc_inst|m0_1|u_logic|Srgwx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qujwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Htjwx4~3_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Jky2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Ahwvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Drjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~13_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .lut_mask = 64'hFF00FF0080008000;
-defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .lut_mask = 64'h050505CD000000CC;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Krjwx4~0 (
+// Location: MLABCELL_X28_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~15 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Krjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|O5t2z4~q  & ( (!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zzfwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|O5t2z4~q  & ( 
-// ((!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Zzfwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~15_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~13_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~14_combout  & ((!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) # ((!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bfgwx4~14_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~13_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Krjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~15_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .lut_mask = 64'h0AFF0AFF0A0A0A0A;
-defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .lut_mask = 64'h0F0E0F0E00000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~15 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y19_N33
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tsjwx4~0 (
+// Location: LABCELL_X30_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~16 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tsjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~16_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~15_combout  & ( ((\soc_inst|m0_1|u_logic|S4w2z4~q ) # (\soc_inst|m0_1|u_logic|Togwx4~3_combout )) # (\soc_inst|m0_1|u_logic|Rngwx4~combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Rngwx4~combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Togwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~15_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~16_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .lut_mask = 64'h0000000005000500;
-defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .lut_mask = 64'h000000005FFF5FFF;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~16 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y19_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4 (
+// Location: LABCELL_X29_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Amjwx4~combout  = ( \soc_inst|m0_1|u_logic|Tsjwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ) # (\soc_inst|m0_1|u_logic|Drjwx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Tsjwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ) # (((!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Krjwx4~0_combout )) # (\soc_inst|m0_1|u_logic|Drjwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) # 
+// (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Drjwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Krjwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Amjwx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Amjwx4 .lut_mask = 64'hCFEFCFEFEFEFEFEF;
-defparam \soc_inst|m0_1|u_logic|Amjwx4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .lut_mask = 64'h3300F3C000000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y19_N38
-dffeas \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.prn(vcc));
+// Location: LABCELL_X22_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~6 (
+// Equation(s):
+// \soc_inst|m0_1|u_logic|Bfgwx4~6_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// ((\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Fij2z4~q ) # (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q )))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & 
+// !\soc_inst|m0_1|u_logic|Fij2z4~q )) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ((\soc_inst|m0_1|u_logic|Fij2z4~q ))))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  $ (((!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~q ))))) ) ) )
+
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .lut_mask = 64'h6050205060E020A0;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~0 (
+// Location: LABCELL_X22_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~7 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrsvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Jbhwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Jbhwx4~0_combout  & ( 
-// !\soc_inst|m0_1|u_logic|Mn3wx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~7_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~6_combout  & ((!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ))) ) ) ) # ( 
+// \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~6_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  & ( !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~6_combout 
+//  ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Mn3wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jbhwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pmgwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~6_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~7_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .lut_mask = 64'hFF00FF00CC00CC00;
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .lut_mask = 64'hFF00FF00F5005500;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G6d2z4~0 (
+// Location: LABCELL_X24_Y10_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~8 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G6d2z4~0_combout  = ( !\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~8_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~5_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~7_combout  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ax0xx4~0_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ax0xx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bfgwx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~7_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G6d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~8_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .lut_mask = 64'h000F000F00000000;
-defparam \soc_inst|m0_1|u_logic|G6d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .lut_mask = 64'h00000000EFEF0000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5d2z4~0 (
+// Location: LABCELL_X24_Y10_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~9 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Z5d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Aok2z4~q  & (\soc_inst|m0_1|u_logic|Npk2z4~q  & !\soc_inst|m0_1|u_logic|Sgj2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~9_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bfgwx4~8_combout  & ( (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|L8t2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Bfgwx4~8_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~8_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~9_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .lut_mask = 64'h0000000022002200;
-defparam \soc_inst|m0_1|u_logic|Z5d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .lut_mask = 64'h00000000FFFFFAFF;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L5d2z4~0 (
+// Location: LABCELL_X30_Y11_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L5d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Aok2z4~q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|Tki2z4~q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|P0hwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~q  & ( (\soc_inst|m0_1|u_logic|C2yvx4~combout  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & \soc_inst|m0_1|u_logic|H5fwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Aok2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L5d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P0hwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .lut_mask = 64'h0000000044004400;
-defparam \soc_inst|m0_1|u_logic|L5d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .lut_mask = 64'h0030003000000000;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P7d2z4~0 (
+// Location: LABCELL_X30_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~10 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P7d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Nsk2z4~q  ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~10_combout  = ( \soc_inst|m0_1|u_logic|Bsy2z4~q  & ( \soc_inst|m0_1|u_logic|P0hwx4~3_combout  & ( (\soc_inst|m0_1|u_logic|My6wx4~0_combout  & !\soc_inst|m0_1|u_logic|Pty2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bsy2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|P0hwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Pty2z4~q  & (\soc_inst|m0_1|u_logic|My6wx4~0_combout )) # (\soc_inst|m0_1|u_logic|Pty2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ))) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|P0hwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P7d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~10_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|m0_1|u_logic|P7d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .lut_mask = 64'h000000003F303030;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L7fwx4~0 (
+// Location: LABCELL_X33_Y11_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~11 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L7fwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~q  & \soc_inst|m0_1|u_logic|O5t2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~11_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~9_combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~10_combout  & ( (!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Kzxvx4~combout ) # 
+// (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bfgwx4~9_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~10_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L7fwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~11_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .lut_mask = 64'h00F000F000000000;
-defparam \soc_inst|m0_1|u_logic|L7fwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .lut_mask = 64'h0000FEFE00000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y17_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~2 (
+// Location: LABCELL_X30_Y10_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrsvx4~2_combout  = ( \soc_inst|m0_1|u_logic|L7fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout  & (!\soc_inst|m0_1|u_logic|L5d2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ju5wx4~combout ) # (!\soc_inst|m0_1|u_logic|P7d2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|L5d2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ju5wx4~combout ) # (!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|L7fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|L5d2z4~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|L7fwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|L5d2z4~0_combout  ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|I0hwx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Ahhwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|I0hwx4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Z5d2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|L5d2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P7d2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|L7fwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Ahhwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .lut_mask = 64'hCCCC8888CCC08880;
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .lut_mask = 64'h0005000533373337;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Aekwx4~0 (
+// Location: MLABCELL_X34_Y11_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Aekwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (\soc_inst|m0_1|u_logic|Ju5wx4~combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~3_combout  = ( !\soc_inst|m0_1|u_logic|Bfgwx4~2_combout  & ( \soc_inst|m0_1|u_logic|Qsewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Swy2z4~q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Bfgwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Qsewx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Bfgwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qsewx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .lut_mask = 64'h5050505000000000;
-defparam \soc_inst|m0_1|u_logic|Aekwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .lut_mask = 64'hFFFF0000FEFE0000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|O3d2z4~0 (
+// Location: LABCELL_X30_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Thgwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|O3d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~q  & ( (!\soc_inst|m0_1|u_logic|Ffj2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|A4t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Thgwx4~0_combout  = ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Fuhwx4~0_combout  & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Qem2z4~q 
+// ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Fuhwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|O3d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Thgwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .lut_mask = 64'h00000000A000A000;
-defparam \soc_inst|m0_1|u_logic|O3d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .lut_mask = 64'h0000000000010001;
+defparam \soc_inst|m0_1|u_logic|Thgwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~1 (
+// Location: LABCELL_X30_Y11_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mhgwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrsvx4~1_combout  = ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|O76wx4~combout ) # 
-// ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & 
-// ((!\soc_inst|m0_1|u_logic|O76wx4~combout ) # ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Npk2z4~q 
-//  & (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|O76wx4~combout ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|A0zvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|O3d2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|O76wx4~combout ) # ((\soc_inst|m0_1|u_logic|Npk2z4~q ) # (\soc_inst|m0_1|u_logic|Nsk2z4~q )))) ) ) )
+// \soc_inst|m0_1|u_logic|Mhgwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Mhgwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & (\soc_inst|m0_1|u_logic|Ukpvx4~combout  & !\soc_inst|m0_1|u_logic|U2x2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|O3d2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Ukpvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Mhgwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .lut_mask = 64'hBF00B000BF00BF00;
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .lut_mask = 64'h000000000C000C00;
+defparam \soc_inst|m0_1|u_logic|Mhgwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N6
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C4d2z4~0 (
+// Location: LABCELL_X30_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hahwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C4d2z4~0_combout  = ( \soc_inst|m0_1|u_logic|X77wx4~combout  & ( (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Sy2wx4~0_combout  & \soc_inst|m0_1|u_logic|Nsk2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Hahwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|C2yvx4~combout  & ((\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )))) # 
+// (\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|C2yvx4~combout  & \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|B73wx4~combout ))) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Sy2wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X77wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C4d2z4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Hahwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .lut_mask = 64'h0000000000030003;
-defparam \soc_inst|m0_1|u_logic|C4d2z4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .lut_mask = 64'h0537053700000000;
+defparam \soc_inst|m0_1|u_logic|Hahwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N48
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~3 (
+// Location: LABCELL_X30_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrsvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Mrsvx4~1_combout  & ( !\soc_inst|m0_1|u_logic|C4d2z4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G6d2z4~0_combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|Aekwx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Hahwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Thgwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mhgwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # 
+// (\soc_inst|m0_1|u_logic|S4w2z4~q )))) ) ) # ( !\soc_inst|m0_1|u_logic|Hahwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Thgwx4~0_combout  & !\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G6d2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~2_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Mrsvx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|C4d2z4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Thgwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mhgwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Hahwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .lut_mask = 64'h00000A0800000000;
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .lut_mask = 64'hC0C0C0C080C080C0;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y17_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mrsvx4~4 (
+// Location: MLABCELL_X34_Y11_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~18 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mrsvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|hprot_o~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~0_combout  & (\soc_inst|m0_1|u_logic|Mrsvx4~3_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|R8d2z4~0_combout )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & ( \soc_inst|m0_1|u_logic|hprot_o~0_combout  & ( (\soc_inst|m0_1|u_logic|Mrsvx4~0_combout  & 
-// (\soc_inst|m0_1|u_logic|Mrsvx4~3_combout  & !\soc_inst|m0_1|u_logic|R8d2z4~0_combout )) ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~18_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Bsy2z4~q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((\soc_inst|m0_1|u_logic|Pty2z4~q )))) # (\soc_inst|m0_1|u_logic|Bsy2z4~q  & 
+// (((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Pty2z4~q ))))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~q  & ( ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # (((\soc_inst|m0_1|u_logic|Px5wx4~combout 
+// ) # (\soc_inst|m0_1|u_logic|Pty2z4~q )) # (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|Bsy2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datab(!\soc_inst|m0_1|u_logic|Mrsvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mrsvx4~3_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|R8d2z4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|hprot_o~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Bsy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
+	.datag(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~18_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .lut_mask = 64'h0000000003000302;
-defparam \soc_inst|m0_1|u_logic|Mrsvx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .lut_mask = 64'hDDFADFFFFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~18 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|haddr_o~1 (
+// Location: LABCELL_X35_Y11_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P0hwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|haddr_o~1_combout  = ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~9_sumout  ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( \soc_inst|m0_1|u_logic|Add5~9_sumout  & ( 
-// (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// !\soc_inst|m0_1|u_logic|Q8zvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Add3~5_sumout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & 
-// (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & !\soc_inst|m0_1|u_logic|Q8zvx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|Add3~5_sumout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|K1wvx4~combout  & ( !\soc_inst|m0_1|u_logic|Add5~9_sumout  & ( (!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & 
-// ((!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout )))) # (\soc_inst|m0_1|u_logic|Mrsvx4~4_combout  & (((\soc_inst|m0_1|u_logic|Gzvvx4~2_combout  & !\soc_inst|m0_1|u_logic|Q8zvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Add3~5_sumout ))) ) ) )
+// \soc_inst|m0_1|u_logic|P0hwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Nqy2z4~q  & ( (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (!\soc_inst|m0_1|u_logic|Hyy2z4~q  & !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q 
+// ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mrsvx4~4_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gzvvx4~2_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Add3~5_sumout ),
-	.datad(!\soc_inst|m0_1|u_logic|Q8zvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|K1wvx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Add5~9_sumout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|P0hwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|haddr_o~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|haddr_o~1 .lut_mask = 64'h370537053705FFFF;
-defparam \soc_inst|m0_1|u_logic|haddr_o~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .lut_mask = 64'h0000000040004000;
+defparam \soc_inst|m0_1|u_logic|P0hwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N30
-cyclonev_lcell_comb \soc_inst|interconnect_1|LessThan0~0 (
+// Location: LABCELL_X35_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~4 (
 // Equation(s):
-// \soc_inst|interconnect_1|LessThan0~0_combout  = ( \soc_inst|m0_1|u_logic|haddr_o~0_combout  & ( !\soc_inst|m0_1|u_logic|haddr_o~1_combout  ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~4_combout  = ( \soc_inst|m0_1|u_logic|P0hwx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Bhewx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|P0hwx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & \soc_inst|m0_1|u_logic|Mk6wx4~0_combout )) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|m0_1|u_logic|haddr_o~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Mk6wx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|haddr_o~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|P0hwx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|LessThan0~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|LessThan0~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|LessThan0~0 .lut_mask = 64'h00000000FF00FF00;
-defparam \soc_inst|interconnect_1|LessThan0~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y15_N5
-dffeas \soc_inst|interconnect_1|mux_sel[0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|interconnect_1|LessThan0~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|interconnect_1|mux_sel [0]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|interconnect_1|mux_sel[0] .is_wysiwyg = "true";
-defparam \soc_inst|interconnect_1|mux_sel[0] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .lut_mask = 64'h000A000A333B333B;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N18
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[25]~1 (
+// Location: LABCELL_X29_Y11_N36
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~12 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[25]~1_combout  = ( \soc_inst|interconnect_1|mux_sel [1] & ( (!\soc_inst|interconnect_1|mux_sel [0] & !\soc_inst|interconnect_1|mux_sel [2]) ) ) # ( !\soc_inst|interconnect_1|mux_sel [1] & ( !\soc_inst|interconnect_1|mux_sel 
-// [0] $ (!\soc_inst|interconnect_1|mux_sel [2]) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~12_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~18_combout  & ( !\soc_inst|m0_1|u_logic|Bfgwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Bfgwx4~11_combout  & (\soc_inst|m0_1|u_logic|Bfgwx4~3_combout  & 
+// \soc_inst|m0_1|u_logic|Bfgwx4~1_combout )) ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|interconnect_1|mux_sel [0]),
-	.datac(!\soc_inst|interconnect_1|mux_sel [2]),
-	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|mux_sel [1]),
-	.dataf(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~11_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Bfgwx4~3_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Bfgwx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Bfgwx4~18_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~12_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[25]~1 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[25]~1 .lut_mask = 64'h3C3CC0C03C3CC0C0;
-defparam \soc_inst|interconnect_1|HRDATA[25]~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X43_Y16_N11
-dffeas \soc_inst|switches_1|switch_store[1][7] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\SW[7]~input_o ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|switches_1|always0~0_combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|switches_1|switch_store[1][7]~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|switches_1|switch_store[1][7] .is_wysiwyg = "true";
-defparam \soc_inst|switches_1|switch_store[1][7] .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .lut_mask = 64'h0000000500000000;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X43_Y16_N9
-cyclonev_lcell_comb \soc_inst|interconnect_1|HRDATA[23]~8 (
+// Location: LABCELL_X27_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4~17 (
 // Equation(s):
-// \soc_inst|interconnect_1|HRDATA[23]~8_combout  = ( \soc_inst|switches_1|switch_store[1][7]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout ) # 
-// (\soc_inst|interconnect_1|HRDATA[16]~7_combout ) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][7]~q  & ( \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & 
-// (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & ((!\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( \soc_inst|switches_1|switch_store[1][7]~q  & ( 
-// !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[16]~7_combout  & (!\soc_inst|interconnect_1|HRDATA[25]~1_combout )) # (\soc_inst|interconnect_1|HRDATA[16]~7_combout  & 
-// ((\soc_inst|interconnect_1|Equal1~0_combout ))) ) ) ) # ( !\soc_inst|switches_1|switch_store[1][7]~q  & ( !\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23  & ( (!\soc_inst|interconnect_1|HRDATA[25]~1_combout  & 
-// !\soc_inst|interconnect_1|HRDATA[16]~7_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~17_combout  = ( \soc_inst|m0_1|u_logic|Bfgwx4~16_combout  & ( \soc_inst|m0_1|u_logic|Bfgwx4~12_combout  & ( (!\soc_inst|m0_1|u_logic|Kugwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Itgwx4~0_combout ))) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[25]~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HRDATA[16]~7_combout ),
-	.datad(!\soc_inst|interconnect_1|Equal1~0_combout ),
-	.datae(!\soc_inst|switches_1|switch_store[1][7]~q ),
-	.dataf(!\soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a23 ),
+	.dataa(!\soc_inst|m0_1|u_logic|Kugwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Itgwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ptgwx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Bfgwx4~16_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Bfgwx4~12_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HRDATA[23]~8 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HRDATA[23]~8 .lut_mask = 64'hA0A0A0AFAFA0AFAF;
-defparam \soc_inst|interconnect_1|HRDATA[23]~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .lut_mask = 64'h000000000000A2A2;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y17_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tohvx4~0 (
+// Location: LABCELL_X24_Y15_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bfgwx4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Tohvx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( \soc_inst|interconnect_1|HRDATA[23]~8_combout  ) ) # ( \soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[23]~8_combout  ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Ueovx4~0_combout  & ( !\soc_inst|interconnect_1|HRDATA[23]~8_combout  ) )
+// \soc_inst|m0_1|u_logic|Bfgwx4~combout  = ( \soc_inst|m0_1|u_logic|A4t2z4~q  & ( (!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~q  & ( 
+// (!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ) # ((!\soc_inst|m0_1|u_logic|I0hwx4~1_combout  & \soc_inst|m0_1|u_logic|I0hwx4~0_combout ))) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Ueovx4~0_combout ),
-	.dataf(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bfgwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|I0hwx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Bfgwx4~17_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|I0hwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Tohvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .lut_mask = 64'hFFFFFFFFFFFF0000;
-defparam \soc_inst|m0_1|u_logic|Tohvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Bfgwx4 .lut_mask = 64'hFAFEFAFEFAFAFAFA;
+defparam \soc_inst|m0_1|u_logic|Bfgwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X52_Y17_N1
-dffeas \soc_inst|m0_1|u_logic|Sow2z4 (
+// Location: FF_X24_Y15_N34
+dffeas \soc_inst|m0_1|u_logic|Sgj2z4 (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Tohvx4~0_combout ),
+	.d(\soc_inst|m0_1|u_logic|Bfgwx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(\soc_inst|m0_1|u_logic|Bpsvx4~0_combout ),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Sow2z4~q ),
+	.q(\soc_inst|m0_1|u_logic|Sgj2z4~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Sow2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Sow2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Sgj2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Sgj2z4 .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y16_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~1 (
+// Location: LABCELL_X30_Y15_N21
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Huqvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6nvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sow2z4~q ) # (!\soc_inst|m0_1|u_logic|W4y2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wfovx4~combout 
-//  & ( \soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Sow2z4~q  ) ) ) # ( \soc_inst|m0_1|u_logic|Wfovx4~combout  & ( !\soc_inst|m0_1|u_logic|Pfovx4~0_combout  & ( !\soc_inst|m0_1|u_logic|W4y2z4~q  ) ) )
+// \soc_inst|m0_1|u_logic|Huqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~q  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sow2z4~q ),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|W4y2z4~q ),
-	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|Wfovx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Pfovx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6nvx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .lut_mask = 64'h0000F0F0AAAAFAFA;
-defparam \soc_inst|m0_1|u_logic|C6nvx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .lut_mask = 64'h0000000000FF00FF;
+defparam \soc_inst|m0_1|u_logic|Huqvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~0 (
+// Location: LABCELL_X29_Y12_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6nvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( (\soc_inst|interconnect_1|HRDATA[7]~11_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Scpvx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((\soc_inst|interconnect_1|HRDATA[7]~11_combout  & \soc_inst|m0_1|u_logic|Vapvx4~combout )) ) )
+// \soc_inst|m0_1|u_logic|Qllwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Y6t2z4~q  & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) # 
+// (\soc_inst|m0_1|u_logic|Huqvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Pkxvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Y6t2z4~q  & ( (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & !\soc_inst|m0_1|u_logic|Fjewx4~1_combout ) ) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[7]~11_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Huqvx4~0_combout ),
 	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Vapvx4~combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Scpvx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6nvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qllwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .lut_mask = 64'hF0F5F0F500550055;
-defparam \soc_inst|m0_1|u_logic|C6nvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .lut_mask = 64'h0000F0000000F555;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N9
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|C6nvx4~2 (
+// Location: LABCELL_X29_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|C6nvx4~2_combout  = ( !\soc_inst|m0_1|u_logic|C6nvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C6nvx4~1_combout  & ((!\soc_inst|interconnect_1|HRDATA[23]~8_combout ) # (!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|Qllwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( (\soc_inst|m0_1|u_logic|Q3xvx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ju5wx4~combout  & ( \soc_inst|m0_1|u_logic|Q3xvx4~1_combout  ) )
 
-	.dataa(!\soc_inst|interconnect_1|HRDATA[23]~8_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Qbpvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|C6nvx4~1_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Q3xvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|C6nvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ju5wx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qllwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .lut_mask = 64'hFA00FA0000000000;
-defparam \soc_inst|m0_1|u_logic|C6nvx4~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X51_Y18_N11
-dffeas \soc_inst|m0_1|u_logic|Nqy2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|C6nvx4~2_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nqy2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nqy2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .lut_mask = 64'h3333333333033303;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Askwx4~1 (
+// Location: LABCELL_X29_Y12_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Askwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )))) # 
-// (\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ))))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) ) # ( \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q  & ( 
-// ((!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & (((\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q )) # (\soc_inst|m0_1|u_logic|Nqy2z4~q )))) # (\soc_inst|m0_1|u_logic|Px5wx4~combout ) ) )
+// \soc_inst|m0_1|u_logic|Qllwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Qllwx4~2_combout  & ( (\soc_inst|m0_1|u_logic|Bkxvx4~combout  & ((!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Px5wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datag(!\soc_inst|m0_1|u_logic|Ugewx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Bkxvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Qllwx4~2_combout ),
+	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Askwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qllwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Askwx4~1 .extended_lut = "on";
-defparam \soc_inst|m0_1|u_logic|Askwx4~1 .lut_mask = 64'hBBFF7733FFF37F33;
-defparam \soc_inst|m0_1|u_logic|Askwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .lut_mask = 64'h000000000F0B0F0B;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Pikwx4~0 (
+// Location: LABCELL_X30_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qllwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Pikwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Wdxvx4~0_combout  & (((\soc_inst|m0_1|u_logic|Sgj2z4~q  & \soc_inst|m0_1|u_logic|O76wx4~combout )) # (\soc_inst|m0_1|u_logic|M66wx4~combout 
-// ))) ) ) # ( !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|O76wx4~combout  & \soc_inst|m0_1|u_logic|Wdxvx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Qllwx4~4_combout  = ( \soc_inst|interconnect_1|HREADY~0_combout  & ( ((!\soc_inst|m0_1|u_logic|Qllwx4~3_combout ) # ((\soc_inst|m0_1|u_logic|Qem2z4~q  & \soc_inst|m0_1|u_logic|Qllwx4~0_combout ))) # 
+// (\soc_inst|m0_1|u_logic|Qllwx4~1_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Wdxvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|M66wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qllwx4~1_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qllwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Qllwx4~3_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|interconnect_1|HREADY~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Pikwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .lut_mask = 64'h01010101010F010F;
-defparam \soc_inst|m0_1|u_logic|Pikwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .lut_mask = 64'h00000000FF57FF57;
+defparam \soc_inst|m0_1|u_logic|Qllwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~1 (
+// Location: LABCELL_X31_Y13_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mkkwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Jp3wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (\soc_inst|m0_1|u_logic|Qp3wx4~0_combout  & !\soc_inst|m0_1|u_logic|L8t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Wfhvx4~1_combout  = ( \soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ) ) ) # ( !\soc_inst|m0_1|u_logic|Fyrwx4~1_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|Nqy2z4~q ) # ((!\soc_inst|m0_1|u_logic|Qslwx4~0_combout  & !\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Qp3wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qslwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Jp3wx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Fyrwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .lut_mask = 64'h000000000C000C00;
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .lut_mask = 64'hF8F8F8F888888888;
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y20_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~2 (
+// Location: MLABCELL_X28_Y15_N57
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mkkwx4~2_combout  = ( !\soc_inst|m0_1|u_logic|Emewx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Jppvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Wfhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & \soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Jppvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Emewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .lut_mask = 64'h3000300000000000;
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .lut_mask = 64'h00000000000F000F;
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~7 (
+// Location: MLABCELL_X28_Y15_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Wfhvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~7_combout  = ( \soc_inst|m0_1|u_logic|Unewx4~combout  & ( (!\soc_inst|m0_1|u_logic|Mkkwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fij2z4~q )))) ) )
+// \soc_inst|m0_1|u_logic|Wfhvx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wfhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & ((\soc_inst|m0_1|u_logic|K9z2z4~q ))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Wfhvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & (((\soc_inst|m0_1|u_logic|K9z2z4~q )))) # (\soc_inst|m0_1|u_logic|Qllwx4~4_combout  & 
+// (!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout  & ((\soc_inst|m0_1|u_logic|K9z2z4~q ) # (\soc_inst|m0_1|u_logic|Cllwx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Mkkwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Mkkwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qllwx4~4_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Cllwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Wfhvx4~1_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Unewx4~combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Wfhvx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~7_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .lut_mask = 64'h00000000AA8AAA8A;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~7 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .lut_mask = 64'h10FA10FA50FA50FA;
+defparam \soc_inst|m0_1|u_logic|Wfhvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y23_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Askwx4~0 (
+// Location: FF_X28_Y15_N55
+dffeas \soc_inst|m0_1|u_logic|K9z2z4 (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Wfhvx4~2_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|m0_1|u_logic|K9z2z4 .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|K9z2z4 .power_up = "low";
+// synopsys translate_on
+
+// Location: MLABCELL_X28_Y14_N9
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjewx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Askwx4~0_combout  = ( \soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|P0hwx4~1_combout  & ((\soc_inst|m0_1|u_logic|V1yvx4~0_combout ) # (\soc_inst|m0_1|u_logic|Xhxvx4~combout 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|G27wx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Swy2z4~q  & (\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & \soc_inst|m0_1|u_logic|P0hwx4~1_combout )) ) )
+// \soc_inst|m0_1|u_logic|Fjewx4~0_combout  = ( \soc_inst|m0_1|u_logic|C3z2z4~q  & ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( (!\soc_inst|m0_1|u_logic|K1z2z4~q  & (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q )) # 
+// (\soc_inst|m0_1|u_logic|K1z2z4~q  & ((\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|C3z2z4~q  & ( \soc_inst|m0_1|u_logic|Auk2z4~q  & ( (\soc_inst|m0_1|u_logic|K1z2z4~q  & 
+// (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q )) ) ) ) # ( \soc_inst|m0_1|u_logic|C3z2z4~q  & ( !\soc_inst|m0_1|u_logic|Auk2z4~q  & ( (\soc_inst|m0_1|u_logic|K1z2z4~q  & (\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q  
+// & \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Xhxvx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P0hwx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K1z2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE_q ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|C3z2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Auk2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Askwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjewx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Askwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Askwx4~0 .lut_mask = 64'h000A000A002A002A;
-defparam \soc_inst|m0_1|u_logic|Askwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .lut_mask = 64'h0000010101011717;
+defparam \soc_inst|m0_1|u_logic|Fjewx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~8 (
+// Location: MLABCELL_X25_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fjewx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~8_combout  = ( \soc_inst|m0_1|u_logic|Askwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Askwx4~1_combout  & (!\soc_inst|m0_1|u_logic|Pikwx4~0_combout  & (!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & 
-// \soc_inst|m0_1|u_logic|T6kwx4~7_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Askwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Pikwx4~0_combout  & (\soc_inst|m0_1|u_logic|T6kwx4~7_combout  & ((\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ) # 
-// (\soc_inst|m0_1|u_logic|Askwx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Fjewx4~1_combout  = ( \soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|K9z2z4~q  & ((!\soc_inst|m0_1|u_logic|I6z2z4~q ) # 
+// (!\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ))) # (\soc_inst|m0_1|u_logic|K9z2z4~q  & (!\soc_inst|m0_1|u_logic|I6z2z4~q  & !\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ))) ) ) # ( !\soc_inst|m0_1|u_logic|Qtrwx4~0_combout  & ( 
+// (!\soc_inst|m0_1|u_logic|K9z2z4~q ) # ((!\soc_inst|m0_1|u_logic|I6z2z4~q ) # ((!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ) # (!\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Askwx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pikwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|T6kwx4~7_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|K9z2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|I6z2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Askwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qtrwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~8_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .lut_mask = 64'h004C004C00400040;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~8 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .lut_mask = 64'hFFFEFFFEFEF8FEF8;
+defparam \soc_inst|m0_1|u_logic|Fjewx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkkwx4~0 (
+// Location: LABCELL_X29_Y11_N51
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Tsjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fkkwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( \soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # 
-// (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ))) ) ) ) # ( \soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|G27wx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Wpkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (!\soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) ) )
+// \soc_inst|m0_1|u_logic|Tsjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Fjewx4~1_combout  & (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & !\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
 	.datab(gnd),
 	.datac(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|Wpkwx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE_q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .lut_mask = 64'hFAFAFAFA00FA0000;
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|m0_1|u_logic|Tsjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y23_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Fkkwx4~1 (
+// Location: MLABCELL_X28_Y11_N27
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Krjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Fkkwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Fkkwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Gokwx4~0_combout  & (\soc_inst|m0_1|u_logic|Qdj2z4~q  & 
-// \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Fkkwx4~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Krjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|G9w2z4~q ) # ((!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wkxvx4~0_combout )) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Zzfwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Wkxvx4~0_combout ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Gokwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|G9w2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Wkxvx4~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Fkkwx4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Zzfwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Krjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .lut_mask = 64'hFFFF000001010000;
-defparam \soc_inst|m0_1|u_logic|Fkkwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .lut_mask = 64'h0A0A0A0ACECECECE;
+defparam \soc_inst|m0_1|u_logic|Krjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N57
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~0 (
+// Location: LABCELL_X27_Y13_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|X8kwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Ark2z4~q ) # (!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Orewx4~0_combout  & ((\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Ffj2z4~q  & ( (\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Orewx4~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Ark2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE_q ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Orewx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|X8kwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Ffj2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .lut_mask = 64'hFFFCFFFC00000000;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .lut_mask = 64'h0033003300770077;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X52_Y23_N15
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Hekwx4~0 (
+// Location: LABCELL_X29_Y11_N0
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Hekwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Qem2z4~q  ) ) # ( !\soc_inst|m0_1|u_logic|Nkpvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|My6wx4~1_combout  & 
-// (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qem2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( \soc_inst|m0_1|u_logic|Egkwx4~0_combout  ) ) ) # ( !\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Kzxvx4~combout  & ( 
+// \soc_inst|m0_1|u_logic|Egkwx4~0_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Nkpvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Kzxvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Hekwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .lut_mask = 64'h05000500FF00FF00;
-defparam \soc_inst|m0_1|u_logic|Hekwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .lut_mask = 64'h3333000033330A0A;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N51
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~2 (
+// Location: LABCELL_X29_Y11_N30
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|D5kwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Uv6wx4~combout  & ( ((!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ))) # 
-// (\soc_inst|m0_1|u_logic|Sgj2z4~q ) ) )
+// \soc_inst|m0_1|u_logic|D5kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// ((!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & 
+// (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q )) ) ) ) # ( !\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & 
+// \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Keiwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Uv6wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datae(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~2_combout ),
+	.combout(\soc_inst|m0_1|u_logic|D5kwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .lut_mask = 64'h00000000FFFDFFFD;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~2 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .lut_mask = 64'h00CC000044004404;
+defparam \soc_inst|m0_1|u_logic|D5kwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y21_N54
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~3 (
+// Location: LABCELL_X29_Y11_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Hekwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T6kwx4~2_combout  & ( ((\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q )) # 
-// (\soc_inst|m0_1|u_logic|L8t2z4~q ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Hekwx4~0_combout  & ( \soc_inst|m0_1|u_logic|T6kwx4~2_combout  ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5kwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Amjwx4~2_combout  & ((!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # 
+// (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Srgwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|D5kwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Amjwx4~2_combout  ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|L8t2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|Hekwx4~0_combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Amjwx4~2_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Srgwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|D5kwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~3_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .lut_mask = 64'h00000000FFFF5FFF;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~3 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .lut_mask = 64'hF0F0B0B000000000;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y23_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Bbkwx4~0 (
+// Location: LABCELL_X30_Y10_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~4 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Bbkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|My6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qem2z4~q )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # ((\soc_inst|m0_1|u_logic|My6wx4~0_combout  & (!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Qem2z4~q ))) ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~4_combout  = ( !\soc_inst|m0_1|u_logic|Amjwx4~1_combout  & ( \soc_inst|m0_1|u_logic|Amjwx4~3_combout  & ( (!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Y6t2z4~q )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|My6wx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE_q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pkxvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Y6t2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Amjwx4~1_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Amjwx4~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Bbkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .lut_mask = 64'hFF40FF4040404040;
-defparam \soc_inst|m0_1|u_logic|Bbkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .lut_mask = 64'h00000000FFFC0000;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~1 (
+// Location: LABCELL_X30_Y11_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4~5 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~1_combout  = ( \soc_inst|m0_1|u_logic|Bbkwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|C2yvx4~combout  & (\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )))) # 
-// (\soc_inst|m0_1|u_logic|C2yvx4~combout  & (((\soc_inst|m0_1|u_logic|H5fwx4~0_combout  & !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Iikwx4~0_combout ))) ) ) # ( !\soc_inst|m0_1|u_logic|Bbkwx4~0_combout  & ( 
-// (\soc_inst|m0_1|u_logic|C2yvx4~combout  & \soc_inst|m0_1|u_logic|Iikwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~5_combout  = ( \soc_inst|m0_1|u_logic|Amjwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|Amjwx4~0_combout  & (!\soc_inst|m0_1|u_logic|Mkrwx4~combout  & ((!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|V1yvx4~0_combout )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
-	.datab(!\soc_inst|m0_1|u_logic|H5fwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Iikwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Amjwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Gpjwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Mkrwx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bbkwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Amjwx4~4_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~1_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~5_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .lut_mask = 64'h0505050537053705;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~1 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .lut_mask = 64'h0000000050405040;
+defparam \soc_inst|m0_1|u_logic|Amjwx4~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N21
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Mkkwx4~0 (
+// Location: LABCELL_X31_Y10_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|E2kwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Mkkwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Npk2z4~q  & ( (\soc_inst|m0_1|u_logic|Sgj2z4~q  & (\soc_inst|m0_1|u_logic|O76wx4~combout  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) ) ) # ( !\soc_inst|m0_1|u_logic|Npk2z4~q  & ( 
-// (\soc_inst|m0_1|u_logic|O76wx4~combout  & (((\soc_inst|m0_1|u_logic|Sgj2z4~q  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) # (\soc_inst|m0_1|u_logic|G97wx4~0_combout ))) ) )
+// \soc_inst|m0_1|u_logic|E2kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Qem2z4~q ) # ((!\soc_inst|m0_1|u_logic|Dvy2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & ((!\soc_inst|m0_1|u_logic|Dvy2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Pty2z4~q )))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (\soc_inst|m0_1|u_logic|Dvy2z4~q  & (\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qem2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Pty2z4~q ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|O76wx4~combout ),
-	.datac(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Npk2z4~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Dvy2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|Pty2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|E2kwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .lut_mask = 64'h1303130311001100;
-defparam \soc_inst|m0_1|u_logic|Mkkwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .lut_mask = 64'h0100020300003230;
+defparam \soc_inst|m0_1|u_logic|E2kwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N45
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q8kwx4~0 (
+// Location: LABCELL_X31_Y10_N48
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Q8kwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|Nqy2z4~q ) ) ) # ( !\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q  & ( 
-// (\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Nqy2z4~q  & \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q )) ) )
+// \soc_inst|m0_1|u_logic|Htjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( \soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|H9i2z4~q  & (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|Hyy2z4~q ) # 
+// (\soc_inst|m0_1|u_logic|Qem2z4~q )))) ) ) ) # ( \soc_inst|m0_1|u_logic|Wvewx4~0_combout  & ( !\soc_inst|m0_1|u_logic|G27wx4~1_combout  & ( (\soc_inst|m0_1|u_logic|Qem2z4~q  & (\soc_inst|m0_1|u_logic|H9i2z4~q  & \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q )) 
+// ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE_q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Nqy2z4~q ),
-	.datad(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.datae(!\soc_inst|m0_1|u_logic|Wvewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|G27wx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Q8kwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .lut_mask = 64'h0005000505050505;
-defparam \soc_inst|m0_1|u_logic|Q8kwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .lut_mask = 64'h0000010100000301;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X53_Y22_N36
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~4 (
+// Location: LABCELL_X31_Y10_N33
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~1 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~4_combout  = ( \soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Q8kwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & 
-// !\soc_inst|m0_1|u_logic|Lgkwx4~0_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|Bhewx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Egkwx4~0_combout  & !\soc_inst|m0_1|u_logic|Lgkwx4~0_combout )) ) )
+// \soc_inst|m0_1|u_logic|Htjwx4~1_combout  = ( !\soc_inst|m0_1|u_logic|Htjwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Howvx4~0_combout ) # ((\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ) # (\soc_inst|m0_1|u_logic|Zzb2z4~0_combout )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Egkwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Q8kwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z9dwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Lgkwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Howvx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Zzb2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Bhewx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Htjwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~4_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htjwx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .lut_mask = 64'hFAF0FAF0C8C0C8C0;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~4 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .lut_mask = 64'hAFFFAFFF00000000;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y22_N18
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~5 (
+// Location: LABCELL_X31_Y10_N6
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~5_combout  = ( \soc_inst|m0_1|u_logic|T6kwx4~4_combout  & ( (\soc_inst|m0_1|u_logic|T6kwx4~3_combout  & (!\soc_inst|m0_1|u_logic|T6kwx4~1_combout  & ((!\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fjewx4~1_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Htjwx4~2_combout  = ( \soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Htjwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|E2kwx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ))) ) ) ) # ( !\soc_inst|m0_1|u_logic|Wdqvx4~0_combout  & ( \soc_inst|m0_1|u_logic|Htjwx4~1_combout  & ( (!\soc_inst|m0_1|u_logic|E2kwx4~0_combout ) # (!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|T6kwx4~3_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|T6kwx4~1_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Mkkwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~4_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|E2kwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Xiwvx4~0_combout ),
+	.datac(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|Xkfwx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Htjwx4~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~5_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htjwx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .lut_mask = 64'h0000000040444044;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~5 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .lut_mask = 64'h00000000EEEEEE00;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y20_N3
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|T6kwx4~6 (
+// Location: LABCELL_X33_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Zvjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|T6kwx4~6_combout  = ( \soc_inst|m0_1|u_logic|T6kwx4~5_combout  & ( (\soc_inst|m0_1|u_logic|V76wx4~1_combout  & (\soc_inst|m0_1|u_logic|T6kwx4~0_combout  & ((!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ) # 
-// (!\soc_inst|m0_1|u_logic|Aekwx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Zvjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|R3fwx4~0_combout  & ( \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  ) ) # ( !\soc_inst|m0_1|u_logic|R3fwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q  & 
+// (((\soc_inst|m0_1|u_logic|M4fwx4~0_combout  & \soc_inst|m0_1|u_logic|G27wx4~2_combout )) # (\soc_inst|m0_1|u_logic|H9i2z4~q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|V76wx4~1_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Wdqvx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|T6kwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Aekwx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|M4fwx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datad(!\soc_inst|m0_1|u_logic|G27wx4~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|R3fwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|T6kwx4~6_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .lut_mask = 64'h0000000005040504;
-defparam \soc_inst|m0_1|u_logic|T6kwx4~6 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .lut_mask = 64'h0515051555555555;
+defparam \soc_inst|m0_1|u_logic|Zvjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y19_N30
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ruhvx4~0 (
+// Location: LABCELL_X33_Y12_N18
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Xujwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ruhvx4~0_combout  = ( \soc_inst|m0_1|u_logic|T6kwx4~6_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout  & (\soc_inst|m0_1|u_logic|Nsk2z4~q  & ((!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ) # 
-// (\soc_inst|m0_1|u_logic|Fkkwx4~1_combout )))) # (\soc_inst|interconnect_1|HREADY~0_combout  & (((!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ) # (\soc_inst|m0_1|u_logic|Fkkwx4~1_combout )))) ) ) # ( !\soc_inst|m0_1|u_logic|T6kwx4~6_combout  & ( 
-// (\soc_inst|m0_1|u_logic|Nsk2z4~q ) # (\soc_inst|interconnect_1|HREADY~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Xujwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Zvjwx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|V1yvx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Zvjwx4~0_combout  & ( 
+// (\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q  & (\soc_inst|m0_1|u_logic|V1yvx4~0_combout  & \soc_inst|m0_1|u_logic|My6wx4~1_combout ))) ) )
 
-	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|T6kwx4~8_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|Fkkwx4~1_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|V1yvx4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|My6wx4~1_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|T6kwx4~6_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Zvjwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Xujwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .lut_mask = 64'h7777777770777077;
-defparam \soc_inst|m0_1|u_logic|Ruhvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y19_N16
-dffeas \soc_inst|m0_1|u_logic|Nsk2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ruhvx4~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nsk2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Nsk2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .lut_mask = 64'h0001000103030303;
+defparam \soc_inst|m0_1|u_logic|Xujwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|G1mwx4~0 (
+// Location: MLABCELL_X34_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Htjwx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|G1mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & ((!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ) # (!\soc_inst|m0_1|u_logic|O5t2z4~q 
-// )))) ) ) # ( !\soc_inst|m0_1|u_logic|B73wx4~combout  & ( (!\soc_inst|m0_1|u_logic|Nsk2z4~q  & (\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|O5t2z4~q )) ) )
+// \soc_inst|m0_1|u_logic|Htjwx4~3_combout  = ( \soc_inst|m0_1|u_logic|Htjwx4~2_combout  & ( !\soc_inst|m0_1|u_logic|Xujwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ) # 
+// (!\soc_inst|m0_1|u_logic|Fjewx4~1_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
-	.datab(!\soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE_q ),
-	.datac(!\soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|B73wx4~combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ncqvx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|A0zvx4~0_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Fjewx4~1_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|m0_1|u_logic|Htjwx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Xujwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|G1mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Htjwx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .lut_mask = 64'h0A000A000A080A08;
-defparam \soc_inst|m0_1|u_logic|G1mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .lut_mask = 64'h0000FEFE00000000;
+defparam \soc_inst|m0_1|u_logic|Htjwx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X47_Y22_N42
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|P2mwx4~0 (
+// Location: LABCELL_X35_Y12_N24
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Qujwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|P2mwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (!\soc_inst|m0_1|u_logic|O5t2z4~q  & !\soc_inst|m0_1|u_logic|B1vvx4~0_combout )) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Qaqvx4~0_combout  & ( (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & (!\soc_inst|m0_1|u_logic|B1vvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|O5t2z4~q ) # (\soc_inst|m0_1|u_logic|G97wx4~0_combout )))) ) )
+// \soc_inst|m0_1|u_logic|Qujwx4~0_combout  = ( !\soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # (((!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ) # (\soc_inst|m0_1|u_logic|U2x2z4~q )) # 
+// (\soc_inst|m0_1|u_logic|G27wx4~0_combout ))) ) ) # ( \soc_inst|m0_1|u_logic|Hyy2z4~q  & ( (!\soc_inst|m0_1|u_logic|H9i2z4~q ) # ((!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ) # ((!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ) # 
+// ((!\soc_inst|m0_1|u_logic|U2x2z4~q )))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|O5t2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Qaqvx4~0_combout ),
-	.datag(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|H9i2z4~q ),
+	.datab(!\soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE_q ),
+	.datac(!\soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Jm6wx4~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Hyy2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|U2x2z4~q ),
+	.datag(!\soc_inst|m0_1|u_logic|G27wx4~0_combout ),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|P2mwx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Qujwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .lut_mask = 64'h4050405040404040;
-defparam \soc_inst|m0_1|u_logic|P2mwx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .extended_lut = "on";
+defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .lut_mask = 64'hFFEFFFFFFFFFFEFE;
+defparam \soc_inst|m0_1|u_logic|Qujwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y22_N0
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|hwrite_o~0 (
+// Location: MLABCELL_X34_Y12_N12
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Drjwx4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|hwrite_o~0_combout  = ( \soc_inst|m0_1|u_logic|Pa7wx4~0_combout  & ( (((\soc_inst|m0_1|u_logic|P2mwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z0mwx4~0_combout )) # (\soc_inst|m0_1|u_logic|I2mwx4~0_combout )) # 
-// (\soc_inst|m0_1|u_logic|G1mwx4~0_combout ) ) ) # ( !\soc_inst|m0_1|u_logic|Pa7wx4~0_combout  & ( ((\soc_inst|m0_1|u_logic|P2mwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Z0mwx4~0_combout )) # (\soc_inst|m0_1|u_logic|I2mwx4~0_combout ) ) )
+// \soc_inst|m0_1|u_logic|Drjwx4~0_combout  = ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( \soc_inst|m0_1|u_logic|Qujwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q  & !\soc_inst|m0_1|u_logic|Htjwx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( 
+// \soc_inst|m0_1|u_logic|Qujwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q  & !\soc_inst|m0_1|u_logic|Htjwx4~3_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Qujwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q  & 
+// !\soc_inst|m0_1|u_logic|Htjwx4~3_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|Qem2z4~q  & ( !\soc_inst|m0_1|u_logic|Qujwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|A4t2z4~q  & ((!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ) # 
+// (!\soc_inst|m0_1|u_logic|Htjwx4~3_combout ))) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|G1mwx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|I2mwx4~0_combout ),
-	.datac(!\soc_inst|m0_1|u_logic|Z0mwx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|P2mwx4~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Pa7wx4~0_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE_q ),
+	.datad(!\soc_inst|m0_1|u_logic|Htjwx4~3_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Qem2z4~q ),
+	.dataf(!\soc_inst|m0_1|u_logic|Qujwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Drjwx4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .lut_mask = 64'h3FFF3FFF7FFF7FFF;
-defparam \soc_inst|m0_1|u_logic|hwrite_o~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .lut_mask = 64'hAAA0AA00AA00AA00;
+defparam \soc_inst|m0_1|u_logic|Drjwx4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X40_Y16_N15
-cyclonev_lcell_comb \soc_inst|ram_1|write_cycle~0 (
+// Location: LABCELL_X22_Y11_N54
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Amjwx4 (
 // Equation(s):
-// \soc_inst|ram_1|write_cycle~0_combout  = ( \soc_inst|ram_1|always1~0_combout  & ( \soc_inst|m0_1|u_logic|hwrite_o~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Amjwx4~combout  = ( \soc_inst|m0_1|u_logic|Amjwx4~5_combout  & ( \soc_inst|m0_1|u_logic|Drjwx4~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Amjwx4~5_combout  & ( \soc_inst|m0_1|u_logic|Drjwx4~0_combout  ) ) # ( 
+// \soc_inst|m0_1|u_logic|Amjwx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Drjwx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Fij2z4~q  & ((\soc_inst|m0_1|u_logic|Krjwx4~0_combout ) # (\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ))) ) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Amjwx4~5_combout  & ( !\soc_inst|m0_1|u_logic|Drjwx4~0_combout  ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
-	.datab(gnd),
-	.datac(gnd),
+	.dataa(!\soc_inst|m0_1|u_logic|Tsjwx4~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Fij2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|Krjwx4~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|ram_1|always1~0_combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Amjwx4~5_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|Drjwx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|ram_1|write_cycle~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|ram_1|write_cycle~0 .extended_lut = "off";
-defparam \soc_inst|ram_1|write_cycle~0 .lut_mask = 64'h0000000055555555;
-defparam \soc_inst|ram_1|write_cycle~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Amjwx4 .lut_mask = 64'hFFFF4C4CFFFFFFFF;
+defparam \soc_inst|m0_1|u_logic|Amjwx4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X40_Y16_N16
-dffeas \soc_inst|ram_1|write_cycle (
+// Location: FF_X24_Y15_N5
+dffeas \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|ram_1|write_cycle~0_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|Amjwx4~combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+	.sload(vcc),
+	.ena(\soc_inst|interconnect_1|HREADY~0_combout ),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|ram_1|write_cycle~q ),
+	.q(\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|ram_1|write_cycle .is_wysiwyg = "true";
-defparam \soc_inst|ram_1|write_cycle .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y14_N24
-cyclonev_lcell_comb \soc_inst|interconnect_1|HREADY~0 (
+// Location: LABCELL_X24_Y12_N42
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~1 (
 // Equation(s):
-// \soc_inst|interconnect_1|HREADY~0_combout  = ( \soc_inst|interconnect_1|mux_sel [1] & ( \soc_inst|interconnect_1|mux_sel [2] ) ) # ( !\soc_inst|interconnect_1|mux_sel [1] & ( \soc_inst|interconnect_1|mux_sel [2] ) ) # ( \soc_inst|interconnect_1|mux_sel 
-// [1] & ( !\soc_inst|interconnect_1|mux_sel [2] ) ) # ( !\soc_inst|interconnect_1|mux_sel [1] & ( !\soc_inst|interconnect_1|mux_sel [2] & ( (!\soc_inst|ram_1|write_cycle~q ) # (!\soc_inst|interconnect_1|mux_sel [0]) ) ) )
+// \soc_inst|m0_1|u_logic|Z5pvx4~1_combout  = ( \soc_inst|m0_1|u_logic|G97wx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q  & \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ) ) )
 
-	.dataa(!\soc_inst|ram_1|write_cycle~q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|mux_sel [0]),
+	.datac(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datad(gnd),
-	.datae(!\soc_inst|interconnect_1|mux_sel [1]),
-	.dataf(!\soc_inst|interconnect_1|mux_sel [2]),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|G97wx4~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|interconnect_1|HREADY~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|interconnect_1|HREADY~0 .extended_lut = "off";
-defparam \soc_inst|interconnect_1|HREADY~0 .lut_mask = 64'hFAFAFFFFFFFFFFFF;
-defparam \soc_inst|interconnect_1|HREADY~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .lut_mask = 64'h000000000A0A0A0A;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y19_N24
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Nxqvx4~0 (
+// Location: LABCELL_X24_Y12_N3
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Q5c2z4~0 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Nxqvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Mtqvx4~combout  ) # ( !\soc_inst|m0_1|u_logic|Mtqvx4~combout  & ( !\soc_inst|interconnect_1|HREADY~0_combout  ) )
+// \soc_inst|m0_1|u_logic|Q5c2z4~0_combout  = ( \soc_inst|m0_1|u_logic|Socwx4~0_combout  & ( !\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q  & ( (\soc_inst|m0_1|u_logic|Nsk2z4~q  & \soc_inst|m0_1|u_logic|A4t2z4~q ) ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|Nsk2z4~q ),
+	.datac(!\soc_inst|m0_1|u_logic|A4t2z4~q ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|m0_1|u_logic|Mtqvx4~combout ),
+	.datae(!\soc_inst|m0_1|u_logic|Socwx4~0_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Q5c2z4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .lut_mask = 64'hF0F0F0F0FFFFFFFF;
-defparam \soc_inst|m0_1|u_logic|Nxqvx4~0 .shared_arith = "off";
+defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .lut_mask = 64'h0000030300000000;
+defparam \soc_inst|m0_1|u_logic|Q5c2z4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X50_Y18_N12
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|L8mvx4~0 (
+// Location: MLABCELL_X25_Y12_N15
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~2 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|L8mvx4~0_combout  = ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout )) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) 
-// ) ) # ( !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( \soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ) ) ) ) # ( \soc_inst|m0_1|u_logic|Cam2z4~q  & ( 
-// !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout ))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ) ) ) ) # ( 
-// !\soc_inst|m0_1|u_logic|Cam2z4~q  & ( !\soc_inst|m0_1|u_logic|U0vvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & ((!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ) # ((!\soc_inst|m0_1|u_logic|Gtp2z4~q  & \soc_inst|m0_1|u_logic|H1rvx4~0_combout 
-// )))) # (\soc_inst|m0_1|u_logic|Nxqvx4~0_combout  & (!\soc_inst|m0_1|u_logic|Gtp2z4~q  & ((\soc_inst|m0_1|u_logic|H1rvx4~0_combout )))) ) ) )
+// \soc_inst|m0_1|u_logic|Z5pvx4~2_combout  = ( \soc_inst|m0_1|u_logic|C2yvx4~combout  & ( (\soc_inst|m0_1|u_logic|Bxcwx4~0_combout  & (\soc_inst|m0_1|u_logic|Hdh2z4~0_combout  & \soc_inst|m0_1|u_logic|S4w2z4~q )) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Nxqvx4~0_combout ),
-	.datab(!\soc_inst|m0_1|u_logic|Gtp2z4~q ),
-	.datac(!\soc_inst|m0_1|u_logic|B1vvx4~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|H1rvx4~0_combout ),
-	.datae(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|U0vvx4~2_combout ),
+	.dataa(!\soc_inst|m0_1|u_logic|Bxcwx4~0_combout ),
+	.datab(gnd),
+	.datac(!\soc_inst|m0_1|u_logic|Hdh2z4~0_combout ),
+	.datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|C2yvx4~combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z5pvx4~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .lut_mask = 64'hA0ECF5FD00CC55DD;
-defparam \soc_inst|m0_1|u_logic|L8mvx4~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X50_Y18_N14
-dffeas \soc_inst|m0_1|u_logic|Cam2z4 (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|L8mvx4~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Cam2z4 .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|Cam2z4 .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X48_Y20_N39
-cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Ye4wx4 (
+// Location: LABCELL_X24_Y12_N39
+cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~3 (
 // Equation(s):
-// \soc_inst|m0_1|u_logic|Ye4wx4~combout  = ( !\soc_inst|m0_1|u_logic|G0w2z4~q  & ( !\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q  & ( (!\soc_inst|m0_1|u_logic|Cam2z4~q  & (!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q  & !\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q 
-// )) ) ) )
+// \soc_inst|m0_1|u_logic|Z5pvx4~3_combout  = ( \soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  & ((!\soc_inst|m0_1|u_logic|Pcyvx4~combout ) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) ) # ( 
+// !\soc_inst|m0_1|u_logic|Z5pvx4~2_combout  & ( (!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout  & (((!\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ) # (!\soc_inst|m0_1|u_logic|Pcyvx4~combout )) # (\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ))) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|Cam2z4~q ),
-	.datab(gnd),
-	.datac(!\soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE_q ),
-	.datad(!\soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE_q ),
-	.datae(!\soc_inst|m0_1|u_logic|G0w2z4~q ),
-	.dataf(!\soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE_q ),
+	.dataa(!\soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE_q ),
+	.datab(!\soc_inst|m0_1|u_logic|Z5pvx4~1_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|Pcyvx4~combout ),
+	.datad(!\soc_inst|m0_1|u_logic|Q5c2z4~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
+	.combout(\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|Ye4wx4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Ye4wx4 .lut_mask = 64'hA000000000000000;
-defparam \soc_inst|m0_1|u_logic|Ye4wx4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X39_Y18_N44
-dffeas \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|Ye4wx4~combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(vcc),
-	.ena(\soc_inst|m0_1|u_logic|J5vvx4~combout ),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE .is_wysiwyg = "true";
-defparam \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE .power_up = "low";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .extended_lut = "off";
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .lut_mask = 64'hFD00FD00F500F500;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X51_Y18_N45
+// Location: LABCELL_X30_Y16_N9
 cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~4 (
 // Equation(s):
 // \soc_inst|m0_1|u_logic|Z5pvx4~4_combout  = ( \soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( !\soc_inst|m0_1|u_logic|Z5pvx4~3_combout  ) ) # ( !\soc_inst|m0_1|u_logic|Z5pvx4~0_combout  & ( (!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ) # 
-// (\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ) ) )
+// (\soc_inst|m0_1|u_logic|S4w2z4~q ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE_q ),
+	.dataa(gnd),
 	.datab(gnd),
 	.datac(!\soc_inst|m0_1|u_logic|Z5pvx4~3_combout ),
-	.datad(gnd),
+	.datad(!\soc_inst|m0_1|u_logic|S4w2z4~q ),
 	.datae(gnd),
 	.dataf(!\soc_inst|m0_1|u_logic|Z5pvx4~0_combout ),
 	.datag(gnd),
@@ -109712,7 +110209,7 @@ cyclonev_lcell_comb \soc_inst|m0_1|u_logic|Z5pvx4~4 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .extended_lut = "off";
-defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .lut_mask = 64'hF5F5F5F5F0F0F0F0;
+defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .lut_mask = 64'hF0FFF0FFF0F0F0F0;
 defparam \soc_inst|m0_1|u_logic|Z5pvx4~4 .shared_arith = "off";
 // synopsys translate_on
 
@@ -109759,32 +110256,7 @@ defparam running.is_wysiwyg = "true";
 defparam running.power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N0
-cyclonev_lcell_comb \raz_inst|Add1~37 (
-// Equation(s):
-// \raz_inst|Add1~37_sumout  = SUM(( \raz_inst|V_count [0] ) + ( VCC ) + ( !VCC ))
-// \raz_inst|Add1~38  = CARRY(( \raz_inst|V_count [0] ) + ( VCC ) + ( !VCC ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|V_count [0]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\raz_inst|Add1~37_sumout ),
-	.cout(\raz_inst|Add1~38 ),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Add1~37 .extended_lut = "off";
-defparam \raz_inst|Add1~37 .lut_mask = 64'h00000000000000FF;
-defparam \raz_inst|Add1~37 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y28_N0
+// Location: LABCELL_X43_Y21_N0
 cyclonev_lcell_comb \raz_inst|Add0~25 (
 // Equation(s):
 // \raz_inst|Add0~25_sumout  = SUM(( \raz_inst|H_count [0] ) + ( VCC ) + ( !VCC ))
@@ -109809,14 +110281,14 @@ defparam \raz_inst|Add0~25 .lut_mask = 64'h0000000000000F0F;
 defparam \raz_inst|Add0~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y28_N35
+// Location: FF_X43_Y21_N35
 dffeas \raz_inst|H_count[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
 	.asdata(\raz_inst|Add0~25_sumout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
+	.sclr(\raz_inst|LessThan0~3_combout ),
 	.sload(vcc),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
@@ -109828,7 +110300,7 @@ defparam \raz_inst|H_count[0] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N3
+// Location: LABCELL_X43_Y21_N3
 cyclonev_lcell_comb \raz_inst|Add0~29 (
 // Equation(s):
 // \raz_inst|Add0~29_sumout  = SUM(( \raz_inst|H_count[1]~DUPLICATE_q  ) + ( GND ) + ( \raz_inst|Add0~26  ))
@@ -109853,14 +110325,14 @@ defparam \raz_inst|Add0~29 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add0~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y28_N52
+// Location: FF_X43_Y21_N52
 dffeas \raz_inst|H_count[1]~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
 	.asdata(\raz_inst|Add0~29_sumout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
+	.sclr(\raz_inst|LessThan0~3_combout ),
 	.sload(vcc),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
@@ -109872,16 +110344,16 @@ defparam \raz_inst|H_count[1]~DUPLICATE .is_wysiwyg = "true";
 defparam \raz_inst|H_count[1]~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N6
+// Location: LABCELL_X43_Y21_N6
 cyclonev_lcell_comb \raz_inst|Add0~21 (
 // Equation(s):
 // \raz_inst|Add0~21_sumout  = SUM(( \raz_inst|H_count [2] ) + ( GND ) + ( \raz_inst|Add0~30  ))
 // \raz_inst|Add0~22  = CARRY(( \raz_inst|H_count [2] ) + ( GND ) + ( \raz_inst|Add0~30  ))
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\raz_inst|H_count [2]),
 	.datac(gnd),
-	.datad(!\raz_inst|H_count [2]),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
@@ -109893,19 +110365,19 @@ cyclonev_lcell_comb \raz_inst|Add0~21 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Add0~21 .extended_lut = "off";
-defparam \raz_inst|Add0~21 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add0~21 .lut_mask = 64'h0000FFFF00003333;
 defparam \raz_inst|Add0~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y28_N59
+// Location: FF_X43_Y21_N8
 dffeas \raz_inst|H_count[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\raz_inst|Add0~21_sumout ),
+	.d(\raz_inst|Add0~21_sumout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
-	.sload(vcc),
+	.sclr(\raz_inst|LessThan0~3_combout ),
+	.sload(gnd),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
@@ -109916,7 +110388,7 @@ defparam \raz_inst|H_count[2] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N9
+// Location: LABCELL_X43_Y21_N9
 cyclonev_lcell_comb \raz_inst|Add0~37 (
 // Equation(s):
 // \raz_inst|Add0~37_sumout  = SUM(( \raz_inst|H_count [3] ) + ( GND ) + ( \raz_inst|Add0~22  ))
@@ -109941,15 +110413,15 @@ defparam \raz_inst|Add0~37 .lut_mask = 64'h0000FFFF00000F0F;
 defparam \raz_inst|Add0~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y28_N41
+// Location: FF_X43_Y21_N11
 dffeas \raz_inst|H_count[3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\raz_inst|Add0~37_sumout ),
+	.d(\raz_inst|Add0~37_sumout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
-	.sload(vcc),
+	.sclr(\raz_inst|LessThan0~3_combout ),
+	.sload(gnd),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
@@ -109960,7 +110432,7 @@ defparam \raz_inst|H_count[3] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N12
+// Location: LABCELL_X43_Y21_N12
 cyclonev_lcell_comb \raz_inst|Add0~41 (
 // Equation(s):
 // \raz_inst|Add0~41_sumout  = SUM(( \raz_inst|H_count [4] ) + ( GND ) + ( \raz_inst|Add0~38  ))
@@ -109985,14 +110457,14 @@ defparam \raz_inst|Add0~41 .lut_mask = 64'h0000FFFF00003333;
 defparam \raz_inst|Add0~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y28_N14
+// Location: FF_X43_Y21_N14
 dffeas \raz_inst|H_count[4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add0~41_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
+	.sclr(\raz_inst|LessThan0~3_combout ),
 	.sload(gnd),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
@@ -110004,7 +110476,7 @@ defparam \raz_inst|H_count[4] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[4] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N15
+// Location: LABCELL_X43_Y21_N15
 cyclonev_lcell_comb \raz_inst|Add0~33 (
 // Equation(s):
 // \raz_inst|Add0~33_sumout  = SUM(( \raz_inst|H_count [5] ) + ( GND ) + ( \raz_inst|Add0~42  ))
@@ -110029,14 +110501,14 @@ defparam \raz_inst|Add0~33 .lut_mask = 64'h0000FFFF00000F0F;
 defparam \raz_inst|Add0~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y28_N17
+// Location: FF_X43_Y21_N17
 dffeas \raz_inst|H_count[5] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add0~33_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
+	.sclr(\raz_inst|LessThan0~3_combout ),
 	.sload(gnd),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
@@ -110048,7 +110520,7 @@ defparam \raz_inst|H_count[5] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[5] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N18
+// Location: LABCELL_X43_Y21_N18
 cyclonev_lcell_comb \raz_inst|Add0~17 (
 // Equation(s):
 // \raz_inst|Add0~17_sumout  = SUM(( \raz_inst|H_count [6] ) + ( GND ) + ( \raz_inst|Add0~34  ))
@@ -110073,26 +110545,7 @@ defparam \raz_inst|Add0~17 .lut_mask = 64'h0000FFFF00000F0F;
 defparam \raz_inst|Add0~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y28_N20
-dffeas \raz_inst|H_count[6] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add0~17_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
-	.sload(gnd),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|H_count [6]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|H_count[6] .is_wysiwyg = "true";
-defparam \raz_inst|H_count[6] .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y28_N21
+// Location: LABCELL_X43_Y21_N21
 cyclonev_lcell_comb \raz_inst|Add0~5 (
 // Equation(s):
 // \raz_inst|Add0~5_sumout  = SUM(( \raz_inst|H_count [7] ) + ( GND ) + ( \raz_inst|Add0~18  ))
@@ -110117,14 +110570,14 @@ defparam \raz_inst|Add0~5 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add0~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y28_N23
+// Location: FF_X43_Y21_N23
 dffeas \raz_inst|H_count[7] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add0~5_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
+	.sclr(\raz_inst|LessThan0~3_combout ),
 	.sload(gnd),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
@@ -110136,7 +110589,7 @@ defparam \raz_inst|H_count[7] .is_wysiwyg = "true";
 defparam \raz_inst|H_count[7] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N24
+// Location: LABCELL_X43_Y21_N24
 cyclonev_lcell_comb \raz_inst|Add0~9 (
 // Equation(s):
 // \raz_inst|Add0~9_sumout  = SUM(( \raz_inst|H_count [8] ) + ( GND ) + ( \raz_inst|Add0~6  ))
@@ -110161,438 +110614,313 @@ defparam \raz_inst|Add0~9 .lut_mask = 64'h0000FFFF00000F0F;
 defparam \raz_inst|Add0~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N27
-cyclonev_lcell_comb \raz_inst|Add0~13 (
-// Equation(s):
-// \raz_inst|Add0~13_sumout  = SUM(( \raz_inst|H_count [9] ) + ( GND ) + ( \raz_inst|Add0~10  ))
-// \raz_inst|Add0~14  = CARRY(( \raz_inst|H_count [9] ) + ( GND ) + ( \raz_inst|Add0~10  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|H_count [9]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\raz_inst|Add0~10 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\raz_inst|Add0~13_sumout ),
-	.cout(\raz_inst|Add0~14 ),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Add0~13 .extended_lut = "off";
-defparam \raz_inst|Add0~13 .lut_mask = 64'h0000FFFF000000FF;
-defparam \raz_inst|Add0~13 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y28_N29
-dffeas \raz_inst|H_count[9] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add0~13_sumout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
-	.sload(gnd),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|H_count [9]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|H_count[9] .is_wysiwyg = "true";
-defparam \raz_inst|H_count[9] .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y28_N30
-cyclonev_lcell_comb \raz_inst|Add0~1 (
-// Equation(s):
-// \raz_inst|Add0~1_sumout  = SUM(( \raz_inst|H_count [10] ) + ( GND ) + ( \raz_inst|Add0~14  ))
-
-	.dataa(gnd),
-	.datab(!\raz_inst|H_count [10]),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\raz_inst|Add0~14 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\raz_inst|Add0~1_sumout ),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Add0~1 .extended_lut = "off";
-defparam \raz_inst|Add0~1 .lut_mask = 64'h0000FFFF00003333;
-defparam \raz_inst|Add0~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X28_Y28_N32
-dffeas \raz_inst|H_count[10] (
+// Location: FF_X43_Y21_N26
+dffeas \raz_inst|H_count[8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add0~1_sumout ),
+	.d(\raz_inst|Add0~9_sumout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
+	.sclr(\raz_inst|LessThan0~3_combout ),
 	.sload(gnd),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\raz_inst|H_count [10]),
+	.q(\raz_inst|H_count [8]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \raz_inst|H_count[10] .is_wysiwyg = "true";
-defparam \raz_inst|H_count[10] .power_up = "low";
+defparam \raz_inst|H_count[8] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[8] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N39
-cyclonev_lcell_comb \raz_inst|LessThan2~2 (
+// Location: LABCELL_X43_Y21_N27
+cyclonev_lcell_comb \raz_inst|Add0~13 (
 // Equation(s):
-// \raz_inst|LessThan2~2_combout  = ( \raz_inst|H_count [9] & ( \raz_inst|H_count [8] ) )
+// \raz_inst|Add0~13_sumout  = SUM(( \raz_inst|H_count [9] ) + ( GND ) + ( \raz_inst|Add0~10  ))
+// \raz_inst|Add0~14  = CARRY(( \raz_inst|H_count [9] ) + ( GND ) + ( \raz_inst|Add0~10  ))
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\raz_inst|H_count [9]),
-	.dataf(!\raz_inst|H_count [8]),
+	.datad(!\raz_inst|H_count [9]),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\raz_inst|Add0~10 ),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan2~2_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\raz_inst|Add0~13_sumout ),
+	.cout(\raz_inst|Add0~14 ),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan2~2 .extended_lut = "off";
-defparam \raz_inst|LessThan2~2 .lut_mask = 64'h000000000000FFFF;
-defparam \raz_inst|LessThan2~2 .shared_arith = "off";
+defparam \raz_inst|Add0~13 .extended_lut = "off";
+defparam \raz_inst|Add0~13 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add0~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y28_N53
-dffeas \raz_inst|H_count[1] (
+// Location: FF_X42_Y22_N28
+dffeas \raz_inst|H_count[9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
-	.asdata(\raz_inst|Add0~29_sumout ),
+	.asdata(\raz_inst|Add0~13_sumout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
+	.sclr(\raz_inst|LessThan0~3_combout ),
 	.sload(vcc),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\raz_inst|H_count [1]),
+	.q(\raz_inst|H_count [9]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \raz_inst|H_count[1] .is_wysiwyg = "true";
-defparam \raz_inst|H_count[1] .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y28_N48
-cyclonev_lcell_comb \raz_inst|LessThan2~0 (
-// Equation(s):
-// \raz_inst|LessThan2~0_combout  = ( !\raz_inst|H_count [7] & ( \raz_inst|H_count [4] & ( (!\raz_inst|H_count [0]) # ((!\raz_inst|H_count [2]) # ((!\raz_inst|H_count [1]) # (!\raz_inst|H_count [3]))) ) ) ) # ( !\raz_inst|H_count [7] & ( !\raz_inst|H_count 
-// [4] ) )
-
-	.dataa(!\raz_inst|H_count [0]),
-	.datab(!\raz_inst|H_count [2]),
-	.datac(!\raz_inst|H_count [1]),
-	.datad(!\raz_inst|H_count [3]),
-	.datae(!\raz_inst|H_count [7]),
-	.dataf(!\raz_inst|H_count [4]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|LessThan2~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|LessThan2~0 .extended_lut = "off";
-defparam \raz_inst|LessThan2~0 .lut_mask = 64'hFFFF0000FFFE0000;
-defparam \raz_inst|LessThan2~0 .shared_arith = "off";
+defparam \raz_inst|H_count[9] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[9] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N6
-cyclonev_lcell_comb \raz_inst|LessThan2~1 (
+// Location: LABCELL_X43_Y22_N42
+cyclonev_lcell_comb \raz_inst|LessThan0~2 (
 // Equation(s):
-// \raz_inst|LessThan2~1_combout  = ( !\raz_inst|H_count [5] & ( !\raz_inst|H_count [6] ) )
+// \raz_inst|LessThan0~2_combout  = ( \raz_inst|H_count [8] & ( \raz_inst|H_count [9] ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\raz_inst|H_count [5]),
-	.dataf(!\raz_inst|H_count [6]),
+	.datad(!\raz_inst|H_count [9]),
+	.datae(gnd),
+	.dataf(!\raz_inst|H_count [8]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan2~1_combout ),
+	.combout(\raz_inst|LessThan0~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan2~1 .extended_lut = "off";
-defparam \raz_inst|LessThan2~1 .lut_mask = 64'hFFFF000000000000;
-defparam \raz_inst|LessThan2~1 .shared_arith = "off";
+defparam \raz_inst|LessThan0~2 .extended_lut = "off";
+defparam \raz_inst|LessThan0~2 .lut_mask = 64'h0000000000FF00FF;
+defparam \raz_inst|LessThan0~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N45
-cyclonev_lcell_comb \raz_inst|LessThan2~3 (
+// Location: LABCELL_X43_Y21_N30
+cyclonev_lcell_comb \raz_inst|Add0~1 (
 // Equation(s):
-// \raz_inst|LessThan2~3_combout  = ( \raz_inst|LessThan2~1_combout  & ( ((\raz_inst|LessThan2~2_combout  & !\raz_inst|LessThan2~0_combout )) # (\raz_inst|H_count [10]) ) ) # ( !\raz_inst|LessThan2~1_combout  & ( (\raz_inst|LessThan2~2_combout ) # 
-// (\raz_inst|H_count [10]) ) )
+// \raz_inst|Add0~1_sumout  = SUM(( \raz_inst|H_count[10]~DUPLICATE_q  ) + ( GND ) + ( \raz_inst|Add0~14  ))
 
-	.dataa(!\raz_inst|H_count [10]),
-	.datab(!\raz_inst|LessThan2~2_combout ),
+	.dataa(gnd),
+	.datab(gnd),
 	.datac(gnd),
-	.datad(!\raz_inst|LessThan2~0_combout ),
+	.datad(!\raz_inst|H_count[10]~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(!\raz_inst|LessThan2~1_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\raz_inst|Add0~14 ),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan2~3_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\raz_inst|Add0~1_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan2~3 .extended_lut = "off";
-defparam \raz_inst|LessThan2~3 .lut_mask = 64'h7777777777557755;
-defparam \raz_inst|LessThan2~3 .shared_arith = "off";
+defparam \raz_inst|Add0~1 .extended_lut = "off";
+defparam \raz_inst|Add0~1 .lut_mask = 64'h0000FFFF000000FF;
+defparam \raz_inst|Add0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y28_N26
-dffeas \raz_inst|H_count[8] (
+// Location: FF_X42_Y21_N49
+dffeas \raz_inst|H_count[10]~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add0~9_sumout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\raz_inst|Add0~1_sumout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\raz_inst|LessThan2~3_combout ),
-	.sload(gnd),
+	.sclr(\raz_inst|LessThan0~3_combout ),
+	.sload(vcc),
 	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\raz_inst|H_count [8]),
+	.q(\raz_inst|H_count[10]~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \raz_inst|H_count[8] .is_wysiwyg = "true";
-defparam \raz_inst|H_count[8] .power_up = "low";
+defparam \raz_inst|H_count[10]~DUPLICATE .is_wysiwyg = "true";
+defparam \raz_inst|H_count[10]~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N42
-cyclonev_lcell_comb \raz_inst|always0~2 (
+// Location: LABCELL_X43_Y21_N57
+cyclonev_lcell_comb \raz_inst|LessThan0~1 (
 // Equation(s):
-// \raz_inst|always0~2_combout  = ( !\raz_inst|V_count [6] & ( (!\raz_inst|V_count [5] & (!\raz_inst|V_count [8] & !\raz_inst|V_count [7])) ) )
+// \raz_inst|LessThan0~1_combout  = ( !\raz_inst|H_count [6] & ( !\raz_inst|H_count [7] ) )
 
 	.dataa(gnd),
-	.datab(!\raz_inst|V_count [5]),
-	.datac(!\raz_inst|V_count [8]),
-	.datad(!\raz_inst|V_count [7]),
-	.datae(gnd),
-	.dataf(!\raz_inst|V_count [6]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|always0~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|always0~2 .extended_lut = "off";
-defparam \raz_inst|always0~2 .lut_mask = 64'hC000C00000000000;
-defparam \raz_inst|always0~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y28_N45
-cyclonev_lcell_comb \raz_inst|always0~3 (
-// Equation(s):
-// \raz_inst|always0~3_combout  = ( \raz_inst|always0~2_combout  & ( (!\raz_inst|V_count [4] & ((!\raz_inst|V_count [2]) # (!\raz_inst|V_count [3]))) ) )
-
-	.dataa(!\raz_inst|V_count [4]),
 	.datab(gnd),
-	.datac(!\raz_inst|V_count [2]),
-	.datad(!\raz_inst|V_count [3]),
+	.datac(gnd),
+	.datad(!\raz_inst|H_count [7]),
 	.datae(gnd),
-	.dataf(!\raz_inst|always0~2_combout ),
+	.dataf(!\raz_inst|H_count [6]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|always0~3_combout ),
+	.combout(\raz_inst|LessThan0~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|always0~3 .extended_lut = "off";
-defparam \raz_inst|always0~3 .lut_mask = 64'h00000000AAA0AAA0;
-defparam \raz_inst|always0~3 .shared_arith = "off";
+defparam \raz_inst|LessThan0~1 .extended_lut = "off";
+defparam \raz_inst|LessThan0~1 .lut_mask = 64'hFF00FF0000000000;
+defparam \raz_inst|LessThan0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y28_N27
-cyclonev_lcell_comb \raz_inst|always0~4 (
+// Location: LABCELL_X43_Y21_N48
+cyclonev_lcell_comb \raz_inst|LessThan0~0 (
 // Equation(s):
-// \raz_inst|always0~4_combout  = ( \raz_inst|V_count [9] & ( \raz_inst|V_count [10] & ( !\raz_inst|LessThan2~3_combout  ) ) ) # ( !\raz_inst|V_count [9] & ( \raz_inst|V_count [10] & ( !\raz_inst|LessThan2~3_combout  ) ) ) # ( \raz_inst|V_count [9] & ( 
-// !\raz_inst|V_count [10] & ( (!\raz_inst|LessThan2~3_combout  & !\raz_inst|always0~3_combout ) ) ) )
+// \raz_inst|LessThan0~0_combout  = ( \raz_inst|H_count[1]~DUPLICATE_q  & ( !\raz_inst|H_count [5] & ( (!\raz_inst|H_count [0]) # ((!\raz_inst|H_count [2]) # ((!\raz_inst|H_count [4]) # (!\raz_inst|H_count [3]))) ) ) ) # ( !\raz_inst|H_count[1]~DUPLICATE_q  
+// & ( !\raz_inst|H_count [5] ) )
 
-	.dataa(!\raz_inst|LessThan2~3_combout ),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|always0~3_combout ),
-	.datae(!\raz_inst|V_count [9]),
-	.dataf(!\raz_inst|V_count [10]),
+	.dataa(!\raz_inst|H_count [0]),
+	.datab(!\raz_inst|H_count [2]),
+	.datac(!\raz_inst|H_count [4]),
+	.datad(!\raz_inst|H_count [3]),
+	.datae(!\raz_inst|H_count[1]~DUPLICATE_q ),
+	.dataf(!\raz_inst|H_count [5]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|always0~4_combout ),
+	.combout(\raz_inst|LessThan0~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|always0~4 .extended_lut = "off";
-defparam \raz_inst|always0~4 .lut_mask = 64'h0000AA00AAAAAAAA;
-defparam \raz_inst|always0~4 .shared_arith = "off";
+defparam \raz_inst|LessThan0~0 .extended_lut = "off";
+defparam \raz_inst|LessThan0~0 .lut_mask = 64'hFFFFFFFE00000000;
+defparam \raz_inst|LessThan0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N36
-cyclonev_lcell_comb \raz_inst|H_count~1 (
+// Location: LABCELL_X43_Y21_N54
+cyclonev_lcell_comb \raz_inst|LessThan0~3 (
 // Equation(s):
-// \raz_inst|H_count~1_combout  = ( \raz_inst|Add0~37_sumout  & ( (!\raz_inst|H_count [10] & ((!\raz_inst|LessThan2~2_combout ) # ((\raz_inst|LessThan2~0_combout  & \raz_inst|LessThan2~1_combout )))) ) )
+// \raz_inst|LessThan0~3_combout  = ( \raz_inst|LessThan0~0_combout  & ( ((\raz_inst|LessThan0~2_combout  & !\raz_inst|LessThan0~1_combout )) # (\raz_inst|H_count[10]~DUPLICATE_q ) ) ) # ( !\raz_inst|LessThan0~0_combout  & ( 
+// (\raz_inst|H_count[10]~DUPLICATE_q ) # (\raz_inst|LessThan0~2_combout ) ) )
 
-	.dataa(!\raz_inst|LessThan2~2_combout ),
-	.datab(!\raz_inst|H_count [10]),
-	.datac(!\raz_inst|LessThan2~0_combout ),
-	.datad(!\raz_inst|LessThan2~1_combout ),
+	.dataa(gnd),
+	.datab(!\raz_inst|LessThan0~2_combout ),
+	.datac(!\raz_inst|H_count[10]~DUPLICATE_q ),
+	.datad(!\raz_inst|LessThan0~1_combout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|Add0~37_sumout ),
+	.dataf(!\raz_inst|LessThan0~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|H_count~1_combout ),
+	.combout(\raz_inst|LessThan0~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|H_count~1 .extended_lut = "off";
-defparam \raz_inst|H_count~1 .lut_mask = 64'h00000000888C888C;
-defparam \raz_inst|H_count~1 .shared_arith = "off";
+defparam \raz_inst|LessThan0~3 .extended_lut = "off";
+defparam \raz_inst|LessThan0~3 .lut_mask = 64'h3F3F3F3F3F0F3F0F;
+defparam \raz_inst|LessThan0~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N45
-cyclonev_lcell_comb \raz_inst|H_count~0 (
-// Equation(s):
-// \raz_inst|H_count~0_combout  = ( \raz_inst|LessThan2~2_combout  & ( (\raz_inst|LessThan2~0_combout  & (!\raz_inst|H_count [10] & (\raz_inst|Add0~21_sumout  & \raz_inst|LessThan2~1_combout ))) ) ) # ( !\raz_inst|LessThan2~2_combout  & ( (!\raz_inst|H_count 
-// [10] & \raz_inst|Add0~21_sumout ) ) )
-
-	.dataa(!\raz_inst|LessThan2~0_combout ),
-	.datab(!\raz_inst|H_count [10]),
-	.datac(!\raz_inst|Add0~21_sumout ),
-	.datad(!\raz_inst|LessThan2~1_combout ),
-	.datae(gnd),
-	.dataf(!\raz_inst|LessThan2~2_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|H_count~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X43_Y21_N20
+dffeas \raz_inst|H_count[6] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|Add0~17_sumout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|LessThan0~3_combout ),
+	.sload(gnd),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|H_count [6]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \raz_inst|H_count~0 .extended_lut = "off";
-defparam \raz_inst|H_count~0 .lut_mask = 64'h0C0C0C0C00040004;
-defparam \raz_inst|H_count~0 .shared_arith = "off";
+defparam \raz_inst|H_count[6] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[6] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N54
-cyclonev_lcell_comb \raz_inst|LessThan6~1 (
+// Location: LABCELL_X42_Y21_N12
+cyclonev_lcell_comb \raz_inst|LessThan4~0 (
 // Equation(s):
-// \raz_inst|LessThan6~1_combout  = ( \raz_inst|LessThan2~0_combout  & ( \raz_inst|Add0~29_sumout  & ( (!\raz_inst|H_count [10] & (\raz_inst|Add0~25_sumout  & ((!\raz_inst|LessThan2~2_combout ) # (\raz_inst|LessThan2~1_combout )))) ) ) ) # ( 
-// !\raz_inst|LessThan2~0_combout  & ( \raz_inst|Add0~29_sumout  & ( (!\raz_inst|LessThan2~2_combout  & (!\raz_inst|H_count [10] & \raz_inst|Add0~25_sumout )) ) ) )
+// \raz_inst|LessThan4~0_combout  = ( \raz_inst|Add0~21_sumout  & ( !\raz_inst|LessThan0~3_combout  ) ) # ( !\raz_inst|Add0~21_sumout  & ( (!\raz_inst|LessThan0~3_combout  & (\raz_inst|Add0~29_sumout  & \raz_inst|Add0~25_sumout )) ) )
 
-	.dataa(!\raz_inst|LessThan2~1_combout ),
-	.datab(!\raz_inst|LessThan2~2_combout ),
-	.datac(!\raz_inst|H_count [10]),
+	.dataa(!\raz_inst|LessThan0~3_combout ),
+	.datab(gnd),
+	.datac(!\raz_inst|Add0~29_sumout ),
 	.datad(!\raz_inst|Add0~25_sumout ),
-	.datae(!\raz_inst|LessThan2~0_combout ),
-	.dataf(!\raz_inst|Add0~29_sumout ),
+	.datae(gnd),
+	.dataf(!\raz_inst|Add0~21_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan6~1_combout ),
+	.combout(\raz_inst|LessThan4~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan6~1 .extended_lut = "off";
-defparam \raz_inst|LessThan6~1 .lut_mask = 64'h0000000000C000D0;
-defparam \raz_inst|LessThan6~1 .shared_arith = "off";
+defparam \raz_inst|LessThan4~0 .extended_lut = "off";
+defparam \raz_inst|LessThan4~0 .lut_mask = 64'h000A000AAAAAAAAA;
+defparam \raz_inst|LessThan4~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y27_N0
-cyclonev_lcell_comb \raz_inst|always0~13 (
+// Location: LABCELL_X42_Y21_N15
+cyclonev_lcell_comb \raz_inst|always0~0 (
 // Equation(s):
-// \raz_inst|always0~13_combout  = ( \raz_inst|LessThan6~1_combout  & ( \raz_inst|Add0~33_sumout  & ( (!\raz_inst|Add0~17_sumout  & ((!\raz_inst|H_count~1_combout ) # (!\raz_inst|Add0~41_sumout ))) ) ) ) # ( !\raz_inst|LessThan6~1_combout  & ( 
-// \raz_inst|Add0~33_sumout  & ( (!\raz_inst|Add0~17_sumout  & ((!\raz_inst|H_count~1_combout ) # ((!\raz_inst|H_count~0_combout ) # (!\raz_inst|Add0~41_sumout )))) ) ) ) # ( \raz_inst|LessThan6~1_combout  & ( !\raz_inst|Add0~33_sumout  & ( 
-// !\raz_inst|Add0~17_sumout  ) ) ) # ( !\raz_inst|LessThan6~1_combout  & ( !\raz_inst|Add0~33_sumout  & ( !\raz_inst|Add0~17_sumout  ) ) )
+// \raz_inst|always0~0_combout  = ( \raz_inst|Add0~37_sumout  & ( (!\raz_inst|LessThan0~3_combout  & (\raz_inst|Add0~33_sumout  & \raz_inst|Add0~41_sumout )) ) )
 
-	.dataa(!\raz_inst|H_count~1_combout ),
-	.datab(!\raz_inst|Add0~17_sumout ),
-	.datac(!\raz_inst|H_count~0_combout ),
+	.dataa(!\raz_inst|LessThan0~3_combout ),
+	.datab(gnd),
+	.datac(!\raz_inst|Add0~33_sumout ),
 	.datad(!\raz_inst|Add0~41_sumout ),
-	.datae(!\raz_inst|LessThan6~1_combout ),
-	.dataf(!\raz_inst|Add0~33_sumout ),
+	.datae(gnd),
+	.dataf(!\raz_inst|Add0~37_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|always0~13_combout ),
+	.combout(\raz_inst|always0~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|always0~13 .extended_lut = "off";
-defparam \raz_inst|always0~13 .lut_mask = 64'hCCCCCCCCCCC8CC88;
-defparam \raz_inst|always0~13 .shared_arith = "off";
+defparam \raz_inst|always0~0 .extended_lut = "off";
+defparam \raz_inst|always0~0 .lut_mask = 64'h00000000000A000A;
+defparam \raz_inst|always0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y27_N3
-cyclonev_lcell_comb \raz_inst|always0~14 (
+// Location: LABCELL_X42_Y21_N51
+cyclonev_lcell_comb \raz_inst|always0~1 (
 // Equation(s):
-// \raz_inst|always0~14_combout  = ( \raz_inst|always0~4_combout  & ( \raz_inst|always0~13_combout  & ( ((\raz_inst|Add0~9_sumout  & \raz_inst|Add0~13_sumout )) # (\raz_inst|Add0~1_sumout ) ) ) ) # ( \raz_inst|always0~4_combout  & ( 
-// !\raz_inst|always0~13_combout  & ( ((\raz_inst|Add0~13_sumout  & ((\raz_inst|Add0~5_sumout ) # (\raz_inst|Add0~9_sumout )))) # (\raz_inst|Add0~1_sumout ) ) ) )
+// \raz_inst|always0~1_combout  = ( \raz_inst|Add0~9_sumout  & ( \raz_inst|Add0~13_sumout  ) ) # ( !\raz_inst|Add0~9_sumout  & ( \raz_inst|Add0~13_sumout  & ( (\raz_inst|Add0~5_sumout  & (((\raz_inst|LessThan4~0_combout  & \raz_inst|always0~0_combout )) # 
+// (\raz_inst|Add0~17_sumout ))) ) ) )
 
-	.dataa(!\raz_inst|Add0~9_sumout ),
-	.datab(!\raz_inst|Add0~1_sumout ),
-	.datac(!\raz_inst|Add0~5_sumout ),
-	.datad(!\raz_inst|Add0~13_sumout ),
-	.datae(!\raz_inst|always0~4_combout ),
-	.dataf(!\raz_inst|always0~13_combout ),
+	.dataa(!\raz_inst|Add0~17_sumout ),
+	.datab(!\raz_inst|LessThan4~0_combout ),
+	.datac(!\raz_inst|always0~0_combout ),
+	.datad(!\raz_inst|Add0~5_sumout ),
+	.datae(!\raz_inst|Add0~9_sumout ),
+	.dataf(!\raz_inst|Add0~13_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|always0~14_combout ),
+	.combout(\raz_inst|always0~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|always0~14 .extended_lut = "off";
-defparam \raz_inst|always0~14 .lut_mask = 64'h0000337F00003377;
-defparam \raz_inst|always0~14 .shared_arith = "off";
+defparam \raz_inst|always0~1 .extended_lut = "off";
+defparam \raz_inst|always0~1 .lut_mask = 64'h000000000057FFFF;
+defparam \raz_inst|always0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N24
+// Location: LABCELL_X43_Y21_N36
 cyclonev_lcell_comb \raz_inst|Equal0~1 (
 // Equation(s):
-// \raz_inst|Equal0~1_combout  = ( \raz_inst|Add0~29_sumout  & ( \raz_inst|Add0~25_sumout  ) )
+// \raz_inst|Equal0~1_combout  = (\raz_inst|Add0~25_sumout  & \raz_inst|Add0~29_sumout )
 
 	.dataa(gnd),
-	.datab(!\raz_inst|Add0~25_sumout ),
-	.datac(gnd),
-	.datad(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|Add0~25_sumout ),
+	.datad(!\raz_inst|Add0~29_sumout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|Add0~29_sumout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -110602,323 +110930,84 @@ cyclonev_lcell_comb \raz_inst|Equal0~1 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Equal0~1 .extended_lut = "off";
-defparam \raz_inst|Equal0~1 .lut_mask = 64'h0000000033333333;
+defparam \raz_inst|Equal0~1 .lut_mask = 64'h000F000F000F000F;
 defparam \raz_inst|Equal0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y27_N24
-cyclonev_lcell_comb \raz_inst|Equal0~0 (
-// Equation(s):
-// \raz_inst|Equal0~0_combout  = ( \raz_inst|Add0~37_sumout  & ( \raz_inst|Add0~33_sumout  & ( (!\raz_inst|LessThan2~3_combout  & (\raz_inst|Add0~41_sumout  & (!\raz_inst|Add0~21_sumout  & !\raz_inst|Add0~17_sumout ))) ) ) )
-
-	.dataa(!\raz_inst|LessThan2~3_combout ),
-	.datab(!\raz_inst|Add0~41_sumout ),
-	.datac(!\raz_inst|Add0~21_sumout ),
-	.datad(!\raz_inst|Add0~17_sumout ),
-	.datae(!\raz_inst|Add0~37_sumout ),
-	.dataf(!\raz_inst|Add0~33_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|Equal0~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Equal0~0 .extended_lut = "off";
-defparam \raz_inst|Equal0~0 .lut_mask = 64'h0000000000002000;
-defparam \raz_inst|Equal0~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y27_N33
-cyclonev_lcell_comb \raz_inst|Equal0~3 (
+// Location: LABCELL_X42_Y22_N54
+cyclonev_lcell_comb \raz_inst|Equal0~2 (
 // Equation(s):
-// \raz_inst|Equal0~3_combout  = ( \raz_inst|Add0~5_sumout  & ( !\raz_inst|Add0~1_sumout  & ( (!\raz_inst|LessThan2~3_combout  & (!\raz_inst|Add0~9_sumout  & \raz_inst|Add0~13_sumout )) ) ) )
+// \raz_inst|Equal0~2_combout  = ( \raz_inst|Add0~13_sumout  & ( !\raz_inst|Add0~1_sumout  & ( (!\raz_inst|LessThan0~3_combout  & (\raz_inst|Add0~5_sumout  & (!\raz_inst|Add0~9_sumout  & \raz_inst|Equal0~1_combout ))) ) ) )
 
-	.dataa(!\raz_inst|LessThan2~3_combout ),
-	.datab(!\raz_inst|Add0~9_sumout ),
-	.datac(!\raz_inst|Add0~13_sumout ),
-	.datad(gnd),
-	.datae(!\raz_inst|Add0~5_sumout ),
+	.dataa(!\raz_inst|LessThan0~3_combout ),
+	.datab(!\raz_inst|Add0~5_sumout ),
+	.datac(!\raz_inst|Add0~9_sumout ),
+	.datad(!\raz_inst|Equal0~1_combout ),
+	.datae(!\raz_inst|Add0~13_sumout ),
 	.dataf(!\raz_inst|Add0~1_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|Equal0~3_combout ),
+	.combout(\raz_inst|Equal0~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|Equal0~3 .extended_lut = "off";
-defparam \raz_inst|Equal0~3 .lut_mask = 64'h0000080800000000;
-defparam \raz_inst|Equal0~3 .shared_arith = "off";
+defparam \raz_inst|Equal0~2 .extended_lut = "off";
+defparam \raz_inst|Equal0~2 .lut_mask = 64'h0000002000000000;
+defparam \raz_inst|Equal0~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y28_N51
-cyclonev_lcell_comb \raz_inst|Equal0~4 (
+// Location: LABCELL_X42_Y21_N42
+cyclonev_lcell_comb \raz_inst|Equal0~0 (
 // Equation(s):
-// \raz_inst|Equal0~4_combout  = ( \raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~3_combout  & ( !\raz_inst|Equal0~1_combout  ) ) ) # ( !\raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~3_combout  ) ) # ( \raz_inst|Equal0~0_combout  & ( 
-// !\raz_inst|Equal0~3_combout  ) ) # ( !\raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~3_combout  ) )
+// \raz_inst|Equal0~0_combout  = ( \raz_inst|Add0~41_sumout  & ( \raz_inst|Add0~33_sumout  & ( (!\raz_inst|Add0~17_sumout  & (!\raz_inst|Add0~21_sumout  & (!\raz_inst|LessThan0~3_combout  & \raz_inst|Add0~37_sumout ))) ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\raz_inst|Equal0~1_combout ),
-	.datad(gnd),
-	.datae(!\raz_inst|Equal0~0_combout ),
-	.dataf(!\raz_inst|Equal0~3_combout ),
+	.dataa(!\raz_inst|Add0~17_sumout ),
+	.datab(!\raz_inst|Add0~21_sumout ),
+	.datac(!\raz_inst|LessThan0~3_combout ),
+	.datad(!\raz_inst|Add0~37_sumout ),
+	.datae(!\raz_inst|Add0~41_sumout ),
+	.dataf(!\raz_inst|Add0~33_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|Equal0~4_combout ),
+	.combout(\raz_inst|Equal0~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|Equal0~4 .extended_lut = "off";
-defparam \raz_inst|Equal0~4 .lut_mask = 64'hFFFFFFFFFFFFF0F0;
-defparam \raz_inst|Equal0~4 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y28_N2
-dffeas \raz_inst|V_count[0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add1~37_sumout ),
-	.asdata(\raz_inst|V_count [0]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|always0~14_combout ),
-	.sload(\raz_inst|Equal0~4_combout ),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|V_count [0]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|V_count[0] .is_wysiwyg = "true";
-defparam \raz_inst|V_count[0] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y28_N3
-cyclonev_lcell_comb \raz_inst|Add1~41 (
-// Equation(s):
-// \raz_inst|Add1~41_sumout  = SUM(( \raz_inst|V_count [1] ) + ( GND ) + ( \raz_inst|Add1~38  ))
-// \raz_inst|Add1~42  = CARRY(( \raz_inst|V_count [1] ) + ( GND ) + ( \raz_inst|Add1~38  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|V_count [1]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\raz_inst|Add1~38 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\raz_inst|Add1~41_sumout ),
-	.cout(\raz_inst|Add1~42 ),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Add1~41 .extended_lut = "off";
-defparam \raz_inst|Add1~41 .lut_mask = 64'h0000FFFF000000FF;
-defparam \raz_inst|Add1~41 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y28_N5
-dffeas \raz_inst|V_count[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add1~41_sumout ),
-	.asdata(\raz_inst|V_count [1]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|always0~14_combout ),
-	.sload(\raz_inst|Equal0~4_combout ),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|V_count [1]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|V_count[1] .is_wysiwyg = "true";
-defparam \raz_inst|V_count[1] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y28_N6
-cyclonev_lcell_comb \raz_inst|Add1~25 (
-// Equation(s):
-// \raz_inst|Add1~25_sumout  = SUM(( \raz_inst|V_count [2] ) + ( GND ) + ( \raz_inst|Add1~42  ))
-// \raz_inst|Add1~26  = CARRY(( \raz_inst|V_count [2] ) + ( GND ) + ( \raz_inst|Add1~42  ))
-
-	.dataa(gnd),
-	.datab(!\raz_inst|V_count [2]),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\raz_inst|Add1~42 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\raz_inst|Add1~25_sumout ),
-	.cout(\raz_inst|Add1~26 ),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Add1~25 .extended_lut = "off";
-defparam \raz_inst|Add1~25 .lut_mask = 64'h0000FFFF00003333;
-defparam \raz_inst|Add1~25 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y28_N8
-dffeas \raz_inst|V_count[2] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add1~25_sumout ),
-	.asdata(\raz_inst|V_count [2]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|always0~14_combout ),
-	.sload(\raz_inst|Equal0~4_combout ),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|V_count [2]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|V_count[2] .is_wysiwyg = "true";
-defparam \raz_inst|V_count[2] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y28_N9
-cyclonev_lcell_comb \raz_inst|Add1~29 (
-// Equation(s):
-// \raz_inst|Add1~29_sumout  = SUM(( \raz_inst|V_count [3] ) + ( GND ) + ( \raz_inst|Add1~26  ))
-// \raz_inst|Add1~30  = CARRY(( \raz_inst|V_count [3] ) + ( GND ) + ( \raz_inst|Add1~26  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|V_count [3]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\raz_inst|Add1~26 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\raz_inst|Add1~29_sumout ),
-	.cout(\raz_inst|Add1~30 ),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Add1~29 .extended_lut = "off";
-defparam \raz_inst|Add1~29 .lut_mask = 64'h0000FFFF000000FF;
-defparam \raz_inst|Add1~29 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y28_N11
-dffeas \raz_inst|V_count[3] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add1~29_sumout ),
-	.asdata(\raz_inst|V_count [3]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|always0~14_combout ),
-	.sload(\raz_inst|Equal0~4_combout ),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|V_count [3]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|V_count[3] .is_wysiwyg = "true";
-defparam \raz_inst|V_count[3] .power_up = "low";
+defparam \raz_inst|Equal0~0 .extended_lut = "off";
+defparam \raz_inst|Equal0~0 .lut_mask = 64'h0000000000000080;
+defparam \raz_inst|Equal0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N12
-cyclonev_lcell_comb \raz_inst|Add1~33 (
+// Location: LABCELL_X45_Y22_N0
+cyclonev_lcell_comb \raz_inst|Add1~37 (
 // Equation(s):
-// \raz_inst|Add1~33_sumout  = SUM(( \raz_inst|V_count [4] ) + ( GND ) + ( \raz_inst|Add1~30  ))
-// \raz_inst|Add1~34  = CARRY(( \raz_inst|V_count [4] ) + ( GND ) + ( \raz_inst|Add1~30  ))
+// \raz_inst|Add1~37_sumout  = SUM(( \raz_inst|V_count [0] ) + ( VCC ) + ( !VCC ))
+// \raz_inst|Add1~38  = CARRY(( \raz_inst|V_count [0] ) + ( VCC ) + ( !VCC ))
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\raz_inst|V_count [4]),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\raz_inst|Add1~30 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\raz_inst|Add1~33_sumout ),
-	.cout(\raz_inst|Add1~34 ),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|Add1~33 .extended_lut = "off";
-defparam \raz_inst|Add1~33 .lut_mask = 64'h0000FFFF000000FF;
-defparam \raz_inst|Add1~33 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y28_N14
-dffeas \raz_inst|V_count[4] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add1~33_sumout ),
-	.asdata(\raz_inst|V_count [4]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|always0~14_combout ),
-	.sload(\raz_inst|Equal0~4_combout ),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|V_count [4]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|V_count[4] .is_wysiwyg = "true";
-defparam \raz_inst|V_count[4] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y28_N15
-cyclonev_lcell_comb \raz_inst|Add1~1 (
-// Equation(s):
-// \raz_inst|Add1~1_sumout  = SUM(( \raz_inst|V_count [5] ) + ( GND ) + ( \raz_inst|Add1~34  ))
-// \raz_inst|Add1~2  = CARRY(( \raz_inst|V_count [5] ) + ( GND ) + ( \raz_inst|Add1~34  ))
-
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\raz_inst|V_count [5]),
-	.datad(gnd),
+	.datad(!\raz_inst|V_count [0]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\raz_inst|Add1~34 ),
+	.cin(gnd),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\raz_inst|Add1~1_sumout ),
-	.cout(\raz_inst|Add1~2 ),
+	.sumout(\raz_inst|Add1~37_sumout ),
+	.cout(\raz_inst|Add1~38 ),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|Add1~1 .extended_lut = "off";
-defparam \raz_inst|Add1~1 .lut_mask = 64'h0000FFFF00000F0F;
-defparam \raz_inst|Add1~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X31_Y28_N17
-dffeas \raz_inst|V_count[5] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add1~1_sumout ),
-	.asdata(\raz_inst|V_count [5]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|always0~14_combout ),
-	.sload(\raz_inst|Equal0~4_combout ),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|V_count [5]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|V_count[5] .is_wysiwyg = "true";
-defparam \raz_inst|V_count[5] .power_up = "low";
+defparam \raz_inst|Add1~37 .extended_lut = "off";
+defparam \raz_inst|Add1~37 .lut_mask = 64'h00000000000000FF;
+defparam \raz_inst|Add1~37 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N18
+// Location: LABCELL_X45_Y22_N18
 cyclonev_lcell_comb \raz_inst|Add1~5 (
 // Equation(s):
 // \raz_inst|Add1~5_sumout  = SUM(( \raz_inst|V_count [6] ) + ( GND ) + ( \raz_inst|Add1~2  ))
@@ -110943,26 +111032,7 @@ defparam \raz_inst|Add1~5 .lut_mask = 64'h0000FFFF00000F0F;
 defparam \raz_inst|Add1~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y28_N20
-dffeas \raz_inst|V_count[6] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|Add1~5_sumout ),
-	.asdata(\raz_inst|V_count [6]),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\raz_inst|always0~14_combout ),
-	.sload(\raz_inst|Equal0~4_combout ),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|V_count [6]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|V_count[6] .is_wysiwyg = "true";
-defparam \raz_inst|V_count[6] .power_up = "low";
-// synopsys translate_on
-
-// Location: LABCELL_X31_Y28_N21
+// Location: LABCELL_X45_Y22_N21
 cyclonev_lcell_comb \raz_inst|Add1~9 (
 // Equation(s):
 // \raz_inst|Add1~9_sumout  = SUM(( \raz_inst|V_count [7] ) + ( GND ) + ( \raz_inst|Add1~6  ))
@@ -110987,7 +111057,56 @@ defparam \raz_inst|Add1~9 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add1~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y28_N23
+// Location: LABCELL_X43_Y21_N45
+cyclonev_lcell_comb \raz_inst|Equal0~3 (
+// Equation(s):
+// \raz_inst|Equal0~3_combout  = ( !\raz_inst|Add0~1_sumout  & ( (!\raz_inst|Add0~9_sumout  & (\raz_inst|Add0~5_sumout  & (!\raz_inst|LessThan0~3_combout  & \raz_inst|Add0~13_sumout ))) ) )
+
+	.dataa(!\raz_inst|Add0~9_sumout ),
+	.datab(!\raz_inst|Add0~5_sumout ),
+	.datac(!\raz_inst|LessThan0~3_combout ),
+	.datad(!\raz_inst|Add0~13_sumout ),
+	.datae(gnd),
+	.dataf(!\raz_inst|Add0~1_sumout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\raz_inst|Equal0~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \raz_inst|Equal0~3 .extended_lut = "off";
+defparam \raz_inst|Equal0~3 .lut_mask = 64'h0020002000000000;
+defparam \raz_inst|Equal0~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y21_N18
+cyclonev_lcell_comb \raz_inst|Equal0~4 (
+// Equation(s):
+// \raz_inst|Equal0~4_combout  = ( \raz_inst|Equal0~1_combout  & ( \raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~3_combout  ) ) ) # ( !\raz_inst|Equal0~1_combout  & ( \raz_inst|Equal0~0_combout  ) ) # ( \raz_inst|Equal0~1_combout  & ( 
+// !\raz_inst|Equal0~0_combout  ) ) # ( !\raz_inst|Equal0~1_combout  & ( !\raz_inst|Equal0~0_combout  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|Equal0~3_combout ),
+	.datad(gnd),
+	.datae(!\raz_inst|Equal0~1_combout ),
+	.dataf(!\raz_inst|Equal0~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\raz_inst|Equal0~4_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \raz_inst|Equal0~4 .extended_lut = "off";
+defparam \raz_inst|Equal0~4 .lut_mask = 64'hFFFFFFFFFFFFF0F0;
+defparam \raz_inst|Equal0~4 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X45_Y22_N23
 dffeas \raz_inst|V_count[7] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~9_sumout ),
@@ -111006,7 +111125,7 @@ defparam \raz_inst|V_count[7] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[7] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N24
+// Location: LABCELL_X45_Y22_N24
 cyclonev_lcell_comb \raz_inst|Add1~13 (
 // Equation(s):
 // \raz_inst|Add1~13_sumout  = SUM(( \raz_inst|V_count [8] ) + ( GND ) + ( \raz_inst|Add1~10  ))
@@ -111014,8 +111133,8 @@ cyclonev_lcell_comb \raz_inst|Add1~13 (
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\raz_inst|V_count [8]),
-	.datad(gnd),
+	.datac(gnd),
+	.datad(!\raz_inst|V_count [8]),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
@@ -111027,11 +111146,11 @@ cyclonev_lcell_comb \raz_inst|Add1~13 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Add1~13 .extended_lut = "off";
-defparam \raz_inst|Add1~13 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \raz_inst|Add1~13 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add1~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y28_N26
+// Location: FF_X45_Y22_N26
 dffeas \raz_inst|V_count[8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~13_sumout ),
@@ -111050,7 +111169,7 @@ defparam \raz_inst|V_count[8] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[8] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N27
+// Location: LABCELL_X45_Y22_N27
 cyclonev_lcell_comb \raz_inst|Add1~17 (
 // Equation(s):
 // \raz_inst|Add1~17_sumout  = SUM(( \raz_inst|V_count [9] ) + ( GND ) + ( \raz_inst|Add1~14  ))
@@ -111075,7 +111194,7 @@ defparam \raz_inst|Add1~17 .lut_mask = 64'h0000FFFF000000FF;
 defparam \raz_inst|Add1~17 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y28_N29
+// Location: FF_X45_Y22_N29
 dffeas \raz_inst|V_count[9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~17_sumout ),
@@ -111094,14 +111213,14 @@ defparam \raz_inst|V_count[9] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[9] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N30
+// Location: LABCELL_X45_Y22_N30
 cyclonev_lcell_comb \raz_inst|Add1~21 (
 // Equation(s):
 // \raz_inst|Add1~21_sumout  = SUM(( \raz_inst|V_count [10] ) + ( GND ) + ( \raz_inst|Add1~18  ))
 
 	.dataa(gnd),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [10]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
@@ -111114,11 +111233,11 @@ cyclonev_lcell_comb \raz_inst|Add1~21 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Add1~21 .extended_lut = "off";
-defparam \raz_inst|Add1~21 .lut_mask = 64'h0000FFFF00003333;
+defparam \raz_inst|Add1~21 .lut_mask = 64'h0000FFFF00000F0F;
 defparam \raz_inst|Add1~21 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X31_Y28_N32
+// Location: FF_X45_Y22_N32
 dffeas \raz_inst|V_count[10] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|Add1~21_sumout ),
@@ -111137,657 +111256,712 @@ defparam \raz_inst|V_count[10] .is_wysiwyg = "true";
 defparam \raz_inst|V_count[10] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y28_N48
-cyclonev_lcell_comb \raz_inst|LessThan1~0 (
+// Location: LABCELL_X43_Y22_N54
+cyclonev_lcell_comb \raz_inst|always0~2 (
 // Equation(s):
-// \raz_inst|LessThan1~0_combout  = ( \raz_inst|V_count [5] & ( (\raz_inst|V_count [7] & \raz_inst|V_count [6]) ) )
+// \raz_inst|always0~2_combout  = ( !\raz_inst|V_count [7] & ( (!\raz_inst|V_count [4] & (!\raz_inst|V_count [6] & !\raz_inst|V_count [5])) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\raz_inst|V_count [7]),
-	.datad(!\raz_inst|V_count [6]),
+	.datab(!\raz_inst|V_count [4]),
+	.datac(!\raz_inst|V_count [6]),
+	.datad(!\raz_inst|V_count [5]),
 	.datae(gnd),
-	.dataf(!\raz_inst|V_count [5]),
+	.dataf(!\raz_inst|V_count [7]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan1~0_combout ),
+	.combout(\raz_inst|always0~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan1~0 .extended_lut = "off";
-defparam \raz_inst|LessThan1~0 .lut_mask = 64'h00000000000F000F;
-defparam \raz_inst|LessThan1~0 .shared_arith = "off";
+defparam \raz_inst|always0~2 .extended_lut = "off";
+defparam \raz_inst|always0~2 .lut_mask = 64'hC000C00000000000;
+defparam \raz_inst|always0~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y28_N36
-cyclonev_lcell_comb \raz_inst|LessThan1~1 (
+// Location: LABCELL_X43_Y22_N57
+cyclonev_lcell_comb \raz_inst|always0~3 (
 // Equation(s):
-// \raz_inst|LessThan1~1_combout  = ( \raz_inst|V_count [8] & ( \raz_inst|V_count [7] & ( (\raz_inst|V_count [6] & \raz_inst|V_count [5]) ) ) )
+// \raz_inst|always0~3_combout  = ( \raz_inst|V_count [3] & ( (\raz_inst|always0~2_combout  & (!\raz_inst|V_count [8] & !\raz_inst|V_count [2])) ) ) # ( !\raz_inst|V_count [3] & ( (\raz_inst|always0~2_combout  & !\raz_inst|V_count [8]) ) )
 
-	.dataa(gnd),
-	.datab(!\raz_inst|V_count [6]),
-	.datac(gnd),
-	.datad(!\raz_inst|V_count [5]),
-	.datae(!\raz_inst|V_count [8]),
-	.dataf(!\raz_inst|V_count [7]),
+	.dataa(!\raz_inst|always0~2_combout ),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [8]),
+	.datad(!\raz_inst|V_count [2]),
+	.datae(gnd),
+	.dataf(!\raz_inst|V_count [3]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan1~1_combout ),
+	.combout(\raz_inst|always0~3_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan1~1 .extended_lut = "off";
-defparam \raz_inst|LessThan1~1 .lut_mask = 64'h0000000000000033;
-defparam \raz_inst|LessThan1~1 .shared_arith = "off";
+defparam \raz_inst|always0~3 .extended_lut = "off";
+defparam \raz_inst|always0~3 .lut_mask = 64'h5050505050005000;
+defparam \raz_inst|always0~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N42
-cyclonev_lcell_comb \raz_inst|pixel_x[9]~7 (
+// Location: LABCELL_X43_Y22_N45
+cyclonev_lcell_comb \raz_inst|always0~4 (
 // Equation(s):
-// \raz_inst|pixel_x[9]~7_combout  = ( \raz_inst|H_count [9] & ( (!\raz_inst|H_count [8] & (!\raz_inst|H_count [10] & !\raz_inst|H_count [7])) ) )
+// \raz_inst|always0~4_combout  = ( !\raz_inst|LessThan0~3_combout  & ( ((\raz_inst|V_count [9] & !\raz_inst|always0~3_combout )) # (\raz_inst|V_count [10]) ) )
 
-	.dataa(!\raz_inst|H_count [8]),
-	.datab(gnd),
-	.datac(!\raz_inst|H_count [10]),
-	.datad(!\raz_inst|H_count [7]),
+	.dataa(!\raz_inst|V_count [10]),
+	.datab(!\raz_inst|V_count [9]),
+	.datac(gnd),
+	.datad(!\raz_inst|always0~3_combout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|H_count [9]),
+	.dataf(!\raz_inst|LessThan0~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|pixel_x[9]~7_combout ),
+	.combout(\raz_inst|always0~4_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|pixel_x[9]~7 .extended_lut = "off";
-defparam \raz_inst|pixel_x[9]~7 .lut_mask = 64'h00000000A000A000;
-defparam \raz_inst|pixel_x[9]~7 .shared_arith = "off";
+defparam \raz_inst|always0~4 .extended_lut = "off";
+defparam \raz_inst|always0~4 .lut_mask = 64'h7755775500000000;
+defparam \raz_inst|always0~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y28_N0
-cyclonev_lcell_comb \soc_inst|pix1|Add1~17 (
+// Location: LABCELL_X43_Y21_N39
+cyclonev_lcell_comb \raz_inst|H_count~0 (
 // Equation(s):
-// \soc_inst|pix1|Add1~17_sumout  = SUM(( \raz_inst|pixel_x[9]~7_combout  ) + ( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (\raz_inst|V_count [2] & !\raz_inst|LessThan1~1_combout ))) ) + ( !VCC ))
-// \soc_inst|pix1|Add1~18  = CARRY(( \raz_inst|pixel_x[9]~7_combout  ) + ( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (\raz_inst|V_count [2] & !\raz_inst|LessThan1~1_combout ))) ) + ( !VCC ))
+// \raz_inst|H_count~0_combout  = ( \raz_inst|LessThan0~2_combout  & ( (\raz_inst|LessThan0~0_combout  & (\raz_inst|LessThan0~1_combout  & (!\raz_inst|H_count[10]~DUPLICATE_q  & \raz_inst|Add0~21_sumout ))) ) ) # ( !\raz_inst|LessThan0~2_combout  & ( 
+// (!\raz_inst|H_count[10]~DUPLICATE_q  & \raz_inst|Add0~21_sumout ) ) )
 
-	.dataa(!\raz_inst|V_count [9]),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(!\raz_inst|V_count [2]),
-	.datad(!\raz_inst|pixel_x[9]~7_combout ),
+	.dataa(!\raz_inst|LessThan0~0_combout ),
+	.datab(!\raz_inst|LessThan0~1_combout ),
+	.datac(!\raz_inst|H_count[10]~DUPLICATE_q ),
+	.datad(!\raz_inst|Add0~21_sumout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|LessThan1~1_combout ),
+	.dataf(!\raz_inst|LessThan0~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add1~17_sumout ),
-	.cout(\soc_inst|pix1|Add1~18 ),
+	.combout(\raz_inst|H_count~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add1~17 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~17 .lut_mask = 64'h0000F7FF000000FF;
-defparam \soc_inst|pix1|Add1~17 .shared_arith = "off";
+defparam \raz_inst|H_count~0 .extended_lut = "off";
+defparam \raz_inst|H_count~0 .lut_mask = 64'h00F000F000100010;
+defparam \raz_inst|H_count~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y28_N3
-cyclonev_lcell_comb \soc_inst|pix1|Add1~21 (
-// Equation(s):
-// \soc_inst|pix1|Add1~21_sumout  = SUM(( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (\raz_inst|V_count [3] & !\raz_inst|LessThan1~1_combout ))) ) + ( GND ) + ( \soc_inst|pix1|Add1~18  ))
-// \soc_inst|pix1|Add1~22  = CARRY(( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (\raz_inst|V_count [3] & !\raz_inst|LessThan1~1_combout ))) ) + ( GND ) + ( \soc_inst|pix1|Add1~18  ))
-
-	.dataa(!\raz_inst|V_count [9]),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(!\raz_inst|V_count [3]),
-	.datad(!\raz_inst|LessThan1~1_combout ),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|pix1|Add1~18 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add1~21_sumout ),
-	.cout(\soc_inst|pix1|Add1~22 ),
-	.shareout());
+// Location: FF_X42_Y21_N50
+dffeas \raz_inst|H_count[10] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\raz_inst|Add0~1_sumout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|LessThan0~3_combout ),
+	.sload(vcc),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|H_count [10]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|Add1~21 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~21 .lut_mask = 64'h0000FFFF00000800;
-defparam \soc_inst|pix1|Add1~21 .shared_arith = "off";
+defparam \raz_inst|H_count[10] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[10] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y28_N6
-cyclonev_lcell_comb \soc_inst|pix1|Add1~25 (
+// Location: LABCELL_X42_Y21_N0
+cyclonev_lcell_comb \raz_inst|H_count~1 (
 // Equation(s):
-// \soc_inst|pix1|Add1~25_sumout  = SUM(( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (\raz_inst|V_count [4] & !\raz_inst|LessThan1~1_combout ))) ) + ( GND ) + ( \soc_inst|pix1|Add1~22  ))
-// \soc_inst|pix1|Add1~26  = CARRY(( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (\raz_inst|V_count [4] & !\raz_inst|LessThan1~1_combout ))) ) + ( GND ) + ( \soc_inst|pix1|Add1~22  ))
+// \raz_inst|H_count~1_combout  = ( \raz_inst|LessThan0~0_combout  & ( (\raz_inst|Add0~37_sumout  & (!\raz_inst|H_count [10] & ((!\raz_inst|LessThan0~2_combout ) # (\raz_inst|LessThan0~1_combout )))) ) ) # ( !\raz_inst|LessThan0~0_combout  & ( 
+// (!\raz_inst|LessThan0~2_combout  & (\raz_inst|Add0~37_sumout  & !\raz_inst|H_count [10])) ) )
 
-	.dataa(!\raz_inst|V_count [9]),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(!\raz_inst|V_count [4]),
-	.datad(!\raz_inst|LessThan1~1_combout ),
+	.dataa(!\raz_inst|LessThan0~2_combout ),
+	.datab(!\raz_inst|Add0~37_sumout ),
+	.datac(!\raz_inst|H_count [10]),
+	.datad(!\raz_inst|LessThan0~1_combout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\raz_inst|LessThan0~0_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add1~22 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add1~25_sumout ),
-	.cout(\soc_inst|pix1|Add1~26 ),
+	.combout(\raz_inst|H_count~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add1~25 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~25 .lut_mask = 64'h0000FFFF00000800;
-defparam \soc_inst|pix1|Add1~25 .shared_arith = "off";
+defparam \raz_inst|H_count~1 .extended_lut = "off";
+defparam \raz_inst|H_count~1 .lut_mask = 64'h2020202020302030;
+defparam \raz_inst|H_count~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y28_N9
-cyclonev_lcell_comb \soc_inst|pix1|Add1~29 (
+// Location: LABCELL_X42_Y21_N6
+cyclonev_lcell_comb \raz_inst|LessThan4~1 (
 // Equation(s):
-// \soc_inst|pix1|Add1~29_sumout  = SUM(( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (\raz_inst|V_count [5] & !\raz_inst|LessThan1~1_combout ))) ) + ( GND ) + ( \soc_inst|pix1|Add1~26  ))
-// \soc_inst|pix1|Add1~30  = CARRY(( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (\raz_inst|V_count [5] & !\raz_inst|LessThan1~1_combout ))) ) + ( GND ) + ( \soc_inst|pix1|Add1~26  ))
+// \raz_inst|LessThan4~1_combout  = ( \raz_inst|Add0~29_sumout  & ( \raz_inst|LessThan0~2_combout  & ( (!\raz_inst|H_count [10] & (\raz_inst|LessThan0~0_combout  & (\raz_inst|Add0~25_sumout  & \raz_inst|LessThan0~1_combout ))) ) ) ) # ( 
+// \raz_inst|Add0~29_sumout  & ( !\raz_inst|LessThan0~2_combout  & ( (!\raz_inst|H_count [10] & \raz_inst|Add0~25_sumout ) ) ) )
 
-	.dataa(!\raz_inst|V_count [9]),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(!\raz_inst|V_count [5]),
-	.datad(!\raz_inst|LessThan1~1_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+	.dataa(!\raz_inst|H_count [10]),
+	.datab(!\raz_inst|LessThan0~0_combout ),
+	.datac(!\raz_inst|Add0~25_sumout ),
+	.datad(!\raz_inst|LessThan0~1_combout ),
+	.datae(!\raz_inst|Add0~29_sumout ),
+	.dataf(!\raz_inst|LessThan0~2_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add1~26 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add1~29_sumout ),
-	.cout(\soc_inst|pix1|Add1~30 ),
+	.combout(\raz_inst|LessThan4~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add1~29 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~29 .lut_mask = 64'h0000FFFF00000800;
-defparam \soc_inst|pix1|Add1~29 .shared_arith = "off";
+defparam \raz_inst|LessThan4~1 .extended_lut = "off";
+defparam \raz_inst|LessThan4~1 .lut_mask = 64'h00000A0A00000002;
+defparam \raz_inst|LessThan4~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y28_N12
-cyclonev_lcell_comb \soc_inst|pix1|Add1~9 (
+// Location: LABCELL_X42_Y21_N24
+cyclonev_lcell_comb \raz_inst|always0~13 (
 // Equation(s):
-// \soc_inst|pix1|Add1~9_sumout  = SUM(( GND ) + ( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [6]))) ) + ( \soc_inst|pix1|Add1~30  ))
-// \soc_inst|pix1|Add1~10  = CARRY(( GND ) + ( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [6]))) ) + ( \soc_inst|pix1|Add1~30  ))
+// \raz_inst|always0~13_combout  = ( \raz_inst|H_count~1_combout  & ( \raz_inst|LessThan4~1_combout  & ( (!\raz_inst|Add0~17_sumout  & ((!\raz_inst|Add0~41_sumout ) # (!\raz_inst|Add0~33_sumout ))) ) ) ) # ( !\raz_inst|H_count~1_combout  & ( 
+// \raz_inst|LessThan4~1_combout  & ( !\raz_inst|Add0~17_sumout  ) ) ) # ( \raz_inst|H_count~1_combout  & ( !\raz_inst|LessThan4~1_combout  & ( (!\raz_inst|Add0~17_sumout  & ((!\raz_inst|H_count~0_combout ) # ((!\raz_inst|Add0~41_sumout ) # 
+// (!\raz_inst|Add0~33_sumout )))) ) ) ) # ( !\raz_inst|H_count~1_combout  & ( !\raz_inst|LessThan4~1_combout  & ( !\raz_inst|Add0~17_sumout  ) ) )
 
-	.dataa(!\raz_inst|V_count [9]),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(!\raz_inst|LessThan1~1_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\raz_inst|V_count [6]),
+	.dataa(!\raz_inst|H_count~0_combout ),
+	.datab(!\raz_inst|Add0~41_sumout ),
+	.datac(!\raz_inst|Add0~17_sumout ),
+	.datad(!\raz_inst|Add0~33_sumout ),
+	.datae(!\raz_inst|H_count~1_combout ),
+	.dataf(!\raz_inst|LessThan4~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add1~30 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add1~9_sumout ),
-	.cout(\soc_inst|pix1|Add1~10 ),
+	.combout(\raz_inst|always0~13_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add1~9 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~9 .lut_mask = 64'h0000FF7F00000000;
-defparam \soc_inst|pix1|Add1~9 .shared_arith = "off";
+defparam \raz_inst|always0~13 .extended_lut = "off";
+defparam \raz_inst|always0~13 .lut_mask = 64'hF0F0F0E0F0F0F0C0;
+defparam \raz_inst|always0~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y28_N15
-cyclonev_lcell_comb \soc_inst|pix1|Add1~13 (
+// Location: LABCELL_X42_Y21_N18
+cyclonev_lcell_comb \raz_inst|always0~14 (
 // Equation(s):
-// \soc_inst|pix1|Add1~13_sumout  = SUM(( GND ) + ( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [7]))) ) + ( \soc_inst|pix1|Add1~10  ))
-// \soc_inst|pix1|Add1~14  = CARRY(( GND ) + ( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [7]))) ) + ( \soc_inst|pix1|Add1~10  ))
+// \raz_inst|always0~14_combout  = ( \raz_inst|Add0~1_sumout  & ( \raz_inst|always0~13_combout  & ( \raz_inst|always0~4_combout  ) ) ) # ( !\raz_inst|Add0~1_sumout  & ( \raz_inst|always0~13_combout  & ( (\raz_inst|Add0~13_sumout  & 
+// (\raz_inst|always0~4_combout  & \raz_inst|Add0~9_sumout )) ) ) ) # ( \raz_inst|Add0~1_sumout  & ( !\raz_inst|always0~13_combout  & ( \raz_inst|always0~4_combout  ) ) ) # ( !\raz_inst|Add0~1_sumout  & ( !\raz_inst|always0~13_combout  & ( 
+// (\raz_inst|Add0~13_sumout  & (\raz_inst|always0~4_combout  & ((\raz_inst|Add0~9_sumout ) # (\raz_inst|Add0~5_sumout )))) ) ) )
 
-	.dataa(!\raz_inst|V_count [9]),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(!\raz_inst|LessThan1~1_combout ),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\raz_inst|V_count [7]),
+	.dataa(!\raz_inst|Add0~13_sumout ),
+	.datab(!\raz_inst|always0~4_combout ),
+	.datac(!\raz_inst|Add0~5_sumout ),
+	.datad(!\raz_inst|Add0~9_sumout ),
+	.datae(!\raz_inst|Add0~1_sumout ),
+	.dataf(!\raz_inst|always0~13_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add1~10 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add1~13_sumout ),
-	.cout(\soc_inst|pix1|Add1~14 ),
+	.combout(\raz_inst|always0~14_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add1~13 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~13 .lut_mask = 64'h0000FF7F00000000;
-defparam \soc_inst|pix1|Add1~13 .shared_arith = "off";
+defparam \raz_inst|always0~14 .extended_lut = "off";
+defparam \raz_inst|always0~14 .lut_mask = 64'h0111333300113333;
+defparam \raz_inst|always0~14 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y28_N18
-cyclonev_lcell_comb \soc_inst|pix1|Add1~5 (
-// Equation(s):
-// \soc_inst|pix1|Add1~5_sumout  = SUM(( (\raz_inst|V_count [8] & (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & !\raz_inst|LessThan1~0_combout ))) ) + ( GND ) + ( \soc_inst|pix1|Add1~14  ))
-// \soc_inst|pix1|Add1~6  = CARRY(( (\raz_inst|V_count [8] & (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & !\raz_inst|LessThan1~0_combout ))) ) + ( GND ) + ( \soc_inst|pix1|Add1~14  ))
-
-	.dataa(!\raz_inst|V_count [8]),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(!\raz_inst|V_count [9]),
-	.datad(!\raz_inst|LessThan1~0_combout ),
-	.datae(gnd),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(\soc_inst|pix1|Add1~14 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add1~5_sumout ),
-	.cout(\soc_inst|pix1|Add1~6 ),
-	.shareout());
+// Location: FF_X45_Y22_N2
+dffeas \raz_inst|V_count[0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|Add1~37_sumout ),
+	.asdata(\raz_inst|V_count [0]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|always0~14_combout ),
+	.sload(\raz_inst|Equal0~4_combout ),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|V_count [0]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|Add1~5 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~5 .lut_mask = 64'h0000FFFF00004000;
-defparam \soc_inst|pix1|Add1~5 .shared_arith = "off";
+defparam \raz_inst|V_count[0] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X34_Y28_N21
-cyclonev_lcell_comb \soc_inst|pix1|Add1~1 (
+// Location: LABCELL_X45_Y22_N3
+cyclonev_lcell_comb \raz_inst|Add1~41 (
 // Equation(s):
-// \soc_inst|pix1|Add1~1_sumout  = SUM(( GND ) + ( GND ) + ( \soc_inst|pix1|Add1~6  ))
+// \raz_inst|Add1~41_sumout  = SUM(( \raz_inst|V_count [1] ) + ( GND ) + ( \raz_inst|Add1~38  ))
+// \raz_inst|Add1~42  = CARRY(( \raz_inst|V_count [1] ) + ( GND ) + ( \raz_inst|Add1~38  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
+	.datac(!\raz_inst|V_count [1]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add1~6 ),
+	.cin(\raz_inst|Add1~38 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|pix1|Add1~1_sumout ),
-	.cout(),
+	.sumout(\raz_inst|Add1~41_sumout ),
+	.cout(\raz_inst|Add1~42 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add1~1 .extended_lut = "off";
-defparam \soc_inst|pix1|Add1~1 .lut_mask = 64'h0000FFFF00000000;
-defparam \soc_inst|pix1|Add1~1 .shared_arith = "off";
+defparam \raz_inst|Add1~41 .extended_lut = "off";
+defparam \raz_inst|Add1~41 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \raz_inst|Add1~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N57
-cyclonev_lcell_comb \raz_inst|pixel_y[1]~1 (
-// Equation(s):
-// \raz_inst|pixel_y[1]~1_combout  = ( \raz_inst|V_count [1] & ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & !\raz_inst|LessThan1~1_combout )) ) )
-
-	.dataa(!\raz_inst|V_count [10]),
-	.datab(!\raz_inst|V_count [9]),
-	.datac(gnd),
-	.datad(!\raz_inst|LessThan1~1_combout ),
-	.datae(gnd),
-	.dataf(!\raz_inst|V_count [1]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|pixel_y[1]~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X45_Y22_N5
+dffeas \raz_inst|V_count[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|Add1~41_sumout ),
+	.asdata(\raz_inst|V_count [1]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|always0~14_combout ),
+	.sload(\raz_inst|Equal0~4_combout ),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|V_count [1]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \raz_inst|pixel_y[1]~1 .extended_lut = "off";
-defparam \raz_inst|pixel_y[1]~1 .lut_mask = 64'h0000000088008800;
-defparam \raz_inst|pixel_y[1]~1 .shared_arith = "off";
+defparam \raz_inst|V_count[1] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N54
-cyclonev_lcell_comb \raz_inst|pixel_y[0]~0 (
+// Location: LABCELL_X45_Y22_N6
+cyclonev_lcell_comb \raz_inst|Add1~25 (
 // Equation(s):
-// \raz_inst|pixel_y[0]~0_combout  = ( \raz_inst|V_count [0] & ( (!\raz_inst|V_count [9] & (!\raz_inst|V_count [10] & !\raz_inst|LessThan1~1_combout )) ) )
+// \raz_inst|Add1~25_sumout  = SUM(( \raz_inst|V_count [2] ) + ( GND ) + ( \raz_inst|Add1~42  ))
+// \raz_inst|Add1~26  = CARRY(( \raz_inst|V_count [2] ) + ( GND ) + ( \raz_inst|Add1~42  ))
 
 	.dataa(gnd),
-	.datab(!\raz_inst|V_count [9]),
-	.datac(!\raz_inst|V_count [10]),
-	.datad(!\raz_inst|LessThan1~1_combout ),
+	.datab(!\raz_inst|V_count [2]),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\raz_inst|V_count [0]),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\raz_inst|Add1~42 ),
 	.sharein(gnd),
-	.combout(\raz_inst|pixel_y[0]~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\raz_inst|Add1~25_sumout ),
+	.cout(\raz_inst|Add1~26 ),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|pixel_y[0]~0 .extended_lut = "off";
-defparam \raz_inst|pixel_y[0]~0 .lut_mask = 64'h00000000C000C000;
-defparam \raz_inst|pixel_y[0]~0 .shared_arith = "off";
+defparam \raz_inst|Add1~25 .extended_lut = "off";
+defparam \raz_inst|Add1~25 .lut_mask = 64'h0000FFFF00003333;
+defparam \raz_inst|Add1~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N0
-cyclonev_lcell_comb \soc_inst|pix1|Add0~25 (
-// Equation(s):
-// \soc_inst|pix1|Add0~25_sumout  = SUM(( \raz_inst|pixel_y[0]~0_combout  ) + ( (!\raz_inst|H_count [10] & (!\raz_inst|H_count [9] & \raz_inst|H_count [7])) ) + ( !VCC ))
-// \soc_inst|pix1|Add0~26  = CARRY(( \raz_inst|pixel_y[0]~0_combout  ) + ( (!\raz_inst|H_count [10] & (!\raz_inst|H_count [9] & \raz_inst|H_count [7])) ) + ( !VCC ))
-
-	.dataa(!\raz_inst|H_count [10]),
-	.datab(!\raz_inst|H_count [9]),
-	.datac(gnd),
-	.datad(!\raz_inst|pixel_y[0]~0_combout ),
-	.datae(gnd),
-	.dataf(!\raz_inst|H_count [7]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add0~25_sumout ),
-	.cout(\soc_inst|pix1|Add0~26 ),
-	.shareout());
+// Location: FF_X45_Y22_N8
+dffeas \raz_inst|V_count[2] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|Add1~25_sumout ),
+	.asdata(\raz_inst|V_count [2]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|always0~14_combout ),
+	.sload(\raz_inst|Equal0~4_combout ),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|V_count [2]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~25 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~25 .lut_mask = 64'h0000FF77000000FF;
-defparam \soc_inst|pix1|Add0~25 .shared_arith = "off";
+defparam \raz_inst|V_count[2] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N3
-cyclonev_lcell_comb \soc_inst|pix1|Add0~29 (
+// Location: LABCELL_X45_Y22_N9
+cyclonev_lcell_comb \raz_inst|Add1~29 (
 // Equation(s):
-// \soc_inst|pix1|Add0~29_sumout  = SUM(( \raz_inst|pixel_y[1]~1_combout  ) + ( (!\raz_inst|H_count [10] & (!\raz_inst|H_count [9] & \raz_inst|H_count [8])) ) + ( \soc_inst|pix1|Add0~26  ))
-// \soc_inst|pix1|Add0~30  = CARRY(( \raz_inst|pixel_y[1]~1_combout  ) + ( (!\raz_inst|H_count [10] & (!\raz_inst|H_count [9] & \raz_inst|H_count [8])) ) + ( \soc_inst|pix1|Add0~26  ))
+// \raz_inst|Add1~29_sumout  = SUM(( \raz_inst|V_count [3] ) + ( GND ) + ( \raz_inst|Add1~26  ))
+// \raz_inst|Add1~30  = CARRY(( \raz_inst|V_count [3] ) + ( GND ) + ( \raz_inst|Add1~26  ))
 
-	.dataa(!\raz_inst|H_count [10]),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\raz_inst|H_count [9]),
-	.datad(!\raz_inst|pixel_y[1]~1_combout ),
+	.datac(!\raz_inst|V_count [3]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\raz_inst|H_count [8]),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~26 ),
+	.cin(\raz_inst|Add1~26 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|pix1|Add0~29_sumout ),
-	.cout(\soc_inst|pix1|Add0~30 ),
+	.sumout(\raz_inst|Add1~29_sumout ),
+	.cout(\raz_inst|Add1~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~29 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~29 .lut_mask = 64'h0000FF5F000000FF;
-defparam \soc_inst|pix1|Add0~29 .shared_arith = "off";
+defparam \raz_inst|Add1~29 .extended_lut = "off";
+defparam \raz_inst|Add1~29 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \raz_inst|Add1~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N6
-cyclonev_lcell_comb \soc_inst|pix1|Add0~33 (
-// Equation(s):
-// \soc_inst|pix1|Add0~33_sumout  = SUM(( \soc_inst|pix1|Add1~17_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [0]))) ) + ( \soc_inst|pix1|Add0~30  ))
-// \soc_inst|pix1|Add0~34  = CARRY(( \soc_inst|pix1|Add1~17_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [0]))) ) + ( \soc_inst|pix1|Add0~30  ))
-
-	.dataa(!\raz_inst|V_count [10]),
-	.datab(!\raz_inst|V_count [9]),
-	.datac(!\raz_inst|LessThan1~1_combout ),
-	.datad(!\soc_inst|pix1|Add1~17_sumout ),
-	.datae(gnd),
-	.dataf(!\raz_inst|V_count [0]),
-	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~30 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add0~33_sumout ),
-	.cout(\soc_inst|pix1|Add0~34 ),
-	.shareout());
+// Location: FF_X45_Y22_N11
+dffeas \raz_inst|V_count[3] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|Add1~29_sumout ),
+	.asdata(\raz_inst|V_count [3]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|always0~14_combout ),
+	.sload(\raz_inst|Equal0~4_combout ),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|V_count [3]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~33 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~33 .lut_mask = 64'h0000FF7F000000FF;
-defparam \soc_inst|pix1|Add0~33 .shared_arith = "off";
+defparam \raz_inst|V_count[3] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N9
-cyclonev_lcell_comb \soc_inst|pix1|Add0~37 (
+// Location: LABCELL_X45_Y22_N12
+cyclonev_lcell_comb \raz_inst|Add1~33 (
 // Equation(s):
-// \soc_inst|pix1|Add0~37_sumout  = SUM(( \soc_inst|pix1|Add1~21_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [1]))) ) + ( \soc_inst|pix1|Add0~34  ))
-// \soc_inst|pix1|Add0~38  = CARRY(( \soc_inst|pix1|Add1~21_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [1]))) ) + ( \soc_inst|pix1|Add0~34  ))
+// \raz_inst|Add1~33_sumout  = SUM(( \raz_inst|V_count [4] ) + ( GND ) + ( \raz_inst|Add1~30  ))
+// \raz_inst|Add1~34  = CARRY(( \raz_inst|V_count [4] ) + ( GND ) + ( \raz_inst|Add1~30  ))
 
-	.dataa(!\raz_inst|V_count [10]),
-	.datab(!\raz_inst|V_count [9]),
-	.datac(!\raz_inst|LessThan1~1_combout ),
-	.datad(!\soc_inst|pix1|Add1~21_sumout ),
+	.dataa(gnd),
+	.datab(!\raz_inst|V_count [4]),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\raz_inst|V_count [1]),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~34 ),
+	.cin(\raz_inst|Add1~30 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|pix1|Add0~37_sumout ),
-	.cout(\soc_inst|pix1|Add0~38 ),
+	.sumout(\raz_inst|Add1~33_sumout ),
+	.cout(\raz_inst|Add1~34 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~37 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~37 .lut_mask = 64'h0000FF7F000000FF;
-defparam \soc_inst|pix1|Add0~37 .shared_arith = "off";
+defparam \raz_inst|Add1~33 .extended_lut = "off";
+defparam \raz_inst|Add1~33 .lut_mask = 64'h0000FFFF00003333;
+defparam \raz_inst|Add1~33 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N12
-cyclonev_lcell_comb \soc_inst|pix1|Add0~41 (
+// Location: FF_X45_Y22_N14
+dffeas \raz_inst|V_count[4] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|Add1~33_sumout ),
+	.asdata(\raz_inst|V_count [4]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|always0~14_combout ),
+	.sload(\raz_inst|Equal0~4_combout ),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|V_count [4]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[4] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[4] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y22_N15
+cyclonev_lcell_comb \raz_inst|Add1~1 (
 // Equation(s):
-// \soc_inst|pix1|Add0~41_sumout  = SUM(( \soc_inst|pix1|Add1~25_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [2]))) ) + ( \soc_inst|pix1|Add0~38  ))
-// \soc_inst|pix1|Add0~42  = CARRY(( \soc_inst|pix1|Add1~25_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [2]))) ) + ( \soc_inst|pix1|Add0~38  ))
+// \raz_inst|Add1~1_sumout  = SUM(( \raz_inst|V_count [5] ) + ( GND ) + ( \raz_inst|Add1~34  ))
+// \raz_inst|Add1~2  = CARRY(( \raz_inst|V_count [5] ) + ( GND ) + ( \raz_inst|Add1~34  ))
 
-	.dataa(!\raz_inst|V_count [10]),
-	.datab(!\raz_inst|V_count [9]),
-	.datac(!\raz_inst|LessThan1~1_combout ),
-	.datad(!\soc_inst|pix1|Add1~25_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [5]),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\raz_inst|V_count [2]),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~38 ),
+	.cin(\raz_inst|Add1~34 ),
 	.sharein(gnd),
 	.combout(),
-	.sumout(\soc_inst|pix1|Add0~41_sumout ),
-	.cout(\soc_inst|pix1|Add0~42 ),
+	.sumout(\raz_inst|Add1~1_sumout ),
+	.cout(\raz_inst|Add1~2 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~41 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~41 .lut_mask = 64'h0000FF7F000000FF;
-defparam \soc_inst|pix1|Add0~41 .shared_arith = "off";
+defparam \raz_inst|Add1~1 .extended_lut = "off";
+defparam \raz_inst|Add1~1 .lut_mask = 64'h0000FFFF00000F0F;
+defparam \raz_inst|Add1~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N15
-cyclonev_lcell_comb \soc_inst|pix1|Add0~45 (
-// Equation(s):
-// \soc_inst|pix1|Add0~45_sumout  = SUM(( \soc_inst|pix1|Add1~29_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [3]))) ) + ( \soc_inst|pix1|Add0~42  ))
-// \soc_inst|pix1|Add0~46  = CARRY(( \soc_inst|pix1|Add1~29_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [3]))) ) + ( \soc_inst|pix1|Add0~42  ))
+// Location: FF_X45_Y22_N17
+dffeas \raz_inst|V_count[5] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|Add1~1_sumout ),
+	.asdata(\raz_inst|V_count [5]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|always0~14_combout ),
+	.sload(\raz_inst|Equal0~4_combout ),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|V_count [5]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|V_count[5] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[5] .power_up = "low";
+// synopsys translate_on
 
-	.dataa(!\raz_inst|V_count [10]),
-	.datab(!\raz_inst|V_count [9]),
-	.datac(!\raz_inst|LessThan1~1_combout ),
-	.datad(!\soc_inst|pix1|Add1~29_sumout ),
-	.datae(gnd),
-	.dataf(!\raz_inst|V_count [3]),
-	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~42 ),
-	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add0~45_sumout ),
-	.cout(\soc_inst|pix1|Add0~46 ),
-	.shareout());
+// Location: FF_X45_Y22_N20
+dffeas \raz_inst|V_count[6] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|Add1~5_sumout ),
+	.asdata(\raz_inst|V_count [6]),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|always0~14_combout ),
+	.sload(\raz_inst|Equal0~4_combout ),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|V_count [6]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~45 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~45 .lut_mask = 64'h0000FF7F000000FF;
-defparam \soc_inst|pix1|Add0~45 .shared_arith = "off";
+defparam \raz_inst|V_count[6] .is_wysiwyg = "true";
+defparam \raz_inst|V_count[6] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N18
-cyclonev_lcell_comb \soc_inst|pix1|Add0~17 (
+// Location: LABCELL_X42_Y22_N12
+cyclonev_lcell_comb \raz_inst|LessThan8~0 (
 // Equation(s):
-// \soc_inst|pix1|Add0~17_sumout  = SUM(( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [4]))) ) + ( \soc_inst|pix1|Add1~9_sumout  ) + ( \soc_inst|pix1|Add0~46  ))
-// \soc_inst|pix1|Add0~18  = CARRY(( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [4]))) ) + ( \soc_inst|pix1|Add1~9_sumout  ) + ( \soc_inst|pix1|Add0~46  ))
+// \raz_inst|LessThan8~0_combout  = ( \raz_inst|Add1~5_sumout  & ( \raz_inst|Add1~1_sumout  & ( (!\raz_inst|Equal0~2_combout  & (((\raz_inst|V_count [6] & \raz_inst|V_count [5])))) # (\raz_inst|Equal0~2_combout  & (((\raz_inst|V_count [6] & \raz_inst|V_count 
+// [5])) # (\raz_inst|Equal0~0_combout ))) ) ) ) # ( !\raz_inst|Add1~5_sumout  & ( \raz_inst|Add1~1_sumout  & ( (\raz_inst|V_count [6] & (\raz_inst|V_count [5] & ((!\raz_inst|Equal0~2_combout ) # (!\raz_inst|Equal0~0_combout )))) ) ) ) # ( 
+// \raz_inst|Add1~5_sumout  & ( !\raz_inst|Add1~1_sumout  & ( (\raz_inst|V_count [6] & (\raz_inst|V_count [5] & ((!\raz_inst|Equal0~2_combout ) # (!\raz_inst|Equal0~0_combout )))) ) ) ) # ( !\raz_inst|Add1~5_sumout  & ( !\raz_inst|Add1~1_sumout  & ( 
+// (\raz_inst|V_count [6] & (\raz_inst|V_count [5] & ((!\raz_inst|Equal0~2_combout ) # (!\raz_inst|Equal0~0_combout )))) ) ) )
 
-	.dataa(!\raz_inst|V_count [10]),
-	.datab(!\raz_inst|V_count [9]),
-	.datac(!\raz_inst|LessThan1~1_combout ),
-	.datad(!\raz_inst|V_count [4]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|Add1~9_sumout ),
+	.dataa(!\raz_inst|Equal0~2_combout ),
+	.datab(!\raz_inst|Equal0~0_combout ),
+	.datac(!\raz_inst|V_count [6]),
+	.datad(!\raz_inst|V_count [5]),
+	.datae(!\raz_inst|Add1~5_sumout ),
+	.dataf(!\raz_inst|Add1~1_sumout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~46 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add0~17_sumout ),
-	.cout(\soc_inst|pix1|Add0~18 ),
+	.combout(\raz_inst|LessThan8~0_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~17 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~17 .lut_mask = 64'h0000FF0000000080;
-defparam \soc_inst|pix1|Add0~17 .shared_arith = "off";
+defparam \raz_inst|LessThan8~0 .extended_lut = "off";
+defparam \raz_inst|LessThan8~0 .lut_mask = 64'h000E000E000E111F;
+defparam \raz_inst|LessThan8~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N21
-cyclonev_lcell_comb \soc_inst|pix1|Add0~21 (
+// Location: LABCELL_X45_Y22_N57
+cyclonev_lcell_comb \raz_inst|LessThan8~2 (
 // Equation(s):
-// \soc_inst|pix1|Add0~21_sumout  = SUM(( \soc_inst|pix1|Add1~13_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [5]))) ) + ( \soc_inst|pix1|Add0~18  ))
-// \soc_inst|pix1|Add0~22  = CARRY(( \soc_inst|pix1|Add1~13_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [5]))) ) + ( \soc_inst|pix1|Add0~18  ))
+// \raz_inst|LessThan8~2_combout  = ( !\raz_inst|Add1~21_sumout  & ( !\raz_inst|Add1~17_sumout  ) )
 
-	.dataa(!\raz_inst|V_count [10]),
-	.datab(!\raz_inst|V_count [9]),
-	.datac(!\raz_inst|LessThan1~1_combout ),
-	.datad(!\soc_inst|pix1|Add1~13_sumout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\raz_inst|Add1~17_sumout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|V_count [5]),
+	.dataf(!\raz_inst|Add1~21_sumout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~18 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add0~21_sumout ),
-	.cout(\soc_inst|pix1|Add0~22 ),
+	.combout(\raz_inst|LessThan8~2_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~21 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~21 .lut_mask = 64'h0000FF7F000000FF;
-defparam \soc_inst|pix1|Add0~21 .shared_arith = "off";
+defparam \raz_inst|LessThan8~2 .extended_lut = "off";
+defparam \raz_inst|LessThan8~2 .lut_mask = 64'hFF00FF0000000000;
+defparam \raz_inst|LessThan8~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N24
-cyclonev_lcell_comb \soc_inst|pix1|Add0~13 (
+// Location: LABCELL_X43_Y22_N36
+cyclonev_lcell_comb \raz_inst|LessThan8~3 (
 // Equation(s):
-// \soc_inst|pix1|Add0~13_sumout  = SUM(( \soc_inst|pix1|Add1~5_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [6]))) ) + ( \soc_inst|pix1|Add0~22  ))
-// \soc_inst|pix1|Add0~14  = CARRY(( \soc_inst|pix1|Add1~5_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [6]))) ) + ( \soc_inst|pix1|Add0~22  ))
+// \raz_inst|LessThan8~3_combout  = ( \raz_inst|Equal0~1_combout  & ( \raz_inst|LessThan8~2_combout  & ( (!\raz_inst|V_count [10] & ((!\raz_inst|V_count [9]) # ((\raz_inst|Equal0~3_combout  & \raz_inst|Equal0~0_combout )))) # (\raz_inst|V_count [10] & 
+// (((\raz_inst|Equal0~3_combout  & \raz_inst|Equal0~0_combout )))) ) ) ) # ( !\raz_inst|Equal0~1_combout  & ( \raz_inst|LessThan8~2_combout  & ( (!\raz_inst|V_count [10] & !\raz_inst|V_count [9]) ) ) ) # ( \raz_inst|Equal0~1_combout  & ( 
+// !\raz_inst|LessThan8~2_combout  & ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & ((!\raz_inst|Equal0~3_combout ) # (!\raz_inst|Equal0~0_combout )))) ) ) ) # ( !\raz_inst|Equal0~1_combout  & ( !\raz_inst|LessThan8~2_combout  & ( (!\raz_inst|V_count 
+// [10] & !\raz_inst|V_count [9]) ) ) )
 
 	.dataa(!\raz_inst|V_count [10]),
 	.datab(!\raz_inst|V_count [9]),
-	.datac(!\raz_inst|LessThan1~1_combout ),
-	.datad(!\soc_inst|pix1|Add1~5_sumout ),
-	.datae(gnd),
-	.dataf(!\raz_inst|V_count [6]),
+	.datac(!\raz_inst|Equal0~3_combout ),
+	.datad(!\raz_inst|Equal0~0_combout ),
+	.datae(!\raz_inst|Equal0~1_combout ),
+	.dataf(!\raz_inst|LessThan8~2_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~22 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add0~13_sumout ),
-	.cout(\soc_inst|pix1|Add0~14 ),
+	.combout(\raz_inst|LessThan8~3_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~13 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~13 .lut_mask = 64'h0000FF7F000000FF;
-defparam \soc_inst|pix1|Add0~13 .shared_arith = "off";
+defparam \raz_inst|LessThan8~3 .extended_lut = "off";
+defparam \raz_inst|LessThan8~3 .lut_mask = 64'h888888808888888F;
+defparam \raz_inst|LessThan8~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N27
-cyclonev_lcell_comb \soc_inst|pix1|Add0~9 (
+// Location: LABCELL_X45_Y22_N36
+cyclonev_lcell_comb \raz_inst|LessThan8~1 (
 // Equation(s):
-// \soc_inst|pix1|Add0~9_sumout  = SUM(( \soc_inst|pix1|Add1~1_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [7]))) ) + ( \soc_inst|pix1|Add0~14  ))
-// \soc_inst|pix1|Add0~10  = CARRY(( \soc_inst|pix1|Add1~1_sumout  ) + ( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (!\raz_inst|LessThan1~1_combout  & \raz_inst|V_count [7]))) ) + ( \soc_inst|pix1|Add0~14  ))
+// \raz_inst|LessThan8~1_combout  = ( \raz_inst|Add1~9_sumout  & ( \raz_inst|Equal0~2_combout  & ( (!\raz_inst|Equal0~0_combout  & (\raz_inst|V_count [8] & (\raz_inst|V_count [7]))) # (\raz_inst|Equal0~0_combout  & (((\raz_inst|Add1~13_sumout )))) ) ) ) # ( 
+// !\raz_inst|Add1~9_sumout  & ( \raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [8] & (\raz_inst|V_count [7] & !\raz_inst|Equal0~0_combout )) ) ) ) # ( \raz_inst|Add1~9_sumout  & ( !\raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [8] & 
+// \raz_inst|V_count [7]) ) ) ) # ( !\raz_inst|Add1~9_sumout  & ( !\raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [8] & \raz_inst|V_count [7]) ) ) )
 
-	.dataa(!\raz_inst|V_count [10]),
-	.datab(!\raz_inst|V_count [9]),
-	.datac(!\raz_inst|LessThan1~1_combout ),
-	.datad(!\soc_inst|pix1|Add1~1_sumout ),
-	.datae(gnd),
-	.dataf(!\raz_inst|V_count [7]),
+	.dataa(!\raz_inst|V_count [8]),
+	.datab(!\raz_inst|V_count [7]),
+	.datac(!\raz_inst|Equal0~0_combout ),
+	.datad(!\raz_inst|Add1~13_sumout ),
+	.datae(!\raz_inst|Add1~9_sumout ),
+	.dataf(!\raz_inst|Equal0~2_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~14 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add0~9_sumout ),
-	.cout(\soc_inst|pix1|Add0~10 ),
+	.combout(\raz_inst|LessThan8~1_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~9 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~9 .lut_mask = 64'h0000FF7F000000FF;
-defparam \soc_inst|pix1|Add0~9 .shared_arith = "off";
+defparam \raz_inst|LessThan8~1 .extended_lut = "off";
+defparam \raz_inst|LessThan8~1 .lut_mask = 64'h111111111010101F;
+defparam \raz_inst|LessThan8~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N30
-cyclonev_lcell_comb \soc_inst|pix1|Add0~5 (
+// Location: LABCELL_X42_Y22_N24
+cyclonev_lcell_comb \raz_inst|LessThan8~4 (
 // Equation(s):
-// \soc_inst|pix1|Add0~5_sumout  = SUM(( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (\raz_inst|V_count [8] & !\raz_inst|LessThan1~0_combout ))) ) + ( GND ) + ( \soc_inst|pix1|Add0~10  ))
-// \soc_inst|pix1|Add0~6  = CARRY(( (!\raz_inst|V_count [10] & (!\raz_inst|V_count [9] & (\raz_inst|V_count [8] & !\raz_inst|LessThan1~0_combout ))) ) + ( GND ) + ( \soc_inst|pix1|Add0~10  ))
-
-	.dataa(!\raz_inst|V_count [10]),
-	.datab(!\raz_inst|V_count [9]),
-	.datac(!\raz_inst|V_count [8]),
-	.datad(!\raz_inst|LessThan1~0_combout ),
-	.datae(gnd),
-	.dataf(gnd),
+// \raz_inst|LessThan8~4_combout  = ( \raz_inst|always0~4_combout  & ( \raz_inst|LessThan8~1_combout  & ( (((!\raz_inst|LessThan8~0_combout  & \raz_inst|LessThan8~3_combout )) # (\raz_inst|Add0~1_sumout )) # (\raz_inst|always0~1_combout ) ) ) ) # ( 
+// !\raz_inst|always0~4_combout  & ( \raz_inst|LessThan8~1_combout  & ( (!\raz_inst|LessThan8~0_combout  & \raz_inst|LessThan8~3_combout ) ) ) ) # ( \raz_inst|always0~4_combout  & ( !\raz_inst|LessThan8~1_combout  & ( ((\raz_inst|LessThan8~3_combout ) # 
+// (\raz_inst|Add0~1_sumout )) # (\raz_inst|always0~1_combout ) ) ) ) # ( !\raz_inst|always0~4_combout  & ( !\raz_inst|LessThan8~1_combout  & ( \raz_inst|LessThan8~3_combout  ) ) )
+
+	.dataa(!\raz_inst|always0~1_combout ),
+	.datab(!\raz_inst|LessThan8~0_combout ),
+	.datac(!\raz_inst|Add0~1_sumout ),
+	.datad(!\raz_inst|LessThan8~3_combout ),
+	.datae(!\raz_inst|always0~4_combout ),
+	.dataf(!\raz_inst|LessThan8~1_combout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~10 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add0~5_sumout ),
-	.cout(\soc_inst|pix1|Add0~6 ),
+	.combout(\raz_inst|LessThan8~4_combout ),
+	.sumout(),
+	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~5 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~5 .lut_mask = 64'h0000FFFF00000800;
-defparam \soc_inst|pix1|Add0~5 .shared_arith = "off";
+defparam \raz_inst|LessThan8~4 .extended_lut = "off";
+defparam \raz_inst|LessThan8~4 .lut_mask = 64'h00FF5FFF00CC5FDF;
+defparam \raz_inst|LessThan8~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X33_Y28_N33
-cyclonev_lcell_comb \soc_inst|pix1|Add0~1 (
+// Location: FF_X42_Y22_N25
+dffeas \raz_inst|video_on_V (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\raz_inst|LessThan8~4_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|video_on_V~q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|video_on_V .is_wysiwyg = "true";
+defparam \raz_inst|video_on_V .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y22_N18
+cyclonev_lcell_comb \raz_inst|LessThan7~0 (
 // Equation(s):
-// \soc_inst|pix1|Add0~1_sumout  = SUM(( GND ) + ( GND ) + ( \soc_inst|pix1|Add0~6  ))
+// \raz_inst|LessThan7~0_combout  = ( \raz_inst|Add0~1_sumout  & ( \raz_inst|LessThan0~3_combout  ) ) # ( !\raz_inst|Add0~1_sumout  & ( ((!\raz_inst|Add0~13_sumout ) # ((!\raz_inst|Add0~9_sumout  & !\raz_inst|Add0~5_sumout ))) # 
+// (\raz_inst|LessThan0~3_combout ) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
+	.dataa(!\raz_inst|Add0~9_sumout ),
+	.datab(!\raz_inst|Add0~5_sumout ),
+	.datac(!\raz_inst|LessThan0~3_combout ),
+	.datad(!\raz_inst|Add0~13_sumout ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\raz_inst|Add0~1_sumout ),
 	.datag(gnd),
-	.cin(\soc_inst|pix1|Add0~6 ),
+	.cin(gnd),
 	.sharein(gnd),
-	.combout(),
-	.sumout(\soc_inst|pix1|Add0~1_sumout ),
+	.combout(\raz_inst|LessThan7~0_combout ),
+	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|Add0~1 .extended_lut = "off";
-defparam \soc_inst|pix1|Add0~1 .lut_mask = 64'h0000FFFF00000000;
-defparam \soc_inst|pix1|Add0~1 .shared_arith = "off";
+defparam \raz_inst|LessThan7~0 .extended_lut = "off";
+defparam \raz_inst|LessThan7~0 .lut_mask = 64'hFF8FFF8F0F0F0F0F;
+defparam \raz_inst|LessThan7~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y28_N34
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] (
+// Location: FF_X42_Y22_N20
+dffeas \raz_inst|video_on_H (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add0~1_sumout ),
+	.d(\raz_inst|LessThan7~0_combout ),
 	.asdata(vcc),
-	.clrn(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]),
+	.q(\raz_inst|video_on_H~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] .power_up = "low";
+defparam \raz_inst|video_on_H .is_wysiwyg = "true";
+defparam \raz_inst|video_on_H .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y22_N21
+cyclonev_lcell_comb \raz_inst|VGA_BLANK_N (
+// Equation(s):
+// \raz_inst|VGA_BLANK_N~combout  = ( \raz_inst|video_on_H~q  & ( \raz_inst|video_on_V~q  ) )
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|video_on_V~q ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\raz_inst|video_on_H~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\raz_inst|VGA_BLANK_N~combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \raz_inst|VGA_BLANK_N .extended_lut = "off";
+defparam \raz_inst|VGA_BLANK_N .lut_mask = 64'h000000000F0F0F0F;
+defparam \raz_inst|VGA_BLANK_N .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y15_N24
+// Location: MLABCELL_X21_Y17_N6
 cyclonev_lcell_comb \soc_inst|pix1|always0~0 (
 // Equation(s):
-// \soc_inst|pix1|always0~0_combout  = ( \soc_inst|m0_1|u_logic|E7mwx4~combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( (!\soc_inst|interconnect_1|LessThan1~0_combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout ) # 
-// (\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|E7mwx4~combout  & ( \soc_inst|m0_1|u_logic|S6ovx4~2_combout  ) ) # ( \soc_inst|m0_1|u_logic|E7mwx4~combout  & ( !\soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( 
-// (!\soc_inst|interconnect_1|LessThan1~0_combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout )) ) ) ) # ( !\soc_inst|m0_1|u_logic|E7mwx4~combout  & ( !\soc_inst|m0_1|u_logic|S6ovx4~2_combout  & ( 
-// (!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ) # ((!\soc_inst|interconnect_1|LessThan1~0_combout ) # ((!\soc_inst|interconnect_1|HREADY~0_combout ) # (\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ))) ) ) )
+// \soc_inst|pix1|always0~0_combout  = ( \soc_inst|m0_1|u_logic|E7mwx4~combout  & ( \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  ) ) # ( !\soc_inst|m0_1|u_logic|E7mwx4~combout  & ( \soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  ) ) # ( 
+// \soc_inst|m0_1|u_logic|E7mwx4~combout  & ( !\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (!\soc_inst|interconnect_1|LessThan1~0_combout ) ) ) ) # ( !\soc_inst|m0_1|u_logic|E7mwx4~combout  & ( 
+// !\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout  & ( (!\soc_inst|interconnect_1|HREADY~0_combout ) # (((!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ) # (!\soc_inst|interconnect_1|LessThan1~0_combout )) # (\soc_inst|m0_1|u_logic|S6ovx4~2_combout )) ) ) )
 
-	.dataa(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
-	.datab(!\soc_inst|interconnect_1|LessThan1~0_combout ),
-	.datac(!\soc_inst|interconnect_1|HREADY~0_combout ),
-	.datad(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
+	.dataa(!\soc_inst|interconnect_1|HREADY~0_combout ),
+	.datab(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+	.datac(!\soc_inst|m0_1|u_logic|S6ovx4~1_combout ),
+	.datad(!\soc_inst|interconnect_1|LessThan1~0_combout ),
 	.datae(!\soc_inst|m0_1|u_logic|E7mwx4~combout ),
-	.dataf(!\soc_inst|m0_1|u_logic|S6ovx4~2_combout ),
+	.dataf(!\soc_inst|m0_1|u_logic|htrans_o[1]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -111797,11 +111971,30 @@ cyclonev_lcell_comb \soc_inst|pix1|always0~0 (
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|always0~0 .extended_lut = "off";
-defparam \soc_inst|pix1|always0~0 .lut_mask = 64'hFEFFFCFFFFFFFCFF;
+defparam \soc_inst|pix1|always0~0 .lut_mask = 64'hFFFBFFAAFFFFFFFF;
 defparam \soc_inst|pix1|always0~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X37_Y15_N8
+// Location: FF_X24_Y14_N29
+dffeas \soc_inst|pix1|word_address[14] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\soc_inst|pix1|always0~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|word_address [14]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[14] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[14] .power_up = "low";
+// synopsys translate_on
+
+// Location: FF_X22_Y13_N14
 dffeas \soc_inst|pix1|word_address[15] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Bv0wx4~combout ),
@@ -111820,29 +112013,29 @@ defparam \soc_inst|pix1|word_address[15] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[15] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y17_N2
-dffeas \soc_inst|pix1|word_address[13] (
+// Location: FF_X23_Y16_N44
+dffeas \soc_inst|pix1|write_enable (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
-	.asdata(vcc),
+	.d(gnd),
+	.asdata(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(\soc_inst|pix1|always0~0_combout ),
-	.sload(gnd),
+	.sload(vcc),
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|word_address [13]),
+	.q(\soc_inst|pix1|write_enable~q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|word_address[13] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|word_address[13] .power_up = "low";
+defparam \soc_inst|pix1|write_enable .is_wysiwyg = "true";
+defparam \soc_inst|pix1|write_enable .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y17_N20
-dffeas \soc_inst|pix1|word_address[14] (
+// Location: FF_X21_Y14_N20
+dffeas \soc_inst|pix1|word_address[16] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Vpovx4~combout ),
+	.d(\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
 	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
@@ -111851,14 +112044,14 @@ dffeas \soc_inst|pix1|word_address[14] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|word_address [14]),
+	.q(\soc_inst|pix1|word_address [16]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|word_address[14] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|word_address[14] .power_up = "low";
+defparam \soc_inst|pix1|word_address[16] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[16] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y17_N14
+// Location: FF_X21_Y14_N41
 dffeas \soc_inst|pix1|word_address[18] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Ug0wx4~combout ),
@@ -111877,7 +112070,7 @@ defparam \soc_inst|pix1|word_address[18] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[18] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X37_Y17_N44
+// Location: FF_X22_Y13_N56
 dffeas \soc_inst|pix1|word_address[17] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\soc_inst|m0_1|u_logic|Ql0wx4~combout ),
@@ -111896,55 +112089,17 @@ defparam \soc_inst|pix1|word_address[17] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[17] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N56
-dffeas \soc_inst|pix1|write_enable (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|hwrite_o~0_combout ),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\soc_inst|pix1|always0~0_combout ),
-	.sload(vcc),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|pix1|write_enable~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|pix1|write_enable .is_wysiwyg = "true";
-defparam \soc_inst|pix1|write_enable .power_up = "low";
-// synopsys translate_on
-
-// Location: FF_X37_Y17_N26
-dffeas \soc_inst|pix1|word_address[16] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|m0_1|u_logic|Fq0wx4~combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(\soc_inst|pix1|always0~0_combout ),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|pix1|word_address [16]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|pix1|word_address[16] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|word_address[16] .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y28_N30
+// Location: LABCELL_X43_Y18_N18
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout  = ( !\soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|word_address [18] & (!\soc_inst|pix1|word_address [17] & \soc_inst|pix1|write_enable~q )) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout  = ( !\soc_inst|pix1|word_address [17] & ( (\soc_inst|pix1|write_enable~q  & (!\soc_inst|pix1|word_address [16] & \soc_inst|pix1|word_address [18])) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|pix1|word_address [18]),
-	.datac(!\soc_inst|pix1|word_address [17]),
-	.datad(!\soc_inst|pix1|write_enable~q ),
+	.datab(!\soc_inst|pix1|write_enable~q ),
+	.datac(!\soc_inst|pix1|word_address [16]),
+	.datad(!\soc_inst|pix1|word_address [18]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [16]),
+	.dataf(!\soc_inst|pix1|word_address [17]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -111958,32 +112113,51 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2 .l
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N42
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 (
+// Location: FF_X19_Y15_N50
+dffeas \soc_inst|pix1|word_address[13] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|haddr_o~3_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\soc_inst|pix1|always0~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|word_address [13]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|word_address[13] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[13] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y19_N0
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout  & ( (\soc_inst|pix1|word_address [15] & (!\soc_inst|pix1|word_address [13] & 
-// !\soc_inst|pix1|word_address [14])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout  = ( \soc_inst|pix1|word_address [13] & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [15] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout )) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [15]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(!\soc_inst|pix1|word_address [14]),
+	.dataa(!\soc_inst|pix1|word_address [14]),
+	.datab(!\soc_inst|pix1|word_address [15]),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout ),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout ),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .lut_mask = 64'h0000000050005000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .lut_mask = 64'h0000000000220022;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N28
+// Location: FF_X21_Y17_N53
 dffeas \soc_inst|pix1|word_address[0] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112002,7 +112176,7 @@ defparam \soc_inst|pix1|word_address[0] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[0] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N44
+// Location: FF_X24_Y17_N26
 dffeas \soc_inst|pix1|word_address[1] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112021,7 +112195,7 @@ defparam \soc_inst|pix1|word_address[1] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[1] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X40_Y19_N16
+// Location: FF_X21_Y17_N8
 dffeas \soc_inst|pix1|word_address[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112040,7 +112214,7 @@ defparam \soc_inst|pix1|word_address[2] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N38
+// Location: FF_X21_Y17_N46
 dffeas \soc_inst|pix1|word_address[3] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112059,7 +112233,7 @@ defparam \soc_inst|pix1|word_address[3] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[3] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y17_N58
+// Location: FF_X21_Y17_N26
 dffeas \soc_inst|pix1|word_address[4] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112078,7 +112252,7 @@ defparam \soc_inst|pix1|word_address[4] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[4] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N20
+// Location: FF_X21_Y17_N11
 dffeas \soc_inst|pix1|word_address[5] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112097,7 +112271,7 @@ defparam \soc_inst|pix1|word_address[5] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[5] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N59
+// Location: FF_X21_Y17_N29
 dffeas \soc_inst|pix1|word_address[6] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112116,7 +112290,7 @@ defparam \soc_inst|pix1|word_address[6] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[6] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N26
+// Location: FF_X21_Y17_N22
 dffeas \soc_inst|pix1|word_address[7] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112135,7 +112309,7 @@ defparam \soc_inst|pix1|word_address[7] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[7] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y16_N53
+// Location: FF_X24_Y17_N46
 dffeas \soc_inst|pix1|word_address[8] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112154,7 +112328,7 @@ defparam \soc_inst|pix1|word_address[8] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[8] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N35
+// Location: FF_X21_Y17_N41
 dffeas \soc_inst|pix1|word_address[9] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112173,7 +112347,7 @@ defparam \soc_inst|pix1|word_address[9] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[9] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N41
+// Location: FF_X21_Y17_N56
 dffeas \soc_inst|pix1|word_address[10] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112192,7 +112366,7 @@ defparam \soc_inst|pix1|word_address[10] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[10] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y15_N47
+// Location: FF_X21_Y17_N58
 dffeas \soc_inst|pix1|word_address[11] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(gnd),
@@ -112211,60 +112385,36 @@ defparam \soc_inst|pix1|word_address[11] .is_wysiwyg = "true";
 defparam \soc_inst|pix1|word_address[11] .power_up = "low";
 // synopsys translate_on
 
-// Location: FF_X39_Y16_N50
-dffeas \soc_inst|pix1|word_address[12] (
+// Location: FF_X42_Y22_N19
+dffeas \raz_inst|video_on_H~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(gnd),
-	.asdata(\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
+	.d(\raz_inst|LessThan7~0_combout ),
+	.asdata(vcc),
 	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
-	.sclr(\soc_inst|pix1|always0~0_combout ),
-	.sload(vcc),
-	.ena(vcc),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|word_address [12]),
+	.q(\raz_inst|video_on_H~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|word_address[12] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|word_address[12] .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y28_N54
-cyclonev_lcell_comb \raz_inst|LessThan0~0 (
-// Equation(s):
-// \raz_inst|LessThan0~0_combout  = ( !\raz_inst|H_count [10] & ( (!\raz_inst|H_count [9]) # ((!\raz_inst|H_count [8] & !\raz_inst|H_count [7])) ) )
-
-	.dataa(!\raz_inst|H_count [9]),
-	.datab(gnd),
-	.datac(!\raz_inst|H_count [8]),
-	.datad(!\raz_inst|H_count [7]),
-	.datae(gnd),
-	.dataf(!\raz_inst|H_count [10]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|LessThan0~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|LessThan0~0 .extended_lut = "off";
-defparam \raz_inst|LessThan0~0 .lut_mask = 64'hFAAAFAAA00000000;
-defparam \raz_inst|LessThan0~0 .shared_arith = "off";
+defparam \raz_inst|video_on_H~DUPLICATE .is_wysiwyg = "true";
+defparam \raz_inst|video_on_H~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N57
+// Location: LABCELL_X45_Y21_N3
 cyclonev_lcell_comb \raz_inst|pixel_x[0]~0 (
 // Equation(s):
-// \raz_inst|pixel_x[0]~0_combout  = ( \raz_inst|H_count [0] & ( \raz_inst|LessThan0~0_combout  ) )
+// \raz_inst|pixel_x[0]~0_combout  = ( \raz_inst|H_count [0] & ( \raz_inst|video_on_H~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\raz_inst|LessThan0~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\raz_inst|H_count [0]),
+	.datae(!\raz_inst|H_count [0]),
+	.dataf(!\raz_inst|video_on_H~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -112274,21 +112424,40 @@ cyclonev_lcell_comb \raz_inst|pixel_x[0]~0 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|pixel_x[0]~0 .extended_lut = "off";
-defparam \raz_inst|pixel_x[0]~0 .lut_mask = 64'h000000000F0F0F0F;
+defparam \raz_inst|pixel_x[0]~0 .lut_mask = 64'h000000000000FFFF;
 defparam \raz_inst|pixel_x[0]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N15
+// Location: FF_X43_Y21_N53
+dffeas \raz_inst|H_count[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(gnd),
+	.asdata(\raz_inst|Add0~29_sumout ),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\raz_inst|LessThan0~3_combout ),
+	.sload(vcc),
+	.ena(!tick_count[0]),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\raz_inst|H_count [1]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \raz_inst|H_count[1] .is_wysiwyg = "true";
+defparam \raz_inst|H_count[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y21_N42
 cyclonev_lcell_comb \raz_inst|pixel_x[1]~1 (
 // Equation(s):
-// \raz_inst|pixel_x[1]~1_combout  = ( \raz_inst|LessThan0~0_combout  & ( \raz_inst|H_count[1]~DUPLICATE_q  ) )
+// \raz_inst|pixel_x[1]~1_combout  = ( \raz_inst|H_count [1] & ( \raz_inst|video_on_H~q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(gnd),
-	.datae(!\raz_inst|LessThan0~0_combout ),
-	.dataf(!\raz_inst|H_count[1]~DUPLICATE_q ),
+	.datad(!\raz_inst|video_on_H~q ),
+	.datae(gnd),
+	.dataf(!\raz_inst|H_count [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -112298,21 +112467,21 @@ cyclonev_lcell_comb \raz_inst|pixel_x[1]~1 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|pixel_x[1]~1 .extended_lut = "off";
-defparam \raz_inst|pixel_x[1]~1 .lut_mask = 64'h000000000000FFFF;
+defparam \raz_inst|pixel_x[1]~1 .lut_mask = 64'h0000000000FF00FF;
 defparam \raz_inst|pixel_x[1]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N42
+// Location: LABCELL_X45_Y21_N42
 cyclonev_lcell_comb \raz_inst|pixel_x[2]~2 (
 // Equation(s):
-// \raz_inst|pixel_x[2]~2_combout  = (\raz_inst|LessThan0~0_combout  & \raz_inst|H_count [2])
+// \raz_inst|pixel_x[2]~2_combout  = ( \raz_inst|H_count [2] & ( \raz_inst|video_on_H~DUPLICATE_q  ) )
 
-	.dataa(gnd),
+	.dataa(!\raz_inst|video_on_H~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\raz_inst|LessThan0~0_combout ),
-	.datad(!\raz_inst|H_count [2]),
+	.datac(gnd),
+	.datad(gnd),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\raz_inst|H_count [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -112322,21 +112491,21 @@ cyclonev_lcell_comb \raz_inst|pixel_x[2]~2 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|pixel_x[2]~2 .extended_lut = "off";
-defparam \raz_inst|pixel_x[2]~2 .lut_mask = 64'h000F000F000F000F;
+defparam \raz_inst|pixel_x[2]~2 .lut_mask = 64'h0000000055555555;
 defparam \raz_inst|pixel_x[2]~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N42
+// Location: LABCELL_X42_Y21_N36
 cyclonev_lcell_comb \raz_inst|pixel_x[3]~3 (
 // Equation(s):
-// \raz_inst|pixel_x[3]~3_combout  = (\raz_inst|H_count [3] & \raz_inst|LessThan0~0_combout )
+// \raz_inst|pixel_x[3]~3_combout  = ( \raz_inst|H_count [3] & ( \raz_inst|video_on_H~DUPLICATE_q  ) )
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\raz_inst|H_count [3]),
-	.datad(!\raz_inst|LessThan0~0_combout ),
+	.datac(gnd),
+	.datad(!\raz_inst|video_on_H~DUPLICATE_q ),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\raz_inst|H_count [3]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -112346,21 +112515,21 @@ cyclonev_lcell_comb \raz_inst|pixel_x[3]~3 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|pixel_x[3]~3 .extended_lut = "off";
-defparam \raz_inst|pixel_x[3]~3 .lut_mask = 64'h000F000F000F000F;
+defparam \raz_inst|pixel_x[3]~3 .lut_mask = 64'h0000000000FF00FF;
 defparam \raz_inst|pixel_x[3]~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y28_N39
+// Location: LABCELL_X45_Y21_N45
 cyclonev_lcell_comb \raz_inst|pixel_x[4]~4 (
 // Equation(s):
-// \raz_inst|pixel_x[4]~4_combout  = ( \raz_inst|H_count [4] & ( \raz_inst|LessThan0~0_combout  ) )
+// \raz_inst|pixel_x[4]~4_combout  = ( \raz_inst|video_on_H~DUPLICATE_q  & ( \raz_inst|H_count [4] ) )
 
 	.dataa(gnd),
 	.datab(gnd),
 	.datac(gnd),
-	.datad(!\raz_inst|LessThan0~0_combout ),
+	.datad(!\raz_inst|H_count [4]),
 	.datae(gnd),
-	.dataf(!\raz_inst|H_count [4]),
+	.dataf(!\raz_inst|video_on_H~DUPLICATE_q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -112374,17 +112543,17 @@ defparam \raz_inst|pixel_x[4]~4 .lut_mask = 64'h0000000000FF00FF;
 defparam \raz_inst|pixel_x[4]~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N30
+// Location: LABCELL_X45_Y21_N51
 cyclonev_lcell_comb \raz_inst|pixel_x[5]~5 (
 // Equation(s):
-// \raz_inst|pixel_x[5]~5_combout  = ( \raz_inst|LessThan0~0_combout  & ( \raz_inst|H_count [5] ) )
+// \raz_inst|pixel_x[5]~5_combout  = ( \raz_inst|H_count [5] & ( \raz_inst|video_on_H~DUPLICATE_q  ) )
 
-	.dataa(gnd),
+	.dataa(!\raz_inst|video_on_H~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\raz_inst|H_count [5]),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\raz_inst|LessThan0~0_combout ),
-	.dataf(gnd),
+	.datae(gnd),
+	.dataf(!\raz_inst|H_count [5]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -112394,20 +112563,20 @@ cyclonev_lcell_comb \raz_inst|pixel_x[5]~5 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|pixel_x[5]~5 .extended_lut = "off";
-defparam \raz_inst|pixel_x[5]~5 .lut_mask = 64'h00000F0F00000F0F;
+defparam \raz_inst|pixel_x[5]~5 .lut_mask = 64'h0000000055555555;
 defparam \raz_inst|pixel_x[5]~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N51
+// Location: LABCELL_X45_Y21_N48
 cyclonev_lcell_comb \raz_inst|pixel_x[6]~6 (
 // Equation(s):
-// \raz_inst|pixel_x[6]~6_combout  = ( \raz_inst|LessThan0~0_combout  & ( \raz_inst|H_count [6] ) )
+// \raz_inst|pixel_x[6]~6_combout  = ( \raz_inst|H_count [6] & ( \raz_inst|video_on_H~DUPLICATE_q  ) )
 
-	.dataa(gnd),
+	.dataa(!\raz_inst|video_on_H~DUPLICATE_q ),
 	.datab(gnd),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(!\raz_inst|LessThan0~0_combout ),
+	.datae(gnd),
 	.dataf(!\raz_inst|H_count [6]),
 	.datag(gnd),
 	.cin(gnd),
@@ -112418,145 +112587,230 @@ cyclonev_lcell_comb \raz_inst|pixel_x[6]~6 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|pixel_x[6]~6 .extended_lut = "off";
-defparam \raz_inst|pixel_x[6]~6 .lut_mask = 64'h000000000000FFFF;
+defparam \raz_inst|pixel_x[6]~6 .lut_mask = 64'h0000000055555555;
 defparam \raz_inst|pixel_x[6]~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y25_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
-\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+// Location: LABCELL_X43_Y22_N0
+cyclonev_lcell_comb \soc_inst|pix1|Add0~25 (
+// Equation(s):
+// \soc_inst|pix1|Add0~25_sumout  = SUM(( (\raz_inst|video_on_H~DUPLICATE_q  & \raz_inst|H_count [7]) ) + ( (\raz_inst|video_on_V~q  & \raz_inst|V_count [0]) ) + ( !VCC ))
+// \soc_inst|pix1|Add0~26  = CARRY(( (\raz_inst|video_on_H~DUPLICATE_q  & \raz_inst|H_count [7]) ) + ( (\raz_inst|video_on_V~q  & \raz_inst|V_count [0]) ) + ( !VCC ))
+
+	.dataa(!\raz_inst|video_on_H~DUPLICATE_q ),
+	.datab(!\raz_inst|video_on_V~q ),
+	.datac(!\raz_inst|V_count [0]),
+	.datad(!\raz_inst|H_count [7]),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~25_sumout ),
+	.cout(\soc_inst|pix1|Add0~26 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|Add0~25 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~25 .lut_mask = 64'h0000FCFC00000055;
+defparam \soc_inst|pix1|Add0~25 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y28_N22
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add0~21_sumout ),
-	.asdata(vcc),
-	.clrn(vcc),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.prn(vcc));
+// Location: LABCELL_X43_Y22_N3
+cyclonev_lcell_comb \soc_inst|pix1|Add0~29 (
+// Equation(s):
+// \soc_inst|pix1|Add0~29_sumout  = SUM(( (\raz_inst|video_on_V~q  & \raz_inst|V_count [1]) ) + ( (\raz_inst|video_on_H~DUPLICATE_q  & \raz_inst|H_count [8]) ) + ( \soc_inst|pix1|Add0~26  ))
+// \soc_inst|pix1|Add0~30  = CARRY(( (\raz_inst|video_on_V~q  & \raz_inst|V_count [1]) ) + ( (\raz_inst|video_on_H~DUPLICATE_q  & \raz_inst|H_count [8]) ) + ( \soc_inst|pix1|Add0~26  ))
+
+	.dataa(!\raz_inst|video_on_H~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\raz_inst|video_on_V~q ),
+	.datad(!\raz_inst|V_count [1]),
+	.datae(gnd),
+	.dataf(!\raz_inst|H_count [8]),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add0~26 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~29_sumout ),
+	.cout(\soc_inst|pix1|Add0~30 ),
+	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] .power_up = "low";
+defparam \soc_inst|pix1|Add0~29 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~29 .lut_mask = 64'h0000FFAA0000000F;
+defparam \soc_inst|pix1|Add0~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y28_N25
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] (
+// Location: FF_X42_Y22_N26
+dffeas \raz_inst|video_on_V~DUPLICATE (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add0~13_sumout ),
+	.d(\raz_inst|LessThan8~4_combout ),
 	.asdata(vcc),
-	.clrn(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
 	.aload(gnd),
 	.sclr(gnd),
 	.sload(gnd),
-	.ena(vcc),
+	.ena(!tick_count[0]),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.q(\raz_inst|video_on_V~DUPLICATE_q ),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] .power_up = "low";
+defparam \raz_inst|video_on_V~DUPLICATE .is_wysiwyg = "true";
+defparam \raz_inst|video_on_V~DUPLICATE .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N15
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 (
+// Location: LABCELL_X42_Y22_N30
+cyclonev_lcell_comb \soc_inst|pix1|Add1~17 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout  & ( (\soc_inst|pix1|word_address [15] & (!\soc_inst|pix1|word_address [14] & 
-// \soc_inst|pix1|word_address [13])) ) )
+// \soc_inst|pix1|Add1~17_sumout  = SUM(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [2]) ) + ( (\raz_inst|H_count [9] & \raz_inst|video_on_H~q ) ) + ( !VCC ))
+// \soc_inst|pix1|Add1~18  = CARRY(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [2]) ) + ( (\raz_inst|H_count [9] & \raz_inst|video_on_H~q ) ) + ( !VCC ))
 
-	.dataa(!\soc_inst|pix1|word_address [15]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [14]),
-	.datad(!\soc_inst|pix1|word_address [13]),
+	.dataa(!\raz_inst|video_on_V~DUPLICATE_q ),
+	.datab(!\raz_inst|H_count [9]),
+	.datac(!\raz_inst|video_on_H~q ),
+	.datad(!\raz_inst|V_count [2]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout ),
+	.dataf(gnd),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~17_sumout ),
+	.cout(\soc_inst|pix1|Add1~18 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~17 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~17 .lut_mask = 64'h0000FCFC00000055;
+defparam \soc_inst|pix1|Add1~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y22_N6
+cyclonev_lcell_comb \soc_inst|pix1|Add0~33 (
+// Equation(s):
+// \soc_inst|pix1|Add0~33_sumout  = SUM(( (\raz_inst|video_on_V~q  & \raz_inst|V_count [0]) ) + ( \soc_inst|pix1|Add1~17_sumout  ) + ( \soc_inst|pix1|Add0~30  ))
+// \soc_inst|pix1|Add0~34  = CARRY(( (\raz_inst|video_on_V~q  & \raz_inst|V_count [0]) ) + ( \soc_inst|pix1|Add1~17_sumout  ) + ( \soc_inst|pix1|Add0~30  ))
+
+	.dataa(gnd),
+	.datab(!\raz_inst|video_on_V~q ),
+	.datac(!\soc_inst|pix1|Add1~17_sumout ),
+	.datad(!\raz_inst|V_count [0]),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add0~30 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~33_sumout ),
+	.cout(\soc_inst|pix1|Add0~34 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add0~33 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~33 .lut_mask = 64'h0000F0F000000033;
+defparam \soc_inst|pix1|Add0~33 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y22_N33
+cyclonev_lcell_comb \soc_inst|pix1|Add1~21 (
+// Equation(s):
+// \soc_inst|pix1|Add1~21_sumout  = SUM(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [3]) ) + ( GND ) + ( \soc_inst|pix1|Add1~18  ))
+// \soc_inst|pix1|Add1~22  = CARRY(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [3]) ) + ( GND ) + ( \soc_inst|pix1|Add1~18  ))
+
+	.dataa(!\raz_inst|video_on_V~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(!\raz_inst|V_count [3]),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add1~18 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~21_sumout ),
+	.cout(\soc_inst|pix1|Add1~22 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~21 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~21 .lut_mask = 64'h0000FFFF00000055;
+defparam \soc_inst|pix1|Add1~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y22_N9
+cyclonev_lcell_comb \soc_inst|pix1|Add0~37 (
+// Equation(s):
+// \soc_inst|pix1|Add0~37_sumout  = SUM(( \soc_inst|pix1|Add1~21_sumout  ) + ( (\raz_inst|V_count [1] & \raz_inst|video_on_V~q ) ) + ( \soc_inst|pix1|Add0~34  ))
+// \soc_inst|pix1|Add0~38  = CARRY(( \soc_inst|pix1|Add1~21_sumout  ) + ( (\raz_inst|V_count [1] & \raz_inst|video_on_V~q ) ) + ( \soc_inst|pix1|Add0~34  ))
+
+	.dataa(!\raz_inst|V_count [1]),
+	.datab(!\raz_inst|video_on_V~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|Add1~21_sumout ),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add0~34 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~37_sumout ),
+	.cout(\soc_inst|pix1|Add0~38 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add0~37 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~37 .lut_mask = 64'h0000EEEE000000FF;
+defparam \soc_inst|pix1|Add0~37 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y22_N36
+cyclonev_lcell_comb \soc_inst|pix1|Add1~25 (
+// Equation(s):
+// \soc_inst|pix1|Add1~25_sumout  = SUM(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [4]) ) + ( GND ) + ( \soc_inst|pix1|Add1~22  ))
+// \soc_inst|pix1|Add1~26  = CARRY(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [4]) ) + ( GND ) + ( \soc_inst|pix1|Add1~22  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|video_on_V~DUPLICATE_q ),
+	.datad(!\raz_inst|V_count [4]),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add1~22 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~25_sumout ),
+	.cout(\soc_inst|pix1|Add1~26 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~25 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~25 .lut_mask = 64'h0000FFFF0000000F;
+defparam \soc_inst|pix1|Add1~25 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y22_N12
+cyclonev_lcell_comb \soc_inst|pix1|Add0~41 (
+// Equation(s):
+// \soc_inst|pix1|Add0~41_sumout  = SUM(( (\raz_inst|video_on_V~q  & \raz_inst|V_count [2]) ) + ( \soc_inst|pix1|Add1~25_sumout  ) + ( \soc_inst|pix1|Add0~38  ))
+// \soc_inst|pix1|Add0~42  = CARRY(( (\raz_inst|video_on_V~q  & \raz_inst|V_count [2]) ) + ( \soc_inst|pix1|Add1~25_sumout  ) + ( \soc_inst|pix1|Add0~38  ))
+
+	.dataa(gnd),
+	.datab(!\raz_inst|video_on_V~q ),
+	.datac(!\soc_inst|pix1|Add1~25_sumout ),
+	.datad(!\raz_inst|V_count [2]),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add0~38 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~41_sumout ),
+	.cout(\soc_inst|pix1|Add0~42 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .lut_mask = 64'h0000000000500050;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|Add0~41 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~41 .lut_mask = 64'h0000F0F000000033;
+defparam \soc_inst|pix1|Add0~41 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X49_Y25_N0
+// Location: M10K_X49_Y22_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0_combout ),
 	.portare(vcc),
@@ -112627,37 +112881,18 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .mem_init1 = "
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: FF_X33_Y28_N19
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add0~17_sumout ),
-	.asdata(vcc),
-	.clrn(vcc),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
-	.prn(vcc));
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y28_N39
+// Location: LABCELL_X43_Y18_N51
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  = ( \soc_inst|pix1|word_address [18] & ( (!\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|write_enable~q  & (!\soc_inst|pix1|word_address [16] & !\soc_inst|pix1|word_address 
-// [17]))) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  = ( !\soc_inst|pix1|word_address [15] & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|write_enable~q  & (\soc_inst|pix1|word_address [18] & !\soc_inst|pix1|word_address 
+// [16]))) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [15]),
+	.dataa(!\soc_inst|pix1|word_address [17]),
 	.datab(!\soc_inst|pix1|write_enable~q ),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(!\soc_inst|pix1|word_address [17]),
+	.datac(!\soc_inst|pix1|word_address [18]),
+	.datad(!\soc_inst|pix1|word_address [16]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [18]),
+	.dataf(!\soc_inst|pix1|word_address [15]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -112667,130 +112902,104 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode30
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .lut_mask = 64'h0000000020002000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .lut_mask = 64'h0200020000000000;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y28_N36
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 (
+// Location: LABCELL_X43_Y20_N39
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( !\soc_inst|pix1|word_address [13] ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & \soc_inst|pix1|word_address [13]) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
+	.dataa(!\soc_inst|pix1|word_address [14]),
+	.datab(!\soc_inst|pix1|word_address [13]),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
+	.datae(gnd),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .lut_mask = 64'h00000000F0F00000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .lut_mask = 64'h0000000011111111;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y31_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
-\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
+// Location: FF_X23_Y17_N14
+dffeas \soc_inst|pix1|word_address[12] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|m0_1|u_logic|haddr_o~4_combout ),
+	.asdata(vcc),
+	.clrn(\KEY[2]~inputCLKENA0_outclk ),
+	.aload(gnd),
+	.sclr(\soc_inst|pix1|always0~0_combout ),
+	.sload(gnd),
+	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
+	.q(\soc_inst|pix1|word_address [12]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|word_address[12] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|word_address[12] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y28_N54
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 (
+// Location: LABCELL_X42_Y22_N39
+cyclonev_lcell_comb \soc_inst|pix1|Add1~29 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( \soc_inst|pix1|word_address [13] ) ) )
+// \soc_inst|pix1|Add1~29_sumout  = SUM(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [5]) ) + ( GND ) + ( \soc_inst|pix1|Add1~26  ))
+// \soc_inst|pix1|Add1~30  = CARRY(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [5]) ) + ( GND ) + ( \soc_inst|pix1|Add1~26  ))
 
-	.dataa(gnd),
+	.dataa(!\raz_inst|video_on_V~DUPLICATE_q ),
 	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
+	.datac(!\raz_inst|V_count [5]),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|pix1|Add1~26 ),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~29_sumout ),
+	.cout(\soc_inst|pix1|Add1~30 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .lut_mask = 64'h0000000000000F0F;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|Add1~29 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~29 .lut_mask = 64'h0000FFFF00000505;
+defparam \soc_inst|pix1|Add1~29 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y25_N0
+// Location: LABCELL_X43_Y22_N15
+cyclonev_lcell_comb \soc_inst|pix1|Add0~45 (
+// Equation(s):
+// \soc_inst|pix1|Add0~45_sumout  = SUM(( (\raz_inst|video_on_V~q  & \raz_inst|V_count [3]) ) + ( \soc_inst|pix1|Add1~29_sumout  ) + ( \soc_inst|pix1|Add0~42  ))
+// \soc_inst|pix1|Add0~46  = CARRY(( (\raz_inst|video_on_V~q  & \raz_inst|V_count [3]) ) + ( \soc_inst|pix1|Add1~29_sumout  ) + ( \soc_inst|pix1|Add0~42  ))
+
+	.dataa(!\soc_inst|pix1|Add1~29_sumout ),
+	.datab(!\raz_inst|video_on_V~q ),
+	.datac(!\raz_inst|V_count [3]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add0~42 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~45_sumout ),
+	.cout(\soc_inst|pix1|Add0~46 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add0~45 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~45 .lut_mask = 64'h0000AAAA00000303;
+defparam \soc_inst|pix1|Add0~45 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y24_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0_combout ),
 	.portare(vcc),
@@ -112861,16 +113070,16 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .mem_init1 = "
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y28_N27
+// Location: LABCELL_X43_Y20_N36
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout  = ( \soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( !\soc_inst|pix1|word_address [13] ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & !\soc_inst|pix1|word_address [13]) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [13]),
-	.datab(gnd),
+	.dataa(!\soc_inst|pix1|word_address [14]),
+	.datab(!\soc_inst|pix1|word_address [13]),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
+	.datae(gnd),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -112881,11 +113090,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode30
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .lut_mask = 64'h000000000000AAAA;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .lut_mask = 64'h0000000044444444;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y29_N0
+// Location: M10K_X38_Y22_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1_combout ),
 	.portare(vcc),
@@ -112956,16 +113165,85 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .mem_init1 = "
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y28_N21
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 (
+// Location: LABCELL_X42_Y22_N42
+cyclonev_lcell_comb \soc_inst|pix1|Add1~9 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( \soc_inst|pix1|word_address [13] ) ) )
+// \soc_inst|pix1|Add1~9_sumout  = SUM(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [6]) ) + ( GND ) + ( \soc_inst|pix1|Add1~30  ))
+// \soc_inst|pix1|Add1~10  = CARRY(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [6]) ) + ( GND ) + ( \soc_inst|pix1|Add1~30  ))
 
-	.dataa(!\soc_inst|pix1|word_address [13]),
+	.dataa(gnd),
 	.datab(gnd),
+	.datac(!\raz_inst|video_on_V~DUPLICATE_q ),
+	.datad(!\raz_inst|V_count [6]),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add1~30 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~9_sumout ),
+	.cout(\soc_inst|pix1|Add1~10 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~9 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~9 .lut_mask = 64'h0000FFFF0000000F;
+defparam \soc_inst|pix1|Add1~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y22_N18
+cyclonev_lcell_comb \soc_inst|pix1|Add0~17 (
+// Equation(s):
+// \soc_inst|pix1|Add0~17_sumout  = SUM(( \soc_inst|pix1|Add1~9_sumout  ) + ( (\raz_inst|video_on_V~q  & \raz_inst|V_count [4]) ) + ( \soc_inst|pix1|Add0~46  ))
+// \soc_inst|pix1|Add0~18  = CARRY(( \soc_inst|pix1|Add1~9_sumout  ) + ( (\raz_inst|video_on_V~q  & \raz_inst|V_count [4]) ) + ( \soc_inst|pix1|Add0~46  ))
+
+	.dataa(gnd),
+	.datab(!\raz_inst|video_on_V~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|Add1~9_sumout ),
+	.datae(gnd),
+	.dataf(!\raz_inst|V_count [4]),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add0~46 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~17_sumout ),
+	.cout(\soc_inst|pix1|Add0~18 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add0~17 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~17 .lut_mask = 64'h0000FFCC000000FF;
+defparam \soc_inst|pix1|Add0~17 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y22_N19
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|pix1|Add0~17_sumout ),
+	.asdata(vcc),
+	.clrn(vcc),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y20_N45
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [14] & \soc_inst|pix1|word_address [13]) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [14]),
+	.datab(!\soc_inst|pix1|word_address [13]),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
+	.datae(gnd),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -112976,11 +113254,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode30
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .lut_mask = 64'h0000000055550000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .lut_mask = 64'h0000000022222222;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y26_N0
+// Location: M10K_X14_Y20_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0_combout ),
 	.portare(vcc),
@@ -113051,70 +113329,369 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .mem_init1 = "
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y29_N12
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 (
+// Location: LABCELL_X42_Y22_N45
+cyclonev_lcell_comb \soc_inst|pix1|Add1~13 (
+// Equation(s):
+// \soc_inst|pix1|Add1~13_sumout  = SUM(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [7]) ) + ( GND ) + ( \soc_inst|pix1|Add1~10  ))
+// \soc_inst|pix1|Add1~14  = CARRY(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [7]) ) + ( GND ) + ( \soc_inst|pix1|Add1~10  ))
+
+	.dataa(!\raz_inst|video_on_V~DUPLICATE_q ),
+	.datab(gnd),
+	.datac(!\raz_inst|V_count [7]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add1~10 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~13_sumout ),
+	.cout(\soc_inst|pix1|Add1~14 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~13 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~13 .lut_mask = 64'h0000FFFF00000505;
+defparam \soc_inst|pix1|Add1~13 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y22_N21
+cyclonev_lcell_comb \soc_inst|pix1|Add0~21 (
+// Equation(s):
+// \soc_inst|pix1|Add0~21_sumout  = SUM(( (\raz_inst|video_on_V~q  & \raz_inst|V_count [5]) ) + ( \soc_inst|pix1|Add1~13_sumout  ) + ( \soc_inst|pix1|Add0~18  ))
+// \soc_inst|pix1|Add0~22  = CARRY(( (\raz_inst|video_on_V~q  & \raz_inst|V_count [5]) ) + ( \soc_inst|pix1|Add1~13_sumout  ) + ( \soc_inst|pix1|Add0~18  ))
+
+	.dataa(gnd),
+	.datab(!\raz_inst|video_on_V~q ),
+	.datac(!\soc_inst|pix1|Add1~13_sumout ),
+	.datad(!\raz_inst|V_count [5]),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add0~18 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~21_sumout ),
+	.cout(\soc_inst|pix1|Add0~22 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add0~21 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~21 .lut_mask = 64'h0000F0F000000033;
+defparam \soc_inst|pix1|Add0~21 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y22_N22
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|pix1|Add0~21_sumout ),
+	.asdata(vcc),
+	.clrn(vcc),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y20_N48
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( !\soc_inst|pix1|word_address [13] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout  ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0_combout ),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|word_address [14]),
+	.dataf(!\soc_inst|pix1|word_address [13]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .lut_mask = 64'h5555000000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y20_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
+\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y20_N24
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .lut_mask = 64'h000F3535F0FF3535;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y22_N23
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|pix1|Add0~21_sumout ),
+	.asdata(vcc),
+	.clrn(vcc),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y19_N3
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout  = ( !\soc_inst|pix1|word_address [13] & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [15] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout )) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [14]),
+	.datab(!\soc_inst|pix1|word_address [15]),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .lut_mask = 64'h0022002200000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X38_Y25_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
+\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y22_N48
+cyclonev_lcell_comb \soc_inst|pix1|Add1~5 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout  & \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ))) ) ) )
+// \soc_inst|pix1|Add1~5_sumout  = SUM(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [8]) ) + ( GND ) + ( \soc_inst|pix1|Add1~14  ))
+// \soc_inst|pix1|Add1~6  = CARRY(( (\raz_inst|video_on_V~DUPLICATE_q  & \raz_inst|V_count [8]) ) + ( GND ) + ( \soc_inst|pix1|Add1~14  ))
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33~portbdataout ),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\raz_inst|video_on_V~DUPLICATE_q ),
+	.datad(!\raz_inst|V_count [8]),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|pix1|Add1~14 ),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~5_sumout ),
+	.cout(\soc_inst|pix1|Add1~6 ),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .lut_mask = 64'h505F0303505FF3F3;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 .shared_arith = "off";
+defparam \soc_inst|pix1|Add1~5 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~5 .lut_mask = 64'h0000FFFF0000000F;
+defparam \soc_inst|pix1|Add1~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y28_N30
-cyclonev_lcell_comb \raz_inst|Red~0 (
+// Location: LABCELL_X43_Y22_N24
+cyclonev_lcell_comb \soc_inst|pix1|Add0~13 (
 // Equation(s):
-// \raz_inst|Red~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) # 
-// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) # ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout  & 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1])) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout )) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout  & 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2])) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ),
+// \soc_inst|pix1|Add0~13_sumout  = SUM(( \soc_inst|pix1|Add1~5_sumout  ) + ( (\raz_inst|video_on_V~q  & \raz_inst|V_count [6]) ) + ( \soc_inst|pix1|Add0~22  ))
+// \soc_inst|pix1|Add0~14  = CARRY(( \soc_inst|pix1|Add1~5_sumout  ) + ( (\raz_inst|video_on_V~q  & \raz_inst|V_count [6]) ) + ( \soc_inst|pix1|Add0~22  ))
+
+	.dataa(gnd),
+	.datab(!\raz_inst|video_on_V~q ),
+	.datac(!\raz_inst|V_count [6]),
+	.datad(!\soc_inst|pix1|Add1~5_sumout ),
+	.datae(gnd),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|pix1|Add0~22 ),
 	.sharein(gnd),
-	.combout(\raz_inst|Red~0_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~13_sumout ),
+	.cout(\soc_inst|pix1|Add0~14 ),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|Red~0 .extended_lut = "off";
-defparam \raz_inst|Red~0 .lut_mask = 64'h0404000CF4F4F0FC;
-defparam \raz_inst|Red~0 .shared_arith = "off";
+defparam \soc_inst|pix1|Add0~13 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~13 .lut_mask = 64'h0000FCFC000000FF;
+defparam \soc_inst|pix1|Add0~13 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y28_N28
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] (
+// Location: FF_X43_Y22_N25
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add0~9_sumout ),
+	.d(\soc_inst|pix1|Add0~13_sumout ),
 	.asdata(vcc),
 	.clrn(vcc),
 	.aload(gnd),
@@ -113123,65 +113700,93 @@ dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] (
 	.ena(vcc),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
 	.prn(vcc));
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] .power_up = "low";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] .power_up = "low";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N48
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 (
+// Location: LABCELL_X43_Y22_N48
+cyclonev_lcell_comb \raz_inst|Red~0 (
+// Equation(s):
+// \raz_inst|Red~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout  & 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout  ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0_combout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\raz_inst|Red~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \raz_inst|Red~0 .extended_lut = "off";
+defparam \raz_inst|Red~0 .lut_mask = 64'h333300F033335050;
+defparam \raz_inst|Red~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y18_N36
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout  = ( !\soc_inst|pix1|word_address [18] & ( (\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|write_enable~q  & (\soc_inst|pix1|word_address [13] & !\soc_inst|pix1|word_address 
-// [14]))) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout  = ( !\soc_inst|pix1|word_address [15] & ( (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|write_enable~q  & (!\soc_inst|pix1|word_address [16] & !\soc_inst|pix1|word_address 
+// [18]))) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [15]),
+	.dataa(!\soc_inst|pix1|word_address [17]),
 	.datab(!\soc_inst|pix1|write_enable~q ),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|word_address [16]),
+	.datad(!\soc_inst|pix1|word_address [18]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [18]),
+	.dataf(!\soc_inst|pix1|word_address [15]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .lut_mask = 64'h0100010000000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .lut_mask = 64'h1000100000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y28_N12
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1 (
+// Location: LABCELL_X43_Y19_N21
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout  & ( !\soc_inst|pix1|word_address [16] & ( \soc_inst|pix1|word_address [17] ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout  = ( \soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|word_address [14] & \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ) ) )
 
-	.dataa(gnd),
-	.datab(!\soc_inst|pix1|word_address [17]),
+	.dataa(!\soc_inst|pix1|word_address [14]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
 	.datac(gnd),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
-	.dataf(!\soc_inst|pix1|word_address [16]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1 .lut_mask = 64'h0000333300000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .lut_mask = 64'h0000000011111111;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y26_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1_combout ),
+// Location: M10K_X41_Y16_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113207,101 +113812,76 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y28_N24
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout  = ( !\soc_inst|pix1|word_address [18] & ( (\soc_inst|pix1|write_enable~q  & (\soc_inst|pix1|word_address [13] & \soc_inst|pix1|word_address [14])) ) )
-
-	.dataa(gnd),
-	.datab(!\soc_inst|pix1|write_enable~q ),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(!\soc_inst|pix1|word_address [14]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [18]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .lut_mask = 64'h0003000300000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N18
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1 (
+// Location: LABCELL_X43_Y19_N18
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & (!\soc_inst|pix1|word_address [16] & 
-// \soc_inst|pix1|word_address [15])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout  = ( !\soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|word_address [14] & \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [17]),
-	.datab(!\soc_inst|pix1|word_address [16]),
-	.datac(!\soc_inst|pix1|word_address [15]),
+	.dataa(!\soc_inst|pix1|word_address [14]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1 .lut_mask = 64'h0000000004040404;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .lut_mask = 64'h1111111100000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y22_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1_combout ),
+// Location: M10K_X41_Y20_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113327,101 +113907,171 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N33
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 (
+// Location: LABCELL_X43_Y19_N57
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout  = ( \soc_inst|pix1|word_address [15] & ( (!\soc_inst|pix1|word_address [18] & (!\soc_inst|pix1|word_address [14] & \soc_inst|pix1|write_enable~q )) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1_combout  = ( !\soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout  & !\soc_inst|pix1|word_address [14]) ) )
 
 	.dataa(gnd),
-	.datab(!\soc_inst|pix1|word_address [18]),
-	.datac(!\soc_inst|pix1|word_address [14]),
-	.datad(!\soc_inst|pix1|write_enable~q ),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|word_address [14]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [15]),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .lut_mask = 64'h0000000000C000C0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1 .lut_mask = 64'h0F000F0000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N6
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 (
+// Location: M10K_X38_Y15_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
+\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y19_N39
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & (!\soc_inst|pix1|word_address [16] & 
-// !\soc_inst|pix1|word_address [13])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|word_address [13] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout  ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [17]),
-	.datab(!\soc_inst|pix1|word_address [16]),
-	.datac(!\soc_inst|pix1|word_address [13]),
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
 	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
+	.datae(!\soc_inst|pix1|word_address [14]),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .lut_mask = 64'h0000000040404040;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .lut_mask = 64'h000000000F0F0000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y24_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ),
+// Location: M10K_X41_Y22_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113447,101 +114097,131 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N51
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 (
+// Location: LABCELL_X43_Y20_N18
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout  = (\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|write_enable~q  & (!\soc_inst|pix1|word_address [18] & \soc_inst|pix1|word_address [14])))
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout  & ( 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ) ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [15]),
-	.datab(!\soc_inst|pix1|write_enable~q ),
-	.datac(!\soc_inst|pix1|word_address [18]),
-	.datad(!\soc_inst|pix1|word_address [14]),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .lut_mask = 64'h00F035350FFF3535;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y18_N33
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout  = ( \soc_inst|pix1|write_enable~q  & ( (!\soc_inst|pix1|word_address [18] & (!\soc_inst|pix1|word_address [14] & \soc_inst|pix1|word_address [15])) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [18]),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|word_address [14]),
+	.datad(!\soc_inst|pix1|word_address [15]),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|pix1|write_enable~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .lut_mask = 64'h0010001000100010;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .lut_mask = 64'h0000000000A000A0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N21
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1 (
+// Location: LABCELL_X43_Y18_N15
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & (!\soc_inst|pix1|word_address [16] & 
-// !\soc_inst|pix1|word_address [13])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & (!\soc_inst|pix1|word_address [13] & 
+// \soc_inst|pix1|word_address [16])) ) )
 
 	.dataa(!\soc_inst|pix1|word_address [17]),
-	.datab(!\soc_inst|pix1|word_address [16]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [13]),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|word_address [13]),
+	.datad(!\soc_inst|pix1|word_address [16]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1 .lut_mask = 64'h0000000044004400;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1 .lut_mask = 64'h0000000000500050;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y21_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1_combout ),
+// Location: M10K_X41_Y26_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113567,131 +114247,101 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-// synopsys translate_on
-
-// Location: LABCELL_X42_Y28_N6
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ) ) ) ) # ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout )) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout )) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .lut_mask = 64'h11BB11BB0505AFAF;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N0
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 (
+// Location: LABCELL_X43_Y18_N6
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout  = ( !\soc_inst|pix1|word_address [16] & ( (!\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|write_enable~q  & (!\soc_inst|pix1|word_address [18] & \soc_inst|pix1|word_address 
-// [17]))) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout  = ( \soc_inst|pix1|write_enable~q  & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [18] & \soc_inst|pix1|word_address [13])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [15]),
-	.datab(!\soc_inst|pix1|write_enable~q ),
+	.dataa(gnd),
+	.datab(!\soc_inst|pix1|word_address [14]),
 	.datac(!\soc_inst|pix1|word_address [18]),
-	.datad(!\soc_inst|pix1|word_address [17]),
+	.datad(!\soc_inst|pix1|word_address [13]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [16]),
+	.dataf(!\soc_inst|pix1|write_enable~q ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .lut_mask = 64'h0020002000000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .lut_mask = 64'h0000000000300030;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N45
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 (
+// Location: LABCELL_X43_Y18_N9
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|word_address [13] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout  ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|word_address [15] & 
+// \soc_inst|pix1|word_address [16])) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
+	.dataa(!\soc_inst|pix1|word_address [17]),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|word_address [13]),
+	.datac(!\soc_inst|pix1|word_address [15]),
+	.datad(!\soc_inst|pix1|word_address [16]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .lut_mask = 64'h0000000000005555;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .lut_mask = 64'h0000000000050005;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y26_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0_combout ),
+// Location: M10K_X41_Y18_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113717,76 +114367,101 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N54
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 (
+// Location: LABCELL_X43_Y18_N21
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|word_address [13] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout  ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout  = ( \soc_inst|pix1|word_address [13] & ( (!\soc_inst|pix1|word_address [18] & (\soc_inst|pix1|write_enable~q  & (!\soc_inst|pix1|word_address [14] & \soc_inst|pix1|word_address 
+// [15]))) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|pix1|word_address [18]),
+	.datab(!\soc_inst|pix1|write_enable~q ),
+	.datac(!\soc_inst|pix1|word_address [14]),
+	.datad(!\soc_inst|pix1|word_address [15]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .lut_mask = 64'h0000000000200020;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y18_N12
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & \soc_inst|pix1|word_address [16]) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [17]),
 	.datab(gnd),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
+	.datac(!\soc_inst|pix1|word_address [16]),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|word_address [13]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .lut_mask = 64'h000000000F0F0000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .lut_mask = 64'h0000000005050505;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y24_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0_combout ),
+// Location: M10K_X49_Y18_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113812,76 +114487,101 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N24
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1 (
+// Location: LABCELL_X43_Y18_N45
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1_combout  = ( !\soc_inst|pix1|word_address [14] & ( !\soc_inst|pix1|word_address [13] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout  ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout  = ( \soc_inst|pix1|word_address [17] & ( (!\soc_inst|pix1|word_address [18] & (\soc_inst|pix1|write_enable~q  & \soc_inst|pix1|word_address [14])) ) )
 
-	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
+	.dataa(!\soc_inst|pix1|word_address [18]),
+	.datab(!\soc_inst|pix1|write_enable~q ),
+	.datac(!\soc_inst|pix1|word_address [14]),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|word_address [13]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [17]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1 .lut_mask = 64'h0F0F000000000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .lut_mask = 64'h0000000002020202;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X49_Y30_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1_combout ),
+// Location: LABCELL_X43_Y18_N54
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1_combout  = ( \soc_inst|pix1|word_address [15] & ( (\soc_inst|pix1|word_address [16] & (!\soc_inst|pix1|word_address [13] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout )) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [16]),
+	.datab(!\soc_inst|pix1|word_address [13]),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [15]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1 .lut_mask = 64'h0000000000440044;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X49_Y16_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -113907,76 +114607,135 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N39
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 (
+// Location: LABCELL_X43_Y20_N6
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout )))) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
+// (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout )))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout  & 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout )))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout  & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout )))) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .lut_mask = 64'h202570752A2F7A7F;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y18_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout  = ( \soc_inst|pix1|write_enable~q  & ( (!\soc_inst|pix1|word_address [18] & (\soc_inst|pix1|word_address [14] & \soc_inst|pix1|word_address [15])) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [18]),
+	.datab(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|word_address [15]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|write_enable~q ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .lut_mask = 64'h0000000002020202;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y18_N3
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( !\soc_inst|pix1|word_address [13] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout  ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1_combout  = ( !\soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout  & 
+// !\soc_inst|pix1|word_address [16])) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0_combout ),
+	.dataa(!\soc_inst|pix1|word_address [17]),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|word_address [16]),
+	.datae(gnd),
 	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .lut_mask = 64'h0000555500000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1 .lut_mask = 64'h0500050000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X49_Y28_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0_combout ),
+// Location: M10K_X38_Y16_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114002,111 +114761,77 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-// synopsys translate_on
-
-// Location: LABCELL_X42_Y28_N48
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1])))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout )))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1])))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout )))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout )))) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .lut_mask = 64'h0511AF1105BBAFBB;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N27
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 (
+// Location: LABCELL_X43_Y18_N0
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout  = ( \soc_inst|pix1|word_address [15] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout  & (\soc_inst|pix1|word_address [16] & 
-// \soc_inst|pix1|word_address [17])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|word_address [15] & 
+// !\soc_inst|pix1|word_address [16])) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
+	.dataa(!\soc_inst|pix1|word_address [17]),
 	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(!\soc_inst|pix1|word_address [17]),
+	.datac(!\soc_inst|pix1|word_address [15]),
+	.datad(!\soc_inst|pix1|word_address [16]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [15]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .lut_mask = 64'h0000000000050005;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1 .lut_mask = 64'h0000000005000500;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y28_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0_combout ),
+// Location: M10K_X41_Y14_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114132,101 +114857,77 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N57
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 (
+// Location: LABCELL_X43_Y18_N24
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout  = ( !\soc_inst|pix1|word_address [18] & ( (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|write_enable~q  & \soc_inst|pix1|word_address [14])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [16] & (!\soc_inst|pix1|word_address [13] & 
+// \soc_inst|pix1|word_address [17])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [17]),
-	.datab(!\soc_inst|pix1|write_enable~q ),
-	.datac(!\soc_inst|pix1|word_address [14]),
+	.dataa(!\soc_inst|pix1|word_address [16]),
+	.datab(!\soc_inst|pix1|word_address [13]),
+	.datac(!\soc_inst|pix1|word_address [17]),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [18]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .lut_mask = 64'h0101010100000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y28_N12
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1_combout  = ( \soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|word_address [15] & (!\soc_inst|pix1|word_address [13] & 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout )) ) )
-
-	.dataa(!\soc_inst|pix1|word_address [15]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0_combout ),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [16]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1 .lut_mask = 64'h0000000000500050;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .lut_mask = 64'h0000000008080808;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X49_Y24_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1_combout ),
+// Location: M10K_X38_Y18_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114252,76 +114953,76 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X36_Y28_N9
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 (
+// Location: LABCELL_X43_Y18_N57
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout  & ( \soc_inst|pix1|word_address [16] & ( \soc_inst|pix1|word_address [17] ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1_combout  = ( \soc_inst|pix1|word_address [17] & ( (!\soc_inst|pix1|word_address [16] & \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|pix1|word_address [16]),
 	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [17]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0_combout ),
-	.dataf(!\soc_inst|pix1|word_address [16]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [17]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .lut_mask = 64'h0000000000000F0F;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1 .lut_mask = 64'h000000000A0A0A0A;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y30_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0_combout ),
+// Location: M10K_X49_Y14_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114347,77 +115048,199 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y20_N0
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout )) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout  & \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout )) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21~portbdataout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .lut_mask = 64'h05F5030305F5F3F3;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X42_Y22_N51
+cyclonev_lcell_comb \soc_inst|pix1|Add1~1 (
+// Equation(s):
+// \soc_inst|pix1|Add1~1_sumout  = SUM(( GND ) + ( GND ) + ( \soc_inst|pix1|Add1~6  ))
+
+	.dataa(gnd),
+	.datab(gnd),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(gnd),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add1~6 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add1~1_sumout ),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add1~1 .extended_lut = "off";
+defparam \soc_inst|pix1|Add1~1 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|pix1|Add1~1 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y22_N27
+cyclonev_lcell_comb \soc_inst|pix1|Add0~9 (
+// Equation(s):
+// \soc_inst|pix1|Add0~9_sumout  = SUM(( \soc_inst|pix1|Add1~1_sumout  ) + ( (\raz_inst|video_on_V~q  & \raz_inst|V_count [7]) ) + ( \soc_inst|pix1|Add0~14  ))
+// \soc_inst|pix1|Add0~10  = CARRY(( \soc_inst|pix1|Add1~1_sumout  ) + ( (\raz_inst|video_on_V~q  & \raz_inst|V_count [7]) ) + ( \soc_inst|pix1|Add0~14  ))
+
+	.dataa(!\soc_inst|pix1|Add1~1_sumout ),
+	.datab(!\raz_inst|video_on_V~q ),
+	.datac(gnd),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\raz_inst|V_count [7]),
+	.datag(gnd),
+	.cin(\soc_inst|pix1|Add0~14 ),
+	.sharein(gnd),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~9_sumout ),
+	.cout(\soc_inst|pix1|Add0~10 ),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|Add0~9 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~9 .lut_mask = 64'h0000FFCC00005555;
+defparam \soc_inst|pix1|Add0~9 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: FF_X43_Y22_N29
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|pix1|Add0~9_sumout ),
+	.asdata(vcc),
+	.clrn(vcc),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.prn(vcc));
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] .power_up = "low";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y18_N48
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout  = ( !\soc_inst|pix1|word_address [15] & ( (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|write_enable~q  & !\soc_inst|pix1|word_address [18])) ) )
+
+	.dataa(!\soc_inst|pix1|word_address [17]),
+	.datab(!\soc_inst|pix1|write_enable~q ),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|word_address [18]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [15]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .lut_mask = 64'h1100110000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N9
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1 (
+// Location: LABCELL_X43_Y20_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout  & ( (\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|word_address [16] & 
-// !\soc_inst|pix1|word_address [13])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1_combout  = ( !\soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [13] & 
+// \soc_inst|pix1|word_address [16]) ) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [17]),
+	.dataa(!\soc_inst|pix1|word_address [13]),
 	.datab(!\soc_inst|pix1|word_address [16]),
 	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [13]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0_combout ),
+	.datad(gnd),
+	.datae(!\soc_inst|pix1|word_address [14]),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1 .lut_mask = 64'h0000000011001100;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1 .lut_mask = 64'h0000000022220000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X49_Y27_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1_combout ),
+// Location: M10K_X41_Y25_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -114443,119 +115266,61 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-// synopsys translate_on
-
-// Location: LABCELL_X42_Y28_N12
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]) # ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout  & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout )))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1])) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout ))) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & 
-// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout )))) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .lut_mask = 64'h010B515BA1ABF1FB;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y28_N3
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout  = ( !\soc_inst|pix1|word_address [18] & ( (!\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|write_enable~q  & \soc_inst|pix1|word_address [17])) ) )
-
-	.dataa(!\soc_inst|pix1|word_address [15]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|write_enable~q ),
-	.datad(!\soc_inst|pix1|word_address [17]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [18]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .lut_mask = 64'h000A000A00000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N12
+// Location: LABCELL_X43_Y20_N42
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout  & ( (\soc_inst|pix1|word_address [13] & 
-// \soc_inst|pix1|word_address [16]) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout  = ( \soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [13] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout )) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|pix1|word_address [14]),
 	.datab(!\soc_inst|pix1|word_address [13]),
-	.datac(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [16]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -114565,11 +115330,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode30
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .lut_mask = 64'h0000000000000303;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .lut_mask = 64'h0000000001010101;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X49_Y29_N0
+// Location: M10K_X41_Y24_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0_combout ),
 	.portare(vcc),
@@ -114640,7 +115405,7 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .mem_init1 = "
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N21
+// Location: LABCELL_X43_Y19_N15
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 (
 // Equation(s):
 // \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout  & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [13] & 
@@ -114648,8 +115413,8 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode30
 
 	.dataa(!\soc_inst|pix1|word_address [14]),
 	.datab(!\soc_inst|pix1|word_address [13]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|word_address [16]),
+	.datad(gnd),
 	.datae(gnd),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
 	.datag(gnd),
@@ -114661,11 +115426,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode30
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .lut_mask = 64'h0000000000440044;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .lut_mask = 64'h0000000004040404;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y29_N0
+// Location: M10K_X41_Y21_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0_combout ),
 	.portare(vcc),
@@ -114736,114 +115501,18 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .mem_init1 = "
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N3
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout  & ( (\soc_inst|pix1|word_address [16] & (!\soc_inst|pix1|word_address [13] & 
-// !\soc_inst|pix1|word_address [14])) ) )
-
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(!\soc_inst|pix1|word_address [13]),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [14]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1 .lut_mask = 64'h0000000044004400;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X38_Y29_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
-\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y28_N18
+// Location: LABCELL_X43_Y19_N12
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [13] & 
-// \soc_inst|pix1|word_address [16])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout  = ( \soc_inst|pix1|word_address [16] & ( (!\soc_inst|pix1|word_address [14] & (\soc_inst|pix1|word_address [13] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout )) ) )
 
 	.dataa(!\soc_inst|pix1|word_address [14]),
 	.datab(!\soc_inst|pix1|word_address [13]),
-	.datac(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|word_address [16]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -114857,7 +115526,7 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .l
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y30_N0
+// Location: M10K_X49_Y21_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0_combout ),
 	.portare(vcc),
@@ -114928,27 +115597,23 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .mem_init1 = "
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y29_N6
+// Location: LABCELL_X45_Y21_N36
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]) # ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0])))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout )))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0])))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout )))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout )))) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout  & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ) ) ) ) # ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ))) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ))) ) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24~portbdataout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27~portbdataout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -114958,26 +115623,26 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .lut_mask = 64'h0511AF1105BBAFBB;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .lut_mask = 64'h447744770303CFCF;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y28_N54
+// Location: LABCELL_X45_Y20_N39
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout )) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ))) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0_combout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3_combout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1_combout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2_combout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -114988,394 +115653,365 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .lut_mask = 64'h0A0A22775F5F2277;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .lut_mask = 64'h447703034477CFCF;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y27_N39
-cyclonev_lcell_comb \raz_inst|LessThan9~0 (
-// Equation(s):
-// \raz_inst|LessThan9~0_combout  = ( \raz_inst|Add0~13_sumout  & ( \raz_inst|Add0~1_sumout  & ( \raz_inst|LessThan2~3_combout  ) ) ) # ( !\raz_inst|Add0~13_sumout  & ( \raz_inst|Add0~1_sumout  & ( \raz_inst|LessThan2~3_combout  ) ) ) # ( 
-// \raz_inst|Add0~13_sumout  & ( !\raz_inst|Add0~1_sumout  & ( ((!\raz_inst|Add0~5_sumout  & !\raz_inst|Add0~9_sumout )) # (\raz_inst|LessThan2~3_combout ) ) ) ) # ( !\raz_inst|Add0~13_sumout  & ( !\raz_inst|Add0~1_sumout  ) )
-
-	.dataa(!\raz_inst|Add0~5_sumout ),
-	.datab(!\raz_inst|Add0~9_sumout ),
-	.datac(!\raz_inst|LessThan2~3_combout ),
-	.datad(gnd),
-	.datae(!\raz_inst|Add0~13_sumout ),
-	.dataf(!\raz_inst|Add0~1_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|LessThan9~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|LessThan9~0 .extended_lut = "off";
-defparam \raz_inst|LessThan9~0 .lut_mask = 64'hFFFF8F8F0F0F0F0F;
-defparam \raz_inst|LessThan9~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: FF_X29_Y27_N40
-dffeas \raz_inst|video_on_H (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|LessThan9~0_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(!tick_count[0]),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.q(\raz_inst|video_on_H~q ),
-	.prn(vcc));
-// synopsys translate_off
-defparam \raz_inst|video_on_H .is_wysiwyg = "true";
-defparam \raz_inst|video_on_H .power_up = "low";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y27_N54
-cyclonev_lcell_comb \raz_inst|LessThan6~0 (
-// Equation(s):
-// \raz_inst|LessThan6~0_combout  = ( \raz_inst|Add0~21_sumout  & ( !\raz_inst|LessThan2~3_combout  ) ) # ( !\raz_inst|Add0~21_sumout  & ( (\raz_inst|Add0~29_sumout  & (\raz_inst|Add0~25_sumout  & !\raz_inst|LessThan2~3_combout )) ) )
-
-	.dataa(!\raz_inst|Add0~29_sumout ),
-	.datab(!\raz_inst|Add0~25_sumout ),
-	.datac(!\raz_inst|LessThan2~3_combout ),
-	.datad(gnd),
-	.datae(!\raz_inst|Add0~21_sumout ),
-	.dataf(gnd),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|LessThan6~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|LessThan6~0 .extended_lut = "off";
-defparam \raz_inst|LessThan6~0 .lut_mask = 64'h1010F0F01010F0F0;
-defparam \raz_inst|LessThan6~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y27_N36
-cyclonev_lcell_comb \raz_inst|always0~0 (
+// Location: LABCELL_X43_Y22_N30
+cyclonev_lcell_comb \soc_inst|pix1|Add0~5 (
 // Equation(s):
-// \raz_inst|always0~0_combout  = ( \raz_inst|Add0~37_sumout  & ( \raz_inst|Add0~41_sumout  & ( (\raz_inst|Add0~33_sumout  & !\raz_inst|LessThan2~3_combout ) ) ) )
+// \soc_inst|pix1|Add0~5_sumout  = SUM(( GND ) + ( (\raz_inst|video_on_V~q  & \raz_inst|V_count [8]) ) + ( \soc_inst|pix1|Add0~10  ))
+// \soc_inst|pix1|Add0~6  = CARRY(( GND ) + ( (\raz_inst|video_on_V~q  & \raz_inst|V_count [8]) ) + ( \soc_inst|pix1|Add0~10  ))
 
 	.dataa(gnd),
-	.datab(!\raz_inst|Add0~33_sumout ),
-	.datac(!\raz_inst|LessThan2~3_combout ),
+	.datab(!\raz_inst|video_on_V~q ),
+	.datac(gnd),
 	.datad(gnd),
-	.datae(!\raz_inst|Add0~37_sumout ),
-	.dataf(!\raz_inst|Add0~41_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|always0~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|always0~0 .extended_lut = "off";
-defparam \raz_inst|always0~0 .lut_mask = 64'h0000000000003030;
-defparam \raz_inst|always0~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: MLABCELL_X28_Y27_N18
-cyclonev_lcell_comb \raz_inst|always0~1 (
-// Equation(s):
-// \raz_inst|always0~1_combout  = ( \raz_inst|Add0~5_sumout  & ( \raz_inst|Add0~9_sumout  & ( \raz_inst|Add0~13_sumout  ) ) ) # ( !\raz_inst|Add0~5_sumout  & ( \raz_inst|Add0~9_sumout  & ( \raz_inst|Add0~13_sumout  ) ) ) # ( \raz_inst|Add0~5_sumout  & ( 
-// !\raz_inst|Add0~9_sumout  & ( (\raz_inst|Add0~13_sumout  & (((\raz_inst|LessThan6~0_combout  & \raz_inst|always0~0_combout )) # (\raz_inst|Add0~17_sumout ))) ) ) )
-
-	.dataa(!\raz_inst|LessThan6~0_combout ),
-	.datab(!\raz_inst|Add0~17_sumout ),
-	.datac(!\raz_inst|always0~0_combout ),
-	.datad(!\raz_inst|Add0~13_sumout ),
-	.datae(!\raz_inst|Add0~5_sumout ),
-	.dataf(!\raz_inst|Add0~9_sumout ),
+	.datae(gnd),
+	.dataf(!\raz_inst|V_count [8]),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|pix1|Add0~10 ),
 	.sharein(gnd),
-	.combout(\raz_inst|always0~1_combout ),
-	.sumout(),
-	.cout(),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~5_sumout ),
+	.cout(\soc_inst|pix1|Add0~6 ),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|always0~1 .extended_lut = "off";
-defparam \raz_inst|always0~1 .lut_mask = 64'h0000003700FF00FF;
-defparam \raz_inst|always0~1 .shared_arith = "off";
+defparam \soc_inst|pix1|Add0~5 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~5 .lut_mask = 64'h0000FFCC00000000;
+defparam \soc_inst|pix1|Add0~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N39
-cyclonev_lcell_comb \raz_inst|LessThan10~2 (
+// Location: LABCELL_X43_Y22_N33
+cyclonev_lcell_comb \soc_inst|pix1|Add0~1 (
 // Equation(s):
-// \raz_inst|LessThan10~2_combout  = ( !\raz_inst|Add1~21_sumout  & ( !\raz_inst|Add1~17_sumout  ) )
+// \soc_inst|pix1|Add0~1_sumout  = SUM(( GND ) + ( GND ) + ( \soc_inst|pix1|Add0~6  ))
 
 	.dataa(gnd),
 	.datab(gnd),
-	.datac(!\raz_inst|Add1~17_sumout ),
+	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
-	.dataf(!\raz_inst|Add1~21_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|LessThan10~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \raz_inst|LessThan10~2 .extended_lut = "off";
-defparam \raz_inst|LessThan10~2 .lut_mask = 64'hF0F0F0F000000000;
-defparam \raz_inst|LessThan10~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X30_Y28_N54
-cyclonev_lcell_comb \raz_inst|LessThan10~3 (
-// Equation(s):
-// \raz_inst|LessThan10~3_combout  = ( \raz_inst|V_count [9] & ( \raz_inst|Equal0~3_combout  & ( (\raz_inst|LessThan10~2_combout  & (\raz_inst|Equal0~1_combout  & \raz_inst|Equal0~0_combout )) ) ) ) # ( !\raz_inst|V_count [9] & ( \raz_inst|Equal0~3_combout  
-// & ( (!\raz_inst|Equal0~1_combout  & (((!\raz_inst|V_count [10])))) # (\raz_inst|Equal0~1_combout  & ((!\raz_inst|Equal0~0_combout  & ((!\raz_inst|V_count [10]))) # (\raz_inst|Equal0~0_combout  & (\raz_inst|LessThan10~2_combout )))) ) ) ) # ( 
-// !\raz_inst|V_count [9] & ( !\raz_inst|Equal0~3_combout  & ( !\raz_inst|V_count [10] ) ) )
-
-	.dataa(!\raz_inst|LessThan10~2_combout ),
-	.datab(!\raz_inst|Equal0~1_combout ),
-	.datac(!\raz_inst|V_count [10]),
-	.datad(!\raz_inst|Equal0~0_combout ),
-	.datae(!\raz_inst|V_count [9]),
-	.dataf(!\raz_inst|Equal0~3_combout ),
+	.dataf(gnd),
 	.datag(gnd),
-	.cin(gnd),
+	.cin(\soc_inst|pix1|Add0~6 ),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan10~3_combout ),
-	.sumout(),
+	.combout(),
+	.sumout(\soc_inst|pix1|Add0~1_sumout ),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan10~3 .extended_lut = "off";
-defparam \raz_inst|LessThan10~3 .lut_mask = 64'hF0F00000F0D10011;
-defparam \raz_inst|LessThan10~3 .shared_arith = "off";
+defparam \soc_inst|pix1|Add0~1 .extended_lut = "off";
+defparam \soc_inst|pix1|Add0~1 .lut_mask = 64'h0000FFFF00000000;
+defparam \soc_inst|pix1|Add0~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N18
-cyclonev_lcell_comb \raz_inst|Equal0~2 (
-// Equation(s):
-// \raz_inst|Equal0~2_combout  = ( \raz_inst|Add0~5_sumout  & ( \raz_inst|Equal0~1_combout  & ( (\raz_inst|Add0~13_sumout  & (!\raz_inst|LessThan2~3_combout  & (!\raz_inst|Add0~1_sumout  & !\raz_inst|Add0~9_sumout ))) ) ) )
-
-	.dataa(!\raz_inst|Add0~13_sumout ),
-	.datab(!\raz_inst|LessThan2~3_combout ),
-	.datac(!\raz_inst|Add0~1_sumout ),
-	.datad(!\raz_inst|Add0~9_sumout ),
-	.datae(!\raz_inst|Add0~5_sumout ),
-	.dataf(!\raz_inst|Equal0~1_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|Equal0~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X43_Y22_N34
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|pix1|Add0~1_sumout ),
+	.asdata(vcc),
+	.clrn(vcc),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \raz_inst|Equal0~2 .extended_lut = "off";
-defparam \raz_inst|Equal0~2 .lut_mask = 64'h0000000000004000;
-defparam \raz_inst|Equal0~2 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y28_N0
-cyclonev_lcell_comb \raz_inst|LessThan10~1 (
-// Equation(s):
-// \raz_inst|LessThan10~1_combout  = ( \raz_inst|Equal0~0_combout  & ( \raz_inst|Add1~9_sumout  & ( (!\raz_inst|Equal0~2_combout  & (((\raz_inst|V_count [8] & \raz_inst|V_count [7])))) # (\raz_inst|Equal0~2_combout  & (\raz_inst|Add1~13_sumout )) ) ) ) # ( 
-// !\raz_inst|Equal0~0_combout  & ( \raz_inst|Add1~9_sumout  & ( (\raz_inst|V_count [8] & \raz_inst|V_count [7]) ) ) ) # ( \raz_inst|Equal0~0_combout  & ( !\raz_inst|Add1~9_sumout  & ( (\raz_inst|V_count [8] & (\raz_inst|V_count [7] & 
-// !\raz_inst|Equal0~2_combout )) ) ) ) # ( !\raz_inst|Equal0~0_combout  & ( !\raz_inst|Add1~9_sumout  & ( (\raz_inst|V_count [8] & \raz_inst|V_count [7]) ) ) )
-
-	.dataa(!\raz_inst|Add1~13_sumout ),
-	.datab(!\raz_inst|V_count [8]),
-	.datac(!\raz_inst|V_count [7]),
-	.datad(!\raz_inst|Equal0~2_combout ),
-	.datae(!\raz_inst|Equal0~0_combout ),
-	.dataf(!\raz_inst|Add1~9_sumout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\raz_inst|LessThan10~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
+// Location: FF_X43_Y22_N31
+dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] (
+	.clk(\CLOCK_50~inputCLKENA0_outclk ),
+	.d(\soc_inst|pix1|Add0~5_sumout ),
+	.asdata(vcc),
+	.clrn(vcc),
+	.aload(gnd),
+	.sclr(gnd),
+	.sload(gnd),
+	.ena(vcc),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4]),
+	.prn(vcc));
 // synopsys translate_off
-defparam \raz_inst|LessThan10~1 .extended_lut = "off";
-defparam \raz_inst|LessThan10~1 .lut_mask = 64'h0303030003030355;
-defparam \raz_inst|LessThan10~1 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] .is_wysiwyg = "true";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y28_N18
-cyclonev_lcell_comb \raz_inst|LessThan10~0 (
+// Location: LABCELL_X24_Y12_N30
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 (
 // Equation(s):
-// \raz_inst|LessThan10~0_combout  = ( \raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~2_combout  & ( (\raz_inst|Add1~5_sumout  & \raz_inst|Add1~1_sumout ) ) ) ) # ( !\raz_inst|Equal0~0_combout  & ( \raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [6] & 
-// \raz_inst|V_count [5]) ) ) ) # ( \raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [6] & \raz_inst|V_count [5]) ) ) ) # ( !\raz_inst|Equal0~0_combout  & ( !\raz_inst|Equal0~2_combout  & ( (\raz_inst|V_count [6] & 
-// \raz_inst|V_count [5]) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  = ( !\soc_inst|pix1|word_address [15] & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|write_enable~q  & !\soc_inst|pix1|word_address [18])) ) )
 
-	.dataa(!\raz_inst|Add1~5_sumout ),
-	.datab(!\raz_inst|V_count [6]),
-	.datac(!\raz_inst|V_count [5]),
-	.datad(!\raz_inst|Add1~1_sumout ),
-	.datae(!\raz_inst|Equal0~0_combout ),
-	.dataf(!\raz_inst|Equal0~2_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|pix1|word_address [17]),
+	.datac(!\soc_inst|pix1|write_enable~q ),
+	.datad(!\soc_inst|pix1|word_address [18]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [15]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan10~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan10~0 .extended_lut = "off";
-defparam \raz_inst|LessThan10~0 .lut_mask = 64'h0303030303030055;
-defparam \raz_inst|LessThan10~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .lut_mask = 64'h0C000C0000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y28_N36
-cyclonev_lcell_comb \raz_inst|LessThan10~4 (
+// Location: LABCELL_X43_Y19_N33
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 (
 // Equation(s):
-// \raz_inst|LessThan10~4_combout  = ( \raz_inst|LessThan10~1_combout  & ( \raz_inst|LessThan10~0_combout  & ( (\raz_inst|always0~4_combout  & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout ))) ) ) ) # ( !\raz_inst|LessThan10~1_combout  & ( 
-// \raz_inst|LessThan10~0_combout  & ( ((\raz_inst|always0~4_combout  & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) # (\raz_inst|LessThan10~3_combout ) ) ) ) # ( \raz_inst|LessThan10~1_combout  & ( !\raz_inst|LessThan10~0_combout  & ( 
-// ((\raz_inst|always0~4_combout  & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) # (\raz_inst|LessThan10~3_combout ) ) ) ) # ( !\raz_inst|LessThan10~1_combout  & ( !\raz_inst|LessThan10~0_combout  & ( ((\raz_inst|always0~4_combout  & 
-// ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) # (\raz_inst|LessThan10~3_combout ) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout  = ( \soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & (\soc_inst|pix1|word_address [16] & 
+// \soc_inst|pix1|word_address [14])) ) )
 
-	.dataa(!\raz_inst|always0~4_combout ),
-	.datab(!\raz_inst|always0~1_combout ),
-	.datac(!\raz_inst|LessThan10~3_combout ),
-	.datad(!\raz_inst|Add0~1_sumout ),
-	.datae(!\raz_inst|LessThan10~1_combout ),
-	.dataf(!\raz_inst|LessThan10~0_combout ),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(gnd),
+	.datad(!\soc_inst|pix1|word_address [14]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|LessThan10~4_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|LessThan10~4 .extended_lut = "off";
-defparam \raz_inst|LessThan10~4 .lut_mask = 64'h1F5F1F5F1F5F1155;
-defparam \raz_inst|LessThan10~4 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .lut_mask = 64'h0000000000110011;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y28_N38
-dffeas \raz_inst|video_on_V (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\raz_inst|LessThan10~4_combout ),
-	.asdata(vcc),
-	.clrn(\KEY[2]~inputCLKENA0_outclk ),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(!tick_count[0]),
+// Location: M10K_X49_Y23_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
+\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\raz_inst|video_on_V~q ),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \raz_inst|video_on_V .is_wysiwyg = "true";
-defparam \raz_inst|video_on_V .power_up = "low";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y28_N30
-cyclonev_lcell_comb \raz_inst|VGA_BLANK_N (
+// Location: LABCELL_X43_Y19_N24
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 (
 // Equation(s):
-// \raz_inst|VGA_BLANK_N~combout  = (\raz_inst|video_on_H~q  & \raz_inst|video_on_V~q )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout  = ( \soc_inst|pix1|word_address [13] & ( (!\soc_inst|pix1|word_address [16] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & 
+// \soc_inst|pix1|word_address [14])) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
-	.datac(!\raz_inst|video_on_H~q ),
-	.datad(!\raz_inst|video_on_V~q ),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|word_address [14]),
 	.datae(gnd),
-	.dataf(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\raz_inst|VGA_BLANK_N~combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \raz_inst|VGA_BLANK_N .extended_lut = "off";
-defparam \raz_inst|VGA_BLANK_N .lut_mask = 64'h000F000F000F000F;
-defparam \raz_inst|VGA_BLANK_N .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X33_Y28_N31
-dffeas \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] (
-	.clk(\CLOCK_50~inputCLKENA0_outclk ),
-	.d(\soc_inst|pix1|Add0~5_sumout ),
-	.asdata(vcc),
-	.clrn(vcc),
-	.aload(gnd),
-	.sclr(gnd),
-	.sload(gnd),
-	.ena(vcc),
+// Location: M10K_X49_Y25_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
+\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
 	.devclrn(devclrn),
 	.devpor(devpor),
-	.q(\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4]),
-	.prn(vcc));
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] .is_wysiwyg = "true";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] .power_up = "low";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y27_N51
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 (
+// Location: LABCELL_X43_Y18_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  = ( !\soc_inst|pix1|word_address [17] & ( !\soc_inst|pix1|word_address [18] & ( (\soc_inst|pix1|write_enable~q  & !\soc_inst|pix1|word_address [15]) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [18] & (\soc_inst|pix1|write_enable~q  & !\soc_inst|pix1|word_address [17])) ) )
 
-	.dataa(gnd),
+	.dataa(!\soc_inst|pix1|word_address [18]),
 	.datab(!\soc_inst|pix1|write_enable~q ),
-	.datac(!\soc_inst|pix1|word_address [15]),
+	.datac(!\soc_inst|pix1|word_address [17]),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [17]),
-	.dataf(!\soc_inst|pix1|word_address [18]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [14]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .lut_mask = 64'h3030000000000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .lut_mask = 64'h0000000020202020;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y27_N21
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 (
+// Location: LABCELL_X43_Y18_N27
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (\soc_inst|pix1|word_address [13] & 
-// !\soc_inst|pix1|word_address [16]) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout  = ( \soc_inst|pix1|word_address [15] & ( (\soc_inst|pix1|word_address [16] & (\soc_inst|pix1|word_address [13] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout )) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [13]),
-	.datab(gnd),
-	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [16]),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.dataa(!\soc_inst|pix1|word_address [16]),
+	.datab(!\soc_inst|pix1|word_address [13]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [15]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .lut_mask = 64'h0000000055000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .lut_mask = 64'h0000000001010101;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y27_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+// Location: M10K_X49_Y15_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -115401,77 +116037,77 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y27_N12
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 (
+// Location: LABCELL_X43_Y19_N45
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (\soc_inst|pix1|word_address [16] & 
-// \soc_inst|pix1|word_address [13]) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  = ( !\soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & 
+// \soc_inst|pix1|word_address [15])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|pix1|word_address [13]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|word_address [15]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [16]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .lut_mask = 64'h0000000005050000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .lut_mask = 64'h0003000300000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y23_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ),
+// Location: M10K_X41_Y23_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -115497,61 +116133,95 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X45_Y21_N12
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( 
+// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout )))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout )))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout )))) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .lut_mask = 64'h02A207A752F257F7;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N36
+// Location: LABCELL_X43_Y18_N39
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  = ( !\soc_inst|pix1|word_address [18] & ( (\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|write_enable~q  & (!\soc_inst|pix1|word_address [17] & !\soc_inst|pix1|word_address 
-// [14]))) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|write_enable~q  & (!\soc_inst|pix1|word_address [18] & \soc_inst|pix1|word_address 
+// [15]))) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [15]),
+	.dataa(!\soc_inst|pix1|word_address [17]),
 	.datab(!\soc_inst|pix1|write_enable~q ),
-	.datac(!\soc_inst|pix1|word_address [17]),
-	.datad(!\soc_inst|pix1|word_address [14]),
+	.datac(!\soc_inst|pix1|word_address [18]),
+	.datad(!\soc_inst|pix1|word_address [15]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [18]),
+	.dataf(!\soc_inst|pix1|word_address [14]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115561,18 +116231,18 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode27
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .lut_mask = 64'h1000100000000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .lut_mask = 64'h0020002000000000;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N51
+// Location: LABCELL_X43_Y20_N57
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [16] & \soc_inst|pix1|word_address [13]) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( (\soc_inst|pix1|word_address [13] & !\soc_inst|pix1|word_address [16]) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(!\soc_inst|pix1|word_address [13]),
-	.datac(gnd),
+	.dataa(!\soc_inst|pix1|word_address [13]),
+	.datab(gnd),
+	.datac(!\soc_inst|pix1|word_address [16]),
 	.datad(gnd),
 	.datae(gnd),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
@@ -115585,11 +116255,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode27
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .lut_mask = 64'h0000000022222222;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .lut_mask = 64'h0000000050505050;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y28_N0
+// Location: M10K_X38_Y23_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0_combout ),
 	.portare(vcc),
@@ -115660,33 +116330,225 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init1 = "0
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N9
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 (
+// Location: LABCELL_X43_Y20_N12
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( (\soc_inst|pix1|word_address [16] & \soc_inst|pix1|word_address [13]) ) )
+
+	.dataa(gnd),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|word_address [13]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .lut_mask = 64'h0000000003030303;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X26_Y25_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
+\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y19_N6
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 (
+// Equation(s):
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout  = ( \soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & (!\soc_inst|pix1|word_address [16] & 
+// !\soc_inst|pix1|word_address [14])) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|word_address [14]),
+	.datad(gnd),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
+	.datag(gnd),
+	.cin(gnd),
+	.sharein(gnd),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.sumout(),
+	.cout(),
+	.shareout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .lut_mask = 64'h0000000040404040;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 .shared_arith = "off";
+// synopsys translate_on
+
+// Location: M10K_X41_Y19_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0_combout ),
+	.portare(vcc),
+	.portaaddrstall(gnd),
+	.portbwe(gnd),
+	.portbre(vcc),
+	.portbaddrstall(gnd),
+	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
+	.clk1(gnd),
+	.ena0(vcc),
+	.ena1(vcc),
+	.ena2(vcc),
+	.ena3(vcc),
+	.clr0(gnd),
+	.clr1(gnd),
+	.nerror(vcc),
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
+\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+// synopsys translate_on
+
+// Location: LABCELL_X43_Y19_N9
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( (\soc_inst|pix1|word_address [16] & \soc_inst|pix1|word_address [13]) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout  = ( \soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & (\soc_inst|pix1|word_address [16] & 
+// !\soc_inst|pix1|word_address [14])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(!\soc_inst|pix1|word_address [13]),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datab(!\soc_inst|pix1|word_address [16]),
 	.datac(gnd),
-	.datad(gnd),
+	.datad(!\soc_inst|pix1|word_address [14]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .lut_mask = 64'h0000000011111111;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .lut_mask = 64'h0000000011001100;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X26_Y24_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0_combout ),
+// Location: M10K_X49_Y19_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -115712,66 +116574,66 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X29_Y28_N0
+// Location: LABCELL_X45_Y21_N24
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ))) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ) ) ) ) # ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout )) ) ) ) # ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout )) ) ) )
+
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13~portbdataout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -115781,62 +116643,38 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .lut_mask = 64'h505F3030505F3F3F;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .lut_mask = 64'h11BB11BB0505AFAF;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N54
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 (
+// Location: LABCELL_X43_Y19_N51
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  = ( !\soc_inst|pix1|word_address [18] & ( (!\soc_inst|pix1|word_address [17] & (\soc_inst|pix1|write_enable~q  & \soc_inst|pix1|word_address [14])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout  = ( !\soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & (\soc_inst|pix1|word_address [16] & 
+// \soc_inst|pix1|word_address [14])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [17]),
-	.datab(!\soc_inst|pix1|write_enable~q ),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datab(!\soc_inst|pix1|word_address [16]),
 	.datac(gnd),
 	.datad(!\soc_inst|pix1|word_address [14]),
 	.datae(gnd),
-	.dataf(!\soc_inst|pix1|word_address [18]),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .lut_mask = 64'h0022002200000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y28_N0
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & ( (\soc_inst|pix1|word_address [16] & (\soc_inst|pix1|word_address [13] & 
-// \soc_inst|pix1|word_address [15])) ) )
-
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(!\soc_inst|pix1|word_address [13]),
-	.datac(!\soc_inst|pix1|word_address [15]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .lut_mask = 64'h0000000001010101;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .lut_mask = 64'h0011001100000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y28_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0_combout ),
+// Location: M10K_X14_Y21_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -115862,77 +116700,77 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y27_N33
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 (
+// Location: LABCELL_X43_Y19_N27
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (\soc_inst|pix1|word_address [13] & 
-// !\soc_inst|pix1|word_address [16]) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout  = ( !\soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|word_address [14] & (!\soc_inst|pix1|word_address [16] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout )) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [13]),
-	.datab(gnd),
+	.dataa(!\soc_inst|pix1|word_address [14]),
+	.datab(!\soc_inst|pix1|word_address [16]),
 	.datac(gnd),
-	.datad(!\soc_inst|pix1|word_address [16]),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .lut_mask = 64'h0000000000005500;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .lut_mask = 64'h0044004400000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y25_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0_combout ),
+// Location: M10K_X38_Y19_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -115958,77 +116796,77 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y28_N45
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 (
+// Location: LABCELL_X43_Y19_N54
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout  = ( !\soc_inst|pix1|word_address [16] & ( (\soc_inst|pix1|word_address [15] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & 
-// \soc_inst|pix1|word_address [13])) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout  = ( \soc_inst|pix1|word_address [16] & ( (!\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|word_address [15] & 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout )) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [15]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
-	.datad(!\soc_inst|pix1|word_address [13]),
+	.dataa(gnd),
+	.datab(!\soc_inst|pix1|word_address [13]),
+	.datac(!\soc_inst|pix1|word_address [15]),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
 	.datae(gnd),
 	.dataf(!\soc_inst|pix1|word_address [16]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .lut_mask = 64'h0005000500000000;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .lut_mask = 64'h00000000000C000C;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X49_Y26_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0_combout ),
+// Location: M10K_X41_Y15_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -116054,77 +116892,77 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 (
 	.devclrn(devclrn),
 	.devpor(devpor),
 	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7_PORTBDATAOUT_bus ),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ),
 	.eccstatus(),
 	.dftout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y27_N36
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 (
+// Location: LABCELL_X43_Y19_N42
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (\soc_inst|pix1|word_address [16] & 
-// \soc_inst|pix1|word_address [13]) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout  = ( !\soc_inst|pix1|word_address [16] & ( (!\soc_inst|pix1|word_address [13] & (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & 
+// \soc_inst|pix1|word_address [15])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.dataa(gnd),
+	.datab(!\soc_inst|pix1|word_address [13]),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
+	.datad(!\soc_inst|pix1|word_address [15]),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [16]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .lut_mask = 64'h0000000000000505;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .lut_mask = 64'h000C000C00000000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y27_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0_combout ),
+// Location: M10K_X38_Y21_N0
+cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 (
+	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ),
 	.portare(vcc),
 	.portaaddrstall(gnd),
 	.portbwe(gnd),
@@ -116139,95 +116977,97 @@ cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 (
 	.clr0(gnd),
 	.clr1(gnd),
 	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
-\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
+	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
+\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
+	.portabyteenamasks(1'b1),
+	.portbdatain(1'b0),
+	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
+\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
+	.portbbyteenamasks(1'b1),
+	.devclrn(devclrn),
+	.devpor(devpor),
+	.portadataout(),
+	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ),
+	.eccstatus(),
+	.dftout());
+// synopsys translate_off
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .init_file_layout = "port_a";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mixed_port_feed_through_mode = "old";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .operation_mode = "dual_port";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_width = 13;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clear = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clock = "none";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_address = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_bit_number = 0;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_last_address = 8191;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_depth = 307200;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_width = 1;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_during_write_mode = "new_data_no_nbe_read";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_enable_clock = "clock0";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .ram_block_type = "M20K";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y28_N24
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 (
+// Location: LABCELL_X45_Y21_N54
+cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout  ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout  ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout  ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout  ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ) ) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ),
+	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ),
 	.sumout(),
 	.cout(),
 	.shareout());
 // synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .lut_mask = 64'h33330F0F00FF5555;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 .shared_arith = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .extended_lut = "off";
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .lut_mask = 64'h0A0A5F5F22772277;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N48
+// Location: LABCELL_X43_Y20_N54
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( (\soc_inst|pix1|word_address [16] & !\soc_inst|pix1|word_address [13]) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [13] & \soc_inst|pix1|word_address [16]) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(!\soc_inst|pix1|word_address [13]),
+	.dataa(!\soc_inst|pix1|word_address [13]),
+	.datab(!\soc_inst|pix1|word_address [16]),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
@@ -116241,11 +117081,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode28
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .lut_mask = 64'h0000000044444444;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .lut_mask = 64'h0000000022222222;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y21_N0
+// Location: M10K_X49_Y20_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0_combout ),
 	.portare(vcc),
@@ -116316,13 +117156,13 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init1 = "
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N6
+// Location: LABCELL_X43_Y20_N15
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [16] & !\soc_inst|pix1|word_address [13]) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [13] & !\soc_inst|pix1|word_address [16]) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(!\soc_inst|pix1|word_address [13]),
+	.dataa(!\soc_inst|pix1|word_address [13]),
+	.datab(!\soc_inst|pix1|word_address [16]),
 	.datac(gnd),
 	.datad(gnd),
 	.datae(gnd),
@@ -116340,7 +117180,7 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .l
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y20_N0
+// Location: M10K_X49_Y24_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1_combout ),
 	.portare(vcc),
@@ -116411,18 +117251,18 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init1 = "0
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y27_N0
+// Location: LABCELL_X43_Y19_N48
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout  = ( !\soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (\soc_inst|pix1|word_address [16] & 
-// !\soc_inst|pix1|word_address [13]) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout  = ( !\soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & (\soc_inst|pix1|word_address [16] & 
+// !\soc_inst|pix1|word_address [14])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|word_address [14]),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -116432,11 +117272,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode27
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .lut_mask = 64'h0000000050500000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .lut_mask = 64'h1010101000000000;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X38_Y27_N0
+// Location: M10K_X49_Y17_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2799w[3]~0_combout ),
 	.portare(vcc),
@@ -116507,18 +117347,18 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .mem_init1 = "0
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: MLABCELL_X39_Y27_N42
+// Location: LABCELL_X43_Y19_N30
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout  = ( !\soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [16] & 
-// !\soc_inst|pix1|word_address [13]) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout  = ( !\soc_inst|pix1|word_address [13] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & (!\soc_inst|pix1|word_address [16] & 
+// !\soc_inst|pix1|word_address [14])) ) )
 
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datab(!\soc_inst|pix1|word_address [16]),
+	.datac(!\soc_inst|pix1|word_address [14]),
 	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
+	.datae(gnd),
+	.dataf(!\soc_inst|pix1|word_address [13]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -116528,11 +117368,11 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode26
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .lut_mask = 64'h00000000A0A00000;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .lut_mask = 64'h4040404000000000;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: M10K_X41_Y31_N0
+// Location: M10K_X41_Y17_N0
 cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 (
 	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1_combout ),
 	.portare(vcc),
@@ -116603,23 +117443,23 @@ defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init1 = "0
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y28_N0
+// Location: LABCELL_X45_Y21_N6
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout )) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout )) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ) ) ) )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
+	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12~portbdataout ),
 	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a4~portbdataout ),
 	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8~portbdataout ),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0~portbdataout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -116629,449 +117469,31 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .lut_mask = 64'h00331D1DCCFF1D1D;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .lut_mask = 64'h0505AFAF11BB11BB;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X37_Y28_N33
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & ( (\soc_inst|pix1|word_address [15] & (!\soc_inst|pix1|word_address [13] & 
-// \soc_inst|pix1|word_address [16])) ) )
-
-	.dataa(!\soc_inst|pix1|word_address [15]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(!\soc_inst|pix1|word_address [16]),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .lut_mask = 64'h0000000000500050;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X38_Y22_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
-\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y27_N24
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (\soc_inst|pix1|word_address [16] & 
-// !\soc_inst|pix1|word_address [13]) ) ) )
-
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .lut_mask = 64'h0000000000005050;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X38_Y23_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
-\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-// synopsys translate_on
-
-// Location: LABCELL_X37_Y28_N30
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout  & ( (\soc_inst|pix1|word_address [15] & (!\soc_inst|pix1|word_address [13] & 
-// !\soc_inst|pix1|word_address [16])) ) )
-
-	.dataa(!\soc_inst|pix1|word_address [15]),
-	.datab(!\soc_inst|pix1|word_address [13]),
-	.datac(!\soc_inst|pix1|word_address [16]),
-	.datad(gnd),
-	.datae(gnd),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .lut_mask = 64'h0000000040404040;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X38_Y30_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
-\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-// synopsys translate_on
-
-// Location: MLABCELL_X39_Y27_N54
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout  = ( \soc_inst|pix1|word_address [14] & ( \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout  & ( (!\soc_inst|pix1|word_address [16] & 
-// !\soc_inst|pix1|word_address [13]) ) ) )
-
-	.dataa(!\soc_inst|pix1|word_address [16]),
-	.datab(gnd),
-	.datac(!\soc_inst|pix1|word_address [13]),
-	.datad(gnd),
-	.datae(!\soc_inst|pix1|word_address [14]),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0_combout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .lut_mask = 64'h000000000000A0A0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: M10K_X41_Y23_N0
-cyclonev_ram_block \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 (
-	.portawe(\soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0_combout ),
-	.portare(vcc),
-	.portaaddrstall(gnd),
-	.portbwe(gnd),
-	.portbre(vcc),
-	.portbaddrstall(gnd),
-	.clk0(\CLOCK_50~inputCLKENA0_outclk ),
-	.clk1(gnd),
-	.ena0(vcc),
-	.ena1(vcc),
-	.ena2(vcc),
-	.ena3(vcc),
-	.clr0(gnd),
-	.clr1(gnd),
-	.nerror(vcc),
-	.portadatain({\soc_inst|m0_1|u_logic|hwdata_o~5_combout }),
-	.portaaddr({\soc_inst|pix1|word_address [12],\soc_inst|pix1|word_address [11],\soc_inst|pix1|word_address [10],\soc_inst|pix1|word_address [9],\soc_inst|pix1|word_address [8],\soc_inst|pix1|word_address [7],\soc_inst|pix1|word_address [6],\soc_inst|pix1|word_address [5],\soc_inst|pix1|word_address [4],
-\soc_inst|pix1|word_address [3],\soc_inst|pix1|word_address [2],\soc_inst|pix1|word_address [1],\soc_inst|pix1|word_address [0]}),
-	.portabyteenamasks(1'b1),
-	.portbdatain(1'b0),
-	.portbaddr({\soc_inst|pix1|Add0~45_sumout ,\soc_inst|pix1|Add0~41_sumout ,\soc_inst|pix1|Add0~37_sumout ,\soc_inst|pix1|Add0~33_sumout ,\soc_inst|pix1|Add0~29_sumout ,\soc_inst|pix1|Add0~25_sumout ,\raz_inst|pixel_x[6]~6_combout ,\raz_inst|pixel_x[5]~5_combout ,
-\raz_inst|pixel_x[4]~4_combout ,\raz_inst|pixel_x[3]~3_combout ,\raz_inst|pixel_x[2]~2_combout ,\raz_inst|pixel_x[1]~1_combout ,\raz_inst|pixel_x[0]~0_combout }),
-	.portbbyteenamasks(1'b1),
-	.devclrn(devclrn),
-	.devpor(devpor),
-	.portadataout(),
-	.portbdataout(\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2_PORTBDATAOUT_bus ),
-	.eccstatus(),
-	.dftout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .init_file = "db/de1_soc_wrapper.ram0_ahb_pixel_memory_4146d53f.hdl.mif";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .init_file_layout = "port_a";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .logical_ram_name = "arm_soc:soc_inst|ahb_pixel_memory:pix1|altsyncram:memory_rtl_0|altsyncram_6ot1:auto_generated|ALTSYNCRAM";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mixed_port_feed_through_mode = "old";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .operation_mode = "dual_port";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_address_width = 13;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clear = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_out_clock = "none";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_data_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_address = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_first_bit_number = 0;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_last_address = 8191;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_depth = 307200;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_logical_ram_width = 1;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_during_write_mode = "new_data_no_nbe_read";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .port_b_read_enable_clock = "clock0";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .ram_block_type = "M20K";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init3 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init2 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init1 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 .mem_init0 = "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000";
-// synopsys translate_on
-
-// Location: LABCELL_X42_Y28_N18
-cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 (
-// Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout  & 
-// ((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout  & \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3])) # (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ))) ) ) ) # ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout  & ( !\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3] & 
-// ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2] & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout )))) ) ) )
-
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [2]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14~portbdataout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10~portbdataout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6~portbdataout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2~portbdataout ),
-	.datag(gnd),
-	.cin(gnd),
-	.sharein(gnd),
-	.combout(\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ),
-	.sumout(),
-	.cout(),
-	.shareout());
-// synopsys translate_off
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .lut_mask = 64'h001B551BAA1BFF1B;
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 .shared_arith = "off";
-// synopsys translate_on
-
-// Location: LABCELL_X42_Y28_N42
+// Location: LABCELL_X45_Y21_N30
 cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 (
 // Equation(s):
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( 
-// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout )))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( 
-// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1])))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ))))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1])))) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout )) # 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ))))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( 
-// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & 
-// (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout )) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1] & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ))))) ) ) )
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout  = ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( 
+// (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]) # ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( 
+// \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q )))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout )))) ) ) ) # ( \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q )))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ))) # 
+// (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout )))) ) ) ) # ( !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout  & ( 
+// !\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout  & ( (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0] & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & 
+// ((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q  & (\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout )))) ) ) )
 
 	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [0]),
-	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ),
-	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ),
-	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [1]),
-	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ),
-	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ),
+	.datab(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3_combout ),
+	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1_combout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE_q ),
+	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2_combout ),
+	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -117081,22 +117503,22 @@ cyclonev_lcell_comb \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux
 	.shareout());
 // synopsys translate_off
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .extended_lut = "off";
-defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .lut_mask = 64'h1105BB0511AFBBAF;
+defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .lut_mask = 64'h051105BBAF11AFBB;
 defparam \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X42_Y28_N36
+// Location: LABCELL_X42_Y22_N0
 cyclonev_lcell_comb \raz_inst|Red~1 (
 // Equation(s):
 // \raz_inst|Red~1_combout  = ( !\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4] & ( (\raz_inst|VGA_BLANK_N~combout  & ((!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5] & 
 // (((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout )))) # (\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5] & (\raz_inst|Red~0_combout  & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]))))) ) ) # 
-// ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4] & ( (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5] & (((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout  & (\raz_inst|VGA_BLANK_N~combout ))))) ) 
+// ( \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4] & ( (\raz_inst|VGA_BLANK_N~combout  & (((\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout  & (!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]))))) ) 
 // )
 
-	.dataa(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]),
+	.dataa(!\raz_inst|VGA_BLANK_N~combout ),
 	.datab(!\raz_inst|Red~0_combout ),
 	.datac(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4_combout ),
-	.datad(!\raz_inst|VGA_BLANK_N~combout ),
+	.datad(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [5]),
 	.datae(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [4]),
 	.dataf(!\soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4_combout ),
 	.datag(!\soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b [3]),
@@ -117108,22 +117530,21 @@ cyclonev_lcell_comb \raz_inst|Red~1 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|Red~1 .extended_lut = "on";
-defparam \raz_inst|Red~1 .lut_mask = 64'h0010000A00BA000A;
+defparam \raz_inst|Red~1 .lut_mask = 64'h0010050055100500;
 defparam \raz_inst|Red~1 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y27_N51
+// Location: LABCELL_X42_Y21_N54
 cyclonev_lcell_comb \raz_inst|always0~5 (
 // Equation(s):
-// \raz_inst|always0~5_combout  = ( \raz_inst|Add0~37_sumout  & ( \raz_inst|Add0~41_sumout  & ( !\raz_inst|LessThan2~3_combout  ) ) ) # ( !\raz_inst|Add0~37_sumout  & ( \raz_inst|Add0~41_sumout  & ( (!\raz_inst|LessThan2~3_combout  & 
-// (((\raz_inst|Add0~25_sumout  & \raz_inst|Add0~29_sumout )) # (\raz_inst|Add0~21_sumout ))) ) ) )
+// \raz_inst|always0~5_combout  = ( \raz_inst|Add0~41_sumout  & ( !\raz_inst|LessThan0~3_combout  & ( (((\raz_inst|Add0~29_sumout  & \raz_inst|Add0~25_sumout )) # (\raz_inst|Add0~37_sumout )) # (\raz_inst|Add0~21_sumout ) ) ) )
 
-	.dataa(!\raz_inst|LessThan2~3_combout ),
-	.datab(!\raz_inst|Add0~25_sumout ),
-	.datac(!\raz_inst|Add0~21_sumout ),
-	.datad(!\raz_inst|Add0~29_sumout ),
-	.datae(!\raz_inst|Add0~37_sumout ),
-	.dataf(!\raz_inst|Add0~41_sumout ),
+	.dataa(!\raz_inst|Add0~29_sumout ),
+	.datab(!\raz_inst|Add0~21_sumout ),
+	.datac(!\raz_inst|Add0~25_sumout ),
+	.datad(!\raz_inst|Add0~37_sumout ),
+	.datae(!\raz_inst|Add0~41_sumout ),
+	.dataf(!\raz_inst|LessThan0~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -117133,21 +117554,20 @@ cyclonev_lcell_comb \raz_inst|always0~5 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~5 .extended_lut = "off";
-defparam \raz_inst|always0~5 .lut_mask = 64'h000000000A2AAAAA;
+defparam \raz_inst|always0~5 .lut_mask = 64'h000037FF00000000;
 defparam \raz_inst|always0~5 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y27_N45
+// Location: LABCELL_X42_Y21_N3
 cyclonev_lcell_comb \raz_inst|always0~6 (
 // Equation(s):
-// \raz_inst|always0~6_combout  = ( \raz_inst|Add0~37_sumout  & ( \raz_inst|Add0~21_sumout  & ( \raz_inst|Add0~41_sumout  ) ) ) # ( !\raz_inst|Add0~37_sumout  & ( \raz_inst|Add0~21_sumout  & ( \raz_inst|Add0~41_sumout  ) ) ) # ( \raz_inst|Add0~37_sumout  & ( 
-// !\raz_inst|Add0~21_sumout  & ( \raz_inst|Add0~41_sumout  ) ) )
+// \raz_inst|always0~6_combout  = ( \raz_inst|Add0~21_sumout  & ( \raz_inst|Add0~41_sumout  ) ) # ( !\raz_inst|Add0~21_sumout  & ( (\raz_inst|Add0~37_sumout  & \raz_inst|Add0~41_sumout ) ) )
 
 	.dataa(gnd),
-	.datab(gnd),
+	.datab(!\raz_inst|Add0~37_sumout ),
 	.datac(!\raz_inst|Add0~41_sumout ),
 	.datad(gnd),
-	.datae(!\raz_inst|Add0~37_sumout ),
+	.datae(gnd),
 	.dataf(!\raz_inst|Add0~21_sumout ),
 	.datag(gnd),
 	.cin(gnd),
@@ -117158,23 +117578,23 @@ cyclonev_lcell_comb \raz_inst|always0~6 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~6 .extended_lut = "off";
-defparam \raz_inst|always0~6 .lut_mask = 64'h00000F0F0F0F0F0F;
+defparam \raz_inst|always0~6 .lut_mask = 64'h030303030F0F0F0F;
 defparam \raz_inst|always0~6 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: MLABCELL_X28_Y27_N12
+// Location: LABCELL_X42_Y21_N30
 cyclonev_lcell_comb \raz_inst|always0~7 (
 // Equation(s):
-// \raz_inst|always0~7_combout  = ( \raz_inst|always0~6_combout  & ( \raz_inst|Equal0~3_combout  & ( (!\raz_inst|LessThan2~3_combout  & ((!\raz_inst|Add0~17_sumout  & (!\raz_inst|always0~5_combout  & !\raz_inst|Add0~33_sumout )) # (\raz_inst|Add0~17_sumout  
-// & ((\raz_inst|Add0~33_sumout ))))) # (\raz_inst|LessThan2~3_combout  & (((!\raz_inst|always0~5_combout )))) ) ) ) # ( !\raz_inst|always0~6_combout  & ( \raz_inst|Equal0~3_combout  & ( (!\raz_inst|always0~5_combout  & (((!\raz_inst|Add0~17_sumout  & 
-// !\raz_inst|Add0~33_sumout )) # (\raz_inst|LessThan2~3_combout ))) ) ) ) # ( \raz_inst|always0~6_combout  & ( !\raz_inst|Equal0~3_combout  ) ) # ( !\raz_inst|always0~6_combout  & ( !\raz_inst|Equal0~3_combout  ) )
+// \raz_inst|always0~7_combout  = ( \raz_inst|Add0~17_sumout  & ( \raz_inst|LessThan0~3_combout  & ( (!\raz_inst|always0~5_combout ) # (!\raz_inst|Equal0~3_combout ) ) ) ) # ( !\raz_inst|Add0~17_sumout  & ( \raz_inst|LessThan0~3_combout  & ( 
+// (!\raz_inst|always0~5_combout ) # (!\raz_inst|Equal0~3_combout ) ) ) ) # ( \raz_inst|Add0~17_sumout  & ( !\raz_inst|LessThan0~3_combout  & ( (!\raz_inst|Equal0~3_combout ) # ((\raz_inst|Add0~33_sumout  & \raz_inst|always0~6_combout )) ) ) ) # ( 
+// !\raz_inst|Add0~17_sumout  & ( !\raz_inst|LessThan0~3_combout  & ( (!\raz_inst|Equal0~3_combout ) # ((!\raz_inst|always0~5_combout  & !\raz_inst|Add0~33_sumout )) ) ) )
 
-	.dataa(!\raz_inst|LessThan2~3_combout ),
-	.datab(!\raz_inst|Add0~17_sumout ),
-	.datac(!\raz_inst|always0~5_combout ),
-	.datad(!\raz_inst|Add0~33_sumout ),
-	.datae(!\raz_inst|always0~6_combout ),
-	.dataf(!\raz_inst|Equal0~3_combout ),
+	.dataa(!\raz_inst|always0~5_combout ),
+	.datab(!\raz_inst|Add0~33_sumout ),
+	.datac(!\raz_inst|always0~6_combout ),
+	.datad(!\raz_inst|Equal0~3_combout ),
+	.datae(!\raz_inst|Add0~17_sumout ),
+	.dataf(!\raz_inst|LessThan0~3_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -117184,11 +117604,11 @@ cyclonev_lcell_comb \raz_inst|always0~7 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~7 .extended_lut = "off";
-defparam \raz_inst|always0~7 .lut_mask = 64'hFFFFFFFFD050D072;
+defparam \raz_inst|always0~7 .lut_mask = 64'hFF88FF03FFAAFFAA;
 defparam \raz_inst|always0~7 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y28_N33
+// Location: LABCELL_X42_Y21_N39
 cyclonev_lcell_comb \raz_inst|VGA_HS~0 (
 // Equation(s):
 // \raz_inst|VGA_HS~0_combout  = ( !tick_count[0] & ( \KEY[2]~input_o  ) )
@@ -117212,7 +117632,7 @@ defparam \raz_inst|VGA_HS~0 .lut_mask = 64'h5555555500000000;
 defparam \raz_inst|VGA_HS~0 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X28_Y27_N13
+// Location: FF_X42_Y21_N31
 dffeas \raz_inst|VGA_HS (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|always0~7_combout ),
@@ -117231,17 +117651,17 @@ defparam \raz_inst|VGA_HS .is_wysiwyg = "true";
 defparam \raz_inst|VGA_HS .power_up = "low";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N51
+// Location: LABCELL_X45_Y22_N51
 cyclonev_lcell_comb \raz_inst|always0~9 (
 // Equation(s):
-// \raz_inst|always0~9_combout  = ( \raz_inst|V_count [1] & ( (!\raz_inst|V_count [0] & !\raz_inst|V_count [4]) ) ) # ( !\raz_inst|V_count [1] & ( (\raz_inst|V_count [0] & !\raz_inst|V_count [4]) ) )
+// \raz_inst|always0~9_combout  = ( \raz_inst|V_count [1] & ( (!\raz_inst|V_count [4] & !\raz_inst|V_count [0]) ) ) # ( !\raz_inst|V_count [1] & ( (!\raz_inst|V_count [4] & \raz_inst|V_count [0]) ) )
 
-	.dataa(!\raz_inst|V_count [0]),
+	.dataa(gnd),
 	.datab(gnd),
-	.datac(gnd),
-	.datad(!\raz_inst|V_count [4]),
-	.datae(!\raz_inst|V_count [1]),
-	.dataf(gnd),
+	.datac(!\raz_inst|V_count [4]),
+	.datad(!\raz_inst|V_count [0]),
+	.datae(gnd),
+	.dataf(!\raz_inst|V_count [1]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -117251,21 +117671,21 @@ cyclonev_lcell_comb \raz_inst|always0~9 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~9 .extended_lut = "off";
-defparam \raz_inst|always0~9 .lut_mask = 64'h5500AA005500AA00;
+defparam \raz_inst|always0~9 .lut_mask = 64'h00F000F0F000F000;
 defparam \raz_inst|always0~9 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N54
+// Location: LABCELL_X45_Y22_N54
 cyclonev_lcell_comb \raz_inst|always0~10 (
 // Equation(s):
-// \raz_inst|always0~10_combout  = ( !\raz_inst|V_count [9] & ( \raz_inst|always0~9_combout  & ( (!\raz_inst|V_count [10] & (\raz_inst|V_count [3] & \raz_inst|V_count [2])) ) ) )
+// \raz_inst|always0~10_combout  = ( \raz_inst|V_count [2] & ( (!\raz_inst|V_count [10] & (\raz_inst|V_count [3] & (\raz_inst|always0~9_combout  & !\raz_inst|V_count [9]))) ) )
 
-	.dataa(gnd),
-	.datab(!\raz_inst|V_count [10]),
-	.datac(!\raz_inst|V_count [3]),
-	.datad(!\raz_inst|V_count [2]),
-	.datae(!\raz_inst|V_count [9]),
-	.dataf(!\raz_inst|always0~9_combout ),
+	.dataa(!\raz_inst|V_count [10]),
+	.datab(!\raz_inst|V_count [3]),
+	.datac(!\raz_inst|always0~9_combout ),
+	.datad(!\raz_inst|V_count [9]),
+	.datae(gnd),
+	.dataf(!\raz_inst|V_count [2]),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -117275,21 +117695,21 @@ cyclonev_lcell_comb \raz_inst|always0~10 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~10 .extended_lut = "off";
-defparam \raz_inst|always0~10 .lut_mask = 64'h00000000000C0000;
+defparam \raz_inst|always0~10 .lut_mask = 64'h0000000002000200;
 defparam \raz_inst|always0~10 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X31_Y28_N36
+// Location: LABCELL_X45_Y22_N48
 cyclonev_lcell_comb \raz_inst|always0~8 (
 // Equation(s):
-// \raz_inst|always0~8_combout  = ( \raz_inst|Add1~29_sumout  & ( (!\raz_inst|Add1~33_sumout  & (\raz_inst|Add1~25_sumout  & (!\raz_inst|Add1~37_sumout  $ (!\raz_inst|Add1~41_sumout )))) ) )
+// \raz_inst|always0~8_combout  = ( \raz_inst|Add1~25_sumout  & ( (!\raz_inst|Add1~33_sumout  & (\raz_inst|Add1~29_sumout  & (!\raz_inst|Add1~41_sumout  $ (!\raz_inst|Add1~37_sumout )))) ) )
 
-	.dataa(!\raz_inst|Add1~37_sumout ),
+	.dataa(!\raz_inst|Add1~41_sumout ),
 	.datab(!\raz_inst|Add1~33_sumout ),
-	.datac(!\raz_inst|Add1~41_sumout ),
-	.datad(!\raz_inst|Add1~25_sumout ),
+	.datac(!\raz_inst|Add1~29_sumout ),
+	.datad(!\raz_inst|Add1~37_sumout ),
 	.datae(gnd),
-	.dataf(!\raz_inst|Add1~29_sumout ),
+	.dataf(!\raz_inst|Add1~25_sumout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -117299,23 +117719,23 @@ cyclonev_lcell_comb \raz_inst|always0~8 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~8 .extended_lut = "off";
-defparam \raz_inst|always0~8 .lut_mask = 64'h0000000000480048;
+defparam \raz_inst|always0~8 .lut_mask = 64'h0000000004080408;
 defparam \raz_inst|always0~8 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y28_N42
+// Location: LABCELL_X45_Y22_N42
 cyclonev_lcell_comb \raz_inst|always0~11 (
 // Equation(s):
-// \raz_inst|always0~11_combout  = ( \raz_inst|always0~8_combout  & ( \raz_inst|Equal0~3_combout  & ( (!\raz_inst|Equal0~1_combout  & (\raz_inst|always0~10_combout )) # (\raz_inst|Equal0~1_combout  & ((!\raz_inst|Equal0~0_combout  & 
-// (\raz_inst|always0~10_combout )) # (\raz_inst|Equal0~0_combout  & ((\raz_inst|LessThan10~2_combout ))))) ) ) ) # ( !\raz_inst|always0~8_combout  & ( \raz_inst|Equal0~3_combout  & ( (\raz_inst|always0~10_combout  & ((!\raz_inst|Equal0~1_combout ) # 
-// (!\raz_inst|Equal0~0_combout ))) ) ) ) # ( \raz_inst|always0~8_combout  & ( !\raz_inst|Equal0~3_combout  & ( \raz_inst|always0~10_combout  ) ) ) # ( !\raz_inst|always0~8_combout  & ( !\raz_inst|Equal0~3_combout  & ( \raz_inst|always0~10_combout  ) ) )
+// \raz_inst|always0~11_combout  = ( \raz_inst|LessThan8~2_combout  & ( \raz_inst|Equal0~0_combout  & ( (!\raz_inst|Equal0~1_combout  & (\raz_inst|always0~10_combout )) # (\raz_inst|Equal0~1_combout  & ((!\raz_inst|Equal0~3_combout  & 
+// (\raz_inst|always0~10_combout )) # (\raz_inst|Equal0~3_combout  & ((\raz_inst|always0~8_combout ))))) ) ) ) # ( !\raz_inst|LessThan8~2_combout  & ( \raz_inst|Equal0~0_combout  & ( (\raz_inst|always0~10_combout  & ((!\raz_inst|Equal0~1_combout ) # 
+// (!\raz_inst|Equal0~3_combout ))) ) ) ) # ( \raz_inst|LessThan8~2_combout  & ( !\raz_inst|Equal0~0_combout  & ( \raz_inst|always0~10_combout  ) ) ) # ( !\raz_inst|LessThan8~2_combout  & ( !\raz_inst|Equal0~0_combout  & ( \raz_inst|always0~10_combout  ) ) )
 
 	.dataa(!\raz_inst|always0~10_combout ),
 	.datab(!\raz_inst|Equal0~1_combout ),
-	.datac(!\raz_inst|LessThan10~2_combout ),
-	.datad(!\raz_inst|Equal0~0_combout ),
-	.datae(!\raz_inst|always0~8_combout ),
-	.dataf(!\raz_inst|Equal0~3_combout ),
+	.datac(!\raz_inst|always0~8_combout ),
+	.datad(!\raz_inst|Equal0~3_combout ),
+	.datae(!\raz_inst|LessThan8~2_combout ),
+	.dataf(!\raz_inst|Equal0~0_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -117329,18 +117749,18 @@ defparam \raz_inst|always0~11 .lut_mask = 64'h5555555555445547;
 defparam \raz_inst|always0~11 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: LABCELL_X30_Y28_N15
+// Location: LABCELL_X42_Y22_N6
 cyclonev_lcell_comb \raz_inst|always0~12 (
 // Equation(s):
-// \raz_inst|always0~12_combout  = ( \raz_inst|LessThan10~1_combout  & ( \raz_inst|LessThan10~0_combout  & ( (!\raz_inst|always0~11_combout ) # ((\raz_inst|always0~4_combout  & ((\raz_inst|always0~1_combout ) # (\raz_inst|Add0~1_sumout )))) ) ) ) # ( 
-// !\raz_inst|LessThan10~1_combout  & ( \raz_inst|LessThan10~0_combout  ) ) # ( \raz_inst|LessThan10~1_combout  & ( !\raz_inst|LessThan10~0_combout  ) ) # ( !\raz_inst|LessThan10~1_combout  & ( !\raz_inst|LessThan10~0_combout  ) )
+// \raz_inst|always0~12_combout  = ( \raz_inst|always0~11_combout  & ( \raz_inst|LessThan8~1_combout  & ( (!\raz_inst|LessThan8~0_combout ) # ((\raz_inst|always0~4_combout  & ((\raz_inst|Add0~1_sumout ) # (\raz_inst|always0~1_combout )))) ) ) ) # ( 
+// !\raz_inst|always0~11_combout  & ( \raz_inst|LessThan8~1_combout  ) ) # ( \raz_inst|always0~11_combout  & ( !\raz_inst|LessThan8~1_combout  ) ) # ( !\raz_inst|always0~11_combout  & ( !\raz_inst|LessThan8~1_combout  ) )
 
-	.dataa(!\raz_inst|Add0~1_sumout ),
-	.datab(!\raz_inst|always0~1_combout ),
-	.datac(!\raz_inst|always0~11_combout ),
-	.datad(!\raz_inst|always0~4_combout ),
-	.datae(!\raz_inst|LessThan10~1_combout ),
-	.dataf(!\raz_inst|LessThan10~0_combout ),
+	.dataa(!\raz_inst|always0~1_combout ),
+	.datab(!\raz_inst|always0~4_combout ),
+	.datac(!\raz_inst|Add0~1_sumout ),
+	.datad(!\raz_inst|LessThan8~0_combout ),
+	.datae(!\raz_inst|always0~11_combout ),
+	.dataf(!\raz_inst|LessThan8~1_combout ),
 	.datag(gnd),
 	.cin(gnd),
 	.sharein(gnd),
@@ -117350,11 +117770,11 @@ cyclonev_lcell_comb \raz_inst|always0~12 (
 	.shareout());
 // synopsys translate_off
 defparam \raz_inst|always0~12 .extended_lut = "off";
-defparam \raz_inst|always0~12 .lut_mask = 64'hFFFFFFFFFFFFF0F7;
+defparam \raz_inst|always0~12 .lut_mask = 64'hFFFFFFFFFFFFFF13;
 defparam \raz_inst|always0~12 .shared_arith = "off";
 // synopsys translate_on
 
-// Location: FF_X30_Y28_N16
+// Location: FF_X42_Y22_N7
 dffeas \raz_inst|VGA_VS (
 	.clk(\CLOCK_50~inputCLKENA0_outclk ),
 	.d(\raz_inst|always0~12_combout ),
@@ -117384,7 +117804,7 @@ defparam \KEY[3]~input .bus_hold = "false";
 defparam \KEY[3]~input .simulate_z_as = "z";
 // synopsys translate_on
 
-// Location: LABCELL_X73_Y26_N0
+// Location: LABCELL_X29_Y5_N0
 cyclonev_lcell_comb \~QUARTUS_CREATED_GND~I (
 // Equation(s):
 
diff --git a/simulation/modelsim/de1_soc_wrapper_modelsim.xrf b/simulation/modelsim/de1_soc_wrapper_modelsim.xrf
index e9ab2b05869385b58c9c6ccdcbd80c9a07bd7a7c..d69a9de03b219e12a695ae799488be6774576f16 100644
--- a/simulation/modelsim/de1_soc_wrapper_modelsim.xrf
+++ b/simulation/modelsim/de1_soc_wrapper_modelsim.xrf
@@ -150,4127 +150,4081 @@ instance = comp, \tick_count[24] , tick_count[24], de1_soc_wrapper, 1
 instance = comp, \Add0~1 , Add0~1, de1_soc_wrapper, 1
 instance = comp, \tick_count[25] , tick_count[25], de1_soc_wrapper, 1
 instance = comp, \heartbeat~0 , heartbeat~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE , soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tki2z4 , soc_inst|m0_1|u_logic|Tki2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9pvx4~0 , soc_inst|m0_1|u_logic|M9pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S5pvx4 , soc_inst|m0_1|u_logic|S5pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Emi2z4 , soc_inst|m0_1|u_logic|Emi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xx2wx4 , soc_inst|m0_1|u_logic|Xx2wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~0 , soc_inst|m0_1|u_logic|Hdh2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ark2z4 , soc_inst|m0_1|u_logic|Ark2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z1ewx4~0 , soc_inst|m0_1|u_logic|Z1ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fij2z4 , soc_inst|m0_1|u_logic|Fij2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2lwx4~0 , soc_inst|m0_1|u_logic|G2lwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Howvx4~0 , soc_inst|m0_1|u_logic|Howvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2lwx4 , soc_inst|m0_1|u_logic|G2lwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pcyvx4 , soc_inst|m0_1|u_logic|Pcyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9yvx4 , soc_inst|m0_1|u_logic|C9yvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dplwx4~0 , soc_inst|m0_1|u_logic|Dplwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cllwx4~0 , soc_inst|m0_1|u_logic|Cllwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~1 , soc_inst|m0_1|u_logic|Hdh2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE , soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Socwx4~0 , soc_inst|m0_1|u_logic|Socwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q5c2z4~0 , soc_inst|m0_1|u_logic|Q5c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G97wx4~0 , soc_inst|m0_1|u_logic|G97wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~1 , soc_inst|m0_1|u_logic|Z5pvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sy2wx4~0 , soc_inst|m0_1|u_logic|Sy2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 , soc_inst|interconnect_1|HSEL_SIGNALS[1]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|mux_sel[1] , soc_inst|interconnect_1|mux_sel[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hsize_o~0 , soc_inst|m0_1|u_logic|hsize_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfdwx4~0 , soc_inst|m0_1|u_logic|Qfdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfd2z4~0 , soc_inst|m0_1|u_logic|Kfd2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duc2z4~0 , soc_inst|m0_1|u_logic|Duc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE , soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE , soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B8c2z4~0 , soc_inst|m0_1|u_logic|B8c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aok2z4 , soc_inst|m0_1|u_logic|Aok2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Orewx4~0 , soc_inst|m0_1|u_logic|Orewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ibrwx4~0 , soc_inst|m0_1|u_logic|Ibrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxx2z4 , soc_inst|m0_1|u_logic|Hxx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ju5wx4 , soc_inst|m0_1|u_logic|Ju5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vbovx4~0 , soc_inst|m0_1|u_logic|Vbovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zlnvx4~0 , soc_inst|m0_1|u_logic|Zlnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nbm2z4 , soc_inst|m0_1|u_logic|Nbm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwqvx4~0 , soc_inst|m0_1|u_logic|Lwqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE , soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ncqvx4~0 , soc_inst|m0_1|u_logic|Ncqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P1c2z4~0 , soc_inst|m0_1|u_logic|P1c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Npk2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|A0zvx4~0 , soc_inst|m0_1|u_logic|A0zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z7fwx4~0 , soc_inst|m0_1|u_logic|Z7fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zzb2z4~0 , soc_inst|m0_1|u_logic|Zzb2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G0c2z4~0 , soc_inst|m0_1|u_logic|G0c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~0 , soc_inst|m0_1|u_logic|Jyb2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhiwx4~0 , soc_inst|m0_1|u_logic|Xhiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~1 , soc_inst|m0_1|u_logic|Jyb2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~2 , soc_inst|m0_1|u_logic|Jyb2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G9w2z4 , soc_inst|m0_1|u_logic|G9w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9t2z4 , soc_inst|m0_1|u_logic|Y9t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahwvx4~0 , soc_inst|m0_1|u_logic|Ahwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Csewx4~0 , soc_inst|m0_1|u_logic|Csewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4 , soc_inst|m0_1|u_logic|Pdi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~0 , soc_inst|m0_1|u_logic|Eyhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1vvx4~0 , soc_inst|m0_1|u_logic|B1vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp3wx4~0 , soc_inst|m0_1|u_logic|Qp3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ae6wx4~0 , soc_inst|m0_1|u_logic|Ae6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffxvx4~0 , soc_inst|m0_1|u_logic|Ffxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V1yvx4~0 , soc_inst|m0_1|u_logic|V1yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md6wx4~0 , soc_inst|m0_1|u_logic|Md6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~0 , soc_inst|m0_1|u_logic|Dc6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~1 , soc_inst|m0_1|u_logic|Dc6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lny2z4 , soc_inst|m0_1|u_logic|Lny2z4, de1_soc_wrapper, 1
-instance = comp, \SW[6]~input , SW[6]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|mux_sel[2] , soc_inst|interconnect_1|mux_sel[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[25]~1 , soc_inst|interconnect_1|HRDATA[25]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|mux_sel[0] , soc_inst|interconnect_1|mux_sel[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|Equal1~0 , soc_inst|interconnect_1|Equal1~0, de1_soc_wrapper, 1
+instance = comp, \SW[9]~input , SW[9]~input, de1_soc_wrapper, 1
 instance = comp, \KEY[1]~input , KEY[1]~input, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|last_buttons[1]~0 , soc_inst|switches_1|last_buttons[1]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|last_buttons[1] , soc_inst|switches_1|last_buttons[1], de1_soc_wrapper, 1
 instance = comp, \soc_inst|switches_1|always0~0 , soc_inst|switches_1|always0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][6] , soc_inst|switches_1|switch_store[1][6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte0~0 , soc_inst|ram_1|byte0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[0] , soc_inst|ram_1|byte_select[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][9] , soc_inst|switches_1|switch_store[1][9], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nsk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xkfwx4~0 , soc_inst|m0_1|u_logic|Xkfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8t2z4 , soc_inst|m0_1|u_logic|L8t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A4c2z4~0 , soc_inst|m0_1|u_logic|A4c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sy2wx4~0 , soc_inst|m0_1|u_logic|Sy2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kryvx4~0 , soc_inst|m0_1|u_logic|Kryvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B73wx4 , soc_inst|m0_1|u_logic|B73wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9yvx4 , soc_inst|m0_1|u_logic|C9yvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~1 , soc_inst|m0_1|u_logic|Hklwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ffj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ark2z4 , soc_inst|m0_1|u_logic|Ark2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~1 , soc_inst|m0_1|u_logic|Hdh2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~0 , soc_inst|m0_1|u_logic|Qr42z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~1 , soc_inst|m0_1|u_logic|Qr42z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5t2z4 , soc_inst|m0_1|u_logic|O5t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~0 , soc_inst|m0_1|u_logic|Gzvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1vvx4~0 , soc_inst|m0_1|u_logic|B1vvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jp3wx4 , soc_inst|m0_1|u_logic|Jp3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X77wx4 , soc_inst|m0_1|u_logic|X77wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H0zvx4~0 , soc_inst|m0_1|u_logic|H0zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~1 , soc_inst|m0_1|u_logic|Gzvvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Howvx4~0 , soc_inst|m0_1|u_logic|Howvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bxcwx4~0 , soc_inst|m0_1|u_logic|Bxcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lu6wx4~0 , soc_inst|m0_1|u_logic|Lu6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wxcwx4~0 , soc_inst|m0_1|u_logic|Wxcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Emi2z4 , soc_inst|m0_1|u_logic|Emi2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~0 , soc_inst|m0_1|u_logic|Y1d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~1 , soc_inst|m0_1|u_logic|Y1d2z4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wdxvx4~0 , soc_inst|m0_1|u_logic|Wdxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~1 , soc_inst|m0_1|u_logic|Y1d2z4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y1d2z4~2 , soc_inst|m0_1|u_logic|Y1d2z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|K1wvx4 , soc_inst|m0_1|u_logic|K1wvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W28wx4~0 , soc_inst|m0_1|u_logic|W28wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Egkwx4~0 , soc_inst|m0_1|u_logic|Egkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~3 , soc_inst|m0_1|u_logic|Df3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~4 , soc_inst|m0_1|u_logic|Df3wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xiwvx4~0 , soc_inst|m0_1|u_logic|Xiwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[3] , soc_inst|ram_1|byte_select[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~0 , soc_inst|m0_1|u_logic|H9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G36wx4~0 , soc_inst|m0_1|u_logic|G36wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|O9qvx4~0 , soc_inst|m0_1|u_logic|O9qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jppvx4~0 , soc_inst|m0_1|u_logic|Jppvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A76wx4~0 , soc_inst|m0_1|u_logic|A76wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O76wx4 , soc_inst|m0_1|u_logic|O76wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W46wx4~0 , soc_inst|m0_1|u_logic|W46wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4fwx4~0 , soc_inst|m0_1|u_logic|M4fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hub3z4 , soc_inst|m0_1|u_logic|Hub3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rsqvx4~0 , soc_inst|m0_1|u_logic|Rsqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1rvx4~0 , soc_inst|m0_1|u_logic|H1rvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4 , soc_inst|m0_1|u_logic|Uaj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pkxvx4~0 , soc_inst|m0_1|u_logic|Pkxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T1xvx4~0 , soc_inst|m0_1|u_logic|T1xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na6wx4~0 , soc_inst|m0_1|u_logic|Na6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yy5wx4~0 , soc_inst|m0_1|u_logic|Yy5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qx52z4~0 , soc_inst|m0_1|u_logic|Qx52z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~4 , soc_inst|m0_1|u_logic|hprot_o~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rngwx4 , soc_inst|m0_1|u_logic|Rngwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jbhwx4~0 , soc_inst|m0_1|u_logic|Jbhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pkxvx4~0 , soc_inst|m0_1|u_logic|Pkxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ncqvx4~0 , soc_inst|m0_1|u_logic|Ncqvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|R8d2z4~0 , soc_inst|m0_1|u_logic|R8d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ry5wx4~0 , soc_inst|m0_1|u_logic|Ry5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~0 , soc_inst|m0_1|u_logic|hprot_o~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|hprot_o~1 , soc_inst|m0_1|u_logic|hprot_o~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzxvx4 , soc_inst|m0_1|u_logic|Kzxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sy52z4~0 , soc_inst|m0_1|u_logic|Sy52z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Huqvx4~0 , soc_inst|m0_1|u_logic|Huqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~0 , soc_inst|m0_1|u_logic|Bpzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A4c2z4~0 , soc_inst|m0_1|u_logic|A4c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B73wx4 , soc_inst|m0_1|u_logic|B73wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0mwx4~0 , soc_inst|m0_1|u_logic|Z0mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~2 , soc_inst|m0_1|u_logic|hprot_o~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~3 , soc_inst|m0_1|u_logic|hprot_o~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hprot_o~5 , soc_inst|m0_1|u_logic|hprot_o~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5qvx4 , soc_inst|m0_1|u_logic|U5qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wxp2z4 , soc_inst|m0_1|u_logic|Wxp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qaiwx4~0 , soc_inst|m0_1|u_logic|Qaiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H4nwx4 , soc_inst|m0_1|u_logic|H4nwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8rwx4~0 , soc_inst|m0_1|u_logic|Q8rwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oldwx4~0 , soc_inst|m0_1|u_logic|Oldwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxc2z4 , soc_inst|m0_1|u_logic|Qxc2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lcowx4~0 , soc_inst|m0_1|u_logic|Lcowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~0 , soc_inst|m0_1|u_logic|Lhyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~1 , soc_inst|m0_1|u_logic|Lhyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Egkwx4~0 , soc_inst|m0_1|u_logic|Egkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y9t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte0~0 , soc_inst|ram_1|byte0~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M66wx4 , soc_inst|m0_1|u_logic|M66wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~0 , soc_inst|m0_1|u_logic|Amjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfdwx4~0 , soc_inst|m0_1|u_logic|Qfdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mn3wx4~0 , soc_inst|m0_1|u_logic|Mn3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Socwx4~0 , soc_inst|m0_1|u_logic|Socwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ucqvx4 , soc_inst|m0_1|u_logic|Ucqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hdh2z4~0 , soc_inst|m0_1|u_logic|Hdh2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~0 , soc_inst|m0_1|u_logic|Ppsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~1 , soc_inst|m0_1|u_logic|Ppsvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~0 , soc_inst|m0_1|u_logic|C5c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~1 , soc_inst|m0_1|u_logic|C5c2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ju5wx4 , soc_inst|m0_1|u_logic|Ju5wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vbovx4~0 , soc_inst|m0_1|u_logic|Vbovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lz93z4 , soc_inst|m0_1|u_logic|Lz93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y8pvx4~0 , soc_inst|m0_1|u_logic|Y8pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wpsvx4~0 , soc_inst|m0_1|u_logic|Wpsvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ps3wx4~0 , soc_inst|m0_1|u_logic|Ps3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~2 , soc_inst|m0_1|u_logic|Lhyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X8zvx4 , soc_inst|m0_1|u_logic|X8zvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Muawx4~0 , soc_inst|m0_1|u_logic|Muawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T3ovx4~0 , soc_inst|m0_1|u_logic|T3ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zdc2z4~0 , soc_inst|m0_1|u_logic|Zdc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qdj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE , soc_inst|m0_1|u_logic|H9i2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|write_cycle , soc_inst|ram_1|write_cycle, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~0 , soc_inst|m0_1|u_logic|Bpzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE , soc_inst|m0_1|u_logic|U2x2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9pvx4~0 , soc_inst|m0_1|u_logic|M9pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xdfwx4 , soc_inst|m0_1|u_logic|Xdfwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~0 , soc_inst|m0_1|u_logic|Evcwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fzcwx4~0 , soc_inst|m0_1|u_logic|Fzcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T3ovx4~0 , soc_inst|m0_1|u_logic|T3ovx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|H4ovx4~0 , soc_inst|m0_1|u_logic|H4ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~0 , soc_inst|m0_1|u_logic|Evcwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~1 , soc_inst|m0_1|u_logic|Evcwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzawx4 , soc_inst|m0_1|u_logic|Wzawx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jucwx4~0 , soc_inst|m0_1|u_logic|Jucwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkxvx4~0 , soc_inst|m0_1|u_logic|Wkxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Otcwx4~0 , soc_inst|m0_1|u_logic|Otcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~0 , soc_inst|m0_1|u_logic|Fuawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~1 , soc_inst|m0_1|u_logic|Fuawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xdfwx4 , soc_inst|m0_1|u_logic|Xdfwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cax2z4 , soc_inst|m0_1|u_logic|Cax2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa7wx4~0 , soc_inst|m0_1|u_logic|Wa7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~2 , soc_inst|m0_1|u_logic|Evcwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4 , soc_inst|m0_1|u_logic|Pdi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Donvx4~0 , soc_inst|m0_1|u_logic|Donvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Donvx4~1 , soc_inst|m0_1|u_logic|Donvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G97wx4~2 , soc_inst|m0_1|u_logic|G97wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G97wx4~0 , soc_inst|m0_1|u_logic|G97wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G97wx4~1 , soc_inst|m0_1|u_logic|G97wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Donvx4~0 , soc_inst|m0_1|u_logic|Donvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa7wx4~0 , soc_inst|m0_1|u_logic|Wa7wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Donvx4~2 , soc_inst|m0_1|u_logic|Donvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Evcwx4~2 , soc_inst|m0_1|u_logic|Evcwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L4bwx4~0 , soc_inst|m0_1|u_logic|L4bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dsqvx4 , soc_inst|m0_1|u_logic|Dsqvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvewx4~0 , soc_inst|m0_1|u_logic|Wvewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H5fwx4~0 , soc_inst|m0_1|u_logic|H5fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhxvx4 , soc_inst|m0_1|u_logic|Xhxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icyvx4~0 , soc_inst|m0_1|u_logic|Icyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ukpvx4 , soc_inst|m0_1|u_logic|Ukpvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpqvx4~0 , soc_inst|m0_1|u_logic|Zpqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Bsy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~0 , soc_inst|m0_1|u_logic|Irqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~1 , soc_inst|m0_1|u_logic|Irqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~2 , soc_inst|switches_1|half_word_address~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address[1] , soc_inst|switches_1|half_word_address[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[0]~DUPLICATE , soc_inst|ram_1|byte_select[0]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|read_enable~0 , soc_inst|switches_1|read_enable~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|read_enable , soc_inst|switches_1|read_enable, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~37 , soc_inst|interconnect_1|HRDATA[1]~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~20 , soc_inst|interconnect_1|HRDATA[1]~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|DataValid~0 , soc_inst|switches_1|DataValid~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|DataValid[1] , soc_inst|switches_1|DataValid[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~19 , soc_inst|interconnect_1|HRDATA[1]~19, de1_soc_wrapper, 1
-instance = comp, \SW[1]~input , SW[1]~input, de1_soc_wrapper, 1
-instance = comp, \KEY[0]~input , KEY[0]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|last_buttons[0]~1 , soc_inst|switches_1|last_buttons[0]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|last_buttons[0] , soc_inst|switches_1|last_buttons[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|always0~1 , soc_inst|switches_1|always0~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][1] , soc_inst|switches_1|switch_store[0][1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[1]~12 , soc_inst|ram_1|data_to_memory[1]~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asbvx4 , soc_inst|m0_1|u_logic|Asbvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~1 , soc_inst|m0_1|u_logic|Mddwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~0 , soc_inst|m0_1|u_logic|Mddwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jfdwx4~0 , soc_inst|m0_1|u_logic|Jfdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~0 , soc_inst|m0_1|u_logic|Kcdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~1 , soc_inst|m0_1|u_logic|Kcdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W19wx4~0 , soc_inst|m0_1|u_logic|W19wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~1 , soc_inst|m0_1|u_logic|Rfpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mk6wx4~0 , soc_inst|m0_1|u_logic|Mk6wx4~0, de1_soc_wrapper, 1
-instance = comp, \SW[9]~input , SW[9]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][9] , soc_inst|switches_1|switch_store[1][9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bnnvx4 , soc_inst|m0_1|u_logic|Bnnvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~29 , soc_inst|m0_1|u_logic|Add3~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~25 , soc_inst|m0_1|u_logic|Add3~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yuovx4 , soc_inst|m0_1|u_logic|Yuovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[2] , soc_inst|ram_1|saved_word_address[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[2]~2 , soc_inst|ram_1|memory.raddr_a[2]~2, de1_soc_wrapper, 1
-instance = comp, \SW[4]~input , SW[4]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][4] , soc_inst|switches_1|switch_store[0][4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~1 , soc_inst|m0_1|u_logic|Xwawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~3 , soc_inst|m0_1|u_logic|Xwawx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~2 , soc_inst|m0_1|u_logic|Xwawx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~0 , soc_inst|m0_1|u_logic|Xwawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H0dwx4~0 , soc_inst|m0_1|u_logic|H0dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~0 , soc_inst|m0_1|u_logic|Z4bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~2 , soc_inst|m0_1|u_logic|Z4bwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y5dwx4~0 , soc_inst|m0_1|u_logic|Y5dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~1 , soc_inst|m0_1|u_logic|W4dwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxx2z4 , soc_inst|m0_1|u_logic|Hxx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S5pvx4 , soc_inst|m0_1|u_logic|S5pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yghvx4~0 , soc_inst|m0_1|u_logic|Yghvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyx2z4 , soc_inst|m0_1|u_logic|Tyx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ibrwx4~0 , soc_inst|m0_1|u_logic|Ibrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hxx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tyx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B8c2z4~0 , soc_inst|m0_1|u_logic|B8c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~1 , soc_inst|m0_1|u_logic|Scpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I1c2z4 , soc_inst|m0_1|u_logic|I1c2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P1c2z4~0 , soc_inst|m0_1|u_logic|P1c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zzb2z4~0 , soc_inst|m0_1|u_logic|Zzb2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z7fwx4~0 , soc_inst|m0_1|u_logic|Z7fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G0c2z4~0 , soc_inst|m0_1|u_logic|G0c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~0 , soc_inst|m0_1|u_logic|Jyb2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhiwx4~0 , soc_inst|m0_1|u_logic|Xhiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~1 , soc_inst|m0_1|u_logic|Jyb2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE , soc_inst|m0_1|u_logic|A4t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~0 , soc_inst|m0_1|u_logic|Fuhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qaqvx4~0 , soc_inst|m0_1|u_logic|Qaqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E6nwx4~0 , soc_inst|m0_1|u_logic|E6nwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z1ewx4~0 , soc_inst|m0_1|u_logic|Z1ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A76wx4~0 , soc_inst|m0_1|u_logic|A76wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O76wx4 , soc_inst|m0_1|u_logic|O76wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W46wx4~0 , soc_inst|m0_1|u_logic|W46wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G36wx4~0 , soc_inst|m0_1|u_logic|G36wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte3~0 , soc_inst|ram_1|byte3~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[3]~DUPLICATE , soc_inst|ram_1|byte_select[3]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|read_cycle~0 , soc_inst|ram_1|read_cycle~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|read_cycle , soc_inst|ram_1|read_cycle, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[26]~0 , soc_inst|interconnect_1|HRDATA[26]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jvqvx4~1 , soc_inst|m0_1|u_logic|Jvqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkxvx4~0 , soc_inst|m0_1|u_logic|Wkxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[2] , soc_inst|ram_1|saved_word_address[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[2]~2 , soc_inst|ram_1|memory.raddr_a[2]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtrwx4~0 , soc_inst|m0_1|u_logic|Qtrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dplwx4~0 , soc_inst|m0_1|u_logic|Dplwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cllwx4~0 , soc_inst|m0_1|u_logic|Cllwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6z2z4 , soc_inst|m0_1|u_logic|I6z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwqvx4~0 , soc_inst|m0_1|u_logic|Lwqvx4~0, de1_soc_wrapper, 1
+instance = comp, \SW[5]~input , SW[5]~input, de1_soc_wrapper, 1
+instance = comp, \KEY[0]~input , KEY[0]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|last_buttons[0]~1 , soc_inst|switches_1|last_buttons[0]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|last_buttons[0] , soc_inst|switches_1|last_buttons[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|always0~1 , soc_inst|switches_1|always0~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][5] , soc_inst|switches_1|switch_store[0][5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[0] , soc_inst|ram_1|byte_select[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhxvx4 , soc_inst|m0_1|u_logic|Xhxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icyvx4~0 , soc_inst|m0_1|u_logic|Icyvx4~0, de1_soc_wrapper, 1
+instance = comp, \SW[6]~input , SW[6]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][6] , soc_inst|switches_1|switch_store[1][6], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzawx4 , soc_inst|m0_1|u_logic|Wzawx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uwyvx4~0 , soc_inst|m0_1|u_logic|Uwyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ucqvx4 , soc_inst|m0_1|u_logic|Ucqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y5dwx4~0 , soc_inst|m0_1|u_logic|Y5dwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~0 , soc_inst|m0_1|u_logic|W4dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I4dwx4~0 , soc_inst|m0_1|u_logic|I4dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O0dwx4~0 , soc_inst|m0_1|u_logic|O0dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xucwx4~0 , soc_inst|m0_1|u_logic|Xucwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~1 , soc_inst|m0_1|u_logic|Gpcwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Shyvx4~0 , soc_inst|m0_1|u_logic|Shyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cyq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X77wx4 , soc_inst|m0_1|u_logic|X77wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pmgwx4~0 , soc_inst|m0_1|u_logic|Pmgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ez8wx4~0 , soc_inst|m0_1|u_logic|Ez8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz8wx4 , soc_inst|m0_1|u_logic|Zz8wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4dwx4~1 , soc_inst|m0_1|u_logic|W4dwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|D1awx4~0 , soc_inst|m0_1|u_logic|D1awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y29wx4 , soc_inst|m0_1|u_logic|Y29wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qsewx4~0 , soc_inst|m0_1|u_logic|Qsewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P7wvx4~0 , soc_inst|m0_1|u_logic|P7wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qslwx4~0 , soc_inst|m0_1|u_logic|Qslwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohwvx4 , soc_inst|m0_1|u_logic|Ohwvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~1 , soc_inst|m0_1|u_logic|Mddwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mddwx4~0 , soc_inst|m0_1|u_logic|Mddwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~0 , soc_inst|m0_1|u_logic|Kcdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jfdwx4~0 , soc_inst|m0_1|u_logic|Jfdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kcdwx4~1 , soc_inst|m0_1|u_logic|Kcdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W19wx4~0 , soc_inst|m0_1|u_logic|W19wx4~0, de1_soc_wrapper, 1
+instance = comp, \SW[2]~input , SW[2]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][2] , soc_inst|switches_1|switch_store[1][2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jucwx4~0 , soc_inst|m0_1|u_logic|Jucwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Otcwx4~0 , soc_inst|m0_1|u_logic|Otcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~0 , soc_inst|m0_1|u_logic|Fuawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuawx4~1 , soc_inst|m0_1|u_logic|Fuawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Muawx4~0 , soc_inst|m0_1|u_logic|Muawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X8zvx4 , soc_inst|m0_1|u_logic|X8zvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2yvx4 , soc_inst|m0_1|u_logic|C2yvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z3yvx4 , soc_inst|m0_1|u_logic|Z3yvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fyrwx4~0 , soc_inst|m0_1|u_logic|Fyrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fyrwx4~1 , soc_inst|m0_1|u_logic|Fyrwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Surwx4~0 , soc_inst|m0_1|u_logic|Surwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~0 , soc_inst|m0_1|u_logic|Dghvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtrwx4~0 , soc_inst|m0_1|u_logic|Qtrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~1 , soc_inst|m0_1|u_logic|Dghvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W7z2z4 , soc_inst|m0_1|u_logic|W7z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~0 , soc_inst|m0_1|u_logic|Uz9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~33 , soc_inst|m0_1|u_logic|Add3~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~53 , soc_inst|m0_1|u_logic|Add3~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hszvx4 , soc_inst|m0_1|u_logic|Hszvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fskvx4~0 , soc_inst|m0_1|u_logic|Fskvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U593z4 , soc_inst|m0_1|u_logic|U593z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lq03z4~feeder , soc_inst|m0_1|u_logic|Lq03z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~0 , soc_inst|m0_1|u_logic|Rmpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dvy2z4 , soc_inst|m0_1|u_logic|Dvy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~1 , soc_inst|m0_1|u_logic|Rmpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yzi2z4 , soc_inst|m0_1|u_logic|Yzi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vapvx4 , soc_inst|m0_1|u_logic|Vapvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~0 , soc_inst|m0_1|u_logic|Qdnvx4~0, de1_soc_wrapper, 1
+instance = comp, \SW[0]~input , SW[0]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][0] , soc_inst|switches_1|switch_store[1][0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[16]~30 , soc_inst|interconnect_1|HRDATA[16]~30, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qqhvx4~0 , soc_inst|m0_1|u_logic|Qqhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ydw2z4 , soc_inst|m0_1|u_logic|Ydw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~1 , soc_inst|m0_1|u_logic|Qdnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~2 , soc_inst|m0_1|u_logic|Qdnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \SW[4]~input , SW[4]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][4] , soc_inst|switches_1|switch_store[1][4], de1_soc_wrapper, 1
+instance = comp, \SW[3]~input , SW[3]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][3] , soc_inst|switches_1|switch_store[1][3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~0 , soc_inst|m0_1|u_logic|Sknwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kswwx4~0 , soc_inst|m0_1|u_logic|Kswwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djywx4~0 , soc_inst|m0_1|u_logic|Djywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lstwx4~0 , soc_inst|m0_1|u_logic|Lstwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxc2z4 , soc_inst|m0_1|u_logic|Qxc2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lcowx4~0 , soc_inst|m0_1|u_logic|Lcowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vwc2z4~0 , soc_inst|m0_1|u_logic|Vwc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~0 , soc_inst|m0_1|u_logic|Kuc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxc2z4~0 , soc_inst|m0_1|u_logic|Cxc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~0 , soc_inst|m0_1|u_logic|Awc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~1 , soc_inst|m0_1|u_logic|Awc2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ocfwx4~0 , soc_inst|m0_1|u_logic|Ocfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1d2z4~0 , soc_inst|m0_1|u_logic|R1d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jky2z4 , soc_inst|m0_1|u_logic|Jky2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~0 , soc_inst|m0_1|u_logic|Fbfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G27wx4~0 , soc_inst|m0_1|u_logic|G27wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Swy2z4 , soc_inst|m0_1|u_logic|Swy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Keiwx4~0 , soc_inst|m0_1|u_logic|Keiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Celwx4~0 , soc_inst|m0_1|u_logic|Celwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Celwx4~1 , soc_inst|m0_1|u_logic|Celwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~1 , soc_inst|m0_1|u_logic|Fbfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rafwx4~0 , soc_inst|m0_1|u_logic|Rafwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvewx4~0 , soc_inst|m0_1|u_logic|Wvewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~0 , soc_inst|m0_1|u_logic|Qllwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Csewx4~0 , soc_inst|m0_1|u_logic|Csewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V1yvx4~0 , soc_inst|m0_1|u_logic|V1yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4fwx4~0 , soc_inst|m0_1|u_logic|M4fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rjrwx4~0 , soc_inst|m0_1|u_logic|Rjrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mkrwx4 , soc_inst|m0_1|u_logic|Mkrwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J3xvx4 , soc_inst|m0_1|u_logic|J3xvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~0 , soc_inst|m0_1|u_logic|Yafwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~1 , soc_inst|m0_1|u_logic|Yafwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~2 , soc_inst|m0_1|u_logic|Yafwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nkpvx4~0 , soc_inst|m0_1|u_logic|Nkpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~3 , soc_inst|m0_1|u_logic|Yafwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H5fwx4~0 , soc_inst|m0_1|u_logic|H5fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7swx4~0 , soc_inst|m0_1|u_logic|J7swx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~4 , soc_inst|m0_1|u_logic|Yafwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~5 , soc_inst|m0_1|u_logic|Yafwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rni2z4 , soc_inst|m0_1|u_logic|Rni2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E4iwx4~0 , soc_inst|m0_1|u_logic|E4iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Enrwx4~0 , soc_inst|m0_1|u_logic|Enrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~0 , soc_inst|m0_1|u_logic|Rblwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~1 , soc_inst|m0_1|u_logic|Rblwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J3iwx4~0 , soc_inst|m0_1|u_logic|J3iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~2 , soc_inst|m0_1|u_logic|Rblwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][5] , soc_inst|switches_1|switch_store[1][5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][4] , soc_inst|switches_1|switch_store[0][4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~0 , soc_inst|m0_1|u_logic|Glnwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1r2z4~feeder , soc_inst|m0_1|u_logic|E1r2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ut0xx4~0 , soc_inst|m0_1|u_logic|Ut0xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~0 , soc_inst|m0_1|u_logic|Cr0xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Oi2wx4~0 , soc_inst|m0_1|u_logic|Oi2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ut0xx4~0 , soc_inst|m0_1|u_logic|Ut0xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Oi2wx4~1 , soc_inst|m0_1|u_logic|Oi2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~1 , soc_inst|m0_1|u_logic|Hklwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5wvx4~0 , soc_inst|m0_1|u_logic|Z5wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~0 , soc_inst|m0_1|u_logic|K8wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~0 , soc_inst|m0_1|u_logic|Vhwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~1 , soc_inst|m0_1|u_logic|Vhwvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~1 , soc_inst|m0_1|u_logic|K8wvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~2 , soc_inst|m0_1|u_logic|K8wvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oowvx4~0 , soc_inst|m0_1|u_logic|Oowvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejwvx4~0 , soc_inst|m0_1|u_logic|Ejwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Blwvx4~0 , soc_inst|m0_1|u_logic|Blwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~0 , soc_inst|m0_1|u_logic|R8wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~1 , soc_inst|m0_1|u_logic|R8wvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndwvx4~0 , soc_inst|m0_1|u_logic|Ndwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K1z2z4 , soc_inst|m0_1|u_logic|K1z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fw0xx4~0 , soc_inst|m0_1|u_logic|Fw0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ax0xx4~0 , soc_inst|m0_1|u_logic|Ax0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~0 , soc_inst|m0_1|u_logic|Vi2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~1 , soc_inst|m0_1|u_logic|Vi2wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~5 , soc_inst|m0_1|u_logic|K6yvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2mwx4~0 , soc_inst|m0_1|u_logic|I2mwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ilpvx4~0 , soc_inst|m0_1|u_logic|Ilpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~0 , soc_inst|m0_1|u_logic|W3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2t2z4 , soc_inst|m0_1|u_logic|I2t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~1 , soc_inst|m0_1|u_logic|W3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE , soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Auk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~0 , soc_inst|m0_1|u_logic|I3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~1 , soc_inst|m0_1|u_logic|I3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE , soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hw2wx4~0 , soc_inst|m0_1|u_logic|Hw2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xr0xx4 , soc_inst|m0_1|u_logic|Xr0xx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zy2wx4~0 , soc_inst|m0_1|u_logic|Zy2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jq2wx4~0 , soc_inst|m0_1|u_logic|Jq2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nz2wx4~0 , soc_inst|m0_1|u_logic|Nz2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~0 , soc_inst|m0_1|u_logic|Fh2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~7 , soc_inst|m0_1|u_logic|K6yvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~8 , soc_inst|m0_1|u_logic|K6yvx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X8kwx4~0 , soc_inst|m0_1|u_logic|X8kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zzfwx4~0 , soc_inst|m0_1|u_logic|Zzfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T1xvx4~0 , soc_inst|m0_1|u_logic|T1xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tuwvx4~0 , soc_inst|m0_1|u_logic|Tuwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~6 , soc_inst|m0_1|u_logic|K6yvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~9 , soc_inst|m0_1|u_logic|K6yvx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~2 , soc_inst|m0_1|u_logic|K6yvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xiwvx4~0 , soc_inst|m0_1|u_logic|Xiwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X5gwx4~0 , soc_inst|m0_1|u_logic|X5gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~3 , soc_inst|m0_1|u_logic|K6yvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~4 , soc_inst|m0_1|u_logic|K6yvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|My6wx4~0 , soc_inst|m0_1|u_logic|My6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vnxvx4~0 , soc_inst|m0_1|u_logic|Vnxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qsewx4~0 , soc_inst|m0_1|u_logic|Qsewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P7wvx4~0 , soc_inst|m0_1|u_logic|P7wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~0 , soc_inst|m0_1|u_logic|K6yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~1 , soc_inst|m0_1|u_logic|K6yvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~10 , soc_inst|m0_1|u_logic|K6yvx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V2iwx4~0 , soc_inst|m0_1|u_logic|V2iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A2iwx4~0 , soc_inst|m0_1|u_logic|A2iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A2iwx4~1 , soc_inst|m0_1|u_logic|A2iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~1 , soc_inst|m0_1|u_logic|Qj2wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~0 , soc_inst|m0_1|u_logic|Qj2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ro0xx4~0 , soc_inst|m0_1|u_logic|Ro0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~2 , soc_inst|m0_1|u_logic|Qj2wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~1 , soc_inst|m0_1|u_logic|Ge2wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ey2wx4~0 , soc_inst|m0_1|u_logic|Ey2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hw2wx4~0 , soc_inst|m0_1|u_logic|Hw2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ru2wx4~0 , soc_inst|m0_1|u_logic|Ru2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Bt2wx4~0 , soc_inst|m0_1|u_logic|Bt2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~5 , soc_inst|m0_1|u_logic|Fh2wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L53wx4~0 , soc_inst|m0_1|u_logic|L53wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L53wx4~1 , soc_inst|m0_1|u_logic|L53wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L53wx4~2 , soc_inst|m0_1|u_logic|L53wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L53wx4~3 , soc_inst|m0_1|u_logic|L53wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz2wx4~0 , soc_inst|m0_1|u_logic|Nz2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zy2wx4~0 , soc_inst|m0_1|u_logic|Zy2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq2wx4~0 , soc_inst|m0_1|u_logic|Jq2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~0 , soc_inst|m0_1|u_logic|Fh2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~2 , soc_inst|m0_1|u_logic|Fh2wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It2wx4~0 , soc_inst|m0_1|u_logic|It2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~1 , soc_inst|m0_1|u_logic|Fh2wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It2wx4~0 , soc_inst|m0_1|u_logic|It2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Op2wx4~0 , soc_inst|m0_1|u_logic|Op2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~3 , soc_inst|m0_1|u_logic|Fh2wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fh2wx4~4 , soc_inst|m0_1|u_logic|Fh2wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bxcwx4~0 , soc_inst|m0_1|u_logic|Bxcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L53wx4~2 , soc_inst|m0_1|u_logic|L53wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L53wx4~0 , soc_inst|m0_1|u_logic|L53wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L53wx4~1 , soc_inst|m0_1|u_logic|L53wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L53wx4~3 , soc_inst|m0_1|u_logic|L53wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xc2wx4~0 , soc_inst|m0_1|u_logic|Xc2wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~0 , soc_inst|m0_1|u_logic|Ge2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|If2wx4~0 , soc_inst|m0_1|u_logic|If2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~0 , soc_inst|m0_1|u_logic|Fbfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1d2z4~0 , soc_inst|m0_1|u_logic|R1d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Keiwx4~0 , soc_inst|m0_1|u_logic|Keiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[4] , soc_inst|ram_1|saved_word_address[4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[4]~4 , soc_inst|ram_1|memory.raddr_a[4]~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[5] , soc_inst|ram_1|saved_word_address[5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[5]~5 , soc_inst|ram_1|memory.raddr_a[5]~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I793z4 , soc_inst|m0_1|u_logic|I793z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgnvx4~0 , soc_inst|m0_1|u_logic|Pgnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I793z4~DUPLICATE , soc_inst|m0_1|u_logic|I793z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5vvx4 , soc_inst|m0_1|u_logic|J5vvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~0 , soc_inst|m0_1|u_logic|Q5vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~0 , soc_inst|m0_1|u_logic|X7mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~1 , soc_inst|m0_1|u_logic|X7mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6w2z4 , soc_inst|m0_1|u_logic|I6w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~0 , soc_inst|m0_1|u_logic|F5mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4x2z4 , soc_inst|m0_1|u_logic|J4x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~1 , soc_inst|m0_1|u_logic|F5mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~2 , soc_inst|m0_1|u_logic|F5mvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5x2z4 , soc_inst|m0_1|u_logic|U5x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lefwx4~0 , soc_inst|m0_1|u_logic|Lefwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jex2z4 , soc_inst|m0_1|u_logic|Jex2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~53 , soc_inst|m0_1|u_logic|Add2~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~49 , soc_inst|m0_1|u_logic|Add2~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pm9wx4~0 , soc_inst|m0_1|u_logic|Pm9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~0 , soc_inst|m0_1|u_logic|Lk9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~1 , soc_inst|m0_1|u_logic|Zz1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~2 , soc_inst|m0_1|u_logic|Zz1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~0 , soc_inst|m0_1|u_logic|Glnwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ka93z4~feeder , soc_inst|m0_1|u_logic|Ka93z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J3iwx4~0 , soc_inst|m0_1|u_logic|J3iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E4iwx4~0 , soc_inst|m0_1|u_logic|E4iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Enrwx4~0 , soc_inst|m0_1|u_logic|Enrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~0 , soc_inst|m0_1|u_logic|Rblwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~1 , soc_inst|m0_1|u_logic|Rblwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rblwx4~2 , soc_inst|m0_1|u_logic|Rblwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~3 , soc_inst|m0_1|u_logic|Yafwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7swx4~0 , soc_inst|m0_1|u_logic|J7swx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~4 , soc_inst|m0_1|u_logic|Yafwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~0 , soc_inst|m0_1|u_logic|Qllwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rjrwx4~0 , soc_inst|m0_1|u_logic|Rjrwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mkrwx4 , soc_inst|m0_1|u_logic|Mkrwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J3xvx4 , soc_inst|m0_1|u_logic|J3xvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~1 , soc_inst|m0_1|u_logic|Yafwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~0 , soc_inst|m0_1|u_logic|Yafwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~2 , soc_inst|m0_1|u_logic|Yafwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yafwx4~5 , soc_inst|m0_1|u_logic|Yafwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fgm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~2 , soc_inst|m0_1|u_logic|Ge2wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4 , soc_inst|m0_1|u_logic|Wzy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2lwx4~0 , soc_inst|m0_1|u_logic|G2lwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2lwx4 , soc_inst|m0_1|u_logic|G2lwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~1 , soc_inst|m0_1|u_logic|Ggswx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~0 , soc_inst|m0_1|u_logic|Ggswx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~2 , soc_inst|m0_1|u_logic|Ggswx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4 , soc_inst|m0_1|u_logic|Yaz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vb2wx4~0 , soc_inst|m0_1|u_logic|Vb2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xr0xx4 , soc_inst|m0_1|u_logic|Xr0xx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|If2wx4~0 , soc_inst|m0_1|u_logic|If2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vb2wx4 , soc_inst|m0_1|u_logic|Vb2wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fw1wx4~0 , soc_inst|m0_1|u_logic|Fw1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ob2wx4~0 , soc_inst|m0_1|u_logic|Ob2wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ob2wx4 , soc_inst|m0_1|u_logic|Ob2wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fgm2z4 , soc_inst|m0_1|u_logic|Fgm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3d3z4 , soc_inst|m0_1|u_logic|H3d3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yg2wx4~0 , soc_inst|m0_1|u_logic|Yg2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ax0xx4~0 , soc_inst|m0_1|u_logic|Ax0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~0 , soc_inst|m0_1|u_logic|Vi2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qaqvx4~0 , soc_inst|m0_1|u_logic|Qaqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fw0xx4~0 , soc_inst|m0_1|u_logic|Fw0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vi2wx4~1 , soc_inst|m0_1|u_logic|Vi2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ro0xx4~0 , soc_inst|m0_1|u_logic|Ro0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~1 , soc_inst|m0_1|u_logic|Qj2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~0 , soc_inst|m0_1|u_logic|Qj2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qj2wx4~2 , soc_inst|m0_1|u_logic|Qj2wx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yg2wx4 , soc_inst|m0_1|u_logic|Yg2wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xc2wx4 , soc_inst|m0_1|u_logic|Xc2wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~0 , soc_inst|m0_1|u_logic|Wlwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~1 , soc_inst|m0_1|u_logic|Wlwvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3z2z4 , soc_inst|m0_1|u_logic|C3z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~1 , soc_inst|m0_1|u_logic|E4xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~0 , soc_inst|m0_1|u_logic|B3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~1 , soc_inst|m0_1|u_logic|B3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE , soc_inst|m0_1|u_logic|C3z2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ob2wx4~0 , soc_inst|m0_1|u_logic|Ob2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ob2wx4 , soc_inst|m0_1|u_logic|Ob2wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hx1wx4~0 , soc_inst|m0_1|u_logic|Hx1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V2iwx4~0 , soc_inst|m0_1|u_logic|V2iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A2iwx4~0 , soc_inst|m0_1|u_logic|A2iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A2iwx4~1 , soc_inst|m0_1|u_logic|A2iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4 , soc_inst|m0_1|u_logic|Sjj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~5 , soc_inst|m0_1|u_logic|K6yvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Srgwx4~0 , soc_inst|m0_1|u_logic|Srgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X8kwx4~0 , soc_inst|m0_1|u_logic|X8kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tuwvx4~0 , soc_inst|m0_1|u_logic|Tuwvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zzfwx4~0 , soc_inst|m0_1|u_logic|Zzfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~6 , soc_inst|m0_1|u_logic|K6yvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~7 , soc_inst|m0_1|u_logic|K6yvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2mwx4~0 , soc_inst|m0_1|u_logic|I2mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~8 , soc_inst|m0_1|u_logic|K6yvx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~9 , soc_inst|m0_1|u_logic|K6yvx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X5gwx4~0 , soc_inst|m0_1|u_logic|X5gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~3 , soc_inst|m0_1|u_logic|K6yvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~2 , soc_inst|m0_1|u_logic|K6yvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~4 , soc_inst|m0_1|u_logic|K6yvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|My6wx4~0 , soc_inst|m0_1|u_logic|My6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vnxvx4~0 , soc_inst|m0_1|u_logic|Vnxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~0 , soc_inst|m0_1|u_logic|K6yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~1 , soc_inst|m0_1|u_logic|K6yvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6yvx4~10 , soc_inst|m0_1|u_logic|K6yvx4~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ax1wx4~0 , soc_inst|m0_1|u_logic|Ax1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1r2z4 , soc_inst|m0_1|u_logic|E1r2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|If2wx4~1 , soc_inst|m0_1|u_logic|If2wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|If2wx4~2 , soc_inst|m0_1|u_logic|If2wx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hx1wx4~1 , soc_inst|m0_1|u_logic|Hx1wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ka93z4 , soc_inst|m0_1|u_logic|Ka93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svk2z4 , soc_inst|m0_1|u_logic|Svk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~1 , soc_inst|m0_1|u_logic|Ge2wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ge2wx4~2 , soc_inst|m0_1|u_logic|Ge2wx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rv1wx4~0 , soc_inst|m0_1|u_logic|Rv1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rv1wx4~1 , soc_inst|m0_1|u_logic|Rv1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T9v2z4 , soc_inst|m0_1|u_logic|T9v2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kv1wx4~0 , soc_inst|m0_1|u_logic|Kv1wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S2r2z4 , soc_inst|m0_1|u_logic|S2r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fw1wx4~0 , soc_inst|m0_1|u_logic|Fw1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ax1wx4~0 , soc_inst|m0_1|u_logic|Ax1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1r2z4 , soc_inst|m0_1|u_logic|E1r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rv1wx4~1 , soc_inst|m0_1|u_logic|Rv1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE , soc_inst|m0_1|u_logic|T9v2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yaz2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4~0 , soc_inst|m0_1|u_logic|Ixxwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Tw1wx4~0 , soc_inst|m0_1|u_logic|Tw1wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Tw1wx4~1 , soc_inst|m0_1|u_logic|Tw1wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kw63z4 , soc_inst|m0_1|u_logic|Kw63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dv1wx4~0 , soc_inst|m0_1|u_logic|Dv1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4r2z4 , soc_inst|m0_1|u_logic|G4r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~1 , soc_inst|m0_1|u_logic|Hfyvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~0 , soc_inst|m0_1|u_logic|Hfyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~1 , soc_inst|m0_1|u_logic|Hfyvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hfyvx4~2 , soc_inst|m0_1|u_logic|Hfyvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|K0u2z4 , soc_inst|m0_1|u_logic|K0u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dv1wx4~0 , soc_inst|m0_1|u_logic|Dv1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4r2z4 , soc_inst|m0_1|u_logic|G4r2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~0 , soc_inst|m0_1|u_logic|Wcyvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~2 , soc_inst|m0_1|u_logic|Wcyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4 , soc_inst|m0_1|u_logic|Sjj2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~1 , soc_inst|m0_1|u_logic|Wcyvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wcyvx4~3 , soc_inst|m0_1|u_logic|Wcyvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T583z4~DUPLICATE , soc_inst|m0_1|u_logic|T583z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T583z4 , soc_inst|m0_1|u_logic|T583z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4~1 , soc_inst|m0_1|u_logic|Ixxwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ixxwx4 , soc_inst|m0_1|u_logic|Ixxwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Svxwx4~0 , soc_inst|m0_1|u_logic|Svxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3d3z4 , soc_inst|m0_1|u_logic|H3d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2m2z4~feeder , soc_inst|m0_1|u_logic|H2m2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2m2z4 , soc_inst|m0_1|u_logic|H2m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~3 , soc_inst|m0_1|u_logic|Ebbwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H783z4 , soc_inst|m0_1|u_logic|H783z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1u2z4 , soc_inst|m0_1|u_logic|Y1u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~2 , soc_inst|m0_1|u_logic|Ebbwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V3m2z4 , soc_inst|m0_1|u_logic|V3m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx63z4 , soc_inst|m0_1|u_logic|Yx63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~0 , soc_inst|m0_1|u_logic|Ebbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T0m2z4 , soc_inst|m0_1|u_logic|T0m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yb93z4 , soc_inst|m0_1|u_logic|Yb93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~1 , soc_inst|m0_1|u_logic|Ebbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4 , soc_inst|m0_1|u_logic|Ebbwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE , soc_inst|m0_1|u_logic|Jw93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~0 , soc_inst|m0_1|u_logic|Awc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~0 , soc_inst|m0_1|u_logic|Kuc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Awc2z4~1 , soc_inst|m0_1|u_logic|Awc2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vwc2z4~0 , soc_inst|m0_1|u_logic|Vwc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxc2z4~0 , soc_inst|m0_1|u_logic|Cxc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sjj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mvc2z4 , soc_inst|m0_1|u_logic|Mvc2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~1 , soc_inst|m0_1|u_logic|Kuc2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Akewx4~0 , soc_inst|m0_1|u_logic|Akewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xkfwx4~0 , soc_inst|m0_1|u_logic|Xkfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kryvx4~0 , soc_inst|m0_1|u_logic|Kryvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Acnvx4~0 , soc_inst|m0_1|u_logic|Acnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G0w2z4 , soc_inst|m0_1|u_logic|G0w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4 , soc_inst|m0_1|u_logic|Tdp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~3 , soc_inst|m0_1|u_logic|S6ovx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Shyvx4~0 , soc_inst|m0_1|u_logic|Shyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~0 , soc_inst|m0_1|u_logic|Lhyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~1 , soc_inst|m0_1|u_logic|Lhyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhyvx4~2 , soc_inst|m0_1|u_logic|Lhyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pmgwx4~0 , soc_inst|m0_1|u_logic|Pmgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ez8wx4~0 , soc_inst|m0_1|u_logic|Ez8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~0 , soc_inst|m0_1|u_logic|Qppvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X4pvx4 , soc_inst|m0_1|u_logic|X4pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~0 , soc_inst|m0_1|u_logic|J4pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~1 , soc_inst|m0_1|u_logic|J4pvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8rwx4~0 , soc_inst|m0_1|u_logic|Q8rwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~0 , soc_inst|m0_1|u_logic|Qs7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~1 , soc_inst|m0_1|u_logic|Qs7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8iwx4~0 , soc_inst|m0_1|u_logic|F8iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C8rwx4~0 , soc_inst|m0_1|u_logic|C8rwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V9iwx4~0 , soc_inst|m0_1|u_logic|V9iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S8ewx4~0 , soc_inst|m0_1|u_logic|S8ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~0 , soc_inst|m0_1|u_logic|H9iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~1 , soc_inst|m0_1|u_logic|H9iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffs2z4 , soc_inst|m0_1|u_logic|Ffs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qknvx4~0 , soc_inst|m0_1|u_logic|Qknvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xknvx4~0 , soc_inst|m0_1|u_logic|Xknvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kop2z4 , soc_inst|m0_1|u_logic|Kop2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mjl2z4 , soc_inst|m0_1|u_logic|Mjl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nmnvx4~0 , soc_inst|m0_1|u_logic|Nmnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mjl2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W0pvx4 , soc_inst|m0_1|u_logic|W0pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wxcwx4~0 , soc_inst|m0_1|u_logic|Wxcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~0 , soc_inst|m0_1|u_logic|Sknwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kswwx4~0 , soc_inst|m0_1|u_logic|Kswwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wai2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fgm2z4 , soc_inst|m0_1|u_logic|Fgm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yilwx4~0 , soc_inst|m0_1|u_logic|Yilwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~1 , soc_inst|m0_1|u_logic|Sknwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~2 , soc_inst|m0_1|u_logic|Sknwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE , soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T2owx4~0 , soc_inst|m0_1|u_logic|T2owx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T2owx4~1 , soc_inst|m0_1|u_logic|T2owx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S6nwx4 , soc_inst|m0_1|u_logic|S6nwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imnwx4 , soc_inst|m0_1|u_logic|Imnwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nen2z4 , soc_inst|m0_1|u_logic|Nen2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~0 , soc_inst|m0_1|u_logic|Qppvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q77wx4~0 , soc_inst|m0_1|u_logic|Q77wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qobwx4~0 , soc_inst|m0_1|u_logic|Qobwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R29wx4~0 , soc_inst|m0_1|u_logic|R29wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U09wx4~0 , soc_inst|m0_1|u_logic|U09wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0pvx4~0 , soc_inst|m0_1|u_logic|P0pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qnyvx4~0 , soc_inst|m0_1|u_logic|Qnyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~0 , soc_inst|m0_1|u_logic|Vllvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~1 , soc_inst|m0_1|u_logic|Vllvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U4z2z4 , soc_inst|m0_1|u_logic|U4z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~1 , soc_inst|m0_1|u_logic|D4mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~0 , soc_inst|m0_1|u_logic|D4mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z7i2z4 , soc_inst|m0_1|u_logic|Z7i2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~2 , soc_inst|m0_1|u_logic|D4mvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iwp2z4 , soc_inst|m0_1|u_logic|Iwp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ruj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug63z4 , soc_inst|m0_1|u_logic|Ug63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~0 , soc_inst|m0_1|u_logic|Duuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ukt2z4 , soc_inst|m0_1|u_logic|Ukt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~2 , soc_inst|m0_1|u_logic|Duuwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duu2z4 , soc_inst|m0_1|u_logic|Duu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4~feeder , soc_inst|m0_1|u_logic|Dtj2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4 , soc_inst|m0_1|u_logic|Dtj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~3 , soc_inst|m0_1|u_logic|Duuwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wlz2z4~feeder , soc_inst|m0_1|u_logic|Wlz2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3w2z4 , soc_inst|m0_1|u_logic|C3w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L6nwx4 , soc_inst|m0_1|u_logic|L6nwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wjyvx4~0 , soc_inst|m0_1|u_logic|Wjyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~0 , soc_inst|m0_1|u_logic|Omyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~1 , soc_inst|m0_1|u_logic|Omyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kop2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~0 , soc_inst|m0_1|u_logic|F4nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~1 , soc_inst|m0_1|u_logic|F4nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K3l2z4 , soc_inst|m0_1|u_logic|K3l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ab1xx4~0 , soc_inst|m0_1|u_logic|Ab1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D31wx4~0 , soc_inst|m0_1|u_logic|D31wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjlwx4~0 , soc_inst|m0_1|u_logic|Fjlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Phlwx4~0 , soc_inst|m0_1|u_logic|Phlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yilwx4~0 , soc_inst|m0_1|u_logic|Yilwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~0 , soc_inst|m0_1|u_logic|Oa3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~1 , soc_inst|m0_1|u_logic|Oa3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ab9wx4~0 , soc_inst|m0_1|u_logic|Ab9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y29wx4 , soc_inst|m0_1|u_logic|Y29wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7cwx4~0 , soc_inst|m0_1|u_logic|T7cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4 , soc_inst|m0_1|u_logic|Oa3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oldwx4~0 , soc_inst|m0_1|u_logic|Oldwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~0 , soc_inst|m0_1|u_logic|Oaawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zb83z4~feeder , soc_inst|m0_1|u_logic|Zb83z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zb83z4 , soc_inst|m0_1|u_logic|Zb83z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mw1wx4~0 , soc_inst|m0_1|u_logic|Mw1wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wu1wx4~0 , soc_inst|m0_1|u_logic|Wu1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu1wx4~1 , soc_inst|m0_1|u_logic|Wu1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wlz2z4 , soc_inst|m0_1|u_logic|Wlz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qi03z4 , soc_inst|m0_1|u_logic|Qi03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~2 , soc_inst|m0_1|u_logic|Punvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yv1wx4~0 , soc_inst|m0_1|u_logic|Yv1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ydyvx4 , soc_inst|m0_1|u_logic|Ydyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|To23z4 , soc_inst|m0_1|u_logic|To23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yv1wx4~1 , soc_inst|m0_1|u_logic|Yv1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kf13z4 , soc_inst|m0_1|u_logic|Kf13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~1 , soc_inst|m0_1|u_logic|Punvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Txj2z4~feeder , soc_inst|m0_1|u_logic|Txj2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Txj2z4 , soc_inst|m0_1|u_logic|Txj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fwj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fwj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~1 , soc_inst|m0_1|u_logic|Duuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~3 , soc_inst|m0_1|u_logic|Punvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fw1wx4~1 , soc_inst|m0_1|u_logic|Fw1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy33z4 , soc_inst|m0_1|u_logic|Cy33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mw1wx4~1 , soc_inst|m0_1|u_logic|Mw1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L753z4 , soc_inst|m0_1|u_logic|L753z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~0 , soc_inst|m0_1|u_logic|Punvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Punvx4~4 , soc_inst|m0_1|u_logic|Punvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lz8wx4~0 , soc_inst|m0_1|u_logic|Lz8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dfd2z4 , soc_inst|m0_1|u_logic|Dfd2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ek03z4~feeder , soc_inst|m0_1|u_logic|Ek03z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ek03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE , soc_inst|m0_1|u_logic|T1d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L61xx4~0 , soc_inst|m0_1|u_logic|L61xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hq23z4 , soc_inst|m0_1|u_logic|Hq23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Knz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z853z4 , soc_inst|m0_1|u_logic|Z853z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~2 , soc_inst|m0_1|u_logic|Zhyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~1 , soc_inst|m0_1|u_logic|Zhyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yg13z4 , soc_inst|m0_1|u_logic|Yg13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~0 , soc_inst|m0_1|u_logic|Zhyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G02wx4~0 , soc_inst|m0_1|u_logic|G02wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pu1wx4 , soc_inst|m0_1|u_logic|Pu1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xyh3z4 , soc_inst|m0_1|u_logic|Xyh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6u2z4 , soc_inst|m0_1|u_logic|Q6u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zfv2z4 , soc_inst|m0_1|u_logic|Zfv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~7 , soc_inst|m0_1|u_logic|Nn0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qg93z4 , soc_inst|m0_1|u_logic|Qg93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q273z4~feeder , soc_inst|m0_1|u_logic|Q273z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q273z4 , soc_inst|m0_1|u_logic|Q273z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~6 , soc_inst|m0_1|u_logic|Nn0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S61xx4~0 , soc_inst|m0_1|u_logic|S61xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~8 , soc_inst|m0_1|u_logic|Nn0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~1 , soc_inst|m0_1|u_logic|Oaawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T4uvx4~0 , soc_inst|m0_1|u_logic|T4uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txtvx4~0 , soc_inst|m0_1|u_logic|Txtvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~0 , soc_inst|m0_1|u_logic|Hxmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ii63z4 , soc_inst|m0_1|u_logic|Ii63z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rr73z4 , soc_inst|m0_1|u_logic|Rr73z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Imt2z4 , soc_inst|m0_1|u_logic|Imt2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Skm2z4 , soc_inst|m0_1|u_logic|Skm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ii63z4 , soc_inst|m0_1|u_logic|Ii63z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4~0 , soc_inst|m0_1|u_logic|Q8ywx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ejm2z4 , soc_inst|m0_1|u_logic|Ejm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rvu2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4 , soc_inst|m0_1|u_logic|Gmm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvu2z4 , soc_inst|m0_1|u_logic|Rvu2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Unm2z4 , soc_inst|m0_1|u_logic|Unm2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4~1 , soc_inst|m0_1|u_logic|Q8ywx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Q8ywx4 , soc_inst|m0_1|u_logic|Q8ywx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4 , soc_inst|m0_1|u_logic|Zhyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1bvx4 , soc_inst|m0_1|u_logic|E1bvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~0 , soc_inst|m0_1|u_logic|Vxnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zznvx4~0 , soc_inst|m0_1|u_logic|Zznvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K0qvx4 , soc_inst|m0_1|u_logic|K0qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X4pvx4 , soc_inst|m0_1|u_logic|X4pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wspvx4 , soc_inst|m0_1|u_logic|Wspvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~0 , soc_inst|m0_1|u_logic|Zqpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~1 , soc_inst|m0_1|u_logic|Zqpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P37wx4~1 , soc_inst|m0_1|u_logic|P37wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P37wx4~0 , soc_inst|m0_1|u_logic|P37wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fhc2z4~0 , soc_inst|m0_1|u_logic|Fhc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~2 , soc_inst|m0_1|u_logic|Zqpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~3 , soc_inst|m0_1|u_logic|Zqpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lqpvx4~0 , soc_inst|m0_1|u_logic|Lqpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zei2z4 , soc_inst|m0_1|u_logic|Zei2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4ywx4~0 , soc_inst|m0_1|u_logic|W4ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D5ywx4~0 , soc_inst|m0_1|u_logic|D5ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE , soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rni2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T0m2z4 , soc_inst|m0_1|u_logic|T0m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~1 , soc_inst|m0_1|u_logic|Ebbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V3m2z4 , soc_inst|m0_1|u_logic|V3m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx63z4 , soc_inst|m0_1|u_logic|Yx63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~0 , soc_inst|m0_1|u_logic|Ebbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H783z4 , soc_inst|m0_1|u_logic|H783z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1u2z4 , soc_inst|m0_1|u_logic|Y1u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~2 , soc_inst|m0_1|u_logic|Ebbwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hbv2z4~feeder , soc_inst|m0_1|u_logic|Hbv2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hbv2z4 , soc_inst|m0_1|u_logic|Hbv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2m2z4~feeder , soc_inst|m0_1|u_logic|H2m2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2m2z4 , soc_inst|m0_1|u_logic|H2m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4~3 , soc_inst|m0_1|u_logic|Ebbwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebbwx4 , soc_inst|m0_1|u_logic|Ebbwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~3 , soc_inst|m0_1|u_logic|Bdwwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~0 , soc_inst|m0_1|u_logic|Bdwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~1 , soc_inst|m0_1|u_logic|Bdwwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~2 , soc_inst|m0_1|u_logic|Bdwwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4 , soc_inst|m0_1|u_logic|Bdwwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~0 , soc_inst|m0_1|u_logic|Jmdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajn2z4 , soc_inst|m0_1|u_logic|Ajn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gju2z4 , soc_inst|m0_1|u_logic|Gju2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po83z4 , soc_inst|m0_1|u_logic|Po83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~1 , soc_inst|m0_1|u_logic|Ylbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4 , soc_inst|m0_1|u_logic|Mhn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psv2z4 , soc_inst|m0_1|u_logic|Psv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yfn2z4~feeder , soc_inst|m0_1|u_logic|Yfn2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yfn2z4 , soc_inst|m0_1|u_logic|Yfn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vu93z4 , soc_inst|m0_1|u_logic|Vu93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~0 , soc_inst|m0_1|u_logic|Ylbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4 , soc_inst|m0_1|u_logic|Ylbwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duu2z4~feeder , soc_inst|m0_1|u_logic|Duu2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duu2z4 , soc_inst|m0_1|u_logic|Duu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4~feeder , soc_inst|m0_1|u_logic|Dtj2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dtj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~3 , soc_inst|m0_1|u_logic|Duuwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ukt2z4 , soc_inst|m0_1|u_logic|Ukt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq73z4~feeder , soc_inst|m0_1|u_logic|Dq73z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE , soc_inst|m0_1|u_logic|Dq73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~2 , soc_inst|m0_1|u_logic|Duuwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txj2z4 , soc_inst|m0_1|u_logic|Txj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fwj2z4~feeder , soc_inst|m0_1|u_logic|Fwj2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fwj2z4 , soc_inst|m0_1|u_logic|Fwj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~1 , soc_inst|m0_1|u_logic|Duuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ruj2z4 , soc_inst|m0_1|u_logic|Ruj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug63z4 , soc_inst|m0_1|u_logic|Ug63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4~0 , soc_inst|m0_1|u_logic|Duuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duuwx4 , soc_inst|m0_1|u_logic|Duuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kw7wx4~0 , soc_inst|m0_1|u_logic|Kw7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~1 , soc_inst|m0_1|u_logic|Jmdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pm9wx4~0 , soc_inst|m0_1|u_logic|Pm9wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ijcwx4~0 , soc_inst|m0_1|u_logic|Ijcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3awx4~0 , soc_inst|m0_1|u_logic|O3awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kih2z4~0 , soc_inst|m0_1|u_logic|Kih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~0 , soc_inst|m0_1|u_logic|Yhnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~1 , soc_inst|m0_1|u_logic|Yhnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cqo2z4 , soc_inst|m0_1|u_logic|Cqo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw83z4 , soc_inst|m0_1|u_logic|Jw83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fio2z4 , soc_inst|m0_1|u_logic|Fio2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~1 , soc_inst|m0_1|u_logic|Eruwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jlo2z4 , soc_inst|m0_1|u_logic|Jlo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll63z4 , soc_inst|m0_1|u_logic|Ll63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~0 , soc_inst|m0_1|u_logic|Eruwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpt2z4 , soc_inst|m0_1|u_logic|Lpt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu73z4 , soc_inst|m0_1|u_logic|Uu73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~2 , soc_inst|m0_1|u_logic|Eruwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4 , soc_inst|m0_1|u_logic|Ujo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~3 , soc_inst|m0_1|u_logic|Eruwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eruwx4 , soc_inst|m0_1|u_logic|Eruwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Noo2z4 , soc_inst|m0_1|u_logic|Noo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4 , soc_inst|m0_1|u_logic|Wzy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ue9wx4~0 , soc_inst|m0_1|u_logic|Ue9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk13z4 , soc_inst|m0_1|u_logic|Bk13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~1 , soc_inst|m0_1|u_logic|N662z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1j2z4 , soc_inst|m0_1|u_logic|M1j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G02wx4~0 , soc_inst|m0_1|u_logic|G02wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pu1wx4 , soc_inst|m0_1|u_logic|Pu1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K862z4~0 , soc_inst|m0_1|u_logic|K862z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc53z4 , soc_inst|m0_1|u_logic|Cc53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T243z4~feeder , soc_inst|m0_1|u_logic|T243z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T243z4 , soc_inst|m0_1|u_logic|T243z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~0 , soc_inst|m0_1|u_logic|N662z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yoz2z4 , soc_inst|m0_1|u_logic|Yoz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sl03z4 , soc_inst|m0_1|u_logic|Sl03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~2 , soc_inst|m0_1|u_logic|N662z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N662z4~3 , soc_inst|m0_1|u_logic|N662z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrnvx4~0 , soc_inst|m0_1|u_logic|Xrnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ehcwx4~0 , soc_inst|m0_1|u_logic|Ehcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmawx4~0 , soc_inst|m0_1|u_logic|Rmawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~0 , soc_inst|m0_1|u_logic|Mdzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ducvx4 , soc_inst|m0_1|u_logic|Ducvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sscvx4 , soc_inst|m0_1|u_logic|Sscvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C8rwx4~0 , soc_inst|m0_1|u_logic|C8rwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V9iwx4~0 , soc_inst|m0_1|u_logic|V9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~1 , soc_inst|m0_1|u_logic|Wfhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9z2z4 , soc_inst|m0_1|u_logic|K9z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~0 , soc_inst|m0_1|u_logic|Wfhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~2 , soc_inst|m0_1|u_logic|Wfhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE , soc_inst|m0_1|u_logic|K9z2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~0 , soc_inst|m0_1|u_logic|Tuawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C51xx4~0 , soc_inst|m0_1|u_logic|C51xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X553z4~feeder , soc_inst|m0_1|u_logic|X553z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X553z4 , soc_inst|m0_1|u_logic|X553z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cll2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sd1xx4~0 , soc_inst|m0_1|u_logic|Sd1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ikz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ch03z4~feeder , soc_inst|m0_1|u_logic|Ch03z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ch03z4 , soc_inst|m0_1|u_logic|Ch03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wd13z4~feeder , soc_inst|m0_1|u_logic|Wd13z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wd13z4 , soc_inst|m0_1|u_logic|Wd13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE , soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~2 , soc_inst|m0_1|u_logic|Ht5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mcz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow33z4~feeder , soc_inst|m0_1|u_logic|Ow33z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE , soc_inst|m0_1|u_logic|Ow33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~1 , soc_inst|m0_1|u_logic|Ht5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~3 , soc_inst|m0_1|u_logic|Ht5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po73z4 , soc_inst|m0_1|u_logic|Po73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gjt2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~1 , soc_inst|m0_1|u_logic|Xowwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qml2z4 , soc_inst|m0_1|u_logic|Qml2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psu2z4~feeder , soc_inst|m0_1|u_logic|Psu2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psu2z4 , soc_inst|m0_1|u_logic|Psu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Spl2z4 , soc_inst|m0_1|u_logic|Spl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Grl2z4 , soc_inst|m0_1|u_logic|Grl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~0 , soc_inst|m0_1|u_logic|Xowwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xowwx4 , soc_inst|m0_1|u_logic|Xowwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~0 , soc_inst|m0_1|u_logic|Ht5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~1 , soc_inst|m0_1|u_logic|Tuawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cll2z4 , soc_inst|m0_1|u_logic|Cll2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pl62z4~0 , soc_inst|m0_1|u_logic|Pl62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn23z4 , soc_inst|m0_1|u_logic|Fn23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~1 , soc_inst|m0_1|u_logic|Sj62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow33z4 , soc_inst|m0_1|u_logic|Ow33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~0 , soc_inst|m0_1|u_logic|Sj62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcz2z4 , soc_inst|m0_1|u_logic|Mcz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ikz2z4 , soc_inst|m0_1|u_logic|Ikz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~2 , soc_inst|m0_1|u_logic|Sj62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~3 , soc_inst|m0_1|u_logic|Sj62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yonvx4~0 , soc_inst|m0_1|u_logic|Yonvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wsawx4~0 , soc_inst|m0_1|u_logic|Wsawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~93 , soc_inst|m0_1|u_logic|Add5~93, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~101 , soc_inst|m0_1|u_logic|Add5~101, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~33 , soc_inst|m0_1|u_logic|Add5~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~97 , soc_inst|m0_1|u_logic|Add5~97, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~109 , soc_inst|m0_1|u_logic|Add5~109, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~37 , soc_inst|m0_1|u_logic|Add5~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~81 , soc_inst|m0_1|u_logic|Add5~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4~0 , soc_inst|m0_1|u_logic|Z4qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D31wx4~0 , soc_inst|m0_1|u_logic|D31wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~0 , soc_inst|m0_1|u_logic|Qs7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qs7wx4~1 , soc_inst|m0_1|u_logic|Qs7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Phlwx4~0 , soc_inst|m0_1|u_logic|Phlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jp3wx4 , soc_inst|m0_1|u_logic|Jp3wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjlwx4~0 , soc_inst|m0_1|u_logic|Fjlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djywx4~0 , soc_inst|m0_1|u_logic|Djywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lstwx4~0 , soc_inst|m0_1|u_logic|Lstwx4~0, de1_soc_wrapper, 1
-instance = comp, \SW[7]~input , SW[7]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][7] , soc_inst|switches_1|switch_store[0][7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[7] , soc_inst|m0_1|u_logic|hwdata_o[7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[7]~4 , soc_inst|ram_1|data_to_memory[7]~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|To33z4~DUPLICATE , soc_inst|m0_1|u_logic|To33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L763z4~feeder , soc_inst|m0_1|u_logic|L763z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L763z4~DUPLICATE , soc_inst|m0_1|u_logic|L763z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~3 , soc_inst|m0_1|u_logic|Vf5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE , soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kf23z4 , soc_inst|m0_1|u_logic|Kf23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~0 , soc_inst|m0_1|u_logic|Vf5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hue3z4 , soc_inst|m0_1|u_logic|Hue3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rpe3z4 , soc_inst|m0_1|u_logic|Rpe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ft73z4 , soc_inst|m0_1|u_logic|Ft73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G02wx4 , soc_inst|m0_1|u_logic|G02wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cai3z4 , soc_inst|m0_1|u_logic|Cai3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8i3z4 , soc_inst|m0_1|u_logic|N8i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE , soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uu83z4 , soc_inst|m0_1|u_logic|Uu83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~7 , soc_inst|m0_1|u_logic|O7zvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE , soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y21xx4~0 , soc_inst|m0_1|u_logic|Y21xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fre3z4 , soc_inst|m0_1|u_logic|Fre3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N71xx4~0 , soc_inst|m0_1|u_logic|N71xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~4 , soc_inst|m0_1|u_logic|Vf5wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE , soc_inst|m0_1|u_logic|I4s2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~1 , soc_inst|m0_1|u_logic|Vf5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy43z4~feeder , soc_inst|m0_1|u_logic|Cy43z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy43z4 , soc_inst|m0_1|u_logic|Cy43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2s2z4~feeder , soc_inst|m0_1|u_logic|U2s2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2s2z4 , soc_inst|m0_1|u_logic|U2s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~2 , soc_inst|m0_1|u_logic|Vf5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tse3z4 , soc_inst|m0_1|u_logic|Tse3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE , soc_inst|m0_1|u_logic|Dq83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Cxc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug73z4 , soc_inst|m0_1|u_logic|Ug73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~5 , soc_inst|m0_1|u_logic|Vf5wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duv2z4 , soc_inst|m0_1|u_logic|Duv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uku2z4 , soc_inst|m0_1|u_logic|Uku2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~6 , soc_inst|m0_1|u_logic|Vf5wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~7 , soc_inst|m0_1|u_logic|Vf5wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~8 , soc_inst|m0_1|u_logic|Vf5wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~1 , soc_inst|m0_1|u_logic|Ox1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~0 , soc_inst|m0_1|u_logic|Kzbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~1 , soc_inst|m0_1|u_logic|Kzbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~41 , soc_inst|m0_1|u_logic|Add5~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~113 , soc_inst|m0_1|u_logic|Add5~113, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~0 , soc_inst|m0_1|u_logic|Ox1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ksbwx4~0 , soc_inst|m0_1|u_logic|Ksbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iu1wx4~0 , soc_inst|m0_1|u_logic|Iu1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W5s2z4 , soc_inst|m0_1|u_logic|W5s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE , soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~0 , soc_inst|m0_1|u_logic|Pybwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq83z4 , soc_inst|m0_1|u_logic|Dq83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~2 , soc_inst|m0_1|u_logic|Pybwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cxc3z4 , soc_inst|m0_1|u_logic|Cxc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~1 , soc_inst|m0_1|u_logic|Pybwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I4s2z4 , soc_inst|m0_1|u_logic|I4s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Duv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~3 , soc_inst|m0_1|u_logic|Pybwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pybwx4 , soc_inst|m0_1|u_logic|Pybwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|To33z4 , soc_inst|m0_1|u_logic|To33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE , soc_inst|m0_1|u_logic|Kf23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~1 , soc_inst|m0_1|u_logic|Oubwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~2 , soc_inst|m0_1|u_logic|Oubwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwbwx4~0 , soc_inst|m0_1|u_logic|Lwbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L763z4 , soc_inst|m0_1|u_logic|L763z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~0 , soc_inst|m0_1|u_logic|Oubwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~3 , soc_inst|m0_1|u_logic|Oubwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Konvx4~0 , soc_inst|m0_1|u_logic|Konvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~49 , soc_inst|m0_1|u_logic|Add3~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~45 , soc_inst|m0_1|u_logic|Add3~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~41 , soc_inst|m0_1|u_logic|Add3~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xxovx4 , soc_inst|m0_1|u_logic|Xxovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[7] , soc_inst|ram_1|saved_word_address[7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[7]~7 , soc_inst|ram_1|memory.raddr_a[7]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[8] , soc_inst|ram_1|saved_word_address[8], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[8]~8 , soc_inst|ram_1|memory.raddr_a[8]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlnwx4~0 , soc_inst|m0_1|u_logic|Nlnwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T4uvx4~0 , soc_inst|m0_1|u_logic|T4uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I7owx4 , soc_inst|m0_1|u_logic|I7owx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ffs2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~0 , soc_inst|m0_1|u_logic|F4nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4nvx4~1 , soc_inst|m0_1|u_logic|F4nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K3l2z4 , soc_inst|m0_1|u_logic|K3l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Txtvx4~0 , soc_inst|m0_1|u_logic|Txtvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4~0 , soc_inst|m0_1|u_logic|Qfa3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H6tvx4~0 , soc_inst|m0_1|u_logic|H6tvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5ovx4 , soc_inst|m0_1|u_logic|C5ovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4 , soc_inst|m0_1|u_logic|Qfa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~5 , soc_inst|m0_1|u_logic|hwdata_o~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A5uvx4~0 , soc_inst|m0_1|u_logic|A5uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5tvx4 , soc_inst|m0_1|u_logic|T5tvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tna3z4 , soc_inst|m0_1|u_logic|Tna3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aea3z4~0 , soc_inst|m0_1|u_logic|Aea3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aea3z4 , soc_inst|m0_1|u_logic|Aea3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Etmvx4~0 , soc_inst|m0_1|u_logic|Etmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE , soc_inst|m0_1|u_logic|F2o2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~94 , soc_inst|m0_1|u_logic|Add0~94, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~33 , soc_inst|m0_1|u_logic|Add0~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xsmvx4~0 , soc_inst|m0_1|u_logic|Xsmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C4b3z4 , soc_inst|m0_1|u_logic|C4b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5m2z4 , soc_inst|m0_1|u_logic|J5m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X6m2z4 , soc_inst|m0_1|u_logic|X6m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po53z4 , soc_inst|m0_1|u_logic|Po53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf43z4 , soc_inst|m0_1|u_logic|Gf43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X533z4 , soc_inst|m0_1|u_logic|X533z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bv03z4 , soc_inst|m0_1|u_logic|Bv03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4~2 , soc_inst|m0_1|u_logic|R40wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hyz2z4 , soc_inst|m0_1|u_logic|Hyz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow13z4 , soc_inst|m0_1|u_logic|Ow13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xx93z4 , soc_inst|m0_1|u_logic|Xx93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4~1 , soc_inst|m0_1|u_logic|R40wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4~0 , soc_inst|m0_1|u_logic|R40wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R40wx4 , soc_inst|m0_1|u_logic|R40wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wq5wx4 , soc_inst|m0_1|u_logic|Wq5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ab9wx4~0 , soc_inst|m0_1|u_logic|Ab9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R99wx4~0 , soc_inst|m0_1|u_logic|R99wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsd3z4 , soc_inst|m0_1|u_logic|Lsd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pvd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyd3z4 , soc_inst|m0_1|u_logic|Tyd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~6 , soc_inst|m0_1|u_logic|Gm1wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE , soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qc1xx4~0 , soc_inst|m0_1|u_logic|Qc1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE , soc_inst|m0_1|u_logic|Aud3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~7 , soc_inst|m0_1|u_logic|Gm1wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~8 , soc_inst|m0_1|u_logic|Gm1wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R99wx4~1 , soc_inst|m0_1|u_logic|R99wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~1 , soc_inst|m0_1|u_logic|Aj1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~2 , soc_inst|m0_1|u_logic|Aj1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~1 , soc_inst|m0_1|u_logic|Xk1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~0 , soc_inst|m0_1|u_logic|Xk1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nl53z4 , soc_inst|m0_1|u_logic|Nl53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilp2z4~feeder , soc_inst|m0_1|u_logic|Ilp2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec43z4~feeder , soc_inst|m0_1|u_logic|Ec43z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wmp2z4 , soc_inst|m0_1|u_logic|Wmp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fvz2z4 , soc_inst|m0_1|u_logic|Fvz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~6 , soc_inst|m0_1|u_logic|Eo5wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mt13z4~feeder , soc_inst|m0_1|u_logic|Mt13z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mt13z4 , soc_inst|m0_1|u_logic|Mt13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zr03z4 , soc_inst|m0_1|u_logic|Zr03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V233z4~DUPLICATE , soc_inst|m0_1|u_logic|V233z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Efp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~5 , soc_inst|m0_1|u_logic|Eo5wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~1 , soc_inst|m0_1|u_logic|Eo5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~2 , soc_inst|m0_1|u_logic|Eo5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[5] , soc_inst|m0_1|u_logic|hwdata_o[5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mka3z4 , soc_inst|m0_1|u_logic|Mka3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~20 , soc_inst|m0_1|u_logic|hwdata_o~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wia3z4 , soc_inst|m0_1|u_logic|Wia3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~21 , soc_inst|m0_1|u_logic|Add0~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~3 , soc_inst|m0_1|u_logic|Cr1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P03wx4~0 , soc_inst|m0_1|u_logic|P03wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~0 , soc_inst|m0_1|u_logic|G6d3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~1 , soc_inst|m0_1|u_logic|G6d3z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d3z4 , soc_inst|m0_1|u_logic|G6d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffbwx4~0 , soc_inst|m0_1|u_logic|Ffbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~2 , soc_inst|m0_1|u_logic|Cr1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~0 , soc_inst|m0_1|u_logic|Cr1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~1 , soc_inst|m0_1|u_logic|Cr1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X563z4 , soc_inst|m0_1|u_logic|X563z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Okn2z4 , soc_inst|m0_1|u_logic|Okn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf73z4~feeder , soc_inst|m0_1|u_logic|Gf73z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf73z4 , soc_inst|m0_1|u_logic|Gf73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gju2z4 , soc_inst|m0_1|u_logic|Gju2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajn2z4 , soc_inst|m0_1|u_logic|Ajn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po83z4~DUPLICATE , soc_inst|m0_1|u_logic|Po83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~1 , soc_inst|m0_1|u_logic|Q1ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vu93z4~feeder , soc_inst|m0_1|u_logic|Vu93z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vu93z4 , soc_inst|m0_1|u_logic|Vu93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mhn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Psv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yfn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~0 , soc_inst|m0_1|u_logic|Q1ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4 , soc_inst|m0_1|u_logic|Q1ywx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa03z4 , soc_inst|m0_1|u_logic|Wa03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn33z4 , soc_inst|m0_1|u_logic|Fn33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wd23z4~feeder , soc_inst|m0_1|u_logic|Wd23z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wd23z4 , soc_inst|m0_1|u_logic|Wd23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q713z4 , soc_inst|m0_1|u_logic|Q713z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~2 , soc_inst|m0_1|u_logic|Sh5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow43z4~feeder , soc_inst|m0_1|u_logic|Ow43z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow43z4 , soc_inst|m0_1|u_logic|Ow43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cmn2z4 , soc_inst|m0_1|u_logic|Cmn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~1 , soc_inst|m0_1|u_logic|Sh5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~3 , soc_inst|m0_1|u_logic|Sh5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~0 , soc_inst|m0_1|u_logic|Sh5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[2] , soc_inst|m0_1|u_logic|hwdata_o[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gha3z4~0 , soc_inst|m0_1|u_logic|Gha3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gha3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gha3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qsmvx4~0 , soc_inst|m0_1|u_logic|Qsmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M2b3z4 , soc_inst|m0_1|u_logic|M2b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~57 , soc_inst|m0_1|u_logic|Add0~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsmvx4~0 , soc_inst|m0_1|u_logic|Jsmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W0b3z4 , soc_inst|m0_1|u_logic|W0b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~41 , soc_inst|m0_1|u_logic|Add0~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gza3z4 , soc_inst|m0_1|u_logic|Gza3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Taa3z4~0 , soc_inst|m0_1|u_logic|Taa3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Taa3z4 , soc_inst|m0_1|u_logic|Taa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Csmvx4~0 , soc_inst|m0_1|u_logic|Csmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~65 , soc_inst|m0_1|u_logic|Add0~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vrmvx4~0 , soc_inst|m0_1|u_logic|Vrmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxa3z4 , soc_inst|m0_1|u_logic|Qxa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5tvx4~0 , soc_inst|m0_1|u_logic|M5tvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ts5wx4~0 , soc_inst|m0_1|u_logic|Ts5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zyovx4 , soc_inst|m0_1|u_logic|Zyovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uic3z4~0 , soc_inst|m0_1|u_logic|Uic3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uic3z4 , soc_inst|m0_1|u_logic|Uic3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~0 , soc_inst|m0_1|u_logic|Cymwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~1 , soc_inst|m0_1|u_logic|Cymwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B7owx4 , soc_inst|m0_1|u_logic|B7owx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~2 , soc_inst|m0_1|u_logic|Cymwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oir2z4 , soc_inst|m0_1|u_logic|Oir2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dy4xx4~0 , soc_inst|m0_1|u_logic|Dy4xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kfr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgu2z4 , soc_inst|m0_1|u_logic|Cgu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~4 , soc_inst|m0_1|u_logic|Ze1wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk33z4 , soc_inst|m0_1|u_logic|Bk33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll83z4 , soc_inst|m0_1|u_logic|Ll83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~0 , soc_inst|m0_1|u_logic|Ze1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gcr2z4 , soc_inst|m0_1|u_logic|Gcr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr93z4 , soc_inst|m0_1|u_logic|Rr93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~3 , soc_inst|m0_1|u_logic|Ze1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M413z4 , soc_inst|m0_1|u_logic|M413z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S703z4 , soc_inst|m0_1|u_logic|S703z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~2 , soc_inst|m0_1|u_logic|Ze1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vdr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vdr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lpv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~1 , soc_inst|m0_1|u_logic|Ze1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~5 , soc_inst|m0_1|u_logic|Ze1wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc73z4~feeder , soc_inst|m0_1|u_logic|Cc73z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc73z4 , soc_inst|m0_1|u_logic|Cc73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zgr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE , soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE , soc_inst|m0_1|u_logic|Kt43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~6 , soc_inst|m0_1|u_logic|Ze1wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T263z4 , soc_inst|m0_1|u_logic|T263z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~8 , soc_inst|m0_1|u_logic|O7zvx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi13z4~feeder , soc_inst|m0_1|u_logic|Mi13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yv1wx4~0 , soc_inst|m0_1|u_logic|Yv1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yv1wx4~1 , soc_inst|m0_1|u_logic|Yv1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE , soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vuo2z4~feeder , soc_inst|m0_1|u_logic|Vuo2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vuo2z4 , soc_inst|m0_1|u_logic|Vuo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~1 , soc_inst|m0_1|u_logic|O7zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gto2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0pvx4~0 , soc_inst|m0_1|u_logic|P0pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~1 , soc_inst|m0_1|u_logic|Sknwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sknwx4~2 , soc_inst|m0_1|u_logic|Sknwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imnwx4 , soc_inst|m0_1|u_logic|Imnwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Meyvx4 , soc_inst|m0_1|u_logic|Meyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzf3z4 , soc_inst|m0_1|u_logic|Kzf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu1wx4~1 , soc_inst|m0_1|u_logic|Wu1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vxf3z4 , soc_inst|m0_1|u_logic|Vxf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~2 , soc_inst|m0_1|u_logic|I3a2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0g3z4 , soc_inst|m0_1|u_logic|Z0g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5a2z4~0 , soc_inst|m0_1|u_logic|F5a2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE , soc_inst|m0_1|u_logic|O2g3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fw1wx4~1 , soc_inst|m0_1|u_logic|Fw1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr43z4 , soc_inst|m0_1|u_logic|Vr43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mw1wx4~1 , soc_inst|m0_1|u_logic|Mw1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E163z4 , soc_inst|m0_1|u_logic|E163z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~0 , soc_inst|m0_1|u_logic|I3a2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ue9wx4~0 , soc_inst|m0_1|u_logic|Ue9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D923z4~feeder , soc_inst|m0_1|u_logic|D923z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D923z4~DUPLICATE , soc_inst|m0_1|u_logic|D923z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ydyvx4 , soc_inst|m0_1|u_logic|Ydyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi33z4 , soc_inst|m0_1|u_logic|Mi33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~1 , soc_inst|m0_1|u_logic|I3a2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~3 , soc_inst|m0_1|u_logic|I3a2z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psh3z4 , soc_inst|m0_1|u_logic|Psh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y91xx4~0 , soc_inst|m0_1|u_logic|Y91xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr33z4 , soc_inst|m0_1|u_logic|Vr33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ft83z4~feeder , soc_inst|m0_1|u_logic|Ft83z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ft83z4 , soc_inst|m0_1|u_logic|Ft83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~7 , soc_inst|m0_1|u_logic|Z62wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi23z4 , soc_inst|m0_1|u_logic|Mi23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj73z4 , soc_inst|m0_1|u_logic|Wj73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~6 , soc_inst|m0_1|u_logic|Z62wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~8 , soc_inst|m0_1|u_logic|Z62wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Arh3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fxv2z4 , soc_inst|m0_1|u_logic|Fxv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~3 , soc_inst|m0_1|u_logic|Z62wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE , soc_inst|m0_1|u_logic|Lph3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E153z4 , soc_inst|m0_1|u_logic|E153z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~2 , soc_inst|m0_1|u_logic|Z62wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na63z4 , soc_inst|m0_1|u_logic|Na63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0d3z4 , soc_inst|m0_1|u_logic|E0d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~1 , soc_inst|m0_1|u_logic|Z62wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccq2z4 , soc_inst|m0_1|u_logic|Ccq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~0 , soc_inst|m0_1|u_logic|Z62wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Euh3z4 , soc_inst|m0_1|u_logic|Euh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T04xx4~0 , soc_inst|m0_1|u_logic|T04xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnu2z4 , soc_inst|m0_1|u_logic|Wnu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rdq2z4 , soc_inst|m0_1|u_logic|Rdq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~4 , soc_inst|m0_1|u_logic|Z62wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~5 , soc_inst|m0_1|u_logic|Z62wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z62wx4 , soc_inst|m0_1|u_logic|Z62wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~45 , soc_inst|m0_1|u_logic|Add2~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~41 , soc_inst|m0_1|u_logic|Add2~41, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add2~85 , soc_inst|m0_1|u_logic|Add2~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~81 , soc_inst|m0_1|u_logic|Add2~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~0 , soc_inst|m0_1|u_logic|Ekhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8iwx4~0 , soc_inst|m0_1|u_logic|F8iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pmnwx4 , soc_inst|m0_1|u_logic|Pmnwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imu2z4 , soc_inst|m0_1|u_logic|Imu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rr83z4 , soc_inst|m0_1|u_logic|Rr83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~2 , soc_inst|m0_1|u_logic|Lr9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qyc3z4 , soc_inst|m0_1|u_logic|Qyc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asr2z4~feeder , soc_inst|m0_1|u_logic|Asr2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asr2z4 , soc_inst|m0_1|u_logic|Asr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~1 , soc_inst|m0_1|u_logic|Lr9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cvr2z4 , soc_inst|m0_1|u_logic|Cvr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ii73z4~feeder , soc_inst|m0_1|u_logic|Ii73z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE , soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~0 , soc_inst|m0_1|u_logic|Lr9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvv2z4 , soc_inst|m0_1|u_logic|Rvv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Otr2z4 , soc_inst|m0_1|u_logic|Otr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~3 , soc_inst|m0_1|u_logic|Lr9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4 , soc_inst|m0_1|u_logic|Lr9wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Godwx4~0 , soc_inst|m0_1|u_logic|Godwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D5ywx4~0 , soc_inst|m0_1|u_logic|D5ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gmd3z4 , soc_inst|m0_1|u_logic|Gmd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R99wx4~0 , soc_inst|m0_1|u_logic|R99wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5e3z4 , soc_inst|m0_1|u_logic|B5e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE , soc_inst|m0_1|u_logic|M3e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~4 , soc_inst|m0_1|u_logic|Gm1wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8e3z4~feeder , soc_inst|m0_1|u_logic|F8e3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8e3z4 , soc_inst|m0_1|u_logic|F8e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6e3z4~DUPLICATE , soc_inst|m0_1|u_logic|Q6e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~2 , soc_inst|m0_1|u_logic|Gm1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ibe3z4 , soc_inst|m0_1|u_logic|Ibe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uo5xx4~0 , soc_inst|m0_1|u_logic|Uo5xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X1e3z4 , soc_inst|m0_1|u_logic|X1e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0e3z4 , soc_inst|m0_1|u_logic|I0e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~1 , soc_inst|m0_1|u_logic|Gm1wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Snd3z4 , soc_inst|m0_1|u_logic|Snd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hpd3z4 , soc_inst|m0_1|u_logic|Hpd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~1 , soc_inst|m0_1|u_logic|Ai9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M3e3z4 , soc_inst|m0_1|u_logic|M3e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hpd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~3 , soc_inst|m0_1|u_logic|Gm1wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wqd3z4 , soc_inst|m0_1|u_logic|Wqd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Exd3z4 , soc_inst|m0_1|u_logic|Exd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~0 , soc_inst|m0_1|u_logic|Gm1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~5 , soc_inst|m0_1|u_logic|Gm1wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4 , soc_inst|m0_1|u_logic|Gm1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M3e3z4 , soc_inst|m0_1|u_logic|M3e3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~2 , soc_inst|m0_1|u_logic|Ai9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0e3z4 , soc_inst|m0_1|u_logic|I0e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X1e3z4~feeder , soc_inst|m0_1|u_logic|X1e3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X1e3z4 , soc_inst|m0_1|u_logic|X1e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~3 , soc_inst|m0_1|u_logic|Ai9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5e3z4 , soc_inst|m0_1|u_logic|B5e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsd3z4 , soc_inst|m0_1|u_logic|Lsd3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~0 , soc_inst|m0_1|u_logic|Ai9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hpd3z4 , soc_inst|m0_1|u_logic|Hpd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~1 , soc_inst|m0_1|u_logic|Ai9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4~3 , soc_inst|m0_1|u_logic|Ai9wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ai9wx4 , soc_inst|m0_1|u_logic|Ai9wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~0 , soc_inst|m0_1|u_logic|S3cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I463z4 , soc_inst|m0_1|u_logic|I463z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql33z4~DUPLICATE , soc_inst|m0_1|u_logic|Ql33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~3 , soc_inst|m0_1|u_logic|Zh5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu43z4 , soc_inst|m0_1|u_logic|Zu43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7s2z4~feeder , soc_inst|m0_1|u_logic|K7s2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7s2z4 , soc_inst|m0_1|u_logic|K7s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~2 , soc_inst|m0_1|u_logic|Zh5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rds2z4 , soc_inst|m0_1|u_logic|Rds2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D432z4~0 , soc_inst|m0_1|u_logic|D432z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B613z4~feeder , soc_inst|m0_1|u_logic|B613z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B613z4~DUPLICATE , soc_inst|m0_1|u_logic|B613z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H903z4 , soc_inst|m0_1|u_logic|H903z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~4 , soc_inst|m0_1|u_logic|Zh5wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc23z4~feeder , soc_inst|m0_1|u_logic|Hc23z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc23z4 , soc_inst|m0_1|u_logic|Hc23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oas2z4 , soc_inst|m0_1|u_logic|Oas2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~0 , soc_inst|m0_1|u_logic|Zh5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4~feeder , soc_inst|m0_1|u_logic|Z8s2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4 , soc_inst|m0_1|u_logic|Z8s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hvivx4~0 , soc_inst|m0_1|u_logic|Hvivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rkd3z4 , soc_inst|m0_1|u_logic|Rkd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~1 , soc_inst|m0_1|u_logic|Zh5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~5 , soc_inst|m0_1|u_logic|Zh5wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An83z4~feeder , soc_inst|m0_1|u_logic|An83z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An83z4 , soc_inst|m0_1|u_logic|An83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4 , soc_inst|m0_1|u_logic|Dcs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gt93z4 , soc_inst|m0_1|u_logic|Gt93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE , soc_inst|m0_1|u_logic|Rd73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~6 , soc_inst|m0_1|u_logic|Zh5wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arv2z4 , soc_inst|m0_1|u_logic|Arv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhu2z4 , soc_inst|m0_1|u_logic|Rhu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~7 , soc_inst|m0_1|u_logic|Zh5wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~8 , soc_inst|m0_1|u_logic|Zh5wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~1 , soc_inst|m0_1|u_logic|S3cwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~105 , soc_inst|m0_1|u_logic|Add5~105, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~9 , soc_inst|m0_1|u_logic|Zh5wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~2 , soc_inst|m0_1|u_logic|Do1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~1 , soc_inst|m0_1|u_logic|Do1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~0 , soc_inst|m0_1|u_logic|Do1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~2 , soc_inst|m0_1|u_logic|Glnwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pn1wx4~0 , soc_inst|m0_1|u_logic|Pn1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd73z4~feeder , soc_inst|m0_1|u_logic|Rd73z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd73z4 , soc_inst|m0_1|u_logic|Rd73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~0 , soc_inst|m0_1|u_logic|Pjqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An83z4~DUPLICATE , soc_inst|m0_1|u_logic|An83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~2 , soc_inst|m0_1|u_logic|Pjqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~1 , soc_inst|m0_1|u_logic|Pjqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE , soc_inst|m0_1|u_logic|Z8s2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~3 , soc_inst|m0_1|u_logic|Pjqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4 , soc_inst|m0_1|u_logic|Pjqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~0 , soc_inst|m0_1|u_logic|Sndwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Godwx4~1 , soc_inst|m0_1|u_logic|Godwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T9v2z4 , soc_inst|m0_1|u_logic|T9v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~3 , soc_inst|m0_1|u_logic|Bdwwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T583z4 , soc_inst|m0_1|u_logic|T583z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~2 , soc_inst|m0_1|u_logic|Bdwwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE , soc_inst|m0_1|u_logic|G4r2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~0 , soc_inst|m0_1|u_logic|Bdwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4~1 , soc_inst|m0_1|u_logic|Bdwwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdwwx4 , soc_inst|m0_1|u_logic|Bdwwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~0 , soc_inst|m0_1|u_logic|Qmdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G493z4 , soc_inst|m0_1|u_logic|G493z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipm2z4~feeder , soc_inst|m0_1|u_logic|Ipm2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipm2z4 , soc_inst|m0_1|u_logic|Ipm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~1 , soc_inst|m0_1|u_logic|Svqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wqm2z4 , soc_inst|m0_1|u_logic|Wqm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6v2z4 , soc_inst|m0_1|u_logic|R6v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~3 , soc_inst|m0_1|u_logic|Svqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R283z4~feeder , soc_inst|m0_1|u_logic|R283z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R283z4 , soc_inst|m0_1|u_logic|R283z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixt2z4~feeder , soc_inst|m0_1|u_logic|Ixt2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixt2z4 , soc_inst|m0_1|u_logic|Ixt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~2 , soc_inst|m0_1|u_logic|Svqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ksm2z4~feeder , soc_inst|m0_1|u_logic|Ksm2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ksm2z4 , soc_inst|m0_1|u_logic|Ksm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It63z4~DUPLICATE , soc_inst|m0_1|u_logic|It63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~0 , soc_inst|m0_1|u_logic|Svqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svqwx4 , soc_inst|m0_1|u_logic|Svqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~0 , soc_inst|m0_1|u_logic|Tkdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~1 , soc_inst|m0_1|u_logic|Qmdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6owx4 , soc_inst|m0_1|u_logic|G6owx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yz4wx4 , soc_inst|m0_1|u_logic|Yz4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxuvx4~0 , soc_inst|m0_1|u_logic|Oxuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1ivx4~0 , soc_inst|m0_1|u_logic|R1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipb3z4 , soc_inst|m0_1|u_logic|Ipb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fhc3z4~0 , soc_inst|m0_1|u_logic|Fhc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fhc3z4 , soc_inst|m0_1|u_logic|Fhc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~0 , soc_inst|m0_1|u_logic|Dewwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~1 , soc_inst|m0_1|u_logic|B2uvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U1uvx4 , soc_inst|m0_1|u_logic|U1uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Adt2z4 , soc_inst|m0_1|u_logic|Adt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~1 , soc_inst|m0_1|u_logic|Dewwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~0 , soc_inst|m0_1|u_logic|Gtmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~1 , soc_inst|m0_1|u_logic|Gtmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~2 , soc_inst|m0_1|u_logic|Gtmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wbk2z4 , soc_inst|m0_1|u_logic|Wbk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T2owx4~0 , soc_inst|m0_1|u_logic|T2owx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T2owx4~1 , soc_inst|m0_1|u_logic|T2owx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gmd3z4 , soc_inst|m0_1|u_logic|Gmd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~37 , soc_inst|m0_1|u_logic|Add3~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nbx2z4 , soc_inst|m0_1|u_logic|Nbx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~25 , soc_inst|m0_1|u_logic|Add2~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~17 , soc_inst|m0_1|u_logic|Add2~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~0 , soc_inst|m0_1|u_logic|Bmhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zoy2z4 , soc_inst|m0_1|u_logic|Zoy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jvxvx4 , soc_inst|m0_1|u_logic|Jvxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vnqvx4~0 , soc_inst|m0_1|u_logic|Vnqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7xvx4 , soc_inst|m0_1|u_logic|Y7xvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xipvx4~0 , soc_inst|m0_1|u_logic|Xipvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gqxvx4 , soc_inst|m0_1|u_logic|Gqxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Irxvx4~0 , soc_inst|m0_1|u_logic|Irxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpxvx4~0 , soc_inst|m0_1|u_logic|Zpxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnxvx4~0 , soc_inst|m0_1|u_logic|Hnxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dsqvx4 , soc_inst|m0_1|u_logic|Dsqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~1 , soc_inst|m0_1|u_logic|Rfpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffxvx4~0 , soc_inst|m0_1|u_logic|Ffxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~2 , soc_inst|m0_1|u_logic|Rfpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~3 , soc_inst|m0_1|u_logic|Rfpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~4 , soc_inst|m0_1|u_logic|Rfpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~0 , soc_inst|m0_1|u_logic|Rfpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~0 , soc_inst|m0_1|u_logic|Bkxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ae6wx4~0 , soc_inst|m0_1|u_logic|Ae6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~1 , soc_inst|m0_1|u_logic|Bkxvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~2 , soc_inst|m0_1|u_logic|Bkxvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9swx4~0 , soc_inst|m0_1|u_logic|U9swx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S8swx4~0 , soc_inst|m0_1|u_logic|S8swx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4 , soc_inst|m0_1|u_logic|Bkxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~5 , soc_inst|m0_1|u_logic|Rfpvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uup2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yplwx4~0 , soc_inst|m0_1|u_logic|Yplwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vopvx4~0 , soc_inst|m0_1|u_logic|Vopvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4 , soc_inst|m0_1|u_logic|Zcn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mmxvx4~0 , soc_inst|m0_1|u_logic|Mmxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~1 , soc_inst|m0_1|u_logic|Sbxvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpqvx4~0 , soc_inst|m0_1|u_logic|Zpqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~2 , soc_inst|m0_1|u_logic|Sbxvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][3] , soc_inst|switches_1|switch_store[0][3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[3]~26 , soc_inst|interconnect_1|HRDATA[3]~26, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7w2z4 , soc_inst|m0_1|u_logic|U7w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~0 , soc_inst|m0_1|u_logic|Q5vvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~0 , soc_inst|m0_1|u_logic|F5mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~1 , soc_inst|m0_1|u_logic|Cr0xx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lny2z4 , soc_inst|m0_1|u_logic|Lny2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xly2z4 , soc_inst|m0_1|u_logic|Xly2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W7hwx4~0 , soc_inst|m0_1|u_logic|W7hwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~0 , soc_inst|m0_1|u_logic|Poa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~0 , soc_inst|m0_1|u_logic|Ik4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk4wx4 , soc_inst|m0_1|u_logic|Bk4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~1 , soc_inst|m0_1|u_logic|Ik4wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kofwx4~0 , soc_inst|m0_1|u_logic|Kofwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Si4wx4~0 , soc_inst|m0_1|u_logic|Si4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9t2z4 , soc_inst|m0_1|u_logic|Y9t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~0 , soc_inst|m0_1|u_logic|Pd4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~1 , soc_inst|m0_1|u_logic|Pd4wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa13z4~feeder , soc_inst|m0_1|u_logic|Sa13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa13z4 , soc_inst|m0_1|u_logic|Sa13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jc1xx4~0 , soc_inst|m0_1|u_logic|Jc1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Isi2z4 , soc_inst|m0_1|u_logic|Isi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~0 , soc_inst|m0_1|u_logic|Nd3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T253z4 , soc_inst|m0_1|u_logic|T253z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ld1xx4~0 , soc_inst|m0_1|u_logic|Ld1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk23z4 , soc_inst|m0_1|u_logic|Bk23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~3 , soc_inst|m0_1|u_logic|Nd3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pfz2z4 , soc_inst|m0_1|u_logic|Pfz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ehz2z4~feeder , soc_inst|m0_1|u_logic|Ehz2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ehz2z4 , soc_inst|m0_1|u_logic|Ehz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N71xx4~0 , soc_inst|m0_1|u_logic|N71xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yd03z4 , soc_inst|m0_1|u_logic|Yd03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~4 , soc_inst|m0_1|u_logic|Nd3wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glj2z4 , soc_inst|m0_1|u_logic|Glj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K0qvx4 , soc_inst|m0_1|u_logic|K0qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmawx4~0 , soc_inst|m0_1|u_logic|Rmawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~0 , soc_inst|m0_1|u_logic|Y5zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3awx4~0 , soc_inst|m0_1|u_logic|O3awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~0 , soc_inst|m0_1|u_logic|Phh2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~1 , soc_inst|m0_1|u_logic|Phh2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~1 , soc_inst|m0_1|u_logic|Y5zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zwcvx4 , soc_inst|m0_1|u_logic|Zwcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ovcvx4 , soc_inst|m0_1|u_logic|Ovcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V41xx4~0 , soc_inst|m0_1|u_logic|V41xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~1 , soc_inst|m0_1|u_logic|R7iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Akewx4~0 , soc_inst|m0_1|u_logic|Akewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhc2z4~0 , soc_inst|m0_1|u_logic|Fhc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~2 , soc_inst|m0_1|u_logic|Zqpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~0 , soc_inst|m0_1|u_logic|Zqpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~1 , soc_inst|m0_1|u_logic|Zqpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P37wx4~1 , soc_inst|m0_1|u_logic|P37wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P37wx4~0 , soc_inst|m0_1|u_logic|P37wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zqpvx4~3 , soc_inst|m0_1|u_logic|Zqpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wspvx4 , soc_inst|m0_1|u_logic|Wspvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lqpvx4~0 , soc_inst|m0_1|u_logic|Lqpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zei2z4 , soc_inst|m0_1|u_logic|Zei2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~0 , soc_inst|m0_1|u_logic|Mj7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~1 , soc_inst|m0_1|u_logic|Mj7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nf03z4 , soc_inst|m0_1|u_logic|Nf03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4 , soc_inst|m0_1|u_logic|Tiz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aez2z4 , soc_inst|m0_1|u_logic|Aez2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~4 , soc_inst|m0_1|u_logic|Izpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I453z4 , soc_inst|m0_1|u_logic|I453z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE , soc_inst|m0_1|u_logic|Ql23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~3 , soc_inst|m0_1|u_logic|Izpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu33z4 , soc_inst|m0_1|u_logic|Zu33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kjk2z4 , soc_inst|m0_1|u_logic|Kjk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~2 , soc_inst|m0_1|u_logic|Izpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ggk2z4 , soc_inst|m0_1|u_logic|Ggk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ta1xx4~0 , soc_inst|m0_1|u_logic|Ta1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U71xx4~0 , soc_inst|m0_1|u_logic|U71xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~1 , soc_inst|m0_1|u_logic|Izpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rek2z4 , soc_inst|m0_1|u_logic|Rek2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rht2z4 , soc_inst|m0_1|u_logic|Rht2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aru2z4 , soc_inst|m0_1|u_logic|Aru2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~6 , soc_inst|m0_1|u_logic|Izpvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd63z4 , soc_inst|m0_1|u_logic|Rd63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~5 , soc_inst|m0_1|u_logic|Izpvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~7 , soc_inst|m0_1|u_logic|Izpvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vhk2z4 , soc_inst|m0_1|u_logic|Vhk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc13z4 , soc_inst|m0_1|u_logic|Hc13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~0 , soc_inst|m0_1|u_logic|Izpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Izpvx4 , soc_inst|m0_1|u_logic|Izpvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S17wx4~0 , soc_inst|m0_1|u_logic|S17wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D47wx4~0 , soc_inst|m0_1|u_logic|D47wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxpvx4~0 , soc_inst|m0_1|u_logic|Zxpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~0 , soc_inst|m0_1|u_logic|Rhnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[9] , soc_inst|ram_1|saved_word_address[9], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[9]~9 , soc_inst|ram_1|memory.raddr_a[9]~9, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add3~81 , soc_inst|m0_1|u_logic|Add3~81, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add3~77 , soc_inst|m0_1|u_logic|Add3~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wce3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dkr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vdr2z4 , soc_inst|m0_1|u_logic|Vdr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpv2z4 , soc_inst|m0_1|u_logic|Lpv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~3 , soc_inst|m0_1|u_logic|H2wwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfr2z4 , soc_inst|m0_1|u_logic|Kfr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc73z4 , soc_inst|m0_1|u_logic|Cc73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~0 , soc_inst|m0_1|u_logic|H2wwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr93z4 , soc_inst|m0_1|u_logic|Rr93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~1 , soc_inst|m0_1|u_logic|H2wwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgu2z4~feeder , soc_inst|m0_1|u_logic|Cgu2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgu2z4 , soc_inst|m0_1|u_logic|Cgu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll83z4~feeder , soc_inst|m0_1|u_logic|Ll83z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll83z4 , soc_inst|m0_1|u_logic|Ll83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~2 , soc_inst|m0_1|u_logic|H2wwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2wwx4 , soc_inst|m0_1|u_logic|H2wwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE , soc_inst|m0_1|u_logic|Sa23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk33z4 , soc_inst|m0_1|u_logic|Bk33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~1 , soc_inst|m0_1|u_logic|U9a2z4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kt43z4 , soc_inst|m0_1|u_logic|Kt43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T263z4 , soc_inst|m0_1|u_logic|T263z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~0 , soc_inst|m0_1|u_logic|U9a2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M413z4~DUPLICATE , soc_inst|m0_1|u_logic|M413z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S703z4~feeder , soc_inst|m0_1|u_logic|S703z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S703z4 , soc_inst|m0_1|u_logic|S703z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~2 , soc_inst|m0_1|u_logic|U9a2z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zgr2z4 , soc_inst|m0_1|u_logic|Zgr2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rba2z4~0 , soc_inst|m0_1|u_logic|Rba2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~2 , soc_inst|m0_1|u_logic|U9a2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sa23z4 , soc_inst|m0_1|u_logic|Sa23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~1 , soc_inst|m0_1|u_logic|U9a2z4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U9a2z4~3 , soc_inst|m0_1|u_logic|U9a2z4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pg1wx4~0 , soc_inst|m0_1|u_logic|Pg1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzl2z4 , soc_inst|m0_1|u_logic|Fzl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~0 , soc_inst|m0_1|u_logic|Ejawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~1 , soc_inst|m0_1|u_logic|Ejawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~45 , soc_inst|m0_1|u_logic|Add5~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~13 , soc_inst|m0_1|u_logic|Add5~13, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cqovx4 , soc_inst|m0_1|u_logic|Cqovx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|saved_word_address[10] , soc_inst|ram_1|saved_word_address[10], de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|memory.raddr_a[10]~10 , soc_inst|ram_1|memory.raddr_a[10]~10, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add3~105 , soc_inst|m0_1|u_logic|Add3~105, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~0 , soc_inst|m0_1|u_logic|Ciawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnv2z4 , soc_inst|m0_1|u_logic|Wnv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzf3z4 , soc_inst|m0_1|u_logic|Kzf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~3 , soc_inst|m0_1|u_logic|Hc1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lqr2z4~feeder , soc_inst|m0_1|u_logic|Lqr2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lqr2z4 , soc_inst|m0_1|u_logic|Lqr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Neu2z4~feeder , soc_inst|m0_1|u_logic|Neu2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Neu2z4 , soc_inst|m0_1|u_logic|Neu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~4 , soc_inst|m0_1|u_logic|Hc1wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E163z4~DUPLICATE , soc_inst|m0_1|u_logic|E163z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cq93z4~DUPLICATE , soc_inst|m0_1|u_logic|Cq93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~1 , soc_inst|m0_1|u_logic|Hc1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wor2z4 , soc_inst|m0_1|u_logic|Wor2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~0 , soc_inst|m0_1|u_logic|Hc1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O2g3z4 , soc_inst|m0_1|u_logic|O2g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X94xx4~0 , soc_inst|m0_1|u_logic|X94xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vxf3z4 , soc_inst|m0_1|u_logic|Vxf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr43z4 , soc_inst|m0_1|u_logic|Vr43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~2 , soc_inst|m0_1|u_logic|Hc1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~5 , soc_inst|m0_1|u_logic|Hc1wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D923z4 , soc_inst|m0_1|u_logic|D923z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4~feeder , soc_inst|m0_1|u_logic|Hnr2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4 , soc_inst|m0_1|u_logic|Hnr2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Na73z4 , soc_inst|m0_1|u_logic|Na73z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~6 , soc_inst|m0_1|u_logic|Hc1wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wj83z4~feeder , soc_inst|m0_1|u_logic|Wj83z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wj83z4 , soc_inst|m0_1|u_logic|Wj83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi33z4~feeder , soc_inst|m0_1|u_logic|Mi33z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi33z4 , soc_inst|m0_1|u_logic|Mi33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE , soc_inst|m0_1|u_logic|Mi33z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~7 , soc_inst|m0_1|u_logic|Hc1wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D923z4~feeder , soc_inst|m0_1|u_logic|D923z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D923z4~DUPLICATE , soc_inst|m0_1|u_logic|D923z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0g3z4~feeder , soc_inst|m0_1|u_logic|Z0g3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0g3z4 , soc_inst|m0_1|u_logic|Z0g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y91xx4~0 , soc_inst|m0_1|u_logic|Y91xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~8 , soc_inst|m0_1|u_logic|Hc1wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~0 , soc_inst|m0_1|u_logic|Ciawx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ciawx4~1 , soc_inst|m0_1|u_logic|Ciawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~1 , soc_inst|m0_1|u_logic|Ya1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~0 , soc_inst|m0_1|u_logic|Ya1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4 , soc_inst|m0_1|u_logic|Hc1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B91wx4~1 , soc_inst|m0_1|u_logic|B91wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~17 , soc_inst|m0_1|u_logic|Add5~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B91wx4~2 , soc_inst|m0_1|u_logic|B91wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B91wx4~0 , soc_inst|m0_1|u_logic|B91wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnr2z4 , soc_inst|m0_1|u_logic|Hnr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cq93z4 , soc_inst|m0_1|u_logic|Cq93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~1 , soc_inst|m0_1|u_logic|Zkuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE , soc_inst|m0_1|u_logic|Na73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~0 , soc_inst|m0_1|u_logic|Zkuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~3 , soc_inst|m0_1|u_logic|Zkuwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~2 , soc_inst|m0_1|u_logic|Zkuwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4 , soc_inst|m0_1|u_logic|Zkuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5a2z4~0 , soc_inst|m0_1|u_logic|F5a2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~2 , soc_inst|m0_1|u_logic|I3a2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E163z4 , soc_inst|m0_1|u_logic|E163z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~0 , soc_inst|m0_1|u_logic|I3a2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D923z4 , soc_inst|m0_1|u_logic|D923z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~1 , soc_inst|m0_1|u_logic|I3a2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I3a2z4~3 , soc_inst|m0_1|u_logic|I3a2z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ra1wx4~0 , soc_inst|m0_1|u_logic|Ra1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~5 , soc_inst|m0_1|u_logic|haddr_o~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[11] , soc_inst|ram_1|saved_word_address[11], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[11]~11 , soc_inst|ram_1|memory.raddr_a[11]~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sx3wx4~0 , soc_inst|m0_1|u_logic|Sx3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[28]~14 , soc_inst|ram_1|data_to_memory[28]~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[12]~19 , soc_inst|m0_1|u_logic|hwdata_o[12]~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[12]~13 , soc_inst|ram_1|data_to_memory[12]~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~0 , soc_inst|m0_1|u_logic|Lsmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~1 , soc_inst|m0_1|u_logic|Cawwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~0 , soc_inst|m0_1|u_logic|Cawwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~3 , soc_inst|m0_1|u_logic|Cawwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~2 , soc_inst|m0_1|u_logic|Cawwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cawwx4 , soc_inst|m0_1|u_logic|Cawwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duuwx4 , soc_inst|m0_1|u_logic|Duuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~0 , soc_inst|m0_1|u_logic|Jiowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~0 , soc_inst|m0_1|u_logic|Xmdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~1 , soc_inst|m0_1|u_logic|Jiowx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xuxwx4 , soc_inst|m0_1|u_logic|Xuxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R91xx4~0 , soc_inst|m0_1|u_logic|R91xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T31xx4~0 , soc_inst|m0_1|u_logic|T31xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnt2z4 , soc_inst|m0_1|u_logic|Wnt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~0 , soc_inst|m0_1|u_logic|O7zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE , soc_inst|m0_1|u_logic|Ft73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8i3z4 , soc_inst|m0_1|u_logic|N8i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cai3z4 , soc_inst|m0_1|u_logic|Cai3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE , soc_inst|m0_1|u_logic|Uu83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE , soc_inst|m0_1|u_logic|Wj63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~7 , soc_inst|m0_1|u_logic|O7zvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~8 , soc_inst|m0_1|u_logic|O7zvx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E143z4 , soc_inst|m0_1|u_logic|E143z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rro2z4 , soc_inst|m0_1|u_logic|Rro2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~2 , soc_inst|m0_1|u_logic|O7zvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6i3z4 , soc_inst|m0_1|u_logic|Y6i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5i3z4 , soc_inst|m0_1|u_logic|J5i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~5 , soc_inst|m0_1|u_logic|O7zvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gto2z4 , soc_inst|m0_1|u_logic|Gto2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Velvx4~0 , soc_inst|m0_1|u_logic|Velvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~0 , soc_inst|m0_1|u_logic|Kzbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohivx4~0 , soc_inst|m0_1|u_logic|Ohivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Szr2z4 , soc_inst|m0_1|u_logic|Szr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P03wx4~0 , soc_inst|m0_1|u_logic|P03wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~0 , soc_inst|m0_1|u_logic|G6d3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~0 , soc_inst|m0_1|u_logic|Ecawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psn2z4 , soc_inst|m0_1|u_logic|Psn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~1 , soc_inst|m0_1|u_logic|St0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V223z4~DUPLICATE , soc_inst|m0_1|u_logic|V223z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eun2z4 , soc_inst|m0_1|u_logic|Eun2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~0 , soc_inst|m0_1|u_logic|St0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixn2z4~feeder , soc_inst|m0_1|u_logic|Ixn2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixn2z4 , soc_inst|m0_1|u_logic|Ixn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq1xx4~0 , soc_inst|m0_1|u_logic|Jq1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu53z4~feeder , soc_inst|m0_1|u_logic|Wu53z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu53z4 , soc_inst|m0_1|u_logic|Wu53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec33z4 , soc_inst|m0_1|u_logic|Ec33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~3 , soc_inst|m0_1|u_logic|St0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arn2z4~feeder , soc_inst|m0_1|u_logic|Arn2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arn2z4 , soc_inst|m0_1|u_logic|Arn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nl43z4 , soc_inst|m0_1|u_logic|Nl43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~2 , soc_inst|m0_1|u_logic|St0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey03z4 , soc_inst|m0_1|u_logic|Ey03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K103z4 , soc_inst|m0_1|u_logic|K103z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~4 , soc_inst|m0_1|u_logic|St0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~5 , soc_inst|m0_1|u_logic|St0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Od83z4 , soc_inst|m0_1|u_logic|Od83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohv2z4 , soc_inst|m0_1|u_logic|Ohv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~7 , soc_inst|m0_1|u_logic|St0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fi93z4 , soc_inst|m0_1|u_logic|Fi93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F473z4 , soc_inst|m0_1|u_logic|F473z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~6 , soc_inst|m0_1|u_logic|St0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4~8 , soc_inst|m0_1|u_logic|St0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~1 , soc_inst|m0_1|u_logic|Ecawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~97 , soc_inst|m0_1|u_logic|Add3~97, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~93 , soc_inst|m0_1|u_logic|Add3~93, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~89 , soc_inst|m0_1|u_logic|Add3~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ay53z4 , soc_inst|m0_1|u_logic|Ay53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|If33z4 , soc_inst|m0_1|u_logic|If33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~3 , soc_inst|m0_1|u_logic|W21wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~4 , soc_inst|m0_1|u_logic|W21wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skv2z4 , soc_inst|m0_1|u_logic|Skv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jbu2z4~feeder , soc_inst|m0_1|u_logic|Jbu2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jbu2z4 , soc_inst|m0_1|u_logic|Jbu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~0 , soc_inst|m0_1|u_logic|W21wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5o2z4 , soc_inst|m0_1|u_logic|J5o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ro43z4 , soc_inst|m0_1|u_logic|Ro43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~2 , soc_inst|m0_1|u_logic|W21wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I113z4 , soc_inst|m0_1|u_logic|I113z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O403z4~DUPLICATE , soc_inst|m0_1|u_logic|O403z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~5 , soc_inst|m0_1|u_logic|W21wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8o2z4~feeder , soc_inst|m0_1|u_logic|N8o2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8o2z4 , soc_inst|m0_1|u_logic|N8o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z523z4 , soc_inst|m0_1|u_logic|Z523z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~1 , soc_inst|m0_1|u_logic|W21wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~6 , soc_inst|m0_1|u_logic|W21wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~0 , soc_inst|m0_1|u_logic|Kfawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~1 , soc_inst|m0_1|u_logic|Kfawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~0 , soc_inst|m0_1|u_logic|Ns9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~1 , soc_inst|m0_1|u_logic|Ns9wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mgawx4~0 , soc_inst|m0_1|u_logic|Mgawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|No93z4 , soc_inst|m0_1|u_logic|No93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mzp2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~3 , soc_inst|m0_1|u_logic|S71wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE , soc_inst|m0_1|u_logic|U5q2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R21xx4~0 , soc_inst|m0_1|u_logic|R21xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xg33z4 , soc_inst|m0_1|u_logic|Xg33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hi83z4 , soc_inst|m0_1|u_logic|Hi83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~0 , soc_inst|m0_1|u_logic|S71wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X213z4 , soc_inst|m0_1|u_logic|X213z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D603z4~feeder , soc_inst|m0_1|u_logic|D603z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D603z4 , soc_inst|m0_1|u_logic|D603z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~2 , soc_inst|m0_1|u_logic|S71wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmv2z4 , soc_inst|m0_1|u_logic|Hmv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~1 , soc_inst|m0_1|u_logic|S71wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4 , soc_inst|m0_1|u_logic|Q2q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4~feeder , soc_inst|m0_1|u_logic|Ycu2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4 , soc_inst|m0_1|u_logic|Ycu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~4 , soc_inst|m0_1|u_logic|S71wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4~5 , soc_inst|m0_1|u_logic|S71wx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y873z4 , soc_inst|m0_1|u_logic|Y873z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4q2z4~feeder , soc_inst|m0_1|u_logic|F4q2z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|F4q2z4 , soc_inst|m0_1|u_logic|F4q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gq43z4~feeder , soc_inst|m0_1|u_logic|Gq43z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gq43z4 , soc_inst|m0_1|u_logic|Gq43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qc1xx4~0 , soc_inst|m0_1|u_logic|Qc1xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|O723z4~DUPLICATE , soc_inst|m0_1|u_logic|O723z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gq43z4 , soc_inst|m0_1|u_logic|Gq43z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S71wx4~6 , soc_inst|m0_1|u_logic|S71wx4~6, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pz53z4 , soc_inst|m0_1|u_logic|Pz53z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S71wx4~7 , soc_inst|m0_1|u_logic|S71wx4~7, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S71wx4~8 , soc_inst|m0_1|u_logic|S71wx4~8, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mgawx4~1 , soc_inst|m0_1|u_logic|Mgawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J61wx4~1 , soc_inst|m0_1|u_logic|J61wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J61wx4~0 , soc_inst|m0_1|u_logic|J61wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O51wx4~0 , soc_inst|m0_1|u_logic|O51wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S71wx4 , soc_inst|m0_1|u_logic|S71wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M41wx4~0 , soc_inst|m0_1|u_logic|M41wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~2 , soc_inst|m0_1|u_logic|hwdata_o~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z0uvx4 , soc_inst|m0_1|u_logic|Z0uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhd3z4 , soc_inst|m0_1|u_logic|Lhd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qwowx4 , soc_inst|m0_1|u_logic|Qwowx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7pwx4 , soc_inst|m0_1|u_logic|K7pwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L0uvx4 , soc_inst|m0_1|u_logic|L0uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6l2z4 , soc_inst|m0_1|u_logic|Q6l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0uvx4 , soc_inst|m0_1|u_logic|E0uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K3uvx4~0 , soc_inst|m0_1|u_logic|K3uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W2uvx4 , soc_inst|m0_1|u_logic|W2uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aqp2z4 , soc_inst|m0_1|u_logic|Aqp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qztvx4 , soc_inst|m0_1|u_logic|Qztvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jxs2z4 , soc_inst|m0_1|u_logic|Jxs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2uvx4~0 , soc_inst|m0_1|u_logic|I2uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1a3z4 , soc_inst|m0_1|u_logic|B1a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Repwx4~0 , soc_inst|m0_1|u_logic|Repwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Repwx4~1 , soc_inst|m0_1|u_logic|Repwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lns2z4~feeder , soc_inst|m0_1|u_logic|Lns2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vytvx4 , soc_inst|m0_1|u_logic|Vytvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lns2z4 , soc_inst|m0_1|u_logic|Lns2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Repwx4~2 , soc_inst|m0_1|u_logic|Repwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ncpwx4~0 , soc_inst|m0_1|u_logic|Ncpwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[30]~29 , soc_inst|ram_1|data_to_memory[30]~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bq5wx4~0 , soc_inst|m0_1|u_logic|Bq5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[14]~30 , soc_inst|ram_1|data_to_memory[14]~30, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[30]~34 , soc_inst|interconnect_1|HRDATA[30]~34, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~1 , soc_inst|m0_1|u_logic|Kepwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~1 , soc_inst|m0_1|u_logic|Xmdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7ewx4~0 , soc_inst|m0_1|u_logic|J7ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9iwx4~0 , soc_inst|m0_1|u_logic|A9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~0 , soc_inst|m0_1|u_logic|C0ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~1 , soc_inst|m0_1|u_logic|Sndwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~1 , soc_inst|m0_1|u_logic|Tkdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~4 , soc_inst|m0_1|u_logic|hwdata_o~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J9d3z4 , soc_inst|m0_1|u_logic|J9d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7b3z4~0 , soc_inst|m0_1|u_logic|J7b3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7b3z4 , soc_inst|m0_1|u_logic|J7b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~89 , soc_inst|m0_1|u_logic|Add0~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ormvx4~0 , soc_inst|m0_1|u_logic|Ormvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z8b3z4 , soc_inst|m0_1|u_logic|Z8b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4~0 , soc_inst|m0_1|u_logic|Jkc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4 , soc_inst|m0_1|u_logic|Jkc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE , soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jruvx4~0 , soc_inst|m0_1|u_logic|Jruvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D1ivx4~0 , soc_inst|m0_1|u_logic|D1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F4c3z4 , soc_inst|m0_1|u_logic|F4c3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~0 , soc_inst|m0_1|u_logic|Wkpwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gcb3z4 , soc_inst|m0_1|u_logic|Gcb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pab3z4 , soc_inst|m0_1|u_logic|Pab3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~1 , soc_inst|m0_1|u_logic|Wkpwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~2 , soc_inst|m0_1|u_logic|Wkpwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~3 , soc_inst|m0_1|u_logic|Wkpwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][6] , soc_inst|switches_1|switch_store[0][6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~36 , soc_inst|interconnect_1|HRDATA[6]~36, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~0 , soc_inst|m0_1|u_logic|O9iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~1 , soc_inst|m0_1|u_logic|O9iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4~0 , soc_inst|m0_1|u_logic|Ba0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4 , soc_inst|m0_1|u_logic|Ba0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw03z4 , soc_inst|m0_1|u_logic|Pw03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzz2z4 , soc_inst|m0_1|u_logic|Vzz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~4 , soc_inst|m0_1|u_logic|Wa0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3n2z4 , soc_inst|m0_1|u_logic|N3n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cy13z4 , soc_inst|m0_1|u_logic|Cy13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~0 , soc_inst|m0_1|u_logic|Wa0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1n2z4 , soc_inst|m0_1|u_logic|Y1n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gha3z4 , soc_inst|m0_1|u_logic|Gha3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bec3z4 , soc_inst|m0_1|u_logic|Bec3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bec3z4~0 , soc_inst|m0_1|u_logic|Bec3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE , soc_inst|m0_1|u_logic|Bec3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Trq2z4 , soc_inst|m0_1|u_logic|Trq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ckuvx4~0 , soc_inst|m0_1|u_logic|Ckuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F2ivx4~0 , soc_inst|m0_1|u_logic|F2ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pxb3z4 , soc_inst|m0_1|u_logic|Pxb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mbt2z4~feeder , soc_inst|m0_1|u_logic|Mbt2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mbt2z4 , soc_inst|m0_1|u_logic|Mbt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yrqwx4~0 , soc_inst|m0_1|u_logic|Yrqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~0 , soc_inst|m0_1|u_logic|Ojmwx4~0, de1_soc_wrapper, 1
-instance = comp, \SW[2]~input , SW[2]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][2] , soc_inst|switches_1|switch_store[0][2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[2]~7 , soc_inst|ram_1|data_to_memory[2]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ld1xx4~0 , soc_inst|m0_1|u_logic|Ld1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F7qwx4 , soc_inst|m0_1|u_logic|F7qwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M7qwx4~0 , soc_inst|m0_1|u_logic|M7qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S5b3z4~feeder , soc_inst|m0_1|u_logic|S5b3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S5b3z4 , soc_inst|m0_1|u_logic|S5b3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R3uvx4~0 , soc_inst|m0_1|u_logic|R3uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ynvvx4 , soc_inst|m0_1|u_logic|Ynvvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C1lvx4~0 , soc_inst|m0_1|u_logic|C1lvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lgi3z4 , soc_inst|m0_1|u_logic|Lgi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pbl2z4 , soc_inst|m0_1|u_logic|Pbl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C193z4 , soc_inst|m0_1|u_logic|C193z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3v2z4 , soc_inst|m0_1|u_logic|N3v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Edl2z4 , soc_inst|m0_1|u_logic|Edl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~0 , soc_inst|m0_1|u_logic|U7uwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nz73z4 , soc_inst|m0_1|u_logic|Nz73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eq63z4 , soc_inst|m0_1|u_logic|Eq63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eut2z4 , soc_inst|m0_1|u_logic|Eut2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tel2z4 , soc_inst|m0_1|u_logic|Tel2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~1 , soc_inst|m0_1|u_logic|U7uwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U7uwx4 , soc_inst|m0_1|u_logic|U7uwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhl2z4 , soc_inst|m0_1|u_logic|Xhl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Igl2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M082z4~0 , soc_inst|m0_1|u_logic|M082z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uo13z4 , soc_inst|m0_1|u_logic|Uo13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dy23z4 , soc_inst|m0_1|u_logic|Dy23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Py72z4~1 , soc_inst|m0_1|u_logic|Py72z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wo03z4 , soc_inst|m0_1|u_logic|Wo03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Py72z4~2 , soc_inst|m0_1|u_logic|Py72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vg53z4 , soc_inst|m0_1|u_logic|Vg53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M743z4 , soc_inst|m0_1|u_logic|M743z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Py72z4~0 , soc_inst|m0_1|u_logic|Py72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Py72z4~3 , soc_inst|m0_1|u_logic|Py72z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4 , soc_inst|m0_1|u_logic|Oa3wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7cwx4~0 , soc_inst|m0_1|u_logic|T7cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bf9wx4~0 , soc_inst|m0_1|u_logic|Bf9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4j2z4 , soc_inst|m0_1|u_logic|M4j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgf3z4 , soc_inst|m0_1|u_logic|Pgf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eif3z4 , soc_inst|m0_1|u_logic|Eif3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~0 , soc_inst|m0_1|u_logic|Bc82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uuf3z4~feeder , soc_inst|m0_1|u_logic|Uuf3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uuf3z4 , soc_inst|m0_1|u_logic|Uuf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tjf3z4 , soc_inst|m0_1|u_logic|Tjf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ilf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~1 , soc_inst|m0_1|u_logic|Bc82z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qrf3z4 , soc_inst|m0_1|u_logic|Qrf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ftf3z4 , soc_inst|m0_1|u_logic|Ftf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~2 , soc_inst|m0_1|u_logic|Bc82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~3 , soc_inst|m0_1|u_logic|Bc82z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aff3z4 , soc_inst|m0_1|u_logic|Aff3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~0 , soc_inst|m0_1|u_logic|Icxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Orj2z4 , soc_inst|m0_1|u_logic|Orj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wbf3z4 , soc_inst|m0_1|u_logic|Wbf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~1 , soc_inst|m0_1|u_logic|Icxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bqf3z4 , soc_inst|m0_1|u_logic|Bqf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~2 , soc_inst|m0_1|u_logic|Icxwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mof3z4 , soc_inst|m0_1|u_logic|Mof3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmf3z4 , soc_inst|m0_1|u_logic|Xmf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~3 , soc_inst|m0_1|u_logic|Icxwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Icxwx4 , soc_inst|m0_1|u_logic|Icxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~4 , soc_inst|m0_1|u_logic|Bc82z4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ntnvx4~0 , soc_inst|m0_1|u_logic|Ntnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbmvx4~0 , soc_inst|m0_1|u_logic|Rbmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V3o2z4 , soc_inst|m0_1|u_logic|V3o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk23z4 , soc_inst|m0_1|u_logic|Bk23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T253z4 , soc_inst|m0_1|u_logic|T253z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~3 , soc_inst|m0_1|u_logic|Nd3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jc1xx4~0 , soc_inst|m0_1|u_logic|Jc1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sa13z4 , soc_inst|m0_1|u_logic|Sa13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Isi2z4 , soc_inst|m0_1|u_logic|Isi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~0 , soc_inst|m0_1|u_logic|Nd3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2j2z4 , soc_inst|m0_1|u_logic|X2j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xti2z4 , soc_inst|m0_1|u_logic|Xti2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc63z4 , soc_inst|m0_1|u_logic|Cc63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~5 , soc_inst|m0_1|u_logic|Nd3wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4 , soc_inst|m0_1|u_logic|Lpu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~6 , soc_inst|m0_1|u_logic|Nd3wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll73z4 , soc_inst|m0_1|u_logic|Ll73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~7 , soc_inst|m0_1|u_logic|Nd3wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glj2z4 , soc_inst|m0_1|u_logic|Glj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U71xx4~0 , soc_inst|m0_1|u_logic|U71xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ta1xx4~0 , soc_inst|m0_1|u_logic|Ta1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V1l2z4 , soc_inst|m0_1|u_logic|V1l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~0 , soc_inst|m0_1|u_logic|Phh2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eb72z4~0 , soc_inst|m0_1|u_logic|Eb72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pfz2z4 , soc_inst|m0_1|u_logic|Pfz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kt33z4 , soc_inst|m0_1|u_logic|Kt33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~0 , soc_inst|m0_1|u_logic|H972z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yd03z4~feeder , soc_inst|m0_1|u_logic|Yd03z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yd03z4 , soc_inst|m0_1|u_logic|Yd03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ehz2z4 , soc_inst|m0_1|u_logic|Ehz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~2 , soc_inst|m0_1|u_logic|H972z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~1 , soc_inst|m0_1|u_logic|H972z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H972z4~3 , soc_inst|m0_1|u_logic|H972z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A67wx4~0 , soc_inst|m0_1|u_logic|A67wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zwcvx4 , soc_inst|m0_1|u_logic|Zwcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~2 , soc_inst|m0_1|u_logic|Ec62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr23z4 , soc_inst|m0_1|u_logic|Vr23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE , soc_inst|m0_1|u_logic|Mi13z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~1 , soc_inst|m0_1|u_logic|Ec62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE , soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Be62z4~0 , soc_inst|m0_1|u_logic|Be62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na53z4 , soc_inst|m0_1|u_logic|Na53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~0 , soc_inst|m0_1|u_logic|Ec62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~3 , soc_inst|m0_1|u_logic|Ec62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8zvx4~0 , soc_inst|m0_1|u_logic|Q8zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ovcvx4 , soc_inst|m0_1|u_logic|Ovcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dih2z4~0 , soc_inst|m0_1|u_logic|Dih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~117 , soc_inst|m0_1|u_logic|Add5~117, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~9 , soc_inst|m0_1|u_logic|Add5~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~77 , soc_inst|m0_1|u_logic|Add5~77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~2 , soc_inst|m0_1|u_logic|R5zvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Kaf3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~105 , soc_inst|m0_1|u_logic|Add2~105, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~117 , soc_inst|m0_1|u_logic|Add2~117, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~113 , soc_inst|m0_1|u_logic|Add2~113, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~77 , soc_inst|m0_1|u_logic|Add2~77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~29 , soc_inst|m0_1|u_logic|Add2~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lrx2z4 , soc_inst|m0_1|u_logic|Lrx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~65 , soc_inst|m0_1|u_logic|Add3~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~61 , soc_inst|m0_1|u_logic|Add3~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~57 , soc_inst|m0_1|u_logic|Add3~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~101 , soc_inst|m0_1|u_logic|Add3~101, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~113 , soc_inst|m0_1|u_logic|Add3~113, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~109 , soc_inst|m0_1|u_logic|Add3~109, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~73 , soc_inst|m0_1|u_logic|Add3~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~21 , soc_inst|m0_1|u_logic|Add3~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nhzvx4 , soc_inst|m0_1|u_logic|Nhzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5lvx4~0 , soc_inst|m0_1|u_logic|R5lvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S8k2z4 , soc_inst|m0_1|u_logic|S8k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nz83z4 , soc_inst|m0_1|u_logic|Nz83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V0k2z4 , soc_inst|m0_1|u_logic|V0k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1v2z4 , soc_inst|m0_1|u_logic|Y1v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K2k2z4 , soc_inst|m0_1|u_logic|K2k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~0 , soc_inst|m0_1|u_logic|Feqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po63z4 , soc_inst|m0_1|u_logic|Po63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pst2z4 , soc_inst|m0_1|u_logic|Pst2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx73z4 , soc_inst|m0_1|u_logic|Yx73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z3k2z4 , soc_inst|m0_1|u_logic|Z3k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~1 , soc_inst|m0_1|u_logic|Feqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Feqwx4 , soc_inst|m0_1|u_logic|Feqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7k2z4 , soc_inst|m0_1|u_logic|D7k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5k2z4~feeder , soc_inst|m0_1|u_logic|O5k2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5k2z4 , soc_inst|m0_1|u_logic|O5k2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Au72z4~0 , soc_inst|m0_1|u_logic|Au72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE , soc_inst|m0_1|u_logic|Ow23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn13z4 , soc_inst|m0_1|u_logic|Fn13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~1 , soc_inst|m0_1|u_logic|Ds72z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE , soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nqz2z4 , soc_inst|m0_1|u_logic|Nqz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~2 , soc_inst|m0_1|u_logic|Ds72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X543z4 , soc_inst|m0_1|u_logic|X543z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf53z4~feeder , soc_inst|m0_1|u_logic|Gf53z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf53z4 , soc_inst|m0_1|u_logic|Gf53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~0 , soc_inst|m0_1|u_logic|Ds72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~3 , soc_inst|m0_1|u_logic|Ds72z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hlzvx4~0 , soc_inst|m0_1|u_logic|Hlzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wpcvx4 , soc_inst|m0_1|u_logic|Wpcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3awx4~0 , soc_inst|m0_1|u_logic|H3awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Locvx4 , soc_inst|m0_1|u_logic|Locvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4awx4~0 , soc_inst|m0_1|u_logic|J4awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ancvx4 , soc_inst|m0_1|u_logic|Ancvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~125 , soc_inst|m0_1|u_logic|Add5~125, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~121 , soc_inst|m0_1|u_logic|Add5~121, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~57 , soc_inst|m0_1|u_logic|Add5~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~5 , soc_inst|m0_1|u_logic|Add5~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~1 , soc_inst|m0_1|u_logic|Hihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~2 , soc_inst|m0_1|u_logic|Hihvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~0 , soc_inst|m0_1|u_logic|Hihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lrx2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~21 , soc_inst|m0_1|u_logic|Add2~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~9 , soc_inst|m0_1|u_logic|Add2~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~13 , soc_inst|m0_1|u_logic|Add2~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~1 , soc_inst|m0_1|u_logic|Add2~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~5 , soc_inst|m0_1|u_logic|Add2~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~0 , soc_inst|m0_1|u_logic|Wthvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~1 , soc_inst|m0_1|u_logic|Wthvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0l2z4 , soc_inst|m0_1|u_logic|J0l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~0 , soc_inst|m0_1|u_logic|O3ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~0 , soc_inst|m0_1|u_logic|Y5zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Phh2z4~1 , soc_inst|m0_1|u_logic|Phh2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~1 , soc_inst|m0_1|u_logic|Y5zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~2 , soc_inst|m0_1|u_logic|Y5zvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~0 , soc_inst|m0_1|u_logic|Uvdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vmj2z4 , soc_inst|m0_1|u_logic|Vmj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5v2z4 , soc_inst|m0_1|u_logic|C5v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~3 , soc_inst|m0_1|u_logic|Mnvwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpj2z4~feeder , soc_inst|m0_1|u_logic|Zpj2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpj2z4 , soc_inst|m0_1|u_logic|Zpj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R293z4 , soc_inst|m0_1|u_logic|R293z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~1 , soc_inst|m0_1|u_logic|Mnvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tr63z4 , soc_inst|m0_1|u_logic|Tr63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9j2z4 , soc_inst|m0_1|u_logic|F9j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~0 , soc_inst|m0_1|u_logic|Mnvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C183z4~DUPLICATE , soc_inst|m0_1|u_logic|C183z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvt2z4 , soc_inst|m0_1|u_logic|Tvt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~2 , soc_inst|m0_1|u_logic|Mnvwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4 , soc_inst|m0_1|u_logic|Mnvwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~0 , soc_inst|m0_1|u_logic|Mrdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~1 , soc_inst|m0_1|u_logic|Uvdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fwtwx4~0 , soc_inst|m0_1|u_logic|Fwtwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yih2z4~0 , soc_inst|m0_1|u_logic|Yih2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zbbwx4~0 , soc_inst|m0_1|u_logic|Zbbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~89 , soc_inst|m0_1|u_logic|Add5~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~0 , soc_inst|m0_1|u_logic|Cfzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~1 , soc_inst|m0_1|u_logic|Cfzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4 , soc_inst|m0_1|u_logic|Gfq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgq2z4 , soc_inst|m0_1|u_logic|Vgq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yx83z4 , soc_inst|m0_1|u_logic|Yx83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0v2z4 , soc_inst|m0_1|u_logic|J0v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~0 , soc_inst|m0_1|u_logic|Fexwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Art2z4~DUPLICATE , soc_inst|m0_1|u_logic|Art2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kiq2z4 , soc_inst|m0_1|u_logic|Kiq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An63z4 , soc_inst|m0_1|u_logic|An63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE , soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~1 , soc_inst|m0_1|u_logic|Fexwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fexwx4 , soc_inst|m0_1|u_logic|Fexwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkk2z4 , soc_inst|m0_1|u_logic|Zkk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggk2z4 , soc_inst|m0_1|u_logic|Ggk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aru2z4~feeder , soc_inst|m0_1|u_logic|Aru2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aru2z4 , soc_inst|m0_1|u_logic|Aru2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kjk2z4 , soc_inst|m0_1|u_logic|Kjk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~0 , soc_inst|m0_1|u_logic|F8wwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd63z4 , soc_inst|m0_1|u_logic|Rd63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rht2z4 , soc_inst|m0_1|u_logic|Rht2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|An73z4 , soc_inst|m0_1|u_logic|An73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhk2z4~feeder , soc_inst|m0_1|u_logic|Vhk2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vhk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~1 , soc_inst|m0_1|u_logic|F8wwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8wwx4 , soc_inst|m0_1|u_logic|F8wwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yvtwx4~0 , soc_inst|m0_1|u_logic|Yvtwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~0 , soc_inst|m0_1|u_logic|Xs7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~1 , soc_inst|m0_1|u_logic|Xs7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U72wx4~0 , soc_inst|m0_1|u_logic|U72wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tme3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~109 , soc_inst|m0_1|u_logic|Add2~109, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~101 , soc_inst|m0_1|u_logic|Add2~101, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~97 , soc_inst|m0_1|u_logic|Add2~97, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~0 , soc_inst|m0_1|u_logic|Ns9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi23z4 , soc_inst|m0_1|u_logic|Mi23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psh3z4 , soc_inst|m0_1|u_logic|Psh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ft83z4 , soc_inst|m0_1|u_logic|Ft83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr33z4 , soc_inst|m0_1|u_logic|Vr33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~7 , soc_inst|m0_1|u_logic|Z62wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Naq2z4~feeder , soc_inst|m0_1|u_logic|Naq2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Naq2z4 , soc_inst|m0_1|u_logic|Naq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wj73z4 , soc_inst|m0_1|u_logic|Wj73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~6 , soc_inst|m0_1|u_logic|Z62wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~8 , soc_inst|m0_1|u_logic|Z62wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ns9wx4~1 , soc_inst|m0_1|u_logic|Ns9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~17 , soc_inst|m0_1|u_logic|Add5~17, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add5~61 , soc_inst|m0_1|u_logic|Add5~61, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add5~65 , soc_inst|m0_1|u_logic|Add5~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~1 , soc_inst|m0_1|u_logic|Sdhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~2 , soc_inst|m0_1|u_logic|Sdhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~0 , soc_inst|m0_1|u_logic|Sdhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jwf3z4 , soc_inst|m0_1|u_logic|Jwf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~97 , soc_inst|m0_1|u_logic|Add3~97, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~93 , soc_inst|m0_1|u_logic|Add3~93, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~3 , soc_inst|m0_1|u_logic|haddr_o~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zcivx4~0 , soc_inst|m0_1|u_logic|Zcivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y8q2z4 , soc_inst|m0_1|u_logic|Y8q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ym93z4 , soc_inst|m0_1|u_logic|Ym93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cao2z4 , soc_inst|m0_1|u_logic|Cao2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rbo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jl93z4 , soc_inst|m0_1|u_logic|Jl93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J773z4 , soc_inst|m0_1|u_logic|J773z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~7 , soc_inst|m0_1|u_logic|W21wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE , soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z52xx4~0 , soc_inst|m0_1|u_logic|Z52xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~8 , soc_inst|m0_1|u_logic|W21wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~0 , soc_inst|m0_1|u_logic|Kfawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8o2z4 , soc_inst|m0_1|u_logic|N8o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z523z4~DUPLICATE , soc_inst|m0_1|u_logic|Z523z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~1 , soc_inst|m0_1|u_logic|W21wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I113z4 , soc_inst|m0_1|u_logic|I113z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O403z4~DUPLICATE , soc_inst|m0_1|u_logic|O403z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~5 , soc_inst|m0_1|u_logic|W21wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jbu2z4~feeder , soc_inst|m0_1|u_logic|Jbu2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jbu2z4 , soc_inst|m0_1|u_logic|Jbu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skv2z4 , soc_inst|m0_1|u_logic|Skv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~0 , soc_inst|m0_1|u_logic|W21wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|If33z4~feeder , soc_inst|m0_1|u_logic|If33z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|If33z4 , soc_inst|m0_1|u_logic|If33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ay53z4 , soc_inst|m0_1|u_logic|Ay53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~3 , soc_inst|m0_1|u_logic|W21wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ro43z4 , soc_inst|m0_1|u_logic|Ro43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE , soc_inst|m0_1|u_logic|J5o2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~2 , soc_inst|m0_1|u_logic|W21wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6o2z4 , soc_inst|m0_1|u_logic|Y6o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~4 , soc_inst|m0_1|u_logic|W21wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4~6 , soc_inst|m0_1|u_logic|W21wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfawx4~1 , soc_inst|m0_1|u_logic|Kfawx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add5~69 , soc_inst|m0_1|u_logic|Add5~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~89 , soc_inst|m0_1|u_logic|Add3~89, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vpovx4 , soc_inst|m0_1|u_logic|Vpovx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Eijvx4~0 , soc_inst|m0_1|u_logic|Eijvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE , soc_inst|m0_1|u_logic|Ym93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4 , soc_inst|m0_1|u_logic|Rbo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hs92z4~0 , soc_inst|m0_1|u_logic|Hs92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z523z4 , soc_inst|m0_1|u_logic|Z523z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~1 , soc_inst|m0_1|u_logic|Kq92z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O403z4 , soc_inst|m0_1|u_logic|O403z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I113z4~DUPLICATE , soc_inst|m0_1|u_logic|I113z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~2 , soc_inst|m0_1|u_logic|Kq92z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~0 , soc_inst|m0_1|u_logic|Kq92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~3 , soc_inst|m0_1|u_logic|Kq92z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U11wx4~0 , soc_inst|m0_1|u_logic|U11wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G11wx4~1 , soc_inst|m0_1|u_logic|G11wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G11wx4~0 , soc_inst|m0_1|u_logic|G11wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W21wx4 , soc_inst|m0_1|u_logic|W21wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~1 , soc_inst|m0_1|u_logic|Qz0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~2 , soc_inst|m0_1|u_logic|Qz0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~0 , soc_inst|m0_1|u_logic|Qz0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sg83z4 , soc_inst|m0_1|u_logic|Sg83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~2 , soc_inst|m0_1|u_logic|Nrvwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y6o2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~3 , soc_inst|m0_1|u_logic|Nrvwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J5o2z4 , soc_inst|m0_1|u_logic|J5o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~1 , soc_inst|m0_1|u_logic|Nrvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~0 , soc_inst|m0_1|u_logic|Nrvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4 , soc_inst|m0_1|u_logic|Nrvwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rdq2z4 , soc_inst|m0_1|u_logic|Rdq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~0 , soc_inst|m0_1|u_logic|Ey9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fxv2z4 , soc_inst|m0_1|u_logic|Fxv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccq2z4 , soc_inst|m0_1|u_logic|Ccq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~3 , soc_inst|m0_1|u_logic|Ey9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnu2z4 , soc_inst|m0_1|u_logic|Wnu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~2 , soc_inst|m0_1|u_logic|Ey9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0d3z4 , soc_inst|m0_1|u_logic|E0d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Naq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~1 , soc_inst|m0_1|u_logic|Ey9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4 , soc_inst|m0_1|u_logic|Ey9wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~0 , soc_inst|m0_1|u_logic|Yxdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~69 , soc_inst|m0_1|u_logic|Add3~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tvn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8u2z4 , soc_inst|m0_1|u_logic|F8u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohv2z4 , soc_inst|m0_1|u_logic|Ohv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~7 , soc_inst|m0_1|u_logic|St0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Od83z4 , soc_inst|m0_1|u_logic|Od83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F473z4 , soc_inst|m0_1|u_logic|F473z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fi93z4 , soc_inst|m0_1|u_logic|Fi93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~6 , soc_inst|m0_1|u_logic|St0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~8 , soc_inst|m0_1|u_logic|St0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~0 , soc_inst|m0_1|u_logic|Ecawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ixn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jq1xx4~0 , soc_inst|m0_1|u_logic|Jq1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu53z4 , soc_inst|m0_1|u_logic|Wu53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec33z4~DUPLICATE , soc_inst|m0_1|u_logic|Ec33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~3 , soc_inst|m0_1|u_logic|St0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nl43z4 , soc_inst|m0_1|u_logic|Nl43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arn2z4 , soc_inst|m0_1|u_logic|Arn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~2 , soc_inst|m0_1|u_logic|St0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey03z4~feeder , soc_inst|m0_1|u_logic|Ey03z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey03z4 , soc_inst|m0_1|u_logic|Ey03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K103z4 , soc_inst|m0_1|u_logic|K103z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~4 , soc_inst|m0_1|u_logic|St0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V223z4 , soc_inst|m0_1|u_logic|V223z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE , soc_inst|m0_1|u_logic|Eun2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~0 , soc_inst|m0_1|u_logic|St0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~1 , soc_inst|m0_1|u_logic|St0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4~5 , soc_inst|m0_1|u_logic|St0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecawx4~1 , soc_inst|m0_1|u_logic|Ecawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ym93z4 , soc_inst|m0_1|u_logic|Ym93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fyrwx4~0 , soc_inst|m0_1|u_logic|Fyrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fyrwx4~1 , soc_inst|m0_1|u_logic|Fyrwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Surwx4~0 , soc_inst|m0_1|u_logic|Surwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qslwx4~0 , soc_inst|m0_1|u_logic|Qslwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~0 , soc_inst|m0_1|u_logic|Dghvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W7z2z4 , soc_inst|m0_1|u_logic|W7z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dghvx4~1 , soc_inst|m0_1|u_logic|Dghvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE , soc_inst|m0_1|u_logic|W7z2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gdawx4~0 , soc_inst|m0_1|u_logic|Gdawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~73 , soc_inst|m0_1|u_logic|Add5~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~85 , soc_inst|m0_1|u_logic|Add3~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bv0wx4 , soc_inst|m0_1|u_logic|Bv0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tmjvx4~0 , soc_inst|m0_1|u_logic|Tmjvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H4p2z4 , soc_inst|m0_1|u_logic|H4p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U573z4~feeder , soc_inst|m0_1|u_logic|U573z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U573z4 , soc_inst|m0_1|u_logic|U573z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ozo2z4 , soc_inst|m0_1|u_logic|Ozo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9u2z4 , soc_inst|m0_1|u_logic|U9u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df83z4~DUPLICATE , soc_inst|m0_1|u_logic|Df83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~1 , soc_inst|m0_1|u_logic|Xcuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zxo2z4 , soc_inst|m0_1|u_logic|Zxo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djv2z4 , soc_inst|m0_1|u_logic|Djv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uj93z4 , soc_inst|m0_1|u_logic|Uj93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4 , soc_inst|m0_1|u_logic|Kwo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~0 , soc_inst|m0_1|u_logic|Xcuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4 , soc_inst|m0_1|u_logic|Xcuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S2p2z4 , soc_inst|m0_1|u_logic|S2p2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Td33z4 , soc_inst|m0_1|u_logic|Td33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K423z4 , soc_inst|m0_1|u_logic|K423z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~1 , soc_inst|m0_1|u_logic|Yj92z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE , soc_inst|m0_1|u_logic|D1p2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vl92z4~0 , soc_inst|m0_1|u_logic|Vl92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z203z4 , soc_inst|m0_1|u_logic|Z203z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tz03z4 , soc_inst|m0_1|u_logic|Tz03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~2 , soc_inst|m0_1|u_logic|Yj92z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lw53z4~feeder , soc_inst|m0_1|u_logic|Lw53z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lw53z4 , soc_inst|m0_1|u_logic|Lw53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cn43z4 , soc_inst|m0_1|u_logic|Cn43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~0 , soc_inst|m0_1|u_logic|Yj92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~3 , soc_inst|m0_1|u_logic|Yj92z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hy0wx4~0 , soc_inst|m0_1|u_logic|Hy0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fx0wx4~0 , soc_inst|m0_1|u_logic|Fx0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M92xx4~0 , soc_inst|m0_1|u_logic|M92xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~3 , soc_inst|m0_1|u_logic|Yw0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxo2z4 , soc_inst|m0_1|u_logic|Zxo2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~1 , soc_inst|m0_1|u_logic|Yw0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tz03z4 , soc_inst|m0_1|u_logic|Tz03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z203z4 , soc_inst|m0_1|u_logic|Z203z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~4 , soc_inst|m0_1|u_logic|Yw0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cn43z4 , soc_inst|m0_1|u_logic|Cn43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4~feeder , soc_inst|m0_1|u_logic|Kwo2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4 , soc_inst|m0_1|u_logic|Kwo2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~2 , soc_inst|m0_1|u_logic|Yw0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K423z4~feeder , soc_inst|m0_1|u_logic|K423z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|K423z4~DUPLICATE , soc_inst|m0_1|u_logic|K423z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ozo2z4~feeder , soc_inst|m0_1|u_logic|Ozo2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ozo2z4 , soc_inst|m0_1|u_logic|Ozo2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~0 , soc_inst|m0_1|u_logic|Yw0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S2p2z4 , soc_inst|m0_1|u_logic|S2p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M92xx4~0 , soc_inst|m0_1|u_logic|M92xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~5 , soc_inst|m0_1|u_logic|Yw0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D1p2z4 , soc_inst|m0_1|u_logic|D1p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uj93z4 , soc_inst|m0_1|u_logic|Uj93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U573z4 , soc_inst|m0_1|u_logic|U573z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~6 , soc_inst|m0_1|u_logic|Yw0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9u2z4 , soc_inst|m0_1|u_logic|U9u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djv2z4 , soc_inst|m0_1|u_logic|Djv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~7 , soc_inst|m0_1|u_logic|Yw0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~8 , soc_inst|m0_1|u_logic|Yw0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gdawx4~1 , soc_inst|m0_1|u_logic|Gdawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fx0wx4~0 , soc_inst|m0_1|u_logic|Fx0wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4 , soc_inst|m0_1|u_logic|Yw0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~73 , soc_inst|m0_1|u_logic|Add5~73, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~1 , soc_inst|m0_1|u_logic|Iv0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~0 , soc_inst|m0_1|u_logic|Zndwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duv2z4~feeder , soc_inst|m0_1|u_logic|Duv2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duv2z4 , soc_inst|m0_1|u_logic|Duv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~3 , soc_inst|m0_1|u_logic|Pybwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cxc3z4 , soc_inst|m0_1|u_logic|Cxc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U2s2z4 , soc_inst|m0_1|u_logic|U2s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~1 , soc_inst|m0_1|u_logic|Pybwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE , soc_inst|m0_1|u_logic|W5s2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE , soc_inst|m0_1|u_logic|Ug73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~0 , soc_inst|m0_1|u_logic|Pybwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq83z4 , soc_inst|m0_1|u_logic|Dq83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uku2z4~feeder , soc_inst|m0_1|u_logic|Uku2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uku2z4 , soc_inst|m0_1|u_logic|Uku2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4~2 , soc_inst|m0_1|u_logic|Pybwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pybwx4 , soc_inst|m0_1|u_logic|Pybwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd73z4 , soc_inst|m0_1|u_logic|Rd73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oas2z4 , soc_inst|m0_1|u_logic|Oas2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~0 , soc_inst|m0_1|u_logic|Pjqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhu2z4~feeder , soc_inst|m0_1|u_logic|Rhu2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhu2z4 , soc_inst|m0_1|u_logic|Rhu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An83z4~DUPLICATE , soc_inst|m0_1|u_logic|An83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~2 , soc_inst|m0_1|u_logic|Pjqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z8s2z4 , soc_inst|m0_1|u_logic|Z8s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~3 , soc_inst|m0_1|u_logic|Pjqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gt93z4 , soc_inst|m0_1|u_logic|Gt93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7s2z4 , soc_inst|m0_1|u_logic|K7s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4~1 , soc_inst|m0_1|u_logic|Pjqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjqwx4 , soc_inst|m0_1|u_logic|Pjqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~0 , soc_inst|m0_1|u_logic|Nodwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~1 , soc_inst|m0_1|u_logic|Zndwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na73z4~DUPLICATE , soc_inst|m0_1|u_logic|Na73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~0 , soc_inst|m0_1|u_logic|Zkuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Neu2z4 , soc_inst|m0_1|u_logic|Neu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~2 , soc_inst|m0_1|u_logic|Zkuwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnv2z4 , soc_inst|m0_1|u_logic|Wnv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wor2z4 , soc_inst|m0_1|u_logic|Wor2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~3 , soc_inst|m0_1|u_logic|Zkuwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cq93z4 , soc_inst|m0_1|u_logic|Cq93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4~1 , soc_inst|m0_1|u_logic|Zkuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkuwx4 , soc_inst|m0_1|u_logic|Zkuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mzp2z4 , soc_inst|m0_1|u_logic|Mzp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|No93z4~DUPLICATE , soc_inst|m0_1|u_logic|No93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~1 , soc_inst|m0_1|u_logic|Hmqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmv2z4 , soc_inst|m0_1|u_logic|Hmv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~3 , soc_inst|m0_1|u_logic|Hmqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q2q2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~0 , soc_inst|m0_1|u_logic|Hmqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hi83z4 , soc_inst|m0_1|u_logic|Hi83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ycu2z4 , soc_inst|m0_1|u_logic|Ycu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~2 , soc_inst|m0_1|u_logic|Hmqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4 , soc_inst|m0_1|u_logic|Hmqwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vzdwx4~0 , soc_inst|m0_1|u_logic|Vzdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sg83z4~feeder , soc_inst|m0_1|u_logic|Sg83z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sg83z4 , soc_inst|m0_1|u_logic|Sg83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~2 , soc_inst|m0_1|u_logic|Nrvwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Skv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6o2z4 , soc_inst|m0_1|u_logic|Y6o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~3 , soc_inst|m0_1|u_logic|Nrvwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jl93z4 , soc_inst|m0_1|u_logic|Jl93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~1 , soc_inst|m0_1|u_logic|Nrvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J773z4~feeder , soc_inst|m0_1|u_logic|J773z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J773z4 , soc_inst|m0_1|u_logic|J773z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4~0 , soc_inst|m0_1|u_logic|Nrvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nrvwx4 , soc_inst|m0_1|u_logic|Nrvwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~0 , soc_inst|m0_1|u_logic|Yxdwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yxdwx4~1 , soc_inst|m0_1|u_logic|Yxdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[9]~6 , soc_inst|m0_1|u_logic|hwdata_o[9]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxe3z4 , soc_inst|m0_1|u_logic|Kxe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[8]~7 , soc_inst|m0_1|u_logic|hwdata_o[8]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3f3z4 , soc_inst|m0_1|u_logic|W3f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~9 , soc_inst|m0_1|u_logic|Add0~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4~0 , soc_inst|m0_1|u_logic|Nfb3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4 , soc_inst|m0_1|u_logic|Nfb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hrmvx4~0 , soc_inst|m0_1|u_logic|Hrmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dhb3z4 , soc_inst|m0_1|u_logic|Dhb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~77 , soc_inst|m0_1|u_logic|Add0~77, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Armvx4~0 , soc_inst|m0_1|u_logic|Armvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5f3z4 , soc_inst|m0_1|u_logic|M5f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~25 , soc_inst|m0_1|u_logic|Add0~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqmvx4~0 , soc_inst|m0_1|u_logic|Tqmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aze3z4 , soc_inst|m0_1|u_logic|Aze3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I2twx4~0 , soc_inst|m0_1|u_logic|I2twx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecowx4 , soc_inst|m0_1|u_logic|Ecowx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[9]~5 , soc_inst|interconnect_1|HRDATA[9]~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~9 , soc_inst|interconnect_1|HRDATA[6]~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[9]~15 , soc_inst|interconnect_1|HRDATA[9]~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][9] , soc_inst|switches_1|switch_store[0][9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[9]~16 , soc_inst|interconnect_1|HRDATA[9]~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mxa2z4~0 , soc_inst|m0_1|u_logic|Mxa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0ivx4~0 , soc_inst|m0_1|u_logic|I0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9l2z4 , soc_inst|m0_1|u_logic|Y9l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vve3z4~0 , soc_inst|m0_1|u_logic|Vve3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vve3z4 , soc_inst|m0_1|u_logic|Vve3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~0 , soc_inst|m0_1|u_logic|Khfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~1 , soc_inst|m0_1|u_logic|Khfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~2 , soc_inst|m0_1|u_logic|Khfwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~3 , soc_inst|m0_1|u_logic|Khfwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4~0 , soc_inst|m0_1|u_logic|Mx0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdtwx4 , soc_inst|m0_1|u_logic|Qdtwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gvdwx4~0 , soc_inst|m0_1|u_logic|Gvdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~0 , soc_inst|m0_1|u_logic|Gftwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~1 , soc_inst|m0_1|u_logic|Gftwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5ewx4~0 , soc_inst|m0_1|u_logic|M5ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~0 , soc_inst|m0_1|u_logic|Pgfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~1 , soc_inst|m0_1|u_logic|Pgfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~1 , soc_inst|m0_1|u_logic|Mrdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9awx4~0 , soc_inst|m0_1|u_logic|M9awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Olg3z4 , soc_inst|m0_1|u_logic|Olg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~0 , soc_inst|m0_1|u_logic|Hk0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ltg3z4 , soc_inst|m0_1|u_logic|Ltg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avg3z4 , soc_inst|m0_1|u_logic|Avg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~4 , soc_inst|m0_1|u_logic|Hk0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kig3z4 , soc_inst|m0_1|u_logic|Kig3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4 , soc_inst|m0_1|u_logic|Ccg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~2 , soc_inst|m0_1|u_logic|Hk0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyg3z4 , soc_inst|m0_1|u_logic|Eyg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xi2xx4~0 , soc_inst|m0_1|u_logic|Xi2xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Zjg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgg3z4 , soc_inst|m0_1|u_logic|Vgg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~3 , soc_inst|m0_1|u_logic|Hk0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sog3z4 , soc_inst|m0_1|u_logic|Sog3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~1 , soc_inst|m0_1|u_logic|Hk0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~5 , soc_inst|m0_1|u_logic|Hk0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dng3z4 , soc_inst|m0_1|u_logic|Dng3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hqg3z4 , soc_inst|m0_1|u_logic|Hqg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~7 , soc_inst|m0_1|u_logic|Hk0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4 , soc_inst|m0_1|u_logic|Pwg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfg3z4 , soc_inst|m0_1|u_logic|Gfg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nag3z4 , soc_inst|m0_1|u_logic|Nag3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~6 , soc_inst|m0_1|u_logic|Hk0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~8 , soc_inst|m0_1|u_logic|Hk0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9awx4~1 , soc_inst|m0_1|u_logic|M9awx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xyh3z4 , soc_inst|m0_1|u_logic|Xyh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q6u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zfv2z4 , soc_inst|m0_1|u_logic|Zfv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~7 , soc_inst|m0_1|u_logic|Nn0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zb83z4 , soc_inst|m0_1|u_logic|Zb83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qg93z4 , soc_inst|m0_1|u_logic|Qg93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q273z4~DUPLICATE , soc_inst|m0_1|u_logic|Q273z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~6 , soc_inst|m0_1|u_logic|Nn0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~8 , soc_inst|m0_1|u_logic|Nn0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4 , soc_inst|m0_1|u_logic|Nn0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X892z4~0 , soc_inst|m0_1|u_logic|X892z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE , soc_inst|m0_1|u_logic|Yj43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE , soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~0 , soc_inst|m0_1|u_logic|A792z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M0i3z4 , soc_inst|m0_1|u_logic|M0i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G123z4 , soc_inst|m0_1|u_logic|G123z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pa33z4 , soc_inst|m0_1|u_logic|Pa33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~1 , soc_inst|m0_1|u_logic|A792z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvh3z4 , soc_inst|m0_1|u_logic|Tvh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixh3z4 , soc_inst|m0_1|u_logic|Ixh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~2 , soc_inst|m0_1|u_logic|A792z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A792z4~3 , soc_inst|m0_1|u_logic|A792z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9p2z4 , soc_inst|m0_1|u_logic|A9p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pap2z4 , soc_inst|m0_1|u_logic|Pap2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE , soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~0 , soc_inst|m0_1|u_logic|Bjxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6u2z4 , soc_inst|m0_1|u_logic|Q6u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ecp2z4 , soc_inst|m0_1|u_logic|Ecp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q273z4 , soc_inst|m0_1|u_logic|Q273z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE , soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~1 , soc_inst|m0_1|u_logic|Bjxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4 , soc_inst|m0_1|u_logic|Bjxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wo0wx4~0 , soc_inst|m0_1|u_logic|Wo0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~21 , soc_inst|m0_1|u_logic|Add5~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~49 , soc_inst|m0_1|u_logic|Add5~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Un0wx4~0 , soc_inst|m0_1|u_logic|Un0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~1 , soc_inst|m0_1|u_logic|Xl0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzdwx4~1 , soc_inst|m0_1|u_logic|Vzdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1w2z4 , soc_inst|m0_1|u_logic|R1w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9vvx4~0 , soc_inst|m0_1|u_logic|K9vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uzhvx4~0 , soc_inst|m0_1|u_logic|Uzhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ble3z4 , soc_inst|m0_1|u_logic|Ble3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lee3z4~0 , soc_inst|m0_1|u_logic|Lee3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lee3z4 , soc_inst|m0_1|u_logic|Lee3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~0 , soc_inst|m0_1|u_logic|Whlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[11]~17 , soc_inst|ram_1|data_to_memory[11]~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[2]~DUPLICATE , soc_inst|ram_1|byte_select[2]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[19]~14 , soc_inst|m0_1|u_logic|hwdata_o[19]~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[19]~18 , soc_inst|ram_1|data_to_memory[19]~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[11]~24 , soc_inst|interconnect_1|HRDATA[11]~24, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~1 , soc_inst|m0_1|u_logic|Whlwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~2 , soc_inst|m0_1|u_logic|Whlwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~3 , soc_inst|m0_1|u_logic|Whlwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4~0 , soc_inst|m0_1|u_logic|Bo0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[27]~19 , soc_inst|ram_1|data_to_memory[27]~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[3]~20 , soc_inst|ram_1|data_to_memory[3]~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~0 , soc_inst|m0_1|u_logic|Mjlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~5 , soc_inst|m0_1|u_logic|hwdata_o~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A5uvx4~0 , soc_inst|m0_1|u_logic|A5uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5tvx4 , soc_inst|m0_1|u_logic|T5tvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tna3z4 , soc_inst|m0_1|u_logic|Tna3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tna3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aea3z4~0 , soc_inst|m0_1|u_logic|Aea3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H6tvx4~0 , soc_inst|m0_1|u_logic|H6tvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5ovx4 , soc_inst|m0_1|u_logic|C5ovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aea3z4 , soc_inst|m0_1|u_logic|Aea3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Etmvx4~0 , soc_inst|m0_1|u_logic|Etmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F2o2z4 , soc_inst|m0_1|u_logic|F2o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mxtvx4 , soc_inst|m0_1|u_logic|Mxtvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgnvx4~0 , soc_inst|m0_1|u_logic|Pgnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I793z4 , soc_inst|m0_1|u_logic|I793z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg23z4 , soc_inst|m0_1|u_logic|Yg23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE , soc_inst|m0_1|u_logic|Hq33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~1 , soc_inst|m0_1|u_logic|Kn9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4 , soc_inst|m0_1|u_logic|Eyr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz43z4 , soc_inst|m0_1|u_logic|Qz43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z863z4 , soc_inst|m0_1|u_logic|Z863z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~0 , soc_inst|m0_1|u_logic|Kn9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kc03z4~feeder , soc_inst|m0_1|u_logic|Kc03z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE , soc_inst|m0_1|u_logic|Kc03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E913z4~DUPLICATE , soc_inst|m0_1|u_logic|E913z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~2 , soc_inst|m0_1|u_logic|Kn9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qwr2z4 , soc_inst|m0_1|u_logic|Qwr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hp9wx4~0 , soc_inst|m0_1|u_logic|Hp9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~3 , soc_inst|m0_1|u_logic|Kn9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imu2z4 , soc_inst|m0_1|u_logic|Imu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr83z4 , soc_inst|m0_1|u_logic|Rr83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~2 , soc_inst|m0_1|u_logic|Lr9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qyc3z4 , soc_inst|m0_1|u_logic|Qyc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asr2z4 , soc_inst|m0_1|u_logic|Asr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~1 , soc_inst|m0_1|u_logic|Lr9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cvr2z4 , soc_inst|m0_1|u_logic|Cvr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE , soc_inst|m0_1|u_logic|Ii73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~0 , soc_inst|m0_1|u_logic|Lr9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Otr2z4 , soc_inst|m0_1|u_logic|Otr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4~3 , soc_inst|m0_1|u_logic|Lr9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lr9wx4 , soc_inst|m0_1|u_logic|Lr9wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F32wx4~0 , soc_inst|m0_1|u_logic|F32wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~0 , soc_inst|m0_1|u_logic|Lk9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~1 , soc_inst|m0_1|u_logic|Lk9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~1 , soc_inst|m0_1|u_logic|Zz1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~1 , soc_inst|m0_1|u_logic|Xwawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~2 , soc_inst|m0_1|u_logic|Xwawx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~3 , soc_inst|m0_1|u_logic|Xwawx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwawx4~0 , soc_inst|m0_1|u_logic|Xwawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~0 , soc_inst|m0_1|u_logic|Tuawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tuawx4~1 , soc_inst|m0_1|u_logic|Tuawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fskvx4~0 , soc_inst|m0_1|u_logic|Fskvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U593z4 , soc_inst|m0_1|u_logic|U593z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I793z4~DUPLICATE , soc_inst|m0_1|u_logic|I793z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf63z4 , soc_inst|m0_1|u_logic|Gf63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eol2z4 , soc_inst|m0_1|u_logic|Eol2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~0 , soc_inst|m0_1|u_logic|Bywwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po73z4 , soc_inst|m0_1|u_logic|Po73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gjt2z4 , soc_inst|m0_1|u_logic|Gjt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~2 , soc_inst|m0_1|u_logic|Bywwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qml2z4 , soc_inst|m0_1|u_logic|Qml2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Psu2z4 , soc_inst|m0_1|u_logic|Psu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~3 , soc_inst|m0_1|u_logic|Bywwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Grl2z4 , soc_inst|m0_1|u_logic|Grl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Spl2z4 , soc_inst|m0_1|u_logic|Spl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~1 , soc_inst|m0_1|u_logic|Bywwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bywwx4 , soc_inst|m0_1|u_logic|Bywwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wd13z4 , soc_inst|m0_1|u_logic|Wd13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn23z4 , soc_inst|m0_1|u_logic|Fn23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~1 , soc_inst|m0_1|u_logic|Sj62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ikz2z4 , soc_inst|m0_1|u_logic|Ikz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ch03z4 , soc_inst|m0_1|u_logic|Ch03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~2 , soc_inst|m0_1|u_logic|Sj62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcz2z4 , soc_inst|m0_1|u_logic|Mcz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X553z4 , soc_inst|m0_1|u_logic|X553z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow33z4 , soc_inst|m0_1|u_logic|Ow33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~0 , soc_inst|m0_1|u_logic|Sj62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cll2z4 , soc_inst|m0_1|u_logic|Cll2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pl62z4~0 , soc_inst|m0_1|u_logic|Pl62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sj62z4~3 , soc_inst|m0_1|u_logic|Sj62z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yonvx4~0 , soc_inst|m0_1|u_logic|Yonvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~37 , soc_inst|m0_1|u_logic|Add5~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~81 , soc_inst|m0_1|u_logic|Add5~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~41 , soc_inst|m0_1|u_logic|Add5~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~2 , soc_inst|m0_1|u_logic|Zz1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pmnwx4 , soc_inst|m0_1|u_logic|Pmnwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlnwx4~0 , soc_inst|m0_1|u_logic|Nlnwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6owx4 , soc_inst|m0_1|u_logic|G6owx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I7owx4 , soc_inst|m0_1|u_logic|I7owx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5tvx4~0 , soc_inst|m0_1|u_logic|M5tvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zyovx4 , soc_inst|m0_1|u_logic|Zyovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4~0 , soc_inst|m0_1|u_logic|Ztc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4 , soc_inst|m0_1|u_logic|Ztc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ts5wx4~0 , soc_inst|m0_1|u_logic|Ts5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9ovx4 , soc_inst|m0_1|u_logic|D9ovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yz4wx4 , soc_inst|m0_1|u_logic|Yz4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nxqvx4~0 , soc_inst|m0_1|u_logic|Nxqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rsqvx4~0 , soc_inst|m0_1|u_logic|Rsqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1rvx4~0 , soc_inst|m0_1|u_logic|H1rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4 , soc_inst|m0_1|u_logic|Tdp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~20 , soc_inst|m0_1|u_logic|hwdata_o~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wia3z4 , soc_inst|m0_1|u_logic|Wia3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X563z4~feeder , soc_inst|m0_1|u_logic|X563z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X563z4 , soc_inst|m0_1|u_logic|X563z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Okn2z4 , soc_inst|m0_1|u_logic|Okn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa03z4 , soc_inst|m0_1|u_logic|Wa03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q713z4 , soc_inst|m0_1|u_logic|Q713z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn33z4 , soc_inst|m0_1|u_logic|Fn33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wd23z4~feeder , soc_inst|m0_1|u_logic|Wd23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wd23z4 , soc_inst|m0_1|u_logic|Wd23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~2 , soc_inst|m0_1|u_logic|Sh5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow43z4~feeder , soc_inst|m0_1|u_logic|Ow43z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow43z4 , soc_inst|m0_1|u_logic|Ow43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cmn2z4 , soc_inst|m0_1|u_logic|Cmn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~1 , soc_inst|m0_1|u_logic|Sh5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~3 , soc_inst|m0_1|u_logic|Sh5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sh5wx4~0 , soc_inst|m0_1|u_logic|Sh5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[2] , soc_inst|m0_1|u_logic|hwdata_o[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gha3z4~0 , soc_inst|m0_1|u_logic|Gha3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gha3z4 , soc_inst|m0_1|u_logic|Gha3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~94 , soc_inst|m0_1|u_logic|Add0~94, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~33 , soc_inst|m0_1|u_logic|Add0~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4~0 , soc_inst|m0_1|u_logic|Qfa3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfa3z4 , soc_inst|m0_1|u_logic|Qfa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xsmvx4~0 , soc_inst|m0_1|u_logic|Xsmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C4b3z4 , soc_inst|m0_1|u_logic|C4b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~21 , soc_inst|m0_1|u_logic|Add0~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qsmvx4~0 , soc_inst|m0_1|u_logic|Qsmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M2b3z4 , soc_inst|m0_1|u_logic|M2b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~57 , soc_inst|m0_1|u_logic|Add0~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsmvx4~0 , soc_inst|m0_1|u_logic|Jsmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W0b3z4 , soc_inst|m0_1|u_logic|W0b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~41 , soc_inst|m0_1|u_logic|Add0~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Taa3z4~0 , soc_inst|m0_1|u_logic|Taa3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Taa3z4 , soc_inst|m0_1|u_logic|Taa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Csmvx4~0 , soc_inst|m0_1|u_logic|Csmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gza3z4 , soc_inst|m0_1|u_logic|Gza3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~65 , soc_inst|m0_1|u_logic|Add0~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxa3z4 , soc_inst|m0_1|u_logic|Qxa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mka3z4 , soc_inst|m0_1|u_logic|Mka3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vrmvx4~0 , soc_inst|m0_1|u_logic|Vrmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE , soc_inst|m0_1|u_logic|Qxa3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uic3z4~0 , soc_inst|m0_1|u_logic|Uic3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uic3z4 , soc_inst|m0_1|u_logic|Uic3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz8wx4 , soc_inst|m0_1|u_logic|Zz8wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fyzvx4~0 , soc_inst|m0_1|u_logic|Fyzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wccwx4~0 , soc_inst|m0_1|u_logic|Wccwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yxzvx4~0 , soc_inst|m0_1|u_logic|Yxzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W893z4 , soc_inst|m0_1|u_logic|W893z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sgp2z4 , soc_inst|m0_1|u_logic|Sgp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~1 , soc_inst|m0_1|u_logic|Qxuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8v2z4 , soc_inst|m0_1|u_logic|F8v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gip2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~3 , soc_inst|m0_1|u_logic|Qxuwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujp2z4 , soc_inst|m0_1|u_logic|Ujp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wu63z4 , soc_inst|m0_1|u_logic|Wu63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~0 , soc_inst|m0_1|u_logic|Qxuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wyt2z4 , soc_inst|m0_1|u_logic|Wyt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F483z4 , soc_inst|m0_1|u_logic|F483z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~2 , soc_inst|m0_1|u_logic|Qxuwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4 , soc_inst|m0_1|u_logic|Qxuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~0 , soc_inst|m0_1|u_logic|Rw7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~1 , soc_inst|m0_1|u_logic|Rw7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~0 , soc_inst|m0_1|u_logic|Fkdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~1 , soc_inst|m0_1|u_logic|Nodwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4~0 , soc_inst|m0_1|u_logic|Qfc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4 , soc_inst|m0_1|u_logic|Qfc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4 , soc_inst|m0_1|u_logic|Uaj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE , soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pguvx4~0 , soc_inst|m0_1|u_logic|Pguvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1ivx4~0 , soc_inst|m0_1|u_logic|Y1ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hub3z4 , soc_inst|m0_1|u_logic|Hub3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~0 , soc_inst|m0_1|u_logic|Ihlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~0 , soc_inst|m0_1|u_logic|B2uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2twx4~0 , soc_inst|m0_1|u_logic|I2twx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~1 , soc_inst|m0_1|u_logic|Ihlwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~2 , soc_inst|m0_1|u_logic|Ihlwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~3 , soc_inst|m0_1|u_logic|Ihlwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ykyvx4~0 , soc_inst|m0_1|u_logic|Ykyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~1 , soc_inst|m0_1|u_logic|Amyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~0 , soc_inst|m0_1|u_logic|Amyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~2 , soc_inst|m0_1|u_logic|Amyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xuxwx4 , soc_inst|m0_1|u_logic|Xuxwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kvtwx4 , soc_inst|m0_1|u_logic|Kvtwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kw7wx4~0 , soc_inst|m0_1|u_logic|Kw7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~0 , soc_inst|m0_1|u_logic|Mjlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~0 , soc_inst|m0_1|u_logic|Cawwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvu2z4 , soc_inst|m0_1|u_logic|Rvu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~3 , soc_inst|m0_1|u_logic|Cawwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gmm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~1 , soc_inst|m0_1|u_logic|Cawwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4~2 , soc_inst|m0_1|u_logic|Cawwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cawwx4 , soc_inst|m0_1|u_logic|Cawwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~0 , soc_inst|m0_1|u_logic|Gftwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kw7wx4~1 , soc_inst|m0_1|u_logic|Kw7wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Iutwx4~0 , soc_inst|m0_1|u_logic|Iutwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mjlwx4~1 , soc_inst|m0_1|u_logic|Mjlwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4 , soc_inst|m0_1|u_logic|Bo0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~0 , soc_inst|m0_1|u_logic|Xl0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht53z4~feeder , soc_inst|m0_1|u_logic|Ht53z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ht53z4 , soc_inst|m0_1|u_logic|Ht53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE , soc_inst|m0_1|u_logic|Pa33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~3 , soc_inst|m0_1|u_logic|Nn0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~0 , soc_inst|m0_1|u_logic|Nn0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~4 , soc_inst|m0_1|u_logic|Nn0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yj43z4 , soc_inst|m0_1|u_logic|Yj43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~2 , soc_inst|m0_1|u_logic|Nn0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE , soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nr2xx4~0 , soc_inst|m0_1|u_logic|Nr2xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~1 , soc_inst|m0_1|u_logic|Nn0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~5 , soc_inst|m0_1|u_logic|Nn0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~0 , soc_inst|m0_1|u_logic|Oaawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oaawx4~1 , soc_inst|m0_1|u_logic|Oaawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~53 , soc_inst|m0_1|u_logic|Add5~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4~0 , soc_inst|m0_1|u_logic|Dpc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4 , soc_inst|m0_1|u_logic|Dpc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kwa2z4~0 , soc_inst|m0_1|u_logic|Kwa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nzhvx4~0 , soc_inst|m0_1|u_logic|Nzhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oar2z4 , soc_inst|m0_1|u_logic|Oar2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bsvwx4~0 , soc_inst|m0_1|u_logic|Bsvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~0 , soc_inst|m0_1|u_logic|Eudwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~0 , soc_inst|m0_1|u_logic|E1ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~1 , soc_inst|m0_1|u_logic|E1ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7a3z4 , soc_inst|m0_1|u_logic|L7a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~1 , soc_inst|m0_1|u_logic|U0vvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~1 , soc_inst|m0_1|u_logic|X0ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzdwx4~1 , soc_inst|m0_1|u_logic|Vzdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bge3z4 , soc_inst|m0_1|u_logic|Bge3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I463z4 , soc_inst|m0_1|u_logic|I463z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql33z4 , soc_inst|m0_1|u_logic|Ql33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~3 , soc_inst|m0_1|u_logic|Zh5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc23z4 , soc_inst|m0_1|u_logic|Hc23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~0 , soc_inst|m0_1|u_logic|Zh5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rds2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D432z4~0 , soc_inst|m0_1|u_logic|D432z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B613z4~DUPLICATE , soc_inst|m0_1|u_logic|B613z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H903z4~feeder , soc_inst|m0_1|u_logic|H903z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H903z4 , soc_inst|m0_1|u_logic|H903z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~4 , soc_inst|m0_1|u_logic|Zh5wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu43z4 , soc_inst|m0_1|u_logic|Zu43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7s2z4~DUPLICATE , soc_inst|m0_1|u_logic|K7s2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~2 , soc_inst|m0_1|u_logic|Zh5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~1 , soc_inst|m0_1|u_logic|Zh5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~5 , soc_inst|m0_1|u_logic|Zh5wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~9 , soc_inst|m0_1|u_logic|Zh5wx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wq5wx4 , soc_inst|m0_1|u_logic|Wq5wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[10]~9 , soc_inst|m0_1|u_logic|hwdata_o[10]~9, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|C9a3z4 , soc_inst|m0_1|u_logic|C9a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~25 , soc_inst|m0_1|u_logic|Add0~25, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add0~13 , soc_inst|m0_1|u_logic|Add0~13, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mqmvx4~0 , soc_inst|m0_1|u_logic|Mqmvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zva3z4 , soc_inst|m0_1|u_logic|Zva3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add0~49 , soc_inst|m0_1|u_logic|Add0~49, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~37 , soc_inst|m0_1|u_logic|Add0~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ypmvx4~0 , soc_inst|m0_1|u_logic|Ypmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iua3z4 , soc_inst|m0_1|u_logic|Iua3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[12]~22 , soc_inst|interconnect_1|HRDATA[12]~22, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE , soc_inst|m0_1|u_logic|L7a3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~0 , soc_inst|m0_1|u_logic|Xrmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~1 , soc_inst|m0_1|u_logic|C0ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~1 , soc_inst|m0_1|u_logic|Xrmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sta2z4~0 , soc_inst|m0_1|u_logic|Sta2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4 , soc_inst|m0_1|u_logic|Uyv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kofwx4~0 , soc_inst|m0_1|u_logic|Kofwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cr0xx4~1 , soc_inst|m0_1|u_logic|Cr0xx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zx3wx4~0 , soc_inst|m0_1|u_logic|Zx3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H6mvx4~0 , soc_inst|m0_1|u_logic|H6mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwywx4~0 , soc_inst|m0_1|u_logic|Wwywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qrp2z4 , soc_inst|m0_1|u_logic|Qrp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Douvx4~0 , soc_inst|m0_1|u_logic|Douvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W0ivx4~0 , soc_inst|m0_1|u_logic|W0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X0c3z4 , soc_inst|m0_1|u_logic|X0c3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4 , soc_inst|m0_1|u_logic|Ylc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4~0 , soc_inst|m0_1|u_logic|Ylc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ylc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE , soc_inst|m0_1|u_logic|Z4l2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G8n2z4 , soc_inst|m0_1|u_logic|G8n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H8l2z4 , soc_inst|m0_1|u_logic|H8l2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A50xx4~0 , soc_inst|m0_1|u_logic|A50xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Jkc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ayzwx4 , soc_inst|m0_1|u_logic|Ayzwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~1 , soc_inst|m0_1|u_logic|Jjuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~0 , soc_inst|m0_1|u_logic|Wvzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F40xx4~0 , soc_inst|m0_1|u_logic|F40xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Usl2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmb3z4 , soc_inst|m0_1|u_logic|Bmb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Axm2z4~0 , soc_inst|m0_1|u_logic|Axm2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Axm2z4 , soc_inst|m0_1|u_logic|Axm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzvwx4~0 , soc_inst|m0_1|u_logic|Wzvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE , soc_inst|m0_1|u_logic|Uic3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ipb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzvwx4~1 , soc_inst|m0_1|u_logic|Wzvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N10xx4~0 , soc_inst|m0_1|u_logic|N10xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Adzwx4~0 , soc_inst|m0_1|u_logic|Adzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4~0 , soc_inst|m0_1|u_logic|Mcc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4 , soc_inst|m0_1|u_logic|Mcc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K9ovx4~0 , soc_inst|m0_1|u_logic|K9ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T2ivx4~0 , soc_inst|m0_1|u_logic|T2ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gxk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4 , soc_inst|m0_1|u_logic|Ztc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4~0 , soc_inst|m0_1|u_logic|Ztc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE , soc_inst|m0_1|u_logic|J9d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE , soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zad3z4 , soc_inst|m0_1|u_logic|Zad3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4~0 , soc_inst|m0_1|u_logic|Pcd3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4 , soc_inst|m0_1|u_logic|Pcd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ruvvx4~0 , soc_inst|m0_1|u_logic|Ruvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M2ivx4~0 , soc_inst|m0_1|u_logic|M2ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vac3z4 , soc_inst|m0_1|u_logic|Vac3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G10xx4~0 , soc_inst|m0_1|u_logic|G10xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G10xx4~1 , soc_inst|m0_1|u_logic|G10xx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I90xx4~1 , soc_inst|m0_1|u_logic|I90xx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tb0xx4~0 , soc_inst|m0_1|u_logic|Tb0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjd3z4 , soc_inst|m0_1|u_logic|Bjd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE , soc_inst|m0_1|u_logic|Fed3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4~0 , soc_inst|m0_1|u_logic|Qfc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4 , soc_inst|m0_1|u_logic|Qfc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Lhd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~0 , soc_inst|m0_1|u_logic|D0wwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~1 , soc_inst|m0_1|u_logic|D0wwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B90xx4~0 , soc_inst|m0_1|u_logic|B90xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hdzwx4~0 , soc_inst|m0_1|u_logic|Hdzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A6zwx4~0 , soc_inst|m0_1|u_logic|A6zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uls2z4 , soc_inst|m0_1|u_logic|Uls2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cps2z4 , soc_inst|m0_1|u_logic|Cps2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4~0 , soc_inst|m0_1|u_logic|Tqc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4 , soc_inst|m0_1|u_logic|Tqc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Txa2z4~0 , soc_inst|m0_1|u_logic|Txa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zyhvx4~0 , soc_inst|m0_1|u_logic|Zyhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rym2z4 , soc_inst|m0_1|u_logic|Rym2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4~0 , soc_inst|m0_1|u_logic|Jsc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4 , soc_inst|m0_1|u_logic|Jsc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsa2z4~0 , soc_inst|m0_1|u_logic|Jsa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Syhvx4~0 , soc_inst|m0_1|u_logic|Syhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~0 , soc_inst|m0_1|u_logic|Xwvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~1 , soc_inst|m0_1|u_logic|Xwvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kizwx4~0 , soc_inst|m0_1|u_logic|Kizwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~1 , soc_inst|m0_1|u_logic|Arzwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4g3z4 , soc_inst|m0_1|u_logic|D4g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[13]~11 , soc_inst|m0_1|u_logic|hwdata_o[13]~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4g3z4~0 , soc_inst|m0_1|u_logic|D4g3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE , soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE , soc_inst|m0_1|u_logic|Oar2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mis2z4~0 , soc_inst|m0_1|u_logic|Mis2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mis2z4 , soc_inst|m0_1|u_logic|Mis2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4 , soc_inst|m0_1|u_logic|Wuq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yauvx4~0 , soc_inst|m0_1|u_logic|Yauvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzhvx4~0 , soc_inst|m0_1|u_logic|Gzhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vgs2z4 , soc_inst|m0_1|u_logic|Vgs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~0 , soc_inst|m0_1|u_logic|Zxvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~1 , soc_inst|m0_1|u_logic|Zxvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqzwx4~0 , soc_inst|m0_1|u_logic|Tqzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tib3z4 , soc_inst|m0_1|u_logic|Tib3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dizwx4~0 , soc_inst|m0_1|u_logic|Dizwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fczwx4~0 , soc_inst|m0_1|u_logic|Fczwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nnc3z4~0 , soc_inst|m0_1|u_logic|Nnc3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nnc3z4 , soc_inst|m0_1|u_logic|Nnc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wva2z4~0 , soc_inst|m0_1|u_logic|Wva2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B0ivx4~0 , soc_inst|m0_1|u_logic|B0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipn2z4 , soc_inst|m0_1|u_logic|Ipn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Svs2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE , soc_inst|m0_1|u_logic|Bus2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gyvwx4~0 , soc_inst|m0_1|u_logic|Gyvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gyvwx4~1 , soc_inst|m0_1|u_logic|Gyvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~0 , soc_inst|m0_1|u_logic|B6pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkb3z4 , soc_inst|m0_1|u_logic|Kkb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqs2z4 , soc_inst|m0_1|u_logic|Tqs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2f3z4~0 , soc_inst|m0_1|u_logic|H2f3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2f3z4 , soc_inst|m0_1|u_logic|H2f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhvvx4~0 , soc_inst|m0_1|u_logic|Mhvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0ivx4~0 , soc_inst|m0_1|u_logic|P0ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE , soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~0 , soc_inst|m0_1|u_logic|Kss2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whzwx4~0 , soc_inst|m0_1|u_logic|Whzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whzwx4~1 , soc_inst|m0_1|u_logic|Whzwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qlzwx4~0 , soc_inst|m0_1|u_logic|Qlzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjzwx4~0 , soc_inst|m0_1|u_logic|Fjzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yizwx4~0 , soc_inst|m0_1|u_logic|Yizwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mczwx4~0 , soc_inst|m0_1|u_logic|Mczwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bus2z4 , soc_inst|m0_1|u_logic|Bus2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihzwx4~0 , soc_inst|m0_1|u_logic|Ihzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Clzwx4~0 , soc_inst|m0_1|u_logic|Clzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5zwx4~0 , soc_inst|m0_1|u_logic|T5zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~1 , soc_inst|m0_1|u_logic|B6pwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~2 , soc_inst|m0_1|u_logic|B6pwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lns2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lns2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iazwx4~0 , soc_inst|m0_1|u_logic|Iazwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~0 , soc_inst|m0_1|u_logic|Arzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pazwx4 , soc_inst|m0_1|u_logic|Pazwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7zwx4~0 , soc_inst|m0_1|u_logic|J7zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~3 , soc_inst|m0_1|u_logic|B6pwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H6zwx4~0 , soc_inst|m0_1|u_logic|H6zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~0 , soc_inst|m0_1|u_logic|G2zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0zwx4~0 , soc_inst|m0_1|u_logic|J0zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~0 , soc_inst|m0_1|u_logic|Vzywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~1 , soc_inst|m0_1|u_logic|Vzywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C0zwx4~0 , soc_inst|m0_1|u_logic|C0zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Viuwx4~0 , soc_inst|m0_1|u_logic|Viuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~1 , soc_inst|m0_1|u_logic|Kkrvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~2 , soc_inst|m0_1|u_logic|Arzwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~0 , soc_inst|m0_1|u_logic|Kkrvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fb0xx4~0 , soc_inst|m0_1|u_logic|Fb0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S00xx4~0 , soc_inst|m0_1|u_logic|S00xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kbzwx4~0 , soc_inst|m0_1|u_logic|Kbzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fqmvx4~0 , soc_inst|m0_1|u_logic|Fqmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|She3z4 , soc_inst|m0_1|u_logic|She3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lee3z4 , soc_inst|m0_1|u_logic|Lee3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lee3z4~0 , soc_inst|m0_1|u_logic|Lee3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE , soc_inst|m0_1|u_logic|Lee3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cam2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE , soc_inst|m0_1|u_logic|G0w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Trq2z4 , soc_inst|m0_1|u_logic|Trq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K9vvx4~0 , soc_inst|m0_1|u_logic|K9vvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uzhvx4~0 , soc_inst|m0_1|u_logic|Uzhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ble3z4 , soc_inst|m0_1|u_logic|Ble3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~0 , soc_inst|m0_1|u_logic|Whlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~1 , soc_inst|m0_1|u_logic|Whlwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~2 , soc_inst|m0_1|u_logic|Whlwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whlwx4~3 , soc_inst|m0_1|u_logic|Whlwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~0 , soc_inst|m0_1|u_logic|U0vvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~2 , soc_inst|m0_1|u_logic|U0vvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8mvx4~0 , soc_inst|m0_1|u_logic|L8mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cam2z4 , soc_inst|m0_1|u_logic|Cam2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iuuvx4~0 , soc_inst|m0_1|u_logic|Iuuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K1ivx4~0 , soc_inst|m0_1|u_logic|K1ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N7c3z4 , soc_inst|m0_1|u_logic|N7c3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~0 , soc_inst|m0_1|u_logic|Cymwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~1 , soc_inst|m0_1|u_logic|Cymwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~2 , soc_inst|m0_1|u_logic|Cymwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~1 , soc_inst|m0_1|u_logic|Fkdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~3 , soc_inst|m0_1|u_logic|Cymwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz83z4 , soc_inst|m0_1|u_logic|Nz83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~5 , soc_inst|m0_1|u_logic|Djzvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx73z4 , soc_inst|m0_1|u_logic|Yx73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5k2z4 , soc_inst|m0_1|u_logic|O5k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pst2z4 , soc_inst|m0_1|u_logic|Pst2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1v2z4 , soc_inst|m0_1|u_logic|Y1v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~6 , soc_inst|m0_1|u_logic|Djzvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~7 , soc_inst|m0_1|u_logic|Djzvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf53z4 , soc_inst|m0_1|u_logic|Gf53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow23z4 , soc_inst|m0_1|u_logic|Ow23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~3 , soc_inst|m0_1|u_logic|Djzvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nqz2z4 , soc_inst|m0_1|u_logic|Nqz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hn03z4 , soc_inst|m0_1|u_logic|Hn03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7k2z4 , soc_inst|m0_1|u_logic|D7k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~4 , soc_inst|m0_1|u_logic|Djzvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X543z4 , soc_inst|m0_1|u_logic|X543z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V0k2z4 , soc_inst|m0_1|u_logic|V0k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~2 , soc_inst|m0_1|u_logic|Djzvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE , soc_inst|m0_1|u_logic|Z3k2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn13z4 , soc_inst|m0_1|u_logic|Fn13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~0 , soc_inst|m0_1|u_logic|Djzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K2k2z4 , soc_inst|m0_1|u_logic|K2k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~0 , soc_inst|m0_1|u_logic|Kepwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~0 , soc_inst|m0_1|u_logic|Jiowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~1 , soc_inst|m0_1|u_logic|Kepwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fio2z4 , soc_inst|m0_1|u_logic|Fio2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw83z4 , soc_inst|m0_1|u_logic|Jw83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~1 , soc_inst|m0_1|u_logic|Eruwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpt2z4 , soc_inst|m0_1|u_logic|Lpt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uu73z4 , soc_inst|m0_1|u_logic|Uu73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~2 , soc_inst|m0_1|u_logic|Eruwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll63z4 , soc_inst|m0_1|u_logic|Ll63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jlo2z4 , soc_inst|m0_1|u_logic|Jlo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~0 , soc_inst|m0_1|u_logic|Eruwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujo2z4 , soc_inst|m0_1|u_logic|Ujo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uyu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4~3 , soc_inst|m0_1|u_logic|Eruwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eruwx4 , soc_inst|m0_1|u_logic|Eruwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Beowx4~0 , soc_inst|m0_1|u_logic|Beowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw73z4 , soc_inst|m0_1|u_logic|Jw73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hmh3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx83z4~feeder , soc_inst|m0_1|u_logic|Yx83z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx83z4 , soc_inst|m0_1|u_logic|Yx83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An63z4 , soc_inst|m0_1|u_logic|An63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~7 , soc_inst|m0_1|u_logic|Pdbwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~8 , soc_inst|m0_1|u_logic|Pdbwx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu23z4 , soc_inst|m0_1|u_logic|Zu23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE , soc_inst|m0_1|u_logic|Rd53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~3 , soc_inst|m0_1|u_logic|Pdbwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgq2z4 , soc_inst|m0_1|u_logic|Vgq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hak2z4 , soc_inst|m0_1|u_logic|Hak2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djh3z4~feeder , soc_inst|m0_1|u_logic|Djh3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djh3z4 , soc_inst|m0_1|u_logic|Djh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skh3z4~feeder , soc_inst|m0_1|u_logic|Skh3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Skh3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~2 , soc_inst|m0_1|u_logic|Fm72z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4 , soc_inst|m0_1|u_logic|Wnh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmh3z4 , soc_inst|m0_1|u_logic|Hmh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Co72z4~0 , soc_inst|m0_1|u_logic|Co72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rd53z4 , soc_inst|m0_1|u_logic|Rd53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I443z4~feeder , soc_inst|m0_1|u_logic|I443z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I443z4~DUPLICATE , soc_inst|m0_1|u_logic|I443z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~0 , soc_inst|m0_1|u_logic|Fm72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE , soc_inst|m0_1|u_logic|Zu23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql13z4 , soc_inst|m0_1|u_logic|Ql13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~1 , soc_inst|m0_1|u_logic|Fm72z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~3 , soc_inst|m0_1|u_logic|Fm72z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsnvx4~0 , soc_inst|m0_1|u_logic|Lsnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpx2z4 , soc_inst|m0_1|u_logic|Zpx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vjnvx4~0 , soc_inst|m0_1|u_logic|Vjnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zjq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~85 , soc_inst|m0_1|u_logic|Add3~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~69 , soc_inst|m0_1|u_logic|Add3~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~65 , soc_inst|m0_1|u_logic|Add3~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~61 , soc_inst|m0_1|u_logic|Add3~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~57 , soc_inst|m0_1|u_logic|Add3~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~101 , soc_inst|m0_1|u_logic|Add3~101, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~113 , soc_inst|m0_1|u_logic|Add3~113, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~109 , soc_inst|m0_1|u_logic|Add3~109, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1pvx4 , soc_inst|m0_1|u_logic|Y1pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vjnvx4~1 , soc_inst|m0_1|u_logic|Vjnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7j2z4 , soc_inst|m0_1|u_logic|Q7j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C183z4~DUPLICATE , soc_inst|m0_1|u_logic|C183z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvt2z4 , soc_inst|m0_1|u_logic|Tvt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~2 , soc_inst|m0_1|u_logic|Mnvwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE , soc_inst|m0_1|u_logic|Tr63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9j2z4~feeder , soc_inst|m0_1|u_logic|F9j2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE , soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~0 , soc_inst|m0_1|u_logic|Mnvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vmj2z4 , soc_inst|m0_1|u_logic|Vmj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5v2z4 , soc_inst|m0_1|u_logic|C5v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~3 , soc_inst|m0_1|u_logic|Mnvwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R293z4~DUPLICATE , soc_inst|m0_1|u_logic|R293z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpj2z4 , soc_inst|m0_1|u_logic|Zpj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4~1 , soc_inst|m0_1|u_logic|Mnvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnvwx4 , soc_inst|m0_1|u_logic|Mnvwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sz23z4~feeder , soc_inst|m0_1|u_logic|Sz23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE , soc_inst|m0_1|u_logic|Sz23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq13z4~feeder , soc_inst|m0_1|u_logic|Jq13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE , soc_inst|m0_1|u_logic|Jq13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~1 , soc_inst|m0_1|u_logic|P582z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Joi3z4 , soc_inst|m0_1|u_logic|Joi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fli3z4 , soc_inst|m0_1|u_logic|Fli3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qji3z4~feeder , soc_inst|m0_1|u_logic|Qji3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qji3z4 , soc_inst|m0_1|u_logic|Qji3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~2 , soc_inst|m0_1|u_logic|P582z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ki53z4 , soc_inst|m0_1|u_logic|Ki53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B943z4~feeder , soc_inst|m0_1|u_logic|B943z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B943z4~DUPLICATE , soc_inst|m0_1|u_logic|B943z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~0 , soc_inst|m0_1|u_logic|P582z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Umi3z4~feeder , soc_inst|m0_1|u_logic|Umi3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Umi3z4 , soc_inst|m0_1|u_logic|Umi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M782z4~0 , soc_inst|m0_1|u_logic|M782z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P582z4~3 , soc_inst|m0_1|u_logic|P582z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtnvx4~0 , soc_inst|m0_1|u_logic|Gtnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q9cwx4~0 , soc_inst|m0_1|u_logic|Q9cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yqzvx4~0 , soc_inst|m0_1|u_logic|Yqzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rqzvx4~0 , soc_inst|m0_1|u_logic|Rqzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C183z4~feeder , soc_inst|m0_1|u_logic|C183z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C183z4 , soc_inst|m0_1|u_logic|C183z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jq13z4 , soc_inst|m0_1|u_logic|Jq13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9j2z4 , soc_inst|m0_1|u_logic|F9j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~1 , soc_inst|m0_1|u_logic|Eacwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~5 , soc_inst|m0_1|u_logic|Eacwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B943z4 , soc_inst|m0_1|u_logic|B943z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zpj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~2 , soc_inst|m0_1|u_logic|Eacwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~4 , soc_inst|m0_1|u_logic|Eacwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sz23z4 , soc_inst|m0_1|u_logic|Sz23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~3 , soc_inst|m0_1|u_logic|Eacwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~6 , soc_inst|m0_1|u_logic|Eacwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE , soc_inst|m0_1|u_logic|Joi3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R293z4 , soc_inst|m0_1|u_logic|R293z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tr63z4 , soc_inst|m0_1|u_logic|Tr63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~7 , soc_inst|m0_1|u_logic|Eacwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~8 , soc_inst|m0_1|u_logic|Eacwx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T31xx4~0 , soc_inst|m0_1|u_logic|T31xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tvt2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R91xx4~0 , soc_inst|m0_1|u_logic|R91xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~0 , soc_inst|m0_1|u_logic|Eacwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~9 , soc_inst|m0_1|u_logic|Eacwx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rih2z4~0 , soc_inst|m0_1|u_logic|Rih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ancvx4 , soc_inst|m0_1|u_logic|Ancvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~0 , soc_inst|m0_1|u_logic|Tkdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Godwx4~0 , soc_inst|m0_1|u_logic|Godwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tkdwx4~1 , soc_inst|m0_1|u_logic|Tkdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~0 , soc_inst|m0_1|u_logic|Sndwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~0 , soc_inst|m0_1|u_logic|C0ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sndwx4~1 , soc_inst|m0_1|u_logic|Sndwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~4 , soc_inst|m0_1|u_logic|hwdata_o~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0uvx4 , soc_inst|m0_1|u_logic|Z0uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J9d3z4 , soc_inst|m0_1|u_logic|J9d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7pwx4 , soc_inst|m0_1|u_logic|K7pwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L0uvx4 , soc_inst|m0_1|u_logic|L0uvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xdb3z4 , soc_inst|m0_1|u_logic|Xdb3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jzzwx4~0 , soc_inst|m0_1|u_logic|Jzzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzzwx4~0 , soc_inst|m0_1|u_logic|Qzzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Czzwx4~0 , soc_inst|m0_1|u_logic|Czzwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5pwx4~0 , soc_inst|m0_1|u_logic|U5pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~2 , soc_inst|m0_1|u_logic|Jjuwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cjuwx4~0 , soc_inst|m0_1|u_logic|Cjuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~2 , soc_inst|m0_1|u_logic|Kkrvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~3 , soc_inst|m0_1|u_logic|Kkrvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~4 , soc_inst|m0_1|u_logic|B6pwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~4 , soc_inst|m0_1|u_logic|Kkrvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P2a3z4 , soc_inst|m0_1|u_logic|P2a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uqi2z4 , soc_inst|m0_1|u_logic|Uqi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hzywx4~0 , soc_inst|m0_1|u_logic|Hzywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X9n2z4 , soc_inst|m0_1|u_logic|X9n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyywx4~0 , soc_inst|m0_1|u_logic|Tyywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ozywx4~0 , soc_inst|m0_1|u_logic|Ozywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwywx4~0 , soc_inst|m0_1|u_logic|Pwywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gvywx4~0 , soc_inst|m0_1|u_logic|Gvywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E5owx4~0 , soc_inst|m0_1|u_logic|E5owx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~5 , soc_inst|m0_1|u_logic|Kkrvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~6 , soc_inst|m0_1|u_logic|Kkrvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~2 , soc_inst|m0_1|u_logic|Xrmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~0 , soc_inst|m0_1|u_logic|Xtdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M3u2z4~feeder , soc_inst|m0_1|u_logic|M3u2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M3u2z4 , soc_inst|m0_1|u_logic|M3u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~2 , soc_inst|m0_1|u_logic|G4qwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7b3z4~0 , soc_inst|m0_1|u_logic|J7b3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7b3z4 , soc_inst|m0_1|u_logic|J7b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z8b3z4 , soc_inst|m0_1|u_logic|Z8b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~89 , soc_inst|m0_1|u_logic|Add0~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ormvx4~0 , soc_inst|m0_1|u_logic|Ormvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE , soc_inst|m0_1|u_logic|Z8b3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0uvx4 , soc_inst|m0_1|u_logic|E0uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qztvx4 , soc_inst|m0_1|u_logic|Qztvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gcb3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qwowx4 , soc_inst|m0_1|u_logic|Qwowx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vytvx4 , soc_inst|m0_1|u_logic|Vytvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pab3z4 , soc_inst|m0_1|u_logic|Pab3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4~0 , soc_inst|m0_1|u_logic|Jkc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkc3z4 , soc_inst|m0_1|u_logic|Jkc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE , soc_inst|m0_1|u_logic|F4c3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jruvx4~0 , soc_inst|m0_1|u_logic|Jruvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D1ivx4~0 , soc_inst|m0_1|u_logic|D1ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F4c3z4 , soc_inst|m0_1|u_logic|F4c3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~0 , soc_inst|m0_1|u_logic|Wkpwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~1 , soc_inst|m0_1|u_logic|Wkpwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~2 , soc_inst|m0_1|u_logic|Wkpwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkpwx4~3 , soc_inst|m0_1|u_logic|Wkpwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][6] , soc_inst|switches_1|switch_store[0][6], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[6]~36 , soc_inst|interconnect_1|HRDATA[6]~36, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~0 , soc_inst|m0_1|u_logic|O9iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O9iwx4~1 , soc_inst|m0_1|u_logic|O9iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Orj2z4 , soc_inst|m0_1|u_logic|Orj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wbf3z4~feeder , soc_inst|m0_1|u_logic|Wbf3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wbf3z4 , soc_inst|m0_1|u_logic|Wbf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~1 , soc_inst|m0_1|u_logic|Icxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aff3z4 , soc_inst|m0_1|u_logic|Aff3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fpi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~0 , soc_inst|m0_1|u_logic|Icxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ldf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bqf3z4 , soc_inst|m0_1|u_logic|Bqf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~2 , soc_inst|m0_1|u_logic|Icxwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mof3z4~feeder , soc_inst|m0_1|u_logic|Mof3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE , soc_inst|m0_1|u_logic|Mof3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmf3z4 , soc_inst|m0_1|u_logic|Xmf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4~3 , soc_inst|m0_1|u_logic|Icxwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Icxwx4 , soc_inst|m0_1|u_logic|Icxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0n2z4 , soc_inst|m0_1|u_logic|J0n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md93z4 , soc_inst|m0_1|u_logic|Md93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~1 , soc_inst|m0_1|u_logic|G4qwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3n2z4 , soc_inst|m0_1|u_logic|N3n2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE , soc_inst|m0_1|u_logic|Mz63z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~0 , soc_inst|m0_1|u_logic|G4qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcv2z4~feeder , soc_inst|m0_1|u_logic|Vcv2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V883z4~DUPLICATE , soc_inst|m0_1|u_logic|V883z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE , soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~2 , soc_inst|m0_1|u_logic|G4qwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Vcv2z4 , soc_inst|m0_1|u_logic|Vcv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1n2z4 , soc_inst|m0_1|u_logic|Y1n2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~3 , soc_inst|m0_1|u_logic|G4qwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md93z4 , soc_inst|m0_1|u_logic|Md93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J0n2z4 , soc_inst|m0_1|u_logic|J0n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G4qwx4~1 , soc_inst|m0_1|u_logic|G4qwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G4qwx4 , soc_inst|m0_1|u_logic|G4qwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~0 , soc_inst|m0_1|u_logic|Asdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~1 , soc_inst|m0_1|u_logic|Xtdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][4] , soc_inst|switches_1|switch_store[1][4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4 , soc_inst|m0_1|u_logic|Hk0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[20]~16 , soc_inst|m0_1|u_logic|hwdata_o[20]~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[20]~16 , soc_inst|ram_1|data_to_memory[20]~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjvwx4~0 , soc_inst|m0_1|u_logic|Sjvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I1h3z4 , soc_inst|m0_1|u_logic|I1h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O24wx4~0 , soc_inst|m0_1|u_logic|O24wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gdo2z4 , soc_inst|m0_1|u_logic|Gdo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5a3z4~feeder , soc_inst|m0_1|u_logic|U5a3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5a3z4 , soc_inst|m0_1|u_logic|U5a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~61 , soc_inst|m0_1|u_logic|Add0~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5g3z4 , soc_inst|m0_1|u_logic|T5g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rpmvx4~0 , soc_inst|m0_1|u_logic|Rpmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K7g3z4 , soc_inst|m0_1|u_logic|K7g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~81 , soc_inst|m0_1|u_logic|Add0~81, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kpmvx4~0 , soc_inst|m0_1|u_logic|Kpmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rsa3z4 , soc_inst|m0_1|u_logic|Rsa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~1 , soc_inst|m0_1|u_logic|Add0~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4a3z4~0 , soc_inst|m0_1|u_logic|D4a3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D4a3z4 , soc_inst|m0_1|u_logic|D4a3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dpmvx4~0 , soc_inst|m0_1|u_logic|Dpmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ara3z4 , soc_inst|m0_1|u_logic|Ara3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~73 , soc_inst|m0_1|u_logic|Add0~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Womvx4~0 , soc_inst|m0_1|u_logic|Womvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xeo2z4 , soc_inst|m0_1|u_logic|Xeo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~29 , soc_inst|m0_1|u_logic|Add0~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[17]~17 , soc_inst|m0_1|u_logic|hwdata_o[17]~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B2i3z4 , soc_inst|m0_1|u_logic|B2i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pomvx4~0 , soc_inst|m0_1|u_logic|Pomvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3i3z4 , soc_inst|m0_1|u_logic|S3i3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~17 , soc_inst|m0_1|u_logic|Add0~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~53 , soc_inst|m0_1|u_logic|Add0~53, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8m2z4 , soc_inst|m0_1|u_logic|L8m2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bomvx4~0 , soc_inst|m0_1|u_logic|Bomvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jpa3z4 , soc_inst|m0_1|u_logic|Jpa3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~45 , soc_inst|m0_1|u_logic|Add0~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Unmvx4~0 , soc_inst|m0_1|u_logic|Unmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z2h3z4 , soc_inst|m0_1|u_logic|Z2h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~0 , soc_inst|m0_1|u_logic|Ntmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~0 , soc_inst|m0_1|u_logic|Zudwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE , soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dy23z4 , soc_inst|m0_1|u_logic|Dy23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~3 , soc_inst|m0_1|u_logic|Kqzvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pbl2z4 , soc_inst|m0_1|u_logic|Pbl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M743z4 , soc_inst|m0_1|u_logic|M743z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~2 , soc_inst|m0_1|u_logic|Kqzvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tel2z4 , soc_inst|m0_1|u_logic|Tel2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uo13z4 , soc_inst|m0_1|u_logic|Uo13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~0 , soc_inst|m0_1|u_logic|Kqzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Edl2z4 , soc_inst|m0_1|u_logic|Edl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C1lvx4~0 , soc_inst|m0_1|u_logic|C1lvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lgi3z4 , soc_inst|m0_1|u_logic|Lgi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~1 , soc_inst|m0_1|u_logic|Kqzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhl2z4 , soc_inst|m0_1|u_logic|Xhl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wo03z4 , soc_inst|m0_1|u_logic|Wo03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Csz2z4 , soc_inst|m0_1|u_logic|Csz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~4 , soc_inst|m0_1|u_logic|Kqzvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE , soc_inst|m0_1|u_logic|Nz73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Igl2z4 , soc_inst|m0_1|u_logic|Igl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C193z4 , soc_inst|m0_1|u_logic|C193z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE , soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~5 , soc_inst|m0_1|u_logic|Kqzvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eut2z4 , soc_inst|m0_1|u_logic|Eut2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE , soc_inst|m0_1|u_logic|N3v2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~6 , soc_inst|m0_1|u_logic|Kqzvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~7 , soc_inst|m0_1|u_logic|Kqzvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4 , soc_inst|m0_1|u_logic|Kqzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4awx4~0 , soc_inst|m0_1|u_logic|J4awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vg53z4 , soc_inst|m0_1|u_logic|Vg53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Py72z4~0 , soc_inst|m0_1|u_logic|Py72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M082z4~0 , soc_inst|m0_1|u_logic|M082z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE , soc_inst|m0_1|u_logic|Dy23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Py72z4~1 , soc_inst|m0_1|u_logic|Py72z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Py72z4~2 , soc_inst|m0_1|u_logic|Py72z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Py72z4~3 , soc_inst|m0_1|u_logic|Py72z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nozvx4~0 , soc_inst|m0_1|u_logic|Nozvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Znzvx4~0 , soc_inst|m0_1|u_logic|Znzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~0 , soc_inst|m0_1|u_logic|Xmzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~1 , soc_inst|m0_1|u_logic|Uozvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~0 , soc_inst|m0_1|u_logic|Uozvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Locvx4 , soc_inst|m0_1|u_logic|Locvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~121 , soc_inst|m0_1|u_logic|Add5~121, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~57 , soc_inst|m0_1|u_logic|Add5~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~1 , soc_inst|m0_1|u_logic|Xmzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Edl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3v2z4 , soc_inst|m0_1|u_logic|N3v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~0 , soc_inst|m0_1|u_logic|U7uwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eq63z4 , soc_inst|m0_1|u_logic|Eq63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE , soc_inst|m0_1|u_logic|Eut2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz73z4 , soc_inst|m0_1|u_logic|Nz73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7uwx4~1 , soc_inst|m0_1|u_logic|U7uwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7uwx4 , soc_inst|m0_1|u_logic|U7uwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~0 , soc_inst|m0_1|u_logic|Nvdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~1 , soc_inst|m0_1|u_logic|Nvdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~1 , soc_inst|m0_1|u_logic|Ntmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4~0 , soc_inst|m0_1|u_logic|Tj0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4 , soc_inst|m0_1|u_logic|Tj0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wh0wx4~0 , soc_inst|m0_1|u_logic|Wh0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ri0wx4~1 , soc_inst|m0_1|u_logic|Ri0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ri0wx4~0 , soc_inst|m0_1|u_logic|Ri0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~0 , soc_inst|m0_1|u_logic|Bh0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ia0wx4 , soc_inst|m0_1|u_logic|Ia0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~1 , soc_inst|m0_1|u_logic|Bh0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rdg3z4 , soc_inst|m0_1|u_logic|Rdg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wrg3z4 , soc_inst|m0_1|u_logic|Wrg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~1 , soc_inst|m0_1|u_logic|Dmvwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE , soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~0 , soc_inst|m0_1|u_logic|Dmvwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4 , soc_inst|m0_1|u_logic|Dmvwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~0 , soc_inst|m0_1|u_logic|Jtdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~1 , soc_inst|m0_1|u_logic|Jtdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][1] , soc_inst|switches_1|switch_store[1][1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mbtwx4~0 , soc_inst|m0_1|u_logic|Mbtwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S3i3z4~DUPLICATE , soc_inst|m0_1|u_logic|S3i3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~0 , soc_inst|m0_1|u_logic|Bgfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~1 , soc_inst|m0_1|u_logic|Bgfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4 , soc_inst|m0_1|u_logic|Mx0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~0 , soc_inst|m0_1|u_logic|Iv0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df83z4 , soc_inst|m0_1|u_logic|Df83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D1p2z4 , soc_inst|m0_1|u_logic|D1p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~6 , soc_inst|m0_1|u_logic|Yw0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE , soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~7 , soc_inst|m0_1|u_logic|Yw0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yw0wx4~8 , soc_inst|m0_1|u_logic|Yw0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gdawx4~1 , soc_inst|m0_1|u_logic|Gdawx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fq0wx4 , soc_inst|m0_1|u_logic|Fq0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Irjvx4~0 , soc_inst|m0_1|u_logic|Irjvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W5p2z4 , soc_inst|m0_1|u_logic|W5p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvn2z4 , soc_inst|m0_1|u_logic|Tvn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jf92z4~0 , soc_inst|m0_1|u_logic|Jf92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ixn2z4 , soc_inst|m0_1|u_logic|Ixn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md92z4~0 , soc_inst|m0_1|u_logic|Md92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec33z4 , soc_inst|m0_1|u_logic|Ec33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md92z4~1 , soc_inst|m0_1|u_logic|Md92z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md92z4~2 , soc_inst|m0_1|u_logic|Md92z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Md92z4~3 , soc_inst|m0_1|u_logic|Md92z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qs0wx4~0 , soc_inst|m0_1|u_logic|Qs0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|St0wx4 , soc_inst|m0_1|u_logic|St0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~1 , soc_inst|m0_1|u_logic|Mq0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~1 , soc_inst|m0_1|u_logic|Cs0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~0 , soc_inst|m0_1|u_logic|Cs0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~2 , soc_inst|m0_1|u_logic|Mq0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~0 , soc_inst|m0_1|u_logic|Mq0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psn2z4 , soc_inst|m0_1|u_logic|Psn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~0 , soc_inst|m0_1|u_logic|H1qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eun2z4 , soc_inst|m0_1|u_logic|Eun2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~1 , soc_inst|m0_1|u_logic|H1qwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H1qwx4 , soc_inst|m0_1|u_logic|H1qwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~0 , soc_inst|m0_1|u_logic|X0ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~1 , soc_inst|m0_1|u_logic|X0ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tq7wx4~0 , soc_inst|m0_1|u_logic|Tq7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fq7wx4~0 , soc_inst|m0_1|u_logic|Fq7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po7wx4~0 , soc_inst|m0_1|u_logic|Po7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vr7wx4~0 , soc_inst|m0_1|u_logic|Vr7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~0 , soc_inst|m0_1|u_logic|Jmdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~1 , soc_inst|m0_1|u_logic|Rw7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cuxwx4~0 , soc_inst|m0_1|u_logic|Cuxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hr7wx4~0 , soc_inst|m0_1|u_logic|Hr7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fc7wx4~0 , soc_inst|m0_1|u_logic|Fc7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fc7wx4~1 , soc_inst|m0_1|u_logic|Fc7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cb3wx4~0 , soc_inst|m0_1|u_logic|Cb3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R38wx4~0 , soc_inst|m0_1|u_logic|R38wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R38wx4~1 , soc_inst|m0_1|u_logic|R38wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qb3wx4 , soc_inst|m0_1|u_logic|Qb3wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z9zvx4~0 , soc_inst|m0_1|u_logic|Z9zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~17 , soc_inst|m0_1|u_logic|Add3~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~13 , soc_inst|m0_1|u_logic|Add3~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~9 , soc_inst|m0_1|u_logic|Add3~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~5 , soc_inst|m0_1|u_logic|Add3~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add3~1 , soc_inst|m0_1|u_logic|Add3~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~0 , soc_inst|m0_1|u_logic|haddr_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~1 , soc_inst|m0_1|u_logic|O3ivx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE , soc_inst|m0_1|u_logic|V1l2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~1 , soc_inst|m0_1|u_logic|Nd3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE , soc_inst|m0_1|u_logic|Yd03z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ehz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pfz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~4 , soc_inst|m0_1|u_logic|Nd3wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V41xx4~0 , soc_inst|m0_1|u_logic|V41xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Koj2z4 , soc_inst|m0_1|u_logic|Koj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ab1xx4~0 , soc_inst|m0_1|u_logic|Ab1xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~2 , soc_inst|m0_1|u_logic|Nd3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4 , soc_inst|m0_1|u_logic|Nd3wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~0 , soc_inst|m0_1|u_logic|hwdata_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ux4wx4~0 , soc_inst|m0_1|u_logic|Ux4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owgvx4~0 , soc_inst|m0_1|u_logic|Owgvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ywi2z4 , soc_inst|m0_1|u_logic|Ywi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6mwx4~0 , soc_inst|m0_1|u_logic|Q6mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~0 , soc_inst|m0_1|u_logic|X2rvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~0 , soc_inst|m0_1|u_logic|Pjyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|DataValid~1 , soc_inst|switches_1|DataValid~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|DataValid[0] , soc_inst|switches_1|DataValid[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[0]~27 , soc_inst|ram_1|data_to_memory[0]~27, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[8]~28 , soc_inst|ram_1|data_to_memory[8]~28, de1_soc_wrapper, 1
-instance = comp, \SW[0]~input , SW[0]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][0] , soc_inst|switches_1|switch_store[0][0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[0]~32 , soc_inst|interconnect_1|HRDATA[0]~32, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B28wx4~0 , soc_inst|m0_1|u_logic|B28wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahowx4~0 , soc_inst|m0_1|u_logic|Ahowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tgowx4~0 , soc_inst|m0_1|u_logic|Tgowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~0 , soc_inst|m0_1|u_logic|Tlyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~1 , soc_inst|m0_1|u_logic|Tlyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~1 , soc_inst|m0_1|u_logic|Pjyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U18wx4~0 , soc_inst|m0_1|u_logic|U18wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~2 , soc_inst|m0_1|u_logic|Pjyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T8f3z4 , soc_inst|m0_1|u_logic|T8f3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~0 , soc_inst|m0_1|u_logic|Hmyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~1 , soc_inst|m0_1|u_logic|Hmyvx4~1, de1_soc_wrapper, 1
-instance = comp, \SW[8]~input , SW[8]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][8] , soc_inst|switches_1|switch_store[0][8], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[8]~33 , soc_inst|interconnect_1|HRDATA[8]~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S08wx4~0 , soc_inst|m0_1|u_logic|S08wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~2 , soc_inst|m0_1|u_logic|Hmyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I21wx4~0 , soc_inst|m0_1|u_logic|I21wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~0 , soc_inst|m0_1|u_logic|Q7ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~1 , soc_inst|m0_1|u_logic|Q7ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rkyvx4~0 , soc_inst|m0_1|u_logic|Rkyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I21wx4 , soc_inst|m0_1|u_logic|I21wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~93 , soc_inst|m0_1|u_logic|Add2~93, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~0 , soc_inst|m0_1|u_logic|Qjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tjlwx4~0 , soc_inst|m0_1|u_logic|Tjlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~1 , soc_inst|m0_1|u_logic|Qjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dkx2z4 , soc_inst|m0_1|u_logic|Dkx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~89 , soc_inst|m0_1|u_logic|Add2~89, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~0 , soc_inst|m0_1|u_logic|Jjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~1 , soc_inst|m0_1|u_logic|Jjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Plx2z4 , soc_inst|m0_1|u_logic|Plx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~1 , soc_inst|m0_1|u_logic|Asdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5n2z4 , soc_inst|m0_1|u_logic|C5n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M3u2z4 , soc_inst|m0_1|u_logic|M3u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~7 , soc_inst|m0_1|u_logic|Wa0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V883z4 , soc_inst|m0_1|u_logic|V883z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mz63z4 , soc_inst|m0_1|u_logic|Mz63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~6 , soc_inst|m0_1|u_logic|Wa0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~8 , soc_inst|m0_1|u_logic|Wa0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4 , soc_inst|m0_1|u_logic|Wa0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[22]~3 , soc_inst|m0_1|u_logic|hwdata_o[22]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fed3z4 , soc_inst|m0_1|u_logic|Fed3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dks2z4 , soc_inst|m0_1|u_logic|Dks2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G8n2z4 , soc_inst|m0_1|u_logic|G8n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K3uvx4~0 , soc_inst|m0_1|u_logic|K3uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W2uvx4 , soc_inst|m0_1|u_logic|W2uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X9n2z4 , soc_inst|m0_1|u_logic|X9n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bus2z4 , soc_inst|m0_1|u_logic|Bus2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avowx4~0 , soc_inst|m0_1|u_logic|Avowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avowx4~1 , soc_inst|m0_1|u_logic|Avowx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avowx4~2 , soc_inst|m0_1|u_logic|Avowx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cma3z4~0 , soc_inst|m0_1|u_logic|Cma3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cma3z4 , soc_inst|m0_1|u_logic|Cma3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~0 , soc_inst|m0_1|u_logic|Y7iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~1 , soc_inst|m0_1|u_logic|Y7iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~2 , soc_inst|m0_1|u_logic|Y7iwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4~0 , soc_inst|m0_1|u_logic|Ba0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bq5wx4~0 , soc_inst|m0_1|u_logic|Bq5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Axm2z4~0 , soc_inst|m0_1|u_logic|Axm2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Axm2z4 , soc_inst|m0_1|u_logic|Axm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4~0 , soc_inst|m0_1|u_logic|Pcd3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4 , soc_inst|m0_1|u_logic|Pcd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa23z4 , soc_inst|m0_1|u_logic|Sa23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~6 , soc_inst|m0_1|u_logic|Ze1wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~7 , soc_inst|m0_1|u_logic|Ze1wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~8 , soc_inst|m0_1|u_logic|Ze1wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4 , soc_inst|m0_1|u_logic|Ze1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[12]~19 , soc_inst|m0_1|u_logic|hwdata_o[12]~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7a3z4 , soc_inst|m0_1|u_logic|L7a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~37 , soc_inst|m0_1|u_logic|Add0~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ypmvx4~0 , soc_inst|m0_1|u_logic|Ypmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iua3z4 , soc_inst|m0_1|u_logic|Iua3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~61 , soc_inst|m0_1|u_logic|Add0~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5g3z4 , soc_inst|m0_1|u_logic|T5g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rpmvx4~0 , soc_inst|m0_1|u_logic|Rpmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K7g3z4 , soc_inst|m0_1|u_logic|K7g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~81 , soc_inst|m0_1|u_logic|Add0~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5a3z4 , soc_inst|m0_1|u_logic|U5a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kpmvx4~0 , soc_inst|m0_1|u_logic|Kpmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rsa3z4 , soc_inst|m0_1|u_logic|Rsa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mis2z4~0 , soc_inst|m0_1|u_logic|Mis2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE , soc_inst|m0_1|u_logic|Mis2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4~0 , soc_inst|m0_1|u_logic|Tqc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqc3z4 , soc_inst|m0_1|u_logic|Tqc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txa2z4~0 , soc_inst|m0_1|u_logic|Txa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zyhvx4~0 , soc_inst|m0_1|u_logic|Zyhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rym2z4 , soc_inst|m0_1|u_logic|Rym2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~1 , soc_inst|m0_1|u_logic|M1pwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~0 , soc_inst|m0_1|u_logic|Kss2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kss2z4 , soc_inst|m0_1|u_logic|Kss2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~0 , soc_inst|m0_1|u_logic|M1pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~2 , soc_inst|m0_1|u_logic|M1pwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~3 , soc_inst|m0_1|u_logic|M1pwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~4 , soc_inst|m0_1|u_logic|M1pwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[14]~30 , soc_inst|ram_1|data_to_memory[14]~30, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[3] , soc_inst|ram_1|byte_select[3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[30]~29 , soc_inst|ram_1|data_to_memory[30]~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qapwx4~0 , soc_inst|m0_1|u_logic|Qapwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rdg3z4 , soc_inst|m0_1|u_logic|Rdg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4~feeder , soc_inst|m0_1|u_logic|Pwg3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4 , soc_inst|m0_1|u_logic|Pwg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gfg3z4 , soc_inst|m0_1|u_logic|Gfg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nag3z4 , soc_inst|m0_1|u_logic|Nag3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~6 , soc_inst|m0_1|u_logic|Hk0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dng3z4 , soc_inst|m0_1|u_logic|Dng3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hqg3z4 , soc_inst|m0_1|u_logic|Hqg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~7 , soc_inst|m0_1|u_logic|Hk0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~8 , soc_inst|m0_1|u_logic|Hk0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4 , soc_inst|m0_1|u_logic|Zjg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vgg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~3 , soc_inst|m0_1|u_logic|Hk0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyg3z4 , soc_inst|m0_1|u_logic|Eyg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xi2xx4~0 , soc_inst|m0_1|u_logic|Xi2xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wrg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~0 , soc_inst|m0_1|u_logic|Hk0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ltg3z4~feeder , soc_inst|m0_1|u_logic|Ltg3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ltg3z4 , soc_inst|m0_1|u_logic|Ltg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avg3z4~feeder , soc_inst|m0_1|u_logic|Avg3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Avg3z4 , soc_inst|m0_1|u_logic|Avg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~4 , soc_inst|m0_1|u_logic|Hk0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kig3z4 , soc_inst|m0_1|u_logic|Kig3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4~feeder , soc_inst|m0_1|u_logic|Ccg3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ccg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~2 , soc_inst|m0_1|u_logic|Hk0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE , soc_inst|m0_1|u_logic|Sog3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~21 , soc_inst|m0_1|u_logic|Add5~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~49 , soc_inst|m0_1|u_logic|Add5~49, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ql0wx4 , soc_inst|m0_1|u_logic|Ql0wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xvjvx4~0 , soc_inst|m0_1|u_logic|Xvjvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|L7p2z4 , soc_inst|m0_1|u_logic|L7p2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~0 , soc_inst|m0_1|u_logic|Xu82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~2 , soc_inst|m0_1|u_logic|Xu82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Olg3z4 , soc_inst|m0_1|u_logic|Olg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~1 , soc_inst|m0_1|u_logic|Xu82z4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pwg3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uw82z4~0 , soc_inst|m0_1|u_logic|Uw82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zjg3z4 , soc_inst|m0_1|u_logic|Zjg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Olg3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~1 , soc_inst|m0_1|u_logic|Xu82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgg3z4 , soc_inst|m0_1|u_logic|Vgg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~0 , soc_inst|m0_1|u_logic|Xu82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~2 , soc_inst|m0_1|u_logic|Xu82z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xu82z4~3 , soc_inst|m0_1|u_logic|Xu82z4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fj0wx4~0 , soc_inst|m0_1|u_logic|Fj0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9awx4~0 , soc_inst|m0_1|u_logic|M9awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9awx4~1 , soc_inst|m0_1|u_logic|M9awx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~53 , soc_inst|m0_1|u_logic|Add5~53, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ug0wx4 , soc_inst|m0_1|u_logic|Ug0wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|M0kvx4~0 , soc_inst|m0_1|u_logic|M0kvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Tzg3z4 , soc_inst|m0_1|u_logic|Tzg3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebh3z4~feeder , soc_inst|m0_1|u_logic|Ebh3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebh3z4 , soc_inst|m0_1|u_logic|Ebh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iq82z4~0 , soc_inst|m0_1|u_logic|Iq82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rz13z4 , soc_inst|m0_1|u_logic|Rz13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A933z4 , soc_inst|m0_1|u_logic|A933z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~1 , soc_inst|m0_1|u_logic|Lo82z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tch3z4 , soc_inst|m0_1|u_logic|Tch3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sr53z4 , soc_inst|m0_1|u_logic|Sr53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ji43z4 , soc_inst|m0_1|u_logic|Ji43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~0 , soc_inst|m0_1|u_logic|Lo82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P9h3z4 , soc_inst|m0_1|u_logic|P9h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A8h3z4 , soc_inst|m0_1|u_logic|A8h3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~2 , soc_inst|m0_1|u_logic|Lo82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~3 , soc_inst|m0_1|u_logic|Lo82z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lf0wx4~0 , soc_inst|m0_1|u_logic|Lf0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~1 , soc_inst|m0_1|u_logic|Hk0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4~5 , soc_inst|m0_1|u_logic|Hk0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hk0wx4 , soc_inst|m0_1|u_logic|Hk0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wh0wx4~0 , soc_inst|m0_1|u_logic|Wh0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ri0wx4~1 , soc_inst|m0_1|u_logic|Ri0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ri0wx4~0 , soc_inst|m0_1|u_logic|Ri0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~0 , soc_inst|m0_1|u_logic|Bh0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nvdwx4~1 , soc_inst|m0_1|u_logic|Nvdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~1 , soc_inst|m0_1|u_logic|Xtdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[20]~16 , soc_inst|m0_1|u_logic|hwdata_o[20]~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I1h3z4 , soc_inst|m0_1|u_logic|I1h3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|St0wx4 , soc_inst|m0_1|u_logic|St0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[18]~13 , soc_inst|m0_1|u_logic|hwdata_o[18]~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xyn2z4 , soc_inst|m0_1|u_logic|Xyn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[17]~17 , soc_inst|m0_1|u_logic|hwdata_o[17]~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B2i3z4 , soc_inst|m0_1|u_logic|B2i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[15]~1 , soc_inst|m0_1|u_logic|hwdata_o[15]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4a3z4~0 , soc_inst|m0_1|u_logic|D4a3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4a3z4~DUPLICATE , soc_inst|m0_1|u_logic|D4a3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~1 , soc_inst|m0_1|u_logic|Add0~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dpmvx4~0 , soc_inst|m0_1|u_logic|Dpmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ara3z4 , soc_inst|m0_1|u_logic|Ara3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~73 , soc_inst|m0_1|u_logic|Add0~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xeo2z4 , soc_inst|m0_1|u_logic|Xeo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Womvx4~0 , soc_inst|m0_1|u_logic|Womvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~29 , soc_inst|m0_1|u_logic|Add0~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pomvx4~0 , soc_inst|m0_1|u_logic|Pomvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S3i3z4 , soc_inst|m0_1|u_logic|S3i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~17 , soc_inst|m0_1|u_logic|Add0~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iomvx4~0 , soc_inst|m0_1|u_logic|Iomvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O0o2z4 , soc_inst|m0_1|u_logic|O0o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~53 , soc_inst|m0_1|u_logic|Add0~53, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bomvx4~0 , soc_inst|m0_1|u_logic|Bomvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jpa3z4 , soc_inst|m0_1|u_logic|Jpa3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~45 , soc_inst|m0_1|u_logic|Add0~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Unmvx4~0 , soc_inst|m0_1|u_logic|Unmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z2h3z4 , soc_inst|m0_1|u_logic|Z2h3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjvwx4~0 , soc_inst|m0_1|u_logic|Sjvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~0 , soc_inst|m0_1|u_logic|Ntmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ntmwx4~1 , soc_inst|m0_1|u_logic|Ntmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Godwx4~1 , soc_inst|m0_1|u_logic|Godwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~0 , soc_inst|m0_1|u_logic|Qmdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qmdwx4~1 , soc_inst|m0_1|u_logic|Qmdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhc3z4~0 , soc_inst|m0_1|u_logic|Fhc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhc3z4 , soc_inst|m0_1|u_logic|Fhc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxuvx4~0 , soc_inst|m0_1|u_logic|Oxuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1ivx4~0 , soc_inst|m0_1|u_logic|R1ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipb3z4 , soc_inst|m0_1|u_logic|Ipb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~0 , soc_inst|m0_1|u_logic|Dewwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~1 , soc_inst|m0_1|u_logic|B2uvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U1uvx4 , soc_inst|m0_1|u_logic|U1uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Adt2z4 , soc_inst|m0_1|u_logic|Adt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dewwx4~1 , soc_inst|m0_1|u_logic|Dewwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~0 , soc_inst|m0_1|u_logic|Gtmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gza3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~1 , soc_inst|m0_1|u_logic|Gtmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtmwx4~2 , soc_inst|m0_1|u_logic|Gtmwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4~0 , soc_inst|m0_1|u_logic|Tj0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tj0wx4 , soc_inst|m0_1|u_logic|Tj0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ia0wx4 , soc_inst|m0_1|u_logic|Ia0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bh0wx4~1 , soc_inst|m0_1|u_logic|Bh0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sog3z4 , soc_inst|m0_1|u_logic|Sog3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccg3z4 , soc_inst|m0_1|u_logic|Ccg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE , soc_inst|m0_1|u_logic|Nag3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~0 , soc_inst|m0_1|u_logic|Dmvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE , soc_inst|m0_1|u_logic|Rdg3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wrg3z4 , soc_inst|m0_1|u_logic|Wrg3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4~1 , soc_inst|m0_1|u_logic|Dmvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmvwx4 , soc_inst|m0_1|u_logic|Dmvwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Poq2z4 , soc_inst|m0_1|u_logic|Poq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kev2z4 , soc_inst|m0_1|u_logic|Kev2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~3 , soc_inst|m0_1|u_logic|D9uwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Anq2z4 , soc_inst|m0_1|u_logic|Anq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~1 , soc_inst|m0_1|u_logic|D9uwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B173z4 , soc_inst|m0_1|u_logic|B173z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eqq2z4 , soc_inst|m0_1|u_logic|Eqq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~0 , soc_inst|m0_1|u_logic|D9uwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ka83z4 , soc_inst|m0_1|u_logic|Ka83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5u2z4 , soc_inst|m0_1|u_logic|B5u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~2 , soc_inst|m0_1|u_logic|D9uwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D9uwx4 , soc_inst|m0_1|u_logic|D9uwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xtdwx4~0 , soc_inst|m0_1|u_logic|Xtdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pap2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9p2z4~feeder , soc_inst|m0_1|u_logic|A9p2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9p2z4 , soc_inst|m0_1|u_logic|A9p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE , soc_inst|m0_1|u_logic|Qg93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~0 , soc_inst|m0_1|u_logic|Bjxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE , soc_inst|m0_1|u_logic|Zb83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ecp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4~1 , soc_inst|m0_1|u_logic|Bjxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjxwx4 , soc_inst|m0_1|u_logic|Bjxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~0 , soc_inst|m0_1|u_logic|Eudwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~1 , soc_inst|m0_1|u_logic|Eudwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~0 , soc_inst|m0_1|u_logic|E1ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~1 , soc_inst|m0_1|u_logic|Mydwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~0 , soc_inst|m0_1|u_logic|D7iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sx3wx4~0 , soc_inst|m0_1|u_logic|Sx3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imvvx4~0 , soc_inst|m0_1|u_logic|Imvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~0 , soc_inst|m0_1|u_logic|Ny3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Knvvx4~0 , soc_inst|m0_1|u_logic|Knvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sta2z4~0 , soc_inst|m0_1|u_logic|Sta2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~0 , soc_inst|m0_1|u_logic|T5mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~1 , soc_inst|m0_1|u_logic|T5mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wbk2z4 , soc_inst|m0_1|u_logic|Wbk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4 , soc_inst|m0_1|u_logic|Uyv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zx3wx4~0 , soc_inst|m0_1|u_logic|Zx3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H6mvx4~0 , soc_inst|m0_1|u_logic|H6mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uyv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uqi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE , soc_inst|m0_1|u_logic|X9n2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2uvx4~0 , soc_inst|m0_1|u_logic|I2uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1a3z4 , soc_inst|m0_1|u_logic|B1a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE , soc_inst|m0_1|u_logic|P2a3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4pwx4~0 , soc_inst|m0_1|u_logic|S4pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qrp2z4 , soc_inst|m0_1|u_logic|Qrp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aqp2z4 , soc_inst|m0_1|u_logic|Aqp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bec3z4~0 , soc_inst|m0_1|u_logic|Bec3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bec3z4 , soc_inst|m0_1|u_logic|Bec3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ckuvx4~0 , soc_inst|m0_1|u_logic|Ckuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F2ivx4~0 , soc_inst|m0_1|u_logic|F2ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pxb3z4 , soc_inst|m0_1|u_logic|Pxb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Bjd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~0 , soc_inst|m0_1|u_logic|D0wwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D0wwx4~1 , soc_inst|m0_1|u_logic|D0wwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I90xx4~0 , soc_inst|m0_1|u_logic|I90xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B90xx4~0 , soc_inst|m0_1|u_logic|B90xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zad3z4 , soc_inst|m0_1|u_logic|Zad3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7d3z4 , soc_inst|m0_1|u_logic|T7d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ztc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE , soc_inst|m0_1|u_logic|T7d3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ruvvx4~0 , soc_inst|m0_1|u_logic|Ruvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M2ivx4~0 , soc_inst|m0_1|u_logic|M2ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vac3z4 , soc_inst|m0_1|u_logic|Vac3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4~0 , soc_inst|m0_1|u_logic|Mcc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mcc3z4 , soc_inst|m0_1|u_logic|Mcc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G10xx4~0 , soc_inst|m0_1|u_logic|G10xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G10xx4~1 , soc_inst|m0_1|u_logic|G10xx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tb0xx4~0 , soc_inst|m0_1|u_logic|Tb0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S00xx4~0 , soc_inst|m0_1|u_logic|S00xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fb0xx4~0 , soc_inst|m0_1|u_logic|Fb0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I90xx4~1 , soc_inst|m0_1|u_logic|I90xx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cjuwx4~0 , soc_inst|m0_1|u_logic|Cjuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Usl2z4 , soc_inst|m0_1|u_logic|Usl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Xdb3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Bmb3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzvwx4~0 , soc_inst|m0_1|u_logic|Wzvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzvwx4~1 , soc_inst|m0_1|u_logic|Wzvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~0 , soc_inst|m0_1|u_logic|Jjuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Douvx4~0 , soc_inst|m0_1|u_logic|Douvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X0c3z4 , soc_inst|m0_1|u_logic|X0c3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W0ivx4~0 , soc_inst|m0_1|u_logic|W0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE , soc_inst|m0_1|u_logic|X0c3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4~0 , soc_inst|m0_1|u_logic|Ylc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylc3z4 , soc_inst|m0_1|u_logic|Ylc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6l2z4 , soc_inst|m0_1|u_logic|Q6l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H8l2z4 , soc_inst|m0_1|u_logic|H8l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4l2z4 , soc_inst|m0_1|u_logic|Z4l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A50xx4~0 , soc_inst|m0_1|u_logic|A50xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ayzwx4 , soc_inst|m0_1|u_logic|Ayzwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~1 , soc_inst|m0_1|u_logic|Jjuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~1 , soc_inst|m0_1|u_logic|Wvzwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kwa2z4~0 , soc_inst|m0_1|u_logic|Kwa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nzhvx4~0 , soc_inst|m0_1|u_logic|Nzhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oar2z4 , soc_inst|m0_1|u_logic|Oar2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tib3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4g3z4 , soc_inst|m0_1|u_logic|D4g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wuq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yauvx4~0 , soc_inst|m0_1|u_logic|Yauvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzhvx4~0 , soc_inst|m0_1|u_logic|Gzhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wuq2z4 , soc_inst|m0_1|u_logic|Wuq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mis2z4 , soc_inst|m0_1|u_logic|Mis2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pab3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vgs2z4 , soc_inst|m0_1|u_logic|Vgs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~0 , soc_inst|m0_1|u_logic|Zxvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4 , soc_inst|m0_1|u_logic|Dpc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4~0 , soc_inst|m0_1|u_logic|Dpc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Dpc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zxvwx4~1 , soc_inst|m0_1|u_logic|Zxvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lns2z4 , soc_inst|m0_1|u_logic|Lns2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dks2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsa2z4~0 , soc_inst|m0_1|u_logic|Jsa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Syhvx4~0 , soc_inst|m0_1|u_logic|Syhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lul2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uls2z4 , soc_inst|m0_1|u_logic|Uls2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4~0 , soc_inst|m0_1|u_logic|Jsc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4 , soc_inst|m0_1|u_logic|Jsc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cps2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~0 , soc_inst|m0_1|u_logic|Xwvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xwvwx4~1 , soc_inst|m0_1|u_logic|Xwvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iazwx4~0 , soc_inst|m0_1|u_logic|Iazwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dizwx4~0 , soc_inst|m0_1|u_logic|Dizwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqzwx4~0 , soc_inst|m0_1|u_logic|Tqzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cps2z4 , soc_inst|m0_1|u_logic|Cps2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uls2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kizwx4~0 , soc_inst|m0_1|u_logic|Kizwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~1 , soc_inst|m0_1|u_logic|Arzwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~0 , soc_inst|m0_1|u_logic|Arzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pazwx4 , soc_inst|m0_1|u_logic|Pazwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7zwx4~0 , soc_inst|m0_1|u_logic|J7zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ble3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nnc3z4~0 , soc_inst|m0_1|u_logic|Nnc3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nnc3z4 , soc_inst|m0_1|u_logic|Nnc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipn2z4 , soc_inst|m0_1|u_logic|Ipn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wva2z4~0 , soc_inst|m0_1|u_logic|Wva2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B0ivx4~0 , soc_inst|m0_1|u_logic|B0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Azs2z4 , soc_inst|m0_1|u_logic|Azs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svs2z4 , soc_inst|m0_1|u_logic|Svs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jxs2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gyvwx4~0 , soc_inst|m0_1|u_logic|Gyvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gyvwx4~1 , soc_inst|m0_1|u_logic|Gyvwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~0 , soc_inst|m0_1|u_logic|B6pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mxa2z4~0 , soc_inst|m0_1|u_logic|Mxa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9l2z4 , soc_inst|m0_1|u_logic|Y9l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[9]~6 , soc_inst|m0_1|u_logic|hwdata_o[9]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0ivx4~0 , soc_inst|m0_1|u_logic|I0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y9l2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vve3z4 , soc_inst|m0_1|u_logic|Vve3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vve3z4~0 , soc_inst|m0_1|u_logic|Vve3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vve3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2f3z4~0 , soc_inst|m0_1|u_logic|H2f3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2f3z4 , soc_inst|m0_1|u_logic|H2f3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhvvx4~0 , soc_inst|m0_1|u_logic|Mhvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0ivx4~0 , soc_inst|m0_1|u_logic|P0ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE , soc_inst|m0_1|u_logic|T8f3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkb3z4 , soc_inst|m0_1|u_logic|Kkb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tqs2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kss2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whzwx4~0 , soc_inst|m0_1|u_logic|Whzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whzwx4~1 , soc_inst|m0_1|u_logic|Whzwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjzwx4~0 , soc_inst|m0_1|u_logic|Fjzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yizwx4~0 , soc_inst|m0_1|u_logic|Yizwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qlzwx4~0 , soc_inst|m0_1|u_logic|Qlzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mczwx4~0 , soc_inst|m0_1|u_logic|Mczwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fczwx4~0 , soc_inst|m0_1|u_logic|Fczwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~1 , soc_inst|m0_1|u_logic|B6pwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gcb3z4 , soc_inst|m0_1|u_logic|Gcb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Clzwx4~0 , soc_inst|m0_1|u_logic|Clzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jxs2z4 , soc_inst|m0_1|u_logic|Jxs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ihzwx4~0 , soc_inst|m0_1|u_logic|Ihzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T5zwx4~0 , soc_inst|m0_1|u_logic|T5zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~2 , soc_inst|m0_1|u_logic|B6pwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~3 , soc_inst|m0_1|u_logic|B6pwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~0 , soc_inst|m0_1|u_logic|G2zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~1 , soc_inst|m0_1|u_logic|G2zwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE , soc_inst|m0_1|u_logic|Q6l2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzzwx4~0 , soc_inst|m0_1|u_logic|Qzzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N10xx4~0 , soc_inst|m0_1|u_logic|N10xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jzzwx4~0 , soc_inst|m0_1|u_logic|Jzzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F40xx4~0 , soc_inst|m0_1|u_logic|F40xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Czzwx4~0 , soc_inst|m0_1|u_logic|Czzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kbzwx4~0 , soc_inst|m0_1|u_logic|Kbzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~0 , soc_inst|m0_1|u_logic|Wvzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Adzwx4~0 , soc_inst|m0_1|u_logic|Adzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hdzwx4~0 , soc_inst|m0_1|u_logic|Hdzwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I90xx4~2 , soc_inst|m0_1|u_logic|I90xx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R4zwx4~0 , soc_inst|m0_1|u_logic|R4zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A6zwx4~0 , soc_inst|m0_1|u_logic|A6zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H6zwx4~0 , soc_inst|m0_1|u_logic|H6zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~0 , soc_inst|m0_1|u_logic|Vzywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzywx4~1 , soc_inst|m0_1|u_logic|Vzywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0zwx4~0 , soc_inst|m0_1|u_logic|J0zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C0zwx4~0 , soc_inst|m0_1|u_logic|C0zwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5pwx4~0 , soc_inst|m0_1|u_logic|U5pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6pwx4~0 , soc_inst|m0_1|u_logic|I6pwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6pwx4~4 , soc_inst|m0_1|u_logic|B6pwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~1 , soc_inst|m0_1|u_logic|X2rvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uqi2z4 , soc_inst|m0_1|u_logic|Uqi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hzywx4~0 , soc_inst|m0_1|u_logic|Hzywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwywx4~0 , soc_inst|m0_1|u_logic|Wwywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyywx4~0 , soc_inst|m0_1|u_logic|Tyywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ozywx4~0 , soc_inst|m0_1|u_logic|Ozywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gvywx4~0 , soc_inst|m0_1|u_logic|Gvywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E5owx4~0 , soc_inst|m0_1|u_logic|E5owx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~2 , soc_inst|m0_1|u_logic|X2rvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~1 , soc_inst|m0_1|u_logic|D7iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ba0wx4 , soc_inst|m0_1|u_logic|Ba0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J70wx4~1 , soc_inst|m0_1|u_logic|J70wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~1 , soc_inst|m0_1|u_logic|Z80wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~0 , soc_inst|m0_1|u_logic|Z80wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J70wx4~2 , soc_inst|m0_1|u_logic|J70wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J70wx4~0 , soc_inst|m0_1|u_logic|J70wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw03z4 , soc_inst|m0_1|u_logic|Pw03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vzz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~4 , soc_inst|m0_1|u_logic|Wa0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug43z4 , soc_inst|m0_1|u_logic|Ug43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0n2z4~DUPLICATE , soc_inst|m0_1|u_logic|J0n2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~2 , soc_inst|m0_1|u_logic|Wa0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy13z4 , soc_inst|m0_1|u_logic|Cy13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~0 , soc_inst|m0_1|u_logic|Wa0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6n2z4 , soc_inst|m0_1|u_logic|R6n2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T83xx4~0 , soc_inst|m0_1|u_logic|T83xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L733z4 , soc_inst|m0_1|u_logic|L733z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq53z4~feeder , soc_inst|m0_1|u_logic|Dq53z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dq53z4 , soc_inst|m0_1|u_logic|Dq53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~3 , soc_inst|m0_1|u_logic|Wa0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~1 , soc_inst|m0_1|u_logic|Wa0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~5 , soc_inst|m0_1|u_logic|Wa0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E5awx4~0 , soc_inst|m0_1|u_logic|E5awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E5awx4~1 , soc_inst|m0_1|u_logic|E5awx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE , soc_inst|m0_1|u_logic|K1z2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U6awx4~0 , soc_inst|m0_1|u_logic|U6awx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A933z4~DUPLICATE , soc_inst|m0_1|u_logic|A933z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE , soc_inst|m0_1|u_logic|Sr53z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~3 , soc_inst|m0_1|u_logic|Ce0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eqq2z4 , soc_inst|m0_1|u_logic|Eqq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~0 , soc_inst|m0_1|u_logic|Ce0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D03xx4~0 , soc_inst|m0_1|u_logic|D03xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ji43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Anq2z4 , soc_inst|m0_1|u_logic|Anq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ji43z4 , soc_inst|m0_1|u_logic|Ji43z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~2 , soc_inst|m0_1|u_logic|Ce0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rz13z4 , soc_inst|m0_1|u_logic|Rz13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Eqq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~0 , soc_inst|m0_1|u_logic|Ce0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A8h3z4~feeder , soc_inst|m0_1|u_logic|A8h3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A8h3z4 , soc_inst|m0_1|u_logic|A8h3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P9h3z4~feeder , soc_inst|m0_1|u_logic|P9h3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P9h3z4 , soc_inst|m0_1|u_logic|P9h3z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~4 , soc_inst|m0_1|u_logic|Ce0wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Poq2z4 , soc_inst|m0_1|u_logic|Poq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Poq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Llq2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~1 , soc_inst|m0_1|u_logic|Ce0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tch3z4~feeder , soc_inst|m0_1|u_logic|Tch3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tch3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D03xx4~0 , soc_inst|m0_1|u_logic|D03xx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~5 , soc_inst|m0_1|u_logic|Ce0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ka83z4~feeder , soc_inst|m0_1|u_logic|Ka83z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ka83z4 , soc_inst|m0_1|u_logic|Ka83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ebh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5u2z4~feeder , soc_inst|m0_1|u_logic|B5u2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE , soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~7 , soc_inst|m0_1|u_logic|Ce0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B173z4 , soc_inst|m0_1|u_logic|B173z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bf93z4 , soc_inst|m0_1|u_logic|Bf93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~6 , soc_inst|m0_1|u_logic|Ce0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~8 , soc_inst|m0_1|u_logic|Ce0wx4~8, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U6awx4~1 , soc_inst|m0_1|u_logic|U6awx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add5~25 , soc_inst|m0_1|u_logic|Add5~25, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fc0wx4 , soc_inst|m0_1|u_logic|Fc0wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|B5kvx4~0 , soc_inst|m0_1|u_logic|B5kvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Llq2z4 , soc_inst|m0_1|u_logic|Llq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tch3z4 , soc_inst|m0_1|u_logic|Tch3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ebh3z4 , soc_inst|m0_1|u_logic|Ebh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iq82z4~0 , soc_inst|m0_1|u_logic|Iq82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sr53z4 , soc_inst|m0_1|u_logic|Sr53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~0 , soc_inst|m0_1|u_logic|Lo82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A933z4 , soc_inst|m0_1|u_logic|A933z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~1 , soc_inst|m0_1|u_logic|Lo82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~2 , soc_inst|m0_1|u_logic|Lo82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lo82z4~3 , soc_inst|m0_1|u_logic|Lo82z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lf0wx4~0 , soc_inst|m0_1|u_logic|Lf0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~1 , soc_inst|m0_1|u_logic|Add5~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C70wx4 , soc_inst|m0_1|u_logic|C70wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nox2z4 , soc_inst|m0_1|u_logic|Nox2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q9kvx4~0 , soc_inst|m0_1|u_logic|Q9kvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zfh3z4 , soc_inst|m0_1|u_logic|Zfh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L733z4 , soc_inst|m0_1|u_logic|L733z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~1 , soc_inst|m0_1|u_logic|Zh82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw03z4~DUPLICATE , soc_inst|m0_1|u_logic|Pw03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vzz2z4 , soc_inst|m0_1|u_logic|Vzz2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~2 , soc_inst|m0_1|u_logic|Zh82z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5n2z4 , soc_inst|m0_1|u_logic|C5n2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wj82z4~0 , soc_inst|m0_1|u_logic|Wj82z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6n2z4 , soc_inst|m0_1|u_logic|R6n2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE , soc_inst|m0_1|u_logic|Dq53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ug43z4 , soc_inst|m0_1|u_logic|Ug43z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~0 , soc_inst|m0_1|u_logic|Zh82z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zh82z4~3 , soc_inst|m0_1|u_logic|Zh82z4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N90wx4~0 , soc_inst|m0_1|u_logic|N90wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~1 , soc_inst|m0_1|u_logic|Add5~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~0 , soc_inst|m0_1|u_logic|Zdhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~1 , soc_inst|m0_1|u_logic|Zdhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kaf3z4 , soc_inst|m0_1|u_logic|Kaf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y92wx4 , soc_inst|m0_1|u_logic|Y92wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K8ivx4~0 , soc_inst|m0_1|u_logic|K8ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B6j2z4 , soc_inst|m0_1|u_logic|B6j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Joi3z4 , soc_inst|m0_1|u_logic|Joi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sz23z4 , soc_inst|m0_1|u_logic|Sz23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jq13z4 , soc_inst|m0_1|u_logic|Jq13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~1 , soc_inst|m0_1|u_logic|P582z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Umi3z4 , soc_inst|m0_1|u_logic|Umi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M782z4~0 , soc_inst|m0_1|u_logic|M782z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ki53z4 , soc_inst|m0_1|u_logic|Ki53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B943z4 , soc_inst|m0_1|u_logic|B943z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~0 , soc_inst|m0_1|u_logic|P582z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qji3z4 , soc_inst|m0_1|u_logic|Qji3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE , soc_inst|m0_1|u_logic|Fli3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~2 , soc_inst|m0_1|u_logic|P582z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P582z4~3 , soc_inst|m0_1|u_logic|P582z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtnvx4~0 , soc_inst|m0_1|u_logic|Gtnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q9cwx4~0 , soc_inst|m0_1|u_logic|Q9cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yqzvx4~0 , soc_inst|m0_1|u_logic|Yqzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3pvx4~0 , soc_inst|m0_1|u_logic|O3pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3pvx4~1 , soc_inst|m0_1|u_logic|O3pvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rqzvx4~0 , soc_inst|m0_1|u_logic|Rqzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5v2z4~feeder , soc_inst|m0_1|u_logic|C5v2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE , soc_inst|m0_1|u_logic|C5v2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~0 , soc_inst|m0_1|u_logic|Eacwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~3 , soc_inst|m0_1|u_logic|Eacwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fli3z4 , soc_inst|m0_1|u_logic|Fli3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~5 , soc_inst|m0_1|u_logic|Eacwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~2 , soc_inst|m0_1|u_logic|Eacwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~4 , soc_inst|m0_1|u_logic|Eacwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE , soc_inst|m0_1|u_logic|F9j2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~1 , soc_inst|m0_1|u_logic|Eacwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~6 , soc_inst|m0_1|u_logic|Eacwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C183z4 , soc_inst|m0_1|u_logic|C183z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~7 , soc_inst|m0_1|u_logic|Eacwx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~8 , soc_inst|m0_1|u_logic|Eacwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eacwx4~9 , soc_inst|m0_1|u_logic|Eacwx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rih2z4~0 , soc_inst|m0_1|u_logic|Rih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~125 , soc_inst|m0_1|u_logic|Add5~125, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~117 , soc_inst|m0_1|u_logic|Add2~117, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~113 , soc_inst|m0_1|u_logic|Add2~113, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Duhvx4~0 , soc_inst|m0_1|u_logic|Duhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3pvx4 , soc_inst|m0_1|u_logic|O3pvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Duhvx4~1 , soc_inst|m0_1|u_logic|Duhvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xyk2z4 , soc_inst|m0_1|u_logic|Xyk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vjnvx4~0 , soc_inst|m0_1|u_logic|Vjnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1pvx4 , soc_inst|m0_1|u_logic|Y1pvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vjnvx4~1 , soc_inst|m0_1|u_logic|Vjnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7j2z4 , soc_inst|m0_1|u_logic|Q7j2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nozvx4~0 , soc_inst|m0_1|u_logic|Nozvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~1 , soc_inst|m0_1|u_logic|Uozvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uozvx4~0 , soc_inst|m0_1|u_logic|Uozvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Znzvx4~0 , soc_inst|m0_1|u_logic|Znzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~0 , soc_inst|m0_1|u_logic|Xmzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xmzvx4~1 , soc_inst|m0_1|u_logic|Xmzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Csz2z4 , soc_inst|m0_1|u_logic|Csz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~4 , soc_inst|m0_1|u_logic|Kqzvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE , soc_inst|m0_1|u_logic|Vg53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~3 , soc_inst|m0_1|u_logic|Kqzvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tel2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~0 , soc_inst|m0_1|u_logic|Kqzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~1 , soc_inst|m0_1|u_logic|Kqzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Igl2z4 , soc_inst|m0_1|u_logic|Igl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE , soc_inst|m0_1|u_logic|Eq63z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~5 , soc_inst|m0_1|u_logic|Kqzvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~6 , soc_inst|m0_1|u_logic|Kqzvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~7 , soc_inst|m0_1|u_logic|Kqzvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4~2 , soc_inst|m0_1|u_logic|Kqzvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqzvx4 , soc_inst|m0_1|u_logic|Kqzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~18 , soc_inst|m0_1|u_logic|hwdata_o~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~0 , soc_inst|m0_1|u_logic|M5mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~1 , soc_inst|m0_1|u_logic|M5mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hzj2z4 , soc_inst|m0_1|u_logic|Hzj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7qwx4~0 , soc_inst|m0_1|u_logic|T7qwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~0 , soc_inst|m0_1|u_logic|Jkmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Beowx4~0 , soc_inst|m0_1|u_logic|Beowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~77 , soc_inst|m0_1|u_logic|Add2~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~29 , soc_inst|m0_1|u_logic|Add2~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~21 , soc_inst|m0_1|u_logic|Add2~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yih2z4~0 , soc_inst|m0_1|u_logic|Yih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hrcvx4 , soc_inst|m0_1|u_logic|Hrcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE , soc_inst|m0_1|u_logic|Hn03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~2 , soc_inst|m0_1|u_logic|Ds72z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Au72z4~0 , soc_inst|m0_1|u_logic|Au72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~1 , soc_inst|m0_1|u_logic|Ds72z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~0 , soc_inst|m0_1|u_logic|Ds72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ds72z4~3 , soc_inst|m0_1|u_logic|Ds72z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hlzvx4~0 , soc_inst|m0_1|u_logic|Hlzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wpcvx4 , soc_inst|m0_1|u_logic|Wpcvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~5 , soc_inst|m0_1|u_logic|Add5~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~89 , soc_inst|m0_1|u_logic|Add5~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~1 , soc_inst|m0_1|u_logic|Aihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~0 , soc_inst|m0_1|u_logic|Qfzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~1 , soc_inst|m0_1|u_logic|Qfzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~2 , soc_inst|m0_1|u_logic|Aihvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~0 , soc_inst|m0_1|u_logic|Aihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xsx2z4 , soc_inst|m0_1|u_logic|Xsx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~73 , soc_inst|m0_1|u_logic|Add3~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~21 , soc_inst|m0_1|u_logic|Add3~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~17 , soc_inst|m0_1|u_logic|Add3~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vezvx4 , soc_inst|m0_1|u_logic|Vezvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Galvx4~0 , soc_inst|m0_1|u_logic|Galvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hak2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~4 , soc_inst|m0_1|u_logic|Pdbwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I443z4 , soc_inst|m0_1|u_logic|I443z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4~feeder , soc_inst|m0_1|u_logic|Gfq2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~2 , soc_inst|m0_1|u_logic|Pdbwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kiq2z4 , soc_inst|m0_1|u_logic|Kiq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~1 , soc_inst|m0_1|u_logic|Pdbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skh3z4 , soc_inst|m0_1|u_logic|Skh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~5 , soc_inst|m0_1|u_logic|Pdbwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~6 , soc_inst|m0_1|u_logic|Pdbwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0v2z4 , soc_inst|m0_1|u_logic|J0v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~0 , soc_inst|m0_1|u_logic|Pdbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4 , soc_inst|m0_1|u_logic|Pdbwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zbbwx4~0 , soc_inst|m0_1|u_logic|Zbbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~0 , soc_inst|m0_1|u_logic|Cfzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cfzvx4~1 , soc_inst|m0_1|u_logic|Cfzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Art2z4 , soc_inst|m0_1|u_logic|Art2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE , soc_inst|m0_1|u_logic|Jw73z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~1 , soc_inst|m0_1|u_logic|Fexwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4 , soc_inst|m0_1|u_logic|Gfq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE , soc_inst|m0_1|u_logic|Yx83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fexwx4~0 , soc_inst|m0_1|u_logic|Fexwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fexwx4 , soc_inst|m0_1|u_logic|Fexwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~0 , soc_inst|m0_1|u_logic|Zudwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zudwx4~1 , soc_inst|m0_1|u_logic|Zudwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F7qwx4 , soc_inst|m0_1|u_logic|F7qwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|A6ewx4~0 , soc_inst|m0_1|u_logic|A6ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~10 , soc_inst|m0_1|u_logic|hwdata_o~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[26]~8 , soc_inst|ram_1|data_to_memory[26]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[2]~7 , soc_inst|ram_1|data_to_memory[2]~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7qwx4~0 , soc_inst|m0_1|u_logic|T7qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~0 , soc_inst|m0_1|u_logic|Jkmwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jkmwx4~1 , soc_inst|m0_1|u_logic|Jkmwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~0 , soc_inst|m0_1|u_logic|Qkmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[10]~12 , soc_inst|interconnect_1|HRDATA[10]~12, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~1 , soc_inst|m0_1|u_logic|Qkmwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~2 , soc_inst|m0_1|u_logic|Qkmwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qkmwx4~3 , soc_inst|m0_1|u_logic|Qkmwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecowx4 , soc_inst|m0_1|u_logic|Ecowx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~0 , soc_inst|m0_1|u_logic|Ajmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~1 , soc_inst|m0_1|u_logic|Ajmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~2 , soc_inst|m0_1|u_logic|Ajmwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yjzvx4~0 , soc_inst|m0_1|u_logic|Yjzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~0 , soc_inst|m0_1|u_logic|Xmdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xmdwx4~1 , soc_inst|m0_1|u_logic|Xmdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mbt2z4 , soc_inst|m0_1|u_logic|Mbt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pxb3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yrqwx4~0 , soc_inst|m0_1|u_logic|Yrqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~0 , soc_inst|m0_1|u_logic|Ojmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~1 , soc_inst|m0_1|u_logic|Ojmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~2 , soc_inst|m0_1|u_logic|Ojmwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yjzvx4~1 , soc_inst|m0_1|u_logic|Yjzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~2 , soc_inst|m0_1|u_logic|Hihvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~1 , soc_inst|m0_1|u_logic|Hihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hihvx4~0 , soc_inst|m0_1|u_logic|Hihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lrx2z4 , soc_inst|m0_1|u_logic|Lrx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nhzvx4 , soc_inst|m0_1|u_logic|Nhzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5lvx4~0 , soc_inst|m0_1|u_logic|R5lvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S8k2z4 , soc_inst|m0_1|u_logic|S8k2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~1 , soc_inst|m0_1|u_logic|Djzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djzvx4 , soc_inst|m0_1|u_logic|Djzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3awx4~0 , soc_inst|m0_1|u_logic|H3awx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rjzvx4~1 , soc_inst|m0_1|u_logic|Rjzvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uhzvx4~1 , soc_inst|m0_1|u_logic|Uhzvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uhzvx4~0 , soc_inst|m0_1|u_logic|Uhzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow23z4 , soc_inst|m0_1|u_logic|Ow23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~3 , soc_inst|m0_1|u_logic|Djzvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y1v2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po63z4 , soc_inst|m0_1|u_logic|Po63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z3k2z4 , soc_inst|m0_1|u_logic|Z3k2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pst2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~6 , soc_inst|m0_1|u_logic|Djzvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~5 , soc_inst|m0_1|u_logic|Djzvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~7 , soc_inst|m0_1|u_logic|Djzvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE , soc_inst|m0_1|u_logic|Fn13z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~0 , soc_inst|m0_1|u_logic|Djzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hn03z4 , soc_inst|m0_1|u_logic|Hn03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE , soc_inst|m0_1|u_logic|D7k2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~4 , soc_inst|m0_1|u_logic|Djzvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~1 , soc_inst|m0_1|u_logic|Djzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4~2 , soc_inst|m0_1|u_logic|Djzvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djzvx4 , soc_inst|m0_1|u_logic|Djzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~10 , soc_inst|m0_1|u_logic|hwdata_o~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[26]~8 , soc_inst|ram_1|data_to_memory[26]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[2]~14 , soc_inst|interconnect_1|HRDATA[2]~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~1 , soc_inst|m0_1|u_logic|Ojmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojmwx4~2 , soc_inst|m0_1|u_logic|Ojmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Et0wx4~0 , soc_inst|m0_1|u_logic|Et0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Et0wx4 , soc_inst|m0_1|u_logic|Et0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~73 , soc_inst|m0_1|u_logic|Add2~73, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~0 , soc_inst|m0_1|u_logic|Cjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~1 , soc_inst|m0_1|u_logic|Cjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bnx2z4 , soc_inst|m0_1|u_logic|Bnx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~69 , soc_inst|m0_1|u_logic|Add2~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~0 , soc_inst|m0_1|u_logic|Ithvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~1 , soc_inst|m0_1|u_logic|Ithvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zjq2z4 , soc_inst|m0_1|u_logic|Zjq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~65 , soc_inst|m0_1|u_logic|Add2~65, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~0 , soc_inst|m0_1|u_logic|Ldhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~1 , soc_inst|m0_1|u_logic|Ldhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B9g3z4 , soc_inst|m0_1|u_logic|B9g3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~61 , soc_inst|m0_1|u_logic|Add2~61, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~0 , soc_inst|m0_1|u_logic|Gehvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~1 , soc_inst|m0_1|u_logic|Gehvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Foe3z4 , soc_inst|m0_1|u_logic|Foe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~0 , soc_inst|m0_1|u_logic|Vihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~1 , soc_inst|m0_1|u_logic|Vihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nox2z4 , soc_inst|m0_1|u_logic|Nox2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C70wx4 , soc_inst|m0_1|u_logic|C70wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q9kvx4~0 , soc_inst|m0_1|u_logic|Q9kvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Zfh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~1 , soc_inst|m0_1|u_logic|Wa0wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dq53z4 , soc_inst|m0_1|u_logic|Dq53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~3 , soc_inst|m0_1|u_logic|Wa0wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T83xx4~0 , soc_inst|m0_1|u_logic|T83xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~2 , soc_inst|m0_1|u_logic|Wa0wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~5 , soc_inst|m0_1|u_logic|Wa0wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E5awx4~0 , soc_inst|m0_1|u_logic|E5awx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E5awx4~1 , soc_inst|m0_1|u_logic|E5awx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J70wx4~1 , soc_inst|m0_1|u_logic|J70wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~1 , soc_inst|m0_1|u_logic|Z80wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z80wx4~0 , soc_inst|m0_1|u_logic|Z80wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J70wx4~2 , soc_inst|m0_1|u_logic|J70wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J70wx4~0 , soc_inst|m0_1|u_logic|J70wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V883z4 , soc_inst|m0_1|u_logic|V883z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mz63z4 , soc_inst|m0_1|u_logic|Mz63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~6 , soc_inst|m0_1|u_logic|Wa0wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE , soc_inst|m0_1|u_logic|M3u2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~7 , soc_inst|m0_1|u_logic|Wa0wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4~8 , soc_inst|m0_1|u_logic|Wa0wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wa0wx4 , soc_inst|m0_1|u_logic|Wa0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[22]~3 , soc_inst|m0_1|u_logic|hwdata_o[22]~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cma3z4~0 , soc_inst|m0_1|u_logic|Cma3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cma3z4 , soc_inst|m0_1|u_logic|Cma3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~69 , soc_inst|m0_1|u_logic|Add0~69, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ogo2z4 , soc_inst|m0_1|u_logic|Ogo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4 , soc_inst|m0_1|u_logic|Ce0wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[21]~15 , soc_inst|m0_1|u_logic|hwdata_o[21]~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ieh3z4~feeder , soc_inst|m0_1|u_logic|Ieh3z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ieh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nnmvx4~0 , soc_inst|m0_1|u_logic|Nnmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~85 , soc_inst|m0_1|u_logic|Add0~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gnmvx4~0 , soc_inst|m0_1|u_logic|Gnmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ddi3z4 , soc_inst|m0_1|u_logic|Ddi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~0 , soc_inst|m0_1|u_logic|Y7iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fed3z4 , soc_inst|m0_1|u_logic|Fed3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE , soc_inst|m0_1|u_logic|G8n2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avowx4~0 , soc_inst|m0_1|u_logic|Avowx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avowx4~1 , soc_inst|m0_1|u_logic|Avowx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Avowx4~2 , soc_inst|m0_1|u_logic|Avowx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~1 , soc_inst|m0_1|u_logic|Y7iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Asdwx4~1 , soc_inst|m0_1|u_logic|Asdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7iwx4~2 , soc_inst|m0_1|u_logic|Y7iwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~1 , soc_inst|m0_1|u_logic|Feqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE , soc_inst|m0_1|u_logic|Nz83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE , soc_inst|m0_1|u_logic|K2k2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Feqwx4~0 , soc_inst|m0_1|u_logic|Feqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Feqwx4 , soc_inst|m0_1|u_logic|Feqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~0 , soc_inst|m0_1|u_logic|Uvdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gvdwx4~0 , soc_inst|m0_1|u_logic|Gvdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~0 , soc_inst|m0_1|u_logic|Mrdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~0 , soc_inst|m0_1|u_logic|Qtdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrdwx4~1 , soc_inst|m0_1|u_logic|Mrdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~0 , soc_inst|m0_1|u_logic|Jymwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~1 , soc_inst|m0_1|u_logic|Jymwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~0 , soc_inst|m0_1|u_logic|Vcuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~1 , soc_inst|m0_1|u_logic|Vcuvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wamvx4~0 , soc_inst|m0_1|u_logic|Wamvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K9ovx4~0 , soc_inst|m0_1|u_logic|K9ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T2ivx4~0 , soc_inst|m0_1|u_logic|T2ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gxk2z4 , soc_inst|m0_1|u_logic|Gxk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahowx4~0 , soc_inst|m0_1|u_logic|Ahowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tgowx4~0 , soc_inst|m0_1|u_logic|Tgowx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~0 , soc_inst|m0_1|u_logic|Tlyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jiowx4~1 , soc_inst|m0_1|u_logic|Jiowx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B28wx4~0 , soc_inst|m0_1|u_logic|B28wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tlyvx4~1 , soc_inst|m0_1|u_logic|Tlyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S08wx4~0 , soc_inst|m0_1|u_logic|S08wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE , soc_inst|m0_1|u_logic|M5f3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~0 , soc_inst|m0_1|u_logic|Hmyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~1 , soc_inst|m0_1|u_logic|Hmyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address[1]~DUPLICATE , soc_inst|switches_1|half_word_address[1]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|read_enable~0 , soc_inst|switches_1|read_enable~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|read_enable , soc_inst|switches_1|read_enable, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[9]~5 , soc_inst|interconnect_1|HRDATA[9]~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~3 , soc_inst|switches_1|half_word_address~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address[0] , soc_inst|switches_1|half_word_address[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[6]~9 , soc_inst|interconnect_1|HRDATA[6]~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[9]~15 , soc_inst|interconnect_1|HRDATA[9]~15, de1_soc_wrapper, 1
+instance = comp, \SW[8]~input , SW[8]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][8] , soc_inst|switches_1|switch_store[0][8], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[8]~28 , soc_inst|ram_1|data_to_memory[8]~28, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[0]~27 , soc_inst|ram_1|data_to_memory[0]~27, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[8]~33 , soc_inst|interconnect_1|HRDATA[8]~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmyvx4~2 , soc_inst|m0_1|u_logic|Hmyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Beowx4~1 , soc_inst|m0_1|u_logic|Beowx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~0 , soc_inst|m0_1|u_logic|Q7ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7ewx4~1 , soc_inst|m0_1|u_logic|Q7ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rkyvx4~0 , soc_inst|m0_1|u_logic|Rkyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K22wx4~1 , soc_inst|m0_1|u_logic|K22wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K22wx4~0 , soc_inst|m0_1|u_logic|K22wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~0 , soc_inst|m0_1|u_logic|Zz1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hq33z4 , soc_inst|m0_1|u_logic|Hq33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ii73z4 , soc_inst|m0_1|u_logic|Ii73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~2 , soc_inst|m0_1|u_logic|P12wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~1 , soc_inst|m0_1|u_logic|P12wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~3 , soc_inst|m0_1|u_logic|P12wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kc03z4 , soc_inst|m0_1|u_logic|Kc03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rvv2z4 , soc_inst|m0_1|u_logic|Rvv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~6 , soc_inst|m0_1|u_logic|P12wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~4 , soc_inst|m0_1|u_logic|P12wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E913z4 , soc_inst|m0_1|u_logic|E913z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~7 , soc_inst|m0_1|u_logic|P12wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Otr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Asr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~5 , soc_inst|m0_1|u_logic|P12wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4~0 , soc_inst|m0_1|u_logic|P12wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P12wx4 , soc_inst|m0_1|u_logic|P12wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[8]~7 , soc_inst|m0_1|u_logic|hwdata_o[8]~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3f3z4 , soc_inst|m0_1|u_logic|W3f3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4~0 , soc_inst|m0_1|u_logic|Nfb3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4 , soc_inst|m0_1|u_logic|Nfb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~9 , soc_inst|m0_1|u_logic|Add0~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hrmvx4~0 , soc_inst|m0_1|u_logic|Hrmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dhb3z4 , soc_inst|m0_1|u_logic|Dhb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~77 , soc_inst|m0_1|u_logic|Add0~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Armvx4~0 , soc_inst|m0_1|u_logic|Armvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5f3z4 , soc_inst|m0_1|u_logic|M5f3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxe3z4 , soc_inst|m0_1|u_logic|Kxe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqmvx4~0 , soc_inst|m0_1|u_logic|Tqmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aze3z4 , soc_inst|m0_1|u_logic|Aze3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][9] , soc_inst|switches_1|switch_store[0][9], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[9]~9 , soc_inst|ram_1|data_to_memory[9]~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[2] , soc_inst|ram_1|byte_select[2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[17]~10 , soc_inst|ram_1|data_to_memory[17]~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[9]~16 , soc_inst|interconnect_1|HRDATA[9]~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~0 , soc_inst|m0_1|u_logic|Khfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~1 , soc_inst|m0_1|u_logic|Khfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~2 , soc_inst|m0_1|u_logic|Khfwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khfwx4~3 , soc_inst|m0_1|u_logic|Khfwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S5b3z4 , soc_inst|m0_1|u_logic|S5b3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~0 , soc_inst|m0_1|u_logic|Q6twx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~1 , soc_inst|m0_1|u_logic|Q6twx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE , soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~0 , soc_inst|m0_1|u_logic|Rhfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~1 , soc_inst|m0_1|u_logic|Rhfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~2 , soc_inst|m0_1|u_logic|Rhfwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4~0 , soc_inst|m0_1|u_logic|Mx0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mx0wx4 , soc_inst|m0_1|u_logic|Mx0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iv0wx4~0 , soc_inst|m0_1|u_logic|Iv0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df83z4~feeder , soc_inst|m0_1|u_logic|Df83z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df83z4 , soc_inst|m0_1|u_logic|Df83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE , soc_inst|m0_1|u_logic|U9u2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U573z4~DUPLICATE , soc_inst|m0_1|u_logic|U573z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~1 , soc_inst|m0_1|u_logic|Xcuwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kwo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4~0 , soc_inst|m0_1|u_logic|Xcuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xcuwx4 , soc_inst|m0_1|u_logic|Xcuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vl92z4~0 , soc_inst|m0_1|u_logic|Vl92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K423z4 , soc_inst|m0_1|u_logic|K423z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~1 , soc_inst|m0_1|u_logic|Yj92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~0 , soc_inst|m0_1|u_logic|Yj92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~2 , soc_inst|m0_1|u_logic|Yj92z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj92z4~3 , soc_inst|m0_1|u_logic|Yj92z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hy0wx4~0 , soc_inst|m0_1|u_logic|Hy0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bv0wx4 , soc_inst|m0_1|u_logic|Bv0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tmjvx4~0 , soc_inst|m0_1|u_logic|Tmjvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H4p2z4 , soc_inst|m0_1|u_logic|H4p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ey03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md92z4~2 , soc_inst|m0_1|u_logic|Md92z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V223z4 , soc_inst|m0_1|u_logic|V223z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md92z4~1 , soc_inst|m0_1|u_logic|Md92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md92z4~0 , soc_inst|m0_1|u_logic|Md92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvn2z4 , soc_inst|m0_1|u_logic|Tvn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jf92z4~0 , soc_inst|m0_1|u_logic|Jf92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md92z4~3 , soc_inst|m0_1|u_logic|Md92z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qs0wx4~0 , soc_inst|m0_1|u_logic|Qs0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~1 , soc_inst|m0_1|u_logic|Mq0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~1 , soc_inst|m0_1|u_logic|Cs0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cs0wx4~0 , soc_inst|m0_1|u_logic|Cs0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~2 , soc_inst|m0_1|u_logic|Mq0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Et0wx4~0 , soc_inst|m0_1|u_logic|Et0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Et0wx4 , soc_inst|m0_1|u_logic|Et0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mq0wx4~0 , soc_inst|m0_1|u_logic|Mq0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8u2z4 , soc_inst|m0_1|u_logic|F8u2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~1 , soc_inst|m0_1|u_logic|H1qwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE , soc_inst|m0_1|u_logic|Fi93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1qwx4~0 , soc_inst|m0_1|u_logic|H1qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H1qwx4 , soc_inst|m0_1|u_logic|H1qwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X0ewx4~0 , soc_inst|m0_1|u_logic|X0ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~0 , soc_inst|m0_1|u_logic|Jtdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jtdwx4~1 , soc_inst|m0_1|u_logic|Jtdwx4~1, de1_soc_wrapper, 1
+instance = comp, \SW[1]~input , SW[1]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][1] , soc_inst|switches_1|switch_store[1][1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mbtwx4~0 , soc_inst|m0_1|u_logic|Mbtwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~0 , soc_inst|m0_1|u_logic|Bgfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bgfwx4~1 , soc_inst|m0_1|u_logic|Bgfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~0 , soc_inst|m0_1|u_logic|Vq1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~1 , soc_inst|m0_1|u_logic|Vq1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4 , soc_inst|m0_1|u_logic|Vq1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d3z4~1 , soc_inst|m0_1|u_logic|G6d3z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d3z4 , soc_inst|m0_1|u_logic|G6d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE , soc_inst|m0_1|u_logic|G1s2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmivx4~0 , soc_inst|m0_1|u_logic|Dmivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dmivx4~1 , soc_inst|m0_1|u_logic|Dmivx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G1s2z4 , soc_inst|m0_1|u_logic|G1s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rpe3z4 , soc_inst|m0_1|u_logic|Rpe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fre3z4 , soc_inst|m0_1|u_logic|Fre3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~2 , soc_inst|m0_1|u_logic|Oubwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hue3z4 , soc_inst|m0_1|u_logic|Hue3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|To33z4 , soc_inst|m0_1|u_logic|To33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf23z4 , soc_inst|m0_1|u_logic|Kf23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~1 , soc_inst|m0_1|u_logic|Oubwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy43z4~DUPLICATE , soc_inst|m0_1|u_logic|Cy43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L763z4 , soc_inst|m0_1|u_logic|L763z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~0 , soc_inst|m0_1|u_logic|Oubwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tse3z4 , soc_inst|m0_1|u_logic|Tse3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwbwx4~0 , soc_inst|m0_1|u_logic|Lwbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oubwx4~3 , soc_inst|m0_1|u_logic|Oubwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Konvx4~0 , soc_inst|m0_1|u_logic|Konvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~113 , soc_inst|m0_1|u_logic|Add5~113, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~0 , soc_inst|m0_1|u_logic|Ox1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ox1wx4~1 , soc_inst|m0_1|u_logic|Ox1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ksbwx4~0 , soc_inst|m0_1|u_logic|Ksbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iu1wx4~0 , soc_inst|m0_1|u_logic|Iu1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I4s2z4~feeder , soc_inst|m0_1|u_logic|I4s2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I4s2z4 , soc_inst|m0_1|u_logic|I4s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~1 , soc_inst|m0_1|u_logic|Vf5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W5s2z4 , soc_inst|m0_1|u_logic|W5s2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~0 , soc_inst|m0_1|u_logic|Vf5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|To33z4~DUPLICATE , soc_inst|m0_1|u_logic|To33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~3 , soc_inst|m0_1|u_logic|Vf5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy43z4 , soc_inst|m0_1|u_logic|Cy43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE , soc_inst|m0_1|u_logic|U2s2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~2 , soc_inst|m0_1|u_logic|Vf5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rpe3z4~DUPLICATE , soc_inst|m0_1|u_logic|Rpe3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hue3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~4 , soc_inst|m0_1|u_logic|Vf5wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~6 , soc_inst|m0_1|u_logic|Vf5wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ug73z4 , soc_inst|m0_1|u_logic|Ug73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~5 , soc_inst|m0_1|u_logic|Vf5wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~7 , soc_inst|m0_1|u_logic|Vf5wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vf5wx4~8 , soc_inst|m0_1|u_logic|Vf5wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzbwx4~1 , soc_inst|m0_1|u_logic|Kzbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~105 , soc_inst|m0_1|u_logic|Add5~105, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~1 , soc_inst|m0_1|u_logic|Do1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~2 , soc_inst|m0_1|u_logic|Do1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do1wx4~0 , soc_inst|m0_1|u_logic|Do1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~2 , soc_inst|m0_1|u_logic|Glnwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wn1wx4~0 , soc_inst|m0_1|u_logic|Wn1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wn1wx4~1 , soc_inst|m0_1|u_logic|Wn1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pn1wx4~0 , soc_inst|m0_1|u_logic|Pn1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arv2z4 , soc_inst|m0_1|u_logic|Arv2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rhu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~7 , soc_inst|m0_1|u_logic|Zh5wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4~feeder , soc_inst|m0_1|u_logic|Dcs2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4 , soc_inst|m0_1|u_logic|Dcs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An83z4 , soc_inst|m0_1|u_logic|An83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gt93z4~DUPLICATE , soc_inst|m0_1|u_logic|Gt93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~6 , soc_inst|m0_1|u_logic|Zh5wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zh5wx4~8 , soc_inst|m0_1|u_logic|Zh5wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~0 , soc_inst|m0_1|u_logic|S3cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S3cwx4~1 , soc_inst|m0_1|u_logic|S3cwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~45 , soc_inst|m0_1|u_logic|Add5~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~13 , soc_inst|m0_1|u_logic|Add5~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~5 , soc_inst|m0_1|u_logic|haddr_o~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[11] , soc_inst|ram_1|saved_word_address[11], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[11]~11 , soc_inst|ram_1|memory.raddr_a[11]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[28]~14 , soc_inst|ram_1|data_to_memory[28]~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[12]~13 , soc_inst|ram_1|data_to_memory[12]~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~0 , soc_inst|m0_1|u_logic|Lsmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X7ewx4~0 , soc_inst|m0_1|u_logic|X7ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~1 , soc_inst|m0_1|u_logic|Lsmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~0 , soc_inst|m0_1|u_logic|Wzpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~1 , soc_inst|m0_1|u_logic|Wzpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~1 , soc_inst|m0_1|u_logic|Rhnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Idk2z4 , soc_inst|m0_1|u_logic|Idk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qh72z4~0 , soc_inst|m0_1|u_logic|Qh72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~0 , soc_inst|m0_1|u_logic|Tf72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ql23z4 , soc_inst|m0_1|u_logic|Ql23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~1 , soc_inst|m0_1|u_logic|Tf72z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~2 , soc_inst|m0_1|u_logic|Tf72z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~3 , soc_inst|m0_1|u_logic|Tf72z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Esnvx4~0 , soc_inst|m0_1|u_logic|Esnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Whh2z4~0 , soc_inst|m0_1|u_logic|Whh2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnawx4~0 , soc_inst|m0_1|u_logic|Mnawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~0 , soc_inst|m0_1|u_logic|C3qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sscvx4 , soc_inst|m0_1|u_logic|Sscvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~85 , soc_inst|m0_1|u_logic|Add5~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~1 , soc_inst|m0_1|u_logic|C3qvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|An73z4 , soc_inst|m0_1|u_logic|An73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~1 , soc_inst|m0_1|u_logic|F8wwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkk2z4 , soc_inst|m0_1|u_logic|Zkk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8wwx4~0 , soc_inst|m0_1|u_logic|F8wwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8wwx4 , soc_inst|m0_1|u_logic|F8wwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yvtwx4~0 , soc_inst|m0_1|u_logic|Yvtwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~0 , soc_inst|m0_1|u_logic|Xs7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uvdwx4~1 , soc_inst|m0_1|u_logic|Uvdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xs7wx4~1 , soc_inst|m0_1|u_logic|Xs7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cuxwx4~0 , soc_inst|m0_1|u_logic|Cuxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hr7wx4~0 , soc_inst|m0_1|u_logic|Hr7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fc7wx4~0 , soc_inst|m0_1|u_logic|Fc7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~1 , soc_inst|m0_1|u_logic|Qtdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tq7wx4~0 , soc_inst|m0_1|u_logic|Tq7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fq7wx4~0 , soc_inst|m0_1|u_logic|Fq7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po7wx4~0 , soc_inst|m0_1|u_logic|Po7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fc7wx4~1 , soc_inst|m0_1|u_logic|Fc7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Et7wx4~0 , soc_inst|m0_1|u_logic|Et7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~0 , soc_inst|m0_1|u_logic|Xowwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf63z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xowwx4~1 , soc_inst|m0_1|u_logic|Xowwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xowwx4 , soc_inst|m0_1|u_logic|Xowwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ksm2z4 , soc_inst|m0_1|u_logic|Ksm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixt2z4 , soc_inst|m0_1|u_logic|Ixt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It63z4 , soc_inst|m0_1|u_logic|It63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R283z4 , soc_inst|m0_1|u_logic|R283z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~1 , soc_inst|m0_1|u_logic|Qowwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wqm2z4 , soc_inst|m0_1|u_logic|Wqm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE , soc_inst|m0_1|u_logic|R6v2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G493z4 , soc_inst|m0_1|u_logic|G493z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ipm2z4 , soc_inst|m0_1|u_logic|Ipm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~0 , soc_inst|m0_1|u_logic|Qowwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qowwx4 , soc_inst|m0_1|u_logic|Qowwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~0 , soc_inst|m0_1|u_logic|Ok7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jl7wx4~0 , soc_inst|m0_1|u_logic|Jl7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1ewx4~1 , soc_inst|m0_1|u_logic|E1ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U18wx4~0 , soc_inst|m0_1|u_logic|U18wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nu7wx4~0 , soc_inst|m0_1|u_logic|Nu7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~2 , soc_inst|m0_1|u_logic|Dtpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~0 , soc_inst|m0_1|u_logic|Dtpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~77 , soc_inst|m0_1|u_logic|Add5~77, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~129 , soc_inst|m0_1|u_logic|Add5~129, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~1 , soc_inst|m0_1|u_logic|Dtpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~0 , soc_inst|m0_1|u_logic|Zei2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~1 , soc_inst|m0_1|u_logic|Zei2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~0 , soc_inst|m0_1|u_logic|Mdzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ehcwx4~0 , soc_inst|m0_1|u_logic|Ehcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ducvx4 , soc_inst|m0_1|u_logic|Ducvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~117 , soc_inst|m0_1|u_logic|Add5~117, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~1 , soc_inst|m0_1|u_logic|Mdzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fdzvx4~0 , soc_inst|m0_1|u_logic|Fdzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T243z4 , soc_inst|m0_1|u_logic|T243z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~2 , soc_inst|m0_1|u_logic|Rtpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yoz2z4 , soc_inst|m0_1|u_logic|Yoz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sl03z4 , soc_inst|m0_1|u_logic|Sl03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Noo2z4 , soc_inst|m0_1|u_logic|Noo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~4 , soc_inst|m0_1|u_logic|Rtpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE , soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kt23z4 , soc_inst|m0_1|u_logic|Kt23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~3 , soc_inst|m0_1|u_logic|Rtpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE , soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~0 , soc_inst|m0_1|u_logic|Rtpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE , soc_inst|m0_1|u_logic|Jw83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~5 , soc_inst|m0_1|u_logic|Rtpvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uyu2z4 , soc_inst|m0_1|u_logic|Uyu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~6 , soc_inst|m0_1|u_logic|Rtpvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ymo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~7 , soc_inst|m0_1|u_logic|Rtpvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cqo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~0 , soc_inst|m0_1|u_logic|Yhnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29] , soc_inst|m0_1|u_logic|haddr_o[29], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yhnvx4~1 , soc_inst|m0_1|u_logic|Yhnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cqo2z4 , soc_inst|m0_1|u_logic|Cqo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~1 , soc_inst|m0_1|u_logic|Rtpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4 , soc_inst|m0_1|u_logic|Rtpvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kih2z4~0 , soc_inst|m0_1|u_logic|Kih2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~9 , soc_inst|m0_1|u_logic|Add5~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y5zvx4~2 , soc_inst|m0_1|u_logic|Y5zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cb3wx4~0 , soc_inst|m0_1|u_logic|Cb3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R38wx4~0 , soc_inst|m0_1|u_logic|R38wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R38wx4~1 , soc_inst|m0_1|u_logic|R38wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qb3wx4 , soc_inst|m0_1|u_logic|Qb3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z9zvx4~0 , soc_inst|m0_1|u_logic|Z9zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gci2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~0 , soc_inst|m0_1|u_logic|O3ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3ivx4~1 , soc_inst|m0_1|u_logic|O3ivx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V1l2z4 , soc_inst|m0_1|u_logic|V1l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~1 , soc_inst|m0_1|u_logic|Nd3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2j2z4 , soc_inst|m0_1|u_logic|X2j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll73z4 , soc_inst|m0_1|u_logic|Ll73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc63z4 , soc_inst|m0_1|u_logic|Cc63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xti2z4 , soc_inst|m0_1|u_logic|Xti2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~5 , soc_inst|m0_1|u_logic|Nd3wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4 , soc_inst|m0_1|u_logic|Lpu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cgt2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~6 , soc_inst|m0_1|u_logic|Nd3wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~7 , soc_inst|m0_1|u_logic|Nd3wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Koj2z4 , soc_inst|m0_1|u_logic|Koj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kt33z4 , soc_inst|m0_1|u_logic|Kt33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4~2 , soc_inst|m0_1|u_logic|Nd3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nd3wx4 , soc_inst|m0_1|u_logic|Nd3wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~0 , soc_inst|m0_1|u_logic|hwdata_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ux4wx4~0 , soc_inst|m0_1|u_logic|Ux4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P2a3z4 , soc_inst|m0_1|u_logic|P2a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~5 , soc_inst|m0_1|u_logic|Vsywx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~4 , soc_inst|m0_1|u_logic|Vsywx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tib3z4 , soc_inst|m0_1|u_logic|Tib3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~2 , soc_inst|m0_1|u_logic|Vsywx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tqs2z4 , soc_inst|m0_1|u_logic|Tqs2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Azs2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~1 , soc_inst|m0_1|u_logic|Vsywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Kkb3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~3 , soc_inst|m0_1|u_logic|Vsywx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjd3z4 , soc_inst|m0_1|u_logic|Bjd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4 , soc_inst|m0_1|u_logic|Vfd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~0 , soc_inst|m0_1|u_logic|Vsywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~6 , soc_inst|m0_1|u_logic|Vsywx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8b2z4 , soc_inst|m0_1|u_logic|N8b2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Inb2z4 , soc_inst|m0_1|u_logic|Inb2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~5 , soc_inst|m0_1|u_logic|Luywx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~4 , soc_inst|m0_1|u_logic|Luywx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~0 , soc_inst|m0_1|u_logic|Luywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~3 , soc_inst|m0_1|u_logic|Luywx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~2 , soc_inst|m0_1|u_logic|Luywx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Pcd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~1 , soc_inst|m0_1|u_logic|Luywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luywx4~6 , soc_inst|m0_1|u_logic|Luywx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~0 , soc_inst|m0_1|u_logic|Ypa2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xtywx4~0 , soc_inst|m0_1|u_logic|Xtywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~1 , soc_inst|m0_1|u_logic|Ypa2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C34wx4 , soc_inst|m0_1|u_logic|C34wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~2 , soc_inst|m0_1|u_logic|Pd4wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~1 , soc_inst|m0_1|u_logic|Q5vvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q7mvx4~0 , soc_inst|m0_1|u_logic|Q7mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE , soc_inst|m0_1|u_logic|U7w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ywi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Owgvx4~0 , soc_inst|m0_1|u_logic|Owgvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ywi2z4 , soc_inst|m0_1|u_logic|Ywi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6mwx4~0 , soc_inst|m0_1|u_logic|Q6mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N4rvx4~0 , soc_inst|m0_1|u_logic|N4rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mbnvx4~0 , soc_inst|m0_1|u_logic|Mbnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gtp2z4 , soc_inst|m0_1|u_logic|Gtp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~0 , soc_inst|m0_1|u_logic|Irqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Irqvx4~1 , soc_inst|m0_1|u_logic|Irqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A1yvx4~0 , soc_inst|m0_1|u_logic|A1yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gokwx4~0 , soc_inst|m0_1|u_logic|Gokwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~0 , soc_inst|m0_1|u_logic|Sbxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~3 , soc_inst|m0_1|u_logic|Sbxvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uup2z4 , soc_inst|m0_1|u_logic|Uup2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L4bwx4~0 , soc_inst|m0_1|u_logic|L4bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I4dwx4~0 , soc_inst|m0_1|u_logic|I4dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~0 , soc_inst|m0_1|u_logic|Z4bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~2 , soc_inst|m0_1|u_logic|Z4bwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4bwx4~0 , soc_inst|m0_1|u_logic|S4bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q3bwx4~0 , soc_inst|m0_1|u_logic|Q3bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G7x2z4 , soc_inst|m0_1|u_logic|G7x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xx93z4 , soc_inst|m0_1|u_logic|Xx93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~0 , soc_inst|m0_1|u_logic|Mekvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~1 , soc_inst|m0_1|u_logic|Mekvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE , soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyz2z4~feeder , soc_inst|m0_1|u_logic|Hyz2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyz2z4 , soc_inst|m0_1|u_logic|Hyz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bv03z4 , soc_inst|m0_1|u_logic|Bv03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~2 , soc_inst|m0_1|u_logic|D7bwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po53z4~DUPLICATE , soc_inst|m0_1|u_logic|Po53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~0 , soc_inst|m0_1|u_logic|D7bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X533z4 , soc_inst|m0_1|u_logic|X533z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow13z4 , soc_inst|m0_1|u_logic|Ow13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~1 , soc_inst|m0_1|u_logic|D7bwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5m2z4~feeder , soc_inst|m0_1|u_logic|J5m2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5m2z4 , soc_inst|m0_1|u_logic|J5m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9bwx4~0 , soc_inst|m0_1|u_logic|A9bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~3 , soc_inst|m0_1|u_logic|D7bwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aqnvx4~0 , soc_inst|m0_1|u_logic|Aqnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Asbvx4 , soc_inst|m0_1|u_logic|Asbvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dfd2z4 , soc_inst|m0_1|u_logic|Dfd2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfd2z4~0 , soc_inst|m0_1|u_logic|Kfd2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q77wx4~0 , soc_inst|m0_1|u_logic|Q77wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qobwx4~0 , soc_inst|m0_1|u_logic|Qobwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R29wx4~0 , soc_inst|m0_1|u_logic|R29wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E1bvx4 , soc_inst|m0_1|u_logic|E1bvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zznvx4~0 , soc_inst|m0_1|u_logic|Zznvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~0 , soc_inst|m0_1|u_logic|Vxnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~0 , soc_inst|m0_1|u_logic|Qynvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~1 , soc_inst|m0_1|u_logic|Qynvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~1 , soc_inst|m0_1|u_logic|Vxnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~134 , soc_inst|m0_1|u_logic|Add5~134, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~29 , soc_inst|m0_1|u_logic|Add5~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~93 , soc_inst|m0_1|u_logic|Add5~93, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~101 , soc_inst|m0_1|u_logic|Add5~101, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~33 , soc_inst|m0_1|u_logic|Add5~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~1 , soc_inst|m0_1|u_logic|Bmhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE , soc_inst|m0_1|u_logic|G7x2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~33 , soc_inst|m0_1|u_logic|Add2~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~37 , soc_inst|m0_1|u_logic|Add2~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cax2z4 , soc_inst|m0_1|u_logic|Cax2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~0 , soc_inst|m0_1|u_logic|Nlhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~1 , soc_inst|m0_1|u_logic|Nlhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bnnvx4 , soc_inst|m0_1|u_logic|Bnnvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~29 , soc_inst|m0_1|u_logic|Add3~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~25 , soc_inst|m0_1|u_logic|Add3~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~33 , soc_inst|m0_1|u_logic|Add3~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~53 , soc_inst|m0_1|u_logic|Add3~53, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~49 , soc_inst|m0_1|u_logic|Add3~49, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~45 , soc_inst|m0_1|u_logic|Add3~45, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~41 , soc_inst|m0_1|u_logic|Add3~41, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~37 , soc_inst|m0_1|u_logic|Add3~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Owovx4 , soc_inst|m0_1|u_logic|Owovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzivx4~0 , soc_inst|m0_1|u_logic|Wzivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wce3z4 , soc_inst|m0_1|u_logic|Wce3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4 , soc_inst|m0_1|u_logic|Pvd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aud3z4~feeder , soc_inst|m0_1|u_logic|Aud3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aud3z4 , soc_inst|m0_1|u_logic|Aud3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~0 , soc_inst|m0_1|u_logic|Cc9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyd3z4 , soc_inst|m0_1|u_logic|Tyd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~1 , soc_inst|m0_1|u_logic|Cc9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9e3z4 , soc_inst|m0_1|u_logic|U9e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ge9wx4~0 , soc_inst|m0_1|u_logic|Ge9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6e3z4 , soc_inst|m0_1|u_logic|Q6e3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F8e3z4~DUPLICATE , soc_inst|m0_1|u_logic|F8e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~2 , soc_inst|m0_1|u_logic|Cc9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~3 , soc_inst|m0_1|u_logic|Cc9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qk1wx4~0 , soc_inst|m0_1|u_logic|Qk1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~1 , soc_inst|m0_1|u_logic|Aj1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~2 , soc_inst|m0_1|u_logic|Aj1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~1 , soc_inst|m0_1|u_logic|Xk1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xk1wx4~0 , soc_inst|m0_1|u_logic|Xk1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~0 , soc_inst|m0_1|u_logic|Ll1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~1 , soc_inst|m0_1|u_logic|Ll1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~0 , soc_inst|m0_1|u_logic|Aj1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tyd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~6 , soc_inst|m0_1|u_logic|Gm1wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE , soc_inst|m0_1|u_logic|U9e3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Lsd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~7 , soc_inst|m0_1|u_logic|Gm1wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~8 , soc_inst|m0_1|u_logic|Gm1wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R99wx4~1 , soc_inst|m0_1|u_logic|R99wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~1 , soc_inst|m0_1|u_logic|Uehvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~0 , soc_inst|m0_1|u_logic|Uehvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~81 , soc_inst|m0_1|u_logic|Add2~81, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~109 , soc_inst|m0_1|u_logic|Add2~109, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~101 , soc_inst|m0_1|u_logic|Add2~101, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~0 , soc_inst|m0_1|u_logic|Xjhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|X61wx4~0 , soc_inst|m0_1|u_logic|X61wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|X61wx4~1 , soc_inst|m0_1|u_logic|X61wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~1 , soc_inst|m0_1|u_logic|Xjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rix2z4 , soc_inst|m0_1|u_logic|Rix2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7q2z4 , soc_inst|m0_1|u_logic|J7q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~4 , soc_inst|m0_1|u_logic|haddr_o~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdjvx4~0 , soc_inst|m0_1|u_logic|Pdjvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE , soc_inst|m0_1|u_logic|J7q2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aw9wx4~0 , soc_inst|m0_1|u_logic|Aw9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE , soc_inst|m0_1|u_logic|Mi23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~1 , soc_inst|m0_1|u_logic|Du9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~0 , soc_inst|m0_1|u_logic|Du9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lph3z4 , soc_inst|m0_1|u_logic|Lph3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arh3z4 , soc_inst|m0_1|u_logic|Arh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~2 , soc_inst|m0_1|u_logic|Du9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~3 , soc_inst|m0_1|u_logic|Du9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P82wx4~0 , soc_inst|m0_1|u_logic|P82wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N72wx4~0 , soc_inst|m0_1|u_logic|N72wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~0 , soc_inst|m0_1|u_logic|Q52wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~1 , soc_inst|m0_1|u_logic|Q52wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Naq2z4 , soc_inst|m0_1|u_logic|Naq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~1 , soc_inst|m0_1|u_logic|Ey9wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~3 , soc_inst|m0_1|u_logic|Ey9wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rdq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rdq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~0 , soc_inst|m0_1|u_logic|Ey9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4~2 , soc_inst|m0_1|u_logic|Ey9wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ey9wx4 , soc_inst|m0_1|u_logic|Ey9wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~0 , soc_inst|m0_1|u_logic|Mydwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C0ewx4~1 , soc_inst|m0_1|u_logic|C0ewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[12]~22 , soc_inst|interconnect_1|HRDATA[12]~22, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~0 , soc_inst|m0_1|u_logic|Xrmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~1 , soc_inst|m0_1|u_logic|Xrmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bsvwx4~0 , soc_inst|m0_1|u_logic|Bsvwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Arzwx4~2 , soc_inst|m0_1|u_logic|Arzwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~0 , soc_inst|m0_1|u_logic|Kkrvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Viuwx4~0 , soc_inst|m0_1|u_logic|Viuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~1 , soc_inst|m0_1|u_logic|Kkrvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~2 , soc_inst|m0_1|u_logic|Kkrvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~2 , soc_inst|m0_1|u_logic|Jjuwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~3 , soc_inst|m0_1|u_logic|Kkrvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~4 , soc_inst|m0_1|u_logic|Kkrvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~5 , soc_inst|m0_1|u_logic|Kkrvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkrvx4~6 , soc_inst|m0_1|u_logic|Kkrvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrmwx4~2 , soc_inst|m0_1|u_logic|Xrmwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~0 , soc_inst|m0_1|u_logic|Uf1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~1 , soc_inst|m0_1|u_logic|Uf1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nf1wx4~1 , soc_inst|m0_1|u_logic|Nf1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~0 , soc_inst|m0_1|u_logic|Qd1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~1 , soc_inst|m0_1|u_logic|Qd1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oir2z4 , soc_inst|m0_1|u_logic|Oir2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dy4xx4~0 , soc_inst|m0_1|u_logic|Dy4xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gcr2z4 , soc_inst|m0_1|u_logic|Gcr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE , soc_inst|m0_1|u_logic|Rr93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~3 , soc_inst|m0_1|u_logic|Ze1wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~1 , soc_inst|m0_1|u_logic|Ze1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~0 , soc_inst|m0_1|u_logic|Ze1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~4 , soc_inst|m0_1|u_logic|Ze1wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M413z4 , soc_inst|m0_1|u_logic|M413z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~2 , soc_inst|m0_1|u_logic|Ze1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~5 , soc_inst|m0_1|u_logic|Ze1wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~0 , soc_inst|m0_1|u_logic|Ejawx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejawx4~1 , soc_inst|m0_1|u_logic|Ejawx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhx2z4 , soc_inst|m0_1|u_logic|Fhx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~0 , soc_inst|m0_1|u_logic|Ekhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~1 , soc_inst|m0_1|u_logic|Ekhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fhx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L4jvx4~0 , soc_inst|m0_1|u_logic|L4jvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dkr2z4 , soc_inst|m0_1|u_logic|Dkr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ra1wx4~0 , soc_inst|m0_1|u_logic|Ra1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~1 , soc_inst|m0_1|u_logic|Ya1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ya1wx4~0 , soc_inst|m0_1|u_logic|Ya1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B91wx4~1 , soc_inst|m0_1|u_logic|B91wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B91wx4~2 , soc_inst|m0_1|u_logic|B91wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B91wx4~0 , soc_inst|m0_1|u_logic|B91wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lqr2z4 , soc_inst|m0_1|u_logic|Lqr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~4 , soc_inst|m0_1|u_logic|Hc1wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~1 , soc_inst|m0_1|u_logic|Hc1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Kzf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~3 , soc_inst|m0_1|u_logic|Hc1wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wor2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Slr2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~0 , soc_inst|m0_1|u_logic|Hc1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O2g3z4 , soc_inst|m0_1|u_logic|O2g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X94xx4~0 , soc_inst|m0_1|u_logic|X94xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE , soc_inst|m0_1|u_logic|Vr43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~2 , soc_inst|m0_1|u_logic|Hc1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4~5 , soc_inst|m0_1|u_logic|Hc1wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hc1wx4 , soc_inst|m0_1|u_logic|Hc1wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[13]~11 , soc_inst|m0_1|u_logic|hwdata_o[13]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4g3z4~0 , soc_inst|m0_1|u_logic|D4g3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE , soc_inst|m0_1|u_logic|D4g3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Geuwx4~0 , soc_inst|m0_1|u_logic|Geuwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[13]~27 , soc_inst|interconnect_1|HRDATA[13]~27, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~0 , soc_inst|m0_1|u_logic|Twmwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~1 , soc_inst|m0_1|u_logic|Twmwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~1 , soc_inst|m0_1|u_logic|Kzqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~2 , soc_inst|m0_1|u_logic|Kzqvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~0 , soc_inst|m0_1|u_logic|Kzqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~2 , soc_inst|m0_1|u_logic|Twmwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~0 , soc_inst|m0_1|u_logic|Mb1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~1 , soc_inst|m0_1|u_logic|Mb1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~1 , soc_inst|m0_1|u_logic|Nehvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~0 , soc_inst|m0_1|u_logic|Nehvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tme3z4 , soc_inst|m0_1|u_logic|Tme3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9jvx4~0 , soc_inst|m0_1|u_logic|A9jvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Slr2z4 , soc_inst|m0_1|u_logic|Slr2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ty92z4~0 , soc_inst|m0_1|u_logic|Ty92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5q2z4 , soc_inst|m0_1|u_logic|U5q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xg33z4 , soc_inst|m0_1|u_logic|Xg33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O723z4 , soc_inst|m0_1|u_logic|O723z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~1 , soc_inst|m0_1|u_logic|Ww92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~0 , soc_inst|m0_1|u_logic|Ww92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X213z4~DUPLICATE , soc_inst|m0_1|u_logic|X213z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D603z4 , soc_inst|m0_1|u_logic|D603z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~2 , soc_inst|m0_1|u_logic|Ww92z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~3 , soc_inst|m0_1|u_logic|Ww92z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C61wx4~0 , soc_inst|m0_1|u_logic|C61wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J61wx4~1 , soc_inst|m0_1|u_logic|J61wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J61wx4~0 , soc_inst|m0_1|u_logic|J61wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O51wx4~0 , soc_inst|m0_1|u_logic|O51wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M41wx4~0 , soc_inst|m0_1|u_logic|M41wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|M41wx4~1 , soc_inst|m0_1|u_logic|M41wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|B1q2z4 , soc_inst|m0_1|u_logic|B1q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~3 , soc_inst|m0_1|u_logic|Hmqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mzp2z4 , soc_inst|m0_1|u_logic|Mzp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~1 , soc_inst|m0_1|u_logic|Hmqwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~0 , soc_inst|m0_1|u_logic|Hmqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4~2 , soc_inst|m0_1|u_logic|Hmqwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmqwx4 , soc_inst|m0_1|u_logic|Hmqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~0 , soc_inst|m0_1|u_logic|Mydwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mydwx4~1 , soc_inst|m0_1|u_logic|Mydwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eudwx4~1 , soc_inst|m0_1|u_logic|Eudwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qapwx4~0 , soc_inst|m0_1|u_logic|Qapwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~0 , soc_inst|m0_1|u_logic|D7iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kss2z4 , soc_inst|m0_1|u_logic|Kss2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~0 , soc_inst|m0_1|u_logic|M1pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~1 , soc_inst|m0_1|u_logic|M1pwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~2 , soc_inst|m0_1|u_logic|M1pwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~3 , soc_inst|m0_1|u_logic|M1pwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1pwx4~4 , soc_inst|m0_1|u_logic|M1pwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7iwx4~1 , soc_inst|m0_1|u_logic|D7iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hmv2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~1 , soc_inst|m0_1|u_logic|S71wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X213z4 , soc_inst|m0_1|u_logic|X213z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~2 , soc_inst|m0_1|u_logic|S71wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|No93z4 , soc_inst|m0_1|u_logic|No93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~3 , soc_inst|m0_1|u_logic|S71wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q2q2z4 , soc_inst|m0_1|u_logic|Q2q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~4 , soc_inst|m0_1|u_logic|S71wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R21xx4~0 , soc_inst|m0_1|u_logic|R21xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~0 , soc_inst|m0_1|u_logic|S71wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4~5 , soc_inst|m0_1|u_logic|S71wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S71wx4 , soc_inst|m0_1|u_logic|S71wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~2 , soc_inst|m0_1|u_logic|hwdata_o~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lhd3z4 , soc_inst|m0_1|u_logic|Lhd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Repwx4~0 , soc_inst|m0_1|u_logic|Repwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Repwx4~1 , soc_inst|m0_1|u_logic|Repwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Repwx4~2 , soc_inst|m0_1|u_logic|Repwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ncpwx4~0 , soc_inst|m0_1|u_logic|Ncpwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[30]~34 , soc_inst|interconnect_1|HRDATA[30]~34, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J7ewx4~0 , soc_inst|m0_1|u_logic|J7ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A9iwx4~0 , soc_inst|m0_1|u_logic|A9iwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|E9zvx4~0 , soc_inst|m0_1|u_logic|E9zvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|E9zvx4~1 , soc_inst|m0_1|u_logic|E9zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jmdwx4~1 , soc_inst|m0_1|u_logic|Jmdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F5ewx4 , soc_inst|m0_1|u_logic|F5ewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~0 , soc_inst|m0_1|u_logic|W3ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~1 , soc_inst|m0_1|u_logic|W3ewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~1 , soc_inst|m0_1|u_logic|Kqdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~2 , soc_inst|m0_1|u_logic|Kqdwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dqdwx4~0 , soc_inst|m0_1|u_logic|Dqdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~9 , soc_inst|m0_1|u_logic|Add2~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~0 , soc_inst|m0_1|u_logic|Thhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~1 , soc_inst|m0_1|u_logic|Thhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~2 , soc_inst|m0_1|u_logic|Thhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jux2z4 , soc_inst|m0_1|u_logic|Jux2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~13 , soc_inst|m0_1|u_logic|Add2~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~1 , soc_inst|m0_1|u_logic|Add2~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~0 , soc_inst|m0_1|u_logic|Tvhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~1 , soc_inst|m0_1|u_logic|Tvhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~2 , soc_inst|m0_1|u_logic|Tvhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Omk2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4 , soc_inst|m0_1|u_logic|Rhi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Velvx4~0 , soc_inst|m0_1|u_logic|Velvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~0 , soc_inst|m0_1|u_logic|Djdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~2 , soc_inst|m0_1|u_logic|Wwdwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~0 , soc_inst|m0_1|u_logic|Z78wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~0 , soc_inst|m0_1|u_logic|Kqdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~1 , soc_inst|m0_1|u_logic|Wwdwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~0 , soc_inst|m0_1|u_logic|Wwdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~1 , soc_inst|m0_1|u_logic|Z78wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~4 , soc_inst|m0_1|u_logic|Z78wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dqdwx4~0 , soc_inst|m0_1|u_logic|Dqdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~2 , soc_inst|m0_1|u_logic|Kqdwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~1 , soc_inst|m0_1|u_logic|Kqdwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kqdwx4~3 , soc_inst|m0_1|u_logic|Kqdwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~2 , soc_inst|m0_1|u_logic|Z78wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~4 , soc_inst|m0_1|u_logic|Z78wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Widwx4~0 , soc_inst|m0_1|u_logic|Widwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~0 , soc_inst|m0_1|u_logic|Djdwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~2 , soc_inst|m0_1|u_logic|Djdwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Widwx4~0 , soc_inst|m0_1|u_logic|Widwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~3 , soc_inst|m0_1|u_logic|Djdwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Djdwx4~1 , soc_inst|m0_1|u_logic|Djdwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~3 , soc_inst|m0_1|u_logic|Z78wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~5 , soc_inst|m0_1|u_logic|Z78wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~0 , soc_inst|m0_1|u_logic|Z78wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~2 , soc_inst|m0_1|u_logic|Wwdwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~1 , soc_inst|m0_1|u_logic|Wwdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wwdwx4~0 , soc_inst|m0_1|u_logic|Wwdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~1 , soc_inst|m0_1|u_logic|Z78wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zetwx4 , soc_inst|m0_1|u_logic|Zetwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdtwx4 , soc_inst|m0_1|u_logic|Qdtwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5ewx4~0 , soc_inst|m0_1|u_logic|M5ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~0 , soc_inst|m0_1|u_logic|W3ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3ewx4~1 , soc_inst|m0_1|u_logic|W3ewx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~6 , soc_inst|m0_1|u_logic|Z78wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~0 , soc_inst|m0_1|u_logic|N88wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~29 , soc_inst|m0_1|u_logic|Add5~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~0 , soc_inst|m0_1|u_logic|Do8wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~1 , soc_inst|m0_1|u_logic|Do8wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~2 , soc_inst|m0_1|u_logic|Do8wx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~3 , soc_inst|m0_1|u_logic|Do8wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~0 , soc_inst|m0_1|u_logic|Do8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~1 , soc_inst|m0_1|u_logic|Do8wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Do8wx4~4 , soc_inst|m0_1|u_logic|Do8wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fyzvx4~0 , soc_inst|m0_1|u_logic|Fyzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~0 , soc_inst|m0_1|u_logic|N88wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O2bwx4~0 , soc_inst|m0_1|u_logic|O2bwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I30wx4~0 , soc_inst|m0_1|u_logic|I30wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~15 , soc_inst|m0_1|u_logic|N88wx4~15, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N88wx4~1 , soc_inst|m0_1|u_logic|N88wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~0 , soc_inst|m0_1|u_logic|L9zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~2 , soc_inst|m0_1|u_logic|L9zvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~1 , soc_inst|m0_1|u_logic|L9zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L9zvx4 , soc_inst|m0_1|u_logic|L9zvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~1 , soc_inst|m0_1|u_logic|Luzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~0 , soc_inst|m0_1|u_logic|Luzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~13 , soc_inst|m0_1|u_logic|N88wx4~13, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~0 , soc_inst|m0_1|u_logic|G5qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nyawx4~0 , soc_inst|m0_1|u_logic|Nyawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~19 , soc_inst|m0_1|u_logic|N88wx4~19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~21 , soc_inst|m0_1|u_logic|N88wx4~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~18 , soc_inst|m0_1|u_logic|N88wx4~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~8 , soc_inst|m0_1|u_logic|N88wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~7 , soc_inst|m0_1|u_logic|N88wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~20 , soc_inst|m0_1|u_logic|N88wx4~20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~9 , soc_inst|m0_1|u_logic|N88wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~10 , soc_inst|m0_1|u_logic|N88wx4~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~3 , soc_inst|m0_1|u_logic|Ee8wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~2 , soc_inst|m0_1|u_logic|Ee8wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G11wx4~1 , soc_inst|m0_1|u_logic|G11wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G11wx4~0 , soc_inst|m0_1|u_logic|G11wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~0 , soc_inst|m0_1|u_logic|Ee8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~2 , soc_inst|m0_1|u_logic|Ee8wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~3 , soc_inst|m0_1|u_logic|Ee8wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ee8wx4~1 , soc_inst|m0_1|u_logic|Ee8wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~5 , soc_inst|m0_1|u_logic|G79wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~6 , soc_inst|m0_1|u_logic|G79wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~4 , soc_inst|m0_1|u_logic|G79wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~7 , soc_inst|m0_1|u_logic|G79wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~10 , soc_inst|m0_1|u_logic|N88wx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~2 , soc_inst|m0_1|u_logic|G79wx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G79wx4~0 , soc_inst|m0_1|u_logic|G79wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~1 , soc_inst|m0_1|u_logic|G79wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|C8zvx4~0 , soc_inst|m0_1|u_logic|C8zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~2 , soc_inst|m0_1|u_logic|G79wx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Dv8wx4~0 , soc_inst|m0_1|u_logic|Dv8wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G79wx4~1 , soc_inst|m0_1|u_logic|G79wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G79wx4~3 , soc_inst|m0_1|u_logic|G79wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~6 , soc_inst|m0_1|u_logic|G79wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~5 , soc_inst|m0_1|u_logic|G79wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~4 , soc_inst|m0_1|u_logic|G79wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G79wx4~7 , soc_inst|m0_1|u_logic|G79wx4~7, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N88wx4~11 , soc_inst|m0_1|u_logic|N88wx4~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~18 , soc_inst|m0_1|u_logic|N88wx4~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~21 , soc_inst|m0_1|u_logic|N88wx4~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~19 , soc_inst|m0_1|u_logic|N88wx4~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~8 , soc_inst|m0_1|u_logic|N88wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~7 , soc_inst|m0_1|u_logic|N88wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~20 , soc_inst|m0_1|u_logic|N88wx4~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~9 , soc_inst|m0_1|u_logic|N88wx4~9, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N88wx4~12 , soc_inst|m0_1|u_logic|N88wx4~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~0 , soc_inst|m0_1|u_logic|L9zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~2 , soc_inst|m0_1|u_logic|L9zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4~1 , soc_inst|m0_1|u_logic|L9zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L9zvx4 , soc_inst|m0_1|u_logic|L9zvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~1 , soc_inst|m0_1|u_logic|Luzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Luzvx4~0 , soc_inst|m0_1|u_logic|Luzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~13 , soc_inst|m0_1|u_logic|N88wx4~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nyawx4~0 , soc_inst|m0_1|u_logic|Nyawx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N88wx4~17 , soc_inst|m0_1|u_logic|N88wx4~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~2 , soc_inst|m0_1|u_logic|N88wx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rjzvx4~0 , soc_inst|m0_1|u_logic|Rjzvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Nf1wx4~0 , soc_inst|m0_1|u_logic|Nf1wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N88wx4~3 , soc_inst|m0_1|u_logic|N88wx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N88wx4~4 , soc_inst|m0_1|u_logic|N88wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N88wx4~2 , soc_inst|m0_1|u_logic|N88wx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N88wx4~5 , soc_inst|m0_1|u_logic|N88wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wsawx4~0 , soc_inst|m0_1|u_logic|Wsawx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N88wx4~6 , soc_inst|m0_1|u_logic|N88wx4~6, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N88wx4~14 , soc_inst|m0_1|u_logic|N88wx4~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6cwx4~0 , soc_inst|m0_1|u_logic|D6cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Va3wx4~0 , soc_inst|m0_1|u_logic|Va3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Idk2z4 , soc_inst|m0_1|u_logic|Idk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D47wx4~0 , soc_inst|m0_1|u_logic|D47wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zxpvx4~0 , soc_inst|m0_1|u_logic|Zxpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S17wx4~0 , soc_inst|m0_1|u_logic|S17wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~0 , soc_inst|m0_1|u_logic|Rhnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhnvx4~1 , soc_inst|m0_1|u_logic|Rhnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Idk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnawx4~0 , soc_inst|m0_1|u_logic|Mnawx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~0 , soc_inst|m0_1|u_logic|C3qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N88wx4~15 , soc_inst|m0_1|u_logic|N88wx4~15, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|N88wx4~16 , soc_inst|m0_1|u_logic|N88wx4~16, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z78wx4~7 , soc_inst|m0_1|u_logic|Z78wx4~7, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S9zvx4~0 , soc_inst|m0_1|u_logic|S9zvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Igi2z4 , soc_inst|m0_1|u_logic|Igi2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Velvx4~1 , soc_inst|m0_1|u_logic|Velvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4 , soc_inst|m0_1|u_logic|Rhi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rhi2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~4 , soc_inst|m0_1|u_logic|O7zvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vuo2z4 , soc_inst|m0_1|u_logic|Vuo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mi13z4 , soc_inst|m0_1|u_logic|Mi13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~1 , soc_inst|m0_1|u_logic|O7zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na53z4~DUPLICATE , soc_inst|m0_1|u_logic|Na53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5i3z4~feeder , soc_inst|m0_1|u_logic|J5i3z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE , soc_inst|m0_1|u_logic|J5i3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6i3z4 , soc_inst|m0_1|u_logic|Y6i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~5 , soc_inst|m0_1|u_logic|O7zvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E143z4 , soc_inst|m0_1|u_logic|E143z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rro2z4 , soc_inst|m0_1|u_logic|Rro2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~2 , soc_inst|m0_1|u_logic|O7zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr23z4~feeder , soc_inst|m0_1|u_logic|Vr23z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr23z4 , soc_inst|m0_1|u_logic|Vr23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na53z4 , soc_inst|m0_1|u_logic|Na53z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~3 , soc_inst|m0_1|u_logic|O7zvx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~6 , soc_inst|m0_1|u_logic|O7zvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wnt2z4 , soc_inst|m0_1|u_logic|Wnt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fxu2z4 , soc_inst|m0_1|u_logic|Fxu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O7zvx4~0 , soc_inst|m0_1|u_logic|O7zvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|O7zvx4 , soc_inst|m0_1|u_logic|O7zvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dih2z4~0 , soc_inst|m0_1|u_logic|Dih2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~0 , soc_inst|m0_1|u_logic|F6zvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|F6zvx4~1 , soc_inst|m0_1|u_logic|F6zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fxu2z4 , soc_inst|m0_1|u_logic|Fxu2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gto2z4 , soc_inst|m0_1|u_logic|Gto2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~3 , soc_inst|m0_1|u_logic|Saqwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uu83z4 , soc_inst|m0_1|u_logic|Uu83z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rro2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rro2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~1 , soc_inst|m0_1|u_logic|Saqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~2 , soc_inst|m0_1|u_logic|Saqwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wj63z4 , soc_inst|m0_1|u_logic|Wj63z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vuo2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~0 , soc_inst|m0_1|u_logic|Saqwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ft73z4 , soc_inst|m0_1|u_logic|Ft73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Saqwx4~2 , soc_inst|m0_1|u_logic|Saqwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Saqwx4 , soc_inst|m0_1|u_logic|Saqwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kepwx4~0 , soc_inst|m0_1|u_logic|Kepwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Beowx4~1 , soc_inst|m0_1|u_logic|Beowx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X7ewx4~0 , soc_inst|m0_1|u_logic|X7ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsmwx4~1 , soc_inst|m0_1|u_logic|Lsmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~0 , soc_inst|m0_1|u_logic|Uf1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uf1wx4~1 , soc_inst|m0_1|u_logic|Uf1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekhvx4~1 , soc_inst|m0_1|u_logic|Ekhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fhx2z4 , soc_inst|m0_1|u_logic|Fhx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L4jvx4~0 , soc_inst|m0_1|u_logic|L4jvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dkr2z4 , soc_inst|m0_1|u_logic|Dkr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~7 , soc_inst|m0_1|u_logic|Ze1wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4~8 , soc_inst|m0_1|u_logic|Ze1wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ze1wx4 , soc_inst|m0_1|u_logic|Ze1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nf1wx4~1 , soc_inst|m0_1|u_logic|Nf1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~0 , soc_inst|m0_1|u_logic|Qd1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qd1wx4~1 , soc_inst|m0_1|u_logic|Qd1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lpv2z4 , soc_inst|m0_1|u_logic|Lpv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vdr2z4 , soc_inst|m0_1|u_logic|Vdr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~3 , soc_inst|m0_1|u_logic|H2wwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~2 , soc_inst|m0_1|u_logic|H2wwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gcr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~1 , soc_inst|m0_1|u_logic|H2wwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfr2z4 , soc_inst|m0_1|u_logic|Kfr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc73z4~DUPLICATE , soc_inst|m0_1|u_logic|Cc73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4~0 , soc_inst|m0_1|u_logic|H2wwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H2wwx4 , soc_inst|m0_1|u_logic|H2wwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~0 , soc_inst|m0_1|u_logic|Zndwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~0 , soc_inst|m0_1|u_logic|Nodwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zndwx4~1 , soc_inst|m0_1|u_logic|Zndwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cymwx4~3 , soc_inst|m0_1|u_logic|Cymwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ieh3z4 , soc_inst|m0_1|u_logic|Ieh3z4, de1_soc_wrapper, 1
-instance = comp, \SW[5]~input , SW[5]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][5] , soc_inst|switches_1|switch_store[1][5], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[21]~24 , soc_inst|ram_1|data_to_memory[21]~24, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[5]~23 , soc_inst|ram_1|data_to_memory[5]~23, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[21]~29 , soc_inst|interconnect_1|HRDATA[21]~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~0 , soc_inst|m0_1|u_logic|Jymwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jymwx4~1 , soc_inst|m0_1|u_logic|Jymwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fwtwx4~0 , soc_inst|m0_1|u_logic|Fwtwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gftwx4~1 , soc_inst|m0_1|u_logic|Gftwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mouwx4~0 , soc_inst|m0_1|u_logic|Mouwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5ewx4 , soc_inst|m0_1|u_logic|F5ewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~1 , soc_inst|m0_1|u_logic|Hxmwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qe0wx4~0 , soc_inst|m0_1|u_logic|Qe0wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qe0wx4 , soc_inst|m0_1|u_logic|Qe0wx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Je0wx4~0 , soc_inst|m0_1|u_logic|Je0wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~1 , soc_inst|m0_1|u_logic|Mc0wx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mc0wx4~0 , soc_inst|m0_1|u_logic|Mc0wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE , soc_inst|m0_1|u_logic|Bf93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~1 , soc_inst|m0_1|u_logic|D9uwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5u2z4 , soc_inst|m0_1|u_logic|B5u2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~2 , soc_inst|m0_1|u_logic|D9uwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kev2z4 , soc_inst|m0_1|u_logic|Kev2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~3 , soc_inst|m0_1|u_logic|D9uwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B173z4~DUPLICATE , soc_inst|m0_1|u_logic|B173z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4~0 , soc_inst|m0_1|u_logic|D9uwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9uwx4 , soc_inst|m0_1|u_logic|D9uwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~0 , soc_inst|m0_1|u_logic|Qtdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtdwx4~1 , soc_inst|m0_1|u_logic|Qtdwx4~1, de1_soc_wrapper, 1
-instance = comp, \SW[3]~input , SW[3]~input, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][3] , soc_inst|switches_1|switch_store[1][3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[19]~25 , soc_inst|interconnect_1|HRDATA[19]~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bf93z4 , soc_inst|m0_1|u_logic|Bf93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~6 , soc_inst|m0_1|u_logic|Ce0wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kev2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE , soc_inst|m0_1|u_logic|B5u2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~7 , soc_inst|m0_1|u_logic|Ce0wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4~8 , soc_inst|m0_1|u_logic|Ce0wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ce0wx4 , soc_inst|m0_1|u_logic|Ce0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[21]~15 , soc_inst|m0_1|u_logic|hwdata_o[21]~15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ieh3z4 , soc_inst|m0_1|u_logic|Ieh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ogo2z4 , soc_inst|m0_1|u_logic|Ogo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~69 , soc_inst|m0_1|u_logic|Add0~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nnmvx4~0 , soc_inst|m0_1|u_logic|Nnmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ogo2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~85 , soc_inst|m0_1|u_logic|Add0~85, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gnmvx4~0 , soc_inst|m0_1|u_logic|Gnmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ddi3z4 , soc_inst|m0_1|u_logic|Ddi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jca3z4~0 , soc_inst|m0_1|u_logic|Jca3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jca3z4 , soc_inst|m0_1|u_logic|Jca3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add0~5 , soc_inst|m0_1|u_logic|Add0~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zmmvx4~0 , soc_inst|m0_1|u_logic|Zmmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uei3z4 , soc_inst|m0_1|u_logic|Uei3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~0 , soc_inst|m0_1|u_logic|Oytvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~1 , soc_inst|m0_1|u_logic|Oytvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~3 , soc_inst|m0_1|u_logic|Oytvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~2 , soc_inst|m0_1|u_logic|Oytvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~4 , soc_inst|m0_1|u_logic|Oytvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oytvx4 , soc_inst|m0_1|u_logic|Oytvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R3uvx4~0 , soc_inst|m0_1|u_logic|R3uvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbmvx4~0 , soc_inst|m0_1|u_logic|Rbmvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V3o2z4 , soc_inst|m0_1|u_logic|V3o2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~0 , soc_inst|m0_1|u_logic|X2rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~0 , soc_inst|m0_1|u_logic|Pjyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I21wx4~0 , soc_inst|m0_1|u_logic|I21wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I21wx4 , soc_inst|m0_1|u_logic|I21wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~97 , soc_inst|m0_1|u_logic|Add2~97, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~93 , soc_inst|m0_1|u_logic|Add2~93, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~0 , soc_inst|m0_1|u_logic|Qjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tjlwx4~0 , soc_inst|m0_1|u_logic|Tjlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qjhvx4~1 , soc_inst|m0_1|u_logic|Qjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dkx2z4 , soc_inst|m0_1|u_logic|Dkx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~89 , soc_inst|m0_1|u_logic|Add2~89, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~0 , soc_inst|m0_1|u_logic|Jjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jjhvx4~1 , soc_inst|m0_1|u_logic|Jjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Plx2z4 , soc_inst|m0_1|u_logic|Plx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~73 , soc_inst|m0_1|u_logic|Add2~73, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Bnx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~0 , soc_inst|m0_1|u_logic|Cjhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cjhvx4~1 , soc_inst|m0_1|u_logic|Cjhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bnx2z4 , soc_inst|m0_1|u_logic|Bnx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fq0wx4 , soc_inst|m0_1|u_logic|Fq0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Irjvx4~0 , soc_inst|m0_1|u_logic|Irjvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W5p2z4 , soc_inst|m0_1|u_logic|W5p2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M0i3z4 , soc_inst|m0_1|u_logic|M0i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X892z4~0 , soc_inst|m0_1|u_logic|X892z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pa33z4 , soc_inst|m0_1|u_logic|Pa33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G123z4~DUPLICATE , soc_inst|m0_1|u_logic|G123z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~1 , soc_inst|m0_1|u_logic|A792z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvh3z4 , soc_inst|m0_1|u_logic|Tvh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ixh3z4 , soc_inst|m0_1|u_logic|Ixh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~2 , soc_inst|m0_1|u_logic|A792z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yj43z4 , soc_inst|m0_1|u_logic|Yj43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht53z4 , soc_inst|m0_1|u_logic|Ht53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~0 , soc_inst|m0_1|u_logic|A792z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A792z4~3 , soc_inst|m0_1|u_logic|A792z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wo0wx4~0 , soc_inst|m0_1|u_logic|Wo0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Un0wx4~0 , soc_inst|m0_1|u_logic|Un0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~1 , soc_inst|m0_1|u_logic|Xl0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xl0wx4~0 , soc_inst|m0_1|u_logic|Xl0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecp2z4~feeder , soc_inst|m0_1|u_logic|Ecp2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ecp2z4 , soc_inst|m0_1|u_logic|Ecp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G123z4 , soc_inst|m0_1|u_logic|G123z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~0 , soc_inst|m0_1|u_logic|Nn0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE , soc_inst|m0_1|u_logic|M0i3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nr2xx4~0 , soc_inst|m0_1|u_logic|Nr2xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE , soc_inst|m0_1|u_logic|Ht53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~3 , soc_inst|m0_1|u_logic|Nn0wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE , soc_inst|m0_1|u_logic|L7p2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pap2z4 , soc_inst|m0_1|u_logic|Pap2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~1 , soc_inst|m0_1|u_logic|Nn0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~4 , soc_inst|m0_1|u_logic|Nn0wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~2 , soc_inst|m0_1|u_logic|Nn0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4~5 , soc_inst|m0_1|u_logic|Nn0wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nn0wx4 , soc_inst|m0_1|u_logic|Nn0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[19]~14 , soc_inst|m0_1|u_logic|hwdata_o[19]~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8m2z4 , soc_inst|m0_1|u_logic|L8m2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~0 , soc_inst|m0_1|u_logic|Rilwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~1 , soc_inst|m0_1|u_logic|Rilwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rilwx4~2 , soc_inst|m0_1|u_logic|Rilwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~0 , soc_inst|m0_1|u_logic|Ll1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ll1wx4~1 , soc_inst|m0_1|u_logic|Ll1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj1wx4~0 , soc_inst|m0_1|u_logic|Aj1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ibe3z4 , soc_inst|m0_1|u_logic|Ibe3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uo5xx4~0 , soc_inst|m0_1|u_logic|Uo5xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE , soc_inst|m0_1|u_logic|B5e3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~4 , soc_inst|m0_1|u_logic|Gm1wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8e3z4 , soc_inst|m0_1|u_logic|F8e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6e3z4 , soc_inst|m0_1|u_logic|Q6e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~2 , soc_inst|m0_1|u_logic|Gm1wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~3 , soc_inst|m0_1|u_logic|Gm1wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~1 , soc_inst|m0_1|u_logic|Gm1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Exd3z4 , soc_inst|m0_1|u_logic|Exd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~0 , soc_inst|m0_1|u_logic|Gm1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4~5 , soc_inst|m0_1|u_logic|Gm1wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gm1wx4 , soc_inst|m0_1|u_logic|Gm1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[11]~8 , soc_inst|m0_1|u_logic|hwdata_o[11]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bge3z4 , soc_inst|m0_1|u_logic|Bge3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fqmvx4~0 , soc_inst|m0_1|u_logic|Fqmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|She3z4 , soc_inst|m0_1|u_logic|She3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~1 , soc_inst|m0_1|u_logic|Oytvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add0~5 , soc_inst|m0_1|u_logic|Add0~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zmmvx4~0 , soc_inst|m0_1|u_logic|Zmmvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uei3z4 , soc_inst|m0_1|u_logic|Uei3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~0 , soc_inst|m0_1|u_logic|Oytvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~3 , soc_inst|m0_1|u_logic|Oytvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xeo2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~2 , soc_inst|m0_1|u_logic|Oytvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4~4 , soc_inst|m0_1|u_logic|Oytvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oytvx4 , soc_inst|m0_1|u_logic|Oytvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F2o2z4 , soc_inst|m0_1|u_logic|F2o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mxtvx4 , soc_inst|m0_1|u_logic|Mxtvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[18]~13 , soc_inst|m0_1|u_logic|hwdata_o[18]~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xyn2z4 , soc_inst|m0_1|u_logic|Xyn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iomvx4~0 , soc_inst|m0_1|u_logic|Iomvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O0o2z4 , soc_inst|m0_1|u_logic|O0o2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][2] , soc_inst|switches_1|switch_store[1][2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[18]~6 , soc_inst|ram_1|data_to_memory[18]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[10]~5 , soc_inst|ram_1|data_to_memory[10]~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[18]~13 , soc_inst|interconnect_1|HRDATA[18]~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~0 , soc_inst|m0_1|u_logic|Ajmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~1 , soc_inst|m0_1|u_logic|Ajmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajmwx4~2 , soc_inst|m0_1|u_logic|Ajmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wn1wx4~0 , soc_inst|m0_1|u_logic|Wn1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wn1wx4~1 , soc_inst|m0_1|u_logic|Wn1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~45 , soc_inst|m0_1|u_logic|Add2~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~41 , soc_inst|m0_1|u_logic|Add2~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~1 , soc_inst|m0_1|u_logic|Lkhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~0 , soc_inst|m0_1|u_logic|Lkhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4 , soc_inst|m0_1|u_logic|Ufx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~1 , soc_inst|m0_1|u_logic|Uehvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uehvx4~0 , soc_inst|m0_1|u_logic|Uehvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Gmd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzivx4~0 , soc_inst|m0_1|u_logic|Wzivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wce3z4 , soc_inst|m0_1|u_logic|Wce3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ibe3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9e3z4 , soc_inst|m0_1|u_logic|U9e3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ge9wx4~0 , soc_inst|m0_1|u_logic|Ge9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Exd3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~1 , soc_inst|m0_1|u_logic|Cc9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pvd3z4 , soc_inst|m0_1|u_logic|Pvd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aud3z4 , soc_inst|m0_1|u_logic|Aud3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~0 , soc_inst|m0_1|u_logic|Cc9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~2 , soc_inst|m0_1|u_logic|Cc9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc9wx4~3 , soc_inst|m0_1|u_logic|Cc9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qk1wx4~0 , soc_inst|m0_1|u_logic|Qk1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owovx4 , soc_inst|m0_1|u_logic|Owovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[9] , soc_inst|ram_1|saved_word_address[9], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[9]~9 , soc_inst|ram_1|memory.raddr_a[9]~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[23]~3 , soc_inst|ram_1|data_to_memory[23]~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[7]~11 , soc_inst|interconnect_1|HRDATA[7]~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~0 , soc_inst|m0_1|u_logic|Wywwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~1 , soc_inst|m0_1|u_logic|Wywwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~2 , soc_inst|m0_1|u_logic|Wywwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~3 , soc_inst|m0_1|u_logic|Wywwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G9lwx4~0 , soc_inst|m0_1|u_logic|G9lwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~0 , soc_inst|m0_1|u_logic|Oa3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oa3wx4~1 , soc_inst|m0_1|u_logic|Oa3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4~0 , soc_inst|m0_1|u_logic|Bo0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bo0wx4 , soc_inst|m0_1|u_logic|Bo0wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~69 , soc_inst|m0_1|u_logic|Add2~69, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~0 , soc_inst|m0_1|u_logic|Ithvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ithvx4~1 , soc_inst|m0_1|u_logic|Ithvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zjq2z4 , soc_inst|m0_1|u_logic|Zjq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~65 , soc_inst|m0_1|u_logic|Add2~65, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~0 , soc_inst|m0_1|u_logic|Ldhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldhvx4~1 , soc_inst|m0_1|u_logic|Ldhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B9g3z4 , soc_inst|m0_1|u_logic|B9g3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~61 , soc_inst|m0_1|u_logic|Add2~61, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Foe3z4 , soc_inst|m0_1|u_logic|Foe3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~0 , soc_inst|m0_1|u_logic|Gehvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gehvx4~1 , soc_inst|m0_1|u_logic|Gehvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE , soc_inst|m0_1|u_logic|Foe3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~105 , soc_inst|m0_1|u_logic|Add2~105, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~0 , soc_inst|m0_1|u_logic|Vihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vihvx4~1 , soc_inst|m0_1|u_logic|Vihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nox2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~0 , soc_inst|m0_1|u_logic|Zdhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zdhvx4~1 , soc_inst|m0_1|u_logic|Zdhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kaf3z4 , soc_inst|m0_1|u_logic|Kaf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y92wx4 , soc_inst|m0_1|u_logic|Y92wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8ivx4~0 , soc_inst|m0_1|u_logic|K8ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B6j2z4 , soc_inst|m0_1|u_logic|B6j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bf9wx4~0 , soc_inst|m0_1|u_logic|Bf9wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgf3z4 , soc_inst|m0_1|u_logic|Pgf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eif3z4 , soc_inst|m0_1|u_logic|Eif3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~0 , soc_inst|m0_1|u_logic|Bc82z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4j2z4 , soc_inst|m0_1|u_logic|M4j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uuf3z4 , soc_inst|m0_1|u_logic|Uuf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qrf3z4 , soc_inst|m0_1|u_logic|Qrf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ftf3z4 , soc_inst|m0_1|u_logic|Ftf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~2 , soc_inst|m0_1|u_logic|Bc82z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tjf3z4 , soc_inst|m0_1|u_logic|Tjf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ilf3z4 , soc_inst|m0_1|u_logic|Ilf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~1 , soc_inst|m0_1|u_logic|Bc82z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~3 , soc_inst|m0_1|u_logic|Bc82z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bc82z4~4 , soc_inst|m0_1|u_logic|Bc82z4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ntnvx4~0 , soc_inst|m0_1|u_logic|Ntnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6cwx4~0 , soc_inst|m0_1|u_logic|D6cwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Va3wx4~0 , soc_inst|m0_1|u_logic|Va3wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fa2wx4~0 , soc_inst|m0_1|u_logic|Fa2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ldf3z4 , soc_inst|m0_1|u_logic|Ldf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I852z4~0 , soc_inst|m0_1|u_logic|I852z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE , soc_inst|m0_1|u_logic|Eif3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~2 , soc_inst|m0_1|u_logic|R6cwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fpi2z4 , soc_inst|m0_1|u_logic|Fpi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilf3z4 , soc_inst|m0_1|u_logic|Ilf3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~0 , soc_inst|m0_1|u_logic|R6cwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~1 , soc_inst|m0_1|u_logic|R6cwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE , soc_inst|m0_1|u_logic|Aff3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE , soc_inst|m0_1|u_logic|M4j2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|P852z4~0 , soc_inst|m0_1|u_logic|P852z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wbf3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|W852z4~0 , soc_inst|m0_1|u_logic|W852z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S652z4~0 , soc_inst|m0_1|u_logic|S652z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|G752z4~0 , soc_inst|m0_1|u_logic|G752z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~4 , soc_inst|m0_1|u_logic|R6cwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M352z4~0 , soc_inst|m0_1|u_logic|M352z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ldf3z4 , soc_inst|m0_1|u_logic|Ldf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I852z4~0 , soc_inst|m0_1|u_logic|I852z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|T352z4~0 , soc_inst|m0_1|u_logic|T352z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|C552z4~0 , soc_inst|m0_1|u_logic|C552z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qrf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Qrf3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M352z4~0 , soc_inst|m0_1|u_logic|M352z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tjf3z4~DUPLICATE , soc_inst|m0_1|u_logic|Tjf3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|O452z4~0 , soc_inst|m0_1|u_logic|O452z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~3 , soc_inst|m0_1|u_logic|R6cwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mof3z4 , soc_inst|m0_1|u_logic|Mof3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~1 , soc_inst|m0_1|u_logic|R6cwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fpi2z4 , soc_inst|m0_1|u_logic|Fpi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~0 , soc_inst|m0_1|u_logic|R6cwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|R6cwx4~5 , soc_inst|m0_1|u_logic|R6cwx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|ram_1|data_to_memory[23]~0 , soc_inst|ram_1|data_to_memory[23]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|V4ovx4~0 , soc_inst|m0_1|u_logic|V4ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jca3z4~0 , soc_inst|m0_1|u_logic|Jca3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jca3z4 , soc_inst|m0_1|u_logic|Jca3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4 , soc_inst|m0_1|u_logic|Vfd3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4l2z4 , soc_inst|m0_1|u_logic|Z4l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE , soc_inst|m0_1|u_logic|Vfd3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~0 , soc_inst|m0_1|u_logic|R6xwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~1 , soc_inst|m0_1|u_logic|R6xwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|R6xwx4~2 , soc_inst|m0_1|u_logic|R6xwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Walwx4~0 , soc_inst|m0_1|u_logic|Walwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Walwx4~1 , soc_inst|m0_1|u_logic|Walwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3w2z4 , soc_inst|m0_1|u_logic|C3w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~0 , soc_inst|m0_1|u_logic|Omyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Omyvx4~1 , soc_inst|m0_1|u_logic|Omyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L6nwx4 , soc_inst|m0_1|u_logic|L6nwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wjyvx4~0 , soc_inst|m0_1|u_logic|Wjyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~1 , soc_inst|m0_1|u_logic|Amyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~0 , soc_inst|m0_1|u_logic|Amyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amyvx4~2 , soc_inst|m0_1|u_logic|Amyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ykyvx4~0 , soc_inst|m0_1|u_logic|Ykyvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|W4zvx4~0 , soc_inst|m0_1|u_logic|W4zvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|W4zvx4~1 , soc_inst|m0_1|u_logic|W4zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4~0 , soc_inst|m0_1|u_logic|Z4qvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z4qvx4 , soc_inst|m0_1|u_logic|Z4qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eol2z4 , soc_inst|m0_1|u_logic|Eol2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf63z4 , soc_inst|m0_1|u_logic|Gf63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~0 , soc_inst|m0_1|u_logic|Bywwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gjt2z4 , soc_inst|m0_1|u_logic|Gjt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po73z4~DUPLICATE , soc_inst|m0_1|u_logic|Po73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~2 , soc_inst|m0_1|u_logic|Bywwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~1 , soc_inst|m0_1|u_logic|Bywwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4~3 , soc_inst|m0_1|u_logic|Bywwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bywwx4 , soc_inst|m0_1|u_logic|Bywwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~0 , soc_inst|m0_1|u_logic|Fkdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nodwx4~1 , soc_inst|m0_1|u_logic|Nodwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Qfc3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~0 , soc_inst|m0_1|u_logic|Ihlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~1 , soc_inst|m0_1|u_logic|Ihlwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~2 , soc_inst|m0_1|u_logic|Ihlwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ihlwx4~3 , soc_inst|m0_1|u_logic|Ihlwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~0 , soc_inst|m0_1|u_logic|Qfzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qfzvx4~1 , soc_inst|m0_1|u_logic|Qfzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~2 , soc_inst|m0_1|u_logic|Aihvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xsx2z4 , soc_inst|m0_1|u_logic|Xsx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~1 , soc_inst|m0_1|u_logic|Aihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aihvx4~0 , soc_inst|m0_1|u_logic|Aihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xsx2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vezvx4 , soc_inst|m0_1|u_logic|Vezvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Galvx4~0 , soc_inst|m0_1|u_logic|Galvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hak2z4 , soc_inst|m0_1|u_logic|Hak2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4 , soc_inst|m0_1|u_logic|Wnh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rd53z4 , soc_inst|m0_1|u_logic|Rd53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I443z4~DUPLICATE , soc_inst|m0_1|u_logic|I443z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~0 , soc_inst|m0_1|u_logic|Fm72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hmh3z4 , soc_inst|m0_1|u_logic|Hmh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Co72z4~0 , soc_inst|m0_1|u_logic|Co72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu23z4 , soc_inst|m0_1|u_logic|Zu23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql13z4 , soc_inst|m0_1|u_logic|Ql13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~1 , soc_inst|m0_1|u_logic|Fm72z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Djh3z4 , soc_inst|m0_1|u_logic|Djh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skh3z4 , soc_inst|m0_1|u_logic|Skh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~2 , soc_inst|m0_1|u_logic|Fm72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fm72z4~3 , soc_inst|m0_1|u_logic|Fm72z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lsnvx4~0 , soc_inst|m0_1|u_logic|Lsnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hrcvx4 , soc_inst|m0_1|u_logic|Hrcvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~85 , soc_inst|m0_1|u_logic|Add5~85, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C3qvx4~1 , soc_inst|m0_1|u_logic|C3qvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu33z4 , soc_inst|m0_1|u_logic|Zu33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Kjk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~2 , soc_inst|m0_1|u_logic|Izpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc13z4 , soc_inst|m0_1|u_logic|Hc13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vhk2z4 , soc_inst|m0_1|u_logic|Vhk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~0 , soc_inst|m0_1|u_logic|Izpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~1 , soc_inst|m0_1|u_logic|Izpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I453z4~feeder , soc_inst|m0_1|u_logic|I453z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I453z4~DUPLICATE , soc_inst|m0_1|u_logic|I453z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql23z4 , soc_inst|m0_1|u_logic|Ql23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~3 , soc_inst|m0_1|u_logic|Izpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nf03z4 , soc_inst|m0_1|u_logic|Nf03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4 , soc_inst|m0_1|u_logic|Tiz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aez2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~4 , soc_inst|m0_1|u_logic|Izpvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rek2z4 , soc_inst|m0_1|u_logic|Rek2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zkk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~5 , soc_inst|m0_1|u_logic|Izpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~6 , soc_inst|m0_1|u_logic|Izpvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4~7 , soc_inst|m0_1|u_logic|Izpvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Izpvx4 , soc_inst|m0_1|u_logic|Izpvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Whh2z4~0 , soc_inst|m0_1|u_logic|Whh2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mdzvx4~1 , soc_inst|m0_1|u_logic|Mdzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fdzvx4~0 , soc_inst|m0_1|u_logic|Fdzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kt23z4 , soc_inst|m0_1|u_logic|Kt23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE , soc_inst|m0_1|u_logic|Cc53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~3 , soc_inst|m0_1|u_logic|Rtpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~4 , soc_inst|m0_1|u_logic|Rtpvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE , soc_inst|m0_1|u_logic|Bk13z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~0 , soc_inst|m0_1|u_logic|Rtpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~1 , soc_inst|m0_1|u_logic|Rtpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ymo2z4 , soc_inst|m0_1|u_logic|Ymo2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~5 , soc_inst|m0_1|u_logic|Rtpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uyu2z4 , soc_inst|m0_1|u_logic|Uyu2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~6 , soc_inst|m0_1|u_logic|Rtpvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~7 , soc_inst|m0_1|u_logic|Rtpvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fio2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fio2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4~2 , soc_inst|m0_1|u_logic|Rtpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtpvx4 , soc_inst|m0_1|u_logic|Rtpvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Et7wx4~0 , soc_inst|m0_1|u_logic|Et7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~0 , soc_inst|m0_1|u_logic|Mj7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ksm2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It63z4 , soc_inst|m0_1|u_logic|It63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~1 , soc_inst|m0_1|u_logic|Qowwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qowwx4~0 , soc_inst|m0_1|u_logic|Qowwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qowwx4 , soc_inst|m0_1|u_logic|Qowwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~0 , soc_inst|m0_1|u_logic|Ok7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jl7wx4~0 , soc_inst|m0_1|u_logic|Jl7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mj7wx4~1 , soc_inst|m0_1|u_logic|Mj7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nu7wx4~0 , soc_inst|m0_1|u_logic|Nu7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~2 , soc_inst|m0_1|u_logic|Dtpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~0 , soc_inst|m0_1|u_logic|Dtpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~129 , soc_inst|m0_1|u_logic|Add5~129, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dtpvx4~1 , soc_inst|m0_1|u_logic|Dtpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~0 , soc_inst|m0_1|u_logic|Zei2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~1 , soc_inst|m0_1|u_logic|Zei2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zei2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~0 , soc_inst|m0_1|u_logic|Qynvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qynvx4~1 , soc_inst|m0_1|u_logic|Qynvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vxnvx4~1 , soc_inst|m0_1|u_logic|Vxnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add5~134 , soc_inst|m0_1|u_logic|Add5~134, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X553z4~DUPLICATE , soc_inst|m0_1|u_logic|X553z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wd13z4~DUPLICATE , soc_inst|m0_1|u_logic|Wd13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE , soc_inst|m0_1|u_logic|Fn23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE , soc_inst|m0_1|u_logic|Ch03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~2 , soc_inst|m0_1|u_logic|Ht5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~1 , soc_inst|m0_1|u_logic|Ht5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~3 , soc_inst|m0_1|u_logic|Ht5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ht5wx4~0 , soc_inst|m0_1|u_logic|Ht5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[7] , soc_inst|m0_1|u_logic|hwdata_o[7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[7]~4 , soc_inst|ram_1|data_to_memory[7]~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[23]~3 , soc_inst|ram_1|data_to_memory[23]~3, de1_soc_wrapper, 1
+instance = comp, \SW[7]~input , SW[7]~input, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][7] , soc_inst|switches_1|switch_store[0][7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[7]~11 , soc_inst|interconnect_1|HRDATA[7]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bmb3z4 , soc_inst|m0_1|u_logic|Bmb3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~0 , soc_inst|m0_1|u_logic|Wywwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~1 , soc_inst|m0_1|u_logic|Wywwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nfb3z4~DUPLICATE , soc_inst|m0_1|u_logic|Nfb3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~2 , soc_inst|m0_1|u_logic|Wywwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wywwx4~3 , soc_inst|m0_1|u_logic|Wywwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G9lwx4~0 , soc_inst|m0_1|u_logic|G9lwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~0 , soc_inst|m0_1|u_logic|R5zvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~1 , soc_inst|m0_1|u_logic|R5zvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J3qvx4~0 , soc_inst|m0_1|u_logic|J3qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgt2z4 , soc_inst|m0_1|u_logic|Cgt2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~2 , soc_inst|m0_1|u_logic|N3ywx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~0 , soc_inst|m0_1|u_logic|N3ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~1 , soc_inst|m0_1|u_logic|N3ywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lpu2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~3 , soc_inst|m0_1|u_logic|N3ywx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N3ywx4 , soc_inst|m0_1|u_logic|N3ywx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U2ewx4~0 , soc_inst|m0_1|u_logic|U2ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M7qwx4~0 , soc_inst|m0_1|u_logic|M7qwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~0 , soc_inst|m0_1|u_logic|Pgfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pgfwx4~1 , soc_inst|m0_1|u_logic|Pgfwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~0 , soc_inst|m0_1|u_logic|Ppzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~1 , soc_inst|m0_1|u_logic|Ppzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~2 , soc_inst|m0_1|u_logic|Oihvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~1 , soc_inst|m0_1|u_logic|Oihvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~0 , soc_inst|m0_1|u_logic|Oihvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rnovx4 , soc_inst|m0_1|u_logic|Rnovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~5 , soc_inst|m0_1|u_logic|Nlovx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~6 , soc_inst|m0_1|u_logic|Nlovx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~8 , soc_inst|m0_1|u_logic|Nlovx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~0 , soc_inst|m0_1|u_logic|Nlovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~3 , soc_inst|m0_1|u_logic|Nlovx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~3 , soc_inst|m0_1|u_logic|haddr_o~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hsize_o~0 , soc_inst|m0_1|u_logic|hsize_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~1 , soc_inst|m0_1|u_logic|Nlovx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~2 , soc_inst|m0_1|u_logic|Nlovx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~4 , soc_inst|m0_1|u_logic|Nlovx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~7 , soc_inst|m0_1|u_logic|Nlovx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Elnvx4~0 , soc_inst|m0_1|u_logic|Elnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J6i2z4 , soc_inst|m0_1|u_logic|J6i2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N1uvx4 , soc_inst|m0_1|u_logic|N1uvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~0 , soc_inst|m0_1|u_logic|S9ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~1 , soc_inst|m0_1|u_logic|S9ywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~2 , soc_inst|m0_1|u_logic|S9ywx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Otxwx4~0 , soc_inst|m0_1|u_logic|Otxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[31]~1 , soc_inst|ram_1|data_to_memory[31]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[15]~2 , soc_inst|ram_1|data_to_memory[15]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[31]~2 , soc_inst|interconnect_1|HRDATA[31]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Palwx4~0 , soc_inst|m0_1|u_logic|Palwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U72wx4~0 , soc_inst|m0_1|u_logic|U72wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~1 , soc_inst|m0_1|u_logic|Sdhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~2 , soc_inst|m0_1|u_logic|Sdhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sdhvx4~0 , soc_inst|m0_1|u_logic|Sdhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jwf3z4 , soc_inst|m0_1|u_logic|Jwf3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zcivx4~0 , soc_inst|m0_1|u_logic|Zcivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y8q2z4 , soc_inst|m0_1|u_logic|Y8q2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cao2z4 , soc_inst|m0_1|u_logic|Cao2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hs92z4~0 , soc_inst|m0_1|u_logic|Hs92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O403z4 , soc_inst|m0_1|u_logic|O403z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~2 , soc_inst|m0_1|u_logic|Kq92z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE , soc_inst|m0_1|u_logic|Ay53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~0 , soc_inst|m0_1|u_logic|Kq92z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~1 , soc_inst|m0_1|u_logic|Kq92z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kq92z4~3 , soc_inst|m0_1|u_logic|Kq92z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U11wx4~0 , soc_inst|m0_1|u_logic|U11wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~1 , soc_inst|m0_1|u_logic|Qz0wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~2 , soc_inst|m0_1|u_logic|Qz0wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz0wx4~0 , soc_inst|m0_1|u_logic|Qz0wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4~feeder , soc_inst|m0_1|u_logic|Rbo2z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbo2z4 , soc_inst|m0_1|u_logic|Rbo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE , soc_inst|m0_1|u_logic|Sg83z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z52xx4~0 , soc_inst|m0_1|u_logic|Z52xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J773z4~DUPLICATE , soc_inst|m0_1|u_logic|J773z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~7 , soc_inst|m0_1|u_logic|W21wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4~8 , soc_inst|m0_1|u_logic|W21wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W21wx4 , soc_inst|m0_1|u_logic|W21wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O24wx4~0 , soc_inst|m0_1|u_logic|O24wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gdo2z4 , soc_inst|m0_1|u_logic|Gdo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~1 , soc_inst|m0_1|u_logic|Pjyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pjyvx4~2 , soc_inst|m0_1|u_logic|Pjyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3pvx4~0 , soc_inst|m0_1|u_logic|O3pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3pvx4~1 , soc_inst|m0_1|u_logic|O3pvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3pvx4 , soc_inst|m0_1|u_logic|O3pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~0 , soc_inst|m0_1|u_logic|Ojnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~0 , soc_inst|m0_1|u_logic|F9pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~1 , soc_inst|m0_1|u_logic|F9pvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~1 , soc_inst|m0_1|u_logic|Ojnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~2 , soc_inst|m0_1|u_logic|Ojnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z7i2z4 , soc_inst|m0_1|u_logic|Z7i2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iwp2z4 , soc_inst|m0_1|u_logic|Iwp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~1 , soc_inst|m0_1|u_logic|D4mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~0 , soc_inst|m0_1|u_logic|D4mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4mvx4~2 , soc_inst|m0_1|u_logic|D4mvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Iwp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy33z4 , soc_inst|m0_1|u_logic|Cy33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L753z4 , soc_inst|m0_1|u_logic|L753z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~0 , soc_inst|m0_1|u_logic|Punvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf13z4 , soc_inst|m0_1|u_logic|Kf13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|To23z4~DUPLICATE , soc_inst|m0_1|u_logic|To23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~1 , soc_inst|m0_1|u_logic|Punvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wlz2z4 , soc_inst|m0_1|u_logic|Wlz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qi03z4 , soc_inst|m0_1|u_logic|Qi03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~2 , soc_inst|m0_1|u_logic|Punvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~3 , soc_inst|m0_1|u_logic|Punvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Punvx4~4 , soc_inst|m0_1|u_logic|Punvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lz8wx4~0 , soc_inst|m0_1|u_logic|Lz8wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~1 , soc_inst|m0_1|u_logic|Qppvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~1 , soc_inst|m0_1|u_logic|C2rvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~0 , soc_inst|m0_1|u_logic|C2rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~2 , soc_inst|m0_1|u_logic|C2rvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qppvx4~2 , soc_inst|m0_1|u_logic|Qppvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Txj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dtj2z4 , soc_inst|m0_1|u_logic|Dtj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~0 , soc_inst|m0_1|u_logic|V7ywx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Dq73z4 , soc_inst|m0_1|u_logic|Dq73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ruj2z4 , soc_inst|m0_1|u_logic|Ruj2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~1 , soc_inst|m0_1|u_logic|V7ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE , soc_inst|m0_1|u_logic|Duu2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fwj2z4 , soc_inst|m0_1|u_logic|Fwj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V7ywx4~0 , soc_inst|m0_1|u_logic|V7ywx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|V7ywx4 , soc_inst|m0_1|u_logic|V7ywx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|A7ywx4~0 , soc_inst|m0_1|u_logic|A7ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zetwx4 , soc_inst|m0_1|u_logic|Zetwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mouwx4~0 , soc_inst|m0_1|u_logic|Mouwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~12 , soc_inst|m0_1|u_logic|hwdata_o~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[29]~22 , soc_inst|ram_1|data_to_memory[29]~22, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[13]~21 , soc_inst|ram_1|data_to_memory[13]~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~0 , soc_inst|m0_1|u_logic|Hxmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxmwx4~1 , soc_inst|m0_1|u_logic|Hxmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~0 , soc_inst|m0_1|u_logic|Mb1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mb1wx4~1 , soc_inst|m0_1|u_logic|Mb1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~1 , soc_inst|m0_1|u_logic|Nehvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nehvx4~0 , soc_inst|m0_1|u_logic|Nehvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tme3z4 , soc_inst|m0_1|u_logic|Tme3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9jvx4~0 , soc_inst|m0_1|u_logic|A9jvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Slr2z4 , soc_inst|m0_1|u_logic|Slr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~0 , soc_inst|m0_1|u_logic|Ww92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5q2z4 , soc_inst|m0_1|u_logic|U5q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE , soc_inst|m0_1|u_logic|Xg33z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O723z4 , soc_inst|m0_1|u_logic|O723z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~1 , soc_inst|m0_1|u_logic|Ww92z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ty92z4~0 , soc_inst|m0_1|u_logic|Ty92z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X213z4~DUPLICATE , soc_inst|m0_1|u_logic|X213z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~2 , soc_inst|m0_1|u_logic|Ww92z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ww92z4~3 , soc_inst|m0_1|u_logic|Ww92z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C61wx4~0 , soc_inst|m0_1|u_logic|C61wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~0 , soc_inst|m0_1|u_logic|Xjhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xjhvx4~1 , soc_inst|m0_1|u_logic|Xjhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rix2z4 , soc_inst|m0_1|u_logic|Rix2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o~4 , soc_inst|m0_1|u_logic|haddr_o~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdjvx4~0 , soc_inst|m0_1|u_logic|Pdjvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J7q2z4 , soc_inst|m0_1|u_logic|J7q2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~1 , soc_inst|m0_1|u_logic|Du9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E153z4 , soc_inst|m0_1|u_logic|E153z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~0 , soc_inst|m0_1|u_logic|Du9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Euh3z4 , soc_inst|m0_1|u_logic|Euh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aw9wx4~0 , soc_inst|m0_1|u_logic|Aw9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Arh3z4 , soc_inst|m0_1|u_logic|Arh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lph3z4 , soc_inst|m0_1|u_logic|Lph3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~2 , soc_inst|m0_1|u_logic|Du9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Du9wx4~3 , soc_inst|m0_1|u_logic|Du9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P82wx4~0 , soc_inst|m0_1|u_logic|P82wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N72wx4~0 , soc_inst|m0_1|u_logic|N72wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~0 , soc_inst|m0_1|u_logic|Q52wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q52wx4~1 , soc_inst|m0_1|u_logic|Q52wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Na63z4 , soc_inst|m0_1|u_logic|Na63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE , soc_inst|m0_1|u_logic|E0d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~1 , soc_inst|m0_1|u_logic|Z62wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E153z4~DUPLICATE , soc_inst|m0_1|u_logic|E153z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~2 , soc_inst|m0_1|u_logic|Z62wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T04xx4~0 , soc_inst|m0_1|u_logic|T04xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~3 , soc_inst|m0_1|u_logic|Z62wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~4 , soc_inst|m0_1|u_logic|Z62wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~0 , soc_inst|m0_1|u_logic|Z62wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4~5 , soc_inst|m0_1|u_logic|Z62wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z62wx4 , soc_inst|m0_1|u_logic|Z62wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[15]~1 , soc_inst|m0_1|u_logic|hwdata_o[15]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Usl2z4 , soc_inst|m0_1|u_logic|Usl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7d3z4 , soc_inst|m0_1|u_logic|T7d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mzxwx4~0 , soc_inst|m0_1|u_logic|Mzxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vy7wx4~0 , soc_inst|m0_1|u_logic|Vy7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwdwx4~0 , soc_inst|m0_1|u_logic|Pwdwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~1 , soc_inst|m0_1|u_logic|Glnwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ufx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~1 , soc_inst|m0_1|u_logic|Lkhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lkhvx4~0 , soc_inst|m0_1|u_logic|Lkhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ufx2z4 , soc_inst|m0_1|u_logic|Ufx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hvivx4~0 , soc_inst|m0_1|u_logic|Hvivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rkd3z4 , soc_inst|m0_1|u_logic|Rkd3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE , soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~0 , soc_inst|m0_1|u_logic|Uga2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rds2z4 , soc_inst|m0_1|u_logic|Rds2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~1 , soc_inst|m0_1|u_logic|Uga2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B613z4 , soc_inst|m0_1|u_logic|B613z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~2 , soc_inst|m0_1|u_logic|Uga2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dcs2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ria2z4~0 , soc_inst|m0_1|u_logic|Ria2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~3 , soc_inst|m0_1|u_logic|Uga2z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hxnvx4~0 , soc_inst|m0_1|u_logic|Hxnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jxovx4 , soc_inst|m0_1|u_logic|Jxovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[8] , soc_inst|ram_1|saved_word_address[8], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[8]~8 , soc_inst|ram_1|memory.raddr_a[8]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[20]~16 , soc_inst|ram_1|data_to_memory[20]~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[4]~23 , soc_inst|interconnect_1|HRDATA[4]~23, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W5rvx4 , soc_inst|m0_1|u_logic|W5rvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fbnvx4~0 , soc_inst|m0_1|u_logic|Fbnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Owq2z4 , soc_inst|m0_1|u_logic|Owq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~0 , soc_inst|m0_1|u_logic|Leuvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~1 , soc_inst|m0_1|u_logic|Leuvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pamvx4~0 , soc_inst|m0_1|u_logic|Pamvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~0 , soc_inst|m0_1|u_logic|Bjkvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~1 , soc_inst|m0_1|u_logic|Bjkvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ovc3z4 , soc_inst|m0_1|u_logic|Ovc3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~0 , soc_inst|m0_1|u_logic|Qnkvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~1 , soc_inst|m0_1|u_logic|Qnkvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Efp2z4 , soc_inst|m0_1|u_logic|Efp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wmp2z4 , soc_inst|m0_1|u_logic|Wmp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE , soc_inst|m0_1|u_logic|Mt13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V233z4 , soc_inst|m0_1|u_logic|V233z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~1 , soc_inst|m0_1|u_logic|Qw62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zr03z4 , soc_inst|m0_1|u_logic|Zr03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fvz2z4 , soc_inst|m0_1|u_logic|Fvz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~2 , soc_inst|m0_1|u_logic|Qw62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec43z4~feeder , soc_inst|m0_1|u_logic|Ec43z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec43z4 , soc_inst|m0_1|u_logic|Ec43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nl53z4 , soc_inst|m0_1|u_logic|Nl53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~0 , soc_inst|m0_1|u_logic|Qw62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ilp2z4 , soc_inst|m0_1|u_logic|Ilp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny62z4~0 , soc_inst|m0_1|u_logic|Ny62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~3 , soc_inst|m0_1|u_logic|Qw62z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mpnvx4~0 , soc_inst|m0_1|u_logic|Mpnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I7r2z4 , soc_inst|m0_1|u_logic|I7r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z472z4~0 , soc_inst|m0_1|u_logic|Z472z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nt03z4 , soc_inst|m0_1|u_logic|Nt03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Twz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~2 , soc_inst|m0_1|u_logic|C372z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J433z4~DUPLICATE , soc_inst|m0_1|u_logic|J433z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av13z4 , soc_inst|m0_1|u_logic|Av13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~1 , soc_inst|m0_1|u_logic|C372z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bn53z4~feeder , soc_inst|m0_1|u_logic|Bn53z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bn53z4 , soc_inst|m0_1|u_logic|Bn53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sd43z4 , soc_inst|m0_1|u_logic|Sd43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~0 , soc_inst|m0_1|u_logic|C372z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C372z4~3 , soc_inst|m0_1|u_logic|C372z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tpnvx4~0 , soc_inst|m0_1|u_logic|Tpnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~97 , soc_inst|m0_1|u_logic|Add5~97, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add5~109 , soc_inst|m0_1|u_logic|Add5~109, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~0 , soc_inst|m0_1|u_logic|Zuzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~1 , soc_inst|m0_1|u_logic|Zuzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~57 , soc_inst|m0_1|u_logic|Add2~57, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~0 , soc_inst|m0_1|u_logic|Glhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~1 , soc_inst|m0_1|u_logic|Glhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nbx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~53 , soc_inst|m0_1|u_logic|Add2~53, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~49 , soc_inst|m0_1|u_logic|Add2~49, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~0 , soc_inst|m0_1|u_logic|Bfhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~1 , soc_inst|m0_1|u_logic|Bfhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V4d3z4 , soc_inst|m0_1|u_logic|V4d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xxovx4 , soc_inst|m0_1|u_logic|Xxovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[7] , soc_inst|ram_1|saved_word_address[7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[7]~7 , soc_inst|ram_1|memory.raddr_a[7]~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[21]~24 , soc_inst|ram_1|data_to_memory[21]~24, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[21]~29 , soc_inst|interconnect_1|HRDATA[21]~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~0 , soc_inst|m0_1|u_logic|Q6nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hphvx4~0 , soc_inst|m0_1|u_logic|Hphvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qlw2z4 , soc_inst|m0_1|u_logic|Qlw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~1 , soc_inst|m0_1|u_logic|Q6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~2 , soc_inst|m0_1|u_logic|Q6nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Herwx4~0 , soc_inst|m0_1|u_logic|Herwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Herwx4~1 , soc_inst|m0_1|u_logic|Herwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mvc2z4 , soc_inst|m0_1|u_logic|Mvc2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kuc2z4~1 , soc_inst|m0_1|u_logic|Kuc2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eb72z4~0 , soc_inst|m0_1|u_logic|Eb72z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~0 , soc_inst|m0_1|u_logic|H972z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE , soc_inst|m0_1|u_logic|Sa13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE , soc_inst|m0_1|u_logic|Bk23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~1 , soc_inst|m0_1|u_logic|H972z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~2 , soc_inst|m0_1|u_logic|H972z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H972z4~3 , soc_inst|m0_1|u_logic|H972z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A67wx4~0 , soc_inst|m0_1|u_logic|A67wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~13 , soc_inst|m0_1|u_logic|Add3~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~9 , soc_inst|m0_1|u_logic|Add3~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~5 , soc_inst|m0_1|u_logic|Add3~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add3~1 , soc_inst|m0_1|u_logic|Add3~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o~0 , soc_inst|m0_1|u_logic|haddr_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~2 , soc_inst|m0_1|u_logic|S6ovx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~3 , soc_inst|m0_1|u_logic|S6ovx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nmnvx4~0 , soc_inst|m0_1|u_logic|Nmnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mjl2z4 , soc_inst|m0_1|u_logic|Mjl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B7owx4 , soc_inst|m0_1|u_logic|B7owx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9lwx4~0 , soc_inst|m0_1|u_logic|U9lwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D4a3z4 , soc_inst|m0_1|u_logic|D4a3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~0 , soc_inst|m0_1|u_logic|Wjxwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lul2z4 , soc_inst|m0_1|u_logic|Lul2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Jsc3z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~1 , soc_inst|m0_1|u_logic|Wjxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~0 , soc_inst|m0_1|u_logic|Wjxwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~2 , soc_inst|m0_1|u_logic|Wjxwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~3 , soc_inst|m0_1|u_logic|Wjxwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wjxwx4~4 , soc_inst|m0_1|u_logic|Wjxwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[15]~2 , soc_inst|ram_1|data_to_memory[15]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[31]~1 , soc_inst|ram_1|data_to_memory[31]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[15]~4 , soc_inst|interconnect_1|HRDATA[15]~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9lwx4~0 , soc_inst|m0_1|u_logic|U9lwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N4rvx4~0 , soc_inst|m0_1|u_logic|N4rvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U9lwx4~1 , soc_inst|m0_1|u_logic|U9lwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~0 , soc_inst|m0_1|u_logic|R5zvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~1 , soc_inst|m0_1|u_logic|R5zvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J3qvx4~0 , soc_inst|m0_1|u_logic|J3qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgt2z4 , soc_inst|m0_1|u_logic|Cgt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~2 , soc_inst|m0_1|u_logic|N3ywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~1 , soc_inst|m0_1|u_logic|N3ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~0 , soc_inst|m0_1|u_logic|N3ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4~3 , soc_inst|m0_1|u_logic|N3ywx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N3ywx4 , soc_inst|m0_1|u_logic|N3ywx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U2ewx4~0 , soc_inst|m0_1|u_logic|U2ewx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ttwwx4~0 , soc_inst|m0_1|u_logic|Ttwwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|B8nwx4~0 , soc_inst|m0_1|u_logic|B8nwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|B8nwx4~1 , soc_inst|m0_1|u_logic|B8nwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~0 , soc_inst|m0_1|u_logic|Vq1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4~1 , soc_inst|m0_1|u_logic|Vq1wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vq1wx4 , soc_inst|m0_1|u_logic|Vq1wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V4d3z4 , soc_inst|m0_1|u_logic|V4d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~0 , soc_inst|m0_1|u_logic|Bfhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfhvx4~1 , soc_inst|m0_1|u_logic|Bfhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE , soc_inst|m0_1|u_logic|V4d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmivx4~0 , soc_inst|m0_1|u_logic|Dmivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dmivx4~1 , soc_inst|m0_1|u_logic|Dmivx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G1s2z4 , soc_inst|m0_1|u_logic|G1s2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ql33z4 , soc_inst|m0_1|u_logic|Ql33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE , soc_inst|m0_1|u_logic|Hc23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~1 , soc_inst|m0_1|u_logic|Uga2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ria2z4~0 , soc_inst|m0_1|u_logic|Ria2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE , soc_inst|m0_1|u_logic|Zu43z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~0 , soc_inst|m0_1|u_logic|Uga2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B613z4 , soc_inst|m0_1|u_logic|B613z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H903z4~DUPLICATE , soc_inst|m0_1|u_logic|H903z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~2 , soc_inst|m0_1|u_logic|Uga2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uga2z4~3 , soc_inst|m0_1|u_logic|Uga2z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hxnvx4~0 , soc_inst|m0_1|u_logic|Hxnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jxovx4 , soc_inst|m0_1|u_logic|Jxovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qknvx4~0 , soc_inst|m0_1|u_logic|Qknvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ffs2z4 , soc_inst|m0_1|u_logic|Ffs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B2uvx4~0 , soc_inst|m0_1|u_logic|B2uvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wfuwx4 , soc_inst|m0_1|u_logic|Wfuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Geuwx4~0 , soc_inst|m0_1|u_logic|Geuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[13]~27 , soc_inst|interconnect_1|HRDATA[13]~27, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~0 , soc_inst|m0_1|u_logic|Twmwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~1 , soc_inst|m0_1|u_logic|Twmwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twmwx4~2 , soc_inst|m0_1|u_logic|Twmwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~0 , soc_inst|m0_1|u_logic|Vcuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcuvx4~1 , soc_inst|m0_1|u_logic|Vcuvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wamvx4~0 , soc_inst|m0_1|u_logic|Wamvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tdp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~1 , soc_inst|m0_1|u_logic|Skhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~0 , soc_inst|m0_1|u_logic|Skhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jex2z4 , soc_inst|m0_1|u_logic|Jex2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z6ovx4 , soc_inst|m0_1|u_logic|Z6ovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[6] , soc_inst|ram_1|saved_word_address[6], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[6]~6 , soc_inst|ram_1|memory.raddr_a[6]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[19]~18 , soc_inst|ram_1|data_to_memory[19]~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[19]~25 , soc_inst|interconnect_1|HRDATA[19]~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vphvx4~0 , soc_inst|m0_1|u_logic|Vphvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oiw2z4 , soc_inst|m0_1|u_logic|Oiw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~1 , soc_inst|m0_1|u_logic|E7nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~0 , soc_inst|m0_1|u_logic|E7nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~2 , soc_inst|m0_1|u_logic|E7nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jky2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H0dwx4~0 , soc_inst|m0_1|u_logic|H0dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O0dwx4~0 , soc_inst|m0_1|u_logic|O0dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xucwx4~0 , soc_inst|m0_1|u_logic|Xucwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J00wx4~0 , soc_inst|m0_1|u_logic|J00wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~1 , soc_inst|m0_1|u_logic|Gpcwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~0 , soc_inst|m0_1|u_logic|Gpcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J00wx4~1 , soc_inst|m0_1|u_logic|J00wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C00wx4~0 , soc_inst|m0_1|u_logic|C00wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5r2z4 , soc_inst|m0_1|u_logic|U5r2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Twz2z4 , soc_inst|m0_1|u_logic|Twz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ovc3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J433z4 , soc_inst|m0_1|u_logic|J433z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av13z4~DUPLICATE , soc_inst|m0_1|u_logic|Av13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~2 , soc_inst|m0_1|u_logic|Am5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sd43z4~DUPLICATE , soc_inst|m0_1|u_logic|Sd43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~3 , soc_inst|m0_1|u_logic|Am5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~0 , soc_inst|m0_1|u_logic|Am5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~1 , soc_inst|m0_1|u_logic|Am5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[4] , soc_inst|m0_1|u_logic|hwdata_o[4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[4]~15 , soc_inst|ram_1|data_to_memory[4]~15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ophvx4~0 , soc_inst|m0_1|u_logic|Ophvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ckw2z4 , soc_inst|m0_1|u_logic|Ckw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Owq2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pxrvx4~0 , soc_inst|m0_1|u_logic|Pxrvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X6nvx4~0 , soc_inst|m0_1|u_logic|X6nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X6nvx4~1 , soc_inst|m0_1|u_logic|X6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gxxvx4~0 , soc_inst|m0_1|u_logic|Gxxvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ljpvx4~0 , soc_inst|m0_1|u_logic|Ljpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jipvx4~0 , soc_inst|m0_1|u_logic|Jipvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hhpvx4~0 , soc_inst|m0_1|u_logic|Hhpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~0 , soc_inst|m0_1|u_logic|Kfpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~0 , soc_inst|m0_1|u_logic|C9rvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~1 , soc_inst|m0_1|u_logic|Kfpvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~2 , soc_inst|m0_1|u_logic|Kfpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~3 , soc_inst|m0_1|u_logic|Kfpvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mnpvx4~0 , soc_inst|m0_1|u_logic|Mnpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~4 , soc_inst|m0_1|u_logic|Kfpvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~5 , soc_inst|m0_1|u_logic|Kfpvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4 , soc_inst|m0_1|u_logic|Qzq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~0 , soc_inst|m0_1|u_logic|Hnbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~1 , soc_inst|m0_1|u_logic|Z4bwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~1 , soc_inst|m0_1|u_logic|Hnbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~3 , soc_inst|m0_1|u_logic|Cr1wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ffbwx4~0 , soc_inst|m0_1|u_logic|Ffbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~2 , soc_inst|m0_1|u_logic|Cr1wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~0 , soc_inst|m0_1|u_logic|Cr1wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~0 , soc_inst|m0_1|u_logic|Zluvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~1 , soc_inst|m0_1|u_logic|Zluvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~2 , soc_inst|m0_1|u_logic|Zluvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cr1wx4~1 , soc_inst|m0_1|u_logic|Cr1wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf73z4 , soc_inst|m0_1|u_logic|Gf73z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~1 , soc_inst|m0_1|u_logic|Q1ywx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4~0 , soc_inst|m0_1|u_logic|Q1ywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q1ywx4 , soc_inst|m0_1|u_logic|Q1ywx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tzxwx4~0 , soc_inst|m0_1|u_logic|Tzxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y9nwx4~0 , soc_inst|m0_1|u_logic|Y9nwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~0 , soc_inst|m0_1|u_logic|Kkyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~1 , soc_inst|m0_1|u_logic|Zkhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~0 , soc_inst|m0_1|u_logic|Zkhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ycx2z4 , soc_inst|m0_1|u_logic|Ycx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4qvx4 , soc_inst|m0_1|u_logic|S4qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[5] , soc_inst|ram_1|saved_word_address[5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[5]~5 , soc_inst|ram_1|memory.raddr_a[5]~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[18]~6 , soc_inst|ram_1|data_to_memory[18]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[10]~5 , soc_inst|ram_1|data_to_memory[10]~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[18]~13 , soc_inst|interconnect_1|HRDATA[18]~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cqhvx4~0 , soc_inst|m0_1|u_logic|Cqhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahw2z4 , soc_inst|m0_1|u_logic|Ahw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~1 , soc_inst|m0_1|u_logic|L7nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~0 , soc_inst|m0_1|u_logic|L7nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~2 , soc_inst|m0_1|u_logic|L7nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Viy2z4 , soc_inst|m0_1|u_logic|Viy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~0 , soc_inst|m0_1|u_logic|Z4xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6xvx4~0 , soc_inst|m0_1|u_logic|I6xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~1 , soc_inst|m0_1|u_logic|Z4xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~2 , soc_inst|m0_1|u_logic|Z4xvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~3 , soc_inst|m0_1|u_logic|Z4xvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rryvx4~0 , soc_inst|m0_1|u_logic|Rryvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Upyvx4~0 , soc_inst|m0_1|u_logic|Upyvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|R3mwx4~0 , soc_inst|m0_1|u_logic|R3mwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pet2z4 , soc_inst|m0_1|u_logic|Pet2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~0 , soc_inst|m0_1|u_logic|Nen2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~1 , soc_inst|m0_1|u_logic|Nen2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE , soc_inst|m0_1|u_logic|Nen2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nen2z4 , soc_inst|m0_1|u_logic|Nen2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|C1zvx4 , soc_inst|m0_1|u_logic|C1zvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~0 , soc_inst|m0_1|u_logic|M1j2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~3 , soc_inst|m0_1|u_logic|M1j2z4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~1 , soc_inst|m0_1|u_logic|M1j2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzyvx4~0 , soc_inst|m0_1|u_logic|Fzyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H0zvx4~0 , soc_inst|m0_1|u_logic|H0zvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~0 , soc_inst|m0_1|u_logic|Cuyvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yyyvx4 , soc_inst|m0_1|u_logic|Yyyvx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~1 , soc_inst|m0_1|u_logic|Cuyvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~2 , soc_inst|m0_1|u_logic|Cuyvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cuyvx4~3 , soc_inst|m0_1|u_logic|Cuyvx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~2 , soc_inst|m0_1|u_logic|M1j2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE , soc_inst|m0_1|u_logic|M1j2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G02wx4 , soc_inst|m0_1|u_logic|G02wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE , soc_inst|m0_1|u_logic|X6m2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~2 , soc_inst|m0_1|u_logic|D7bwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE , soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~1 , soc_inst|m0_1|u_logic|D7bwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~0 , soc_inst|m0_1|u_logic|D7bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A9bwx4~0 , soc_inst|m0_1|u_logic|A9bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D7bwx4~3 , soc_inst|m0_1|u_logic|D7bwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aqnvx4~0 , soc_inst|m0_1|u_logic|Aqnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O2bwx4~0 , soc_inst|m0_1|u_logic|O2bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I30wx4~0 , soc_inst|m0_1|u_logic|I30wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I30wx4~1 , soc_inst|m0_1|u_logic|I30wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~0 , soc_inst|m0_1|u_logic|U0vvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~1 , soc_inst|m0_1|u_logic|U0vvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U0vvx4~2 , soc_inst|m0_1|u_logic|U0vvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I30wx4~2 , soc_inst|m0_1|u_logic|I30wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hbv2z4 , soc_inst|m0_1|u_logic|Hbv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE , soc_inst|m0_1|u_logic|Yb93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~0 , soc_inst|m0_1|u_logic|Fzxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~1 , soc_inst|m0_1|u_logic|Fzxwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4 , soc_inst|m0_1|u_logic|Fzxwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wxxwx4~0 , soc_inst|m0_1|u_logic|Wxxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y9nwx4~0 , soc_inst|m0_1|u_logic|Y9nwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pwdwx4~0 , soc_inst|m0_1|u_logic|Pwdwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glnwx4~1 , soc_inst|m0_1|u_logic|Glnwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K22wx4~1 , soc_inst|m0_1|u_logic|K22wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K22wx4~0 , soc_inst|m0_1|u_logic|K22wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zz1wx4~0 , soc_inst|m0_1|u_logic|Zz1wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hq33z4 , soc_inst|m0_1|u_logic|Hq33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kc03z4 , soc_inst|m0_1|u_logic|Kc03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rvv2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~6 , soc_inst|m0_1|u_logic|P12wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~4 , soc_inst|m0_1|u_logic|P12wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Eyr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~5 , soc_inst|m0_1|u_logic|P12wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E913z4~feeder , soc_inst|m0_1|u_logic|E913z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E913z4~DUPLICATE , soc_inst|m0_1|u_logic|E913z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~7 , soc_inst|m0_1|u_logic|P12wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~0 , soc_inst|m0_1|u_logic|P12wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz43z4 , soc_inst|m0_1|u_logic|Qz43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE , soc_inst|m0_1|u_logic|Yg23z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~1 , soc_inst|m0_1|u_logic|P12wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ii73z4 , soc_inst|m0_1|u_logic|Ii73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qwr2z4~feeder , soc_inst|m0_1|u_logic|Qwr2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qwr2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z863z4~DUPLICATE , soc_inst|m0_1|u_logic|Z863z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~2 , soc_inst|m0_1|u_logic|P12wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4~3 , soc_inst|m0_1|u_logic|P12wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P12wx4 , soc_inst|m0_1|u_logic|P12wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lk9wx4~1 , soc_inst|m0_1|u_logic|Lk9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~1 , soc_inst|m0_1|u_logic|Skhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skhvx4~0 , soc_inst|m0_1|u_logic|Skhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE , soc_inst|m0_1|u_logic|Jex2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohivx4~0 , soc_inst|m0_1|u_logic|Ohivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Szr2z4 , soc_inst|m0_1|u_logic|Szr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E913z4 , soc_inst|m0_1|u_logic|E913z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~2 , soc_inst|m0_1|u_logic|Kn9wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yg23z4 , soc_inst|m0_1|u_logic|Yg23z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~1 , soc_inst|m0_1|u_logic|Kn9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyr2z4 , soc_inst|m0_1|u_logic|Eyr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z863z4 , soc_inst|m0_1|u_logic|Z863z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~0 , soc_inst|m0_1|u_logic|Kn9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qwr2z4 , soc_inst|m0_1|u_logic|Qwr2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hp9wx4~0 , soc_inst|m0_1|u_logic|Hp9wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kn9wx4~3 , soc_inst|m0_1|u_logic|Kn9wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F32wx4~0 , soc_inst|m0_1|u_logic|F32wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z6ovx4 , soc_inst|m0_1|u_logic|Z6ovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[6] , soc_inst|ram_1|saved_word_address[6], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[6]~6 , soc_inst|ram_1|memory.raddr_a[6]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[17]~10 , soc_inst|ram_1|data_to_memory[17]~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[9]~9 , soc_inst|ram_1|data_to_memory[9]~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jqhvx4~0 , soc_inst|m0_1|u_logic|Jqhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bpsvx4~0 , soc_inst|m0_1|u_logic|Bpsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mfw2z4 , soc_inst|m0_1|u_logic|Mfw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pqrvx4~0 , soc_inst|m0_1|u_logic|Pqrvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~0 , soc_inst|m0_1|u_logic|S7nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~1 , soc_inst|m0_1|u_logic|S7nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rxl2z4 , soc_inst|m0_1|u_logic|Rxl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Celwx4~0 , soc_inst|m0_1|u_logic|Celwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Celwx4~1 , soc_inst|m0_1|u_logic|Celwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fbfwx4~1 , soc_inst|m0_1|u_logic|Fbfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Herwx4~0 , soc_inst|m0_1|u_logic|Herwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Herwx4~1 , soc_inst|m0_1|u_logic|Herwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wzy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vb2wx4~0 , soc_inst|m0_1|u_logic|Vb2wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vb2wx4 , soc_inst|m0_1|u_logic|Vb2wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Meyvx4 , soc_inst|m0_1|u_logic|Meyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lq03z4 , soc_inst|m0_1|u_logic|Lq03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtz2z4~feeder , soc_inst|m0_1|u_logic|Rtz2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rtz2z4 , soc_inst|m0_1|u_logic|Rtz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~2 , soc_inst|m0_1|u_logic|Qp62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yr13z4~feeder , soc_inst|m0_1|u_logic|Yr13z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yr13z4 , soc_inst|m0_1|u_logic|Yr13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H133z4~feeder , soc_inst|m0_1|u_logic|H133z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H133z4 , soc_inst|m0_1|u_logic|H133z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~1 , soc_inst|m0_1|u_logic|Qp62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ytm2z4~feeder , soc_inst|m0_1|u_logic|Ytm2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ytm2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nr62z4~0 , soc_inst|m0_1|u_logic|Nr62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M1j2z4 , soc_inst|m0_1|u_logic|M1j2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C51xx4~0 , soc_inst|m0_1|u_logic|C51xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ytm2z4 , soc_inst|m0_1|u_logic|Ytm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mvm2z4 , soc_inst|m0_1|u_logic|Mvm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zj53z4~feeder , soc_inst|m0_1|u_logic|Zj53z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE , soc_inst|m0_1|u_logic|Zj53z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rtz2z4 , soc_inst|m0_1|u_logic|Rtz2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qa43z4~feeder , soc_inst|m0_1|u_logic|Qa43z4~feeder, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qa43z4 , soc_inst|m0_1|u_logic|Qa43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~0 , soc_inst|m0_1|u_logic|Qp62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~3 , soc_inst|m0_1|u_logic|Qp62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Euzvx4~0 , soc_inst|m0_1|u_logic|Euzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qtzvx4~0 , soc_inst|m0_1|u_logic|Qtzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~0 , soc_inst|m0_1|u_logic|Oszvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~0 , soc_inst|m0_1|u_logic|Zuzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zuzvx4~1 , soc_inst|m0_1|u_logic|Zuzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~1 , soc_inst|m0_1|u_logic|Oszvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mvm2z4 , soc_inst|m0_1|u_logic|Mvm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ytm2z4 , soc_inst|m0_1|u_logic|Ytm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zj53z4 , soc_inst|m0_1|u_logic|Zj53z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~1 , soc_inst|m0_1|u_logic|Uvzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE , soc_inst|m0_1|u_logic|Lq03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yr13z4 , soc_inst|m0_1|u_logic|Yr13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H133z4~DUPLICATE , soc_inst|m0_1|u_logic|H133z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lq03z4 , soc_inst|m0_1|u_logic|Lq03z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~2 , soc_inst|m0_1|u_logic|Uvzvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4~0 , soc_inst|m0_1|u_logic|Uvzvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uvzvx4 , soc_inst|m0_1|u_logic|Uvzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~0 , soc_inst|m0_1|u_logic|Uz9wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Uz9wx4~1 , soc_inst|m0_1|u_logic|Uz9wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~37 , soc_inst|m0_1|u_logic|Add2~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~57 , soc_inst|m0_1|u_logic|Add2~57, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~0 , soc_inst|m0_1|u_logic|Glhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Glhvx4~1 , soc_inst|m0_1|u_logic|Glhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nbx2z4 , soc_inst|m0_1|u_logic|Nbx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~1 , soc_inst|m0_1|u_logic|Zkhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zkhvx4~0 , soc_inst|m0_1|u_logic|Zkhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ycx2z4 , soc_inst|m0_1|u_logic|Ycx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4qvx4 , soc_inst|m0_1|u_logic|S4qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Elnvx4~0 , soc_inst|m0_1|u_logic|Elnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J6i2z4 , soc_inst|m0_1|u_logic|J6i2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D9ovx4 , soc_inst|m0_1|u_logic|D9ovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iuuvx4~0 , soc_inst|m0_1|u_logic|Iuuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K1ivx4~0 , soc_inst|m0_1|u_logic|K1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N7c3z4 , soc_inst|m0_1|u_logic|N7c3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jjuwx4~0 , soc_inst|m0_1|u_logic|Jjuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvzwx4~1 , soc_inst|m0_1|u_logic|Wvzwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G2zwx4~1 , soc_inst|m0_1|u_logic|G2zwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W5rvx4 , soc_inst|m0_1|u_logic|W5rvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jvqvx4~1 , soc_inst|m0_1|u_logic|Jvqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fbnvx4~0 , soc_inst|m0_1|u_logic|Fbnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Owq2z4 , soc_inst|m0_1|u_logic|Owq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~0 , soc_inst|m0_1|u_logic|Leuvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Leuvx4~1 , soc_inst|m0_1|u_logic|Leuvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pamvx4~0 , soc_inst|m0_1|u_logic|Pamvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Trq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J00wx4~0 , soc_inst|m0_1|u_logic|J00wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gpcwx4~0 , soc_inst|m0_1|u_logic|Gpcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J00wx4~1 , soc_inst|m0_1|u_logic|J00wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C00wx4~0 , soc_inst|m0_1|u_logic|C00wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bn53z4 , soc_inst|m0_1|u_logic|Bn53z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U5r2z4 , soc_inst|m0_1|u_logic|U5r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Twz2z4 , soc_inst|m0_1|u_logic|Twz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J433z4 , soc_inst|m0_1|u_logic|J433z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av13z4 , soc_inst|m0_1|u_logic|Av13z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nt03z4 , soc_inst|m0_1|u_logic|Nt03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~0 , soc_inst|m0_1|u_logic|Bjkvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bjkvx4~1 , soc_inst|m0_1|u_logic|Bjkvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ovc3z4 , soc_inst|m0_1|u_logic|Ovc3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~2 , soc_inst|m0_1|u_logic|Am5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I7r2z4 , soc_inst|m0_1|u_logic|I7r2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sd43z4 , soc_inst|m0_1|u_logic|Sd43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~3 , soc_inst|m0_1|u_logic|Am5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~0 , soc_inst|m0_1|u_logic|Am5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Am5wx4~1 , soc_inst|m0_1|u_logic|Am5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[4] , soc_inst|m0_1|u_logic|hwdata_o[4], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[4]~15 , soc_inst|ram_1|data_to_memory[4]~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[4]~23 , soc_inst|interconnect_1|HRDATA[4]~23, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pxrvx4~0 , soc_inst|m0_1|u_logic|Pxrvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xly2z4 , soc_inst|m0_1|u_logic|Xly2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X6nvx4~0 , soc_inst|m0_1|u_logic|X6nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ophvx4~0 , soc_inst|m0_1|u_logic|Ophvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ckw2z4 , soc_inst|m0_1|u_logic|Ckw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X6nvx4~1 , soc_inst|m0_1|u_logic|X6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE , soc_inst|m0_1|u_logic|Xly2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tecwx4~0 , soc_inst|m0_1|u_logic|Tecwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Afcwx4~0 , soc_inst|m0_1|u_logic|Afcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ydcwx4~0 , soc_inst|m0_1|u_logic|Ydcwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rxzvx4 , soc_inst|m0_1|u_logic|Rxzvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[3] , soc_inst|ram_1|saved_word_address[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[3]~3 , soc_inst|ram_1|memory.raddr_a[3]~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[25]~11 , soc_inst|ram_1|data_to_memory[25]~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[25]~18 , soc_inst|interconnect_1|HRDATA[25]~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pty2z4 , soc_inst|m0_1|u_logic|Pty2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~0 , soc_inst|m0_1|u_logic|O5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fohvx4~0 , soc_inst|m0_1|u_logic|Fohvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Urw2z4 , soc_inst|m0_1|u_logic|Urw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~1 , soc_inst|m0_1|u_logic|O5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~2 , soc_inst|m0_1|u_logic|O5nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pty2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G27wx4~0 , soc_inst|m0_1|u_logic|G27wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~0 , soc_inst|m0_1|u_logic|X3xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~1 , soc_inst|m0_1|u_logic|X3xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9swx4~0 , soc_inst|m0_1|u_logic|U9swx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S8swx4~0 , soc_inst|m0_1|u_logic|S8swx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G27wx4~1 , soc_inst|m0_1|u_logic|G27wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~1 , soc_inst|m0_1|u_logic|Bkxvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~2 , soc_inst|m0_1|u_logic|Bkxvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4~0 , soc_inst|m0_1|u_logic|Bkxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bkxvx4 , soc_inst|m0_1|u_logic|Bkxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~0 , soc_inst|m0_1|u_logic|Rfpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~2 , soc_inst|m0_1|u_logic|Rfpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~3 , soc_inst|m0_1|u_logic|Rfpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~4 , soc_inst|m0_1|u_logic|Rfpvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rfpvx4~5 , soc_inst|m0_1|u_logic|Rfpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zcn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~0 , soc_inst|m0_1|u_logic|Hnbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4bwx4~1 , soc_inst|m0_1|u_logic|Z4bwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnbwx4~1 , soc_inst|m0_1|u_logic|Hnbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~25 , soc_inst|m0_1|u_logic|Add2~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~0 , soc_inst|m0_1|u_logic|Imhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~1 , soc_inst|m0_1|u_logic|Imhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE , soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekovx4 , soc_inst|m0_1|u_logic|Ekovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[1] , soc_inst|ram_1|saved_word_address[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[1]~1 , soc_inst|ram_1|memory.raddr_a[1]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[1]~21 , soc_inst|interconnect_1|HRDATA[1]~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hcnvx4~0 , soc_inst|m0_1|u_logic|Hcnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dwl2z4 , soc_inst|m0_1|u_logic|Dwl2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~1 , soc_inst|m0_1|u_logic|Fmqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A1yvx4~0 , soc_inst|m0_1|u_logic|A1yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mnpvx4~0 , soc_inst|m0_1|u_logic|Mnpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~0 , soc_inst|m0_1|u_logic|Fmqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~0 , soc_inst|m0_1|u_logic|Rmpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmpvx4~1 , soc_inst|m0_1|u_logic|Rmpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yplwx4~0 , soc_inst|m0_1|u_logic|Yplwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vopvx4~0 , soc_inst|m0_1|u_logic|Vopvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ljpvx4~0 , soc_inst|m0_1|u_logic|Ljpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jvxvx4 , soc_inst|m0_1|u_logic|Jvxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vnqvx4~0 , soc_inst|m0_1|u_logic|Vnqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xipvx4~0 , soc_inst|m0_1|u_logic|Xipvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Onqvx4~0 , soc_inst|m0_1|u_logic|Onqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hhpvx4~0 , soc_inst|m0_1|u_logic|Hhpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~2 , soc_inst|m0_1|u_logic|Fmqvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~3 , soc_inst|m0_1|u_logic|Fmqvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzl2z4~feeder , soc_inst|m0_1|u_logic|Fzl2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fzl2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mmxvx4~0 , soc_inst|m0_1|u_logic|Mmxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~1 , soc_inst|m0_1|u_logic|Sbxvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~2 , soc_inst|m0_1|u_logic|Sbxvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mbnvx4~0 , soc_inst|m0_1|u_logic|Mbnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gtp2z4 , soc_inst|m0_1|u_logic|Gtp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gokwx4~0 , soc_inst|m0_1|u_logic|Gokwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~0 , soc_inst|m0_1|u_logic|Sbxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gqxvx4 , soc_inst|m0_1|u_logic|Gqxvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7xvx4 , soc_inst|m0_1|u_logic|Y7xvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hnxvx4~0 , soc_inst|m0_1|u_logic|Hnxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbxvx4~3 , soc_inst|m0_1|u_logic|Sbxvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uup2z4 , soc_inst|m0_1|u_logic|Uup2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4bwx4~0 , soc_inst|m0_1|u_logic|S4bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q3bwx4~0 , soc_inst|m0_1|u_logic|Q3bwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~17 , soc_inst|m0_1|u_logic|Add2~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~0 , soc_inst|m0_1|u_logic|Bmhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bmhvx4~1 , soc_inst|m0_1|u_logic|Bmhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G7x2z4 , soc_inst|m0_1|u_logic|G7x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~0 , soc_inst|m0_1|u_logic|Mekvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mekvx4~1 , soc_inst|m0_1|u_logic|Mekvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE , soc_inst|m0_1|u_logic|Xx93z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE , soc_inst|m0_1|u_logic|Bn53z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~0 , soc_inst|m0_1|u_logic|C372z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~2 , soc_inst|m0_1|u_logic|C372z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~1 , soc_inst|m0_1|u_logic|C372z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z472z4~0 , soc_inst|m0_1|u_logic|Z472z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C372z4~3 , soc_inst|m0_1|u_logic|C372z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tpnvx4~0 , soc_inst|m0_1|u_logic|Tpnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add2~33 , soc_inst|m0_1|u_logic|Add2~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~0 , soc_inst|m0_1|u_logic|Ulhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~1 , soc_inst|m0_1|u_logic|Ulhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R8x2z4 , soc_inst|m0_1|u_logic|R8x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~0 , soc_inst|m0_1|u_logic|Nlhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlhvx4~1 , soc_inst|m0_1|u_logic|Nlhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE , soc_inst|m0_1|u_logic|Cax2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~0 , soc_inst|m0_1|u_logic|Qnkvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qnkvx4~1 , soc_inst|m0_1|u_logic|Qnkvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Efp2z4 , soc_inst|m0_1|u_logic|Efp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ilp2z4 , soc_inst|m0_1|u_logic|Ilp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny62z4~0 , soc_inst|m0_1|u_logic|Ny62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V233z4 , soc_inst|m0_1|u_logic|V233z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~1 , soc_inst|m0_1|u_logic|Qw62z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ec43z4 , soc_inst|m0_1|u_logic|Ec43z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~0 , soc_inst|m0_1|u_logic|Qw62z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~2 , soc_inst|m0_1|u_logic|Qw62z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qw62z4~3 , soc_inst|m0_1|u_logic|Qw62z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mpnvx4~0 , soc_inst|m0_1|u_logic|Mpnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wccwx4~0 , soc_inst|m0_1|u_logic|Wccwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yxzvx4~0 , soc_inst|m0_1|u_logic|Yxzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujp2z4~feeder , soc_inst|m0_1|u_logic|Ujp2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujp2z4 , soc_inst|m0_1|u_logic|Ujp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu63z4~feeder , soc_inst|m0_1|u_logic|Wu63z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wu63z4 , soc_inst|m0_1|u_logic|Wu63z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~0 , soc_inst|m0_1|u_logic|Qxuwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gip2z4~feeder , soc_inst|m0_1|u_logic|Gip2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gip2z4 , soc_inst|m0_1|u_logic|Gip2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F8v2z4 , soc_inst|m0_1|u_logic|F8v2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~3 , soc_inst|m0_1|u_logic|Qxuwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W893z4 , soc_inst|m0_1|u_logic|W893z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sgp2z4 , soc_inst|m0_1|u_logic|Sgp2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~1 , soc_inst|m0_1|u_logic|Qxuwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wyt2z4~feeder , soc_inst|m0_1|u_logic|Wyt2z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wyt2z4 , soc_inst|m0_1|u_logic|Wyt2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F483z4~feeder , soc_inst|m0_1|u_logic|F483z4~feeder, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F483z4 , soc_inst|m0_1|u_logic|F483z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4~2 , soc_inst|m0_1|u_logic|Qxuwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qxuwx4 , soc_inst|m0_1|u_logic|Qxuwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rw7wx4~0 , soc_inst|m0_1|u_logic|Rw7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkdwx4~1 , soc_inst|m0_1|u_logic|Fkdwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE , soc_inst|m0_1|u_logic|R0t2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~0 , soc_inst|m0_1|u_logic|Q6twx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6twx4~1 , soc_inst|m0_1|u_logic|Q6twx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE , soc_inst|m0_1|u_logic|C4b3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~0 , soc_inst|m0_1|u_logic|Rhfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~1 , soc_inst|m0_1|u_logic|Rhfwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rhfwx4~2 , soc_inst|m0_1|u_logic|Rhfwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~0 , soc_inst|m0_1|u_logic|Ppzvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppzvx4~1 , soc_inst|m0_1|u_logic|Ppzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~2 , soc_inst|m0_1|u_logic|Oihvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpx2z4 , soc_inst|m0_1|u_logic|Zpx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~1 , soc_inst|m0_1|u_logic|Oihvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oihvx4~0 , soc_inst|m0_1|u_logic|Oihvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zpx2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rnovx4 , soc_inst|m0_1|u_logic|Rnovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~5 , soc_inst|m0_1|u_logic|Nlovx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~3 , soc_inst|m0_1|u_logic|Nlovx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~1 , soc_inst|m0_1|u_logic|Nlovx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~2 , soc_inst|m0_1|u_logic|Nlovx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~4 , soc_inst|m0_1|u_logic|Nlovx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~6 , soc_inst|m0_1|u_logic|Nlovx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~8 , soc_inst|m0_1|u_logic|Nlovx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~0 , soc_inst|m0_1|u_logic|Nlovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nlovx4~7 , soc_inst|m0_1|u_logic|Nlovx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jknvx4~0 , soc_inst|m0_1|u_logic|Jknvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lz93z4 , soc_inst|m0_1|u_logic|Lz93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N1uvx4 , soc_inst|m0_1|u_logic|N1uvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Azs2z4 , soc_inst|m0_1|u_logic|Azs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~0 , soc_inst|m0_1|u_logic|S9ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~1 , soc_inst|m0_1|u_logic|S9ywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S9ywx4~2 , soc_inst|m0_1|u_logic|S9ywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Otxwx4~0 , soc_inst|m0_1|u_logic|Otxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[31]~2 , soc_inst|interconnect_1|HRDATA[31]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Palwx4~0 , soc_inst|m0_1|u_logic|Palwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mtwwx4~0 , soc_inst|m0_1|u_logic|Mtwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~0 , soc_inst|m0_1|u_logic|Zluvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~1 , soc_inst|m0_1|u_logic|Zluvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zluvx4~2 , soc_inst|m0_1|u_logic|Zluvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U9mvx4~0 , soc_inst|m0_1|u_logic|U9mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pguvx4~0 , soc_inst|m0_1|u_logic|Pguvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y1ivx4~0 , soc_inst|m0_1|u_logic|Y1ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE , soc_inst|m0_1|u_logic|Hub3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I90xx4~0 , soc_inst|m0_1|u_logic|I90xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I90xx4~2 , soc_inst|m0_1|u_logic|I90xx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R4zwx4~0 , soc_inst|m0_1|u_logic|R4zwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6pwx4~0 , soc_inst|m0_1|u_logic|I6pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~1 , soc_inst|m0_1|u_logic|Kzqvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~2 , soc_inst|m0_1|u_logic|Kzqvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kzqvx4~0 , soc_inst|m0_1|u_logic|Kzqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~4 , soc_inst|m0_1|u_logic|C9rvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~0 , soc_inst|m0_1|u_logic|C9rvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~3 , soc_inst|m0_1|u_logic|C9rvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~1 , soc_inst|m0_1|u_logic|C9rvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~2 , soc_inst|m0_1|u_logic|C9rvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qtzvx4~0 , soc_inst|m0_1|u_logic|Qtzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~0 , soc_inst|m0_1|u_logic|Oszvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oszvx4~1 , soc_inst|m0_1|u_logic|Oszvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6v2z4 , soc_inst|m0_1|u_logic|R6v2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~3 , soc_inst|m0_1|u_logic|Svqwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~0 , soc_inst|m0_1|u_logic|Svqwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~2 , soc_inst|m0_1|u_logic|Svqwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4~1 , soc_inst|m0_1|u_logic|Svqwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svqwx4 , soc_inst|m0_1|u_logic|Svqwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~2 , soc_inst|m0_1|u_logic|Qp62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zj53z4 , soc_inst|m0_1|u_logic|Zj53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~0 , soc_inst|m0_1|u_logic|Qp62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nr62z4~0 , soc_inst|m0_1|u_logic|Nr62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H133z4 , soc_inst|m0_1|u_logic|H133z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~1 , soc_inst|m0_1|u_logic|Qp62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp62z4~3 , soc_inst|m0_1|u_logic|Qp62z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Euzvx4~0 , soc_inst|m0_1|u_logic|Euzvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hszvx4 , soc_inst|m0_1|u_logic|Hszvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[4] , soc_inst|ram_1|saved_word_address[4], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[4]~4 , soc_inst|ram_1|memory.raddr_a[4]~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[22]~31 , soc_inst|ram_1|data_to_memory[22]~31, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[6]~32 , soc_inst|ram_1|data_to_memory[6]~32, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[22]~35 , soc_inst|interconnect_1|HRDATA[22]~35, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Edovx4 , soc_inst|m0_1|u_logic|Edovx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add1~34 , soc_inst|m0_1|u_logic|Add1~34, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Add1~5 , soc_inst|m0_1|u_logic|Add1~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~3 , soc_inst|m0_1|u_logic|C9rvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~4 , soc_inst|m0_1|u_logic|C9rvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~1 , soc_inst|m0_1|u_logic|C9rvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lbn2z4 , soc_inst|m0_1|u_logic|Lbn2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C9rvx4~2 , soc_inst|m0_1|u_logic|C9rvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ranvx4~0 , soc_inst|m0_1|u_logic|Ranvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|I3y2z4 , soc_inst|m0_1|u_logic|I3y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~9 , soc_inst|m0_1|u_logic|Add1~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kanvx4~0 , soc_inst|m0_1|u_logic|Kanvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4y2z4 , soc_inst|m0_1|u_logic|W4y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~21 , soc_inst|m0_1|u_logic|Add1~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Danvx4~0 , soc_inst|m0_1|u_logic|Danvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K6y2z4 , soc_inst|m0_1|u_logic|K6y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~25 , soc_inst|m0_1|u_logic|Add1~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W9nvx4~0 , soc_inst|m0_1|u_logic|W9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y7y2z4 , soc_inst|m0_1|u_logic|Y7y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~29 , soc_inst|m0_1|u_logic|Add1~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9y2z4 , soc_inst|m0_1|u_logic|M9y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P9nvx4~0 , soc_inst|m0_1|u_logic|P9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE , soc_inst|m0_1|u_logic|M9y2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~13 , soc_inst|m0_1|u_logic|Add1~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I9nvx4~0 , soc_inst|m0_1|u_logic|I9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bby2z4 , soc_inst|m0_1|u_logic|Bby2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~1 , soc_inst|m0_1|u_logic|Add1~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B9nvx4~0 , soc_inst|m0_1|u_logic|B9nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qcy2z4 , soc_inst|m0_1|u_logic|Qcy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Add1~17 , soc_inst|m0_1|u_logic|Add1~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U8nvx4~0 , soc_inst|m0_1|u_logic|U8nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bdm2z4 , soc_inst|m0_1|u_logic|Bdm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oylwx4~0 , soc_inst|m0_1|u_logic|Oylwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oylwx4~1 , soc_inst|m0_1|u_logic|Oylwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|By4wx4 , soc_inst|m0_1|u_logic|By4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y6t2z4 , soc_inst|m0_1|u_logic|Y6t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ptgwx4~0 , soc_inst|m0_1|u_logic|Ptgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V76wx4~0 , soc_inst|m0_1|u_logic|V76wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V76wx4~1 , soc_inst|m0_1|u_logic|V76wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wdqvx4~0 , soc_inst|m0_1|u_logic|Wdqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D56wx4~0 , soc_inst|m0_1|u_logic|D56wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G27wx4~2 , soc_inst|m0_1|u_logic|G27wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~1 , soc_inst|m0_1|u_logic|P0hwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Px5wx4 , soc_inst|m0_1|u_logic|Px5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uw5wx4~0 , soc_inst|m0_1|u_logic|Uw5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mz5wx4~0 , soc_inst|m0_1|u_logic|Mz5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~0 , soc_inst|m0_1|u_logic|Xu5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~1 , soc_inst|m0_1|u_logic|Xu5wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~2 , soc_inst|m0_1|u_logic|Xu5wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dj6wx4~0 , soc_inst|m0_1|u_logic|Dj6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vskwx4~0 , soc_inst|m0_1|u_logic|Vskwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H06wx4~0 , soc_inst|m0_1|u_logic|H06wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~3 , soc_inst|m0_1|u_logic|Xu5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4 , soc_inst|m0_1|u_logic|Xu5wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wai2z4 , soc_inst|m0_1|u_logic|Wai2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tzxwx4~0 , soc_inst|m0_1|u_logic|Tzxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vy7wx4~0 , soc_inst|m0_1|u_logic|Vy7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S8ewx4~0 , soc_inst|m0_1|u_logic|S8ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9iwx4~1 , soc_inst|m0_1|u_logic|H9iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~0 , soc_inst|m0_1|u_logic|Bspvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~1 , soc_inst|m0_1|u_logic|Bspvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vvx2z4 , soc_inst|m0_1|u_logic|Vvx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~0 , soc_inst|m0_1|u_logic|Mhhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~1 , soc_inst|m0_1|u_logic|Mhhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~2 , soc_inst|m0_1|u_logic|Mhhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29] , soc_inst|m0_1|u_logic|haddr_o[29], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~2 , soc_inst|m0_1|u_logic|S6ovx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Va62z4 , soc_inst|m0_1|u_logic|Va62z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29]~2 , soc_inst|m0_1|u_logic|haddr_o[29]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H362z4~0 , soc_inst|m0_1|u_logic|H362z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|htrans_o[1]~0 , soc_inst|m0_1|u_logic|htrans_o[1]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~1 , soc_inst|switches_1|half_word_address~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~3 , soc_inst|switches_1|half_word_address~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address[0] , soc_inst|switches_1|half_word_address[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[24]~6 , soc_inst|interconnect_1|HRDATA[24]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[24]~17 , soc_inst|interconnect_1|HRDATA[24]~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][8] , soc_inst|switches_1|switch_store[1][8], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~1 , soc_inst|m0_1|u_logic|Ny3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[24]~26 , soc_inst|ram_1|data_to_memory[24]~26, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[16]~25 , soc_inst|ram_1|data_to_memory[16]~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[24]~31 , soc_inst|interconnect_1|HRDATA[24]~31, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~0 , soc_inst|m0_1|u_logic|V5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mohvx4~0 , soc_inst|m0_1|u_logic|Mohvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gqw2z4 , soc_inst|m0_1|u_logic|Gqw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~1 , soc_inst|m0_1|u_logic|V5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~2 , soc_inst|m0_1|u_logic|V5nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bsy2z4 , soc_inst|m0_1|u_logic|Bsy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ho3wx4~0 , soc_inst|m0_1|u_logic|Ho3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~1 , soc_inst|m0_1|u_logic|Df3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mn3wx4~0 , soc_inst|m0_1|u_logic|Mn3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~0 , soc_inst|m0_1|u_logic|Df3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~2 , soc_inst|m0_1|u_logic|Df3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~5 , soc_inst|m0_1|u_logic|Df3wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~6 , soc_inst|m0_1|u_logic|Df3wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~7 , soc_inst|m0_1|u_logic|Df3wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~8 , soc_inst|m0_1|u_logic|Df3wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~9 , soc_inst|m0_1|u_logic|Df3wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1pvx4~0 , soc_inst|m0_1|u_logic|R1pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~0 , soc_inst|m0_1|u_logic|K4mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~1 , soc_inst|m0_1|u_logic|K4mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw93z4 , soc_inst|m0_1|u_logic|Jw93z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X563z4~DUPLICATE , soc_inst|m0_1|u_logic|X563z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~3 , soc_inst|m0_1|u_logic|Xhbwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~2 , soc_inst|m0_1|u_logic|Xhbwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~1 , soc_inst|m0_1|u_logic|Xhbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~0 , soc_inst|m0_1|u_logic|Xhbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qrnvx4~0 , soc_inst|m0_1|u_logic|Qrnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uzvvx4~0 , soc_inst|m0_1|u_logic|Uzvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fvovx4 , soc_inst|m0_1|u_logic|Fvovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|saved_word_address[0] , soc_inst|ram_1|saved_word_address[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory.raddr_a[0]~0 , soc_inst|ram_1|memory.raddr_a[0]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[22]~31 , soc_inst|ram_1|data_to_memory[22]~31, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|data_to_memory[6]~32 , soc_inst|ram_1|data_to_memory[6]~32, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[22]~35 , soc_inst|interconnect_1|HRDATA[22]~35, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~0 , soc_inst|m0_1|u_logic|J6nvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Aphvx4~0 , soc_inst|m0_1|u_logic|Aphvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Enw2z4 , soc_inst|m0_1|u_logic|Enw2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~1 , soc_inst|m0_1|u_logic|J6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~0 , soc_inst|m0_1|u_logic|J6nvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|J6nvx4~2 , soc_inst|m0_1|u_logic|J6nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zoy2z4 , soc_inst|m0_1|u_logic|Zoy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W7hwx4~0 , soc_inst|m0_1|u_logic|W7hwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~0 , soc_inst|m0_1|u_logic|Mhgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iikwx4~0 , soc_inst|m0_1|u_logic|Iikwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xf6wx4~0 , soc_inst|m0_1|u_logic|Xf6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lu6wx4~0 , soc_inst|m0_1|u_logic|Lu6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uv6wx4 , soc_inst|m0_1|u_logic|Uv6wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Uijwx4~0 , soc_inst|m0_1|u_logic|Uijwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qf6wx4~0 , soc_inst|m0_1|u_logic|Qf6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~2 , soc_inst|m0_1|u_logic|Q86wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~3 , soc_inst|m0_1|u_logic|Q86wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gpjwx4~0 , soc_inst|m0_1|u_logic|Gpjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Og4wx4~0 , soc_inst|m0_1|u_logic|Og4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ua6wx4~0 , soc_inst|m0_1|u_logic|Ua6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~0 , soc_inst|m0_1|u_logic|Q86wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~1 , soc_inst|m0_1|u_logic|Q86wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~4 , soc_inst|m0_1|u_logic|Q86wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~5 , soc_inst|m0_1|u_logic|Q86wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~6 , soc_inst|m0_1|u_logic|Q86wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~2 , soc_inst|m0_1|u_logic|Jm6wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~1 , soc_inst|m0_1|u_logic|Jm6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~3 , soc_inst|m0_1|u_logic|Jm6wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ad7wx4~0 , soc_inst|m0_1|u_logic|Ad7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~6 , soc_inst|m0_1|u_logic|Jm6wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~4 , soc_inst|m0_1|u_logic|Jm6wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hyewx4 , soc_inst|m0_1|u_logic|Hyewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~0 , soc_inst|m0_1|u_logic|Jm6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~5 , soc_inst|m0_1|u_logic|Jm6wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P28wx4 , soc_inst|m0_1|u_logic|P28wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~0 , soc_inst|m0_1|u_logic|Xt6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~1 , soc_inst|m0_1|u_logic|Q07wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X07wx4~0 , soc_inst|m0_1|u_logic|X07wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gci2z4 , soc_inst|m0_1|u_logic|Gci2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~0 , soc_inst|m0_1|u_logic|Q07wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~1 , soc_inst|m0_1|u_logic|Xt6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~7 , soc_inst|m0_1|u_logic|Jm6wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~1 , soc_inst|m0_1|u_logic|Eyhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~1 , soc_inst|m0_1|u_logic|Bpzvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~2 , soc_inst|m0_1|u_logic|G5qvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~0 , soc_inst|m0_1|u_logic|F9pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9pvx4~1 , soc_inst|m0_1|u_logic|F9pvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~1 , soc_inst|m0_1|u_logic|G5qvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qz33z4 , soc_inst|m0_1|u_logic|Qz33z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~0 , soc_inst|m0_1|u_logic|Oxnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Knz2z4 , soc_inst|m0_1|u_logic|Knz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ek03z4 , soc_inst|m0_1|u_logic|Ek03z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~2 , soc_inst|m0_1|u_logic|Oxnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~1 , soc_inst|m0_1|u_logic|Oxnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~3 , soc_inst|m0_1|u_logic|Oxnvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N5qvx4~0 , soc_inst|m0_1|u_logic|N5qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte1~0 , soc_inst|ram_1|byte1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[1] , soc_inst|ram_1|byte_select[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|read_cycle~DUPLICATE , soc_inst|ram_1|read_cycle~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[11]~3 , soc_inst|interconnect_1|HRDATA[11]~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[10]~12 , soc_inst|interconnect_1|HRDATA[10]~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dvy2z4 , soc_inst|m0_1|u_logic|Dvy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcsvx4~0 , soc_inst|m0_1|u_logic|Dcsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~0 , soc_inst|m0_1|u_logic|H5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ynhvx4~0 , soc_inst|m0_1|u_logic|Ynhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Itw2z4 , soc_inst|m0_1|u_logic|Itw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~1 , soc_inst|m0_1|u_logic|H5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~0 , soc_inst|m0_1|u_logic|Kxkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~0 , soc_inst|m0_1|u_logic|Tykwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~1 , soc_inst|m0_1|u_logic|Tykwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Zoy2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~1 , soc_inst|m0_1|u_logic|Kxkwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~2 , soc_inst|m0_1|u_logic|Kxkwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Svk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S61xx4~0 , soc_inst|m0_1|u_logic|S61xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jw73z4 , soc_inst|m0_1|u_logic|Jw73z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Art2z4 , soc_inst|m0_1|u_logic|Art2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~0 , soc_inst|m0_1|u_logic|Pdbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~3 , soc_inst|m0_1|u_logic|Pdbwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~5 , soc_inst|m0_1|u_logic|Pdbwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I443z4 , soc_inst|m0_1|u_logic|I443z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Gfq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~2 , soc_inst|m0_1|u_logic|Pdbwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~4 , soc_inst|m0_1|u_logic|Pdbwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~1 , soc_inst|m0_1|u_logic|Pdbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~6 , soc_inst|m0_1|u_logic|Pdbwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Wnh3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~7 , soc_inst|m0_1|u_logic|Pdbwx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4~8 , soc_inst|m0_1|u_logic|Pdbwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pdbwx4 , soc_inst|m0_1|u_logic|Pdbwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~0 , soc_inst|m0_1|u_logic|Ny3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Knvvx4~0 , soc_inst|m0_1|u_logic|Knvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~0 , soc_inst|m0_1|u_logic|T5mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Imvvx4~0 , soc_inst|m0_1|u_logic|Imvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T5mvx4~1 , soc_inst|m0_1|u_logic|T5mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE , soc_inst|m0_1|u_logic|Wbk2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4pwx4~0 , soc_inst|m0_1|u_logic|S4pwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~1 , soc_inst|m0_1|u_logic|X2rvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|X2rvx4~2 , soc_inst|m0_1|u_logic|X2rvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tbnvx4~0 , soc_inst|m0_1|u_logic|Tbnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lbn2z4 , soc_inst|m0_1|u_logic|Lbn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cqhvx4~0 , soc_inst|m0_1|u_logic|Cqhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahw2z4 , soc_inst|m0_1|u_logic|Ahw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~1 , soc_inst|m0_1|u_logic|L7nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~0 , soc_inst|m0_1|u_logic|L7nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7nvx4~2 , soc_inst|m0_1|u_logic|L7nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Viy2z4 , soc_inst|m0_1|u_logic|Viy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~0 , soc_inst|m0_1|u_logic|Ggswx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~1 , soc_inst|m0_1|u_logic|Ggswx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ggswx4~2 , soc_inst|m0_1|u_logic|Ggswx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yaz2z4 , soc_inst|m0_1|u_logic|Yaz2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~0 , soc_inst|m0_1|u_logic|Htyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~1 , soc_inst|m0_1|u_logic|Htyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L753z4~DUPLICATE , soc_inst|m0_1|u_logic|L753z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~2 , soc_inst|m0_1|u_logic|Htyvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~3 , soc_inst|m0_1|u_logic|Htyvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[1] , soc_inst|m0_1|u_logic|hwdata_o[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R0t2z4 , soc_inst|m0_1|u_logic|R0t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rexvx4~0 , soc_inst|m0_1|u_logic|Rexvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~0 , soc_inst|m0_1|u_logic|Ppsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~1 , soc_inst|m0_1|u_logic|Ppsvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Una2z4~0 , soc_inst|m0_1|u_logic|Una2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~0 , soc_inst|m0_1|u_logic|Amjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~1 , soc_inst|m0_1|u_logic|C5c2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z6c2z4~0 , soc_inst|m0_1|u_logic|Z6c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~0 , soc_inst|m0_1|u_logic|C5c2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~2 , soc_inst|m0_1|u_logic|C5c2z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~2 , soc_inst|m0_1|u_logic|Ppsvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4 , soc_inst|m0_1|u_logic|Ppsvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~0 , soc_inst|m0_1|u_logic|S6ovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~1 , soc_inst|m0_1|u_logic|S6ovx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|always1~0 , soc_inst|ram_1|always1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|read_cycle~0 , soc_inst|ram_1|read_cycle~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|read_cycle , soc_inst|ram_1|read_cycle, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[6]~10 , soc_inst|interconnect_1|HRDATA[6]~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][5] , soc_inst|switches_1|switch_store[0][5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~0 , soc_inst|m0_1|u_logic|Tykwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tykwx4~1 , soc_inst|m0_1|u_logic|Tykwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~0 , soc_inst|m0_1|u_logic|Kxkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kxkwx4~2 , soc_inst|m0_1|u_logic|Kxkwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Svk2z4 , soc_inst|m0_1|u_logic|Svk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sd1xx4~0 , soc_inst|m0_1|u_logic|Sd1xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ilp2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE , soc_inst|m0_1|u_logic|Ec43z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mt13z4 , soc_inst|m0_1|u_logic|Mt13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE , soc_inst|m0_1|u_logic|Zr03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~5 , soc_inst|m0_1|u_logic|Eo5wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fvz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fvz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~6 , soc_inst|m0_1|u_logic|Eo5wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~1 , soc_inst|m0_1|u_logic|Eo5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~2 , soc_inst|m0_1|u_logic|Eo5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[5] , soc_inst|m0_1|u_logic|hwdata_o[5], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[5]~23 , soc_inst|ram_1|data_to_memory[5]~23, de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|HRDATA[5]~28 , soc_inst|interconnect_1|HRDATA[5]~28, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Yanvx4~0 , soc_inst|m0_1|u_logic|Yanvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|F0y2z4 , soc_inst|m0_1|u_logic|F0y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hphvx4~0 , soc_inst|m0_1|u_logic|Hphvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qlw2z4 , soc_inst|m0_1|u_logic|Qlw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~1 , soc_inst|m0_1|u_logic|Q6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~0 , soc_inst|m0_1|u_logic|Q6nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6nvx4~2 , soc_inst|m0_1|u_logic|Q6nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lny2z4~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Gvrwx4~0 , soc_inst|m0_1|u_logic|Gvrwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ctrwx4~0 , soc_inst|m0_1|u_logic|Ctrwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ctrwx4~1 , soc_inst|m0_1|u_logic|Ctrwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kghvx4~0 , soc_inst|m0_1|u_logic|Kghvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6z2z4 , soc_inst|m0_1|u_logic|I6z2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~0 , soc_inst|m0_1|u_logic|Fjewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~1 , soc_inst|m0_1|u_logic|Fjewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I1c2z4 , soc_inst|m0_1|u_logic|I1c2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wpsvx4~0 , soc_inst|m0_1|u_logic|Wpsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE , soc_inst|m0_1|u_logic|I6z2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tecwx4~0 , soc_inst|m0_1|u_logic|Tecwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Afcwx4~0 , soc_inst|m0_1|u_logic|Afcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ydcwx4~0 , soc_inst|m0_1|u_logic|Ydcwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rxzvx4 , soc_inst|m0_1|u_logic|Rxzvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[3] , soc_inst|ram_1|saved_word_address[3], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[3]~3 , soc_inst|ram_1|memory.raddr_a[3]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~12 , soc_inst|m0_1|u_logic|hwdata_o~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[29]~22 , soc_inst|ram_1|data_to_memory[29]~22, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[13]~21 , soc_inst|ram_1|data_to_memory[13]~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~0 , soc_inst|m0_1|u_logic|Ajnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE , soc_inst|m0_1|u_logic|Bdm2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~1 , soc_inst|m0_1|u_logic|Add1~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~17 , soc_inst|m0_1|u_logic|Add1~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U8nvx4~0 , soc_inst|m0_1|u_logic|U8nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bdm2z4 , soc_inst|m0_1|u_logic|Bdm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dnhvx4~0 , soc_inst|m0_1|u_logic|Dnhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Byw2z4 , soc_inst|m0_1|u_logic|Byw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~1 , soc_inst|m0_1|u_logic|Ajnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~2 , soc_inst|m0_1|u_logic|Ajnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qem2z4 , soc_inst|m0_1|u_logic|Qem2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahwvx4~0 , soc_inst|m0_1|u_logic|Ahwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohwvx4 , soc_inst|m0_1|u_logic|Ohwvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oowvx4~0 , soc_inst|m0_1|u_logic|Oowvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejwvx4~0 , soc_inst|m0_1|u_logic|Ejwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Blwvx4~0 , soc_inst|m0_1|u_logic|Blwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~0 , soc_inst|m0_1|u_logic|R8wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8wvx4~1 , soc_inst|m0_1|u_logic|R8wvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~0 , soc_inst|m0_1|u_logic|K8wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~0 , soc_inst|m0_1|u_logic|Vhwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vhwvx4~1 , soc_inst|m0_1|u_logic|Vhwvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~1 , soc_inst|m0_1|u_logic|K8wvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K8wvx4~2 , soc_inst|m0_1|u_logic|K8wvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F9wvx4~0 , soc_inst|m0_1|u_logic|F9wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE , soc_inst|m0_1|u_logic|I2t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~0 , soc_inst|m0_1|u_logic|P3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~1 , soc_inst|m0_1|u_logic|P3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Auk2z4 , soc_inst|m0_1|u_logic|Auk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~1 , soc_inst|m0_1|u_logic|E4xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~0 , soc_inst|m0_1|u_logic|B3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~0 , soc_inst|m0_1|u_logic|Wlwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wlwvx4~1 , soc_inst|m0_1|u_logic|Wlwvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B3mvx4~1 , soc_inst|m0_1|u_logic|B3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C3z2z4 , soc_inst|m0_1|u_logic|C3z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Emewx4~0 , soc_inst|m0_1|u_logic|Emewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wvswx4~0 , soc_inst|m0_1|u_logic|Wvswx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~0 , soc_inst|m0_1|u_logic|Fjswx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~1 , soc_inst|m0_1|u_logic|Fjswx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T1d3z4 , soc_inst|m0_1|u_logic|T1d3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~4 , soc_inst|m0_1|u_logic|Eo5wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gip2z4 , soc_inst|m0_1|u_logic|Gip2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~3 , soc_inst|m0_1|u_logic|Eo5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~0 , soc_inst|m0_1|u_logic|Eo5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~0 , soc_inst|m0_1|u_logic|Ylwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~1 , soc_inst|m0_1|u_logic|Ylwwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~1 , soc_inst|m0_1|u_logic|Ok7wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Manwx4~0 , soc_inst|m0_1|u_logic|Manwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S1ewx4~0 , soc_inst|m0_1|u_logic|S1ewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W6iwx4 , soc_inst|m0_1|u_logic|W6iwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~0 , soc_inst|m0_1|u_logic|Bspvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bspvx4~1 , soc_inst|m0_1|u_logic|Bspvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~0 , soc_inst|m0_1|u_logic|Mhhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~1 , soc_inst|m0_1|u_logic|Mhhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhhvx4~2 , soc_inst|m0_1|u_logic|Mhhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE , soc_inst|m0_1|u_logic|Vvx2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Va62z4 , soc_inst|m0_1|u_logic|Va62z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H362z4~0 , soc_inst|m0_1|u_logic|H362z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|htrans_o[1]~0 , soc_inst|m0_1|u_logic|htrans_o[1]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~1 , soc_inst|switches_1|half_word_address~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~2 , soc_inst|switches_1|half_word_address~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address[1] , soc_inst|switches_1|half_word_address[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[1]~19 , soc_inst|interconnect_1|HRDATA[1]~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|DataValid~1 , soc_inst|switches_1|DataValid~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|DataValid[0] , soc_inst|switches_1|DataValid[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][0] , soc_inst|switches_1|switch_store[0][0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[0]~32 , soc_inst|interconnect_1|HRDATA[0]~32, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vcnvx4~0 , soc_inst|m0_1|u_logic|Vcnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kyi2z4 , soc_inst|m0_1|u_logic|Kyi2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~1 , soc_inst|m0_1|u_logic|Kkyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ocnvx4~0 , soc_inst|m0_1|u_logic|Ocnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1w2z4 , soc_inst|m0_1|u_logic|R1w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5vvx4 , soc_inst|m0_1|u_logic|J5vvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~0 , soc_inst|m0_1|u_logic|X7mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X7mvx4~1 , soc_inst|m0_1|u_logic|X7mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6w2z4 , soc_inst|m0_1|u_logic|I6w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~1 , soc_inst|m0_1|u_logic|F5mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|F5mvx4~2 , soc_inst|m0_1|u_logic|F5mvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5x2z4 , soc_inst|m0_1|u_logic|U5x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lefwx4~0 , soc_inst|m0_1|u_logic|Lefwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~0 , soc_inst|m0_1|u_logic|Imhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Imhvx4~1 , soc_inst|m0_1|u_logic|Imhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE , soc_inst|m0_1|u_logic|J4x2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekovx4 , soc_inst|m0_1|u_logic|Ekovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[1] , soc_inst|ram_1|saved_word_address[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[1]~1 , soc_inst|ram_1|memory.raddr_a[1]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[27]~19 , soc_inst|ram_1|data_to_memory[27]~19, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[3]~20 , soc_inst|ram_1|data_to_memory[3]~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rnhvx4~0 , soc_inst|m0_1|u_logic|Rnhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xuw2z4 , soc_inst|m0_1|u_logic|Xuw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oesvx4~0 , soc_inst|m0_1|u_logic|Oesvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~0 , soc_inst|m0_1|u_logic|A5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~1 , soc_inst|m0_1|u_logic|A5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Swy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dj6wx4~0 , soc_inst|m0_1|u_logic|Dj6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vskwx4~0 , soc_inst|m0_1|u_logic|Vskwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H06wx4~0 , soc_inst|m0_1|u_logic|H06wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ptgwx4~0 , soc_inst|m0_1|u_logic|Ptgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V76wx4~0 , soc_inst|m0_1|u_logic|V76wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V76wx4~1 , soc_inst|m0_1|u_logic|V76wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wdqvx4~0 , soc_inst|m0_1|u_logic|Wdqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yy5wx4~0 , soc_inst|m0_1|u_logic|Yy5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~1 , soc_inst|m0_1|u_logic|P0hwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~1 , soc_inst|m0_1|u_logic|Xu5wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D56wx4~0 , soc_inst|m0_1|u_logic|D56wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mz5wx4~0 , soc_inst|m0_1|u_logic|Mz5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G27wx4~2 , soc_inst|m0_1|u_logic|G27wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Px5wx4 , soc_inst|m0_1|u_logic|Px5wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uw5wx4~0 , soc_inst|m0_1|u_logic|Uw5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~0 , soc_inst|m0_1|u_logic|Xu5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~2 , soc_inst|m0_1|u_logic|Xu5wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4~3 , soc_inst|m0_1|u_logic|Xu5wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xu5wx4 , soc_inst|m0_1|u_logic|Xu5wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wai2z4 , soc_inst|m0_1|u_logic|Wai2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE , soc_inst|m0_1|u_logic|V3m2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE , soc_inst|m0_1|u_logic|Y1u2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H783z4~DUPLICATE , soc_inst|m0_1|u_logic|H783z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~1 , soc_inst|m0_1|u_logic|Fzxwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yb93z4 , soc_inst|m0_1|u_logic|Yb93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE , soc_inst|m0_1|u_logic|H2m2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4~0 , soc_inst|m0_1|u_logic|Fzxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzxwx4 , soc_inst|m0_1|u_logic|Fzxwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wxxwx4~0 , soc_inst|m0_1|u_logic|Wxxwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pkwwx4~0 , soc_inst|m0_1|u_logic|Pkwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vr7wx4~0 , soc_inst|m0_1|u_logic|Vr7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~0 , soc_inst|m0_1|u_logic|R7iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R5zvx4~2 , soc_inst|m0_1|u_logic|R5zvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add2~5 , soc_inst|m0_1|u_logic|Add2~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~0 , soc_inst|m0_1|u_logic|Wthvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wthvx4~1 , soc_inst|m0_1|u_logic|Wthvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J0l2z4 , soc_inst|m0_1|u_logic|J0l2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Omk2z4 , soc_inst|m0_1|u_logic|Omk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vvx2z4 , soc_inst|m0_1|u_logic|Vvx2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Msyvx4 , soc_inst|m0_1|u_logic|Msyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jyb2z4~2 , soc_inst|m0_1|u_logic|Jyb2z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~0 , soc_inst|m0_1|u_logic|Scpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dks2z4 , soc_inst|m0_1|u_logic|Dks2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8b2z4 , soc_inst|m0_1|u_logic|N8b2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~5 , soc_inst|m0_1|u_logic|Vsywx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Svs2z4 , soc_inst|m0_1|u_logic|Svs2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~3 , soc_inst|m0_1|u_logic|Vsywx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~2 , soc_inst|m0_1|u_logic|Vsywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~4 , soc_inst|m0_1|u_logic|Vsywx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~0 , soc_inst|m0_1|u_logic|Vsywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~1 , soc_inst|m0_1|u_logic|Vsywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~6 , soc_inst|m0_1|u_logic|Vsywx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Inb2z4 , soc_inst|m0_1|u_logic|Inb2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~4 , soc_inst|m0_1|u_logic|Luywx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~3 , soc_inst|m0_1|u_logic|Luywx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~0 , soc_inst|m0_1|u_logic|Luywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~5 , soc_inst|m0_1|u_logic|Luywx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~2 , soc_inst|m0_1|u_logic|Luywx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~1 , soc_inst|m0_1|u_logic|Luywx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Luywx4~6 , soc_inst|m0_1|u_logic|Luywx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~0 , soc_inst|m0_1|u_logic|Ypa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~0 , soc_inst|m0_1|u_logic|Poa2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~0 , soc_inst|m0_1|u_logic|Ik4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bk4wx4 , soc_inst|m0_1|u_logic|Bk4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ik4wx4~1 , soc_inst|m0_1|u_logic|Ik4wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xtywx4~0 , soc_inst|m0_1|u_logic|Xtywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ypa2z4~1 , soc_inst|m0_1|u_logic|Ypa2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~0 , soc_inst|m0_1|u_logic|Z5pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It52z4~0 , soc_inst|m0_1|u_logic|It52z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ipsvx4~0 , soc_inst|m0_1|u_logic|Ipsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It52z4~1 , soc_inst|m0_1|u_logic|It52z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7mwx4 , soc_inst|m0_1|u_logic|E7mwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vaw2z4 , soc_inst|m0_1|u_logic|Vaw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pfovx4~0 , soc_inst|m0_1|u_logic|Pfovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Knhvx4~0 , soc_inst|m0_1|u_logic|Knhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mww2z4 , soc_inst|m0_1|u_logic|Mww2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zgsvx4~0 , soc_inst|m0_1|u_logic|Zgsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T4nvx4~0 , soc_inst|m0_1|u_logic|T4nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T4nvx4~1 , soc_inst|m0_1|u_logic|T4nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hyy2z4 , soc_inst|m0_1|u_logic|Hyy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ocfwx4~0 , soc_inst|m0_1|u_logic|Ocfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rafwx4~0 , soc_inst|m0_1|u_logic|Rafwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rni2z4 , soc_inst|m0_1|u_logic|Rni2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Po83z4 , soc_inst|m0_1|u_logic|Po83z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE , soc_inst|m0_1|u_logic|Gf73z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~1 , soc_inst|m0_1|u_logic|Ylbwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhn2z4 , soc_inst|m0_1|u_logic|Mhn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Psv2z4 , soc_inst|m0_1|u_logic|Psv2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yfn2z4 , soc_inst|m0_1|u_logic|Yfn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4~0 , soc_inst|m0_1|u_logic|Ylbwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylbwx4 , soc_inst|m0_1|u_logic|Ylbwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vff2z4 , soc_inst|m0_1|u_logic|Vff2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aeg2z4 , soc_inst|m0_1|u_logic|Aeg2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tdg2z4 , soc_inst|m0_1|u_logic|Tdg2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qhe2z4 , soc_inst|m0_1|u_logic|Qhe2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hhd2z4 , soc_inst|m0_1|u_logic|Hhd2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jhe2z4 , soc_inst|m0_1|u_logic|Jhe2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohd2z4 , soc_inst|m0_1|u_logic|Ohd2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~4 , soc_inst|m0_1|u_logic|Mgd2z4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cgf2z4 , soc_inst|m0_1|u_logic|Cgf2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~0 , soc_inst|m0_1|u_logic|Mgd2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~0 , soc_inst|m0_1|u_logic|Gzvvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~1 , soc_inst|m0_1|u_logic|Gzvvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~2 , soc_inst|m0_1|u_logic|Gzvvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O092z4~0 , soc_inst|m0_1|u_logic|O092z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T50wx4~0 , soc_inst|m0_1|u_logic|T50wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|half_word_address~0 , soc_inst|switches_1|half_word_address~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte2~0 , soc_inst|ram_1|byte2~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[2] , soc_inst|ram_1|byte_select[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[16]~7 , soc_inst|interconnect_1|HRDATA[16]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][0] , soc_inst|switches_1|switch_store[1][0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[16]~30 , soc_inst|interconnect_1|HRDATA[16]~30, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yzi2z4 , soc_inst|m0_1|u_logic|Yzi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~0 , soc_inst|m0_1|u_logic|Qdnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qqhvx4~0 , soc_inst|m0_1|u_logic|Qqhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ydw2z4 , soc_inst|m0_1|u_logic|Ydw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~1 , soc_inst|m0_1|u_logic|Qdnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdnvx4~2 , soc_inst|m0_1|u_logic|Qdnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Yzi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~0 , soc_inst|m0_1|u_logic|Kfpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~1 , soc_inst|m0_1|u_logic|Kfpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~2 , soc_inst|m0_1|u_logic|Kfpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~3 , soc_inst|m0_1|u_logic|Kfpvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~4 , soc_inst|m0_1|u_logic|Kfpvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jipvx4~0 , soc_inst|m0_1|u_logic|Jipvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kfpvx4~5 , soc_inst|m0_1|u_logic|Kfpvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE , soc_inst|m0_1|u_logic|Qzq2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W4ywx4~0 , soc_inst|m0_1|u_logic|W4ywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mzxwx4~0 , soc_inst|m0_1|u_logic|Mzxwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pkwwx4~0 , soc_inst|m0_1|u_logic|Pkwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~0 , soc_inst|m0_1|u_logic|Kkyvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~0 , soc_inst|m0_1|u_logic|C2rvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~1 , soc_inst|m0_1|u_logic|C2rvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2rvx4~2 , soc_inst|m0_1|u_logic|C2rvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~2 , soc_inst|m0_1|u_logic|Scpvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rxl2z4 , soc_inst|m0_1|u_logic|Rxl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pqrvx4~0 , soc_inst|m0_1|u_logic|Pqrvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~0 , soc_inst|m0_1|u_logic|S7nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jqhvx4~0 , soc_inst|m0_1|u_logic|Jqhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mfw2z4 , soc_inst|m0_1|u_logic|Mfw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S7nvx4~1 , soc_inst|m0_1|u_logic|S7nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE , soc_inst|m0_1|u_logic|Rxl2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~1 , soc_inst|m0_1|u_logic|Fmqvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~0 , soc_inst|m0_1|u_logic|Fmqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Onqvx4~0 , soc_inst|m0_1|u_logic|Onqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~2 , soc_inst|m0_1|u_logic|Fmqvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fmqvx4~3 , soc_inst|m0_1|u_logic|Fmqvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzl2z4 , soc_inst|m0_1|u_logic|Fzl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U09wx4~0 , soc_inst|m0_1|u_logic|U09wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fcj2z4 , soc_inst|m0_1|u_logic|Fcj2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cxhvx4~0 , soc_inst|m0_1|u_logic|Cxhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Cxhvx4~1 , soc_inst|m0_1|u_logic|Cxhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcj2z4 , soc_inst|m0_1|u_logic|Fcj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qbpvx4~0 , soc_inst|m0_1|u_logic|Qbpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wmhvx4~0 , soc_inst|m0_1|u_logic|Wmhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzw2z4 , soc_inst|m0_1|u_logic|Qzw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~0 , soc_inst|m0_1|u_logic|M4nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|N8nvx4~0 , soc_inst|m0_1|u_logic|N8nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fey2z4 , soc_inst|m0_1|u_logic|Fey2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~1 , soc_inst|m0_1|u_logic|M4nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~2 , soc_inst|m0_1|u_logic|M4nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H9i2z4 , soc_inst|m0_1|u_logic|H9i2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C2yvx4 , soc_inst|m0_1|u_logic|C2yvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~2 , soc_inst|m0_1|u_logic|Z5pvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~3 , soc_inst|m0_1|u_logic|Z5pvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|It52z4~2 , soc_inst|m0_1|u_logic|It52z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte3~0 , soc_inst|ram_1|byte3~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|byte_select[3]~DUPLICATE , soc_inst|ram_1|byte_select[3]~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[26]~0 , soc_inst|interconnect_1|HRDATA[26]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dnhvx4~0 , soc_inst|m0_1|u_logic|Dnhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Byw2z4 , soc_inst|m0_1|u_logic|Byw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~1 , soc_inst|m0_1|u_logic|Ajnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~0 , soc_inst|m0_1|u_logic|Ajnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajnvx4~2 , soc_inst|m0_1|u_logic|Ajnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qem2z4 , soc_inst|m0_1|u_logic|Qem2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~1 , soc_inst|m0_1|u_logic|Qllwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pa7wx4~0 , soc_inst|m0_1|u_logic|Pa7wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~0 , soc_inst|m0_1|u_logic|Q3xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~1 , soc_inst|m0_1|u_logic|Q3xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~2 , soc_inst|m0_1|u_logic|Qllwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~3 , soc_inst|m0_1|u_logic|Qllwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~4 , soc_inst|m0_1|u_logic|Qllwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jeewx4 , soc_inst|m0_1|u_logic|Jeewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zmlwx4~0 , soc_inst|m0_1|u_logic|Zmlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~0 , soc_inst|m0_1|u_logic|Hklwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~2 , soc_inst|m0_1|u_logic|Hklwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~3 , soc_inst|m0_1|u_logic|Hklwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~4 , soc_inst|m0_1|u_logic|Hklwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bthvx4~0 , soc_inst|m0_1|u_logic|Bthvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4 , soc_inst|m0_1|u_logic|Cyq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Emewx4~0 , soc_inst|m0_1|u_logic|Emewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wvswx4~0 , soc_inst|m0_1|u_logic|Wvswx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~0 , soc_inst|m0_1|u_logic|Fjswx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fjswx4~1 , soc_inst|m0_1|u_logic|Fjswx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T1d3z4 , soc_inst|m0_1|u_logic|T1d3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~4 , soc_inst|m0_1|u_logic|Eo5wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~3 , soc_inst|m0_1|u_logic|Eo5wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Eo5wx4~0 , soc_inst|m0_1|u_logic|Eo5wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~0 , soc_inst|m0_1|u_logic|Ylwwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ylwwx4~1 , soc_inst|m0_1|u_logic|Ylwwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ok7wx4~1 , soc_inst|m0_1|u_logic|Ok7wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Manwx4~0 , soc_inst|m0_1|u_logic|Manwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S1ewx4~0 , soc_inst|m0_1|u_logic|S1ewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|W6iwx4 , soc_inst|m0_1|u_logic|W6iwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~0 , soc_inst|m0_1|u_logic|Wzpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wzpvx4~1 , soc_inst|m0_1|u_logic|Wzpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~0 , soc_inst|m0_1|u_logic|Thhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~1 , soc_inst|m0_1|u_logic|Thhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thhvx4~2 , soc_inst|m0_1|u_logic|Thhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jux2z4 , soc_inst|m0_1|u_logic|Jux2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~0 , soc_inst|m0_1|u_logic|Khnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~1 , soc_inst|m0_1|u_logic|Khnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ohh3z4 , soc_inst|m0_1|u_logic|Ohh3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qh72z4~0 , soc_inst|m0_1|u_logic|Qh72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I453z4 , soc_inst|m0_1|u_logic|I453z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~0 , soc_inst|m0_1|u_logic|Tf72z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aez2z4 , soc_inst|m0_1|u_logic|Aez2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~1 , soc_inst|m0_1|u_logic|Tf72z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tiz2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~2 , soc_inst|m0_1|u_logic|Tf72z4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tf72z4~3 , soc_inst|m0_1|u_logic|Tf72z4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Esnvx4~0 , soc_inst|m0_1|u_logic|Esnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V2qvx4 , soc_inst|m0_1|u_logic|V2qvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|LessThan1~0 , soc_inst|interconnect_1|LessThan1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|mux_sel[2] , soc_inst|interconnect_1|mux_sel[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|Equal1~0 , soc_inst|interconnect_1|Equal1~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[0][3] , soc_inst|switches_1|switch_store[0][3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[3]~26 , soc_inst|interconnect_1|HRDATA[3]~26, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~0 , soc_inst|m0_1|u_logic|E7nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vphvx4~0 , soc_inst|m0_1|u_logic|Vphvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oiw2z4 , soc_inst|m0_1|u_logic|Oiw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~1 , soc_inst|m0_1|u_logic|E7nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7nvx4~2 , soc_inst|m0_1|u_logic|E7nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jky2z4 , soc_inst|m0_1|u_logic|Jky2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gxxvx4~0 , soc_inst|m0_1|u_logic|Gxxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Irxvx4~0 , soc_inst|m0_1|u_logic|Irxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zpxvx4~0 , soc_inst|m0_1|u_logic|Zpxvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6xvx4~0 , soc_inst|m0_1|u_logic|I6xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qzq2z4 , soc_inst|m0_1|u_logic|Qzq2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~1 , soc_inst|m0_1|u_logic|Z4xvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~2 , soc_inst|m0_1|u_logic|Z4xvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~0 , soc_inst|m0_1|u_logic|Z4xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z4xvx4~3 , soc_inst|m0_1|u_logic|Z4xvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zcn2z4 , soc_inst|m0_1|u_logic|Zcn2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z9dwx4~0 , soc_inst|m0_1|u_logic|Z9dwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jk0xx4~0 , soc_inst|m0_1|u_logic|Jk0xx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aj0xx4 , soc_inst|m0_1|u_logic|Aj0xx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gjqvx4~0 , soc_inst|m0_1|u_logic|Gjqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xdnvx4~0 , soc_inst|m0_1|u_logic|Xdnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thm2z4 , soc_inst|m0_1|u_logic|Thm2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C34wx4~0 , soc_inst|m0_1|u_logic|C34wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C34wx4 , soc_inst|m0_1|u_logic|C34wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~1 , soc_inst|m0_1|u_logic|I0hwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~0 , soc_inst|m0_1|u_logic|I0hwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zygwx4~0 , soc_inst|m0_1|u_logic|Zygwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~0 , soc_inst|m0_1|u_logic|Tvgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~1 , soc_inst|m0_1|u_logic|Tvgwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hvhwx4~0 , soc_inst|m0_1|u_logic|Hvhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~0 , soc_inst|m0_1|u_logic|P0hwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~0 , soc_inst|m0_1|u_logic|Bfgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kugwx4~0 , soc_inst|m0_1|u_logic|Kugwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~0 , soc_inst|m0_1|u_logic|Togwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~1 , soc_inst|m0_1|u_logic|Togwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~2 , soc_inst|m0_1|u_logic|Togwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Togwx4~3 , soc_inst|m0_1|u_logic|Togwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekgwx4~0 , soc_inst|m0_1|u_logic|Ekgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~1 , soc_inst|m0_1|u_logic|Poa2z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~14 , soc_inst|m0_1|u_logic|Bfgwx4~14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~13 , soc_inst|m0_1|u_logic|Bfgwx4~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~15 , soc_inst|m0_1|u_logic|Bfgwx4~15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~16 , soc_inst|m0_1|u_logic|Bfgwx4~16, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Itgwx4~0 , soc_inst|m0_1|u_logic|Itgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~6 , soc_inst|m0_1|u_logic|Bfgwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~7 , soc_inst|m0_1|u_logic|Bfgwx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~5 , soc_inst|m0_1|u_logic|Bfgwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~8 , soc_inst|m0_1|u_logic|Bfgwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~9 , soc_inst|m0_1|u_logic|Bfgwx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~3 , soc_inst|m0_1|u_logic|P0hwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~10 , soc_inst|m0_1|u_logic|Bfgwx4~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~11 , soc_inst|m0_1|u_logic|Bfgwx4~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ugewx4~0 , soc_inst|m0_1|u_logic|Ugewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~18 , soc_inst|m0_1|u_logic|Bfgwx4~18, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hahwx4~0 , soc_inst|m0_1|u_logic|Hahwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Thgwx4~0 , soc_inst|m0_1|u_logic|Thgwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~1 , soc_inst|m0_1|u_logic|Mhgwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~1 , soc_inst|m0_1|u_logic|Bfgwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~2 , soc_inst|m0_1|u_logic|P0hwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bhewx4~0 , soc_inst|m0_1|u_logic|Bhewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~4 , soc_inst|m0_1|u_logic|Bfgwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ahhwx4~0 , soc_inst|m0_1|u_logic|Ahhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~2 , soc_inst|m0_1|u_logic|Bfgwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~3 , soc_inst|m0_1|u_logic|Bfgwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~12 , soc_inst|m0_1|u_logic|Bfgwx4~12, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~17 , soc_inst|m0_1|u_logic|Bfgwx4~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4 , soc_inst|m0_1|u_logic|Bfgwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sgj2z4 , soc_inst|m0_1|u_logic|Sgj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~0 , soc_inst|m0_1|u_logic|Dcrwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fcj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pfovx4~0 , soc_inst|m0_1|u_logic|Pfovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ynhvx4~0 , soc_inst|m0_1|u_logic|Ynhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Itw2z4 , soc_inst|m0_1|u_logic|Itw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcsvx4~0 , soc_inst|m0_1|u_logic|Dcsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~0 , soc_inst|m0_1|u_logic|H5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H5nvx4~1 , soc_inst|m0_1|u_logic|H5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE , soc_inst|m0_1|u_logic|Dvy2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W28wx4~0 , soc_inst|m0_1|u_logic|W28wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ho3wx4~0 , soc_inst|m0_1|u_logic|Ho3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~1 , soc_inst|m0_1|u_logic|Df3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qp3wx4~0 , soc_inst|m0_1|u_logic|Qp3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~0 , soc_inst|m0_1|u_logic|Df3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~2 , soc_inst|m0_1|u_logic|Df3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~3 , soc_inst|m0_1|u_logic|Df3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~4 , soc_inst|m0_1|u_logic|Df3wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~5 , soc_inst|m0_1|u_logic|Df3wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~6 , soc_inst|m0_1|u_logic|Df3wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~7 , soc_inst|m0_1|u_logic|Df3wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~8 , soc_inst|m0_1|u_logic|Df3wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Df3wx4~9 , soc_inst|m0_1|u_logic|Df3wx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W0pvx4 , soc_inst|m0_1|u_logic|W0pvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J4x2z4 , soc_inst|m0_1|u_logic|J4x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~0 , soc_inst|m0_1|u_logic|K4mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K4mvx4~1 , soc_inst|m0_1|u_logic|K4mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jw93z4 , soc_inst|m0_1|u_logic|Jw93z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~1 , soc_inst|m0_1|u_logic|Xhbwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~3 , soc_inst|m0_1|u_logic|Xhbwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Okn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE , soc_inst|m0_1|u_logic|Wa03z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~2 , soc_inst|m0_1|u_logic|Xhbwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xhbwx4~0 , soc_inst|m0_1|u_logic|Xhbwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qrnvx4~0 , soc_inst|m0_1|u_logic|Qrnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uzvvx4~0 , soc_inst|m0_1|u_logic|Uzvvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fvovx4 , soc_inst|m0_1|u_logic|Fvovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|saved_word_address[0] , soc_inst|ram_1|saved_word_address[0], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory.raddr_a[0]~0 , soc_inst|ram_1|memory.raddr_a[0]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~1 , soc_inst|m0_1|u_logic|Ny3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[24]~26 , soc_inst|ram_1|data_to_memory[24]~26, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[16]~25 , soc_inst|ram_1|data_to_memory[16]~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][8] , soc_inst|switches_1|switch_store[1][8], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[24]~6 , soc_inst|interconnect_1|HRDATA[24]~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[24]~17 , soc_inst|interconnect_1|HRDATA[24]~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[24]~31 , soc_inst|interconnect_1|HRDATA[24]~31, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE , soc_inst|m0_1|u_logic|K6y2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~9 , soc_inst|m0_1|u_logic|Add1~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kanvx4~0 , soc_inst|m0_1|u_logic|Kanvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W4y2z4 , soc_inst|m0_1|u_logic|W4y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~21 , soc_inst|m0_1|u_logic|Add1~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Danvx4~0 , soc_inst|m0_1|u_logic|Danvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K6y2z4 , soc_inst|m0_1|u_logic|K6y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mohvx4~0 , soc_inst|m0_1|u_logic|Mohvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gqw2z4 , soc_inst|m0_1|u_logic|Gqw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~1 , soc_inst|m0_1|u_logic|V5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~0 , soc_inst|m0_1|u_logic|V5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5nvx4~2 , soc_inst|m0_1|u_logic|V5nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bsy2z4 , soc_inst|m0_1|u_logic|Bsy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~1 , soc_inst|m0_1|u_logic|Jm6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~2 , soc_inst|m0_1|u_logic|Jm6wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~3 , soc_inst|m0_1|u_logic|Jm6wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gpjwx4~0 , soc_inst|m0_1|u_logic|Gpjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ua6wx4~0 , soc_inst|m0_1|u_logic|Ua6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~0 , soc_inst|m0_1|u_logic|Q86wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Na6wx4~0 , soc_inst|m0_1|u_logic|Na6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~1 , soc_inst|m0_1|u_logic|Q86wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rqywx4~0 , soc_inst|m0_1|u_logic|Rqywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~2 , soc_inst|m0_1|u_logic|C6mwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~7 , soc_inst|m0_1|u_logic|Vsywx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~0 , soc_inst|m0_1|u_logic|C6mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~3 , soc_inst|m0_1|u_logic|C6mwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V5mwx4~0 , soc_inst|m0_1|u_logic|V5mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G9w2z4 , soc_inst|m0_1|u_logic|G9w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xf6wx4~0 , soc_inst|m0_1|u_logic|Xf6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uijwx4~0 , soc_inst|m0_1|u_logic|Uijwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qf6wx4~0 , soc_inst|m0_1|u_logic|Qf6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uv6wx4 , soc_inst|m0_1|u_logic|Uv6wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~2 , soc_inst|m0_1|u_logic|Q86wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~3 , soc_inst|m0_1|u_logic|Q86wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~4 , soc_inst|m0_1|u_logic|Q86wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~5 , soc_inst|m0_1|u_logic|Q86wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Md6wx4~0 , soc_inst|m0_1|u_logic|Md6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~0 , soc_inst|m0_1|u_logic|Dc6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dc6wx4~1 , soc_inst|m0_1|u_logic|Dc6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~0 , soc_inst|m0_1|u_logic|Mhgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iikwx4~0 , soc_inst|m0_1|u_logic|Iikwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q86wx4~6 , soc_inst|m0_1|u_logic|Q86wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~0 , soc_inst|m0_1|u_logic|Eyhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~6 , soc_inst|m0_1|u_logic|Jm6wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyewx4 , soc_inst|m0_1|u_logic|Hyewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~0 , soc_inst|m0_1|u_logic|Jm6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~4 , soc_inst|m0_1|u_logic|Jm6wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~5 , soc_inst|m0_1|u_logic|Jm6wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ad7wx4~0 , soc_inst|m0_1|u_logic|Ad7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~0 , soc_inst|m0_1|u_logic|Xt6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~1 , soc_inst|m0_1|u_logic|Q07wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X07wx4~0 , soc_inst|m0_1|u_logic|X07wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gci2z4 , soc_inst|m0_1|u_logic|Gci2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q07wx4~0 , soc_inst|m0_1|u_logic|Q07wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xt6wx4~1 , soc_inst|m0_1|u_logic|Xt6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P28wx4 , soc_inst|m0_1|u_logic|P28wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jm6wx4~7 , soc_inst|m0_1|u_logic|Jm6wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Eyhvx4~1 , soc_inst|m0_1|u_logic|Eyhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Pdi2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bpzvx4~1 , soc_inst|m0_1|u_logic|Bpzvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I30wx4~1 , soc_inst|m0_1|u_logic|I30wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I30wx4~2 , soc_inst|m0_1|u_logic|I30wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X6m2z4 , soc_inst|m0_1|u_logic|X6m2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE , soc_inst|m0_1|u_logic|J5m2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gf43z4 , soc_inst|m0_1|u_logic|Gf43z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Po53z4 , soc_inst|m0_1|u_logic|Po53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4~2 , soc_inst|m0_1|u_logic|R40wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE , soc_inst|m0_1|u_logic|Ow13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE , soc_inst|m0_1|u_logic|Hyz2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4~1 , soc_inst|m0_1|u_logic|R40wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4~0 , soc_inst|m0_1|u_logic|R40wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R40wx4 , soc_inst|m0_1|u_logic|R40wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[11]~8 , soc_inst|m0_1|u_logic|hwdata_o[11]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[11]~17 , soc_inst|ram_1|data_to_memory[11]~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[11]~24 , soc_inst|interconnect_1|HRDATA[11]~24, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~25 , soc_inst|m0_1|u_logic|Add1~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W9nvx4~0 , soc_inst|m0_1|u_logic|W9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y7y2z4 , soc_inst|m0_1|u_logic|Y7y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~29 , soc_inst|m0_1|u_logic|Add1~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Add1~13 , soc_inst|m0_1|u_logic|Add1~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I9nvx4~0 , soc_inst|m0_1|u_logic|I9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bby2z4 , soc_inst|m0_1|u_logic|Bby2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B9nvx4~0 , soc_inst|m0_1|u_logic|B9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qcy2z4 , soc_inst|m0_1|u_logic|Qcy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Knhvx4~0 , soc_inst|m0_1|u_logic|Knhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mww2z4 , soc_inst|m0_1|u_logic|Mww2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zgsvx4~0 , soc_inst|m0_1|u_logic|Zgsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T4nvx4~0 , soc_inst|m0_1|u_logic|T4nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T4nvx4~1 , soc_inst|m0_1|u_logic|T4nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hyy2z4 , soc_inst|m0_1|u_logic|Hyy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekc2z4~0 , soc_inst|m0_1|u_logic|Ekc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Skc2z4~0 , soc_inst|m0_1|u_logic|Skc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~0 , soc_inst|m0_1|u_logic|Mhc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~1 , soc_inst|m0_1|u_logic|Mhc2z4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~1 , soc_inst|m0_1|u_logic|Dcrwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~0 , soc_inst|m0_1|u_logic|Dcrwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~2 , soc_inst|m0_1|u_logic|Dcrwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4w2z4 , soc_inst|m0_1|u_logic|S4w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zdc2z4~0 , soc_inst|m0_1|u_logic|Zdc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~2 , soc_inst|m0_1|u_logic|Mhc2z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~3 , soc_inst|m0_1|u_logic|Mhc2z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~2 , soc_inst|m0_1|u_logic|Mhc2z4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wmc2z4~0 , soc_inst|m0_1|u_logic|Wmc2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~4 , soc_inst|m0_1|u_logic|Mhc2z4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Skc2z4~0 , soc_inst|m0_1|u_logic|Skc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~0 , soc_inst|m0_1|u_logic|Mhc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ekc2z4~0 , soc_inst|m0_1|u_logic|Ekc2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mhc2z4~1 , soc_inst|m0_1|u_logic|Mhc2z4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~4 , soc_inst|m0_1|u_logic|Dcrwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mac2z4~0 , soc_inst|m0_1|u_logic|Mac2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Kgc2z4~0 , soc_inst|m0_1|u_logic|Kgc2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~3 , soc_inst|m0_1|u_logic|Dcrwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mac2z4~0 , soc_inst|m0_1|u_logic|Mac2z4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~5 , soc_inst|m0_1|u_logic|Dcrwx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Dcrwx4~6 , soc_inst|m0_1|u_logic|Dcrwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yghvx4~0 , soc_inst|m0_1|u_logic|Yghvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tyx2z4 , soc_inst|m0_1|u_logic|Tyx2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~1 , soc_inst|m0_1|u_logic|Scpvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Scpvx4~2 , soc_inst|m0_1|u_logic|Scpvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vapvx4 , soc_inst|m0_1|u_logic|Vapvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qaiwx4~0 , soc_inst|m0_1|u_logic|Qaiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H4nwx4 , soc_inst|m0_1|u_logic|H4nwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~0 , soc_inst|m0_1|u_logic|Ulhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ulhvx4~1 , soc_inst|m0_1|u_logic|Ulhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R8x2z4 , soc_inst|m0_1|u_logic|R8x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yuovx4 , soc_inst|m0_1|u_logic|Yuovx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jknvx4~0 , soc_inst|m0_1|u_logic|Jknvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE , soc_inst|m0_1|u_logic|Lz93z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfuwx4 , soc_inst|m0_1|u_logic|Wfuwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o~18 , soc_inst|m0_1|u_logic|hwdata_o~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ynvvx4 , soc_inst|m0_1|u_logic|Ynvvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~0 , soc_inst|m0_1|u_logic|M5mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M5mvx4~1 , soc_inst|m0_1|u_logic|M5mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hzj2z4 , soc_inst|m0_1|u_logic|Hzj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pwywx4~0 , soc_inst|m0_1|u_logic|Pwywx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~1 , soc_inst|m0_1|u_logic|C6mwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z9dwx4~0 , soc_inst|m0_1|u_logic|Z9dwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jk0xx4~0 , soc_inst|m0_1|u_logic|Jk0xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aj0xx4 , soc_inst|m0_1|u_logic|Aj0xx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gjqvx4~0 , soc_inst|m0_1|u_logic|Gjqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Abovx4~0 , soc_inst|m0_1|u_logic|Abovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zlnvx4~0 , soc_inst|m0_1|u_logic|Zlnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nbm2z4 , soc_inst|m0_1|u_logic|Nbm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P9nvx4~0 , soc_inst|m0_1|u_logic|P9nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M9y2z4 , soc_inst|m0_1|u_logic|M9y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oylwx4~0 , soc_inst|m0_1|u_logic|Oylwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oylwx4~1 , soc_inst|m0_1|u_logic|Oylwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|By4wx4 , soc_inst|m0_1|u_logic|By4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Y6t2z4 , soc_inst|m0_1|u_logic|Y6t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z6c2z4~0 , soc_inst|m0_1|u_logic|Z6c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C5c2z4~2 , soc_inst|m0_1|u_logic|C5c2z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Una2z4~0 , soc_inst|m0_1|u_logic|Una2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4~2 , soc_inst|m0_1|u_logic|Ppsvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ppsvx4 , soc_inst|m0_1|u_logic|Ppsvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~0 , soc_inst|m0_1|u_logic|S6ovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S6ovx4~1 , soc_inst|m0_1|u_logic|S6ovx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|always1~0 , soc_inst|ram_1|always1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[0]~DUPLICATE , soc_inst|ram_1|byte_select[0]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[1]~37 , soc_inst|interconnect_1|HRDATA[1]~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[1]~20 , soc_inst|interconnect_1|HRDATA[1]~20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|DataValid~0 , soc_inst|switches_1|DataValid~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|DataValid[1] , soc_inst|switches_1|DataValid[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][1] , soc_inst|switches_1|switch_store[0][1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[1]~12 , soc_inst|ram_1|data_to_memory[1]~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|data_to_memory[25]~11 , soc_inst|ram_1|data_to_memory[25]~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|ram_1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[1]~21 , soc_inst|interconnect_1|HRDATA[1]~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hcnvx4~0 , soc_inst|m0_1|u_logic|Hcnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dwl2z4 , soc_inst|m0_1|u_logic|Dwl2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Acnvx4~0 , soc_inst|m0_1|u_logic|Acnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G0w2z4 , soc_inst|m0_1|u_logic|G0w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qnyvx4~0 , soc_inst|m0_1|u_logic|Qnyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~0 , soc_inst|m0_1|u_logic|Vllvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vllvx4~1 , soc_inst|m0_1|u_logic|Vllvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U4z2z4 , soc_inst|m0_1|u_logic|U4z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~0 , soc_inst|m0_1|u_logic|Htyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE , soc_inst|m0_1|u_logic|Cy33z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~1 , soc_inst|m0_1|u_logic|Htyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE , soc_inst|m0_1|u_logic|Kf13z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|To23z4 , soc_inst|m0_1|u_logic|To23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~2 , soc_inst|m0_1|u_logic|Htyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htyvx4~3 , soc_inst|m0_1|u_logic|Htyvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwdata_o[1] , soc_inst|m0_1|u_logic|hwdata_o[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R0t2z4 , soc_inst|m0_1|u_logic|R0t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rexvx4~0 , soc_inst|m0_1|u_logic|Rexvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qx52z4~0 , soc_inst|m0_1|u_logic|Qx52z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~4 , soc_inst|m0_1|u_logic|hprot_o~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sy52z4~0 , soc_inst|m0_1|u_logic|Sy52z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z0mwx4~0 , soc_inst|m0_1|u_logic|Z0mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~2 , soc_inst|m0_1|u_logic|hprot_o~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~3 , soc_inst|m0_1|u_logic|hprot_o~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~5 , soc_inst|m0_1|u_logic|hprot_o~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U5qvx4 , soc_inst|m0_1|u_logic|U5qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wxp2z4 , soc_inst|m0_1|u_logic|Wxp2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mtwwx4~0 , soc_inst|m0_1|u_logic|Mtwwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~2 , soc_inst|m0_1|u_logic|G5qvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G5qvx4~1 , soc_inst|m0_1|u_logic|G5qvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Knz2z4 , soc_inst|m0_1|u_logic|Knz2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ek03z4 , soc_inst|m0_1|u_logic|Ek03z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~2 , soc_inst|m0_1|u_logic|Oxnvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qz33z4 , soc_inst|m0_1|u_logic|Qz33z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z853z4 , soc_inst|m0_1|u_logic|Z853z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~0 , soc_inst|m0_1|u_logic|Oxnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hq23z4 , soc_inst|m0_1|u_logic|Hq23z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg13z4~feeder , soc_inst|m0_1|u_logic|Yg13z4~feeder, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yg13z4 , soc_inst|m0_1|u_logic|Yg13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~1 , soc_inst|m0_1|u_logic|Oxnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Oxnvx4~3 , soc_inst|m0_1|u_logic|Oxnvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N5qvx4~0 , soc_inst|m0_1|u_logic|N5qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte1~0 , soc_inst|ram_1|byte1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[1] , soc_inst|ram_1|byte_select[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|read_cycle~DUPLICATE , soc_inst|ram_1|read_cycle~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[11]~3 , soc_inst|interconnect_1|HRDATA[11]~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[15]~4 , soc_inst|interconnect_1|HRDATA[15]~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~0 , soc_inst|m0_1|u_logic|Hjnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G8nvx4~0 , soc_inst|m0_1|u_logic|G8nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ufy2z4 , soc_inst|m0_1|u_logic|Ufy2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Pmhvx4~0 , soc_inst|m0_1|u_logic|Pmhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|F1x2z4 , soc_inst|m0_1|u_logic|F1x2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G8nvx4~0 , soc_inst|m0_1|u_logic|G8nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ufy2z4 , soc_inst|m0_1|u_logic|Ufy2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~1 , soc_inst|m0_1|u_logic|Hjnvx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Hjnvx4~2 , soc_inst|m0_1|u_logic|Hjnvx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|U2x2z4 , soc_inst|m0_1|u_logic|U2x2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wpkwx4~0 , soc_inst|m0_1|u_logic|Wpkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Akewx4~1 , soc_inst|m0_1|u_logic|Akewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yiewx4~0 , soc_inst|m0_1|u_logic|Yiewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lgkwx4~0 , soc_inst|m0_1|u_logic|Lgkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Unewx4~0 , soc_inst|m0_1|u_logic|Unewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Unewx4 , soc_inst|m0_1|u_logic|Unewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~0 , soc_inst|m0_1|u_logic|Sfewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~1 , soc_inst|m0_1|u_logic|Sfewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~0 , soc_inst|m0_1|u_logic|Fcewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~1 , soc_inst|m0_1|u_logic|Fcewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ws3wx4~0 , soc_inst|m0_1|u_logic|Ws3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~0 , soc_inst|m0_1|u_logic|H3ivx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~2 , soc_inst|m0_1|u_logic|H3ivx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~3 , soc_inst|m0_1|u_logic|H3ivx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Si4wx4~0 , soc_inst|m0_1|u_logic|Si4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~0 , soc_inst|m0_1|u_logic|Pd4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~1 , soc_inst|m0_1|u_logic|Pd4wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pd4wx4~2 , soc_inst|m0_1|u_logic|Pd4wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q5vvx4~1 , soc_inst|m0_1|u_logic|Q5vvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~2 , soc_inst|m0_1|u_logic|Av3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ipn2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~3 , soc_inst|m0_1|u_logic|Av3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~4 , soc_inst|m0_1|u_logic|Av3wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~1 , soc_inst|m0_1|u_logic|Av3wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gxk2z4 , soc_inst|m0_1|u_logic|Gxk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~5 , soc_inst|m0_1|u_logic|Av3wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~7 , soc_inst|m0_1|u_logic|Av3wx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~6 , soc_inst|m0_1|u_logic|Av3wx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~8 , soc_inst|m0_1|u_logic|Av3wx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~9 , soc_inst|m0_1|u_logic|Av3wx4~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~2 , soc_inst|m0_1|u_logic|Ny3wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~3 , soc_inst|m0_1|u_logic|Ny3wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~4 , soc_inst|m0_1|u_logic|Ny3wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~5 , soc_inst|m0_1|u_logic|Ny3wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~10 , soc_inst|m0_1|u_logic|Av3wx4~10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~11 , soc_inst|m0_1|u_logic|Av3wx4~11, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~0 , soc_inst|m0_1|u_logic|Av3wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~1 , soc_inst|m0_1|u_logic|H3ivx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~4 , soc_inst|m0_1|u_logic|H3ivx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Gji2z4 , soc_inst|m0_1|u_logic|Gji2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~0 , soc_inst|m0_1|u_logic|Pw6wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~1 , soc_inst|m0_1|u_logic|Pw6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|My6wx4~1 , soc_inst|m0_1|u_logic|My6wx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lfewx4 , soc_inst|m0_1|u_logic|Lfewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~2 , soc_inst|m0_1|u_logic|Pw6wx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~3 , soc_inst|m0_1|u_logic|Pw6wx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~4 , soc_inst|m0_1|u_logic|Pw6wx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~5 , soc_inst|m0_1|u_logic|Pw6wx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vz6wx4 , soc_inst|m0_1|u_logic|Vz6wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4 , soc_inst|m0_1|u_logic|Pw6wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE , soc_inst|m0_1|u_logic|Tki2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Srgwx4~0 , soc_inst|m0_1|u_logic|Srgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fzyvx4~0 , soc_inst|m0_1|u_logic|Fzyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mk6wx4~0 , soc_inst|m0_1|u_logic|Mk6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~0 , soc_inst|m0_1|u_logic|X3xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|X3xvx4~1 , soc_inst|m0_1|u_logic|X3xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pa7wx4~0 , soc_inst|m0_1|u_logic|Pa7wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~0 , soc_inst|m0_1|u_logic|Q3xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q3xvx4~1 , soc_inst|m0_1|u_logic|Q3xvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~2 , soc_inst|m0_1|u_logic|U6wvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~4 , soc_inst|m0_1|u_logic|U6wvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~1 , soc_inst|m0_1|u_logic|U6wvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~3 , soc_inst|m0_1|u_logic|U6wvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~5 , soc_inst|m0_1|u_logic|U6wvx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~0 , soc_inst|m0_1|u_logic|U6wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~6 , soc_inst|m0_1|u_logic|U6wvx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~7 , soc_inst|m0_1|u_logic|U6wvx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndwvx4~0 , soc_inst|m0_1|u_logic|Ndwvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~0 , soc_inst|m0_1|u_logic|I3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I3mvx4~1 , soc_inst|m0_1|u_logic|I3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K1z2z4 , soc_inst|m0_1|u_logic|K1z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~0 , soc_inst|m0_1|u_logic|E4xvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~0 , soc_inst|m0_1|u_logic|Hklwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~2 , soc_inst|m0_1|u_logic|Hklwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~3 , soc_inst|m0_1|u_logic|Hklwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jeewx4 , soc_inst|m0_1|u_logic|Jeewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zmlwx4~0 , soc_inst|m0_1|u_logic|Zmlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hklwx4~4 , soc_inst|m0_1|u_logic|Hklwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bthvx4~0 , soc_inst|m0_1|u_logic|Bthvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cyq2z4 , soc_inst|m0_1|u_logic|Cyq2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vff2z4 , soc_inst|m0_1|u_logic|Vff2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aeg2z4 , soc_inst|m0_1|u_logic|Aeg2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tdg2z4 , soc_inst|m0_1|u_logic|Tdg2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jhe2z4 , soc_inst|m0_1|u_logic|Jhe2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qhe2z4 , soc_inst|m0_1|u_logic|Qhe2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hhd2z4 , soc_inst|m0_1|u_logic|Hhd2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohd2z4 , soc_inst|m0_1|u_logic|Ohd2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~4 , soc_inst|m0_1|u_logic|Mgd2z4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cgf2z4 , soc_inst|m0_1|u_logic|Cgf2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mgd2z4~0 , soc_inst|m0_1|u_logic|Mgd2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gzvvx4~2 , soc_inst|m0_1|u_logic|Gzvvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O092z4~0 , soc_inst|m0_1|u_logic|O092z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T50wx4~0 , soc_inst|m0_1|u_logic|T50wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|half_word_address~0 , soc_inst|switches_1|half_word_address~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte2~0 , soc_inst|ram_1|byte2~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|byte_select[2]~DUPLICATE , soc_inst|ram_1|byte_select[2]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[16]~7 , soc_inst|interconnect_1|HRDATA[16]~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[1][7] , soc_inst|switches_1|switch_store[1][7], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[23]~8 , soc_inst|interconnect_1|HRDATA[23]~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tohvx4~0 , soc_inst|m0_1|u_logic|Tohvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sow2z4 , soc_inst|m0_1|u_logic|Sow2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~1 , soc_inst|m0_1|u_logic|C6nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~0 , soc_inst|m0_1|u_logic|C6nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~2 , soc_inst|m0_1|u_logic|C6nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nqy2z4 , soc_inst|m0_1|u_logic|Nqy2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5wvx4~0 , soc_inst|m0_1|u_logic|Z5wvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~0 , soc_inst|m0_1|u_logic|W3mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|W3mvx4~1 , soc_inst|m0_1|u_logic|W3mvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I2t2z4 , soc_inst|m0_1|u_logic|I2t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V8yvx4~0 , soc_inst|m0_1|u_logic|V8yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~0 , soc_inst|m0_1|u_logic|D6yvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~1 , soc_inst|m0_1|u_logic|D6yvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~2 , soc_inst|m0_1|u_logic|D6yvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE , soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L61xx4~0 , soc_inst|m0_1|u_logic|L61xx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE , soc_inst|m0_1|u_logic|Hq23z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z853z4~DUPLICATE , soc_inst|m0_1|u_logic|Z853z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~2 , soc_inst|m0_1|u_logic|Zhyvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~1 , soc_inst|m0_1|u_logic|Zhyvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4~0 , soc_inst|m0_1|u_logic|Zhyvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zhyvx4 , soc_inst|m0_1|u_logic|Zhyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ujqvx4~0 , soc_inst|m0_1|u_logic|Ujqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xdnvx4~0 , soc_inst|m0_1|u_logic|Xdnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thm2z4 , soc_inst|m0_1|u_logic|Thm2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C34wx4~0 , soc_inst|m0_1|u_logic|C34wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~0 , soc_inst|m0_1|u_logic|Z5pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It52z4~0 , soc_inst|m0_1|u_logic|It52z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It52z4~1 , soc_inst|m0_1|u_logic|It52z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7mwx4 , soc_inst|m0_1|u_logic|E7mwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vaw2z4 , soc_inst|m0_1|u_logic|Vaw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bpsvx4~0 , soc_inst|m0_1|u_logic|Bpsvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Xnrvx4~0 , soc_inst|m0_1|u_logic|Xnrvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jvqvx4~0 , soc_inst|m0_1|u_logic|Jvqvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jnrvx4~0 , soc_inst|m0_1|u_logic|Jnrvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Jhy2z4 , soc_inst|m0_1|u_logic|Jhy2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wfovx4 , soc_inst|m0_1|u_logic|Wfovx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Oesvx4~0 , soc_inst|m0_1|u_logic|Oesvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~0 , soc_inst|m0_1|u_logic|A5nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rnhvx4~0 , soc_inst|m0_1|u_logic|Rnhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xuw2z4 , soc_inst|m0_1|u_logic|Xuw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A5nvx4~1 , soc_inst|m0_1|u_logic|A5nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Swy2z4 , soc_inst|m0_1|u_logic|Swy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nkpvx4~0 , soc_inst|m0_1|u_logic|Nkpvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~0 , soc_inst|m0_1|u_logic|Pyiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~1 , soc_inst|m0_1|u_logic|Pyiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Slnvx4~0 , soc_inst|m0_1|u_logic|Slnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T1y2z4 , soc_inst|m0_1|u_logic|T1y2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jcw2z4 , soc_inst|m0_1|u_logic|Jcw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Llnvx4~0 , soc_inst|m0_1|u_logic|Llnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Llnvx4 , soc_inst|m0_1|u_logic|Llnvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4 , soc_inst|m0_1|u_logic|Qdj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~0 , soc_inst|m0_1|u_logic|Fkkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~1 , soc_inst|m0_1|u_logic|Fkkwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pikwx4~0 , soc_inst|m0_1|u_logic|Pikwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Askwx4~0 , soc_inst|m0_1|u_logic|Askwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ugewx4~0 , soc_inst|m0_1|u_logic|Ugewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Askwx4~1 , soc_inst|m0_1|u_logic|Askwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~1 , soc_inst|m0_1|u_logic|Mkkwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~2 , soc_inst|m0_1|u_logic|Mkkwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lgkwx4~0 , soc_inst|m0_1|u_logic|Lgkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Unewx4~0 , soc_inst|m0_1|u_logic|Unewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Unewx4 , soc_inst|m0_1|u_logic|Unewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~7 , soc_inst|m0_1|u_logic|T6kwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~8 , soc_inst|m0_1|u_logic|T6kwx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~2 , soc_inst|m0_1|u_logic|T6kwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|My6wx4~1 , soc_inst|m0_1|u_logic|My6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hekwx4~0 , soc_inst|m0_1|u_logic|Hekwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~3 , soc_inst|m0_1|u_logic|T6kwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~0 , soc_inst|m0_1|u_logic|Mkkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bbkwx4~0 , soc_inst|m0_1|u_logic|Bbkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~1 , soc_inst|m0_1|u_logic|T6kwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8kwx4~0 , soc_inst|m0_1|u_logic|Q8kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bhewx4~0 , soc_inst|m0_1|u_logic|Bhewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~4 , soc_inst|m0_1|u_logic|T6kwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~5 , soc_inst|m0_1|u_logic|T6kwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~0 , soc_inst|m0_1|u_logic|T6kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aekwx4~0 , soc_inst|m0_1|u_logic|Aekwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~6 , soc_inst|m0_1|u_logic|T6kwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ruhvx4~0 , soc_inst|m0_1|u_logic|Ruhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4 , soc_inst|m0_1|u_logic|Nsk2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G1mwx4~0 , soc_inst|m0_1|u_logic|G1mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P2mwx4~0 , soc_inst|m0_1|u_logic|P2mwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hwrite_o~0 , soc_inst|m0_1|u_logic|hwrite_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|write_cycle~0 , soc_inst|ram_1|write_cycle~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|ram_1|write_cycle~DUPLICATE , soc_inst|ram_1|write_cycle~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[25]~18 , soc_inst|interconnect_1|HRDATA[25]~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fohvx4~0 , soc_inst|m0_1|u_logic|Fohvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Urw2z4 , soc_inst|m0_1|u_logic|Urw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~1 , soc_inst|m0_1|u_logic|O5nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~0 , soc_inst|m0_1|u_logic|O5nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5nvx4~2 , soc_inst|m0_1|u_logic|O5nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pty2z4 , soc_inst|m0_1|u_logic|Pty2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G27wx4~1 , soc_inst|m0_1|u_logic|G27wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~0 , soc_inst|m0_1|u_logic|Ubjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~1 , soc_inst|m0_1|u_logic|Ubjwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|S3jwx4~0 , soc_inst|m0_1|u_logic|S3jwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|X2jwx4~0 , soc_inst|m0_1|u_logic|X2jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~0 , soc_inst|m0_1|u_logic|Ofjwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ehjwx4~0 , soc_inst|m0_1|u_logic|Ehjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~0 , soc_inst|m0_1|u_logic|Ofjwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lhjwx4~0 , soc_inst|m0_1|u_logic|Lhjwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ofjwx4~1 , soc_inst|m0_1|u_logic|Ofjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~0 , soc_inst|m0_1|u_logic|Ubjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ubjwx4~1 , soc_inst|m0_1|u_logic|Ubjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hvhwx4~0 , soc_inst|m0_1|u_logic|Hvhwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~6 , soc_inst|m0_1|u_logic|Lwiwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~0 , soc_inst|m0_1|u_logic|Pyiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pyiwx4~1 , soc_inst|m0_1|u_logic|Pyiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T7jwx4 , soc_inst|m0_1|u_logic|T7jwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R6jwx4~0 , soc_inst|m0_1|u_logic|R6jwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~0 , soc_inst|m0_1|u_logic|Q6fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~1 , soc_inst|m0_1|u_logic|Q6fwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Eajwx4~0 , soc_inst|m0_1|u_logic|Eajwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Q9jwx4~0 , soc_inst|m0_1|u_logic|Q9jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~0 , soc_inst|m0_1|u_logic|Iyiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~1 , soc_inst|m0_1|u_logic|Iyiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~0 , soc_inst|m0_1|u_logic|Lwiwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Q2jwx4~0 , soc_inst|m0_1|u_logic|Q2jwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~1 , soc_inst|m0_1|u_logic|Lwiwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~2 , soc_inst|m0_1|u_logic|Lwiwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~3 , soc_inst|m0_1|u_logic|Lwiwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~0 , soc_inst|m0_1|u_logic|Iyiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Iyiwx4~1 , soc_inst|m0_1|u_logic|Iyiwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~0 , soc_inst|m0_1|u_logic|Lwiwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~4 , soc_inst|m0_1|u_logic|Lwiwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R6jwx4~0 , soc_inst|m0_1|u_logic|R6jwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T7jwx4 , soc_inst|m0_1|u_logic|T7jwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~0 , soc_inst|m0_1|u_logic|Q6fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q6fwx4~1 , soc_inst|m0_1|u_logic|Q6fwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lwiwx4~5 , soc_inst|m0_1|u_logic|Lwiwx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Fvhvx4~0 , soc_inst|m0_1|u_logic|Fvhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Npk2z4 , soc_inst|m0_1|u_logic|Npk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Y8pvx4~0 , soc_inst|m0_1|u_logic|Y8pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~0 , soc_inst|m0_1|u_logic|Ojnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~1 , soc_inst|m0_1|u_logic|Ojnvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~0 , soc_inst|m0_1|u_logic|J4pvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|J4pvx4~1 , soc_inst|m0_1|u_logic|J4pvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ojnvx4~2 , soc_inst|m0_1|u_logic|Ojnvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE , soc_inst|m0_1|u_logic|Z7i2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~0 , soc_inst|m0_1|u_logic|Rbi3z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~1 , soc_inst|m0_1|u_logic|Rbi3z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4 , soc_inst|m0_1|u_logic|Rbi3z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ueovx4~0 , soc_inst|m0_1|u_logic|Ueovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Slnvx4~0 , soc_inst|m0_1|u_logic|Slnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T1y2z4 , soc_inst|m0_1|u_logic|T1y2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Jcw2z4 , soc_inst|m0_1|u_logic|Jcw2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Llnvx4~0 , soc_inst|m0_1|u_logic|Llnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Llnvx4 , soc_inst|m0_1|u_logic|Llnvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qdj2z4 , soc_inst|m0_1|u_logic|Qdj2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~0 , soc_inst|m0_1|u_logic|U6wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~2 , soc_inst|m0_1|u_logic|U6wvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~1 , soc_inst|m0_1|u_logic|U6wvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~4 , soc_inst|m0_1|u_logic|U6wvx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~3 , soc_inst|m0_1|u_logic|U6wvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~5 , soc_inst|m0_1|u_logic|U6wvx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~6 , soc_inst|m0_1|u_logic|U6wvx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U6wvx4~7 , soc_inst|m0_1|u_logic|U6wvx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|F9wvx4~0 , soc_inst|m0_1|u_logic|F9wvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~0 , soc_inst|m0_1|u_logic|P3mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P3mvx4~1 , soc_inst|m0_1|u_logic|P3mvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Auk2z4 , soc_inst|m0_1|u_logic|Auk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E4xvx4~0 , soc_inst|m0_1|u_logic|E4xvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V8yvx4~0 , soc_inst|m0_1|u_logic|V8yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~1 , soc_inst|m0_1|u_logic|D6yvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~0 , soc_inst|m0_1|u_logic|D6yvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D6yvx4~2 , soc_inst|m0_1|u_logic|D6yvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE , soc_inst|m0_1|u_logic|H3d3z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ujqvx4~0 , soc_inst|m0_1|u_logic|Ujqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vsywx4~7 , soc_inst|m0_1|u_logic|Vsywx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~1 , soc_inst|m0_1|u_logic|C6mwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~2 , soc_inst|m0_1|u_logic|C6mwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~0 , soc_inst|m0_1|u_logic|C6mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6mwx4~3 , soc_inst|m0_1|u_logic|C6mwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Abovx4~0 , soc_inst|m0_1|u_logic|Abovx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vcnvx4~0 , soc_inst|m0_1|u_logic|Vcnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kyi2z4 , soc_inst|m0_1|u_logic|Kyi2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Kkyvx4~1 , soc_inst|m0_1|u_logic|Kkyvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ocnvx4~0 , soc_inst|m0_1|u_logic|Ocnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE , soc_inst|m0_1|u_logic|R1w2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q7mvx4~0 , soc_inst|m0_1|u_logic|Q7mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|U7w2z4 , soc_inst|m0_1|u_logic|U7w2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rqywx4~0 , soc_inst|m0_1|u_logic|Rqywx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|V5mwx4~0 , soc_inst|m0_1|u_logic|V5mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE , soc_inst|m0_1|u_logic|G9w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xx2wx4 , soc_inst|m0_1|u_logic|Xx2wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ejhwx4 , soc_inst|m0_1|u_logic|Ejhwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~0 , soc_inst|m0_1|u_logic|I0hwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~0 , soc_inst|m0_1|u_logic|Ndhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~1 , soc_inst|m0_1|u_logic|Ndhwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~2 , soc_inst|m0_1|u_logic|Ndhwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tghwx4~0 , soc_inst|m0_1|u_logic|Tghwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ahhwx4~0 , soc_inst|m0_1|u_logic|Ahhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fghwx4 , soc_inst|m0_1|u_logic|Fghwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~3 , soc_inst|m0_1|u_logic|Ndhwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sjhwx4~0 , soc_inst|m0_1|u_logic|Sjhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~4 , soc_inst|m0_1|u_logic|Ndhwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K0iwx4~0 , soc_inst|m0_1|u_logic|K0iwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K0iwx4~1 , soc_inst|m0_1|u_logic|K0iwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~1 , soc_inst|m0_1|u_logic|Fuhwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~2 , soc_inst|m0_1|u_logic|Fuhwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~3 , soc_inst|m0_1|u_logic|Fuhwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~4 , soc_inst|m0_1|u_logic|Fuhwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~5 , soc_inst|m0_1|u_logic|Fuhwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hohwx4~0 , soc_inst|m0_1|u_logic|Hohwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xphwx4~0 , soc_inst|m0_1|u_logic|Xphwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~1 , soc_inst|m0_1|u_logic|Rmhwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~0 , soc_inst|m0_1|u_logic|Rmhwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~2 , soc_inst|m0_1|u_logic|Rmhwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~3 , soc_inst|m0_1|u_logic|Rmhwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~4 , soc_inst|m0_1|u_logic|Rmhwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~5 , soc_inst|m0_1|u_logic|Rmhwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4 , soc_inst|m0_1|u_logic|Ndhwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fij2z4 , soc_inst|m0_1|u_logic|Fij2z4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ivewx4 , soc_inst|m0_1|u_logic|Ivewx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E7fwx4~0 , soc_inst|m0_1|u_logic|E7fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R3fwx4~0 , soc_inst|m0_1|u_logic|R3fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~0 , soc_inst|m0_1|u_logic|E0fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~1 , soc_inst|m0_1|u_logic|E0fwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~2 , soc_inst|m0_1|u_logic|E0fwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~1 , soc_inst|m0_1|u_logic|Dwewx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~0 , soc_inst|m0_1|u_logic|Dwewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bvewx4~0 , soc_inst|m0_1|u_logic|Bvewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~0 , soc_inst|m0_1|u_logic|Woewx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~5 , soc_inst|m0_1|u_logic|Woewx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Woewx4~4 , soc_inst|m0_1|u_logic|Woewx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Woewx4~3 , soc_inst|m0_1|u_logic|Woewx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~5 , soc_inst|m0_1|u_logic|Woewx4~5, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Woewx4~1 , soc_inst|m0_1|u_logic|Woewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~4 , soc_inst|m0_1|u_logic|Woewx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Woewx4~2 , soc_inst|m0_1|u_logic|Woewx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Woewx4~6 , soc_inst|m0_1|u_logic|Woewx4~6, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Woewx4~7 , soc_inst|m0_1|u_logic|Woewx4~7, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Woewx4~8 , soc_inst|m0_1|u_logic|Woewx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~0 , soc_inst|m0_1|u_logic|Dwewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Dwewx4~1 , soc_inst|m0_1|u_logic|Dwewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bvewx4~0 , soc_inst|m0_1|u_logic|Bvewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Woewx4~0 , soc_inst|m0_1|u_logic|Woewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~1 , soc_inst|m0_1|u_logic|E0fwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R3fwx4~0 , soc_inst|m0_1|u_logic|R3fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~0 , soc_inst|m0_1|u_logic|E0fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E0fwx4~2 , soc_inst|m0_1|u_logic|E0fwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E7fwx4~0 , soc_inst|m0_1|u_logic|E7fwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Woewx4~9 , soc_inst|m0_1|u_logic|Woewx4~9, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Qxhvx4~0 , soc_inst|m0_1|u_logic|Qxhvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE , soc_inst|m0_1|u_logic|Emi2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~0 , soc_inst|m0_1|u_logic|Ajfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vqfwx4~0 , soc_inst|m0_1|u_logic|Vqfwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Infwx4~0 , soc_inst|m0_1|u_logic|Infwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lsfwx4~1 , soc_inst|m0_1|u_logic|Lsfwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Lsfwx4~0 , soc_inst|m0_1|u_logic|Lsfwx4~0, de1_soc_wrapper, 1
@@ -4279,181 +4233,255 @@ instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~1 , soc_inst|m0_1|u_logic|Ajfwx4~
 instance = comp, \soc_inst|m0_1|u_logic|Zlfwx4~0 , soc_inst|m0_1|u_logic|Zlfwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~2 , soc_inst|m0_1|u_logic|Ajfwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~4 , soc_inst|m0_1|u_logic|Ajfwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~0 , soc_inst|m0_1|u_logic|Ajfwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4~5 , soc_inst|m0_1|u_logic|Ajfwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Vqfwx4~0 , soc_inst|m0_1|u_logic|Vqfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cyfwx4~0 , soc_inst|m0_1|u_logic|Cyfwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~0 , soc_inst|m0_1|u_logic|B1gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K2gwx4~0 , soc_inst|m0_1|u_logic|K2gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~1 , soc_inst|m0_1|u_logic|B1gwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~2 , soc_inst|m0_1|u_logic|B1gwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L6gwx4~0 , soc_inst|m0_1|u_logic|L6gwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~0 , soc_inst|m0_1|u_logic|Rvfwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L6gwx4~0 , soc_inst|m0_1|u_logic|L6gwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~1 , soc_inst|m0_1|u_logic|Rvfwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~4 , soc_inst|m0_1|u_logic|Rvfwx4~4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~2 , soc_inst|m0_1|u_logic|Rvfwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~0 , soc_inst|m0_1|u_logic|B1gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K2gwx4~0 , soc_inst|m0_1|u_logic|K2gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~1 , soc_inst|m0_1|u_logic|B1gwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|B1gwx4~2 , soc_inst|m0_1|u_logic|B1gwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ccgwx4~0 , soc_inst|m0_1|u_logic|Ccgwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Y9gwx4~0 , soc_inst|m0_1|u_logic|Y9gwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|K9gwx4~0 , soc_inst|m0_1|u_logic|K9gwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ccgwx4~0 , soc_inst|m0_1|u_logic|Ccgwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|D9gwx4~0 , soc_inst|m0_1|u_logic|D9gwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cyfwx4~0 , soc_inst|m0_1|u_logic|Cyfwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|E6gwx4~0 , soc_inst|m0_1|u_logic|E6gwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|E6gwx4~1 , soc_inst|m0_1|u_logic|E6gwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Rvfwx4~3 , soc_inst|m0_1|u_logic|Rvfwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ajfwx4 , soc_inst|m0_1|u_logic|Ajfwx4, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ffj2z4 , soc_inst|m0_1|u_logic|Ffj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kzxvx4 , soc_inst|m0_1|u_logic|Kzxvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Og4wx4~0 , soc_inst|m0_1|u_logic|Og4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ag4wx4~0 , soc_inst|m0_1|u_logic|Ag4wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4~0 , soc_inst|m0_1|u_logic|Mtqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4 , soc_inst|m0_1|u_logic|Mtqvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cdnvx4~0 , soc_inst|m0_1|u_logic|Cdnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE , soc_inst|m0_1|u_logic|L8t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Jppvx4~0 , soc_inst|m0_1|u_logic|Jppvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ry5wx4~0 , soc_inst|m0_1|u_logic|Ry5wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|hprot_o~0 , soc_inst|m0_1|u_logic|hprot_o~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L7fwx4~0 , soc_inst|m0_1|u_logic|L7fwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5d2z4~0 , soc_inst|m0_1|u_logic|Z5d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|L5d2z4~0 , soc_inst|m0_1|u_logic|L5d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P7d2z4~0 , soc_inst|m0_1|u_logic|P7d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~2 , soc_inst|m0_1|u_logic|Mrsvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|G6d2z4~0 , soc_inst|m0_1|u_logic|G6d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O3d2z4~0 , soc_inst|m0_1|u_logic|O3d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~1 , soc_inst|m0_1|u_logic|Mrsvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|C4d2z4~0 , soc_inst|m0_1|u_logic|C4d2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~3 , soc_inst|m0_1|u_logic|Mrsvx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~0 , soc_inst|m0_1|u_logic|Mrsvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~4 , soc_inst|m0_1|u_logic|Mrsvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|V2qvx4 , soc_inst|m0_1|u_logic|V2qvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|LessThan1~0 , soc_inst|interconnect_1|LessThan1~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HSEL_SIGNALS[1]~0 , soc_inst|interconnect_1|HSEL_SIGNALS[1]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|mux_sel[1] , soc_inst|interconnect_1|mux_sel[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[6]~10 , soc_inst|interconnect_1|HRDATA[6]~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|switches_1|switch_store[0][2] , soc_inst|switches_1|switch_store[0][2], de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|HRDATA[2]~14 , soc_inst|interconnect_1|HRDATA[2]~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tbnvx4~0 , soc_inst|m0_1|u_logic|Tbnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE , soc_inst|m0_1|u_logic|Lbn2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|U9mvx4~0 , soc_inst|m0_1|u_logic|U9mvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Uaj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ye4wx4 , soc_inst|m0_1|u_logic|Ye4wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|S4w2z4 , soc_inst|m0_1|u_logic|S4w2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|It52z4~2 , soc_inst|m0_1|u_logic|It52z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I6qvx4~0 , soc_inst|m0_1|u_logic|I6qvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Nfnvx4~0 , soc_inst|m0_1|u_logic|Nfnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|A4t2z4 , soc_inst|m0_1|u_logic|A4t2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Etlwx4~0 , soc_inst|m0_1|u_logic|Etlwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~1 , soc_inst|m0_1|u_logic|Xslwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~2 , soc_inst|m0_1|u_logic|Xslwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~3 , soc_inst|m0_1|u_logic|Xslwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~4 , soc_inst|m0_1|u_logic|Xslwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~0 , soc_inst|m0_1|u_logic|Xslwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ushvx4~0 , soc_inst|m0_1|u_logic|Ushvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE , soc_inst|m0_1|u_logic|O5t2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~3 , soc_inst|m0_1|u_logic|Wkiwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~2 , soc_inst|m0_1|u_logic|Wkiwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~5 , soc_inst|m0_1|u_logic|Wkiwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~3 , soc_inst|m0_1|u_logic|Wkiwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~0 , soc_inst|m0_1|u_logic|Wkiwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~1 , soc_inst|m0_1|u_logic|Wkiwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Wkiwx4~4 , soc_inst|m0_1|u_logic|Wkiwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Agiwx4~0 , soc_inst|m0_1|u_logic|Agiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Yeiwx4~0 , soc_inst|m0_1|u_logic|Yeiwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Idiwx4~0 , soc_inst|m0_1|u_logic|Idiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ws3wx4~0 , soc_inst|m0_1|u_logic|Ws3wx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~3 , soc_inst|m0_1|u_logic|Sbiwx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ttiwx4~0 , soc_inst|m0_1|u_logic|Ttiwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Ttiwx4~1 , soc_inst|m0_1|u_logic|Ttiwx4~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~4 , soc_inst|m0_1|u_logic|Sbiwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Idiwx4~0 , soc_inst|m0_1|u_logic|Idiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Agiwx4~0 , soc_inst|m0_1|u_logic|Agiwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yeiwx4~0 , soc_inst|m0_1|u_logic|Yeiwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~5 , soc_inst|m0_1|u_logic|Sbiwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~0 , soc_inst|m0_1|u_logic|Sbiwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~1 , soc_inst|m0_1|u_logic|Sbiwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hohwx4~0 , soc_inst|m0_1|u_logic|Hohwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~0 , soc_inst|m0_1|u_logic|Sbiwx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~2 , soc_inst|m0_1|u_logic|Sbiwx4~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Sbiwx4~6 , soc_inst|m0_1|u_logic|Sbiwx4~6, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Mvhvx4 , soc_inst|m0_1|u_logic|Mvhvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aok2z4 , soc_inst|m0_1|u_logic|Aok2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~0 , soc_inst|m0_1|u_logic|Qr42z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qr42z4~1 , soc_inst|m0_1|u_logic|Qr42z4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|I6qvx4~0 , soc_inst|m0_1|u_logic|I6qvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nfnvx4~0 , soc_inst|m0_1|u_logic|Nfnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|A4t2z4 , soc_inst|m0_1|u_logic|A4t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~0 , soc_inst|m0_1|u_logic|Fuhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E6nwx4~0 , soc_inst|m0_1|u_logic|E6nwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~0 , soc_inst|m0_1|u_logic|R7iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|R7iwx4~1 , soc_inst|m0_1|u_logic|R7iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~0 , soc_inst|m0_1|u_logic|Tvhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~1 , soc_inst|m0_1|u_logic|Tvhvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tvhvx4~2 , soc_inst|m0_1|u_logic|Tvhvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Omk2z4 , soc_inst|m0_1|u_logic|Omk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Msyvx4 , soc_inst|m0_1|u_logic|Msyvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~3 , soc_inst|m0_1|u_logic|Xslwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~1 , soc_inst|m0_1|u_logic|Xslwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~2 , soc_inst|m0_1|u_logic|Xslwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~4 , soc_inst|m0_1|u_logic|Xslwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xslwx4~0 , soc_inst|m0_1|u_logic|Xslwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Etlwx4~0 , soc_inst|m0_1|u_logic|Etlwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ushvx4~0 , soc_inst|m0_1|u_logic|Ushvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O5t2z4 , soc_inst|m0_1|u_logic|O5t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|M66wx4 , soc_inst|m0_1|u_logic|M66wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4~0 , soc_inst|m0_1|u_logic|Mtqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ag4wx4~0 , soc_inst|m0_1|u_logic|Ag4wx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mtqvx4 , soc_inst|m0_1|u_logic|Mtqvx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cdnvx4~0 , soc_inst|m0_1|u_logic|Cdnvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8t2z4 , soc_inst|m0_1|u_logic|L8t2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~2 , soc_inst|m0_1|u_logic|Fuhwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K0iwx4~0 , soc_inst|m0_1|u_logic|K0iwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|K0iwx4~1 , soc_inst|m0_1|u_logic|K0iwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~1 , soc_inst|m0_1|u_logic|Fuhwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~3 , soc_inst|m0_1|u_logic|Fuhwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~4 , soc_inst|m0_1|u_logic|Fuhwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fuhwx4~5 , soc_inst|m0_1|u_logic|Fuhwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xphwx4~0 , soc_inst|m0_1|u_logic|Xphwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~0 , soc_inst|m0_1|u_logic|Rmhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~2 , soc_inst|m0_1|u_logic|Rmhwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~1 , soc_inst|m0_1|u_logic|Rmhwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~3 , soc_inst|m0_1|u_logic|Rmhwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~4 , soc_inst|m0_1|u_logic|Rmhwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Rmhwx4~5 , soc_inst|m0_1|u_logic|Rmhwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sjhwx4~0 , soc_inst|m0_1|u_logic|Sjhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ejhwx4 , soc_inst|m0_1|u_logic|Ejhwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~0 , soc_inst|m0_1|u_logic|Ndhwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~1 , soc_inst|m0_1|u_logic|Ndhwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~2 , soc_inst|m0_1|u_logic|Ndhwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tghwx4~0 , soc_inst|m0_1|u_logic|Tghwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fghwx4 , soc_inst|m0_1|u_logic|Fghwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~3 , soc_inst|m0_1|u_logic|Ndhwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4~4 , soc_inst|m0_1|u_logic|Ndhwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ndhwx4 , soc_inst|m0_1|u_logic|Ndhwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE , soc_inst|m0_1|u_logic|Fij2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~1 , soc_inst|m0_1|u_logic|Amjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|D5kwx4~0 , soc_inst|m0_1|u_logic|D5kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~2 , soc_inst|m0_1|u_logic|Amjwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~3 , soc_inst|m0_1|u_logic|Amjwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~4 , soc_inst|m0_1|u_logic|Amjwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~5 , soc_inst|m0_1|u_logic|Amjwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Qujwx4~0 , soc_inst|m0_1|u_logic|Qujwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Zvjwx4~0 , soc_inst|m0_1|u_logic|Zvjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Xujwx4~0 , soc_inst|m0_1|u_logic|Xujwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|E2kwx4~0 , soc_inst|m0_1|u_logic|E2kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~0 , soc_inst|m0_1|u_logic|Htjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~1 , soc_inst|m0_1|u_logic|Htjwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~2 , soc_inst|m0_1|u_logic|Htjwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~3 , soc_inst|m0_1|u_logic|Htjwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Drjwx4~0 , soc_inst|m0_1|u_logic|Drjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Krjwx4~0 , soc_inst|m0_1|u_logic|Krjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tsjwx4~0 , soc_inst|m0_1|u_logic|Tsjwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Amjwx4 , soc_inst|m0_1|u_logic|Amjwx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~0 , soc_inst|m0_1|u_logic|Mrsvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G6d2z4~0 , soc_inst|m0_1|u_logic|G6d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Z5d2z4~0 , soc_inst|m0_1|u_logic|Z5d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L5d2z4~0 , soc_inst|m0_1|u_logic|L5d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P7d2z4~0 , soc_inst|m0_1|u_logic|P7d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L7fwx4~0 , soc_inst|m0_1|u_logic|L7fwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~2 , soc_inst|m0_1|u_logic|Mrsvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Aekwx4~0 , soc_inst|m0_1|u_logic|Aekwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|O3d2z4~0 , soc_inst|m0_1|u_logic|O3d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~1 , soc_inst|m0_1|u_logic|Mrsvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C4d2z4~0 , soc_inst|m0_1|u_logic|C4d2z4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~3 , soc_inst|m0_1|u_logic|Mrsvx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mrsvx4~4 , soc_inst|m0_1|u_logic|Mrsvx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE , soc_inst|m0_1|u_logic|Aok2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|R1pvx4~0 , soc_inst|m0_1|u_logic|R1pvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohh3z4 , soc_inst|m0_1|u_logic|Ohh3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~0 , soc_inst|m0_1|u_logic|Khnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Khnvx4~1 , soc_inst|m0_1|u_logic|Khnvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE , soc_inst|m0_1|u_logic|Ohh3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~2 , soc_inst|m0_1|u_logic|N662z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cc53z4 , soc_inst|m0_1|u_logic|Cc53z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~0 , soc_inst|m0_1|u_logic|N662z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bk13z4 , soc_inst|m0_1|u_logic|Bk13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~1 , soc_inst|m0_1|u_logic|N662z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ymo2z4 , soc_inst|m0_1|u_logic|Ymo2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K862z4~0 , soc_inst|m0_1|u_logic|K862z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N662z4~3 , soc_inst|m0_1|u_logic|N662z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xrnvx4~0 , soc_inst|m0_1|u_logic|Xrnvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|haddr_o[29]~2 , soc_inst|m0_1|u_logic|haddr_o[29]~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~0 , soc_inst|m0_1|u_logic|Rbi3z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4~1 , soc_inst|m0_1|u_logic|Rbi3z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Rbi3z4 , soc_inst|m0_1|u_logic|Rbi3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ueovx4~0 , soc_inst|m0_1|u_logic|Ueovx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qbpvx4~0 , soc_inst|m0_1|u_logic|Qbpvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wmhvx4~0 , soc_inst|m0_1|u_logic|Wmhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qzw2z4 , soc_inst|m0_1|u_logic|Qzw2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~0 , soc_inst|m0_1|u_logic|M4nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|N8nvx4~0 , soc_inst|m0_1|u_logic|N8nvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fey2z4 , soc_inst|m0_1|u_logic|Fey2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~1 , soc_inst|m0_1|u_logic|M4nvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|M4nvx4~2 , soc_inst|m0_1|u_logic|M4nvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H9i2z4 , soc_inst|m0_1|u_logic|H9i2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ukpvx4 , soc_inst|m0_1|u_logic|Ukpvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wpkwx4~0 , soc_inst|m0_1|u_logic|Wpkwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Itgwx4~0 , soc_inst|m0_1|u_logic|Itgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~0 , soc_inst|m0_1|u_logic|Pw6wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~1 , soc_inst|m0_1|u_logic|Pw6wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~2 , soc_inst|m0_1|u_logic|H3ivx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~3 , soc_inst|m0_1|u_logic|H3ivx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~0 , soc_inst|m0_1|u_logic|H3ivx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~0 , soc_inst|m0_1|u_logic|Av3wx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~5 , soc_inst|m0_1|u_logic|Av3wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~6 , soc_inst|m0_1|u_logic|Av3wx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~7 , soc_inst|m0_1|u_logic|Av3wx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~8 , soc_inst|m0_1|u_logic|Av3wx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~9 , soc_inst|m0_1|u_logic|Av3wx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~2 , soc_inst|m0_1|u_logic|Ny3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~3 , soc_inst|m0_1|u_logic|Ny3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~4 , soc_inst|m0_1|u_logic|Ny3wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ny3wx4~5 , soc_inst|m0_1|u_logic|Ny3wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~10 , soc_inst|m0_1|u_logic|Av3wx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~1 , soc_inst|m0_1|u_logic|Av3wx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|T8f3z4 , soc_inst|m0_1|u_logic|T8f3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~2 , soc_inst|m0_1|u_logic|Av3wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~3 , soc_inst|m0_1|u_logic|Av3wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~4 , soc_inst|m0_1|u_logic|Av3wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Av3wx4~11 , soc_inst|m0_1|u_logic|Av3wx4~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~1 , soc_inst|m0_1|u_logic|H3ivx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|H3ivx4~4 , soc_inst|m0_1|u_logic|H3ivx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Gji2z4 , soc_inst|m0_1|u_logic|Gji2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Lfewx4 , soc_inst|m0_1|u_logic|Lfewx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~2 , soc_inst|m0_1|u_logic|Pw6wx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~3 , soc_inst|m0_1|u_logic|Pw6wx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~0 , soc_inst|m0_1|u_logic|Sfewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sfewx4~1 , soc_inst|m0_1|u_logic|Sfewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~0 , soc_inst|m0_1|u_logic|Fcewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fcewx4~1 , soc_inst|m0_1|u_logic|Fcewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~4 , soc_inst|m0_1|u_logic|Pw6wx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Akewx4~1 , soc_inst|m0_1|u_logic|Akewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Yiewx4~0 , soc_inst|m0_1|u_logic|Yiewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4~5 , soc_inst|m0_1|u_logic|Pw6wx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Vz6wx4 , soc_inst|m0_1|u_logic|Vz6wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pw6wx4 , soc_inst|m0_1|u_logic|Pw6wx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tki2z4 , soc_inst|m0_1|u_logic|Tki2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Pcyvx4 , soc_inst|m0_1|u_logic|Pcyvx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Duc2z4~0 , soc_inst|m0_1|u_logic|Duc2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE , soc_inst|m0_1|u_logic|Cai3z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~0 , soc_inst|m0_1|u_logic|Ec62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|J5i3z4 , soc_inst|m0_1|u_logic|J5i3z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~2 , soc_inst|m0_1|u_logic|Ec62z4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Be62z4~0 , soc_inst|m0_1|u_logic|Be62z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mi13z4 , soc_inst|m0_1|u_logic|Mi13z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~1 , soc_inst|m0_1|u_logic|Ec62z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ec62z4~3 , soc_inst|m0_1|u_logic|Ec62z4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q8zvx4~0 , soc_inst|m0_1|u_logic|Q8zvx4~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|haddr_o~1 , soc_inst|m0_1|u_logic|haddr_o~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|LessThan0~0 , soc_inst|interconnect_1|LessThan0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|mux_sel[0] , soc_inst|interconnect_1|mux_sel[0], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[25]~1 , soc_inst|interconnect_1|HRDATA[25]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|switches_1|switch_store[1][7] , soc_inst|switches_1|switch_store[1][7], de1_soc_wrapper, 1
-instance = comp, \soc_inst|interconnect_1|HRDATA[23]~8 , soc_inst|interconnect_1|HRDATA[23]~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Tohvx4~0 , soc_inst|m0_1|u_logic|Tohvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Sow2z4 , soc_inst|m0_1|u_logic|Sow2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~1 , soc_inst|m0_1|u_logic|C6nvx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~0 , soc_inst|m0_1|u_logic|C6nvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|C6nvx4~2 , soc_inst|m0_1|u_logic|C6nvx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nqy2z4 , soc_inst|m0_1|u_logic|Nqy2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Askwx4~1 , soc_inst|m0_1|u_logic|Askwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Pikwx4~0 , soc_inst|m0_1|u_logic|Pikwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~1 , soc_inst|m0_1|u_logic|Mkkwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~2 , soc_inst|m0_1|u_logic|Mkkwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~7 , soc_inst|m0_1|u_logic|T6kwx4~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Askwx4~0 , soc_inst|m0_1|u_logic|Askwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~8 , soc_inst|m0_1|u_logic|T6kwx4~8, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~0 , soc_inst|m0_1|u_logic|Fkkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Fkkwx4~1 , soc_inst|m0_1|u_logic|Fkkwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~0 , soc_inst|m0_1|u_logic|T6kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Hekwx4~0 , soc_inst|m0_1|u_logic|Hekwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~2 , soc_inst|m0_1|u_logic|T6kwx4~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~3 , soc_inst|m0_1|u_logic|T6kwx4~3, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Bbkwx4~0 , soc_inst|m0_1|u_logic|Bbkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~1 , soc_inst|m0_1|u_logic|T6kwx4~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Mkkwx4~0 , soc_inst|m0_1|u_logic|Mkkwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Q8kwx4~0 , soc_inst|m0_1|u_logic|Q8kwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~4 , soc_inst|m0_1|u_logic|T6kwx4~4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~5 , soc_inst|m0_1|u_logic|T6kwx4~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|T6kwx4~6 , soc_inst|m0_1|u_logic|T6kwx4~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ruhvx4~0 , soc_inst|m0_1|u_logic|Ruhvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nsk2z4 , soc_inst|m0_1|u_logic|Nsk2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|G1mwx4~0 , soc_inst|m0_1|u_logic|G1mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|P2mwx4~0 , soc_inst|m0_1|u_logic|P2mwx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|hwrite_o~0 , soc_inst|m0_1|u_logic|hwrite_o~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|write_cycle~0 , soc_inst|ram_1|write_cycle~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|ram_1|write_cycle , soc_inst|ram_1|write_cycle, de1_soc_wrapper, 1
+instance = comp, \soc_inst|interconnect_1|mux_sel[0]~DUPLICATE , soc_inst|interconnect_1|mux_sel[0]~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \soc_inst|interconnect_1|HREADY~0 , soc_inst|interconnect_1|HREADY~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Nxqvx4~0 , soc_inst|m0_1|u_logic|Nxqvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|L8mvx4~0 , soc_inst|m0_1|u_logic|L8mvx4~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Cam2z4 , soc_inst|m0_1|u_logic|Cam2z4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|Ye4wx4 , soc_inst|m0_1|u_logic|Ye4wx4, de1_soc_wrapper, 1
-instance = comp, \soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE , soc_inst|m0_1|u_logic|S4w2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE , soc_inst|m0_1|u_logic|Sgj2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zygwx4~0 , soc_inst|m0_1|u_logic|Zygwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~0 , soc_inst|m0_1|u_logic|Tvgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tvgwx4~1 , soc_inst|m0_1|u_logic|Tvgwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~0 , soc_inst|m0_1|u_logic|P0hwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~0 , soc_inst|m0_1|u_logic|Bfgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|I0hwx4~1 , soc_inst|m0_1|u_logic|I0hwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Kugwx4~0 , soc_inst|m0_1|u_logic|Kugwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~1 , soc_inst|m0_1|u_logic|Togwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~2 , soc_inst|m0_1|u_logic|Togwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~0 , soc_inst|m0_1|u_logic|Togwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Togwx4~3 , soc_inst|m0_1|u_logic|Togwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Poa2z4~1 , soc_inst|m0_1|u_logic|Poa2z4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ekgwx4~0 , soc_inst|m0_1|u_logic|Ekgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~14 , soc_inst|m0_1|u_logic|Bfgwx4~14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~13 , soc_inst|m0_1|u_logic|Bfgwx4~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~15 , soc_inst|m0_1|u_logic|Bfgwx4~15, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~16 , soc_inst|m0_1|u_logic|Bfgwx4~16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~5 , soc_inst|m0_1|u_logic|Bfgwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~6 , soc_inst|m0_1|u_logic|Bfgwx4~6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~7 , soc_inst|m0_1|u_logic|Bfgwx4~7, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~8 , soc_inst|m0_1|u_logic|Bfgwx4~8, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~9 , soc_inst|m0_1|u_logic|Bfgwx4~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~3 , soc_inst|m0_1|u_logic|P0hwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~10 , soc_inst|m0_1|u_logic|Bfgwx4~10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~11 , soc_inst|m0_1|u_logic|Bfgwx4~11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~2 , soc_inst|m0_1|u_logic|Bfgwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~3 , soc_inst|m0_1|u_logic|Bfgwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Thgwx4~0 , soc_inst|m0_1|u_logic|Thgwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Mhgwx4~1 , soc_inst|m0_1|u_logic|Mhgwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Hahwx4~0 , soc_inst|m0_1|u_logic|Hahwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~1 , soc_inst|m0_1|u_logic|Bfgwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~18 , soc_inst|m0_1|u_logic|Bfgwx4~18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|P0hwx4~2 , soc_inst|m0_1|u_logic|P0hwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~4 , soc_inst|m0_1|u_logic|Bfgwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~12 , soc_inst|m0_1|u_logic|Bfgwx4~12, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4~17 , soc_inst|m0_1|u_logic|Bfgwx4~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Bfgwx4 , soc_inst|m0_1|u_logic|Bfgwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Sgj2z4 , soc_inst|m0_1|u_logic|Sgj2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Huqvx4~0 , soc_inst|m0_1|u_logic|Huqvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~1 , soc_inst|m0_1|u_logic|Qllwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~2 , soc_inst|m0_1|u_logic|Qllwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~3 , soc_inst|m0_1|u_logic|Qllwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qllwx4~4 , soc_inst|m0_1|u_logic|Qllwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~1 , soc_inst|m0_1|u_logic|Wfhvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~0 , soc_inst|m0_1|u_logic|Wfhvx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Wfhvx4~2 , soc_inst|m0_1|u_logic|Wfhvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|K9z2z4 , soc_inst|m0_1|u_logic|K9z2z4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~0 , soc_inst|m0_1|u_logic|Fjewx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Fjewx4~1 , soc_inst|m0_1|u_logic|Fjewx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Tsjwx4~0 , soc_inst|m0_1|u_logic|Tsjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Krjwx4~0 , soc_inst|m0_1|u_logic|Krjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~1 , soc_inst|m0_1|u_logic|Amjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~2 , soc_inst|m0_1|u_logic|Amjwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|D5kwx4~0 , soc_inst|m0_1|u_logic|D5kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~3 , soc_inst|m0_1|u_logic|Amjwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~4 , soc_inst|m0_1|u_logic|Amjwx4~4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4~5 , soc_inst|m0_1|u_logic|Amjwx4~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|E2kwx4~0 , soc_inst|m0_1|u_logic|E2kwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~0 , soc_inst|m0_1|u_logic|Htjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~1 , soc_inst|m0_1|u_logic|Htjwx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~2 , soc_inst|m0_1|u_logic|Htjwx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Zvjwx4~0 , soc_inst|m0_1|u_logic|Zvjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Xujwx4~0 , soc_inst|m0_1|u_logic|Xujwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Htjwx4~3 , soc_inst|m0_1|u_logic|Htjwx4~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Qujwx4~0 , soc_inst|m0_1|u_logic|Qujwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Drjwx4~0 , soc_inst|m0_1|u_logic|Drjwx4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Amjwx4 , soc_inst|m0_1|u_logic|Amjwx4, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE , soc_inst|m0_1|u_logic|Ark2z4~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~1 , soc_inst|m0_1|u_logic|Z5pvx4~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Q5c2z4~0 , soc_inst|m0_1|u_logic|Q5c2z4~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~2 , soc_inst|m0_1|u_logic|Z5pvx4~2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~3 , soc_inst|m0_1|u_logic|Z5pvx4~3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|m0_1|u_logic|Z5pvx4~4 , soc_inst|m0_1|u_logic|Z5pvx4~4, de1_soc_wrapper, 1
 instance = comp, \running~feeder , running~feeder, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~37 , raz_inst|Add1~37, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~25 , raz_inst|Add0~25, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[0] , raz_inst|H_count[0], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~29 , raz_inst|Add0~29, de1_soc_wrapper, 1
@@ -4467,32 +4495,46 @@ instance = comp, \raz_inst|H_count[4] , raz_inst|H_count[4], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~33 , raz_inst|Add0~33, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[5] , raz_inst|H_count[5], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~17 , raz_inst|Add0~17, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[6] , raz_inst|H_count[6], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~5 , raz_inst|Add0~5, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[7] , raz_inst|H_count[7], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~9 , raz_inst|Add0~9, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[8] , raz_inst|H_count[8], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~13 , raz_inst|Add0~13, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count[9] , raz_inst|H_count[9], de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan0~2 , raz_inst|LessThan0~2, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add0~1 , raz_inst|Add0~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[10] , raz_inst|H_count[10], de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan2~2 , raz_inst|LessThan2~2, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[1] , raz_inst|H_count[1], de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan2~0 , raz_inst|LessThan2~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan2~1 , raz_inst|LessThan2~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan2~3 , raz_inst|LessThan2~3, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count[8] , raz_inst|H_count[8], de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[10]~DUPLICATE , raz_inst|H_count[10]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan0~1 , raz_inst|LessThan0~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan0~0 , raz_inst|LessThan0~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan0~3 , raz_inst|LessThan0~3, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[6] , raz_inst|H_count[6], de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan4~0 , raz_inst|LessThan4~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~0 , raz_inst|always0~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|always0~1 , raz_inst|always0~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~1 , raz_inst|Equal0~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~2 , raz_inst|Equal0~2, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~0 , raz_inst|Equal0~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~37 , raz_inst|Add1~37, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~5 , raz_inst|Add1~5, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~9 , raz_inst|Add1~9, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~3 , raz_inst|Equal0~3, de1_soc_wrapper, 1
+instance = comp, \raz_inst|Equal0~4 , raz_inst|Equal0~4, de1_soc_wrapper, 1
+instance = comp, \raz_inst|V_count[7] , raz_inst|V_count[7], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~13 , raz_inst|Add1~13, de1_soc_wrapper, 1
+instance = comp, \raz_inst|V_count[8] , raz_inst|V_count[8], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~17 , raz_inst|Add1~17, de1_soc_wrapper, 1
+instance = comp, \raz_inst|V_count[9] , raz_inst|V_count[9], de1_soc_wrapper, 1
+instance = comp, \raz_inst|Add1~21 , raz_inst|Add1~21, de1_soc_wrapper, 1
+instance = comp, \raz_inst|V_count[10] , raz_inst|V_count[10], de1_soc_wrapper, 1
 instance = comp, \raz_inst|always0~2 , raz_inst|always0~2, de1_soc_wrapper, 1
 instance = comp, \raz_inst|always0~3 , raz_inst|always0~3, de1_soc_wrapper, 1
 instance = comp, \raz_inst|always0~4 , raz_inst|always0~4, de1_soc_wrapper, 1
-instance = comp, \raz_inst|H_count~1 , raz_inst|H_count~1, de1_soc_wrapper, 1
 instance = comp, \raz_inst|H_count~0 , raz_inst|H_count~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan6~1 , raz_inst|LessThan6~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[10] , raz_inst|H_count[10], de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count~1 , raz_inst|H_count~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan4~1 , raz_inst|LessThan4~1, de1_soc_wrapper, 1
 instance = comp, \raz_inst|always0~13 , raz_inst|always0~13, de1_soc_wrapper, 1
 instance = comp, \raz_inst|always0~14 , raz_inst|always0~14, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Equal0~1 , raz_inst|Equal0~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Equal0~0 , raz_inst|Equal0~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Equal0~3 , raz_inst|Equal0~3, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Equal0~4 , raz_inst|Equal0~4, de1_soc_wrapper, 1
 instance = comp, \raz_inst|V_count[0] , raz_inst|V_count[0], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add1~41 , raz_inst|Add1~41, de1_soc_wrapper, 1
 instance = comp, \raz_inst|V_count[1] , raz_inst|V_count[1], de1_soc_wrapper, 1
@@ -4504,52 +4546,26 @@ instance = comp, \raz_inst|Add1~33 , raz_inst|Add1~33, de1_soc_wrapper, 1
 instance = comp, \raz_inst|V_count[4] , raz_inst|V_count[4], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Add1~1 , raz_inst|Add1~1, de1_soc_wrapper, 1
 instance = comp, \raz_inst|V_count[5] , raz_inst|V_count[5], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~5 , raz_inst|Add1~5, de1_soc_wrapper, 1
 instance = comp, \raz_inst|V_count[6] , raz_inst|V_count[6], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~9 , raz_inst|Add1~9, de1_soc_wrapper, 1
-instance = comp, \raz_inst|V_count[7] , raz_inst|V_count[7], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~13 , raz_inst|Add1~13, de1_soc_wrapper, 1
-instance = comp, \raz_inst|V_count[8] , raz_inst|V_count[8], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~17 , raz_inst|Add1~17, de1_soc_wrapper, 1
-instance = comp, \raz_inst|V_count[9] , raz_inst|V_count[9], de1_soc_wrapper, 1
-instance = comp, \raz_inst|Add1~21 , raz_inst|Add1~21, de1_soc_wrapper, 1
-instance = comp, \raz_inst|V_count[10] , raz_inst|V_count[10], de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan1~0 , raz_inst|LessThan1~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan1~1 , raz_inst|LessThan1~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_x[9]~7 , raz_inst|pixel_x[9]~7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~17 , soc_inst|pix1|Add1~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~21 , soc_inst|pix1|Add1~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~25 , soc_inst|pix1|Add1~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~29 , soc_inst|pix1|Add1~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~9 , soc_inst|pix1|Add1~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~13 , soc_inst|pix1|Add1~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~5 , soc_inst|pix1|Add1~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add1~1 , soc_inst|pix1|Add1~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[1]~1 , raz_inst|pixel_y[1]~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|pixel_y[0]~0 , raz_inst|pixel_y[0]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~25 , soc_inst|pix1|Add0~25, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~29 , soc_inst|pix1|Add0~29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~33 , soc_inst|pix1|Add0~33, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~37 , soc_inst|pix1|Add0~37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~41 , soc_inst|pix1|Add0~41, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~45 , soc_inst|pix1|Add0~45, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~17 , soc_inst|pix1|Add0~17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~21 , soc_inst|pix1|Add0~21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~13 , soc_inst|pix1|Add0~13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~9 , soc_inst|pix1|Add0~9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~5 , soc_inst|pix1|Add0~5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|Add0~1 , soc_inst|pix1|Add0~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5], de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~0 , raz_inst|LessThan8~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~2 , raz_inst|LessThan8~2, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~3 , raz_inst|LessThan8~3, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~1 , raz_inst|LessThan8~1, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan8~4 , raz_inst|LessThan8~4, de1_soc_wrapper, 1
+instance = comp, \raz_inst|video_on_V , raz_inst|video_on_V, de1_soc_wrapper, 1
+instance = comp, \raz_inst|LessThan7~0 , raz_inst|LessThan7~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|video_on_H , raz_inst|video_on_H, de1_soc_wrapper, 1
+instance = comp, \raz_inst|VGA_BLANK_N , raz_inst|VGA_BLANK_N, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|always0~0 , soc_inst|pix1|always0~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[15] , soc_inst|pix1|word_address[15], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[13] , soc_inst|pix1|word_address[13], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[14] , soc_inst|pix1|word_address[14], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[18] , soc_inst|pix1|word_address[18], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[17] , soc_inst|pix1|word_address[17], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[15] , soc_inst|pix1|word_address[15], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|write_enable , soc_inst|pix1|write_enable, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[16] , soc_inst|pix1|word_address[16], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[18] , soc_inst|pix1|word_address[18], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[17] , soc_inst|pix1|word_address[17], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[13] , soc_inst|pix1|word_address[13], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[0] , soc_inst|pix1|word_address[0], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[1] , soc_inst|pix1|word_address[1], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[2] , soc_inst|pix1|word_address[2], de1_soc_wrapper, 1
@@ -4562,112 +4578,132 @@ instance = comp, \soc_inst|pix1|word_address[8] , soc_inst|pix1|word_address[8],
 instance = comp, \soc_inst|pix1|word_address[9] , soc_inst|pix1|word_address[9], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[10] , soc_inst|pix1|word_address[10], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|word_address[11] , soc_inst|pix1|word_address[11], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|word_address[12] , soc_inst|pix1|word_address[12], de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan0~0 , raz_inst|LessThan0~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|video_on_H~DUPLICATE , raz_inst|video_on_H~DUPLICATE, de1_soc_wrapper, 1
 instance = comp, \raz_inst|pixel_x[0]~0 , raz_inst|pixel_x[0]~0, de1_soc_wrapper, 1
+instance = comp, \raz_inst|H_count[1] , raz_inst|H_count[1], de1_soc_wrapper, 1
 instance = comp, \raz_inst|pixel_x[1]~1 , raz_inst|pixel_x[1]~1, de1_soc_wrapper, 1
 instance = comp, \raz_inst|pixel_x[2]~2 , raz_inst|pixel_x[2]~2, de1_soc_wrapper, 1
 instance = comp, \raz_inst|pixel_x[3]~3 , raz_inst|pixel_x[3]~3, de1_soc_wrapper, 1
 instance = comp, \raz_inst|pixel_x[4]~4 , raz_inst|pixel_x[4]~4, de1_soc_wrapper, 1
 instance = comp, \raz_inst|pixel_x[5]~5 , raz_inst|pixel_x[5]~5, de1_soc_wrapper, 1
 instance = comp, \raz_inst|pixel_x[6]~6 , raz_inst|pixel_x[6]~6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3129w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~25 , soc_inst|pix1|Add0~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~29 , soc_inst|pix1|Add0~29, de1_soc_wrapper, 1
+instance = comp, \raz_inst|video_on_V~DUPLICATE , raz_inst|video_on_V~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~17 , soc_inst|pix1|Add1~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~33 , soc_inst|pix1|Add0~33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~21 , soc_inst|pix1|Add1~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~37 , soc_inst|pix1|Add0~37, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~25 , soc_inst|pix1|Add1~25, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~41 , soc_inst|pix1|Add0~41, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a37, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3109w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|word_address[12] , soc_inst|pix1|word_address[12], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~29 , soc_inst|pix1|Add1~29, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~45 , soc_inst|pix1|Add0~45, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a35, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3099w[3]~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a34, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~9 , soc_inst|pix1|Add1~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~17 , soc_inst|pix1|Add0~17, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[0], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3089w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a33, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~13 , soc_inst|pix1|Add1~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~21 , soc_inst|pix1|Add0~21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1]~DUPLICATE, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3078w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a32, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l2_w0_n8_mux_dataout~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[1], de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3119w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a36, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~5 , soc_inst|pix1|Add1~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~13 , soc_inst|pix1|Add0~13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[2], de1_soc_wrapper, 1
 instance = comp, \raz_inst|Red~0 , raz_inst|Red~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3], de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2923w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a19, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2913w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a18, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2892w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a16, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2903w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a17, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3056w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a31, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3046w[3]~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a30, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3036w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a29, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3026w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a28, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2953w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a22, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2963w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a23, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2933w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a20, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2943w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a21, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add1~1 , soc_inst|pix1|Add1~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~9 , soc_inst|pix1|Add0~9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[3], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3016w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a27, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode3006w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a26, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2985w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a24, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2996w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a25, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n1_mux_dataout~4, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan9~0 , raz_inst|LessThan9~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|video_on_H , raz_inst|video_on_H, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan6~0 , raz_inst|LessThan6~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always0~0 , raz_inst|always0~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|always0~1 , raz_inst|always0~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan10~2 , raz_inst|LessThan10~2, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan10~3 , raz_inst|LessThan10~3, de1_soc_wrapper, 1
-instance = comp, \raz_inst|Equal0~2 , raz_inst|Equal0~2, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan10~1 , raz_inst|LessThan10~1, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan10~0 , raz_inst|LessThan10~0, de1_soc_wrapper, 1
-instance = comp, \raz_inst|LessThan10~4 , raz_inst|LessThan10~4, de1_soc_wrapper, 1
-instance = comp, \raz_inst|video_on_V , raz_inst|video_on_V, de1_soc_wrapper, 1
-instance = comp, \raz_inst|VGA_BLANK_N , raz_inst|VGA_BLANK_N, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~5 , soc_inst|pix1|Add0~5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|Add0~1 , soc_inst|pix1|Add0~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[5], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4] , soc_inst|pix1|memory_rtl_0|auto_generated|address_reg_b[4], de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2870w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a15, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2736w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a3, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2776w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a7, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2830w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a11, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~3, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2756w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a5, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2850w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a13, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2716w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2810w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a9, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
+instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2840w[3]~0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a12, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2746w[3]~1, de1_soc_wrapper, 1
@@ -4677,15 +4713,6 @@ instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a8 , soc_i
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2699w[3]~1, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a0, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2860w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a14, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2820w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a10, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2766w[3]~1, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a6, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0 , soc_inst|pix1|memory_rtl_0|auto_generated|decode2|w_anode2726w[3]~0, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2 , soc_inst|pix1|memory_rtl_0|auto_generated|ram_block1a2, de1_soc_wrapper, 1
-instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~2, de1_soc_wrapper, 1
 instance = comp, \soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4 , soc_inst|pix1|memory_rtl_0|auto_generated|mux3|l4_w0_n0_mux_dataout~4, de1_soc_wrapper, 1
 instance = comp, \raz_inst|Red~1 , raz_inst|Red~1, de1_soc_wrapper, 1
 instance = comp, \raz_inst|always0~5 , raz_inst|always0~5, de1_soc_wrapper, 1
diff --git a/simvision100023.diag b/simvision100023.diag
index f1b7d31bc1cba99becb7d10d9f3b033f61631b60..e8c153a312efd34ab713c9eb9133dc025da396c6 100644
--- a/simvision100023.diag
+++ b/simvision100023.diag
@@ -194,3 +194,290 @@ can't read "state(state)": no such element in array
     invoked from within
 "namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@7cb5 state idle kernel digital"
  
+*** Message Type: error ***
+When: Mon Oct 05 10:59:39 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@dc62 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@dc62 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 11:04:31 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@7cb5 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@7cb5 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 11:28:53 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@e317 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@e317 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 12:09:06 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@dc6d state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@dc6d state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 12:12:26 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@e31b state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@e31b state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 12:41:53 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@e327 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@e327 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 12:45:43 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@e333 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@e333 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 12:55:29 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@e33f state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@e33f state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 12:59:14 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@e345 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@e345 state idle kernel digital"
+ 
+*** Message Type: info ***
+When: Mon Oct 05 15:09:48 BST 2020
+Delete memviewer window: "Memory Viewer 6"
+ 
+*** Message Type: info ***
+When: Mon Oct 05 15:11:54 BST 2020
+Delete browser window: "Design Browser 1"
+ 
+*** Message Type: info ***
+When: Mon Oct 05 15:12:52 BST 2020
+Create memviewer window: "Memory Viewer 2"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 16:08:40 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer1" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer1 _stateEventCB event !state.kernel handle @public@11 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer1 _stateEventCB} event !state.kernel handle @public@11 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 16:20:44 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer1" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer1 _stateEventCB event !state.kernel handle @public@202 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer1 _stateEventCB} event !state.kernel handle @public@202 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 16:22:33 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer1" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer1 _stateEventCB event !state.kernel handle @public@10095 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer1 _stateEventCB} event !state.kernel handle @public@10095 state idle kernel digital"
+ 
+*** Message Type: info ***
+When: Mon Oct 05 16:39:47 BST 2020
+Exit NC-Sim: user
+      Design: worklib.de1_soc_wrapper_stim:sv
+   Languages: verilog
+   Simulator: NC-Sim
+     Version: TOOL:    ncsim(64)       15.20-s058
+        User: ks6n19
+        Host: srv02749.soton.ac.uk
+Time Started: Mon Oct 05 16:22:33 BST 2020
+  Process ID: 17656
+   Directory: /home/ks6n19/Documents/project
+     Command: ncverilog -sv +gui +ncaccess+r -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv -s
+
+ 
+*** Message Type: info ***
+When: Mon Oct 05 16:40:00 BST 2020
+Delete waveform window: "Waves for ARM SoC Example"
+ 
+*** Message Type: info ***
+When: Mon Oct 05 16:40:08 BST 2020
+SimVision Exit.
+ 
diff --git a/simvision33338.diag b/simvision33338.diag
new file mode 100644
index 0000000000000000000000000000000000000000..94d06547d0e0dcd71480bffbb1d0bc6f01e47c7e
--- /dev/null
+++ b/simvision33338.diag
@@ -0,0 +1,117 @@
+*** Message Type: info ***
+When: Tue Oct 06 23:16:00 BST 2020
+SimVision started.
+Version: TOOL:  simvision(64)   15.20-s058
+User: ks6n19
+Host: srv02749.soton.ac.uk
+Platform: Linux/x86_64/3.10.0-1127.19.1.el7.x86_64
+Started: Tue Oct 06 23:16:00 BST 2020
+Command: /eda/cadence/incisiv/tools.lnx86/simvision/bin/64bit/simvision.exe -connect dc:srv02749.soton.ac.uk:53727 -64BIT -nocopyright
+Work Directory: /home/ks6n19/Documents/project
+ 
+*** Message Type: info ***
+When: Tue Oct 06 23:16:01 BST 2020
+Create browser window: "Design Browser 1"
+ 
+*** Message Type: info ***
+When: Tue Oct 06 23:16:02 BST 2020
+Create console window: "Console"
+ 
+*** Message Type: info ***
+When: Tue Oct 06 23:16:05 BST 2020
+Connect to Simulator
+      Design: worklib.de1_soc_wrapper_stim:sv
+   Languages: verilog
+   Simulator: NC-Sim
+     Version: TOOL:    ncsim(64)       15.20-s058
+        User: ks6n19
+        Host: srv02749.soton.ac.uk
+Time Started: Tue Oct 06 23:16:00 BST 2020
+  Process ID: 33321
+   Directory: /home/ks6n19/Documents/project
+     Command: ncverilog -sv +gui +ncaccess+r +tcl+testbench/de0_wrapper.tcl -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv
+
+ 
+*** Message Type: info ***
+When: Tue Oct 06 23:16:06 BST 2020
+Create utility window: "Properties"
+ 
+*** Message Type: info ***
+When: Tue Oct 06 23:16:07 BST 2020
+Create waveform window: "Waves for ARM SoC Example"
+ 
+*** Message Type: info ***
+When: Tue Oct 06 23:17:34 BST 2020
+Create memviewer window: "Memory Viewer 1"
+ 
+*** Message Type: info ***
+When: Tue Oct 06 23:19:06 BST 2020
+Delete memviewer window: "Memory Viewer 1"
+ 
+*** Message Type: info ***
+When: Wed Oct 07 16:48:32 BST 2020
+Create memviewer window: "Memory Viewer 2"
+ 
+*** Message Type: error ***
+When: Wed Oct 07 16:51:57 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer1" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer1 _stateEventCB event !state.kernel handle @public@c5 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer1 _stateEventCB} event !state.kernel handle @public@c5 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Thu Oct 08 15:46:52 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer1" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer1 _stateEventCB event !state.kernel handle @public@2cfc state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer1 _stateEventCB} event !state.kernel handle @public@2cfc state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Thu Oct 08 16:21:40 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer1" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer1 _stateEventCB event !state.kernel handle @public@d5 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer1 _stateEventCB} event !state.kernel handle @public@d5 state idle kernel digital"
+ 
diff --git a/simvision93894.diag b/simvision93894.diag
new file mode 100644
index 0000000000000000000000000000000000000000..bcc0937f47ad1b2044d7cdeea07dfdd00859827b
--- /dev/null
+++ b/simvision93894.diag
@@ -0,0 +1,205 @@
+*** Message Type: info ***
+When: Mon Oct 05 16:41:15 BST 2020
+SimVision started.
+Version: TOOL:  simvision(64)   15.20-s058
+User: ks6n19
+Host: srv02749.soton.ac.uk
+Platform: Linux/x86_64/3.10.0-1127.19.1.el7.x86_64
+Started: Mon Oct 05 16:41:15 BST 2020
+Command: /eda/cadence/incisiv/tools.lnx86/simvision/bin/64bit/simvision.exe -connect dc:srv02749.soton.ac.uk:60710 -64BIT -nocopyright
+Work Directory: /home/ks6n19/Documents/project
+ 
+*** Message Type: info ***
+When: Mon Oct 05 16:41:15 BST 2020
+Create browser window: "Design Browser 1"
+ 
+*** Message Type: info ***
+When: Mon Oct 05 16:41:16 BST 2020
+Create console window: "Console"
+ 
+*** Message Type: info ***
+When: Mon Oct 05 16:41:17 BST 2020
+Connect to Simulator
+      Design: worklib.de1_soc_wrapper_stim:sv
+   Languages: verilog
+   Simulator: NC-Sim
+     Version: TOOL:    ncsim(64)       15.20-s058
+        User: ks6n19
+        Host: srv02749.soton.ac.uk
+Time Started: Mon Oct 05 16:41:14 BST 2020
+  Process ID: 93854
+   Directory: /home/ks6n19/Documents/project
+     Command: ncverilog -sv +gui +ncaccess+r +tcl+testbench/de0_wrapper.tcl -y behavioural +libext+.sv +define+prog_file=software/code.hex testbench/de1_soc_wrapper_stim.sv
+
+ 
+*** Message Type: info ***
+When: Mon Oct 05 16:41:18 BST 2020
+Create utility window: "Properties"
+ 
+*** Message Type: info ***
+When: Mon Oct 05 16:41:19 BST 2020
+Create waveform window: "Waves for ARM SoC Example"
+ 
+*** Message Type: info ***
+When: Mon Oct 05 16:41:40 BST 2020
+Create memviewer window: "Memory Viewer 2"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 16:47:57 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@48d state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@48d state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 16:49:57 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@1236 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@1236 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 17:19:40 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@b4 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@b4 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 17:24:29 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@6777 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@6777 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 19:02:33 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@6783 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@6783 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Mon Oct 05 19:09:02 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@8843 state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@8843 state idle kernel digital"
+ 
+*** Message Type: error ***
+When: Tue Oct 06 16:46:48 BST 2020
+can't read "state(state)": no such element in array
+can't read "state(state)": no such element in array
+    while executing
+"if { $state(state) == "running" } {
+           _clearValueChanges
+         }"
+    ("!state.kernel" arm line 6)
+    invoked from within
+"switch $info(event) {
+ !state.kernel {
+            # When we start running, clear the value change colors in
+      # the memory viewer widget, in preparation ..."
+    (object "::.memViewer0" method "::MemViewer::_stateEventCB" body line 7)
+    invoked from within
+"::.memViewer0 _stateEventCB event !state.kernel handle @public@884f state idle kernel digital"
+    (in namespace inscope "::MemViewer" script line 1)
+    invoked from within
+"namespace inscope ::MemViewer {::.memViewer0 _stateEventCB} event !state.kernel handle @public@884f state idle kernel digital"
+ 
+*** Message Type: info ***
+When: Tue Oct 06 16:48:48 BST 2020
+Delete memviewer window: "Memory Viewer 2"
+ 
+*** Message Type: info ***
+When: Tue Oct 06 18:39:17 BST 2020
+Delete waveform window: "Waves for ARM SoC Example"
+ 
+*** Message Type: info ***
+When: Tue Oct 06 23:15:27 BST 2020
+Delete browser window: "Design Browser 1"
+ 
diff --git a/software/.dep/main.o.d b/software/.dep/main.o.d
index b94777f9a1b4182244992c3ccc42213e6e674cda..f8059332392e23d43687c507653e71fef6730cbb 100644
--- a/software/.dep/main.o.d
+++ b/software/.dep/main.o.d
@@ -6,7 +6,31 @@ code/main.o: code/main.c \
  /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/_newlib_version.h \
  /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_intsup.h \
  /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_stdint.h \
- /srv/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/include/stdbool.h
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/stdio.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/_ansi.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/newlib.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/config.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/ieeefp.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/cdefs.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/include/stddef.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/include/stdarg.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/reent.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/_ansi.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_types.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/_types.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/lock.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/types.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/endian.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/_endian.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/select.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_sigset.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_timeval.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/timespec.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_timespec.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/types.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/stdio.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/include/stdbool.h \
+ /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/math.h
 
 /srv/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/include/stdint.h:
 
@@ -22,4 +46,52 @@ code/main.o: code/main.c \
 
 /srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_stdint.h:
 
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/stdio.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/_ansi.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/newlib.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/config.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/ieeefp.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/cdefs.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/include/stddef.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/include/stdarg.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/reent.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/_ansi.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_types.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/_types.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/lock.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/types.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/endian.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/_endian.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/select.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_sigset.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_timeval.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/timespec.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_timespec.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/types.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/stdio.h:
+
 /srv/gcc-arm-none-eabi-5_4-2016q3/lib/gcc/arm-none-eabi/5.4.1/include/stdbool.h:
+
+/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/math.h:
diff --git a/software/code.hex b/software/code.hex
index f22bce13b5b0494caffae2472d5cc651a0a4ff5f..f087474b3a6ecb39dbfdea7b09c2e2a3bb585632 100644
--- a/software/code.hex
+++ b/software/code.hex
@@ -54,10 +54,10 @@
 @0034 601A2200
 @0035 4B049A01
 @0036 D3F6429A
-@0037 F886F000
+@0037 F8C8F000
 @0038 46C0E7FE
-@0039 0000022C
-@003A 0000022C
+@0039 00000390
+@003A 00000390
 @003B 46C0E7FE
 @003C 46C0E7FE
 @003D 46C0E7FE
@@ -96,45 +96,134 @@
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+@00E0 46C0E778
+@00E1 0000027F
+@00E2 40000000
+@00E3 50000000
diff --git a/software/code.vmem b/software/code.vmem
index 92aac80e48c85bb9802bd8d77e06afee4b25c8bc..a92d4d8eb83bfb515c090e8392773f03bc5f9a9d 100644
--- a/software/code.vmem
+++ b/software/code.vmem
@@ -54,10 +54,10 @@
   assign memory[ 52 ] = 32'h601A2200;
   assign memory[ 53 ] = 32'h4B049A01;
   assign memory[ 54 ] = 32'hD3F6429A;
-  assign memory[ 55 ] = 32'hF886F000;
+  assign memory[ 55 ] = 32'hF8C8F000;
   assign memory[ 56 ] = 32'h46C0E7FE;
-  assign memory[ 57 ] = 32'h0000022C;
-  assign memory[ 58 ] = 32'h0000022C;
+  assign memory[ 57 ] = 32'h00000390;
+  assign memory[ 58 ] = 32'h00000390;
   assign memory[ 59 ] = 32'h46C0E7FE;
   assign memory[ 60 ] = 32'h46C0E7FE;
   assign memory[ 61 ] = 32'h46C0E7FE;
@@ -96,45 +96,134 @@
   assign memory[ 94 ] = 32'h601A9A01;
   assign memory[ 95 ] = 32'hB00646C0;
   assign memory[ 96 ] = 32'h46C04770;
-  assign memory[ 97 ] = 32'h00000228;
-  assign memory[ 98 ] = 32'h9001B082;
-  assign memory[ 99 ] = 32'h681A4B04;
-  assign memory[ 100 ] = 32'h009B9B01;
-  assign memory[ 101 ] = 32'h681B18D3;
-  assign memory[ 102 ] = 32'hB0020018;
-  assign memory[ 103 ] = 32'h46C04770;
-  assign memory[ 104 ] = 32'h00000224;
-  assign memory[ 105 ] = 32'h9001B084;
-  assign memory[ 106 ] = 32'h681B4B09;
-  assign memory[ 107 ] = 32'h681B3308;
-  assign memory[ 108 ] = 32'h9A039303;
-  assign memory[ 109 ] = 32'h411A9B01;
-  assign memory[ 110 ] = 32'h22010013;
-  assign memory[ 111 ] = 32'h93024013;
-  assign memory[ 112 ] = 32'h3B019B02;
-  assign memory[ 113 ] = 32'h4153425A;
-  assign memory[ 114 ] = 32'h0018B2DB;
-  assign memory[ 115 ] = 32'h4770B004;
-  assign memory[ 116 ] = 32'h00000224;
-  assign memory[ 117 ] = 32'h4B0446C0;
-  assign memory[ 118 ] = 32'h3308681B;
-  assign memory[ 119 ] = 32'h2B00681B;
-  assign memory[ 120 ] = 32'h46C0D0F9;
-  assign memory[ 121 ] = 32'h46C04770;
-  assign memory[ 122 ] = 32'h00000224;
-  assign memory[ 123 ] = 32'hB083B500;
-  assign memory[ 124 ] = 32'h93012300;
-  assign memory[ 125 ] = 32'h2300E011;
-  assign memory[ 126 ] = 32'hE0089300;
-  assign memory[ 127 ] = 32'h9B019900;
-  assign memory[ 128 ] = 32'h00182201;
-  assign memory[ 129 ] = 32'hFFA6F7FF;
-  assign memory[ 130 ] = 32'h33019B00;
-  assign memory[ 131 ] = 32'h9B009300;
-  assign memory[ 132 ] = 32'hDDF32B62;
-  assign memory[ 133 ] = 32'h33019B01;
-  assign memory[ 134 ] = 32'h9B019301;
-  assign memory[ 135 ] = 32'hDDEA2B62;
-  assign memory[ 136 ] = 32'h46C0E7E6;
-  assign memory[ 137 ] = 32'h40000000;
-  assign memory[ 138 ] = 32'h50000000;
+  assign memory[ 97 ] = 32'h0000038C;
+  assign memory[ 98 ] = 32'h9003B088;
+  assign memory[ 99 ] = 32'h92019102;
+  assign memory[ 100 ] = 32'h9A009300;
+  assign memory[ 101 ] = 32'h1AD39B09;
+  assign memory[ 102 ] = 32'h9A08990A;
+  assign memory[ 103 ] = 32'h435A1A8A;
+  assign memory[ 104 ] = 32'h9B019908;
+  assign memory[ 105 ] = 32'h980B1ACB;
+  assign memory[ 106 ] = 32'h1A419909;
+  assign memory[ 107 ] = 32'h18D3434B;
+  assign memory[ 108 ] = 32'h9A099307;
+  assign memory[ 109 ] = 32'h1AD39B02;
+  assign memory[ 110 ] = 32'h9A08990A;
+  assign memory[ 111 ] = 32'h435A1A8A;
+  assign memory[ 112 ] = 32'h9B089903;
+  assign memory[ 113 ] = 32'h980B1ACB;
+  assign memory[ 114 ] = 32'h1A419909;
+  assign memory[ 115 ] = 32'h18D3434B;
+  assign memory[ 116 ] = 32'h9A009306;
+  assign memory[ 117 ] = 32'h1AD39B09;
+  assign memory[ 118 ] = 32'h9A089903;
+  assign memory[ 119 ] = 32'h435A1A8A;
+  assign memory[ 120 ] = 32'h9B019908;
+  assign memory[ 121 ] = 32'h98021ACB;
+  assign memory[ 122 ] = 32'h1A419909;
+  assign memory[ 123 ] = 32'h18D3434B;
+  assign memory[ 124 ] = 32'h9A079305;
+  assign memory[ 125 ] = 32'h18D29B06;
+  assign memory[ 126 ] = 32'h429A9B05;
+  assign memory[ 127 ] = 32'h2301DD01;
+  assign memory[ 128 ] = 32'h2300E000;
+  assign memory[ 129 ] = 32'hB0080018;
+  assign memory[ 130 ] = 32'h46C04770;
+  assign memory[ 131 ] = 32'h9001B082;
+  assign memory[ 132 ] = 32'h681A4B04;
+  assign memory[ 133 ] = 32'h009B9B01;
+  assign memory[ 134 ] = 32'h681B18D3;
+  assign memory[ 135 ] = 32'hB0020018;
+  assign memory[ 136 ] = 32'h46C04770;
+  assign memory[ 137 ] = 32'h00000388;
+  assign memory[ 138 ] = 32'h9001B084;
+  assign memory[ 139 ] = 32'h681B4B09;
+  assign memory[ 140 ] = 32'h681B3308;
+  assign memory[ 141 ] = 32'h9A039303;
+  assign memory[ 142 ] = 32'h411A9B01;
+  assign memory[ 143 ] = 32'h22010013;
+  assign memory[ 144 ] = 32'h93024013;
+  assign memory[ 145 ] = 32'h3B019B02;
+  assign memory[ 146 ] = 32'h4153425A;
+  assign memory[ 147 ] = 32'h0018B2DB;
+  assign memory[ 148 ] = 32'h4770B004;
+  assign memory[ 149 ] = 32'h00000388;
+  assign memory[ 150 ] = 32'h4B0446C0;
+  assign memory[ 151 ] = 32'h3308681B;
+  assign memory[ 152 ] = 32'h2B00681B;
+  assign memory[ 153 ] = 32'h46C0D0F9;
+  assign memory[ 154 ] = 32'h46C04770;
+  assign memory[ 155 ] = 32'h00000388;
+  assign memory[ 156 ] = 32'hB08FB500;
+  assign memory[ 157 ] = 32'h930B230A;
+  assign memory[ 158 ] = 32'h930A231E;
+  assign memory[ 159 ] = 32'h93092314;
+  assign memory[ 160 ] = 32'h93082328;
+  assign memory[ 161 ] = 32'h93072314;
+  assign memory[ 162 ] = 32'h9306231E;
+  assign memory[ 163 ] = 32'h930D2300;
+  assign memory[ 164 ] = 32'h2300E072;
+  assign memory[ 165 ] = 32'hE067930C;
+  assign memory[ 166 ] = 32'h9B069A08;
+  assign memory[ 167 ] = 32'h990D1AD3;
+  assign memory[ 168 ] = 32'h1A8A9A07;
+  assign memory[ 169 ] = 32'h9907435A;
+  assign memory[ 170 ] = 32'h1ACB9B09;
+  assign memory[ 171 ] = 32'h9906980C;
+  assign memory[ 172 ] = 32'h434B1A41;
+  assign memory[ 173 ] = 32'h930518D3;
+  assign memory[ 174 ] = 32'h9B0A9A06;
+  assign memory[ 175 ] = 32'h990D1AD3;
+  assign memory[ 176 ] = 32'h1A8A9A07;
+  assign memory[ 177 ] = 32'h990B435A;
+  assign memory[ 178 ] = 32'h1ACB9B07;
+  assign memory[ 179 ] = 32'h9906980C;
+  assign memory[ 180 ] = 32'h434B1A41;
+  assign memory[ 181 ] = 32'h930418D3;
+  assign memory[ 182 ] = 32'h9B069A08;
+  assign memory[ 183 ] = 32'h990B1AD3;
+  assign memory[ 184 ] = 32'h1A8A9A07;
+  assign memory[ 185 ] = 32'h9907435A;
+  assign memory[ 186 ] = 32'h1ACB9B09;
+  assign memory[ 187 ] = 32'h9906980A;
+  assign memory[ 188 ] = 32'h434B1A41;
+  assign memory[ 189 ] = 32'h930318D3;
+  assign memory[ 190 ] = 32'h0FDB9B05;
+  assign memory[ 191 ] = 32'h9B03B2DA;
+  assign memory[ 192 ] = 32'h0FDB43DB;
+  assign memory[ 193 ] = 32'h4053B2DB;
+  assign memory[ 194 ] = 32'h9302B2DB;
+  assign memory[ 195 ] = 32'h0FDB9B04;
+  assign memory[ 196 ] = 32'h9B03B2DA;
+  assign memory[ 197 ] = 32'h0FDB43DB;
+  assign memory[ 198 ] = 32'h4053B2DB;
+  assign memory[ 199 ] = 32'h9301B2DB;
+  assign memory[ 200 ] = 32'h9B049A05;
+  assign memory[ 201 ] = 32'h230118D2;
+  assign memory[ 202 ] = 32'h9B031C19;
+  assign memory[ 203 ] = 32'hDC01429A;
+  assign memory[ 204 ] = 32'h1C192300;
+  assign memory[ 205 ] = 32'h9B03B2CA;
+  assign memory[ 206 ] = 32'h0FDB43DB;
+  assign memory[ 207 ] = 32'h4053B2DB;
+  assign memory[ 208 ] = 32'h9300B2DB;
+  assign memory[ 209 ] = 32'h2B009B02;
+  assign memory[ 210 ] = 32'h9B01D00B;
+  assign memory[ 211 ] = 32'hD0082B00;
+  assign memory[ 212 ] = 32'h2B009B00;
+  assign memory[ 213 ] = 32'h990CD005;
+  assign memory[ 214 ] = 32'h22019B0D;
+  assign memory[ 215 ] = 32'hF7FF0018;
+  assign memory[ 216 ] = 32'h9B0CFEF9;
+  assign memory[ 217 ] = 32'h930C3301;
+  assign memory[ 218 ] = 32'h23E09A0C;
+  assign memory[ 219 ] = 32'h429A33FF;
+  assign memory[ 220 ] = 32'h9B0DDD92;
+  assign memory[ 221 ] = 32'h930D3301;
+  assign memory[ 222 ] = 32'h4A029B0D;
+  assign memory[ 223 ] = 32'hDD884293;
+  assign memory[ 224 ] = 32'h46C0E778;
+  assign memory[ 225 ] = 32'h0000027F;
+  assign memory[ 226 ] = 32'h40000000;
+  assign memory[ 227 ] = 32'h50000000;
diff --git a/software/code/main.c b/software/code/main.c
index 7e49803d7019b2821a67f4f13ab45d3228ac513f..314abf102bc5e3ef352697de161910468efed641 100644
--- a/software/code/main.c
+++ b/software/code/main.c
@@ -1,73 +1,119 @@
-#define __MAIN_C__
-
-#include <stdint.h>
-#include <stdbool.h>
-
-// Define the raw base address values for the i/o devices
-
-#define AHB_SW_BASE                             0x40000000
-#define AHB_PIX_BASE                            0x50000000
-
-// Define pointers with correct type for access to 32-bit i/o devices
-volatile uint32_t* SW_REGS = (volatile uint32_t*) AHB_SW_BASE;
-volatile uint32_t* PIX_REGS = (volatile uint32_t*) AHB_PIX_BASE;
-
-#include <stdint.h>
-
-/////////////////////////////////////////////////////////////////
-// Functions provided to access i/o devices
-////////////////////////////////////////////////////////////////
-void write_pix(int x, int y, int colour) {
-  int pix_address ;
-  pix_address = x + 640*y ;
-  PIX_REGS[pix_address] = colour;
-}
-
-
-uint32_t read_switches(int addr) {
-
-  return SW_REGS[addr];
-
-}
-
-bool check_switches(int addr) {
-
-  int status, switches_ready;
-  
-  status = SW_REGS[2];
-  
-  // use the addr value to select one bit of the status register
-  switches_ready = (status >> addr) & 1;
-  
-  return (switches_ready == 1);
-
-}
-
-void wait_for_any_switch_data(void) {
-
-  // this is a 'busy wait'
-
-  //  ( it should only be used if there is nothing
-  //   else for the embedded system to do )
-
-  while ( SW_REGS[2] == 0 );
-  
-  return;
-
-}
-
-
-//////////////////////////////////////////////////////////////////
-// Main Function
-//////////////////////////////////////////////////////////////////
-
-int main(void) {
-
-while(1) {
-
-
-for (int x = 0 ; x < 99 ; x++){
-    for (int y = 0 ; y <99 ; y++) {
-       write_pix (x,y,1) ;}}
-       }
-}       
+#define __MAIN_C__
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdbool.h>
+#include<math.h>
+
+// Define the raw base address values for the i/o devices
+
+#define AHB_SW_BASE                             0x40000000
+#define AHB_PIX_BASE                            0x50000000
+
+// Define pointers with correct type for access to 32-bit i/o devices
+volatile uint32_t* SW_REGS = (volatile uint32_t*) AHB_SW_BASE;
+volatile uint32_t* PIX_REGS = (volatile uint32_t*) AHB_PIX_BASE;
+
+#include <stdint.h>
+
+/////////////////////////////////////////////////////////////////
+// Functions provided to access i/o devices
+////////////////////////////////////////////////////////////////
+
+void write_pix( int p_x, int p_y, int colour) {
+  int pix_address ;
+  pix_address = p_x + 640*p_y ;
+  PIX_REGS[pix_address] = colour;
+  }
+
+bool PointinTriangle(int x1, int y1, int x2, int y2, int x3, int y3, int x, int y){
+  
+  int L1_detT   =   ((y2-y3)*(x-x3))+((x3-x2)*(y-y3)) ;
+  int L2_detT   =   ((y3-y1)*(x-x3))+((x1-x3)*(y-y3)) ;
+  int detT =   ((y2-y3)*(x1-x3))+((x3-x2)*(y1-y3)) ;
+
+if((L1_detT + L2_detT) > detT)
+  return true ;
+else 
+  return false ;  
+
+}
+
+uint32_t read_switches(int addr) {
+
+  return SW_REGS[addr];
+
+}
+
+bool check_switches(int addr) {
+
+  int status, switches_ready;
+  
+  status = SW_REGS[2];
+  
+  // use the addr value to select one bit of the status register
+  switches_ready = (status >> addr) & 1;
+  
+  return (switches_ready == 1);
+
+}
+
+void wait_for_any_switch_data(void) {
+
+  // this is a 'busy wait'
+
+  //  ( it should only be used if there is nothing
+  //   else for the embedded system to do )
+
+  while ( SW_REGS[2] == 0 );
+  
+  return;
+
+}
+
+
+//////////////////////////////////////////////////////////////////
+// Main Function
+//////////////////////////////////////////////////////////////////
+int main(void) {
+
+  
+  
+while(1) {
+  int x1 = 10;
+  int y1 = 30;
+  
+ 
+  int x2 = 20;
+  int y2 = 40;
+  
+  int x3 = 20;
+  int y3 = 30;
+  
+  
+  int L1_detT ;
+  int L2_detT ;
+  int detT ;
+  
+  int L1_positive, L2_positive, L3_positive ;
+
+
+for (int x = 0 ; x < 640 ; x++){
+    for (int y = 0 ; y < 480 ; y++) {
+    
+	   L1_detT   =   ((y2-y3) *  (x-x3)) + ((x3-x2) *  (y-y3)) ;
+           L2_detT   =   ((y3-y1) *  (x-x3)) + ((x1-x3) *  (y-y3)) ;
+           detT  =   	 ((y2-y3) * (x1-x3)) + ((x3-x2) * (y1-y3)) ;
+	   
+          L1_positive = ((L1_detT >= 0) == (detT >= 0)) ;
+	  L2_positive = ((L2_detT >= 0) == (detT >= 0)) ;
+	  L3_positive = (((L1_detT + L2_detT) <= detT) == (detT >= 0)) ;
+	  
+	  
+	   if(L1_positive && L2_positive && L3_positive)
+            	write_pix(x,y,1);
+
+    } 
+  }
+ }
+}        
diff --git a/software/code/main.lst b/software/code/main.lst
index b0b7cf09d3f8457b1ed429105bc3ee5661fb570f..71229b846c8368f080103b0775046f0569bcea5f 100644
--- a/software/code/main.lst
+++ b/software/code/main.lst
@@ -1,4 +1,4 @@
-ARM GAS  /tmp/ccG4Ri7g.s 			page 1
+ARM GAS  /tmp/ccISJtFt.s 			page 1
 
 
    1              		.syntax unified
@@ -58,7 +58,7 @@ ARM GAS  /tmp/ccG4Ri7g.s 			page 1
   55              		.type	SW_REGS, %object
   56              		.size	SW_REGS, 4
   57              	SW_REGS:
-ARM GAS  /tmp/ccG4Ri7g.s 			page 2
+ARM GAS  /tmp/ccISJtFt.s 			page 2
 
 
   58 0000 00000040 		.word	1073741824
@@ -75,29 +75,32 @@ ARM GAS  /tmp/ccG4Ri7g.s 			page 1
   69              		.thumb_func
   70              		.type	write_pix, %function
   71              	write_pix:
-  72              	.LFB0:
+  72              	.LFB1:
   73              		.file 1 "code/main.c"
    1:code/main.c   **** #define __MAIN_C__
    2:code/main.c   **** 
    3:code/main.c   **** #include <stdint.h>
-   4:code/main.c   **** #include <stdbool.h>
-   5:code/main.c   **** 
-   6:code/main.c   **** // Define the raw base address values for the i/o devices
+   4:code/main.c   **** #include <stdio.h>
+   5:code/main.c   **** #include <stdbool.h>
+   6:code/main.c   **** #include<math.h>
    7:code/main.c   **** 
-   8:code/main.c   **** #define AHB_SW_BASE                             0x40000000
-   9:code/main.c   **** #define AHB_PIX_BASE                            0x50000000
-  10:code/main.c   **** 
-  11:code/main.c   **** // Define pointers with correct type for access to 32-bit i/o devices
-  12:code/main.c   **** volatile uint32_t* SW_REGS = (volatile uint32_t*) AHB_SW_BASE;
-  13:code/main.c   **** volatile uint32_t* PIX_REGS = (volatile uint32_t*) AHB_PIX_BASE;
-  14:code/main.c   **** 
-  15:code/main.c   **** #include <stdint.h>
+   8:code/main.c   **** // Define the raw base address values for the i/o devices
+   9:code/main.c   **** 
+  10:code/main.c   **** #define AHB_SW_BASE                             0x40000000
+  11:code/main.c   **** #define AHB_PIX_BASE                            0x50000000
+  12:code/main.c   **** 
+  13:code/main.c   **** // Define pointers with correct type for access to 32-bit i/o devices
+  14:code/main.c   **** volatile uint32_t* SW_REGS = (volatile uint32_t*) AHB_SW_BASE;
+  15:code/main.c   **** volatile uint32_t* PIX_REGS = (volatile uint32_t*) AHB_PIX_BASE;
   16:code/main.c   **** 
-  17:code/main.c   **** /////////////////////////////////////////////////////////////////
-  18:code/main.c   **** // Functions provided to access i/o devices
-  19:code/main.c   **** ////////////////////////////////////////////////////////////////
-  20:code/main.c   **** void write_pix(int x, int y, int colour) {
-  74              		.loc 1 20 0
+  17:code/main.c   **** #include <stdint.h>
+  18:code/main.c   **** 
+  19:code/main.c   **** /////////////////////////////////////////////////////////////////
+  20:code/main.c   **** // Functions provided to access i/o devices
+  21:code/main.c   **** ////////////////////////////////////////////////////////////////
+  22:code/main.c   **** 
+  23:code/main.c   **** void write_pix( int p_x, int p_y, int colour) {
+  74              		.loc 1 23 0
   75              		.cfi_startproc
   76              		@ args = 0, pretend = 0, frame = 24
   77              		@ frame_needed = 0, uses_anonymous_args = 0
@@ -105,35 +108,35 @@ ARM GAS  /tmp/ccG4Ri7g.s 			page 1
   79 0000 86B0     		sub	sp, sp, #24	@,,
   80              	.LCFI0:
   81              		.cfi_def_cfa_offset 24
-  82 0002 0390     		str	r0, [sp, #12]	@ x, x
-  83 0004 0291     		str	r1, [sp, #8]	@ y, y
+  82 0002 0390     		str	r0, [sp, #12]	@ p_x, p_x
+  83 0004 0291     		str	r1, [sp, #8]	@ p_y, p_y
   84 0006 0192     		str	r2, [sp, #4]	@ colour, colour
-  21:code/main.c   ****   int pix_address ;
-  22:code/main.c   ****   pix_address = x + 640*y ;
-  85              		.loc 1 22 0
-  86 0008 029A     		ldr	r2, [sp, #8]	@ tmp116, y
+  24:code/main.c   ****   int pix_address ;
+  25:code/main.c   ****   pix_address = p_x + 640*p_y ;
+  85              		.loc 1 25 0
+  86 0008 029A     		ldr	r2, [sp, #8]	@ tmp116, p_y
   87 000a 1300     		movs	r3, r2	@ tmp117, tmp116
   88 000c 9B00     		lsls	r3, r3, #2	@ tmp117, tmp117,
   89 000e 9B18     		adds	r3, r3, r2	@ tmp117, tmp117, tmp116
-  90 0010 DB01     		lsls	r3, r3, #7	@ tmp118, tmp117,
-  91 0012 1A00     		movs	r2, r3	@ D.4275, tmp117
-  92 0014 039B     		ldr	r3, [sp, #12]	@ tmp120, x
-ARM GAS  /tmp/ccG4Ri7g.s 			page 3
+ARM GAS  /tmp/ccISJtFt.s 			page 3
 
 
-  93 0016 D318     		adds	r3, r2, r3	@ tmp119, D.4275, tmp120
+  90 0010 DB01     		lsls	r3, r3, #7	@ tmp118, tmp117,
+  91 0012 1A00     		movs	r2, r3	@ D.5837, tmp117
+  92 0014 039B     		ldr	r3, [sp, #12]	@ tmp120, p_x
+  93 0016 D318     		adds	r3, r2, r3	@ tmp119, D.5837, tmp120
   94 0018 0593     		str	r3, [sp, #20]	@ tmp119, pix_address
-  23:code/main.c   ****   PIX_REGS[pix_address] = colour;
-  95              		.loc 1 23 0
+  26:code/main.c   ****   PIX_REGS[pix_address] = colour;
+  95              		.loc 1 26 0
   96 001a 054B     		ldr	r3, .L2	@ tmp121,
-  97 001c 1A68     		ldr	r2, [r3]	@ D.4276, PIX_REGS
-  98 001e 059B     		ldr	r3, [sp, #20]	@ D.4277, pix_address
-  99 0020 9B00     		lsls	r3, r3, #2	@ D.4277, D.4277,
- 100 0022 D318     		adds	r3, r2, r3	@ D.4276, D.4276, D.4277
- 101 0024 019A     		ldr	r2, [sp, #4]	@ D.4278, colour
- 102 0026 1A60     		str	r2, [r3]	@ D.4278, *_9
-  24:code/main.c   **** }
- 103              		.loc 1 24 0
+  97 001c 1A68     		ldr	r2, [r3]	@ D.5838, PIX_REGS
+  98 001e 059B     		ldr	r3, [sp, #20]	@ D.5839, pix_address
+  99 0020 9B00     		lsls	r3, r3, #2	@ D.5839, D.5839,
+ 100 0022 D318     		adds	r3, r2, r3	@ D.5838, D.5838, D.5839
+ 101 0024 019A     		ldr	r2, [sp, #4]	@ D.5840, colour
+ 102 0026 1A60     		str	r2, [r3]	@ D.5840, *_9
+  27:code/main.c   ****   }
+ 103              		.loc 1 27 0
  104 0028 C046     		nop
  105 002a 06B0     		add	sp, sp, #24	@,,
  106              		@ sp needed	@
@@ -143,1028 +146,1602 @@ ARM GAS  /tmp/ccG4Ri7g.s 			page 1
  110              	.L2:
  111 0030 00000000 		.word	PIX_REGS
  112              		.cfi_endproc
- 113              	.LFE0:
+ 113              	.LFE1:
  114              		.size	write_pix, .-write_pix
  115              		.align	2
- 116              		.global	read_switches
+ 116              		.global	PointinTriangle
  117              		.code	16
  118              		.thumb_func
- 119              		.type	read_switches, %function
- 120              	read_switches:
- 121              	.LFB1:
-  25:code/main.c   **** 
-  26:code/main.c   **** 
-  27:code/main.c   **** uint32_t read_switches(int addr) {
- 122              		.loc 1 27 0
+ 119              		.type	PointinTriangle, %function
+ 120              	PointinTriangle:
+ 121              	.LFB2:
+  28:code/main.c   **** 
+  29:code/main.c   **** bool PointinTriangle(int x1, int y1, int x2, int y2, int x3, int y3, int x, int y){
+ 122              		.loc 1 29 0
  123              		.cfi_startproc
- 124              		@ args = 0, pretend = 0, frame = 8
+ 124              		@ args = 16, pretend = 0, frame = 32
  125              		@ frame_needed = 0, uses_anonymous_args = 0
  126              		@ link register save eliminated.
- 127 0034 82B0     		sub	sp, sp, #8	@,,
+ 127 0034 88B0     		sub	sp, sp, #32	@,,
  128              	.LCFI1:
- 129              		.cfi_def_cfa_offset 8
- 130 0036 0190     		str	r0, [sp, #4]	@ addr, addr
-  28:code/main.c   **** 
-  29:code/main.c   ****   return SW_REGS[addr];
- 131              		.loc 1 29 0
- 132 0038 044B     		ldr	r3, .L6	@ tmp116,
- 133 003a 1A68     		ldr	r2, [r3]	@ D.4279, SW_REGS
- 134 003c 019B     		ldr	r3, [sp, #4]	@ D.4280, addr
- 135 003e 9B00     		lsls	r3, r3, #2	@ D.4280, D.4280,
- 136 0040 D318     		adds	r3, r2, r3	@ D.4279, D.4279, D.4280
- 137 0042 1B68     		ldr	r3, [r3]	@ D.4281, *_6
-  30:code/main.c   **** 
-  31:code/main.c   **** }
- 138              		.loc 1 31 0
- 139 0044 1800     		movs	r0, r3	@, <retval>
- 140 0046 02B0     		add	sp, sp, #8	@,,
-ARM GAS  /tmp/ccG4Ri7g.s 			page 4
+ 129              		.cfi_def_cfa_offset 32
+ 130 0036 0390     		str	r0, [sp, #12]	@ x1, x1
+ 131 0038 0291     		str	r1, [sp, #8]	@ y1, y1
+ 132 003a 0192     		str	r2, [sp, #4]	@ x2, x2
+ 133 003c 0093     		str	r3, [sp]	@ y2, y2
+  30:code/main.c   ****   
+  31:code/main.c   ****   int L1_detT   =   ((y2-y3)*(x-x3))+((x3-x2)*(y-y3)) ;
+ 134              		.loc 1 31 0
+ 135 003e 009A     		ldr	r2, [sp]	@ tmp131, y2
+ 136 0040 099B     		ldr	r3, [sp, #36]	@ tmp132, y3
+ 137 0042 D31A     		subs	r3, r2, r3	@ D.5842, tmp131, tmp132
+ 138 0044 0A99     		ldr	r1, [sp, #40]	@ tmp133, x
+ 139 0046 089A     		ldr	r2, [sp, #32]	@ tmp134, x3
+ 140 0048 8A1A     		subs	r2, r1, r2	@ D.5842, tmp133, tmp134
+ARM GAS  /tmp/ccISJtFt.s 			page 4
 
 
- 141              		@ sp needed	@
- 142 0048 7047     		bx	lr
- 143              	.L7:
- 144 004a C046     		.align	2
- 145              	.L6:
- 146 004c 00000000 		.word	SW_REGS
- 147              		.cfi_endproc
- 148              	.LFE1:
- 149              		.size	read_switches, .-read_switches
- 150              		.align	2
- 151              		.global	check_switches
- 152              		.code	16
- 153              		.thumb_func
- 154              		.type	check_switches, %function
- 155              	check_switches:
- 156              	.LFB2:
-  32:code/main.c   **** 
-  33:code/main.c   **** bool check_switches(int addr) {
- 157              		.loc 1 33 0
- 158              		.cfi_startproc
- 159              		@ args = 0, pretend = 0, frame = 16
- 160              		@ frame_needed = 0, uses_anonymous_args = 0
- 161              		@ link register save eliminated.
- 162 0050 84B0     		sub	sp, sp, #16	@,,
- 163              	.LCFI2:
- 164              		.cfi_def_cfa_offset 16
- 165 0052 0190     		str	r0, [sp, #4]	@ addr, addr
+ 141 004a 5A43     		muls	r2, r3	@ D.5842, D.5842
+ 142 004c 0899     		ldr	r1, [sp, #32]	@ tmp135, x3
+ 143 004e 019B     		ldr	r3, [sp, #4]	@ tmp136, x2
+ 144 0050 CB1A     		subs	r3, r1, r3	@ D.5842, tmp135, tmp136
+ 145 0052 0B98     		ldr	r0, [sp, #44]	@ tmp137, y
+ 146 0054 0999     		ldr	r1, [sp, #36]	@ tmp138, y3
+ 147 0056 411A     		subs	r1, r0, r1	@ D.5842, tmp137, tmp138
+ 148 0058 4B43     		muls	r3, r1	@ D.5842, D.5842
+ 149 005a D318     		adds	r3, r2, r3	@ tmp139, D.5842, D.5842
+ 150 005c 0793     		str	r3, [sp, #28]	@ tmp139, L1_detT
+  32:code/main.c   ****   int L2_detT   =   ((y3-y1)*(x-x3))+((x1-x3)*(y-y3)) ;
+ 151              		.loc 1 32 0
+ 152 005e 099A     		ldr	r2, [sp, #36]	@ tmp140, y3
+ 153 0060 029B     		ldr	r3, [sp, #8]	@ tmp141, y1
+ 154 0062 D31A     		subs	r3, r2, r3	@ D.5842, tmp140, tmp141
+ 155 0064 0A99     		ldr	r1, [sp, #40]	@ tmp142, x
+ 156 0066 089A     		ldr	r2, [sp, #32]	@ tmp143, x3
+ 157 0068 8A1A     		subs	r2, r1, r2	@ D.5842, tmp142, tmp143
+ 158 006a 5A43     		muls	r2, r3	@ D.5842, D.5842
+ 159 006c 0399     		ldr	r1, [sp, #12]	@ tmp144, x1
+ 160 006e 089B     		ldr	r3, [sp, #32]	@ tmp145, x3
+ 161 0070 CB1A     		subs	r3, r1, r3	@ D.5842, tmp144, tmp145
+ 162 0072 0B98     		ldr	r0, [sp, #44]	@ tmp146, y
+ 163 0074 0999     		ldr	r1, [sp, #36]	@ tmp147, y3
+ 164 0076 411A     		subs	r1, r0, r1	@ D.5842, tmp146, tmp147
+ 165 0078 4B43     		muls	r3, r1	@ D.5842, D.5842
+ 166 007a D318     		adds	r3, r2, r3	@ tmp148, D.5842, D.5842
+ 167 007c 0693     		str	r3, [sp, #24]	@ tmp148, L2_detT
+  33:code/main.c   ****   int detT =   ((y2-y3)*(x1-x3))+((x3-x2)*(y1-y3)) ;
+ 168              		.loc 1 33 0
+ 169 007e 009A     		ldr	r2, [sp]	@ tmp149, y2
+ 170 0080 099B     		ldr	r3, [sp, #36]	@ tmp150, y3
+ 171 0082 D31A     		subs	r3, r2, r3	@ D.5842, tmp149, tmp150
+ 172 0084 0399     		ldr	r1, [sp, #12]	@ tmp151, x1
+ 173 0086 089A     		ldr	r2, [sp, #32]	@ tmp152, x3
+ 174 0088 8A1A     		subs	r2, r1, r2	@ D.5842, tmp151, tmp152
+ 175 008a 5A43     		muls	r2, r3	@ D.5842, D.5842
+ 176 008c 0899     		ldr	r1, [sp, #32]	@ tmp153, x3
+ 177 008e 019B     		ldr	r3, [sp, #4]	@ tmp154, x2
+ 178 0090 CB1A     		subs	r3, r1, r3	@ D.5842, tmp153, tmp154
+ 179 0092 0298     		ldr	r0, [sp, #8]	@ tmp155, y1
+ 180 0094 0999     		ldr	r1, [sp, #36]	@ tmp156, y3
+ 181 0096 411A     		subs	r1, r0, r1	@ D.5842, tmp155, tmp156
+ 182 0098 4B43     		muls	r3, r1	@ D.5842, D.5842
+ 183 009a D318     		adds	r3, r2, r3	@ tmp157, D.5842, D.5842
+ 184 009c 0593     		str	r3, [sp, #20]	@ tmp157, detT
   34:code/main.c   **** 
-  35:code/main.c   ****   int status, switches_ready;
-  36:code/main.c   ****   
-  37:code/main.c   ****   status = SW_REGS[2];
- 166              		.loc 1 37 0
- 167 0054 094B     		ldr	r3, .L10	@ tmp116,
- 168 0056 1B68     		ldr	r3, [r3]	@ D.4282, SW_REGS
- 169 0058 0833     		adds	r3, r3, #8	@ D.4282,
- 170 005a 1B68     		ldr	r3, [r3]	@ D.4283, *_3
- 171 005c 0393     		str	r3, [sp, #12]	@ D.4283, status
-  38:code/main.c   ****   
-  39:code/main.c   ****   // use the addr value to select one bit of the status register
-  40:code/main.c   ****   switches_ready = (status >> addr) & 1;
- 172              		.loc 1 40 0
- 173 005e 039A     		ldr	r2, [sp, #12]	@ tmp117, status
- 174 0060 019B     		ldr	r3, [sp, #4]	@ tmp118, addr
- 175 0062 1A41     		asrs	r2, r2, r3	@ tmp117, tmp117, tmp118
- 176 0064 1300     		movs	r3, r2	@ D.4284, tmp117
- 177 0066 0122     		movs	r2, #1	@ tmp120,
- 178 0068 1340     		ands	r3, r2	@ tmp119, tmp120
- 179 006a 0293     		str	r3, [sp, #8]	@ tmp119, switches_ready
-  41:code/main.c   ****   
-  42:code/main.c   ****   return (switches_ready == 1);
- 180              		.loc 1 42 0
- 181 006c 029B     		ldr	r3, [sp, #8]	@ tmp122, switches_ready
- 182 006e 013B     		subs	r3, r3, #1	@ tmp124,
- 183 0070 5A42     		rsbs	r2, r3, #0	@ tmp125, tmp124
- 184 0072 5341     		adcs	r3, r3, r2	@ tmp123, tmp124, tmp125
- 185 0074 DBB2     		uxtb	r3, r3	@ D.4285, tmp121
-  43:code/main.c   **** 
-ARM GAS  /tmp/ccG4Ri7g.s 			page 5
+  35:code/main.c   **** if((L1_detT + L2_detT) > detT)
+ 185              		.loc 1 35 0
+ 186 009e 079A     		ldr	r2, [sp, #28]	@ tmp158, L1_detT
+ 187 00a0 069B     		ldr	r3, [sp, #24]	@ tmp159, L2_detT
+ 188 00a2 D218     		adds	r2, r2, r3	@ D.5842, tmp158, tmp159
+ 189 00a4 059B     		ldr	r3, [sp, #20]	@ tmp160, detT
+ 190 00a6 9A42     		cmp	r2, r3	@ D.5842, tmp160
+ 191 00a8 01DD     		ble	.L5	@,
+  36:code/main.c   ****   return true ;
+ 192              		.loc 1 36 0
+ARM GAS  /tmp/ccISJtFt.s 			page 5
 
 
-  44:code/main.c   **** }
- 186              		.loc 1 44 0
- 187 0076 1800     		movs	r0, r3	@, <retval>
- 188 0078 04B0     		add	sp, sp, #16	@,,
- 189              		@ sp needed	@
- 190 007a 7047     		bx	lr
- 191              	.L11:
- 192              		.align	2
- 193              	.L10:
- 194 007c 00000000 		.word	SW_REGS
- 195              		.cfi_endproc
- 196              	.LFE2:
- 197              		.size	check_switches, .-check_switches
- 198              		.align	2
- 199              		.global	wait_for_any_switch_data
- 200              		.code	16
- 201              		.thumb_func
- 202              		.type	wait_for_any_switch_data, %function
- 203              	wait_for_any_switch_data:
- 204              	.LFB3:
+ 193 00aa 0123     		movs	r3, #1	@ D.5841,
+ 194 00ac 00E0     		b	.L6	@
+ 195              	.L5:
+  37:code/main.c   **** else 
+  38:code/main.c   ****   return false ;  
+ 196              		.loc 1 38 0
+ 197 00ae 0023     		movs	r3, #0	@ D.5841,
+ 198              	.L6:
+  39:code/main.c   **** 
+  40:code/main.c   **** }
+ 199              		.loc 1 40 0
+ 200 00b0 1800     		movs	r0, r3	@, <retval>
+ 201 00b2 08B0     		add	sp, sp, #32	@,,
+ 202              		@ sp needed	@
+ 203 00b4 7047     		bx	lr
+ 204              		.cfi_endproc
+ 205              	.LFE2:
+ 206              		.size	PointinTriangle, .-PointinTriangle
+ 207 00b6 C046     		.align	2
+ 208              		.global	read_switches
+ 209              		.code	16
+ 210              		.thumb_func
+ 211              		.type	read_switches, %function
+ 212              	read_switches:
+ 213              	.LFB3:
+  41:code/main.c   **** 
+  42:code/main.c   **** uint32_t read_switches(int addr) {
+ 214              		.loc 1 42 0
+ 215              		.cfi_startproc
+ 216              		@ args = 0, pretend = 0, frame = 8
+ 217              		@ frame_needed = 0, uses_anonymous_args = 0
+ 218              		@ link register save eliminated.
+ 219 00b8 82B0     		sub	sp, sp, #8	@,,
+ 220              	.LCFI2:
+ 221              		.cfi_def_cfa_offset 8
+ 222 00ba 0190     		str	r0, [sp, #4]	@ addr, addr
+  43:code/main.c   **** 
+  44:code/main.c   ****   return SW_REGS[addr];
+ 223              		.loc 1 44 0
+ 224 00bc 044B     		ldr	r3, .L9	@ tmp116,
+ 225 00be 1A68     		ldr	r2, [r3]	@ D.5843, SW_REGS
+ 226 00c0 019B     		ldr	r3, [sp, #4]	@ D.5844, addr
+ 227 00c2 9B00     		lsls	r3, r3, #2	@ D.5844, D.5844,
+ 228 00c4 D318     		adds	r3, r2, r3	@ D.5843, D.5843, D.5844
+ 229 00c6 1B68     		ldr	r3, [r3]	@ D.5845, *_6
   45:code/main.c   **** 
-  46:code/main.c   **** void wait_for_any_switch_data(void) {
- 205              		.loc 1 46 0
- 206              		.cfi_startproc
- 207              		@ args = 0, pretend = 0, frame = 0
- 208              		@ frame_needed = 0, uses_anonymous_args = 0
- 209              		@ link register save eliminated.
+  46:code/main.c   **** }
+ 230              		.loc 1 46 0
+ 231 00c8 1800     		movs	r0, r3	@, <retval>
+ 232 00ca 02B0     		add	sp, sp, #8	@,,
+ 233              		@ sp needed	@
+ 234 00cc 7047     		bx	lr
+ 235              	.L10:
+ 236 00ce C046     		.align	2
+ 237              	.L9:
+ 238 00d0 00000000 		.word	SW_REGS
+ 239              		.cfi_endproc
+ARM GAS  /tmp/ccISJtFt.s 			page 6
+
+
+ 240              	.LFE3:
+ 241              		.size	read_switches, .-read_switches
+ 242              		.align	2
+ 243              		.global	check_switches
+ 244              		.code	16
+ 245              		.thumb_func
+ 246              		.type	check_switches, %function
+ 247              	check_switches:
+ 248              	.LFB4:
   47:code/main.c   **** 
-  48:code/main.c   ****   // this is a 'busy wait'
+  48:code/main.c   **** bool check_switches(int addr) {
+ 249              		.loc 1 48 0
+ 250              		.cfi_startproc
+ 251              		@ args = 0, pretend = 0, frame = 16
+ 252              		@ frame_needed = 0, uses_anonymous_args = 0
+ 253              		@ link register save eliminated.
+ 254 00d4 84B0     		sub	sp, sp, #16	@,,
+ 255              	.LCFI3:
+ 256              		.cfi_def_cfa_offset 16
+ 257 00d6 0190     		str	r0, [sp, #4]	@ addr, addr
   49:code/main.c   **** 
-  50:code/main.c   ****   //  ( it should only be used if there is nothing
-  51:code/main.c   ****   //   else for the embedded system to do )
-  52:code/main.c   **** 
-  53:code/main.c   ****   while ( SW_REGS[2] == 0 );
- 210              		.loc 1 53 0
- 211 0080 C046     		nop
- 212              	.L13:
- 213              		.loc 1 53 0 is_stmt 0 discriminator 1
- 214 0082 044B     		ldr	r3, .L15	@ tmp113,
- 215 0084 1B68     		ldr	r3, [r3]	@ D.4286, SW_REGS
- 216 0086 0833     		adds	r3, r3, #8	@ D.4286,
- 217 0088 1B68     		ldr	r3, [r3]	@ D.4287, *_3
- 218 008a 002B     		cmp	r3, #0	@ D.4287,
- 219 008c F9D0     		beq	.L13	@,
-  54:code/main.c   ****   
-  55:code/main.c   ****   return;
- 220              		.loc 1 55 0 is_stmt 1
- 221 008e C046     		nop
-  56:code/main.c   **** 
-  57:code/main.c   **** }
- 222              		.loc 1 57 0
- 223              		@ sp needed	@
- 224 0090 7047     		bx	lr
- 225              	.L16:
- 226 0092 C046     		.align	2
- 227              	.L15:
- 228 0094 00000000 		.word	SW_REGS
-ARM GAS  /tmp/ccG4Ri7g.s 			page 6
+  50:code/main.c   ****   int status, switches_ready;
+  51:code/main.c   ****   
+  52:code/main.c   ****   status = SW_REGS[2];
+ 258              		.loc 1 52 0
+ 259 00d8 094B     		ldr	r3, .L13	@ tmp116,
+ 260 00da 1B68     		ldr	r3, [r3]	@ D.5846, SW_REGS
+ 261 00dc 0833     		adds	r3, r3, #8	@ D.5846,
+ 262 00de 1B68     		ldr	r3, [r3]	@ D.5847, *_3
+ 263 00e0 0393     		str	r3, [sp, #12]	@ D.5847, status
+  53:code/main.c   ****   
+  54:code/main.c   ****   // use the addr value to select one bit of the status register
+  55:code/main.c   ****   switches_ready = (status >> addr) & 1;
+ 264              		.loc 1 55 0
+ 265 00e2 039A     		ldr	r2, [sp, #12]	@ tmp117, status
+ 266 00e4 019B     		ldr	r3, [sp, #4]	@ tmp118, addr
+ 267 00e6 1A41     		asrs	r2, r2, r3	@ tmp117, tmp117, tmp118
+ 268 00e8 1300     		movs	r3, r2	@ D.5848, tmp117
+ 269 00ea 0122     		movs	r2, #1	@ tmp120,
+ 270 00ec 1340     		ands	r3, r2	@ tmp119, tmp120
+ 271 00ee 0293     		str	r3, [sp, #8]	@ tmp119, switches_ready
+  56:code/main.c   ****   
+  57:code/main.c   ****   return (switches_ready == 1);
+ 272              		.loc 1 57 0
+ 273 00f0 029B     		ldr	r3, [sp, #8]	@ tmp122, switches_ready
+ 274 00f2 013B     		subs	r3, r3, #1	@ tmp124,
+ 275 00f4 5A42     		rsbs	r2, r3, #0	@ tmp125, tmp124
+ 276 00f6 5341     		adcs	r3, r3, r2	@ tmp123, tmp124, tmp125
+ 277 00f8 DBB2     		uxtb	r3, r3	@ D.5849, tmp121
+  58:code/main.c   **** 
+  59:code/main.c   **** }
+ 278              		.loc 1 59 0
+ 279 00fa 1800     		movs	r0, r3	@, <retval>
+ 280 00fc 04B0     		add	sp, sp, #16	@,,
+ 281              		@ sp needed	@
+ 282 00fe 7047     		bx	lr
+ 283              	.L14:
+ARM GAS  /tmp/ccISJtFt.s 			page 7
 
 
- 229              		.cfi_endproc
- 230              	.LFE3:
- 231              		.size	wait_for_any_switch_data, .-wait_for_any_switch_data
- 232              		.align	2
- 233              		.global	main
- 234              		.code	16
- 235              		.thumb_func
- 236              		.type	main, %function
- 237              	main:
- 238              	.LFB4:
-  58:code/main.c   **** 
-  59:code/main.c   **** 
-  60:code/main.c   **** //////////////////////////////////////////////////////////////////
-  61:code/main.c   **** // Main Function
-  62:code/main.c   **** //////////////////////////////////////////////////////////////////
-  63:code/main.c   **** 
-  64:code/main.c   **** int main(void) {
- 239              		.loc 1 64 0
- 240              		.cfi_startproc
- 241              		@ args = 0, pretend = 0, frame = 8
- 242              		@ frame_needed = 0, uses_anonymous_args = 0
- 243 0098 00B5     		push	{lr}	@
- 244              	.LCFI3:
- 245              		.cfi_def_cfa_offset 4
- 246              		.cfi_offset 14, -4
- 247 009a 83B0     		sub	sp, sp, #12	@,,
- 248              	.LCFI4:
- 249              		.cfi_def_cfa_offset 16
- 250              	.L22:
- 251              	.LBB2:
-  65:code/main.c   **** 
-  66:code/main.c   **** while(1) {
+ 284              		.align	2
+ 285              	.L13:
+ 286 0100 00000000 		.word	SW_REGS
+ 287              		.cfi_endproc
+ 288              	.LFE4:
+ 289              		.size	check_switches, .-check_switches
+ 290              		.align	2
+ 291              		.global	wait_for_any_switch_data
+ 292              		.code	16
+ 293              		.thumb_func
+ 294              		.type	wait_for_any_switch_data, %function
+ 295              	wait_for_any_switch_data:
+ 296              	.LFB5:
+  60:code/main.c   **** 
+  61:code/main.c   **** void wait_for_any_switch_data(void) {
+ 297              		.loc 1 61 0
+ 298              		.cfi_startproc
+ 299              		@ args = 0, pretend = 0, frame = 0
+ 300              		@ frame_needed = 0, uses_anonymous_args = 0
+ 301              		@ link register save eliminated.
+  62:code/main.c   **** 
+  63:code/main.c   ****   // this is a 'busy wait'
+  64:code/main.c   **** 
+  65:code/main.c   ****   //  ( it should only be used if there is nothing
+  66:code/main.c   ****   //   else for the embedded system to do )
   67:code/main.c   **** 
-  68:code/main.c   **** 
-  69:code/main.c   **** for (int x = 0 ; x < 99 ; x++){
- 252              		.loc 1 69 0
- 253 009c 0023     		movs	r3, #0	@ tmp111,
- 254 009e 0193     		str	r3, [sp, #4]	@ tmp111, x
- 255 00a0 11E0     		b	.L18	@
- 256              	.L21:
- 257              	.LBB3:
-  70:code/main.c   ****     for (int y = 0 ; y <99 ; y++) {
- 258              		.loc 1 70 0
- 259 00a2 0023     		movs	r3, #0	@ tmp112,
- 260 00a4 0093     		str	r3, [sp]	@ tmp112, y
- 261 00a6 08E0     		b	.L19	@
- 262              	.L20:
-  71:code/main.c   ****        write_pix (x,y,1) ;}}
- 263              		.loc 1 71 0 discriminator 3
- 264 00a8 0099     		ldr	r1, [sp]	@ tmp113, y
- 265 00aa 019B     		ldr	r3, [sp, #4]	@ tmp114, x
- 266 00ac 0122     		movs	r2, #1	@,
- 267 00ae 1800     		movs	r0, r3	@, tmp114
- 268 00b0 FFF7FEFF 		bl	write_pix	@
-  70:code/main.c   ****     for (int y = 0 ; y <99 ; y++) {
- 269              		.loc 1 70 0 discriminator 3
- 270 00b4 009B     		ldr	r3, [sp]	@ tmp116, y
-ARM GAS  /tmp/ccG4Ri7g.s 			page 7
+  68:code/main.c   ****   while ( SW_REGS[2] == 0 );
+ 302              		.loc 1 68 0
+ 303 0104 C046     		nop
+ 304              	.L16:
+ 305              		.loc 1 68 0 is_stmt 0 discriminator 1
+ 306 0106 044B     		ldr	r3, .L18	@ tmp113,
+ 307 0108 1B68     		ldr	r3, [r3]	@ D.5850, SW_REGS
+ 308 010a 0833     		adds	r3, r3, #8	@ D.5850,
+ 309 010c 1B68     		ldr	r3, [r3]	@ D.5851, *_3
+ 310 010e 002B     		cmp	r3, #0	@ D.5851,
+ 311 0110 F9D0     		beq	.L16	@,
+  69:code/main.c   ****   
+  70:code/main.c   ****   return;
+ 312              		.loc 1 70 0 is_stmt 1
+ 313 0112 C046     		nop
+  71:code/main.c   **** 
+  72:code/main.c   **** }
+ 314              		.loc 1 72 0
+ 315              		@ sp needed	@
+ 316 0114 7047     		bx	lr
+ 317              	.L19:
+ 318 0116 C046     		.align	2
+ 319              	.L18:
+ 320 0118 00000000 		.word	SW_REGS
+ 321              		.cfi_endproc
+ 322              	.LFE5:
+ 323              		.size	wait_for_any_switch_data, .-wait_for_any_switch_data
+ 324              		.align	2
+ 325              		.global	main
+ 326              		.code	16
+ 327              		.thumb_func
+ARM GAS  /tmp/ccISJtFt.s 			page 8
+
+
+ 328              		.type	main, %function
+ 329              	main:
+ 330              	.LFB6:
+  73:code/main.c   **** 
+  74:code/main.c   **** 
+  75:code/main.c   **** //////////////////////////////////////////////////////////////////
+  76:code/main.c   **** // Main Function
+  77:code/main.c   **** //////////////////////////////////////////////////////////////////
+  78:code/main.c   **** int main(void) {
+ 331              		.loc 1 78 0
+ 332              		.cfi_startproc
+ 333              		@ args = 0, pretend = 0, frame = 56
+ 334              		@ frame_needed = 0, uses_anonymous_args = 0
+ 335 011c 00B5     		push	{lr}	@
+ 336              	.LCFI4:
+ 337              		.cfi_def_cfa_offset 4
+ 338              		.cfi_offset 14, -4
+ 339 011e 8FB0     		sub	sp, sp, #60	@,,
+ 340              	.LCFI5:
+ 341              		.cfi_def_cfa_offset 64
+ 342              	.L27:
+ 343              	.LBB2:
+  79:code/main.c   **** 
+  80:code/main.c   ****   
+  81:code/main.c   ****   
+  82:code/main.c   **** while(1) {
+  83:code/main.c   ****   int x1 = 10;
+ 344              		.loc 1 83 0
+ 345 0120 0A23     		movs	r3, #10	@ tmp139,
+ 346 0122 0B93     		str	r3, [sp, #44]	@ tmp139, x1
+  84:code/main.c   ****   int y1 = 30;
+ 347              		.loc 1 84 0
+ 348 0124 1E23     		movs	r3, #30	@ tmp140,
+ 349 0126 0A93     		str	r3, [sp, #40]	@ tmp140, y1
+  85:code/main.c   ****   
+  86:code/main.c   ****  
+  87:code/main.c   ****   int x2 = 20;
+ 350              		.loc 1 87 0
+ 351 0128 1423     		movs	r3, #20	@ tmp141,
+ 352 012a 0993     		str	r3, [sp, #36]	@ tmp141, x2
+  88:code/main.c   ****   int y2 = 40;
+ 353              		.loc 1 88 0
+ 354 012c 2823     		movs	r3, #40	@ tmp142,
+ 355 012e 0893     		str	r3, [sp, #32]	@ tmp142, y2
+  89:code/main.c   ****   
+  90:code/main.c   ****   int x3 = 20;
+ 356              		.loc 1 90 0
+ 357 0130 1423     		movs	r3, #20	@ tmp143,
+ 358 0132 0793     		str	r3, [sp, #28]	@ tmp143, x3
+  91:code/main.c   ****   int y3 = 30;
+ 359              		.loc 1 91 0
+ 360 0134 1E23     		movs	r3, #30	@ tmp144,
+ 361 0136 0693     		str	r3, [sp, #24]	@ tmp144, y3
+ 362              	.LBB3:
+  92:code/main.c   ****   
+  93:code/main.c   ****   
+  94:code/main.c   ****   int L1_detT ;
+ARM GAS  /tmp/ccISJtFt.s 			page 9
+
+
+  95:code/main.c   ****   int L2_detT ;
+  96:code/main.c   ****   int detT ;
+  97:code/main.c   ****   
+  98:code/main.c   ****   int L1_positive, L2_positive, L3_positive ;
+  99:code/main.c   **** 
+ 100:code/main.c   **** 
+ 101:code/main.c   **** for (int x = 0 ; x < 640 ; x++){
+ 363              		.loc 1 101 0
+ 364 0138 0023     		movs	r3, #0	@ tmp145,
+ 365 013a 0D93     		str	r3, [sp, #52]	@ tmp145, x
+ 366 013c 72E0     		b	.L21	@
+ 367              	.L26:
+ 368              	.LBB4:
+ 102:code/main.c   ****     for (int y = 0 ; y < 480 ; y++) {
+ 369              		.loc 1 102 0
+ 370 013e 0023     		movs	r3, #0	@ tmp146,
+ 371 0140 0C93     		str	r3, [sp, #48]	@ tmp146, y
+ 372 0142 67E0     		b	.L22	@
+ 373              	.L25:
+ 103:code/main.c   ****     
+ 104:code/main.c   **** 	   L1_detT   =   ((y2-y3) *  (x-x3)) + ((x3-x2) *  (y-y3)) ;
+ 374              		.loc 1 104 0
+ 375 0144 089A     		ldr	r2, [sp, #32]	@ tmp147, y2
+ 376 0146 069B     		ldr	r3, [sp, #24]	@ tmp148, y3
+ 377 0148 D31A     		subs	r3, r2, r3	@ D.5852, tmp147, tmp148
+ 378 014a 0D99     		ldr	r1, [sp, #52]	@ tmp149, x
+ 379 014c 079A     		ldr	r2, [sp, #28]	@ tmp150, x3
+ 380 014e 8A1A     		subs	r2, r1, r2	@ D.5852, tmp149, tmp150
+ 381 0150 5A43     		muls	r2, r3	@ D.5852, D.5852
+ 382 0152 0799     		ldr	r1, [sp, #28]	@ tmp151, x3
+ 383 0154 099B     		ldr	r3, [sp, #36]	@ tmp152, x2
+ 384 0156 CB1A     		subs	r3, r1, r3	@ D.5852, tmp151, tmp152
+ 385 0158 0C98     		ldr	r0, [sp, #48]	@ tmp153, y
+ 386 015a 0699     		ldr	r1, [sp, #24]	@ tmp154, y3
+ 387 015c 411A     		subs	r1, r0, r1	@ D.5852, tmp153, tmp154
+ 388 015e 4B43     		muls	r3, r1	@ D.5852, D.5852
+ 389 0160 D318     		adds	r3, r2, r3	@ tmp155, D.5852, D.5852
+ 390 0162 0593     		str	r3, [sp, #20]	@ tmp155, L1_detT
+ 105:code/main.c   ****            L2_detT   =   ((y3-y1) *  (x-x3)) + ((x1-x3) *  (y-y3)) ;
+ 391              		.loc 1 105 0
+ 392 0164 069A     		ldr	r2, [sp, #24]	@ tmp156, y3
+ 393 0166 0A9B     		ldr	r3, [sp, #40]	@ tmp157, y1
+ 394 0168 D31A     		subs	r3, r2, r3	@ D.5852, tmp156, tmp157
+ 395 016a 0D99     		ldr	r1, [sp, #52]	@ tmp158, x
+ 396 016c 079A     		ldr	r2, [sp, #28]	@ tmp159, x3
+ 397 016e 8A1A     		subs	r2, r1, r2	@ D.5852, tmp158, tmp159
+ 398 0170 5A43     		muls	r2, r3	@ D.5852, D.5852
+ 399 0172 0B99     		ldr	r1, [sp, #44]	@ tmp160, x1
+ 400 0174 079B     		ldr	r3, [sp, #28]	@ tmp161, x3
+ 401 0176 CB1A     		subs	r3, r1, r3	@ D.5852, tmp160, tmp161
+ 402 0178 0C98     		ldr	r0, [sp, #48]	@ tmp162, y
+ 403 017a 0699     		ldr	r1, [sp, #24]	@ tmp163, y3
+ 404 017c 411A     		subs	r1, r0, r1	@ D.5852, tmp162, tmp163
+ 405 017e 4B43     		muls	r3, r1	@ D.5852, D.5852
+ 406 0180 D318     		adds	r3, r2, r3	@ tmp164, D.5852, D.5852
+ 407 0182 0493     		str	r3, [sp, #16]	@ tmp164, L2_detT
+ 106:code/main.c   ****            detT  =   	 ((y2-y3) * (x1-x3)) + ((x3-x2) * (y1-y3)) ;
+ARM GAS  /tmp/ccISJtFt.s 			page 10
+
+
+ 408              		.loc 1 106 0
+ 409 0184 089A     		ldr	r2, [sp, #32]	@ tmp165, y2
+ 410 0186 069B     		ldr	r3, [sp, #24]	@ tmp166, y3
+ 411 0188 D31A     		subs	r3, r2, r3	@ D.5852, tmp165, tmp166
+ 412 018a 0B99     		ldr	r1, [sp, #44]	@ tmp167, x1
+ 413 018c 079A     		ldr	r2, [sp, #28]	@ tmp168, x3
+ 414 018e 8A1A     		subs	r2, r1, r2	@ D.5852, tmp167, tmp168
+ 415 0190 5A43     		muls	r2, r3	@ D.5852, D.5852
+ 416 0192 0799     		ldr	r1, [sp, #28]	@ tmp169, x3
+ 417 0194 099B     		ldr	r3, [sp, #36]	@ tmp170, x2
+ 418 0196 CB1A     		subs	r3, r1, r3	@ D.5852, tmp169, tmp170
+ 419 0198 0A98     		ldr	r0, [sp, #40]	@ tmp171, y1
+ 420 019a 0699     		ldr	r1, [sp, #24]	@ tmp172, y3
+ 421 019c 411A     		subs	r1, r0, r1	@ D.5852, tmp171, tmp172
+ 422 019e 4B43     		muls	r3, r1	@ D.5852, D.5852
+ 423 01a0 D318     		adds	r3, r2, r3	@ tmp173, D.5852, D.5852
+ 424 01a2 0393     		str	r3, [sp, #12]	@ tmp173, detT
+ 107:code/main.c   **** 	   
+ 108:code/main.c   ****           L1_positive = ((L1_detT >= 0) == (detT >= 0)) ;
+ 425              		.loc 1 108 0
+ 426 01a4 059B     		ldr	r3, [sp, #20]	@ tmp176, L1_detT
+ 427 01a6 DB0F     		lsrs	r3, r3, #31	@ tmp175, tmp176,
+ 428 01a8 DAB2     		uxtb	r2, r3	@ D.5853, tmp175
+ 429 01aa 039B     		ldr	r3, [sp, #12]	@ tmp179, detT
+ 430 01ac DB43     		mvns	r3, r3	@ tmp178, tmp179
+ 431 01ae DB0F     		lsrs	r3, r3, #31	@ tmp180, tmp178,
+ 432 01b0 DBB2     		uxtb	r3, r3	@ D.5853, tmp180
+ 433 01b2 5340     		eors	r3, r2	@ tmp181, D.5853
+ 434 01b4 DBB2     		uxtb	r3, r3	@ D.5853, tmp181
+ 435 01b6 0293     		str	r3, [sp, #8]	@ D.5853, L1_positive
+ 109:code/main.c   **** 	  L2_positive = ((L2_detT >= 0) == (detT >= 0)) ;
+ 436              		.loc 1 109 0
+ 437 01b8 049B     		ldr	r3, [sp, #16]	@ tmp184, L2_detT
+ 438 01ba DB0F     		lsrs	r3, r3, #31	@ tmp183, tmp184,
+ 439 01bc DAB2     		uxtb	r2, r3	@ D.5853, tmp183
+ 440 01be 039B     		ldr	r3, [sp, #12]	@ tmp187, detT
+ 441 01c0 DB43     		mvns	r3, r3	@ tmp186, tmp187
+ 442 01c2 DB0F     		lsrs	r3, r3, #31	@ tmp188, tmp186,
+ 443 01c4 DBB2     		uxtb	r3, r3	@ D.5853, tmp188
+ 444 01c6 5340     		eors	r3, r2	@ tmp189, D.5853
+ 445 01c8 DBB2     		uxtb	r3, r3	@ D.5853, tmp189
+ 446 01ca 0193     		str	r3, [sp, #4]	@ D.5853, L2_positive
+ 110:code/main.c   **** 	  L3_positive = (((L1_detT + L2_detT) <= detT) == (detT >= 0)) ;
+ 447              		.loc 1 110 0
+ 448 01cc 059A     		ldr	r2, [sp, #20]	@ tmp190, L1_detT
+ 449 01ce 049B     		ldr	r3, [sp, #16]	@ tmp191, L2_detT
+ 450 01d0 D218     		adds	r2, r2, r3	@ D.5852, tmp190, tmp191
+ 451 01d2 0123     		movs	r3, #1	@ tmp195,
+ 452 01d4 191C     		adds	r1, r3, #0	@ tmp192, tmp195
+ 453 01d6 039B     		ldr	r3, [sp, #12]	@ tmp196, detT
+ 454 01d8 9A42     		cmp	r2, r3	@ D.5852, tmp196
+ 455 01da 01DC     		bgt	.L23	@,
+ 456 01dc 0023     		movs	r3, #0	@ tmp197,
+ 457 01de 191C     		adds	r1, r3, #0	@ tmp192, tmp197
+ 458              	.L23:
+ 459 01e0 CAB2     		uxtb	r2, r1	@ D.5853, tmp192
+ 460 01e2 039B     		ldr	r3, [sp, #12]	@ tmp200, detT
+ARM GAS  /tmp/ccISJtFt.s 			page 11
+
+
+ 461 01e4 DB43     		mvns	r3, r3	@ tmp199, tmp200
+ 462 01e6 DB0F     		lsrs	r3, r3, #31	@ tmp201, tmp199,
+ 463 01e8 DBB2     		uxtb	r3, r3	@ D.5853, tmp201
+ 464 01ea 5340     		eors	r3, r2	@ tmp202, D.5853
+ 465 01ec DBB2     		uxtb	r3, r3	@ D.5853, tmp202
+ 466 01ee 0093     		str	r3, [sp]	@ D.5853, L3_positive
+ 111:code/main.c   **** 	  
+ 112:code/main.c   **** 	  
+ 113:code/main.c   **** 	   if(L1_positive && L2_positive && L3_positive)
+ 467              		.loc 1 113 0
+ 468 01f0 029B     		ldr	r3, [sp, #8]	@ tmp203, L1_positive
+ 469 01f2 002B     		cmp	r3, #0	@ tmp203,
+ 470 01f4 0BD0     		beq	.L24	@,
+ 471              		.loc 1 113 0 is_stmt 0 discriminator 1
+ 472 01f6 019B     		ldr	r3, [sp, #4]	@ tmp204, L2_positive
+ 473 01f8 002B     		cmp	r3, #0	@ tmp204,
+ 474 01fa 08D0     		beq	.L24	@,
+ 475              		.loc 1 113 0 discriminator 2
+ 476 01fc 009B     		ldr	r3, [sp]	@ tmp205, L3_positive
+ 477 01fe 002B     		cmp	r3, #0	@ tmp205,
+ 478 0200 05D0     		beq	.L24	@,
+ 114:code/main.c   ****             	write_pix(x,y,1);
+ 479              		.loc 1 114 0 is_stmt 1
+ 480 0202 0C99     		ldr	r1, [sp, #48]	@ tmp206, y
+ 481 0204 0D9B     		ldr	r3, [sp, #52]	@ tmp207, x
+ 482 0206 0122     		movs	r2, #1	@,
+ 483 0208 1800     		movs	r0, r3	@, tmp207
+ 484 020a FFF7FEFF 		bl	write_pix	@
+ 485              	.L24:
+ 102:code/main.c   ****     
+ 486              		.loc 1 102 0 discriminator 2
+ 487 020e 0C9B     		ldr	r3, [sp, #48]	@ tmp209, y
+ 488 0210 0133     		adds	r3, r3, #1	@ tmp208,
+ 489 0212 0C93     		str	r3, [sp, #48]	@ tmp208, y
+ 490              	.L22:
+ 102:code/main.c   ****     
+ 491              		.loc 1 102 0 is_stmt 0 discriminator 1
+ 492 0214 0C9A     		ldr	r2, [sp, #48]	@ tmp210, y
+ 493 0216 E023     		movs	r3, #224	@ tmp216,
+ 494 0218 FF33     		adds	r3, r3, #255	@ tmp211,
+ 495 021a 9A42     		cmp	r2, r3	@ tmp210, tmp211
+ 496 021c 92DD     		ble	.L25	@,
+ 497              	.LBE4:
+ 101:code/main.c   ****     for (int y = 0 ; y < 480 ; y++) {
+ 498              		.loc 1 101 0 is_stmt 1 discriminator 2
+ 499 021e 0D9B     		ldr	r3, [sp, #52]	@ tmp213, x
+ 500 0220 0133     		adds	r3, r3, #1	@ tmp212,
+ 501 0222 0D93     		str	r3, [sp, #52]	@ tmp212, x
+ 502              	.L21:
+ 101:code/main.c   ****     for (int y = 0 ; y < 480 ; y++) {
+ 503              		.loc 1 101 0 is_stmt 0 discriminator 1
+ 504 0224 0D9B     		ldr	r3, [sp, #52]	@ tmp214, x
+ 505 0226 024A     		ldr	r2, .L28	@ tmp215,
+ 506 0228 9342     		cmp	r3, r2	@ tmp214, tmp215
+ 507 022a 88DD     		ble	.L26	@,
+ 508              	.LBE3:
+ 509              	.LBE2:
+ARM GAS  /tmp/ccISJtFt.s 			page 12
+
+
+ 115:code/main.c   **** 
+ 116:code/main.c   ****     } 
+ 117:code/main.c   ****   }
+ 118:code/main.c   ****  }
+ 510              		.loc 1 118 0 is_stmt 1
+ 511 022c 78E7     		b	.L27	@
+ 512              	.L29:
+ 513 022e C046     		.align	2
+ 514              	.L28:
+ 515 0230 7F020000 		.word	639
+ 516              		.cfi_endproc
+ 517              	.LFE6:
+ 518              		.size	main, .-main
+ 519              	.Letext0:
+ 520              		.file 2 "/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/_default_types.h"
+ 521              		.file 3 "/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_stdint.h"
+ 522              		.section	.debug_info,"",%progbits
+ 523              	.Ldebug_info0:
+ 524 0000 5B030000 		.4byte	0x35b
+ 525 0004 0200     		.2byte	0x2
+ 526 0006 00000000 		.4byte	.Ldebug_abbrev0
+ 527 000a 04       		.byte	0x4
+ 528 000b 01       		.uleb128 0x1
+ 529 000c B6000000 		.4byte	.LASF34
+ 530 0010 0C       		.byte	0xc
+ 531 0011 EE010000 		.4byte	.LASF35
+ 532 0015 4A000000 		.4byte	.LASF36
+ 533 0019 00000000 		.4byte	.Ltext0
+ 534 001d 34020000 		.4byte	.Letext0
+ 535 0021 00000000 		.4byte	.Ldebug_line0
+ 536 0025 02       		.uleb128 0x2
+ 537 0026 01       		.byte	0x1
+ 538 0027 06       		.byte	0x6
+ 539 0028 38020000 		.4byte	.LASF0
+ 540 002c 02       		.uleb128 0x2
+ 541 002d 01       		.byte	0x1
+ 542 002e 08       		.byte	0x8
+ 543 002f 3A010000 		.4byte	.LASF1
+ 544 0033 02       		.uleb128 0x2
+ 545 0034 02       		.byte	0x2
+ 546 0035 05       		.byte	0x5
+ 547 0036 02020000 		.4byte	.LASF2
+ 548 003a 02       		.uleb128 0x2
+ 549 003b 02       		.byte	0x2
+ 550 003c 07       		.byte	0x7
+ 551 003d 37000000 		.4byte	.LASF3
+ 552 0041 02       		.uleb128 0x2
+ 553 0042 04       		.byte	0x4
+ 554 0043 05       		.byte	0x5
+ 555 0044 15020000 		.4byte	.LASF4
+ 556 0048 03       		.uleb128 0x3
+ 557 0049 91010000 		.4byte	.LASF9
+ 558 004d 02       		.byte	0x2
+ 559 004e 41       		.byte	0x41
+ 560 004f 53000000 		.4byte	0x53
+ 561 0053 02       		.uleb128 0x2
+ 562 0054 04       		.byte	0x4
+ARM GAS  /tmp/ccISJtFt.s 			page 13
+
+
+ 563 0055 07       		.byte	0x7
+ 564 0056 57010000 		.4byte	.LASF5
+ 565 005a 02       		.uleb128 0x2
+ 566 005b 08       		.byte	0x8
+ 567 005c 05       		.byte	0x5
+ 568 005d 00000000 		.4byte	.LASF6
+ 569 0061 02       		.uleb128 0x2
+ 570 0062 08       		.byte	0x8
+ 571 0063 07       		.byte	0x7
+ 572 0064 B5010000 		.4byte	.LASF7
+ 573 0068 04       		.uleb128 0x4
+ 574 0069 04       		.byte	0x4
+ 575 006a 05       		.byte	0x5
+ 576 006b 696E7400 		.ascii	"int\000"
+ 577 006f 02       		.uleb128 0x2
+ 578 0070 04       		.byte	0x4
+ 579 0071 07       		.byte	0x7
+ 580 0072 A8010000 		.4byte	.LASF8
+ 581 0076 03       		.uleb128 0x3
+ 582 0077 0C020000 		.4byte	.LASF10
+ 583 007b 03       		.byte	0x3
+ 584 007c 30       		.byte	0x30
+ 585 007d 48000000 		.4byte	0x48
+ 586 0081 02       		.uleb128 0x2
+ 587 0082 08       		.byte	0x8
+ 588 0083 04       		.byte	0x4
+ 589 0084 2C020000 		.4byte	.LASF11
+ 590 0088 02       		.uleb128 0x2
+ 591 0089 04       		.byte	0x4
+ 592 008a 07       		.byte	0x7
+ 593 008b DD010000 		.4byte	.LASF12
+ 594 008f 02       		.uleb128 0x2
+ 595 0090 01       		.byte	0x1
+ 596 0091 08       		.byte	0x8
+ 597 0092 1E020000 		.4byte	.LASF13
+ 598 0096 02       		.uleb128 0x2
+ 599 0097 08       		.byte	0x8
+ 600 0098 04       		.byte	0x4
+ 601 0099 8A010000 		.4byte	.LASF14
+ 602 009d 02       		.uleb128 0x2
+ 603 009e 04       		.byte	0x4
+ 604 009f 04       		.byte	0x4
+ 605 00a0 A4000000 		.4byte	.LASF15
+ 606 00a4 05       		.uleb128 0x5
+ 607 00a5 01       		.byte	0x1
+ 608 00a6 72000000 		.4byte	.LASF37
+ 609 00aa 01       		.byte	0x1
+ 610 00ab 17       		.byte	0x17
+ 611 00ac 01       		.byte	0x1
+ 612 00ad 00000000 		.4byte	.LFB1
+ 613 00b1 34000000 		.4byte	.LFE1
+ 614 00b5 00000000 		.4byte	.LLST0
+ 615 00b9 01       		.byte	0x1
+ 616 00ba F7000000 		.4byte	0xf7
+ 617 00be 06       		.uleb128 0x6
+ 618 00bf 705F7800 		.ascii	"p_x\000"
+ 619 00c3 01       		.byte	0x1
+ARM GAS  /tmp/ccISJtFt.s 			page 14
+
+
+ 620 00c4 17       		.byte	0x17
+ 621 00c5 68000000 		.4byte	0x68
+ 622 00c9 02       		.byte	0x2
+ 623 00ca 91       		.byte	0x91
+ 624 00cb 74       		.sleb128 -12
+ 625 00cc 06       		.uleb128 0x6
+ 626 00cd 705F7900 		.ascii	"p_y\000"
+ 627 00d1 01       		.byte	0x1
+ 628 00d2 17       		.byte	0x17
+ 629 00d3 68000000 		.4byte	0x68
+ 630 00d7 02       		.byte	0x2
+ 631 00d8 91       		.byte	0x91
+ 632 00d9 70       		.sleb128 -16
+ 633 00da 07       		.uleb128 0x7
+ 634 00db 9C010000 		.4byte	.LASF16
+ 635 00df 01       		.byte	0x1
+ 636 00e0 17       		.byte	0x17
+ 637 00e1 68000000 		.4byte	0x68
+ 638 00e5 02       		.byte	0x2
+ 639 00e6 91       		.byte	0x91
+ 640 00e7 6C       		.sleb128 -20
+ 641 00e8 08       		.uleb128 0x8
+ 642 00e9 CC010000 		.4byte	.LASF17
+ 643 00ed 01       		.byte	0x1
+ 644 00ee 18       		.byte	0x18
+ 645 00ef 68000000 		.4byte	0x68
+ 646 00f3 02       		.byte	0x2
+ 647 00f4 91       		.byte	0x91
+ 648 00f5 7C       		.sleb128 -4
+ 649 00f6 00       		.byte	0
+ 650 00f7 09       		.uleb128 0x9
+ 651 00f8 01       		.byte	0x1
+ 652 00f9 6E010000 		.4byte	.LASF22
+ 653 00fd 01       		.byte	0x1
+ 654 00fe 1D       		.byte	0x1d
+ 655 00ff 01       		.byte	0x1
+ 656 0100 A6010000 		.4byte	0x1a6
+ 657 0104 34000000 		.4byte	.LFB2
+ 658 0108 B6000000 		.4byte	.LFE2
+ 659 010c 20000000 		.4byte	.LLST1
+ 660 0110 01       		.byte	0x1
+ 661 0111 A6010000 		.4byte	0x1a6
+ 662 0115 06       		.uleb128 0x6
+ 663 0116 783100   		.ascii	"x1\000"
+ 664 0119 01       		.byte	0x1
+ 665 011a 1D       		.byte	0x1d
+ 666 011b 68000000 		.4byte	0x68
+ 667 011f 02       		.byte	0x2
+ 668 0120 91       		.byte	0x91
+ 669 0121 6C       		.sleb128 -20
+ 670 0122 06       		.uleb128 0x6
+ 671 0123 793100   		.ascii	"y1\000"
+ 672 0126 01       		.byte	0x1
+ 673 0127 1D       		.byte	0x1d
+ 674 0128 68000000 		.4byte	0x68
+ 675 012c 02       		.byte	0x2
+ 676 012d 91       		.byte	0x91
+ARM GAS  /tmp/ccISJtFt.s 			page 15
+
+
+ 677 012e 68       		.sleb128 -24
+ 678 012f 06       		.uleb128 0x6
+ 679 0130 783200   		.ascii	"x2\000"
+ 680 0133 01       		.byte	0x1
+ 681 0134 1D       		.byte	0x1d
+ 682 0135 68000000 		.4byte	0x68
+ 683 0139 02       		.byte	0x2
+ 684 013a 91       		.byte	0x91
+ 685 013b 64       		.sleb128 -28
+ 686 013c 06       		.uleb128 0x6
+ 687 013d 793200   		.ascii	"y2\000"
+ 688 0140 01       		.byte	0x1
+ 689 0141 1D       		.byte	0x1d
+ 690 0142 68000000 		.4byte	0x68
+ 691 0146 02       		.byte	0x2
+ 692 0147 91       		.byte	0x91
+ 693 0148 60       		.sleb128 -32
+ 694 0149 06       		.uleb128 0x6
+ 695 014a 783300   		.ascii	"x3\000"
+ 696 014d 01       		.byte	0x1
+ 697 014e 1D       		.byte	0x1d
+ 698 014f 68000000 		.4byte	0x68
+ 699 0153 02       		.byte	0x2
+ 700 0154 91       		.byte	0x91
+ 701 0155 00       		.sleb128 0
+ 702 0156 06       		.uleb128 0x6
+ 703 0157 793300   		.ascii	"y3\000"
+ 704 015a 01       		.byte	0x1
+ 705 015b 1D       		.byte	0x1d
+ 706 015c 68000000 		.4byte	0x68
+ 707 0160 02       		.byte	0x2
+ 708 0161 91       		.byte	0x91
+ 709 0162 04       		.sleb128 4
+ 710 0163 06       		.uleb128 0x6
+ 711 0164 7800     		.ascii	"x\000"
+ 712 0166 01       		.byte	0x1
+ 713 0167 1D       		.byte	0x1d
+ 714 0168 68000000 		.4byte	0x68
+ 715 016c 02       		.byte	0x2
+ 716 016d 91       		.byte	0x91
+ 717 016e 08       		.sleb128 8
+ 718 016f 06       		.uleb128 0x6
+ 719 0170 7900     		.ascii	"y\000"
+ 720 0172 01       		.byte	0x1
+ 721 0173 1D       		.byte	0x1d
+ 722 0174 68000000 		.4byte	0x68
+ 723 0178 02       		.byte	0x2
+ 724 0179 91       		.byte	0x91
+ 725 017a 0C       		.sleb128 12
+ 726 017b 08       		.uleb128 0x8
+ 727 017c FA010000 		.4byte	.LASF18
+ 728 0180 01       		.byte	0x1
+ 729 0181 1F       		.byte	0x1f
+ 730 0182 68000000 		.4byte	0x68
+ 731 0186 02       		.byte	0x2
+ 732 0187 91       		.byte	0x91
+ 733 0188 7C       		.sleb128 -4
+ARM GAS  /tmp/ccISJtFt.s 			page 16
 
 
- 271 00b6 0133     		adds	r3, r3, #1	@ tmp115,
- 272 00b8 0093     		str	r3, [sp]	@ tmp115, y
- 273              	.L19:
-  70:code/main.c   ****     for (int y = 0 ; y <99 ; y++) {
- 274              		.loc 1 70 0 is_stmt 0 discriminator 1
- 275 00ba 009B     		ldr	r3, [sp]	@ tmp117, y
- 276 00bc 622B     		cmp	r3, #98	@ tmp117,
- 277 00be F3DD     		ble	.L20	@,
- 278              	.LBE3:
-  69:code/main.c   ****     for (int y = 0 ; y <99 ; y++) {
- 279              		.loc 1 69 0 is_stmt 1 discriminator 2
- 280 00c0 019B     		ldr	r3, [sp, #4]	@ tmp119, x
- 281 00c2 0133     		adds	r3, r3, #1	@ tmp118,
- 282 00c4 0193     		str	r3, [sp, #4]	@ tmp118, x
- 283              	.L18:
-  69:code/main.c   ****     for (int y = 0 ; y <99 ; y++) {
- 284              		.loc 1 69 0 is_stmt 0 discriminator 1
- 285 00c6 019B     		ldr	r3, [sp, #4]	@ tmp120, x
- 286 00c8 622B     		cmp	r3, #98	@ tmp120,
- 287 00ca EADD     		ble	.L21	@,
- 288              	.LBE2:
-  72:code/main.c   ****        }
- 289              		.loc 1 72 0 is_stmt 1
- 290 00cc E6E7     		b	.L22	@
- 291              		.cfi_endproc
- 292              	.LFE4:
- 293              		.size	main, .-main
- 294              	.Letext0:
- 295              		.file 2 "/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/machine/_default_types.h"
- 296              		.file 3 "/srv/gcc-arm-none-eabi-5_4-2016q3/arm-none-eabi/include/sys/_stdint.h"
- 297 00ce C046     		.section	.debug_info,"",%progbits
- 298              	.Ldebug_info0:
- 299 0000 D9010000 		.4byte	0x1d9
- 300 0004 0200     		.2byte	0x2
- 301 0006 00000000 		.4byte	.Ldebug_abbrev0
- 302 000a 04       		.byte	0x4
- 303 000b 01       		.uleb128 0x1
- 304 000c 88000000 		.4byte	.LASF22
- 305 0010 0C       		.byte	0xc
- 306 0011 97010000 		.4byte	.LASF23
- 307 0015 1A000000 		.4byte	.LASF24
- 308 0019 00000000 		.4byte	.Ltext0
- 309 001d CE000000 		.4byte	.Letext0
- 310 0021 00000000 		.4byte	.Ldebug_line0
- 311 0025 02       		.uleb128 0x2
- 312 0026 01       		.byte	0x1
- 313 0027 06       		.byte	0x6
- 314 0028 C8010000 		.4byte	.LASF0
- 315 002c 02       		.uleb128 0x2
- 316 002d 01       		.byte	0x1
- 317 002e 08       		.byte	0x8
- 318 002f 0C010000 		.4byte	.LASF1
- 319 0033 02       		.uleb128 0x2
- 320 0034 02       		.byte	0x2
- 321 0035 05       		.byte	0x5
- 322 0036 A3010000 		.4byte	.LASF2
- 323 003a 02       		.uleb128 0x2
-ARM GAS  /tmp/ccG4Ri7g.s 			page 8
+ 734 0189 08       		.uleb128 0x8
+ 735 018a 23000000 		.4byte	.LASF19
+ 736 018e 01       		.byte	0x1
+ 737 018f 20       		.byte	0x20
+ 738 0190 68000000 		.4byte	0x68
+ 739 0194 02       		.byte	0x2
+ 740 0195 91       		.byte	0x91
+ 741 0196 78       		.sleb128 -8
+ 742 0197 08       		.uleb128 0x8
+ 743 0198 A3010000 		.4byte	.LASF20
+ 744 019c 01       		.byte	0x1
+ 745 019d 21       		.byte	0x21
+ 746 019e 68000000 		.4byte	0x68
+ 747 01a2 02       		.byte	0x2
+ 748 01a3 91       		.byte	0x91
+ 749 01a4 74       		.sleb128 -12
+ 750 01a5 00       		.byte	0
+ 751 01a6 02       		.uleb128 0x2
+ 752 01a7 01       		.byte	0x1
+ 753 01a8 02       		.byte	0x2
+ 754 01a9 44020000 		.4byte	.LASF21
+ 755 01ad 09       		.uleb128 0x9
+ 756 01ae 01       		.byte	0x1
+ 757 01af 15000000 		.4byte	.LASF23
+ 758 01b3 01       		.byte	0x1
+ 759 01b4 2A       		.byte	0x2a
+ 760 01b5 01       		.byte	0x1
+ 761 01b6 76000000 		.4byte	0x76
+ 762 01ba B8000000 		.4byte	.LFB3
+ 763 01be D4000000 		.4byte	.LFE3
+ 764 01c2 40000000 		.4byte	.LLST2
+ 765 01c6 01       		.byte	0x1
+ 766 01c7 DA010000 		.4byte	0x1da
+ 767 01cb 07       		.uleb128 0x7
+ 768 01cc 69010000 		.4byte	.LASF24
+ 769 01d0 01       		.byte	0x1
+ 770 01d1 2A       		.byte	0x2a
+ 771 01d2 68000000 		.4byte	0x68
+ 772 01d6 02       		.byte	0x2
+ 773 01d7 91       		.byte	0x91
+ 774 01d8 7C       		.sleb128 -4
+ 775 01d9 00       		.byte	0
+ 776 01da 09       		.uleb128 0x9
+ 777 01db 01       		.byte	0x1
+ 778 01dc 95000000 		.4byte	.LASF25
+ 779 01e0 01       		.byte	0x1
+ 780 01e1 30       		.byte	0x30
+ 781 01e2 01       		.byte	0x1
+ 782 01e3 A6010000 		.4byte	0x1a6
+ 783 01e7 D4000000 		.4byte	.LFB4
+ 784 01eb 04010000 		.4byte	.LFE4
+ 785 01ef 60000000 		.4byte	.LLST3
+ 786 01f3 01       		.byte	0x1
+ 787 01f4 23020000 		.4byte	0x223
+ 788 01f8 07       		.uleb128 0x7
+ 789 01f9 69010000 		.4byte	.LASF24
+ 790 01fd 01       		.byte	0x1
+ARM GAS  /tmp/ccISJtFt.s 			page 17
 
 
- 324 003b 02       		.byte	0x2
- 325 003c 07       		.byte	0x7
- 326 003d 3B010000 		.4byte	.LASF3
- 327 0041 02       		.uleb128 0x2
- 328 0042 04       		.byte	0x4
- 329 0043 05       		.byte	0x5
- 330 0044 B6010000 		.4byte	.LASF4
- 331 0048 03       		.uleb128 0x3
- 332 0049 4E010000 		.4byte	.LASF9
- 333 004d 02       		.byte	0x2
- 334 004e 41       		.byte	0x41
- 335 004f 53000000 		.4byte	0x53
- 336 0053 02       		.uleb128 0x2
- 337 0054 04       		.byte	0x4
- 338 0055 07       		.byte	0x7
- 339 0056 29010000 		.4byte	.LASF5
- 340 005a 02       		.uleb128 0x2
- 341 005b 08       		.byte	0x8
- 342 005c 05       		.byte	0x5
- 343 005d 89010000 		.4byte	.LASF6
- 344 0061 02       		.uleb128 0x2
- 345 0062 08       		.byte	0x8
- 346 0063 07       		.byte	0x7
- 347 0064 6D010000 		.4byte	.LASF7
- 348 0068 04       		.uleb128 0x4
- 349 0069 04       		.byte	0x4
- 350 006a 05       		.byte	0x5
- 351 006b 696E7400 		.ascii	"int\000"
- 352 006f 02       		.uleb128 0x2
- 353 0070 04       		.byte	0x4
- 354 0071 07       		.byte	0x7
- 355 0072 60010000 		.4byte	.LASF8
- 356 0076 03       		.uleb128 0x3
- 357 0077 AD010000 		.4byte	.LASF10
- 358 007b 03       		.byte	0x3
- 359 007c 30       		.byte	0x30
- 360 007d 48000000 		.4byte	0x48
- 361 0081 05       		.uleb128 0x5
- 362 0082 01       		.byte	0x1
- 363 0083 42000000 		.4byte	.LASF25
- 364 0087 01       		.byte	0x1
- 365 0088 14       		.byte	0x14
- 366 0089 01       		.byte	0x1
- 367 008a 00000000 		.4byte	.LFB0
- 368 008e 34000000 		.4byte	.LFE0
- 369 0092 00000000 		.4byte	.LLST0
- 370 0096 01       		.byte	0x1
- 371 0097 D0000000 		.4byte	0xd0
- 372 009b 06       		.uleb128 0x6
- 373 009c 7800     		.ascii	"x\000"
- 374 009e 01       		.byte	0x1
- 375 009f 14       		.byte	0x14
- 376 00a0 68000000 		.4byte	0x68
- 377 00a4 02       		.byte	0x2
- 378 00a5 91       		.byte	0x91
- 379 00a6 74       		.sleb128 -12
- 380 00a7 06       		.uleb128 0x6
-ARM GAS  /tmp/ccG4Ri7g.s 			page 9
+ 791 01fe 30       		.byte	0x30
+ 792 01ff 68000000 		.4byte	0x68
+ 793 0203 02       		.byte	0x2
+ 794 0204 91       		.byte	0x91
+ 795 0205 74       		.sleb128 -12
+ 796 0206 08       		.uleb128 0x8
+ 797 0207 0E000000 		.4byte	.LASF26
+ 798 020b 01       		.byte	0x1
+ 799 020c 32       		.byte	0x32
+ 800 020d 68000000 		.4byte	0x68
+ 801 0211 02       		.byte	0x2
+ 802 0212 91       		.byte	0x91
+ 803 0213 7C       		.sleb128 -4
+ 804 0214 08       		.uleb128 0x8
+ 805 0215 48010000 		.4byte	.LASF27
+ 806 0219 01       		.byte	0x1
+ 807 021a 32       		.byte	0x32
+ 808 021b 68000000 		.4byte	0x68
+ 809 021f 02       		.byte	0x2
+ 810 0220 91       		.byte	0x91
+ 811 0221 78       		.sleb128 -8
+ 812 0222 00       		.byte	0
+ 813 0223 0A       		.uleb128 0xa
+ 814 0224 01       		.byte	0x1
+ 815 0225 7C000000 		.4byte	.LASF38
+ 816 0229 01       		.byte	0x1
+ 817 022a 3D       		.byte	0x3d
+ 818 022b 01       		.byte	0x1
+ 819 022c 04010000 		.4byte	.LFB5
+ 820 0230 1C010000 		.4byte	.LFE5
+ 821 0234 02       		.byte	0x2
+ 822 0235 7D       		.byte	0x7d
+ 823 0236 00       		.sleb128 0
+ 824 0237 01       		.byte	0x1
+ 825 0238 0B       		.uleb128 0xb
+ 826 0239 01       		.byte	0x1
+ 827 023a D8010000 		.4byte	.LASF28
+ 828 023e 01       		.byte	0x1
+ 829 023f 4E       		.byte	0x4e
+ 830 0240 01       		.byte	0x1
+ 831 0241 68000000 		.4byte	0x68
+ 832 0245 1C010000 		.4byte	.LFB6
+ 833 0249 34020000 		.4byte	.LFE6
+ 834 024d 80000000 		.4byte	.LLST4
+ 835 0251 01       		.byte	0x1
+ 836 0252 2F030000 		.4byte	0x32f
+ 837 0256 0C       		.uleb128 0xc
+ 838 0257 20010000 		.4byte	.LBB2
+ 839 025b 2C020000 		.4byte	.LBE2
+ 840 025f 0D       		.uleb128 0xd
+ 841 0260 783100   		.ascii	"x1\000"
+ 842 0263 01       		.byte	0x1
+ 843 0264 53       		.byte	0x53
+ 844 0265 68000000 		.4byte	0x68
+ 845 0269 02       		.byte	0x2
+ 846 026a 91       		.byte	0x91
+ 847 026b 6C       		.sleb128 -20
+ARM GAS  /tmp/ccISJtFt.s 			page 18
 
 
- 381 00a8 7900     		.ascii	"y\000"
- 382 00aa 01       		.byte	0x1
- 383 00ab 14       		.byte	0x14
- 384 00ac 68000000 		.4byte	0x68
- 385 00b0 02       		.byte	0x2
- 386 00b1 91       		.byte	0x91
- 387 00b2 70       		.sleb128 -16
- 388 00b3 07       		.uleb128 0x7
- 389 00b4 59010000 		.4byte	.LASF11
- 390 00b8 01       		.byte	0x1
- 391 00b9 14       		.byte	0x14
- 392 00ba 68000000 		.4byte	0x68
- 393 00be 02       		.byte	0x2
- 394 00bf 91       		.byte	0x91
- 395 00c0 6C       		.sleb128 -20
- 396 00c1 08       		.uleb128 0x8
- 397 00c2 00000000 		.4byte	.LASF15
- 398 00c6 01       		.byte	0x1
- 399 00c7 15       		.byte	0x15
- 400 00c8 68000000 		.4byte	0x68
- 401 00cc 02       		.byte	0x2
- 402 00cd 91       		.byte	0x91
- 403 00ce 7C       		.sleb128 -4
- 404 00cf 00       		.byte	0
- 405 00d0 09       		.uleb128 0x9
- 406 00d1 01       		.byte	0x1
- 407 00d2 0C000000 		.4byte	.LASF13
- 408 00d6 01       		.byte	0x1
- 409 00d7 1B       		.byte	0x1b
- 410 00d8 01       		.byte	0x1
- 411 00d9 76000000 		.4byte	0x76
- 412 00dd 34000000 		.4byte	.LFB1
- 413 00e1 50000000 		.4byte	.LFE1
- 414 00e5 20000000 		.4byte	.LLST1
- 415 00e9 01       		.byte	0x1
- 416 00ea FD000000 		.4byte	0xfd
- 417 00ee 07       		.uleb128 0x7
- 418 00ef 7B000000 		.4byte	.LASF12
- 419 00f3 01       		.byte	0x1
- 420 00f4 1B       		.byte	0x1b
- 421 00f5 68000000 		.4byte	0x68
- 422 00f9 02       		.byte	0x2
- 423 00fa 91       		.byte	0x91
- 424 00fb 7C       		.sleb128 -4
- 425 00fc 00       		.byte	0
- 426 00fd 09       		.uleb128 0x9
- 427 00fe 01       		.byte	0x1
- 428 00ff 53000000 		.4byte	.LASF14
- 429 0103 01       		.byte	0x1
- 430 0104 21       		.byte	0x21
- 431 0105 01       		.byte	0x1
- 432 0106 46010000 		.4byte	0x146
- 433 010a 50000000 		.4byte	.LFB2
- 434 010e 80000000 		.4byte	.LFE2
- 435 0112 40000000 		.4byte	.LLST2
- 436 0116 01       		.byte	0x1
- 437 0117 46010000 		.4byte	0x146
-ARM GAS  /tmp/ccG4Ri7g.s 			page 10
+ 848 026c 0D       		.uleb128 0xd
+ 849 026d 793100   		.ascii	"y1\000"
+ 850 0270 01       		.byte	0x1
+ 851 0271 54       		.byte	0x54
+ 852 0272 68000000 		.4byte	0x68
+ 853 0276 02       		.byte	0x2
+ 854 0277 91       		.byte	0x91
+ 855 0278 68       		.sleb128 -24
+ 856 0279 0D       		.uleb128 0xd
+ 857 027a 783200   		.ascii	"x2\000"
+ 858 027d 01       		.byte	0x1
+ 859 027e 57       		.byte	0x57
+ 860 027f 68000000 		.4byte	0x68
+ 861 0283 02       		.byte	0x2
+ 862 0284 91       		.byte	0x91
+ 863 0285 64       		.sleb128 -28
+ 864 0286 0D       		.uleb128 0xd
+ 865 0287 793200   		.ascii	"y2\000"
+ 866 028a 01       		.byte	0x1
+ 867 028b 58       		.byte	0x58
+ 868 028c 68000000 		.4byte	0x68
+ 869 0290 02       		.byte	0x2
+ 870 0291 91       		.byte	0x91
+ 871 0292 60       		.sleb128 -32
+ 872 0293 0D       		.uleb128 0xd
+ 873 0294 783300   		.ascii	"x3\000"
+ 874 0297 01       		.byte	0x1
+ 875 0298 5A       		.byte	0x5a
+ 876 0299 68000000 		.4byte	0x68
+ 877 029d 02       		.byte	0x2
+ 878 029e 91       		.byte	0x91
+ 879 029f 5C       		.sleb128 -36
+ 880 02a0 0D       		.uleb128 0xd
+ 881 02a1 793300   		.ascii	"y3\000"
+ 882 02a4 01       		.byte	0x1
+ 883 02a5 5B       		.byte	0x5b
+ 884 02a6 68000000 		.4byte	0x68
+ 885 02aa 02       		.byte	0x2
+ 886 02ab 91       		.byte	0x91
+ 887 02ac 58       		.sleb128 -40
+ 888 02ad 08       		.uleb128 0x8
+ 889 02ae FA010000 		.4byte	.LASF18
+ 890 02b2 01       		.byte	0x1
+ 891 02b3 5E       		.byte	0x5e
+ 892 02b4 68000000 		.4byte	0x68
+ 893 02b8 02       		.byte	0x2
+ 894 02b9 91       		.byte	0x91
+ 895 02ba 54       		.sleb128 -44
+ 896 02bb 08       		.uleb128 0x8
+ 897 02bc 23000000 		.4byte	.LASF19
+ 898 02c0 01       		.byte	0x1
+ 899 02c1 5F       		.byte	0x5f
+ 900 02c2 68000000 		.4byte	0x68
+ 901 02c6 02       		.byte	0x2
+ 902 02c7 91       		.byte	0x91
+ 903 02c8 50       		.sleb128 -48
+ 904 02c9 08       		.uleb128 0x8
+ARM GAS  /tmp/ccISJtFt.s 			page 19
 
 
- 438 011b 07       		.uleb128 0x7
- 439 011c 7B000000 		.4byte	.LASF12
- 440 0120 01       		.byte	0x1
- 441 0121 21       		.byte	0x21
- 442 0122 68000000 		.4byte	0x68
- 443 0126 02       		.byte	0x2
- 444 0127 91       		.byte	0x91
- 445 0128 74       		.sleb128 -12
- 446 0129 08       		.uleb128 0x8
- 447 012a 4C000000 		.4byte	.LASF16
- 448 012e 01       		.byte	0x1
- 449 012f 23       		.byte	0x23
- 450 0130 68000000 		.4byte	0x68
- 451 0134 02       		.byte	0x2
- 452 0135 91       		.byte	0x91
- 453 0136 7C       		.sleb128 -4
- 454 0137 08       		.uleb128 0x8
- 455 0138 1A010000 		.4byte	.LASF17
- 456 013c 01       		.byte	0x1
- 457 013d 23       		.byte	0x23
- 458 013e 68000000 		.4byte	0x68
- 459 0142 02       		.byte	0x2
- 460 0143 91       		.byte	0x91
- 461 0144 78       		.sleb128 -8
- 462 0145 00       		.byte	0
- 463 0146 02       		.uleb128 0x2
- 464 0147 01       		.byte	0x1
- 465 0148 02       		.byte	0x2
- 466 0149 D4010000 		.4byte	.LASF18
- 467 014d 0A       		.uleb128 0xa
- 468 014e 01       		.byte	0x1
- 469 014f 62000000 		.4byte	.LASF26
- 470 0153 01       		.byte	0x1
- 471 0154 2E       		.byte	0x2e
- 472 0155 01       		.byte	0x1
- 473 0156 80000000 		.4byte	.LFB3
- 474 015a 98000000 		.4byte	.LFE3
- 475 015e 02       		.byte	0x2
- 476 015f 7D       		.byte	0x7d
- 477 0160 00       		.sleb128 0
- 478 0161 01       		.byte	0x1
- 479 0162 0B       		.uleb128 0xb
- 480 0163 01       		.byte	0x1
- 481 0164 84010000 		.4byte	.LASF19
- 482 0168 01       		.byte	0x1
- 483 0169 40       		.byte	0x40
- 484 016a 01       		.byte	0x1
- 485 016b 68000000 		.4byte	0x68
- 486 016f 98000000 		.4byte	.LFB4
- 487 0173 CE000000 		.4byte	.LFE4
- 488 0177 60000000 		.4byte	.LLST3
- 489 017b 01       		.byte	0x1
- 490 017c AD010000 		.4byte	0x1ad
- 491 0180 0C       		.uleb128 0xc
- 492 0181 9C000000 		.4byte	.LBB2
- 493 0185 CC000000 		.4byte	.LBE2
- 494 0189 0D       		.uleb128 0xd
-ARM GAS  /tmp/ccG4Ri7g.s 			page 11
+ 905 02ca A3010000 		.4byte	.LASF20
+ 906 02ce 01       		.byte	0x1
+ 907 02cf 60       		.byte	0x60
+ 908 02d0 68000000 		.4byte	0x68
+ 909 02d4 02       		.byte	0x2
+ 910 02d5 91       		.byte	0x91
+ 911 02d6 4C       		.sleb128 -52
+ 912 02d7 08       		.uleb128 0x8
+ 913 02d8 7E010000 		.4byte	.LASF29
+ 914 02dc 01       		.byte	0x1
+ 915 02dd 62       		.byte	0x62
+ 916 02de 68000000 		.4byte	0x68
+ 917 02e2 02       		.byte	0x2
+ 918 02e3 91       		.byte	0x91
+ 919 02e4 48       		.sleb128 -56
+ 920 02e5 08       		.uleb128 0x8
+ 921 02e6 AA000000 		.4byte	.LASF30
+ 922 02ea 01       		.byte	0x1
+ 923 02eb 62       		.byte	0x62
+ 924 02ec 68000000 		.4byte	0x68
+ 925 02f0 02       		.byte	0x2
+ 926 02f1 91       		.byte	0x91
+ 927 02f2 44       		.sleb128 -60
+ 928 02f3 08       		.uleb128 0x8
+ 929 02f4 2B000000 		.4byte	.LASF31
+ 930 02f8 01       		.byte	0x1
+ 931 02f9 62       		.byte	0x62
+ 932 02fa 68000000 		.4byte	0x68
+ 933 02fe 02       		.byte	0x2
+ 934 02ff 91       		.byte	0x91
+ 935 0300 40       		.sleb128 -64
+ 936 0301 0C       		.uleb128 0xc
+ 937 0302 38010000 		.4byte	.LBB3
+ 938 0306 2C020000 		.4byte	.LBE3
+ 939 030a 0D       		.uleb128 0xd
+ 940 030b 7800     		.ascii	"x\000"
+ 941 030d 01       		.byte	0x1
+ 942 030e 65       		.byte	0x65
+ 943 030f 68000000 		.4byte	0x68
+ 944 0313 02       		.byte	0x2
+ 945 0314 91       		.byte	0x91
+ 946 0315 74       		.sleb128 -12
+ 947 0316 0C       		.uleb128 0xc
+ 948 0317 3E010000 		.4byte	.LBB4
+ 949 031b 1E020000 		.4byte	.LBE4
+ 950 031f 0D       		.uleb128 0xd
+ 951 0320 7900     		.ascii	"y\000"
+ 952 0322 01       		.byte	0x1
+ 953 0323 66       		.byte	0x66
+ 954 0324 68000000 		.4byte	0x68
+ 955 0328 02       		.byte	0x2
+ 956 0329 91       		.byte	0x91
+ 957 032a 70       		.sleb128 -16
+ 958 032b 00       		.byte	0
+ 959 032c 00       		.byte	0
+ 960 032d 00       		.byte	0
+ 961 032e 00       		.byte	0
+ARM GAS  /tmp/ccISJtFt.s 			page 20
 
 
- 495 018a 7800     		.ascii	"x\000"
- 496 018c 01       		.byte	0x1
- 497 018d 45       		.byte	0x45
- 498 018e 68000000 		.4byte	0x68
- 499 0192 02       		.byte	0x2
- 500 0193 91       		.byte	0x91
- 501 0194 74       		.sleb128 -12
- 502 0195 0C       		.uleb128 0xc
- 503 0196 A2000000 		.4byte	.LBB3
- 504 019a C0000000 		.4byte	.LBE3
- 505 019e 0D       		.uleb128 0xd
- 506 019f 7900     		.ascii	"y\000"
- 507 01a1 01       		.byte	0x1
- 508 01a2 46       		.byte	0x46
- 509 01a3 68000000 		.4byte	0x68
- 510 01a7 02       		.byte	0x2
- 511 01a8 91       		.byte	0x91
- 512 01a9 70       		.sleb128 -16
- 513 01aa 00       		.byte	0
- 514 01ab 00       		.byte	0
- 515 01ac 00       		.byte	0
- 516 01ad 0E       		.uleb128 0xe
- 517 01ae 80000000 		.4byte	.LASF20
- 518 01b2 01       		.byte	0x1
- 519 01b3 0C       		.byte	0xc
- 520 01b4 BF010000 		.4byte	0x1bf
- 521 01b8 01       		.byte	0x1
- 522 01b9 05       		.byte	0x5
- 523 01ba 03       		.byte	0x3
- 524 01bb 00000000 		.4byte	SW_REGS
- 525 01bf 0F       		.uleb128 0xf
- 526 01c0 04       		.byte	0x4
- 527 01c1 C5010000 		.4byte	0x1c5
- 528 01c5 10       		.uleb128 0x10
- 529 01c6 76000000 		.4byte	0x76
- 530 01ca 0E       		.uleb128 0xe
- 531 01cb BF010000 		.4byte	.LASF21
- 532 01cf 01       		.byte	0x1
- 533 01d0 0D       		.byte	0xd
- 534 01d1 BF010000 		.4byte	0x1bf
- 535 01d5 01       		.byte	0x1
- 536 01d6 05       		.byte	0x5
- 537 01d7 03       		.byte	0x3
- 538 01d8 00000000 		.4byte	PIX_REGS
- 539 01dc 00       		.byte	0
- 540              		.section	.debug_abbrev,"",%progbits
- 541              	.Ldebug_abbrev0:
- 542 0000 01       		.uleb128 0x1
- 543 0001 11       		.uleb128 0x11
- 544 0002 01       		.byte	0x1
- 545 0003 25       		.uleb128 0x25
- 546 0004 0E       		.uleb128 0xe
- 547 0005 13       		.uleb128 0x13
- 548 0006 0B       		.uleb128 0xb
- 549 0007 03       		.uleb128 0x3
- 550 0008 0E       		.uleb128 0xe
- 551 0009 1B       		.uleb128 0x1b
-ARM GAS  /tmp/ccG4Ri7g.s 			page 12
+ 962 032f 0E       		.uleb128 0xe
+ 963 0330 E6010000 		.4byte	.LASF32
+ 964 0334 01       		.byte	0x1
+ 965 0335 0E       		.byte	0xe
+ 966 0336 41030000 		.4byte	0x341
+ 967 033a 01       		.byte	0x1
+ 968 033b 05       		.byte	0x5
+ 969 033c 03       		.byte	0x3
+ 970 033d 00000000 		.4byte	SW_REGS
+ 971 0341 0F       		.uleb128 0xf
+ 972 0342 04       		.byte	0x4
+ 973 0343 47030000 		.4byte	0x347
+ 974 0347 10       		.uleb128 0x10
+ 975 0348 76000000 		.4byte	0x76
+ 976 034c 0E       		.uleb128 0xe
+ 977 034d 23020000 		.4byte	.LASF33
+ 978 0351 01       		.byte	0x1
+ 979 0352 0F       		.byte	0xf
+ 980 0353 41030000 		.4byte	0x341
+ 981 0357 01       		.byte	0x1
+ 982 0358 05       		.byte	0x5
+ 983 0359 03       		.byte	0x3
+ 984 035a 00000000 		.4byte	PIX_REGS
+ 985 035e 00       		.byte	0
+ 986              		.section	.debug_abbrev,"",%progbits
+ 987              	.Ldebug_abbrev0:
+ 988 0000 01       		.uleb128 0x1
+ 989 0001 11       		.uleb128 0x11
+ 990 0002 01       		.byte	0x1
+ 991 0003 25       		.uleb128 0x25
+ 992 0004 0E       		.uleb128 0xe
+ 993 0005 13       		.uleb128 0x13
+ 994 0006 0B       		.uleb128 0xb
+ 995 0007 03       		.uleb128 0x3
+ 996 0008 0E       		.uleb128 0xe
+ 997 0009 1B       		.uleb128 0x1b
+ 998 000a 0E       		.uleb128 0xe
+ 999 000b 11       		.uleb128 0x11
+ 1000 000c 01       		.uleb128 0x1
+ 1001 000d 12       		.uleb128 0x12
+ 1002 000e 01       		.uleb128 0x1
+ 1003 000f 10       		.uleb128 0x10
+ 1004 0010 06       		.uleb128 0x6
+ 1005 0011 00       		.byte	0
+ 1006 0012 00       		.byte	0
+ 1007 0013 02       		.uleb128 0x2
+ 1008 0014 24       		.uleb128 0x24
+ 1009 0015 00       		.byte	0
+ 1010 0016 0B       		.uleb128 0xb
+ 1011 0017 0B       		.uleb128 0xb
+ 1012 0018 3E       		.uleb128 0x3e
+ 1013 0019 0B       		.uleb128 0xb
+ 1014 001a 03       		.uleb128 0x3
+ 1015 001b 0E       		.uleb128 0xe
+ 1016 001c 00       		.byte	0
+ 1017 001d 00       		.byte	0
+ 1018 001e 03       		.uleb128 0x3
+ARM GAS  /tmp/ccISJtFt.s 			page 21
 
 
- 552 000a 0E       		.uleb128 0xe
- 553 000b 11       		.uleb128 0x11
- 554 000c 01       		.uleb128 0x1
- 555 000d 12       		.uleb128 0x12
- 556 000e 01       		.uleb128 0x1
- 557 000f 10       		.uleb128 0x10
- 558 0010 06       		.uleb128 0x6
- 559 0011 00       		.byte	0
- 560 0012 00       		.byte	0
- 561 0013 02       		.uleb128 0x2
- 562 0014 24       		.uleb128 0x24
- 563 0015 00       		.byte	0
- 564 0016 0B       		.uleb128 0xb
- 565 0017 0B       		.uleb128 0xb
- 566 0018 3E       		.uleb128 0x3e
- 567 0019 0B       		.uleb128 0xb
- 568 001a 03       		.uleb128 0x3
- 569 001b 0E       		.uleb128 0xe
- 570 001c 00       		.byte	0
- 571 001d 00       		.byte	0
- 572 001e 03       		.uleb128 0x3
- 573 001f 16       		.uleb128 0x16
- 574 0020 00       		.byte	0
- 575 0021 03       		.uleb128 0x3
- 576 0022 0E       		.uleb128 0xe
- 577 0023 3A       		.uleb128 0x3a
- 578 0024 0B       		.uleb128 0xb
- 579 0025 3B       		.uleb128 0x3b
- 580 0026 0B       		.uleb128 0xb
- 581 0027 49       		.uleb128 0x49
- 582 0028 13       		.uleb128 0x13
- 583 0029 00       		.byte	0
- 584 002a 00       		.byte	0
- 585 002b 04       		.uleb128 0x4
- 586 002c 24       		.uleb128 0x24
- 587 002d 00       		.byte	0
- 588 002e 0B       		.uleb128 0xb
- 589 002f 0B       		.uleb128 0xb
- 590 0030 3E       		.uleb128 0x3e
- 591 0031 0B       		.uleb128 0xb
- 592 0032 03       		.uleb128 0x3
- 593 0033 08       		.uleb128 0x8
- 594 0034 00       		.byte	0
- 595 0035 00       		.byte	0
- 596 0036 05       		.uleb128 0x5
- 597 0037 2E       		.uleb128 0x2e
- 598 0038 01       		.byte	0x1
- 599 0039 3F       		.uleb128 0x3f
- 600 003a 0C       		.uleb128 0xc
- 601 003b 03       		.uleb128 0x3
- 602 003c 0E       		.uleb128 0xe
- 603 003d 3A       		.uleb128 0x3a
- 604 003e 0B       		.uleb128 0xb
- 605 003f 3B       		.uleb128 0x3b
- 606 0040 0B       		.uleb128 0xb
- 607 0041 27       		.uleb128 0x27
- 608 0042 0C       		.uleb128 0xc
-ARM GAS  /tmp/ccG4Ri7g.s 			page 13
+ 1019 001f 16       		.uleb128 0x16
+ 1020 0020 00       		.byte	0
+ 1021 0021 03       		.uleb128 0x3
+ 1022 0022 0E       		.uleb128 0xe
+ 1023 0023 3A       		.uleb128 0x3a
+ 1024 0024 0B       		.uleb128 0xb
+ 1025 0025 3B       		.uleb128 0x3b
+ 1026 0026 0B       		.uleb128 0xb
+ 1027 0027 49       		.uleb128 0x49
+ 1028 0028 13       		.uleb128 0x13
+ 1029 0029 00       		.byte	0
+ 1030 002a 00       		.byte	0
+ 1031 002b 04       		.uleb128 0x4
+ 1032 002c 24       		.uleb128 0x24
+ 1033 002d 00       		.byte	0
+ 1034 002e 0B       		.uleb128 0xb
+ 1035 002f 0B       		.uleb128 0xb
+ 1036 0030 3E       		.uleb128 0x3e
+ 1037 0031 0B       		.uleb128 0xb
+ 1038 0032 03       		.uleb128 0x3
+ 1039 0033 08       		.uleb128 0x8
+ 1040 0034 00       		.byte	0
+ 1041 0035 00       		.byte	0
+ 1042 0036 05       		.uleb128 0x5
+ 1043 0037 2E       		.uleb128 0x2e
+ 1044 0038 01       		.byte	0x1
+ 1045 0039 3F       		.uleb128 0x3f
+ 1046 003a 0C       		.uleb128 0xc
+ 1047 003b 03       		.uleb128 0x3
+ 1048 003c 0E       		.uleb128 0xe
+ 1049 003d 3A       		.uleb128 0x3a
+ 1050 003e 0B       		.uleb128 0xb
+ 1051 003f 3B       		.uleb128 0x3b
+ 1052 0040 0B       		.uleb128 0xb
+ 1053 0041 27       		.uleb128 0x27
+ 1054 0042 0C       		.uleb128 0xc
+ 1055 0043 11       		.uleb128 0x11
+ 1056 0044 01       		.uleb128 0x1
+ 1057 0045 12       		.uleb128 0x12
+ 1058 0046 01       		.uleb128 0x1
+ 1059 0047 40       		.uleb128 0x40
+ 1060 0048 06       		.uleb128 0x6
+ 1061 0049 9742     		.uleb128 0x2117
+ 1062 004b 0C       		.uleb128 0xc
+ 1063 004c 01       		.uleb128 0x1
+ 1064 004d 13       		.uleb128 0x13
+ 1065 004e 00       		.byte	0
+ 1066 004f 00       		.byte	0
+ 1067 0050 06       		.uleb128 0x6
+ 1068 0051 05       		.uleb128 0x5
+ 1069 0052 00       		.byte	0
+ 1070 0053 03       		.uleb128 0x3
+ 1071 0054 08       		.uleb128 0x8
+ 1072 0055 3A       		.uleb128 0x3a
+ 1073 0056 0B       		.uleb128 0xb
+ 1074 0057 3B       		.uleb128 0x3b
+ 1075 0058 0B       		.uleb128 0xb
+ARM GAS  /tmp/ccISJtFt.s 			page 22
 
 
- 609 0043 11       		.uleb128 0x11
- 610 0044 01       		.uleb128 0x1
- 611 0045 12       		.uleb128 0x12
- 612 0046 01       		.uleb128 0x1
- 613 0047 40       		.uleb128 0x40
- 614 0048 06       		.uleb128 0x6
- 615 0049 9742     		.uleb128 0x2117
- 616 004b 0C       		.uleb128 0xc
- 617 004c 01       		.uleb128 0x1
- 618 004d 13       		.uleb128 0x13
- 619 004e 00       		.byte	0
- 620 004f 00       		.byte	0
- 621 0050 06       		.uleb128 0x6
- 622 0051 05       		.uleb128 0x5
- 623 0052 00       		.byte	0
- 624 0053 03       		.uleb128 0x3
- 625 0054 08       		.uleb128 0x8
- 626 0055 3A       		.uleb128 0x3a
- 627 0056 0B       		.uleb128 0xb
- 628 0057 3B       		.uleb128 0x3b
- 629 0058 0B       		.uleb128 0xb
- 630 0059 49       		.uleb128 0x49
- 631 005a 13       		.uleb128 0x13
- 632 005b 02       		.uleb128 0x2
- 633 005c 0A       		.uleb128 0xa
- 634 005d 00       		.byte	0
- 635 005e 00       		.byte	0
- 636 005f 07       		.uleb128 0x7
- 637 0060 05       		.uleb128 0x5
- 638 0061 00       		.byte	0
- 639 0062 03       		.uleb128 0x3
- 640 0063 0E       		.uleb128 0xe
- 641 0064 3A       		.uleb128 0x3a
- 642 0065 0B       		.uleb128 0xb
- 643 0066 3B       		.uleb128 0x3b
- 644 0067 0B       		.uleb128 0xb
- 645 0068 49       		.uleb128 0x49
- 646 0069 13       		.uleb128 0x13
- 647 006a 02       		.uleb128 0x2
- 648 006b 0A       		.uleb128 0xa
- 649 006c 00       		.byte	0
- 650 006d 00       		.byte	0
- 651 006e 08       		.uleb128 0x8
- 652 006f 34       		.uleb128 0x34
- 653 0070 00       		.byte	0
- 654 0071 03       		.uleb128 0x3
- 655 0072 0E       		.uleb128 0xe
- 656 0073 3A       		.uleb128 0x3a
- 657 0074 0B       		.uleb128 0xb
- 658 0075 3B       		.uleb128 0x3b
- 659 0076 0B       		.uleb128 0xb
- 660 0077 49       		.uleb128 0x49
- 661 0078 13       		.uleb128 0x13
- 662 0079 02       		.uleb128 0x2
- 663 007a 0A       		.uleb128 0xa
- 664 007b 00       		.byte	0
- 665 007c 00       		.byte	0
-ARM GAS  /tmp/ccG4Ri7g.s 			page 14
+ 1076 0059 49       		.uleb128 0x49
+ 1077 005a 13       		.uleb128 0x13
+ 1078 005b 02       		.uleb128 0x2
+ 1079 005c 0A       		.uleb128 0xa
+ 1080 005d 00       		.byte	0
+ 1081 005e 00       		.byte	0
+ 1082 005f 07       		.uleb128 0x7
+ 1083 0060 05       		.uleb128 0x5
+ 1084 0061 00       		.byte	0
+ 1085 0062 03       		.uleb128 0x3
+ 1086 0063 0E       		.uleb128 0xe
+ 1087 0064 3A       		.uleb128 0x3a
+ 1088 0065 0B       		.uleb128 0xb
+ 1089 0066 3B       		.uleb128 0x3b
+ 1090 0067 0B       		.uleb128 0xb
+ 1091 0068 49       		.uleb128 0x49
+ 1092 0069 13       		.uleb128 0x13
+ 1093 006a 02       		.uleb128 0x2
+ 1094 006b 0A       		.uleb128 0xa
+ 1095 006c 00       		.byte	0
+ 1096 006d 00       		.byte	0
+ 1097 006e 08       		.uleb128 0x8
+ 1098 006f 34       		.uleb128 0x34
+ 1099 0070 00       		.byte	0
+ 1100 0071 03       		.uleb128 0x3
+ 1101 0072 0E       		.uleb128 0xe
+ 1102 0073 3A       		.uleb128 0x3a
+ 1103 0074 0B       		.uleb128 0xb
+ 1104 0075 3B       		.uleb128 0x3b
+ 1105 0076 0B       		.uleb128 0xb
+ 1106 0077 49       		.uleb128 0x49
+ 1107 0078 13       		.uleb128 0x13
+ 1108 0079 02       		.uleb128 0x2
+ 1109 007a 0A       		.uleb128 0xa
+ 1110 007b 00       		.byte	0
+ 1111 007c 00       		.byte	0
+ 1112 007d 09       		.uleb128 0x9
+ 1113 007e 2E       		.uleb128 0x2e
+ 1114 007f 01       		.byte	0x1
+ 1115 0080 3F       		.uleb128 0x3f
+ 1116 0081 0C       		.uleb128 0xc
+ 1117 0082 03       		.uleb128 0x3
+ 1118 0083 0E       		.uleb128 0xe
+ 1119 0084 3A       		.uleb128 0x3a
+ 1120 0085 0B       		.uleb128 0xb
+ 1121 0086 3B       		.uleb128 0x3b
+ 1122 0087 0B       		.uleb128 0xb
+ 1123 0088 27       		.uleb128 0x27
+ 1124 0089 0C       		.uleb128 0xc
+ 1125 008a 49       		.uleb128 0x49
+ 1126 008b 13       		.uleb128 0x13
+ 1127 008c 11       		.uleb128 0x11
+ 1128 008d 01       		.uleb128 0x1
+ 1129 008e 12       		.uleb128 0x12
+ 1130 008f 01       		.uleb128 0x1
+ 1131 0090 40       		.uleb128 0x40
+ 1132 0091 06       		.uleb128 0x6
+ARM GAS  /tmp/ccISJtFt.s 			page 23
 
 
- 666 007d 09       		.uleb128 0x9
- 667 007e 2E       		.uleb128 0x2e
- 668 007f 01       		.byte	0x1
- 669 0080 3F       		.uleb128 0x3f
- 670 0081 0C       		.uleb128 0xc
- 671 0082 03       		.uleb128 0x3
- 672 0083 0E       		.uleb128 0xe
- 673 0084 3A       		.uleb128 0x3a
- 674 0085 0B       		.uleb128 0xb
- 675 0086 3B       		.uleb128 0x3b
- 676 0087 0B       		.uleb128 0xb
- 677 0088 27       		.uleb128 0x27
- 678 0089 0C       		.uleb128 0xc
- 679 008a 49       		.uleb128 0x49
- 680 008b 13       		.uleb128 0x13
- 681 008c 11       		.uleb128 0x11
- 682 008d 01       		.uleb128 0x1
- 683 008e 12       		.uleb128 0x12
- 684 008f 01       		.uleb128 0x1
- 685 0090 40       		.uleb128 0x40
- 686 0091 06       		.uleb128 0x6
- 687 0092 9742     		.uleb128 0x2117
- 688 0094 0C       		.uleb128 0xc
- 689 0095 01       		.uleb128 0x1
- 690 0096 13       		.uleb128 0x13
- 691 0097 00       		.byte	0
- 692 0098 00       		.byte	0
- 693 0099 0A       		.uleb128 0xa
- 694 009a 2E       		.uleb128 0x2e
- 695 009b 00       		.byte	0
- 696 009c 3F       		.uleb128 0x3f
- 697 009d 0C       		.uleb128 0xc
- 698 009e 03       		.uleb128 0x3
- 699 009f 0E       		.uleb128 0xe
- 700 00a0 3A       		.uleb128 0x3a
- 701 00a1 0B       		.uleb128 0xb
- 702 00a2 3B       		.uleb128 0x3b
- 703 00a3 0B       		.uleb128 0xb
- 704 00a4 27       		.uleb128 0x27
- 705 00a5 0C       		.uleb128 0xc
- 706 00a6 11       		.uleb128 0x11
- 707 00a7 01       		.uleb128 0x1
- 708 00a8 12       		.uleb128 0x12
- 709 00a9 01       		.uleb128 0x1
- 710 00aa 40       		.uleb128 0x40
- 711 00ab 0A       		.uleb128 0xa
- 712 00ac 9742     		.uleb128 0x2117
- 713 00ae 0C       		.uleb128 0xc
- 714 00af 00       		.byte	0
- 715 00b0 00       		.byte	0
- 716 00b1 0B       		.uleb128 0xb
- 717 00b2 2E       		.uleb128 0x2e
- 718 00b3 01       		.byte	0x1
- 719 00b4 3F       		.uleb128 0x3f
- 720 00b5 0C       		.uleb128 0xc
- 721 00b6 03       		.uleb128 0x3
- 722 00b7 0E       		.uleb128 0xe
-ARM GAS  /tmp/ccG4Ri7g.s 			page 15
+ 1133 0092 9742     		.uleb128 0x2117
+ 1134 0094 0C       		.uleb128 0xc
+ 1135 0095 01       		.uleb128 0x1
+ 1136 0096 13       		.uleb128 0x13
+ 1137 0097 00       		.byte	0
+ 1138 0098 00       		.byte	0
+ 1139 0099 0A       		.uleb128 0xa
+ 1140 009a 2E       		.uleb128 0x2e
+ 1141 009b 00       		.byte	0
+ 1142 009c 3F       		.uleb128 0x3f
+ 1143 009d 0C       		.uleb128 0xc
+ 1144 009e 03       		.uleb128 0x3
+ 1145 009f 0E       		.uleb128 0xe
+ 1146 00a0 3A       		.uleb128 0x3a
+ 1147 00a1 0B       		.uleb128 0xb
+ 1148 00a2 3B       		.uleb128 0x3b
+ 1149 00a3 0B       		.uleb128 0xb
+ 1150 00a4 27       		.uleb128 0x27
+ 1151 00a5 0C       		.uleb128 0xc
+ 1152 00a6 11       		.uleb128 0x11
+ 1153 00a7 01       		.uleb128 0x1
+ 1154 00a8 12       		.uleb128 0x12
+ 1155 00a9 01       		.uleb128 0x1
+ 1156 00aa 40       		.uleb128 0x40
+ 1157 00ab 0A       		.uleb128 0xa
+ 1158 00ac 9742     		.uleb128 0x2117
+ 1159 00ae 0C       		.uleb128 0xc
+ 1160 00af 00       		.byte	0
+ 1161 00b0 00       		.byte	0
+ 1162 00b1 0B       		.uleb128 0xb
+ 1163 00b2 2E       		.uleb128 0x2e
+ 1164 00b3 01       		.byte	0x1
+ 1165 00b4 3F       		.uleb128 0x3f
+ 1166 00b5 0C       		.uleb128 0xc
+ 1167 00b6 03       		.uleb128 0x3
+ 1168 00b7 0E       		.uleb128 0xe
+ 1169 00b8 3A       		.uleb128 0x3a
+ 1170 00b9 0B       		.uleb128 0xb
+ 1171 00ba 3B       		.uleb128 0x3b
+ 1172 00bb 0B       		.uleb128 0xb
+ 1173 00bc 27       		.uleb128 0x27
+ 1174 00bd 0C       		.uleb128 0xc
+ 1175 00be 49       		.uleb128 0x49
+ 1176 00bf 13       		.uleb128 0x13
+ 1177 00c0 11       		.uleb128 0x11
+ 1178 00c1 01       		.uleb128 0x1
+ 1179 00c2 12       		.uleb128 0x12
+ 1180 00c3 01       		.uleb128 0x1
+ 1181 00c4 40       		.uleb128 0x40
+ 1182 00c5 06       		.uleb128 0x6
+ 1183 00c6 9642     		.uleb128 0x2116
+ 1184 00c8 0C       		.uleb128 0xc
+ 1185 00c9 01       		.uleb128 0x1
+ 1186 00ca 13       		.uleb128 0x13
+ 1187 00cb 00       		.byte	0
+ 1188 00cc 00       		.byte	0
+ 1189 00cd 0C       		.uleb128 0xc
+ARM GAS  /tmp/ccISJtFt.s 			page 24
 
 
- 723 00b8 3A       		.uleb128 0x3a
- 724 00b9 0B       		.uleb128 0xb
- 725 00ba 3B       		.uleb128 0x3b
- 726 00bb 0B       		.uleb128 0xb
- 727 00bc 27       		.uleb128 0x27
- 728 00bd 0C       		.uleb128 0xc
- 729 00be 49       		.uleb128 0x49
- 730 00bf 13       		.uleb128 0x13
- 731 00c0 11       		.uleb128 0x11
- 732 00c1 01       		.uleb128 0x1
- 733 00c2 12       		.uleb128 0x12
- 734 00c3 01       		.uleb128 0x1
- 735 00c4 40       		.uleb128 0x40
- 736 00c5 06       		.uleb128 0x6
- 737 00c6 9642     		.uleb128 0x2116
- 738 00c8 0C       		.uleb128 0xc
- 739 00c9 01       		.uleb128 0x1
- 740 00ca 13       		.uleb128 0x13
- 741 00cb 00       		.byte	0
- 742 00cc 00       		.byte	0
- 743 00cd 0C       		.uleb128 0xc
- 744 00ce 0B       		.uleb128 0xb
- 745 00cf 01       		.byte	0x1
- 746 00d0 11       		.uleb128 0x11
- 747 00d1 01       		.uleb128 0x1
- 748 00d2 12       		.uleb128 0x12
- 749 00d3 01       		.uleb128 0x1
- 750 00d4 00       		.byte	0
- 751 00d5 00       		.byte	0
- 752 00d6 0D       		.uleb128 0xd
- 753 00d7 34       		.uleb128 0x34
- 754 00d8 00       		.byte	0
- 755 00d9 03       		.uleb128 0x3
- 756 00da 08       		.uleb128 0x8
- 757 00db 3A       		.uleb128 0x3a
- 758 00dc 0B       		.uleb128 0xb
- 759 00dd 3B       		.uleb128 0x3b
- 760 00de 0B       		.uleb128 0xb
- 761 00df 49       		.uleb128 0x49
- 762 00e0 13       		.uleb128 0x13
- 763 00e1 02       		.uleb128 0x2
- 764 00e2 0A       		.uleb128 0xa
- 765 00e3 00       		.byte	0
- 766 00e4 00       		.byte	0
- 767 00e5 0E       		.uleb128 0xe
- 768 00e6 34       		.uleb128 0x34
- 769 00e7 00       		.byte	0
- 770 00e8 03       		.uleb128 0x3
- 771 00e9 0E       		.uleb128 0xe
- 772 00ea 3A       		.uleb128 0x3a
- 773 00eb 0B       		.uleb128 0xb
- 774 00ec 3B       		.uleb128 0x3b
- 775 00ed 0B       		.uleb128 0xb
- 776 00ee 49       		.uleb128 0x49
- 777 00ef 13       		.uleb128 0x13
- 778 00f0 3F       		.uleb128 0x3f
- 779 00f1 0C       		.uleb128 0xc
-ARM GAS  /tmp/ccG4Ri7g.s 			page 16
+ 1190 00ce 0B       		.uleb128 0xb
+ 1191 00cf 01       		.byte	0x1
+ 1192 00d0 11       		.uleb128 0x11
+ 1193 00d1 01       		.uleb128 0x1
+ 1194 00d2 12       		.uleb128 0x12
+ 1195 00d3 01       		.uleb128 0x1
+ 1196 00d4 00       		.byte	0
+ 1197 00d5 00       		.byte	0
+ 1198 00d6 0D       		.uleb128 0xd
+ 1199 00d7 34       		.uleb128 0x34
+ 1200 00d8 00       		.byte	0
+ 1201 00d9 03       		.uleb128 0x3
+ 1202 00da 08       		.uleb128 0x8
+ 1203 00db 3A       		.uleb128 0x3a
+ 1204 00dc 0B       		.uleb128 0xb
+ 1205 00dd 3B       		.uleb128 0x3b
+ 1206 00de 0B       		.uleb128 0xb
+ 1207 00df 49       		.uleb128 0x49
+ 1208 00e0 13       		.uleb128 0x13
+ 1209 00e1 02       		.uleb128 0x2
+ 1210 00e2 0A       		.uleb128 0xa
+ 1211 00e3 00       		.byte	0
+ 1212 00e4 00       		.byte	0
+ 1213 00e5 0E       		.uleb128 0xe
+ 1214 00e6 34       		.uleb128 0x34
+ 1215 00e7 00       		.byte	0
+ 1216 00e8 03       		.uleb128 0x3
+ 1217 00e9 0E       		.uleb128 0xe
+ 1218 00ea 3A       		.uleb128 0x3a
+ 1219 00eb 0B       		.uleb128 0xb
+ 1220 00ec 3B       		.uleb128 0x3b
+ 1221 00ed 0B       		.uleb128 0xb
+ 1222 00ee 49       		.uleb128 0x49
+ 1223 00ef 13       		.uleb128 0x13
+ 1224 00f0 3F       		.uleb128 0x3f
+ 1225 00f1 0C       		.uleb128 0xc
+ 1226 00f2 02       		.uleb128 0x2
+ 1227 00f3 0A       		.uleb128 0xa
+ 1228 00f4 00       		.byte	0
+ 1229 00f5 00       		.byte	0
+ 1230 00f6 0F       		.uleb128 0xf
+ 1231 00f7 0F       		.uleb128 0xf
+ 1232 00f8 00       		.byte	0
+ 1233 00f9 0B       		.uleb128 0xb
+ 1234 00fa 0B       		.uleb128 0xb
+ 1235 00fb 49       		.uleb128 0x49
+ 1236 00fc 13       		.uleb128 0x13
+ 1237 00fd 00       		.byte	0
+ 1238 00fe 00       		.byte	0
+ 1239 00ff 10       		.uleb128 0x10
+ 1240 0100 35       		.uleb128 0x35
+ 1241 0101 00       		.byte	0
+ 1242 0102 49       		.uleb128 0x49
+ 1243 0103 13       		.uleb128 0x13
+ 1244 0104 00       		.byte	0
+ 1245 0105 00       		.byte	0
+ 1246 0106 00       		.byte	0
+ARM GAS  /tmp/ccISJtFt.s 			page 25
 
 
- 780 00f2 02       		.uleb128 0x2
- 781 00f3 0A       		.uleb128 0xa
- 782 00f4 00       		.byte	0
- 783 00f5 00       		.byte	0
- 784 00f6 0F       		.uleb128 0xf
- 785 00f7 0F       		.uleb128 0xf
- 786 00f8 00       		.byte	0
- 787 00f9 0B       		.uleb128 0xb
- 788 00fa 0B       		.uleb128 0xb
- 789 00fb 49       		.uleb128 0x49
- 790 00fc 13       		.uleb128 0x13
- 791 00fd 00       		.byte	0
- 792 00fe 00       		.byte	0
- 793 00ff 10       		.uleb128 0x10
- 794 0100 35       		.uleb128 0x35
- 795 0101 00       		.byte	0
- 796 0102 49       		.uleb128 0x49
- 797 0103 13       		.uleb128 0x13
- 798 0104 00       		.byte	0
- 799 0105 00       		.byte	0
- 800 0106 00       		.byte	0
- 801              		.section	.debug_loc,"",%progbits
- 802              	.Ldebug_loc0:
- 803              	.LLST0:
- 804 0000 00000000 		.4byte	.LFB0-.Ltext0
- 805 0004 02000000 		.4byte	.LCFI0-.Ltext0
- 806 0008 0200     		.2byte	0x2
- 807 000a 7D       		.byte	0x7d
- 808 000b 00       		.sleb128 0
- 809 000c 02000000 		.4byte	.LCFI0-.Ltext0
- 810 0010 34000000 		.4byte	.LFE0-.Ltext0
- 811 0014 0200     		.2byte	0x2
- 812 0016 7D       		.byte	0x7d
- 813 0017 18       		.sleb128 24
- 814 0018 00000000 		.4byte	0
- 815 001c 00000000 		.4byte	0
- 816              	.LLST1:
- 817 0020 34000000 		.4byte	.LFB1-.Ltext0
- 818 0024 36000000 		.4byte	.LCFI1-.Ltext0
- 819 0028 0200     		.2byte	0x2
- 820 002a 7D       		.byte	0x7d
- 821 002b 00       		.sleb128 0
- 822 002c 36000000 		.4byte	.LCFI1-.Ltext0
- 823 0030 50000000 		.4byte	.LFE1-.Ltext0
- 824 0034 0200     		.2byte	0x2
- 825 0036 7D       		.byte	0x7d
- 826 0037 08       		.sleb128 8
- 827 0038 00000000 		.4byte	0
- 828 003c 00000000 		.4byte	0
- 829              	.LLST2:
- 830 0040 50000000 		.4byte	.LFB2-.Ltext0
- 831 0044 52000000 		.4byte	.LCFI2-.Ltext0
- 832 0048 0200     		.2byte	0x2
- 833 004a 7D       		.byte	0x7d
- 834 004b 00       		.sleb128 0
- 835 004c 52000000 		.4byte	.LCFI2-.Ltext0
- 836 0050 80000000 		.4byte	.LFE2-.Ltext0
-ARM GAS  /tmp/ccG4Ri7g.s 			page 17
+ 1247              		.section	.debug_loc,"",%progbits
+ 1248              	.Ldebug_loc0:
+ 1249              	.LLST0:
+ 1250 0000 00000000 		.4byte	.LFB1-.Ltext0
+ 1251 0004 02000000 		.4byte	.LCFI0-.Ltext0
+ 1252 0008 0200     		.2byte	0x2
+ 1253 000a 7D       		.byte	0x7d
+ 1254 000b 00       		.sleb128 0
+ 1255 000c 02000000 		.4byte	.LCFI0-.Ltext0
+ 1256 0010 34000000 		.4byte	.LFE1-.Ltext0
+ 1257 0014 0200     		.2byte	0x2
+ 1258 0016 7D       		.byte	0x7d
+ 1259 0017 18       		.sleb128 24
+ 1260 0018 00000000 		.4byte	0
+ 1261 001c 00000000 		.4byte	0
+ 1262              	.LLST1:
+ 1263 0020 34000000 		.4byte	.LFB2-.Ltext0
+ 1264 0024 36000000 		.4byte	.LCFI1-.Ltext0
+ 1265 0028 0200     		.2byte	0x2
+ 1266 002a 7D       		.byte	0x7d
+ 1267 002b 00       		.sleb128 0
+ 1268 002c 36000000 		.4byte	.LCFI1-.Ltext0
+ 1269 0030 B6000000 		.4byte	.LFE2-.Ltext0
+ 1270 0034 0200     		.2byte	0x2
+ 1271 0036 7D       		.byte	0x7d
+ 1272 0037 20       		.sleb128 32
+ 1273 0038 00000000 		.4byte	0
+ 1274 003c 00000000 		.4byte	0
+ 1275              	.LLST2:
+ 1276 0040 B8000000 		.4byte	.LFB3-.Ltext0
+ 1277 0044 BA000000 		.4byte	.LCFI2-.Ltext0
+ 1278 0048 0200     		.2byte	0x2
+ 1279 004a 7D       		.byte	0x7d
+ 1280 004b 00       		.sleb128 0
+ 1281 004c BA000000 		.4byte	.LCFI2-.Ltext0
+ 1282 0050 D4000000 		.4byte	.LFE3-.Ltext0
+ 1283 0054 0200     		.2byte	0x2
+ 1284 0056 7D       		.byte	0x7d
+ 1285 0057 08       		.sleb128 8
+ 1286 0058 00000000 		.4byte	0
+ 1287 005c 00000000 		.4byte	0
+ 1288              	.LLST3:
+ 1289 0060 D4000000 		.4byte	.LFB4-.Ltext0
+ 1290 0064 D6000000 		.4byte	.LCFI3-.Ltext0
+ 1291 0068 0200     		.2byte	0x2
+ 1292 006a 7D       		.byte	0x7d
+ 1293 006b 00       		.sleb128 0
+ 1294 006c D6000000 		.4byte	.LCFI3-.Ltext0
+ 1295 0070 04010000 		.4byte	.LFE4-.Ltext0
+ 1296 0074 0200     		.2byte	0x2
+ 1297 0076 7D       		.byte	0x7d
+ 1298 0077 10       		.sleb128 16
+ 1299 0078 00000000 		.4byte	0
+ 1300 007c 00000000 		.4byte	0
+ 1301              	.LLST4:
+ 1302 0080 1C010000 		.4byte	.LFB6-.Ltext0
+ 1303 0084 1E010000 		.4byte	.LCFI4-.Ltext0
+ARM GAS  /tmp/ccISJtFt.s 			page 26
 
 
- 837 0054 0200     		.2byte	0x2
- 838 0056 7D       		.byte	0x7d
- 839 0057 10       		.sleb128 16
- 840 0058 00000000 		.4byte	0
- 841 005c 00000000 		.4byte	0
- 842              	.LLST3:
- 843 0060 98000000 		.4byte	.LFB4-.Ltext0
- 844 0064 9A000000 		.4byte	.LCFI3-.Ltext0
- 845 0068 0200     		.2byte	0x2
- 846 006a 7D       		.byte	0x7d
- 847 006b 00       		.sleb128 0
- 848 006c 9A000000 		.4byte	.LCFI3-.Ltext0
- 849 0070 9C000000 		.4byte	.LCFI4-.Ltext0
- 850 0074 0200     		.2byte	0x2
- 851 0076 7D       		.byte	0x7d
- 852 0077 04       		.sleb128 4
- 853 0078 9C000000 		.4byte	.LCFI4-.Ltext0
- 854 007c CE000000 		.4byte	.LFE4-.Ltext0
- 855 0080 0200     		.2byte	0x2
- 856 0082 7D       		.byte	0x7d
- 857 0083 10       		.sleb128 16
- 858 0084 00000000 		.4byte	0
- 859 0088 00000000 		.4byte	0
- 860              		.section	.debug_aranges,"",%progbits
- 861 0000 1C000000 		.4byte	0x1c
- 862 0004 0200     		.2byte	0x2
- 863 0006 00000000 		.4byte	.Ldebug_info0
- 864 000a 04       		.byte	0x4
- 865 000b 00       		.byte	0
- 866 000c 0000     		.2byte	0
- 867 000e 0000     		.2byte	0
- 868 0010 00000000 		.4byte	.Ltext0
- 869 0014 CE000000 		.4byte	.Letext0-.Ltext0
- 870 0018 00000000 		.4byte	0
- 871 001c 00000000 		.4byte	0
- 872              		.section	.debug_line,"",%progbits
- 873              	.Ldebug_line0:
- 874 0000 0B010000 		.section	.debug_str,"MS",%progbits,1
- 874      0200BF00 
- 874      00000201 
- 874      FB0E0D00 
- 874      01010101 
- 875              	.LASF15:
- 876 0000 7069785F 		.ascii	"pix_address\000"
- 876      61646472 
- 876      65737300 
- 877              	.LASF13:
- 878 000c 72656164 		.ascii	"read_switches\000"
- 878      5F737769 
- 878      74636865 
- 878      7300
- 879              	.LASF24:
- 880 001a 2F686F6D 		.ascii	"/home/ks6n19/Documents/project/software\000"
- 880      652F6B73 
- 880      366E3139 
- 880      2F446F63 
- 880      756D656E 
-ARM GAS  /tmp/ccG4Ri7g.s 			page 18
+ 1304 0088 0200     		.2byte	0x2
+ 1305 008a 7D       		.byte	0x7d
+ 1306 008b 00       		.sleb128 0
+ 1307 008c 1E010000 		.4byte	.LCFI4-.Ltext0
+ 1308 0090 20010000 		.4byte	.LCFI5-.Ltext0
+ 1309 0094 0200     		.2byte	0x2
+ 1310 0096 7D       		.byte	0x7d
+ 1311 0097 04       		.sleb128 4
+ 1312 0098 20010000 		.4byte	.LCFI5-.Ltext0
+ 1313 009c 34020000 		.4byte	.LFE6-.Ltext0
+ 1314 00a0 0300     		.2byte	0x3
+ 1315 00a2 7D       		.byte	0x7d
+ 1316 00a3 C000     		.sleb128 64
+ 1317 00a5 00000000 		.4byte	0
+ 1318 00a9 00000000 		.4byte	0
+ 1319              		.section	.debug_aranges,"",%progbits
+ 1320 0000 1C000000 		.4byte	0x1c
+ 1321 0004 0200     		.2byte	0x2
+ 1322 0006 00000000 		.4byte	.Ldebug_info0
+ 1323 000a 04       		.byte	0x4
+ 1324 000b 00       		.byte	0
+ 1325 000c 0000     		.2byte	0
+ 1326 000e 0000     		.2byte	0
+ 1327 0010 00000000 		.4byte	.Ltext0
+ 1328 0014 34020000 		.4byte	.Letext0-.Ltext0
+ 1329 0018 00000000 		.4byte	0
+ 1330 001c 00000000 		.4byte	0
+ 1331              		.section	.debug_line,"",%progbits
+ 1332              	.Ldebug_line0:
+ 1333 0000 2F010000 		.section	.debug_str,"MS",%progbits,1
+ 1333      0200BF00 
+ 1333      00000201 
+ 1333      FB0E0D00 
+ 1333      01010101 
+ 1334              	.LASF6:
+ 1335 0000 6C6F6E67 		.ascii	"long long int\000"
+ 1335      206C6F6E 
+ 1335      6720696E 
+ 1335      7400
+ 1336              	.LASF26:
+ 1337 000e 73746174 		.ascii	"status\000"
+ 1337      757300
+ 1338              	.LASF23:
+ 1339 0015 72656164 		.ascii	"read_switches\000"
+ 1339      5F737769 
+ 1339      74636865 
+ 1339      7300
+ 1340              	.LASF19:
+ 1341 0023 4C325F64 		.ascii	"L2_detT\000"
+ 1341      65745400 
+ 1342              	.LASF31:
+ 1343 002b 4C335F70 		.ascii	"L3_positive\000"
+ 1343      6F736974 
+ 1343      69766500 
+ 1344              	.LASF3:
+ 1345 0037 73686F72 		.ascii	"short unsigned int\000"
+ 1345      7420756E 
+ARM GAS  /tmp/ccISJtFt.s 			page 27
 
 
- 881              	.LASF25:
- 882 0042 77726974 		.ascii	"write_pix\000"
- 882      655F7069 
- 882      7800
- 883              	.LASF16:
- 884 004c 73746174 		.ascii	"status\000"
- 884      757300
- 885              	.LASF14:
- 886 0053 63686563 		.ascii	"check_switches\000"
- 886      6B5F7377 
- 886      69746368 
- 886      657300
- 887              	.LASF26:
- 888 0062 77616974 		.ascii	"wait_for_any_switch_data\000"
- 888      5F666F72 
- 888      5F616E79 
- 888      5F737769 
- 888      7463685F 
- 889              	.LASF12:
- 890 007b 61646472 		.ascii	"addr\000"
- 890      00
- 891              	.LASF20:
- 892 0080 53575F52 		.ascii	"SW_REGS\000"
- 892      45475300 
- 893              	.LASF22:
- 894 0088 474E5520 		.ascii	"GNU C11 5.4.1 20160919 (release) [ARM/embedded-5-br"
- 894      43313120 
- 894      352E342E 
- 894      31203230 
- 894      31363039 
- 895 00bb 616E6368 		.ascii	"anch revision 240496] -mcpu=cortex-m0 -mthumb -gdwa"
- 895      20726576 
- 895      6973696F 
- 895      6E203234 
- 895      30343936 
- 896 00ee 72662D32 		.ascii	"rf-2 -O0 -fomit-frame-pointer\000"
- 896      202D4F30 
- 896      202D666F 
- 896      6D69742D 
- 896      6672616D 
- 897              	.LASF1:
- 898 010c 756E7369 		.ascii	"unsigned char\000"
- 898      676E6564 
- 898      20636861 
- 898      7200
- 899              	.LASF17:
- 900 011a 73776974 		.ascii	"switches_ready\000"
- 900      63686573 
- 900      5F726561 
- 900      647900
- 901              	.LASF5:
- 902 0129 6C6F6E67 		.ascii	"long unsigned int\000"
- 902      20756E73 
- 902      69676E65 
- 902      6420696E 
- 902      7400
- 903              	.LASF3:
-ARM GAS  /tmp/ccG4Ri7g.s 			page 19
+ 1345      7369676E 
+ 1345      65642069 
+ 1345      6E7400
+ 1346              	.LASF36:
+ 1347 004a 2F686F6D 		.ascii	"/home/ks6n19/Documents/project/software\000"
+ 1347      652F6B73 
+ 1347      366E3139 
+ 1347      2F446F63 
+ 1347      756D656E 
+ 1348              	.LASF37:
+ 1349 0072 77726974 		.ascii	"write_pix\000"
+ 1349      655F7069 
+ 1349      7800
+ 1350              	.LASF38:
+ 1351 007c 77616974 		.ascii	"wait_for_any_switch_data\000"
+ 1351      5F666F72 
+ 1351      5F616E79 
+ 1351      5F737769 
+ 1351      7463685F 
+ 1352              	.LASF25:
+ 1353 0095 63686563 		.ascii	"check_switches\000"
+ 1353      6B5F7377 
+ 1353      69746368 
+ 1353      657300
+ 1354              	.LASF15:
+ 1355 00a4 666C6F61 		.ascii	"float\000"
+ 1355      7400
+ 1356              	.LASF30:
+ 1357 00aa 4C325F70 		.ascii	"L2_positive\000"
+ 1357      6F736974 
+ 1357      69766500 
+ 1358              	.LASF34:
+ 1359 00b6 474E5520 		.ascii	"GNU C11 5.4.1 20160919 (release) [ARM/embedded-5-br"
+ 1359      43313120 
+ 1359      352E342E 
+ 1359      31203230 
+ 1359      31363039 
+ 1360 00e9 616E6368 		.ascii	"anch revision 240496] -mcpu=cortex-m0 -mthumb -gdwa"
+ 1360      20726576 
+ 1360      6973696F 
+ 1360      6E203234 
+ 1360      30343936 
+ 1361 011c 72662D32 		.ascii	"rf-2 -O0 -fomit-frame-pointer\000"
+ 1361      202D4F30 
+ 1361      202D666F 
+ 1361      6D69742D 
+ 1361      6672616D 
+ 1362              	.LASF1:
+ 1363 013a 756E7369 		.ascii	"unsigned char\000"
+ 1363      676E6564 
+ 1363      20636861 
+ 1363      7200
+ 1364              	.LASF27:
+ 1365 0148 73776974 		.ascii	"switches_ready\000"
+ 1365      63686573 
+ 1365      5F726561 
+ 1365      647900
+ARM GAS  /tmp/ccISJtFt.s 			page 28
 
 
- 904 013b 73686F72 		.ascii	"short unsigned int\000"
- 904      7420756E 
- 904      7369676E 
- 904      65642069 
- 904      6E7400
- 905              	.LASF9:
- 906 014e 5F5F7569 		.ascii	"__uint32_t\000"
- 906      6E743332 
- 906      5F7400
- 907              	.LASF11:
- 908 0159 636F6C6F 		.ascii	"colour\000"
- 908      757200
- 909              	.LASF8:
- 910 0160 756E7369 		.ascii	"unsigned int\000"
- 910      676E6564 
- 910      20696E74 
- 910      00
- 911              	.LASF7:
- 912 016d 6C6F6E67 		.ascii	"long long unsigned int\000"
- 912      206C6F6E 
- 912      6720756E 
- 912      7369676E 
- 912      65642069 
- 913              	.LASF19:
- 914 0184 6D61696E 		.ascii	"main\000"
- 914      00
- 915              	.LASF6:
- 916 0189 6C6F6E67 		.ascii	"long long int\000"
- 916      206C6F6E 
- 916      6720696E 
- 916      7400
- 917              	.LASF23:
- 918 0197 636F6465 		.ascii	"code/main.c\000"
- 918      2F6D6169 
- 918      6E2E6300 
- 919              	.LASF2:
- 920 01a3 73686F72 		.ascii	"short int\000"
- 920      7420696E 
- 920      7400
- 921              	.LASF10:
- 922 01ad 75696E74 		.ascii	"uint32_t\000"
- 922      33325F74 
- 922      00
- 923              	.LASF4:
- 924 01b6 6C6F6E67 		.ascii	"long int\000"
- 924      20696E74 
- 924      00
- 925              	.LASF21:
- 926 01bf 5049585F 		.ascii	"PIX_REGS\000"
- 926      52454753 
- 926      00
- 927              	.LASF0:
- 928 01c8 7369676E 		.ascii	"signed char\000"
- 928      65642063 
- 928      68617200 
- 929              	.LASF18:
- 930 01d4 5F426F6F 		.ascii	"_Bool\000"
-ARM GAS  /tmp/ccG4Ri7g.s 			page 20
+ 1366              	.LASF5:
+ 1367 0157 6C6F6E67 		.ascii	"long unsigned int\000"
+ 1367      20756E73 
+ 1367      69676E65 
+ 1367      6420696E 
+ 1367      7400
+ 1368              	.LASF24:
+ 1369 0169 61646472 		.ascii	"addr\000"
+ 1369      00
+ 1370              	.LASF22:
+ 1371 016e 506F696E 		.ascii	"PointinTriangle\000"
+ 1371      74696E54 
+ 1371      7269616E 
+ 1371      676C6500 
+ 1372              	.LASF29:
+ 1373 017e 4C315F70 		.ascii	"L1_positive\000"
+ 1373      6F736974 
+ 1373      69766500 
+ 1374              	.LASF14:
+ 1375 018a 646F7562 		.ascii	"double\000"
+ 1375      6C6500
+ 1376              	.LASF9:
+ 1377 0191 5F5F7569 		.ascii	"__uint32_t\000"
+ 1377      6E743332 
+ 1377      5F7400
+ 1378              	.LASF16:
+ 1379 019c 636F6C6F 		.ascii	"colour\000"
+ 1379      757200
+ 1380              	.LASF20:
+ 1381 01a3 64657454 		.ascii	"detT\000"
+ 1381      00
+ 1382              	.LASF8:
+ 1383 01a8 756E7369 		.ascii	"unsigned int\000"
+ 1383      676E6564 
+ 1383      20696E74 
+ 1383      00
+ 1384              	.LASF7:
+ 1385 01b5 6C6F6E67 		.ascii	"long long unsigned int\000"
+ 1385      206C6F6E 
+ 1385      6720756E 
+ 1385      7369676E 
+ 1385      65642069 
+ 1386              	.LASF17:
+ 1387 01cc 7069785F 		.ascii	"pix_address\000"
+ 1387      61646472 
+ 1387      65737300 
+ 1388              	.LASF28:
+ 1389 01d8 6D61696E 		.ascii	"main\000"
+ 1389      00
+ 1390              	.LASF12:
+ 1391 01dd 73697A65 		.ascii	"sizetype\000"
+ 1391      74797065 
+ 1391      00
+ 1392              	.LASF32:
+ 1393 01e6 53575F52 		.ascii	"SW_REGS\000"
+ 1393      45475300 
+ 1394              	.LASF35:
+ARM GAS  /tmp/ccISJtFt.s 			page 29
 
 
- 930      6C00
- 931              		.ident	"GCC: (GNU Tools for ARM Embedded Processors) 5.4.1 20160919 (release) [ARM/embedded-5-bran
-ARM GAS  /tmp/ccG4Ri7g.s 			page 21
+ 1395 01ee 636F6465 		.ascii	"code/main.c\000"
+ 1395      2F6D6169 
+ 1395      6E2E6300 
+ 1396              	.LASF18:
+ 1397 01fa 4C315F64 		.ascii	"L1_detT\000"
+ 1397      65745400 
+ 1398              	.LASF2:
+ 1399 0202 73686F72 		.ascii	"short int\000"
+ 1399      7420696E 
+ 1399      7400
+ 1400              	.LASF10:
+ 1401 020c 75696E74 		.ascii	"uint32_t\000"
+ 1401      33325F74 
+ 1401      00
+ 1402              	.LASF4:
+ 1403 0215 6C6F6E67 		.ascii	"long int\000"
+ 1403      20696E74 
+ 1403      00
+ 1404              	.LASF13:
+ 1405 021e 63686172 		.ascii	"char\000"
+ 1405      00
+ 1406              	.LASF33:
+ 1407 0223 5049585F 		.ascii	"PIX_REGS\000"
+ 1407      52454753 
+ 1407      00
+ 1408              	.LASF11:
+ 1409 022c 6C6F6E67 		.ascii	"long double\000"
+ 1409      20646F75 
+ 1409      626C6500 
+ 1410              	.LASF0:
+ 1411 0238 7369676E 		.ascii	"signed char\000"
+ 1411      65642063 
+ 1411      68617200 
+ 1412              	.LASF21:
+ 1413 0244 5F426F6F 		.ascii	"_Bool\000"
+ 1413      6C00
+ 1414              		.ident	"GCC: (GNU Tools for ARM Embedded Processors) 5.4.1 20160919 (release) [ARM/embedded-5-bran
+ARM GAS  /tmp/ccISJtFt.s 			page 30
 
 
 DEFINED SYMBOLS
                             *ABS*:00000000 main.c
-     /tmp/ccG4Ri7g.s:57     .data:00000000 SW_REGS
-     /tmp/ccG4Ri7g.s:54     .data:00000000 $d
-     /tmp/ccG4Ri7g.s:63     .data:00000004 PIX_REGS
-     /tmp/ccG4Ri7g.s:66     .text:00000000 $t
-     /tmp/ccG4Ri7g.s:71     .text:00000000 write_pix
-     /tmp/ccG4Ri7g.s:111    .text:00000030 $d
-     /tmp/ccG4Ri7g.s:115    .text:00000034 $t
-     /tmp/ccG4Ri7g.s:120    .text:00000034 read_switches
-     /tmp/ccG4Ri7g.s:146    .text:0000004c $d
-     /tmp/ccG4Ri7g.s:150    .text:00000050 $t
-     /tmp/ccG4Ri7g.s:155    .text:00000050 check_switches
-     /tmp/ccG4Ri7g.s:194    .text:0000007c $d
-     /tmp/ccG4Ri7g.s:198    .text:00000080 $t
-     /tmp/ccG4Ri7g.s:203    .text:00000080 wait_for_any_switch_data
-     /tmp/ccG4Ri7g.s:228    .text:00000094 $d
-     /tmp/ccG4Ri7g.s:232    .text:00000098 $t
-     /tmp/ccG4Ri7g.s:237    .text:00000098 main
+     /tmp/ccISJtFt.s:57     .data:00000000 SW_REGS
+     /tmp/ccISJtFt.s:54     .data:00000000 $d
+     /tmp/ccISJtFt.s:63     .data:00000004 PIX_REGS
+     /tmp/ccISJtFt.s:66     .text:00000000 $t
+     /tmp/ccISJtFt.s:71     .text:00000000 write_pix
+     /tmp/ccISJtFt.s:111    .text:00000030 $d
+     /tmp/ccISJtFt.s:115    .text:00000034 $t
+     /tmp/ccISJtFt.s:120    .text:00000034 PointinTriangle
+     /tmp/ccISJtFt.s:212    .text:000000b8 read_switches
+     /tmp/ccISJtFt.s:238    .text:000000d0 $d
+     /tmp/ccISJtFt.s:242    .text:000000d4 $t
+     /tmp/ccISJtFt.s:247    .text:000000d4 check_switches
+     /tmp/ccISJtFt.s:286    .text:00000100 $d
+     /tmp/ccISJtFt.s:290    .text:00000104 $t
+     /tmp/ccISJtFt.s:295    .text:00000104 wait_for_any_switch_data
+     /tmp/ccISJtFt.s:320    .text:00000118 $d
+     /tmp/ccISJtFt.s:324    .text:0000011c $t
+     /tmp/ccISJtFt.s:329    .text:0000011c main
+     /tmp/ccISJtFt.s:515    .text:00000230 $d
                      .debug_frame:00000010 $d
 
 NO UNDEFINED SYMBOLS
diff --git a/software/code/main.o b/software/code/main.o
index d40d74fdc780656ff4371b40b4862517019e8fd0..0ef2935443a34e289e24ddb51e6226e81e4f7c2b 100644
Binary files a/software/code/main.o and b/software/code/main.o differ
diff --git a/software/test_designstart.elf b/software/test_designstart.elf
index fdc1c8e6b38c8f7a1f18bc9d536c5bf5201481ac..eb6d39441b1142f52a7f86375eaa1c2a2032c9ce 100755
Binary files a/software/test_designstart.elf and b/software/test_designstart.elf differ
diff --git a/software/test_designstart.hex b/software/test_designstart.hex
index 07001196fda4fc2c5b326ea7bd28d574c38f8533..25ba8be94fff7fe4d2b8ba69fb7d354835252434 100644
--- a/software/test_designstart.hex
+++ b/software/test_designstart.hex
@@ -11,8 +11,8 @@
 :1000A000390100003D010000410100000000000096
 :1000B00045010000490100004D0100005101000010
 :1000C00000B583B0074B019304E0019B1A1D019218
-:1000D00000221A60019A044B9A42F6D300F086F887
-:1000E000FEE7C0462C0200002C020000FEE7C046DE
+:1000D00000221A60019A044B9A42F6D300F0C8F845
+:1000E000FEE7C0469003000090030000FEE7C04614
 :1000F000FEE7C046FEE7C046FEE7C046FEE7C04654
 :10010000FEE7C046FEE7C046FEE7C046FEE7C04643
 :10011000FEE7C046FEE7C046FEE7C046FEE7C04633
@@ -22,16 +22,38 @@
 :10015000FEE7C04686B0039002910192029A130016
 :100160009B009B18DB011A00039BD3180593054BDA
 :100170001A68059B9B00D318019A1A60C04606B006
-:100180007047C0462802000082B00190044B1A68F4
-:10019000019B9B00D3181B68180002B07047C04633
-:1001A0002402000084B00190094B1B6808331B68CF
-:1001B0000393039A019B1A411300012213400293F7
-:1001C000029B013B5A425341DBB2180004B0704716
-:1001D00024020000C046044B1B6808331B68002B38
-:1001E000F9D0C0467047C0462402000000B583B075
-:1001F0000023019311E00023009308E00099019B84
-:1002000001221800FFF7A6FF009B01330093009B1B
-:10021000622BF3DD019B01330193019B622BEADD2D
-:04022000E6E7C04607
-:08022400000000400000005042
+:100180007047C0468C03000088B003900291019232
+:100190000093009A099BD31A0A99089A8A1A5A431B
+:1001A0000899019BCB1A0B980999411A4B43D31814
+:1001B0000793099A029BD31A0A99089A8A1A5A43F2
+:1001C0000399089BCB1A0B980999411A4B43D318F2
+:1001D0000693009A099BD31A0399089A8A1A5A43DC
+:1001E0000899019BCB1A02980999411A4B43D318DD
+:1001F0000593079A069BD218059B9A4201DD0123BD
+:1002000000E00023180008B07047C04682B001909B
+:10021000044B1A68019B9B00D3181B68180002B09E
+:100220007047C0468803000084B00190094B1B68EA
+:1002300008331B680393039A019B1A4113000122A0
+:1002400013400293029B013B5A425341DBB2180018
+:1002500004B0704788030000C046044B1B68083395
+:100260001B68002BF9D0C0467047C04688030000C9
+:1002700000B58FB00A230B931E230A93142309930E
+:1002800028230893142307931E23069300230D931A
+:1002900072E000230C9367E0089A069BD31A0D992D
+:1002A000079A8A1A5A430799099BCB1A0C98069900
+:1002B000411A4B43D3180593069A0A9BD31A0D99FA
+:1002C000079A8A1A5A430B99079BCB1A0C980699DE
+:1002D000411A4B43D3180493089A069BD31A0B99DF
+:1002E000079A8A1A5A430799099BCB1A0A980699C2
+:1002F000411A4B43D3180393059BDB0FDAB2039BE0
+:10030000DB43DB0FDBB25340DBB20293049BDB0F1A
+:10031000DAB2039BDB43DB0FDBB25340DBB201936A
+:10032000059A049BD2180123191C039B9A4201DCF5
+:100330000023191CCAB2039BDB43DB0FDBB2534023
+:10034000DBB20093029B002B0BD0019B002B08D04B
+:10035000009B002B05D00C990D9B01221800FFF784
+:10036000F9FE0C9B01330C930C9AE023FF339A4265
+:1003700092DD0D9B01330D930D9B024A934288DD64
+:0803800078E7C0467F0200008F
+:080388000000004000000050DD
 :00000001FF
diff --git a/software/test_designstart.map b/software/test_designstart.map
index 448ca35f7120431e86d2be9de0e5baa07465a3d6..ba040212a910089fe8418d4f601a25d0e7203c4b 100644
--- a/software/test_designstart.map
+++ b/software/test_designstart.map
@@ -15,7 +15,7 @@ LOAD /srv/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/armv6-
 LOAD /srv/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv6-m/libc.a
 END GROUP
 
-.text           0x00000000      0x224
+.text           0x00000000      0x388
                 0x00000000                _stext = .
  CREATE_OBJECT_SYMBOLS
  *(.vectors)
@@ -51,85 +51,86 @@ END GROUP
                 0x00000148                PIO_2_IRQHandler
                 0x0000014c                PIO_1_IRQHandler
                 0x00000150                PIO_0_IRQHandler
- .text          0x00000154       0xd0 ./code/main.o
+ .text          0x00000154      0x234 ./code/main.o
                 0x00000154                write_pix
-                0x00000188                read_switches
-                0x000001a4                check_switches
-                0x000001d4                wait_for_any_switch_data
-                0x000001ec                main
+                0x00000188                PointinTriangle
+                0x0000020c                read_switches
+                0x00000228                check_switches
+                0x00000258                wait_for_any_switch_data
+                0x00000270                main
  *(.text.*)
-                0x00000224                . = ALIGN (0x4)
+                0x00000388                . = ALIGN (0x4)
  *(.rodata)
  *(.rodata.*)
-                0x00000224                . = ALIGN (0x4)
-                0x00000224                _etext = .
+                0x00000388                . = ALIGN (0x4)
+                0x00000388                _etext = .
 
-.glue_7         0x00000224        0x0
- .glue_7        0x00000224        0x0 linker stubs
+.glue_7         0x00000388        0x0
+ .glue_7        0x00000388        0x0 linker stubs
 
-.glue_7t        0x00000224        0x0
- .glue_7t       0x00000224        0x0 linker stubs
+.glue_7t        0x00000388        0x0
+ .glue_7t       0x00000388        0x0 linker stubs
 
-.vfp11_veneer   0x00000224        0x0
- .vfp11_veneer  0x00000224        0x0 linker stubs
+.vfp11_veneer   0x00000388        0x0
+ .vfp11_veneer  0x00000388        0x0 linker stubs
 
-.v4_bx          0x00000224        0x0
- .v4_bx         0x00000224        0x0 linker stubs
+.v4_bx          0x00000388        0x0
+ .v4_bx         0x00000388        0x0 linker stubs
 
-.iplt           0x00000224        0x0
- .iplt          0x00000224        0x0 ./code/crt.o
+.iplt           0x00000388        0x0
+ .iplt          0x00000388        0x0 ./code/crt.o
 
-.rel.dyn        0x00000224        0x0
- .rel.iplt      0x00000224        0x0 ./code/crt.o
+.rel.dyn        0x00000388        0x0
+ .rel.iplt      0x00000388        0x0 ./code/crt.o
 
-.data           0x00000224        0x8
-                0x00000224                . = ALIGN (0x4)
-                0x00000224                _sdata = .
+.data           0x00000388        0x8
+                0x00000388                . = ALIGN (0x4)
+                0x00000388                _sdata = .
  *(.data)
- .data          0x00000224        0x0 ./code/crt.o
- .data          0x00000224        0x0 ./code/vectors_designstart.o
- .data          0x00000224        0x8 ./code/main.o
-                0x00000224                SW_REGS
-                0x00000228                PIX_REGS
+ .data          0x00000388        0x0 ./code/crt.o
+ .data          0x00000388        0x0 ./code/vectors_designstart.o
+ .data          0x00000388        0x8 ./code/main.o
+                0x00000388                SW_REGS
+                0x0000038c                PIX_REGS
  *(.data.*)
-                0x0000022c                . = ALIGN (0x4)
+                0x00000390                . = ALIGN (0x4)
  *(.fastrun)
  *(.fastrun.*)
-                0x0000022c                . = ALIGN (0x4)
-                0x0000022c                _edata = .
+                0x00000390                . = ALIGN (0x4)
+                0x00000390                _edata = .
 
-.igot.plt       0x0000022c        0x0
- .igot.plt      0x0000022c        0x0 ./code/crt.o
+.igot.plt       0x00000390        0x0
+ .igot.plt      0x00000390        0x0 ./code/crt.o
 
-.bss            0x0000022c        0x0
-                0x0000022c                . = ALIGN (0x4)
-                0x0000022c                _sbss = .
+.bss            0x00000390        0x0
+                0x00000390                . = ALIGN (0x4)
+                0x00000390                _sbss = .
  *(.bss)
- .bss           0x0000022c        0x0 ./code/crt.o
- .bss           0x0000022c        0x0 ./code/vectors_designstart.o
- .bss           0x0000022c        0x0 ./code/main.o
+ .bss           0x00000390        0x0 ./code/crt.o
+ .bss           0x00000390        0x0 ./code/vectors_designstart.o
+ .bss           0x00000390        0x0 ./code/main.o
  *(.bss.*)
-                0x0000022c                . = ALIGN (0x4)
-                0x0000022c                _ebss = .
+                0x00000390                . = ALIGN (0x4)
+                0x00000390                _ebss = .
                 0x00004000                _estack = (ORIGIN (RAM) + LENGTH (RAM))
 
 /DISCARD/
  *(.ARM.exidx*)
 OUTPUT(test_designstart.elf elf32-littlearm)
 
-.debug_info     0x00000000      0x53f
+.debug_info     0x00000000      0x6c1
  .debug_info    0x00000000       0xcb ./code/crt.o
  .debug_info    0x000000cb      0x297 ./code/vectors_designstart.o
- .debug_info    0x00000362      0x1dd ./code/main.o
+ .debug_info    0x00000362      0x35f ./code/main.o
 
 .debug_abbrev   0x00000000      0x203
  .debug_abbrev  0x00000000       0x7a ./code/crt.o
  .debug_abbrev  0x0000007a       0x82 ./code/vectors_designstart.o
  .debug_abbrev  0x000000fc      0x107 ./code/main.o
 
-.debug_loc      0x00000000       0xb8
+.debug_loc      0x00000000       0xd9
  .debug_loc     0x00000000       0x2c ./code/crt.o
- .debug_loc     0x0000002c       0x8c ./code/main.o
+ .debug_loc     0x0000002c       0xad ./code/main.o
 
 .debug_aranges  0x00000000       0x60
  .debug_aranges
@@ -139,18 +140,18 @@ OUTPUT(test_designstart.elf elf32-littlearm)
  .debug_aranges
                 0x00000040       0x20 ./code/main.o
 
-.debug_line     0x00000000      0x2d6
+.debug_line     0x00000000      0x2fa
  .debug_line    0x00000000       0xe1 ./code/crt.o
  .debug_line    0x000000e1       0xe6 ./code/vectors_designstart.o
- .debug_line    0x000001c7      0x10f ./code/main.o
+ .debug_line    0x000001c7      0x133 ./code/main.o
 
-.debug_str      0x00000000      0x3a7
+.debug_str      0x00000000      0x3fd
  .debug_str     0x00000000      0x131 ./code/crt.o
                                 0x16e (size before relaxing)
  .debug_str     0x00000131      0x1e0 ./code/vectors_designstart.o
                                 0x29e (size before relaxing)
- .debug_str     0x00000311       0x96 ./code/main.o
-                                0x1da (size before relaxing)
+ .debug_str     0x00000311       0xec ./code/main.o
+                                0x24a (size before relaxing)
 
 .comment        0x00000000       0x6e
  .comment       0x00000000       0x6e ./code/crt.o
@@ -167,10 +168,10 @@ OUTPUT(test_designstart.elf elf32-littlearm)
  .ARM.attributes
                 0x00000062       0x31 ./code/main.o
 
-.debug_frame    0x00000000      0x254
+.debug_frame    0x00000000      0x268
  .debug_frame   0x00000000       0x2c ./code/crt.o
  .debug_frame   0x0000002c      0x1b0 ./code/vectors_designstart.o
- .debug_frame   0x000001dc       0x78 ./code/main.o
+ .debug_frame   0x000001dc       0x8c ./code/main.o
 
 Cross Reference Table
 
@@ -194,6 +195,7 @@ PIO_2_IRQHandler                                  ./code/vectors_designstart.o
 PIO_3_IRQHandler                                  ./code/vectors_designstart.o
 PIX_REGS                                          ./code/main.o
 PendSV_Handler                                    ./code/vectors_designstart.o
+PointinTriangle                                   ./code/main.o
 ResetHandler                                      ./code/crt.o
                                                   ./code/vectors_designstart.o
 SSP0_IRQHandler                                   ./code/vectors_designstart.o
diff --git a/waves.shm/.nfs0000000068b1cbca0000594b b/waves.shm/.nfs0000000068b1cbca0000594b
new file mode 100644
index 0000000000000000000000000000000000000000..57115d1868102fa51ae07ddb1cc7ec3aae6e14c6
Binary files /dev/null and b/waves.shm/.nfs0000000068b1cbca0000594b differ
diff --git a/waves.shm/.nfs0000000068bbd4a10000594a b/waves.shm/.nfs0000000068bbd4a10000594a
new file mode 100644
index 0000000000000000000000000000000000000000..997b9aa084ad8d0e1429024e66c101c8a24d7eda
Binary files /dev/null and b/waves.shm/.nfs0000000068bbd4a10000594a differ
diff --git a/waves.shm/waves-1.trn b/waves.shm/waves-1.trn
index 81e845ba370cf489ff88c032931b7ffb06317d1a..7bd632da1c61b0740fc3734b68a12dfbc07963dc 100644
Binary files a/waves.shm/waves-1.trn and b/waves.shm/waves-1.trn differ
diff --git a/waves.shm/waves.dsn b/waves.shm/waves.dsn
index 70c5e174618749da1b2895b1dcc988c6ae486b8c..9b4fa7c4fec74a49c3e9b226b6d7a023df6761ac 100644
Binary files a/waves.shm/waves.dsn and b/waves.shm/waves.dsn differ
diff --git a/waves.shm/waves.trn b/waves.shm/waves.trn
index ad96779fa2260c2e2b540523a2a6e4ed923fab39..302857a18746f2d395b1b4a8889551acc0b079bd 100644
Binary files a/waves.shm/waves.trn and b/waves.shm/waves.trn differ